Sharp-Lc-32bt8 37BT8 32GD8 37GD8 Ee Ef Ei Ek Ru

LC-26GA5E
LC-32/37GD8E/RU
LC-32GA5E
LC-32/37BT8E/RU
50mm
SERVICE MANUAL
SE00LC32GD800
40mm Issued: 15th June 2006
LCD COLOUR TELEVISION

31.5mm
PAL B/G, I / SECAM B/G, D/K, L/L’ SYSTEM COLOUR TELEVISION
25mm MODELS
LC-32GD8EE/EF/EI/EK/RU
20mm
LC-32BT8 EE/EF/EI/EK/RU
LC-37GD8EE/EF/EI/EK/RU
LC-37BT8 EE/EF/EI/EK/RU
In the interests of user safety (required by safety
regulations in some countries) the set should be re-
stored to its original condition and only parts identical
to those specified should be used.
CONTENTS
ELECTRICAL SPECIFICATIONS .............................................................................. 3
IMPORTANT SERVICE SAFETY PRECAUTIONS...................................................... 4
OPERATION MANUAL ............................................................................................... 6
DIMENSIONS ......................................................................................................... 10
REMOVING OF MAJOR PARTS ..................................................................................... 11
SERVICE ADJUSTMENTS ..................................................................................... 15
SOFTWARE UPDATING .................................................................................... 23
TROUBLESHOOTING TABLE .................................................................................. 41
MAJOR ICs INFORMATION ..................................................................................... 58
SOURCE OF DOCUMENTATION ................................................................................ 98
CHASSIS LAYOUT .................................................................................................. 99
OVERALL WIRING DIAGRAMS ................................................................................ 105
BLOCK DIAGRAM ...................................................................................................... 106
SCHEMATIC DIAGRAMS ......................................................................................... 108
PRINTED WIRING BOARDS ..................................................................................... 130
REPLACEMENT PARTS LIST .................................................................................. 149
PACKING OF THE SET ........................................................................................... 168
SHARP CORPORATION This document has been published to

be used for after sales service only.
1
LC-26GA5E
LC-32/37GD8E/RU
LC-32GA5E
LC-32/37BT8E/RU
SERVICE MANUAL UPDATE LOG SHEET
Technical Report No. Application

Cause / Solution Part No. Page No.
Technical Bulletin No. Data /Serial No.
Use this page to keep any special servicing information as Technical Report (Bulletin), Technical Information, etc.
If only part number changes are required, just change part number directly the part number in the Parts Listing Sec-
tion.
2
LC-26GA5E
LC-32/37GD8E/RU
Appendix LC-32GA5E
LC-32/37BT8E/RU
Specifications ELECTRICAL SPECIFICATIONS
Item 32o LCD COLOUR TV, 37o LCD COLOUR TV,

Model: LC-32GD8, LC-32BT8 Model: LC-37GD8, LC-37BT8
LCD panel 32o Advanced Super View & 37o Advanced Super View &
BLACK TFT LCD BLACK TFT LCD
Number of dots 3,147,264 dots (1366 g 768 g 3 dots)
Video Colour System PAL/SECAM/NTSC 3.58/NTSC 4.43/PAL 60
TV TV-Standard Analogue CCIR (B/G, I, D/K, L, L’)
Function
Digital DVB-T (2K/8K OFDM)
Receiving VHF/UHF E2–E69ch, F2–F10ch, I21–I69ch, IR A–IR Jch, (Digital: E5–E69ch)
Channel
CATV Hyper-band, S1–S41ch
TV-Tuning System Auto Preset 99 ch, Auto Label, Auto Sort
STEREO/BILINGUAL NICAM/A2
Brightness 450 cd/m2
Backlight life 60,000 hours (at Backlight Standard position)
Viewing angles H : 176° V : 176°
Audio amplifier 10W g 2
Speaker 130 mm g 60 mm
Terminals Rear Antenna input UHF/VHF 75q Din type (Analogue & Digital)
RS-232C 9 pin MINI-DIN male connector
EXT 1 SCART (AV input, Y/C input, RGB input, TV output)
EXT 2 SCART (AV input/output, Y/C input, RGB input, AV Link)
EXT 3 S-VIDEO (Y/C input), RCA pin (AV input)
EXT 4 Ø 3.5 mm jack (Audio input), 15 pin mini D-sub (PC/Component)
EXT 5 HDMI, Ø 3.5 mm jack (Audio input)
C. I. (Common Interface) EN50221, R206001
OUTPUT RCA pin (Audio)
Headphones Ø 3.5 mm jack (Audio output)
OSD language English/German/French/Italian/Spanish/Dutch/Swedish/Portuguese/Finnish/Turkish/Greek/
Russian/Polish
Power Requirement AC 220–240 V, 50 Hz
Power Consumption 136
160 W (0.9 W Standby) 168 W (0.9 W Standby)
(Method IEC60107) (Method IEC60107)
Weight 17 kg (Display only), 20.5 kg (Display only),
19 kg (Display with stand) 23 kg (Display with stand)
Operating temperature 0°C to e40°C
• As a part of policy of continuous improvement, SHARP reserves the right to make design and specification changes for
product improvement without prior notice. The performance specification figures indicated are nominal values of production
units. There may be some deviations from these values in individual units.
NOTE
• Refer to inside back cover for dimensional drawings.
Optional accessories
Cautions regarding use in high and low temperature environments
The listed optional accessories are available for the LCD
colour No. Part name Part number
•WhenTV.thePlease
unit is purchase them
used in a low at your nearest
temperature spaceshop.
(e.g. room, office), the picture may leave trails or appear slightly delayed.
•This
Additional optional accessories may be available in near
is not a malfunction, and the unit will recover when the temperature returns to normal.
Wall mount bracket
future. When purchasing, please read the newest
• Do not leave the unit in a hot or cold location. Also, do not leave 1the unit in a location LC-32BT8E,
(LC-32GD8E, exposed to direct sunlight
AN-37AG2 or near a
catalogue for compatibility and check the availability.
LC-37GD8E, LC-37BT8E)
heater, as this may cause the cabinet to deform and the LCD panel to malfunction.
Storage temperature: –20°C to +60°C. 9 pin D-sub/MINI-DIN
2 AN-A1RS
conversion cable
3 35
LC-32GD8E_GB_f 35 06.5.1, 0:11 PM

LC-26GA5E
LC-32/37GD8E/RU
LC-32GA5E
LC-32/37BT8E/RU
IMPORTANT SERVICE SAFETY PRECAUTION

Service work should be performed only by qualified service technicians who are thoroughly familiar with all
safety checks and the servicing guidelines which follow:
WARNING
1. For continued safety, no modification of any circuit should be attempted.
2. Disconnect AC power before servicing.
CAUTION: FOR CONTINUED PROTECTION AGAINST A RISK OF

FIRE REPLACE ONLY WITH SAME TYPE
F701 (4A / 250 V)
BEFORE RETURNING THE RECEIVER (Fire & Shock Hazard)
Before returning the receiver to the user, perform the following safety checks:
1. Inspect all lead dress to make certain that leads are not pinched, and check that hardware is not lodged between the
chassis and other metal parts in the receiver.
2. Inspect all protective devices such as non-metallic control knobs, insulation materials, cabinet backs, adjustment and
compartment covers or shields, isolation resistor-capacitor networks, mechanical insulators, etc.
3. To be sure that no shock hazard exists, check for leakage current in the following manner.
LC-20B5E
• Plug the AC cord directly into a 220~240 volt AC outlet. (Do not use an isolation transformer for this test).
•Using twoIMPORTANT
clip leads, connect SERVICE a 1.5kSAFETY
ohm, 10 watt resistor paralleled by a 0.15µF capacitor in series with all exposed metal
PRECAUTION
cabinet
Ë Service parts and a known earth ground, such as electrical conduit or electrical ground connected to an earth ground.
work should be performed only by qualified service technicians who are
•A true RMS
thoroughly familiarreading multimeter
with all safety checks and should be used
the servicing for this
guidelines whichtest, follow:especially where the equipment uses a switch mode
power
WARNING
supply which may result in very
• Use
non-sinusoidal
an AC voltmeter having with
leakage
5000 ohm
current.
per volt, or
1. •Connect thenoresistor
modificationconnection to higher,
all exposed metal parts having a return to the chassis (antenna, metal cabinet,
sensitivity or measure the AC voltage drop
For continued safety, of any circuit across the resistor.
screw
should be heads,
attempted. knobs and
2. Disconnect AC power before servicing.
control shafts,
• Connect escutcheon, etc.)
the resistor connection and
to all exposed measure
metal the AC voltage drop across the resistor.
parts having a return to the chassis (antenna, metal
cabinet, screw heads, knobs and control shafts,
AllCAUTION:
checks
AGAINST must be REPLACE
repeated
FOR CONTINUED PROTECTION
A RISK OF FIRE ONLY with
WITH the AC cord plug connection reversed. (If necessary, a nonpolarized adaptor plug must
escutcheon, etc.) and measure the AC voltage drop
across the resistor.
beF6700
used
SAME TYPE only
F3701for the
(2A, 250V), purpose
F3702 of completing these checks.)
(1.25A, 250V),
(1.25A, 250V), F6701 (1.25A, 250V), F6702
All checks must be repeated with the AC cord plug
connection reversed. (If necessary, a nonpolarized
Any reading
(1.25A, of 1.05V
250V), F6703 peak
(1.25A, 250V) AND(this
F6704corresponds to 0.7 mA. peak AC.) or more is excessive and indicates a potential shock
adaptor plug must be used only for the purpose of
(1.25A, 250V) FUSE.
hazard which must be corrected before returning the monitor to the owner.
completing these checks.)
Any reading of 0.75V peak (this corresponds to 0.5
BEFORE RETURNING THE RECEIVER mA. peak AC.) or more is excessive and indicates a
(Fire & Shock Hazard) potential shock hazard which must be corrected before
returning the monitor to the owner.
Before returning the receiver to the user, perform
the following safety checks:
1. Inspect all lead dress to make certain that leads are
not pinched, and check that hardware is not lodged
between the chassis and other metal parts in the
receiver.
2. Inspect all protective devices such as non-metallic DVM
control knobs, insulation materials, cabinet backs, AC SCALE
adjustment and compartment covers or shields,
isolation resistor-capacitor networks, mechanical 1.5k ohm
10W
insulators, etc.
3. To be sure that no shock hazard exists, check for
leakage current in the following manner.
• Plug the AC cord directly into a 110~240 volt AC outlet,
and connect the DC power cable into the receiver's 0.15 µF
DC jack. (Do not use an isolation transformer for this TEST PROBE
test).
• Using two clip leads, connect a 50k ohm, 10 watt
resistor paralleled by a 0.15µF capacitor in series with
all exposed metal cabinet parts and a known earth TO EXPOSED
CONNECT TO
METAL PARTS
ground, such as electrical conduit or electrical ground KNOWN EARTH
connected to an earth ground. GROUND
SAFETY NOTICE
Many electrical and mechanical parts in LCD television have special safety-related characteristics.
SAFETY NOTICE
These characteristics are often not evident from visual inspection, nor can protection afforded by them be necessarily
and shaded areas in the Replacement Parts Lists and
Many electrical and mechanical parts in LCD television
increased by using
have special safety-related replacement components
characteristics. rated for higher voltage, wattage, etc.
Schematic Diagrams.
These characteristics are often not evident from visual For continued protection, replacement parts must be
Replacement
inspection, nor can parts
protectionwhich
afforded have theseidentical
by them be special safety
to those characteristics
used in the original circuit. are identified in this manual; electrical components
having
necessarilysuch features
increased are
by using replacement
rated for higher voltage, wattage, etc.
identifi ed
components by “ ! “.
The use of a substitute replacement parts which do not
have the same safety characteristics as the factory
Replacement parts which have these special safety recommended replacement parts shown in this service
characteristics are identified in this manual; electrical manual, may create shock, fire or other hazards.
For continued
components protection,
having such replacement
features are identified by " å" parts must be identical to those used in the original circuit.
The use of a substitute replacement parts which do not have the same safety characteristics as the factory recommended
replacement parts shown in this service 2
manual, may create shock, fire or other hazards.
4
LC-26GA5E
LC-32/37GD8E/RU
LC-32GA5E
LC-32/37BT8E/RU
PRECAUTIONS FOR USING LEAD-FREE SOLDER
1 Employing lead-free solder

“ALL PWB” of this model employs lead-free solder. The LF symbol indicates lead-free solder, and is attached on the
PWBs and service manuals. The alphabetical character following LF shows the type of lead-free solder.
Example:
e:
LFa
Indicates lead-free solder of tin, silver and copper.
In the case of LC-37GD8 and LC-37BT8, for the Inverter PWB Units the type used is nickel, so they are marked as LFn:
LFn
Sn-Ag-Ni Indicates lead-free solder of tin, silver and nickel.
2 Using lead-free wire solder
When fixing the PWB soldered with the lead-free solder, apply lead-free wire solder. Repairing with conventional lead
wire solder may cause damage or accident due to cracks.
As the melting point of lead-free solder (Sn-Ag-Cu) is higher than the lead wire solder by 40°C, we recommend you to
use a dedicated soldering bit, if you are not familiar with how to obtain lead-free wire solder or soldering bit, contact our
service station or service branch in your area.
3 Soldering
As the melting point of lead-free solder (Sn-Ag-Cu) is about 220°C which is higher than the conventional lead solder by
40°C, and as it has poor solder wettability, you may be apt to keep the soldering bit in contact with the PWB for extended
period of time. However, Since the land may be peeled off or the maximum heat-resistance temperature of parts may be
exceeded, remove the bit from the PWB as soon as you confirm the steady soldering condition.
Lead-free solder contains more tin, and the end of the soldering bit may be easily corroded. Make sure to turn on and
off the power of the bit as required.
If a different type of solder stays on the tip of the soldering bit, it is alloyed with lead-free solder. Clean the bit after every
use of it.
When the tip of the soldering bit is blackened during use, file it with steel wool or fine sandpaper.
Be careful when replacing parts with polarity indication on the PWB silk.
Lead-free wire solder for servicing.
5
LC-32/37BT8E/RU
LC-32/37GD8E/RU
LC-32GA5E
LC-26GA5E
Quick guide Quick guide
Remote control unit TV (Front view)
1 B (Standby/On) 16 truD
1 2 3 4 This button is not available in case
Enter standby mode or turn on the
power. (See page 8.) of using LC-32/37GD8E/BT8E
2 m (Teletext) models.
Select the TELETEXT mode. (all TV 17 SLEEP
image, DTV/DATA image, all TEXT Set the sleep timer in units of 30 min.
image, TV/TEXT image) (See pages 5 18 up to max. 2hr. 30min.
21 and 31.) 18 v (Top/Bottom/Full)
DTV: Select DTV data broadcasting 6 Set the area of magnification in
and TELETEXT. Teletext mode. (See page 21.)
3 k (Reveal hidden Teletext) 7 19 b (INPUT SOURCE)
(See page 21.) Select an input source.
4 [ (Subtitle for Teletext) (TV, DTV, EXT1, EXT2, EXT3, EXT4,
TV/External: To turn the subtitles on EXT5) (See page 9.)
and off. (See page 21.)
8 19
20 EPG
DTV: Display the subtitle selection 9 20 DTV: To display EPG (Electronic
screen. (See page 31.) Programme Guide) screen.
5 3 (Freeze/Hold) ESG Remote control sensor OPC indicator
(See page 21.)
10 21 DTV: To display ESG (Electronic
6 1 (Subpage) 11 Service Guide) screen. OPC sensor SLEEP indicator
22
(See page 21.) 23 RADIO
12 DTV: Switch between RADIO and
7 0–9
13 24 DTV mode. B (Standby/On) indicator
Set the channel in TV and DTV mode.
Set the page in Teletext mode. 14 25 21 AV MODE
OPERATION MANUAL
8 A (Flashback) Select a video setting. (See page 13.)
Press to return to the previous image
26 22 SURROUND
in normal viewing mode. (Will not
15 27
Switch the surround effects on and TV (Rear view)
work while operating in EPG/ESG off.
screen.) 23 P (r/s)
9 DTV 28 TV/DTV: Select the channel.
Press to access DTV mode while External: Switch to TV or DTV input P (s/r) b (Input button)
watching other input sources, and mode. (Programme [channel] buttons)
vice versa. 16 29 Teletext: Move to the next/previous
(This button will not work if you were page. i (l/k) (Volume buttons) a (Power button)
watching DTV immediately before 24 p (Display information)
17 30
6
turning off the TV. In this case first (See pages 21, 29 and 30.)
select any other input source except 25 MENU
DTV using the b button.) Display the MENU screen.
10 2 (Sound mode) (See page 11.)
Select the sound multiplex mode. 26 a/b/c/d (Cursor)
(See below.) Select a desired item on the setting
11 e (Mute) screen.
Switch the sound on and off.
12 i (k/l) (Volume) OK
i (k) Increase the volume. Execute a command within the menu Antenna input terminal
i (l) Decrease the volume. screen. (DVB-T 5V=/80 mA)
13 LIST Display the programme list. RS-232C terminal
DTV: Display the programme list. 27 RETURN
14 DTV MENU Return to the previous menu screen.
Display DTV Menu screen. 28 Colour (Red/Green/Yellow/Blue)
15 END TELETEXT: Select a page. (See page
21.) EXT 5 (HDMI/AUDIO)
Exit the menu screen.
DTV: The coloured buttons are used terminals
to select correspondingly to the
coloured items in the menu screen.
E Using 2 on the remote control unit 29 OPC
To switch the Optical Picture Control
DTV mode: COMMON INTERFACE slot
on and off. (See page 13.)
Press 2 to open the multi audio screen. (See page 31.) 30 f (WIDE MODE)
Select the wide mode. EXT 4 terminals
Analogue TV mode: (See page 20.)
Each time you press 2, the mode switches as illustrated in the following tables. EXT 1 (RGB) terminal
NICAM TV broadcasts selection A2 TV broadcasts selection
NOTE
Signal Selectable items Signal Selectable items • Only if you use an
active terrestrial
EXT 2 (RGB) terminal antenna, select
Stereo NICAM STEREO, MONO Stereo STEREO, MONO
“On (5V)” under
Bilingual NICAM CH A, NICAM CH B, Bilingual CH A, CH B, CH AB “Supply Voltage”.
NICAM CH AB, MONO (See page 18.)
Monaural MONO OUTPUT (Audio) terminals
Monaural NICAM MONO, MONO
EXT 3 terminals
NOTE Headphone jack
6 • When no signal is input, the sound mode will display “MONO”.
AC INPUT terminal 7
LC-32GD8E_GB_a 6 06.5.1, 0:07 PM

LC-32GD8E_GB_a 7 06.5.1, 0:07 PM
Using external equipment Using external equipment
Operation Manual (Continued)

Setting the input source
Connecting a decoder Using AV Link function
To view external source images, select the input source using b on the remote control unit or TV.
NOTE You can use the EXT 1 terminal when connecting a This TV incorporates three typical AV Link functions
• The cables marked with * are commercially available items. decoder and other audiovisual equipment. for smooth connections between the TV and other
audiovisual equipment.
EXT 1
Connecting a VCR Connecting a DVD player One Touch Play
You can use the EXT 1 or 2 terminals when connecting You can use the EXT 2, 3, 4 or 5 (HDMI) terminals SCART cable* While the TV is in standby mode, it automatically turns
a VCR and other audiovisual equipment. when connecting to a DVD player and other on and plays back the image from the audiovisual
If your VCR supports TV-VCR advanced AV Link audiovisual equipment. source (e.g. VCR, DVD).
systems, you can connect the VCR to the EXT 2 AUDIO cable*
terminal of the TV using the fully-wired SCART cable. Decoder WYSIWYR (What You See Is What You Record)
S-video cable* When the remote control unit of the connected VCR
SCART cable* SCART cable* NOTE has the WYSIWYR button, you can automatically start
or • In cases when the decoder needs to receive signal from recording by pressing the WYSIWYR button.
the TV, make sure to set “Decoder” to “EXT1” in the
Programme Setup “Manual Adjust” menu. (See page 16.)
• Do not connect the decoder to the EXT 2 terminal. Preset Download
Automatically transfers the channel preset information
Connecting a PC from the tuner on the TV to the one on the connected
L-AUDIO-R S-VIDEO VIDEO
Composite audiovisual equipment (e.g. VCR) via the EXT 2
terminal.
AV OUTPUT
video cable* Use the EXT 4 terminals to connect a PC.
VCR Decoder
EXT 3 EXT 4 NOTE
EXT 1 or 2 PC
• Refer to operation manuals of each external equipment
NOTE RGB cable*
DVD player for the details.
• TV-VCR advanced AV Link systems may not be compatible • Only works when the audiovisual equipment is connected
with some external sources. NOTE to the EXT 2 terminal on the TV with AV Link via a fully
• TV-OUT from EXT 1 is not outputted when EXT 5 (HDMI) • EXT 3: The S-VIDEO terminal has priority over the VIDEO wired SCART.
or DTV is selected as the input. terminals. • The use of the AV Link function is only possible if the TV-
ø 3.5 mm stereo minijack cable* set has enforced a complete auto-installation with the
3 RCA to 15-pin
connected audiovisual equipment (page 8, Initial auto
7
Connecting a game console or Component D-sub adapter

EXT 4 installation).
cable* (Supplied) PC
camcorder RGB/DVI conversion cable* The availability of the AV Link function depends on the
(CR)
PR
audiovisual equipment used. Depending on the

COMPONENT
A game console, camcorder and some other manufacturer and type of equipment used, it is possible
(CB)
PB
audiovisual equipment are conveniently connected that the described functions may be completely or partially
Y
unusable.
using the EXT 3 terminals.
AUDIO cable*
ø 3.5 mm stereo minijack cable* EXT 4 ø 3.5 mm stereo minijack cable*
S-video cable*
NOTE
DVD player • The cables marked with * are commercially available
or items.
• The PC input terminals are DDC1/2B-compatible.
HDMI cable* • Refer to page 33 for a list of PC signals compatible with
the TV.
EXT 5
• Macintosh adaptor may be required for use for some
Macintosh computers.
L-AUDIO-R S-VIDEO VIDEO
• When connecting to a PC, the correct input signal type is
AV OUTPUT
Composite automatically detected.
video cable*
EXT 3
DVD player
Game console Camcorder
When using an HDMI-DVI conversion
NOTE adapter/cable, input the Audio signal
here.
LC-32/37BT8E/RU
LC-32/37GD8E/RU
• EXT 3: The S-VIDEO terminal has priority over the VIDEO
terminals.
NOTE
LC-32GA5E
LC-26GA5E
• When connecting an HDMI-DVI conversion adapter/cable
to the HDMI terminal, the image may not come in clearly.
10
9
Page 4 Page 9 Page 3
• “AAA” size battery (g2) ...... Page 5 • Operation manual (This publication)
LC-32/37BT8E/RU
LC-32/37GD8E/RU
Appendix
LC-32GA5E
LC-26GA5E
Quick guide

Attaching the stand Troubleshooting
Before performing work spread cushioning over the base area to lay the TV on, making sure the area is
completely flat. This will prevent it from being damaged.
Problem Possible Solution
Before attaching (or detaching) stand, unplug the AC cord from the AC INPUT terminal.
• No power. • Check if you pressed B on the remote control unit. (See page 8.)
1 Confirm the 8 screws supplied with the TV. 2 Attach the two parts of the stand unit to each other If the indicator on the TV lights up red, press B.
using the 4 short screws as shown. • Is the AC cord disconnected? (See page 4.)
• Check if you pressed a on the TV. (See page 8.)
Short screws (m4) Long screws (m4)
(used in step 2) (used in step 4) • Unit cannot be operated. • External influences such as lightning, static electricity, etc., may cause improper
operation. In this case, operate the unit after first turning the power off, or
unplugging the AC cord and re-plugging it in after 1 or 2 minutes.
• Remote control unit does not • Are batteries inserted with polarity (e, f) aligned? (See page 5.)
operate. • Are batteries worn out? (Replace with new batteries.)
• Are you using it under strong or fluorescent lighting?
• Is a fluorescent light illuminated to remote control sensor?
• Picture is cut off. • Is the image position correct? (See page 18.)
• Are screen mode adjustments (4:3 Mode/WSS) such as picture size made
correctly? (See pages 18 and 20.)
3 Insert the stand into the opening on the bottom of 4 Insert and tighten the 4 long screws on the rear • Strange colour, light colour, or • Adjust the picture tone. (See pages 13 and 14.)
the TV. of the TV as shown. dark, or colour misalignment. • Is the room too bright? The picture may look dark in a room that is too bright.
• Check the colour system setting. (See pages 16 and 19.)
• Check the HDMI Setup setting. (See page 19.)
• Power is suddenly turned off. • The unit’s internal temperature has increased.
Remove any objects blocking vent or clean.
• Check the power control setting. (See page 15.)
• Is sleep timer set? Press SLEEP on the remote control unit until it sets to Off.
• No picture. • Is connection to other components correct? (See pages 9 and 10.)

• Is input signal type selected correctly after connection? (See page 19.)
8
• Is the correct input source selected? (See page 9.)

Quick guide • Is non-compatible signal being input? (See page 33.)
• Is picture adjustment correct? (See pages 13 and 14.)
• Is the antenna connected properly? (See page 4.)
Setting the TV • Is “On” selected in “Audio Only”? (See page 18.)
NOTE
• To detach the stand, perform the above steps in reverse order. • No sound. • Is the volume too low? (See pages 6 and 7.)
3 • Make sure that headphones are not connected. (See page 7.)
• Check if you pressed e on the remote control unit. (See page 6.)
LC-32GD8E_GB_a 3 06.5.1, 0:06 PM
• The DTV menu screen is • Check if “Monochrome” is set to “On”. If so, set it to “Off”. (See page 14.)
displayed in monochrome and
hard to select the item.
Cautions regarding use in high and low temperature environments

• When the unit is used in a low temperature space (e.g. room, office), the picture may leave trails or appear slightly
delayed. This is not a malfunction, and the unit will recover when the temperature returns to normal.
Place the TV close • Do not leave the unit in a hot or cold location. Also, do not leave the unit in a location exposed to direct sunlight or near
to the AC outlet, and a heater, as this may cause the cabinet to deform and the LCD panel to malfunction.
keep the power plug Storage temperature: –20°C to e60°C.
within reach.
IMPORTANT NOTE ON RESETTING THE PIN

Standard DIN45325 plug We suggest that you remove the following instruction from the operation manual to prevent children from
(IEC 169-2) reading it. As this operation manual is multilingual, we also suggest the same with each language. Keep it in
75-ohm coaxial cable
a safe space for future reference.
Product shape
varies in some
countries.
Antenna 1 Repeat steps 1 to 3 in Changing the PIN. (See page 17.)
Connect the antenna cable from your antenna-/
cable socket or the (room-/roof) antenna for
Ferrite Core
2 Enter “3001” to cancel out the current PIN.
antenna input terminal on the back of your TV set • The PIN resets to the factory preset “1234”.
to receive digitally/terrestrially broadcast stations.
AC cord
An indoor antenna can also be used under good 32
reception conditions. Passive and active room Ferrite Core
antennas are offered commercially. In an active
antenna its power is supplied via the antenna The Ferrite Core should be permanently attached
input terminal. and never removed from the AC cord. LC-32GD8E_GB_f 32 06.5.1, 0:11 PM
The supply voltage (5V) must be correspondingly

Appendix Appendix

Communication procedure Commands
PC compatibility chart Send the control commands from the PC via the RS-
CONTROL ITEM CONTROL CONTROL
COMMAND PARAMETER CONTROL ITEM COMMAND PARAMETER
232C connector. CONTENTS CONTENTS
Horizontal Vertical VESA The TV operates according to the received command POSITION
Resolution Frequency Frequency Standard
POWER SETTING P O W R 0 _ _ _ POWER OFF H P O S * * * _ H-POSITION AV (�10 – �10)
and sends a response message to the PC. INPUT SELECTION A I T G D _ _ _ _ INPUT SWITCHING (Toggle) H P O S ? ? ? ? AV (�10 – �10)
VGA 640 g 480

Do not send multiple commands at the same time. Wait I T V D _ _ _ _ TV (CHANNEL FIXED) V P O S * * * _ V-POSITION AV (�20 – �20)
31.5 kHz 60 Hz � until the PC receives the OK response before sending I D T V _ _ _ _ DTV (CHANNEL FIXED) V P O S ? ? ? ? AV (�20 – �20)
I A V D * _ _ _ EXT1 – 5 (1 – 5) C L C K * * * _ CLOCK (0 – 180)
the next command. ?
I A V D ? ? ? ? 1 to 5, ERR (TV/DTV) C L C K ? ? ? 0 to 180
SVGA 800 g 600 37.9 kHz 60 Hz � CHANNEL D C C H * * _ _ P H S E * * _ _ PHASE (0 – 40)
Command format TV DIRECT CHANNEL (1 – 99)
D C C H ? ? ? ? 1 to 99 P H S E ? ? ? ? 0 to 40
Eight ASCII codes e CR WIDE MODE
C H U P _ _ _ _ CHANNEL UP W I D E 0 _ _ _ WIDE MODE (Toggle)
XGA 1024 g 768 48.4 kHz 60 Hz �
C H D W _ _ _ _ CHANNEL DOWN W I D E 1 _ _ _ NORMAL (AV)
C1 C2 C3 C4 P1 P2 P3 P4 D T V D * * * _ DTV DIRECT CHANNEL (1 to 999) W I D E 2 _ _ _ ZOOM 14:9 (AV)
D T V D ? ? ? ? 1 to 999 W I D E 3 _ _ _ PANORAMA (AV)
VGA, SVGA and XGA are registered trademarks Command 4-digits Parameter 4-digits Return code D T U P _ _ _ _ DTV CHANNEL UP W I D E 4 _ _ _ FULL (AV)
of International Business Machines Co., Inc. Command 4-digits: Command. The text of four characters. D T D W _ _ _ _ DTV CHANNEL DOWN W I D E 5 _ _ _ CINEMA 16:9 (AV)
Parameter 4-digits: arameter 0 – 9, g, blank, ? INPUT SELECTION B I N P 1 0 _ _ _ EXT1 (Y/C) W I D E 6 _ _ _ CINEMA 14:9 (AV)
NOTE I N P 1 1 _ _ _ EXT1 (CVBS) W I D E 9 _ _ _ NORMAL (PC)
• This TV has only limited PC compatibility, correct operation Parameter I N P 1 2 _ _ _ EXT1 (RGB) W I D E 1 0 _ _ FULL (PC)
N P 1 ? ? ? ? W I D E ? ? ? ? 1 to 10
can only be guaranteed if the video card conforms exactly Input the parameter values, aligning left, and fill with
I 0 to 2
I N P 2 0 _ _ _ EXT2 (Y/C) MUTE M U T E 0 _ _ _ MUTE (Toggle)
to the VESA 60Hz standard. Any variations from this blank(s) for the remainder. (Be sure that four values are I N P 2 1 _ _ _ EXT2 (CVBS) M U T E 1 _ _ _ MUTE ON
standard will result in picture distortions. input for the parameter.) I N P 2 2 _ _ _ EXT2 (RGB) M U T E 2 _ _ _ MUTE OFF
When the input parameter is not within an adjustable I N P 2 ? ? ? ? 0 to 2 M U T E ? ? ? ? 1 to 2
RS-232C port specifications range, “ERR” returns. (Refer to “Response code format”.) I N P 3 0 _ _ _ EXT3 SURROUND A C D V 0 _ _ _ SURROUND (Toggle)
I N P 4 0 _ _ _ EXT4 (RGB) A C D V 1 _ _ _ SURROUND ON
PC Control of the TV 0 I N P 4 1 _ _ _ EXT4 (COMPONENT) A C D V 2 _ _ _ SURROUND OFF
• When a program is set, the TV can be controlled I N P 4 ? ? ? ? 0 to 1 A C D V ? ? ? ? 1 to 2
from the PC using the RS-232C terminal. 0 0 0 9 I N P 5 0 _ _ _ EXT5 (HDMI) AUDIO CHANGE A C H A _ _ _ _ SOUND SELECT (ST/Bilingual/mono)
AV MODE _ SLEEP TIMER O F T M 0 _ _ _
The input signal (PC/video) can be selected, the SELECTION
A V M D 0 _ _ AV MODE SELECTION (Toggle) OFF
A V M D 1 _ _ _ O F T M 1 _ _ _ 30 m
volume can be adjusted and various other – 3 0 STANDARD
A V M D 2 _ _ _ SOFT O F T M 2 _ _ _ 1 h 00 m
adjustments and settings can be made, enabling A V M D 3 _ _ _ ECO O F T M 3 _ _ _ 1 h 30 m
automatic programmed playing. 1 0 0
9
A V M D 4 _ _ _ USER O F T M 4 _ _ _ 2 h 00 m
A V M D 5 _ _ _ DYNAMIC O F T M 5 _ _ _ 2 h 30 m
• Attach an RS-232C cable cross-type (commercially 0 0 5 5 A V M D ? ? ? ? 1 to 5 O F T M ? ? ? ? 0 to 150
available) to a 9 pin D-sub/MINI-DIN (optional: AN- VOLUME V O L M * * _ _ VOLUME (0 – 60) TEXT T E X T 0 _ _ _ TEXT OFF
A1RS) for the connections. When “?” is input for some commands, the present setting V O L M ? ? ? ? 0 to 60 T E X T 1 _ _ _ TEXT CHANGE (Toggle)
value responds. T E X T ? ? ? ? 0 to 1
NOTE D C P G * * * _ DIRECT PAGE JUMP (100 – 899)
• This operation system should be used by a person who is ? D C P G ? ? ? ? 100 to 899
accustomed to using PCs.
NOTE
? ? ? ? • If an underbar (_) appears in the parameter column, enter a space.
• If an asterisk (*) appears, enter a value in the range indicated in brackets under CONTROL CONTENTS.
Response code format
Normal response Rating table for Child Lock
9 pin D-sub/MINI-DIN
conversion cable O K Broadcasted
(optional: AN-A1RS) rating AGE
Return code (0DH) User-
adjusted rating 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18
Problem response (communication error or incorrect
RS-232C serial control cable command) Universal � — — — — — — — — — — — — — —
(cross type, commercially available)
E R R
Communication conditions Parental � � � � � — — — — — — — — — —
Set the RS-232C communications settings on the PC Return code (0DH)
to match the TV’s communications conditions. The TV’s
X-rated � � � � � � � � � � � � � � �
communications settings are as follows:
LC-32/37BT8E/RU
LC-32/37GD8E/RU
Baud rate: 9,600 bps Broadcasted
Data length: 8 bits rating
Universal Parental X-rated
LC-32GA5E
LC-26GA5E
None User-
Parity bit:
adjusted rating
Stop bit: 1 bit
Flow control: None Universal — — —
Parental � — —
X-rated � � —
34 33
LC-26GA5E
LC-32/37GD8E/RU
LC-32GA5E
LC-32/37BT8E/RU
DIMENSIONS
LC-32GD8E / LC-32BT8E / LC-37GD8E / LC-37BT8E
( ) : LC-32GD8E
LC-32BT8E
[ ] : LC-37GD8E
LC-37BT8E
396.0 : LC-32GD8E
396,0
LC-32BT8E
LC-37GD8E
LC-37BT8E
612.0
612,0 119.2
119,2
(804.0) / [926.0]
(804,0) / [926,0] 115.7
115,7
(699.6) / [822.6]
(699,6) / [822,6]
(394.3) / [463.8]
(394,3) / [463,8]
(575.0) / [644.0]
(575,0) / [644,0]
(636.0) / [705.0]
(636,0) / [705,0]
(388.5) / [422.9]
(388,5) / [422,9]
61.0
61,0
115.7 188.6
200.0 115,7 188,6
200,0
(115.0) / [104.0]
(115,0) / [104,0]
200.0
200,0
10
LC-26GA5E
LC-32/37GD8E/RU
LC-32/37GD8E/RU
LC-32GA5E
LC-32/37BT8E/RU
LC-32/37BT8E/RU
REMOVING OF
REMOVING OF MAJOR
MAJORPARTS
PARTS
1. Remove the stand fixing screws (4 pcs.).
2. Remove the terminal screws (6 pcs.).
3. Remove the cabinet B fixing screws (9 pcs.).
4. Remove the cabinet B after opening from the direction of an arrow.
5. Remove the top cover ass’y.
6. Remove the operation PWB fixing screws (3 pcs.).
7. Remove the stand cover fixing screws (2 pcs.).
8. Remove the stand assist angle fixing screws (2 pcs.).
9. Remove the 6 lock screws from the right and left center angles and take out both center angles.
10. Remove the Shield screws (2 pcs.).
9
11
LC-26GA5E
LC-32/37GD8E/RU
LC-32GA5E
LC-32/37BT8E/RU
Removing
LC-32/37GD8E/RU of Major Parts (Continued)
LC-32/37BT8E/RU
11. Disconnect all the connectors from all the PWBs.
12
10
LC-26GA5E
LC-32/37GD8E/RU
LC-32GA5E
LC-32/37BT8E/RU
LC-32/37GD8E/RU
Removing of Major Parts (Continued) LC-32/37BT8E/RU
12. Remove the chassis frame fixing screws (5 pcs.).

13. Remove the Digital PWB with Digital PWB Shield fixing screws (4 pcs.).
14. Remove the Digital PWB from Digital PWB Shield (4 pcs.).
15. Remove the D-tuner PWB fixing angle fixing screws (2 pcs.).
16. Remove the power PWB fixing screws (4 pcs.).
17. Remove the AV PWB fixing screws (5 pcs.).
18. Remove the R/C,LED PWB fixing screws (3 pcs.).
19. Remove the 2 lock screws from the right and left speakers and take out both speakers.
13
11
LC-26GA5E
LC-32/37GD8E/RU
LC-32GA5E
LC-32/37BT8E/RU
LC-32/37GD8E/RU
Removing
LC-32/37BT8E/RU of Major Parts (Continued)
20. Remove the LCD angle to LCD Panel fixing screws (9 pcs.).
21. Remove the LCD angle to Cabinet-A fixing screws (5 pcs.).
14
12
LC-26GA5E
LC-32/37GD8E/RU
LC-32GA5E
LC-32/37BT8E/RU
SERVICE ADJUSTMENTS
The adjustment values are set to their optimum at the factory before shipping. If by any chance a value should become im-
proper or a readjustment is required due to part replacement, make an adjustment according to the following procedure.
1. Entering and exiting the adjustment process mode
1- Unplug the AC power cord of TV set to force power off.

2- While holding down the “VOL (–)” and “INPUT” keys on the set at once, plug in the AC power cord to turn on the
set. The letter K appears on the screen. (Factory mode)
3- Next, hold down the “VOL (—)” and “P ( V )” keys on the set at once. Multiple lines of orange characters appearing
on the screen indicate that the set is now in the adjustment process mode. If you fail to enter the adjustment process
mode (the display is the same as normal start up), retry the procedure.
4- To exit the adjustment process mode after the adjustment is done, unplug the AC power cord to force off the
power. (When the power is turned off by the remote controller, unplug also the AC power cord and wait for 10
seconds before plug it in again.)
5- To remove “K” mode, just repeat steps 1 and 2. This time the letter K disappears from screen.
Caution: Use due care in handling the information described here lest the users should
know how to enter the adjustment process mode. If the settings tampered with in
this mode, unrecoverable system damage may result.
2. Remote Controller Key Operation and Description of Display in Adjustment Process Mode
2.1 Key operation
Remote controller key Main unit key Function
P (Λ / V) P (Λ / V) Moving an item (line) by one (UP/DOWN)
VOL (+/-) VOL (+/-) Changing a selected item setting (+1/-1)
Cursor (UP / DOWN) ———— Turning a page (PREVIOUS / NEXT)
Cursor (LEFT / RIGHT) ———— Changing a selected line setting (+10/-10)
INPUT SOURCE INPUT button Input source switching (toggle switching)
on remote controller (TV→DTV→EXT1→EXT2→EXT3→EXT4→EXT5)
(Not Operative)
OK ———— Executing a function
Input mode is switched automatically when relevant adjustment is started so far as the necessary input signal
available.
2.2 Description of display

Currently selected input
Current color TV system
Current page title Inch Setting (32 just as example, it may be: --/32/37)
Destination (EURO just as example. See Factory Init,
Current page/ Total pages it may be EURO, UK, ITALY, FRANCE or RUSSIA)
1/11 [INFO] TV AUTO 32: EURO Adjustment process menu

header
Main Version LEW05 01.XXXX (YYYY/MM/DD X) X
Dev Version X.XXX
Dev Loader Version X.X
Pic Version XX.XX
TEMP SENSOR XXX
NORMAL STANDBY CAUSE XXXXX Parameters
ERROR STANDBY CAUSE [1] 0 XXHXXM
[2] 0 XXHXXM
[3] 0 XXHXXM
[4] 0 XXHXXM
[5] 0 XXHXXM
15
LC-26GA5E
LC-32/37GD8E/RU
LC-32GA5E
LC-32/37BT8E/RU
3. Adjustment process mode menu
The character string in brackets [ ] will appear as a page title in the adjustment process menu header.
Page Line Item Description Remarks (Adjustment detail, etc.)

1/11 [INFO]
1 Main Version 1.xxx (xx/xx/xxxx) x Main microprocessor version (VCTP)
2 Dev Version x.xxx Digital Module version
3 Dev Loader Version x.x Digital Module loader version
4 PIC Version xx.xx PIC version
5 TEMP SENSOR xxx Temp inside cabinet (near panel)
6 NORMAL STANDBY CAUSE [X]0 Last status which cause standby
7 ERROR STANDBY CAUSE xxHxxM (X5) Error standby cause
Total operating time before error
2/11 [INIT]
1 Factory Init (--/EURO/UK/ITALY/FRANCE/RUSSIA)ENTER Initialization to factory settings
2 Inch Setting (--/26/32/37/45) Initialization data for different panel sizes
3 PUBLIC MODE OFF/ON PUBLIC MODE flag setting
4 Center Acutime XxH xxM Main operating hours (Not Operative)
5 RESET OFF/ON Main operating hours reset
6 Backlight Acutime XxH xxM Backlight operating hours
7 RESET OFF/ON Backlight operating hours reset
8 Picture Read Pos X 0 x-axis setting of picture data
9 Picture Read Pos Y 0 y-axis setting of picture data
10 Picture Read ON/OFF Start/stop of picture data
3/11 [PAL. SECAM. N358]
1 RF-AGC ADJ ENTER RF AGC auto adjustment
2 PAL+TUNER ADJ ENTER PALTUNER auto adjustment
3 PAL ADJ ENTER PAL auto adjustment
4 TUNER ADJ ENTER TUNER auto adjustment
5 CONTRAST SD 32 SD contrast adjustment
6 SECAM CB OFFSET 1 SECAM contrast adjustment
7 SECAM CR OFFSET 1 SECAM contrast adjustment
8 TUNER A DAC 32 TUNER DAC adjustment
9 RF AGC 20 RF AGC adjustment
4/11 [COMP 15K]
1 COMP 15K ADJ ENTER COMP 15K auto adjustment
2 COMP 15K CONTRAST 32 Contrast adjustment
5/11 [HDTV]
1 HDTV CONTRAST 32 Contrast adjustment
6/11 [SMPTE]
1 RF-AGC ADJ ENTER RF AGC auto adjustment
2 PAL+TUNER ADJ ENTER PALTUNER auto adjustment
3 PAL ADJ ENTER PAL auto adjustment
4 TUNER ADJ ENTER TUNER auto adjustment
5 CONTRAST SD 32 SD contrast adjustment
6 SECAM CB OFFSET 1 SECAM contrast adjustment
7 SECAM CR OFFSET 1 SECAM contrast adjustment
8 TUNER A DAC 34 TUNER DAC adjustment
9 RF AGC 25 RF AGC adjustment
7/11 [M GAMMA INFO]
1 MGAMMA IN 1 160 W/B adjustment, gradation 1 input setting
7 MGAMMA WRITE OFF/ON EEP writing of adjustment values
8 MGAMMA RESET OFF/ON Initialization of adjustment values
8/11 [M GAMMA 1-3]
1 MGAMMA R 1 0 W/B adjustment, gradation 1R adjustment value
2 MGAMMA G 1 0 W/B adjustment, gradation 1G adjustment value
3 MGAMMA B 1 0 W/B adjustment, gradation 1B adjustment value
10 MGAMMA WRITE OFF/ON EEP writing of adjustment values
9/11 [M GAMMA 4-6]
16
LC-26GA5E
LC-32/37GD8E/RU
LC-32GA5E
LC-32/37BT8E/RU
LC-26GA5E
LC-32GA8/LC-32BV8
LC-32GA5E
LC-37GA8/LC-37BV8
Page Line Item Description Remarks (Adjustment detail, etc.)
9/11 [M GAMMA 4-6]
(Continued)
��6 �� MGAMMA
�� B5 0�� W/B adjustment, gradation 5B adjustment value
��
�� 7 � MGAMMA R6
�� 0 W/B adjustment, gradation 6R adjustment value
8 �
�� MGAMMA G6
�� 0� W/B adjustment, gradation 6G adjustment value
��
9 � MGAMMA B6
�� 0� W/B adjustment, gradation 6B adjustment value
��
10� MGAMMA WRITE
�� OFF/ON
� EEP writing of adjustment values
��
10/11 � [ETC]
��
1 �� EEP CLEAR
�� OFF/ON
�� Restore NVM data to default values
��
�� 2 � EEP CLEAR B
�� OFF/ON Restore NVM data to default values except
� �� adjustment data
��
3 � STAND BY CAUSE RESET
�� OFF/ON
�� Clearing of standby cause error list
��
4 AUTO INSTALLATION SW 0/1 0: unfinished 1:finish (The setting takes effect
��
� ��
the next time the power is turned on.)
5 � ��
OPTION 0��
6 COUNTRY ��
(--/EURO/UK/ITALY/FRANCE/RUSSIA) Selected country
7 � ��
L ERR RESET 0� Lamp error counter
8 � ��
L ERR STOP �� Stops
0/1 ��
Lamp Error feature �
9 � ��
DTV CLR �
0/1 ��
Restore Digital Module NVM to default values
10� ��
I2C-OFF ��
ENTER ��
BUS STOP
� ��
11/11 LCD
�� 1 � ��
OSC FREQ 50 144
2 � ��
OSC FREQ 60 ��
144
3 � ��
PWM FREQ 50 1��
4 � ��
PWM FREQ 60 1�
5 � ��
PWM FREQ �
424
� ��
6 PWM DUTY 227
� ��
7 PWM CTRL 0
� ��
4. Special Features
- ERROR STAND-BY CAUSE (Page 1/11)

When the unit enters standby due to operational error, total time before the error and the cause of error is recorded
on EEPROM, if possible. The values can be used to locate the fault for repair.
- EEP CLEAR (Page 10/11)
Restore NVM data to default values.
- EEP CLEAR B (Page 10/11)
Restore NVM data to default values except adjustment data.
5. Video Signal Adjustment Procedure
The adjustment process mode menu is listed in Section 3.

5.1. Signal check
Signal generator level adjustment check (Adjustment to the specified level).
- Composite signal PAL : 0.7Vp-p ± 0.02Vp-p (Pedestal to white level)
- 15K Component signal : Y level 0.7Vp-p ± 0.02Vp-p (Pedestal to white level)
(50Hz) (576i/50Hz) PB, PR level 0.7Vp-p ± 0.02Vp-p
5.2. Entering the adjustment process mode

Enter the adjustment process mode according to Section 1.
5.3. RF AGC Adjustment
Adjustment Point Adjustment conditions Adjustment procedure

1 Setting [Signal] • Feed the PAL color bar signal (E-12ch) to TUNER.
PAL Signal level: 50 ±1dB µV (75Ω LOAD)
Field Color Bar
RF signal [TUNER]
[Terminal]
TUNER
�� ↑ 100% white
2 Auto adjustment Adjustment process page 3. Bring the cursor on [▪RF AGC ADJ] and press [OK].
performance [▪RF AGC ADJ OK] appears when finished.
17
17
LC-26GA5E
LC-32GA8/LC-32BV8
LC-32/37GD8E/RU
LC-32GA5E
LC-37GA8/LC-37BV8
LC-32/37BT8E/RU
5.4. RF AGC Adjustment (SMPTE RF SIGNAL- Alternative Method)

1 Setting [Signal] • Feed the PAL SMPTE color bar signal (E-12ch) to TUNER.
PAL Signal level: 50 ±1dB µV (75Ω LOAD)
SMPTE Field Color Bar
RF signal [TUNER]
[Terminal]
TUNER
↑ 100% white
2 Auto adjustment Adjustment process page 6. Bring the cursor on [▪RF AGC ADJ] and press [OK].
performance [▪RF AGC ADJ OK] appears when finished.
5.5. PAL Signal & Tuner Adjustment

1 Setting [Signal] • Feed the PAL full field color bar signal (75% color saturation) to
PAL EXT3 VIDEO IN.
FULL Field Color Bar • Feed the RF signal PAL color bar (E-12) to TUNER.
Composite or RF signal • Make sure the PAL color bar pattern (E-12) has the sync level of 7:3
[Terminal] with the picture level.
EXT3 VIDEO IN
[EXT 3] [TUNER]
TUNER
��
↑ 100% white ↑ 100% white
2 Auto adjustment Adjustment process page 3. Bring the cursor on [▪PAL +TUNER ADJ] and press [OK].
performance [▪PAL+ TUNER ADJ OK] appears when finished.
5.6. PAL Signal & Tuner Adjustment (SMPTE RF SIGNAL-Alternative Method)

1 Setting [Signal] • Feed the PAL full field color bar signal (75% color saturation) to
PAL EXT3 VIDEO IN.
FULL Field Color Bar • Feed the RF signal SMPTE color bar (E-12) to TUNER.
Composite or RF SMPTE signal • Make sure the SMPTE color bar pattern (E-12) has the sync level of
[Terminal] 7:3 with the picture level.
EXT3 VIDEO IN [EXT 3] [TUNER]
TUNER
↑ 100% white ↑ 100% white
2 Auto adjustment Adjustment process page 6. Bring the cursor on [▪PAL +TUNER ADJ] and press [OK].
performance [▪PAL+ TUNER ADJ OK] appears when finished.
18
LC-26GA5E
LC-32/37GD8E/RU
LC-32GA8/LC-32BV8
LC-32GA5E
LC-32/37BT8E/RU
LC-37GA8/LC-37BV8
5.7. ADC Adjustment (Component 15K)

1 Setting [Signal] (576i/50) • Feed the COMPONENT 15K 100% full field color bar signal (100%
COMP 15K, 50Hz color saturation) to EXT4 COMPONENT IN.
100% Full Field Color Bar
[Terminal]
EXT4 [COMPONENT] [EXT 4]
← Black
↑ 100% white
2 Auto adjustment Adjustment process page 4. Bring the cursor on [▪COMP15K ADJ] and press [OK].
performance [▪COMP15 ADJ OK] appears when finished.
6. White Balance Adjustment
Adjustment procedure Page 7/11 shows the value of adjustment gradation (IN value) and Adjustment procedure Page
8/11 & 9/11 show adj. offset value (initial value : 0). White balance adjustment is executed adjusting the adj. offset value,
indicated on Page 8/11 & 9/11.
Condition of the inspection: • Backlight: MAX (+8) [DYNAMIC]

• Colorimeter at screen centre
Adjustment reference device: Minolta CA-210
Tolerance adjustment spec. ±0.004, Inspection spec. : ±0.006 (GAMMA 1)
Tolerance adjustment spec. ±0.002, Inspection spec. : ±0.004 (GAMMA 2...6)
Adjustment: Check that the values on page 7/11 of process adjustment are set as below. If not, change them ac-
cordingly.
M GAMMA IN 1 160 M GAMMA IN 2 320

1- Display the current adjustment status at point 6. (Page 9/11 of process adjustment)
The pattern for checking the adjustment status is toggled by pressing the “6” button on the remote control. (Normal
OSD display -> “6” -> pattern for check (OSD disappears) -> “6” -> normal OSD display -> …)
2- Read the value of the luminance meter.
3- Change M GAMMA R6/M GAMMA B6 (adjustment offset value) on page 9/11 of process adjustment so that the
values of the luminance meter approach x = 0.272 and y = 0.277.
(Basically, G is not changed. If adjustment fails only with R and B, then G should be reduced. In this case, the weaker
of R and B must be fixed.)
4- If G is changed in step “3”, change the values of M GAMMA G1 - M GAMMA G5 on pages 8/11 and 9/11 of process
adjustment as follows. When not changed, go to step “5”.
Offset value of M GAMMA G1 = (Offset value of M GAMMA G6)*(160/960)

19
LC-26GA5E
LC-32/37GD8E/RU
LC-26GA5E
LC-32GA8/LC-32BV8
LC-32GA5E
LC-32/37BT8E/RU
LC-32GA5E
LC-37GA8/LC-37BV8
5- Display the adjustment status of the current point 5. (Each time the “5” button on the remote control is pressed, the
adjustment status check pattern is toggled.)
(Normal OSD display -> “5” -> Pattern display (OSD disappears) -> “5” -> Normal OSD display ->…)
Change M GAMMA R5/M GAMMA B5 (adjustment offset value) on page 9/11 of process adjustment so that the val-
ues of the luminance meter approach x = 0.272 and y = 0.277.
6- Repeat step “5” for GAMMA points 4, 3, 2, and 1.
7. QS Temperature NVM Data Confirmation
During servicing of the LCD TV set , by software upgrading or by any cleaning NVM, it’s mandatory select the “Inch
Setting” in Service Mode, Page 2, according to the size of the TV set.
02/11 [ INIT ] INPUT 4 PAL --:-- 02/11 [ INIT ] INPUT 4 PAL 32:--
Factory Init -- Factory Init --
Inch Setting -- Inch Setting 32
Public Mode OFF Public Mode OFF
Center Acutime 00H Center Acutime 00H
RESET OFF RESET OFF
Backlight Acutime 00H Backlight Acutime 00H
RESET OFF RESET OFF
Picture Read Pos X 0 Picture Read Pos X 0
Picture Read Pos Y 0 Picture Read Pos Y 0
Picture Read OFF Picture Read OFF
Default picture after cleaning NVM. Picture with [Inch Setting] to 32.
8. Initialization to factory settings
��
��
��
��

� ��
[FACTORY INIT]
� ��
� ��
��
��
��
��
��
��
��
��
��
��
��
��
20
20
LC-26GA5E
LC-32/37GD8E/RU
LC-26GA5E
LC-32GA8/LC-32BV8
LC-32GA5E
LC-32/37BT8E/RU
LC-32GA5E
LC-37GA8/LC-37BV8
9. Lamp error detection
9.1. For 37” LCD TV

9.1.1. Functional description
This LCD colour television has a function (lamp error detection) to be turned OFF automatically for safety when the
lamp or lamp circuit is abnormal.
If the lamp or lamp circuit is abnormal, or some other errors happen, and the lamp error detection is executed, the
following occur.
1- The main unit of television is turned OFF 5 seconds after it is turned ON. (The power LED on the front side of
TV
turns from green to red.)
2 - If the situation “1” happens 5 times sequentially, television can not be turned ON. (The power LED remains red.)
9.1.2. Countermeasures
When television is turned OFF by the lamp error detection mentioned above, it enters the adjustment process with
the power LED red. Entering the adjustment process turns OFF the error detection and turns ON TV. This enables
the operation check to detect errors in the lamp or lamp circuit.
Check whether “L ERROR RESET” on point 7, page 10/11 of the adjustment process is 1 or more. If it is 1 or more,
it indicates the lamp error detection was executed. After confirming that the lamp or lamp circuit is normal, reset
the lamp error counter pushing “OK” in the R/C. After resetting counter the label “***OK***” appears on Screen.
9.1.3. Reset standby cause error list

After confirming that the lamp error counter has been erased, select “STAND BY CAUSE RESET” on point 3, page
10/11 of the adjustment process and select ON using the right cursor. For execute press “OK” in the R/C and the
label “***OK***” appears on Screen.
9.2 For 32” LCD TV

9.2.1. Functional description
This LCD colour television has a function (lamp error detection) to be turned OFF automatically (Inverter unit) for
safety when the lamp or lamp circuit is abnormal.
If the lamp or lamp circuit is abnormal, or some other errors happen, and the lamp error detection is executed, the
following occur.The Inverter circuit stops but the rest of TV continues working. The power led is green.
9.2.2 Countermeasures
Proceed to repair the inverter unit to solve the problem that produces the lamp error.
9.2.3. Reset standby cause error list

For 32” this is not necessary because the lamp error detection is not operative by software.
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10. Public Mode (Hotel Mode)
10.1 How to Enter in the Public Mode (Hotel Mode).

Turn on the power and enter in the Adjustment Process mode (ADJ1 or Service Mode) as usual.
In the [INIT], Page 2/11 of Service, turns ON the Public Mode option.
Turn off TV by pressing Main Power switch.
While pressing “VOL+”and “P^” keys at the same time, press Main Power switch for more than 2 seconds.
After this sequence the TV will turn on showing the Public Mode setting screen as follows:
Public Mode
POWER ON FIXED [VARIABLE]
MAXIMUM VOLUME [60]
VOLUME FIXED [VARIABLE]
VOLUME FIXED LEVEL [0]
RC BUTTON [RESPOND]
PANEL BUTTON [RESPOND]
MENU BUTTON [RESPOND]
ON SCREEN DISPLAY [YES]
INPUT MODE START [NORMAL]
INPUT MODE FIXED [VARIABLE]
RESET
EXECUTE
Is possible to select each item of function by pressing cursor UP/DOWN keys on the remote control or CH(∧)(∨) keys
on the LCD TV.
The setting position of each item of functions is made by pressing cursor RIGHT/LEFT keys on the remote control
or VOL(+)(-) keys on the LCD TV.
Select ENTER position after you set all function, and press cursor RIGHT/LEFT keys on the remote control or
VOL(+)/(-) keys on the LCD TC for confirmation.
10.2. Public Mode Settings.

1. POWER ON FIXED [VARIABLE FIXED]
When it is set to “FIXED” the TV is impossible to be switch off by Main Switch or Remote Control.
2. MAXIMUM VOLUME [0  60]
Is possible to set the maximum volume at limited level.
3. VOLUME FIXED [VARIABLE  FIXED]
Is possible to fix the sound volume at limited level.
When “FIXED” is selected the sound volume before limited is fixed.
4.VOLUME FIXED LEVEL [0  60]
If “FIXED” has been selected, is possible to set a fixed volume at the level that is choosen.
5. RC BUTTON [RESPOND  NO RESPOND]
If “NO RESPOND” is selected, the remote control keys are inoperative.
6. PANEL BUTTON [RESPOND  NO RESPOND]
If “NO RESPOND” has been selected, the set´s keys remain deactivated (Except POWER key).
7. MENU BUTTON [RESPOND  NO RESPOND]
If “NO RESPOND” has been selected, “MENU” keys on the remote control, is inoperative.
8. ON SCREEN DISPLAY [YES  NO]
If “NO” has been selected, the On Screen Display does not appear.
9. INPUT MODE START [ NORMALTV (X)DTVINPUT1 INPUT2INPUT3  INPUT4  INPUT5]
When any other item than “NORMAL” has been selected, the sets will start in a selected input mode at the next
power-on.
10. INPUT MODE FIXED [VARIABLE FIXED]
If “FIXED” has been selected, any channels and input modes other than those selected at the start mode cannot be
picked up.
11. RESET
Cancel all Public Mode settings. (It returns to the factory settings)
12. EXECUTE
After select this item, all positions that has been selected will be set.
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SOFTWARE UPDATING
There are 3 methods to update software in the VCTp: I2C method, RS-232C HyperTerminal and RS-232C Tera Term
method.
· RS-232C method is allowed when the TV is working properly and the action should be only software upgrade.
· I2C method is required when the VCTp flash is empty or corrupted (it means, any software inside IC running).
1. RS-232C Method Description (HyperTerminal).
RS-232C METHOD DESCRIPTION.
The hardware tools requirement are:
1. A Modem-null (Cross type) DB9 female to DB9 female cable.
The
2. An hardware
adaptor tools
DB9 male to requirement are: cable (Sharp Code: QCNWGA015WJPZ)
mini-Din 9 pin male
3. Make the connections as indicated in the fiDB9
1. A Modem-null (Cross type) gure:female to DB9 female cable.
PTION. 2. An adaptor DB9 male to mini-Din 9 pin male cable (Sharp Code: QCNWGA015WJPZ)
3. Make the connections as indicated in the figure:
re:
DB9 female to DB9 female cable.
Computer
ni-Din 9 pin male cable (Sharp Code: QCNWGA015WJPZ) TV set
ndicated in the figure:
TV set
Before using RS-232C updating method is necessary to configure a Terminal PC software.

Before using RS-232Chas
HyperTerminal updating
beenmethod is necessary
selected to configure
as a Terminal a Terminal
software PC software.
because HyperTerminal
it’s include in all has been
Windows
selected as a Terminal software because it’s include in all Windows versions as an accessory, and you can find it inside
versions as an accessory, and you can find it inside “Accessories\Communications” folder. For
“Accessories\Communications” folder. For this reason, please follow carefully the next steps:
this reason, please follow carefully the next steps:
method is1. necessary to configure
First time HyperTerminal a Terminal
is used, PCto software.
it’s necessary configure some settings. Follows next action to configure two
d as a Terminalconnection: low speed
software (9600bps)
because and high speed
it’s include in all (115200bps).
Windows
ou can find2. itCreate
insidea New Connection file with name “P55_9600bps”.
“Accessories\Communications” folder. For
3. Select 1. a First
free COM
timeportHyperTerminal
and select the PortisSettings
used, properties as follows: to
it’s necessary
y the next steps:
configure some settings. Follows next action to configure
two connection: low speed (9600bps) and high speed
(115200bps).
nal is used, it’s2. necessary
Create a New to Connection file with name “P55_9600bps”.
s. Follows next action to configure COM port and select the Port Settings
3. Select a free
peed (9600bps) andproperties high speed as follows:
on file with name “P55_9600bps”.

rt and select the Port Settings
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VCTp Software Updating, HyperTerminal (continued)
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4. Click on “File\Properties” menu for selecting the General and ASCII properties as follows:
5. Select “New Connection” in the File Menu.

6. Answer “Yes” to close current connection and “Yes” to save session “P55_9600bps”. (*)
7. Create a new connection with the name “P55_115200bps”.(*)
8. Select a the same COM port used in item 2 and select the Port Settings properties as follows:
9. Select the same General and ASCII properties as item 3.

10. Close HyperTerminal session, answering “Yes” to close current connection and “Yes” to save session
“P55_115200bps”. (*)
To start updating session, click over “P55_9600bps”(*) icon that you can find in the “START\All programs\Accessories\
Communications\HyperTerminal\HyperTerminal” folder and follow next procedure:
1. Check the connection between TV set and PC, sending a wrong command, as for example: “aaa”. TV set returns
an “ERR” label as an syntaxis ERROR (Not correct order or sequence).
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VCTp Software Updating, HyperTerminal (continued) LC-37P55E
2. Send the command “DWMD” to enter TV set in Download Mode. The TV set answer sending same symbol con-
tinuosly. If this symbol character doesn’t appear, please don’t worry and pass to next step.
3. Close this connection and open “P55_115200bps” (*) connection clicking over the “P55_115200bps” (*) that
you can find in “START\All programs\Accessories\ Communications\HyperTerminal\HyperTerminal” folder.
4. Using “Transfer\Send file…” menu, select desired file (.bin format) and the transmission protocol (Xmodem) as
show below.
5. After press “Send” button the updating process starts as follows:
6. When flash update process finishes, the ” Flash programming complete “ label appear in the screen , the device
automatically go to switch off, and in a few seconds go to switch on again.
VERY IMPORTANT NOTE:

During the updating time, please don’t use the PC for other purpouses, in order to abolish communication
problems between TV set and PC. If TV set was not updated properly, the TV won’t have the software to startup
again, and you must follow the “I2C method” to update another time the TV set.
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1. 2. RS-232C Method Description (Tera Term)

2. An adaptor DB9 male to mini-Din 9 pin male cable (Sharp Code: QCNWGA015WJPZ)
3. Make the connections as indicated in the figure:
Computer TV set
Software requirements :
To upgrade VCTp software from RS-232C external connector is necessary to use a Tera Term (Pro) free software.
The URL of Tera Term home page is:
http://hp.vector.co.jp/authors/VA002416/teraterm.html
(The address may be changed in future)
Tera Term (Pro) supported operating systems:
MS-Windows 95 or upper
MS-Windows NT 3.5 and 4.0 or upper
Note.- For Windows 3.1 use Tera Term version 1.X.
Copy all the distribution files to an empty floppy disk or temporary directory (for example C:\ TEMP ).
Run SETUP.EXE and follow the instruction given by it.
After the installation, the distribution files are no longer needed, you can delete them or may keep them in the floppy
disk.
How to use Tera Term Pro :

When the Tera Term (Pro) program is used, it’s necessary to shape some settings. Follows next action to configure
the connection:
1. Select: Serial ⇒ COM X ⇒ O.K.
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2. Select: Terminal
3. Choose the same options as the above picture.
4. Select Setup ⇒ Serial port ⇒ O.K. Appear the follow screen:
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5. Select follows settings:

Serial port to use: COM x
Baud rate: 9600
Data: 8 bits
Parity: none
Stop: 1 bit
Flow control: none
Enter O.K.
6. Check the connection between TV set and PC, sending a wrong command, as for example: “aaa”. TV set returns
an “err” label as an syntaxes ERROR (Not correct order or sequence).
Send a “DWMD” (capital letters) command to enter TV set in Download Mode.
Change a baud rate to 115200.
Select: Setup ⇒ Baud rate ⇒ 115200 ⇒ O.K.
7. Select: File ⇒ Transfer ⇒ XMODEM ⇒ Sent
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8. Choose the file for upgrade and click “Open”.
9. After select “Open” the upgrade process starts as follows:
VERY IMPORTANT NOTE:

During the updating time, please don’t use the PC for other purposes, in order to abolish communication prob-
lems between TV set and PC. If TV set was not updated properly, the TV won’t have the software to startup
again, and you must follow the “I2C method” to update another time the TV set.
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1.3. I2C Method Description

1. A Parallel port I2C interface with 20 pin to 3 pin cable (Sharp Code: CKIT-0004WJV0).
2 . Make the connections as indicated below:
a. Connect Parallel port I2C interface to LPT port of the computer.
b. Connect the 20 to 3 pin cable from the I2C interface to the P2306 socket in the main board (XD603).
To P2306
To PC
QCNWGA100WJZZ QPWBX0004WJZZ
I2C Interface (CKIT-0004WJV0)
Before using I2C method is necessary to install Visual I2C software following next procedure.
1. Install Visual I2C release V3.2.3b from file (“Setup_Visual_I2C_v3-2-3b8h.exe”).

•It’s strongly recommended to accept the suggested default folder (“C:\Program Files\Micronas\Visual I2C”).
2. Install Visual I2C VCTp extension from file (“Setup_VI2C_for_VCT6wxyP_v0111.exe”).
•It’s interesting to change default folder to same as Visual I2C (“C:\Program Files\Micronas\Visual I2C”).
•During this installation process is possible to install also a complementary software to manage NVM memories .
This installation is not needed, for this reason uncheck the option when the setup program ask to you. In case of
installation it’s interesting to change default folder to same as Visual I2C (“C:\Program Files\Micronas\Visual I2C”).
3. Install Parallel driver depending of your Windows version from existing files inside the Visual I2C installation
folder “C:\Program Files\Micronas\Visual I2C\Port_Driver”, following next criteria:.
a. Windows 98/Me (“Setup_LptDrv_v0104_9x.exe”).
b. Windows NT (“Setup_LptDrv_v0104_NT_2000.exe”).
c. Windows Xp/2000 (“Setup_LptDrv_v020201_XP_2000.exe”).
After installing Visual I2C, the new generated file structure should look like this:
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VCTp Software Updating, I2C (continued)
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4. Check installation LPT driver using “C:\Program Files\Micronas\LptDrv\LptDrvTest.exe”. After run this software, if
LPT driver is installed properly must appear this screen:
��
 ��
•If the result is not OK, check inside PC bios: Parallel Port Mode=EPP
To run VCTp software update program, please click over “VCTP” icon from “START\All programs\Micronas\Visual
I2C\IC\VCTP” and after Visual I2C finish their starting process click on “TVT” module. As additional method, it’s pos-
sible to create a direct access to “C:\Program Files\Micronas\Visual I2C\ic\vct6wxyP\vctq_tvt.vi2c” and launch it from
Windows Desktop.
��
� �
�
�
�
��
To start updating process follow next instructions:

1. Set Autoread in ON option.
2. Click on “GO” button.
3. Wait until “40” appears in Bootloader Version field.
4. Close DOS pop up windows pressing any key (“Press any key to continue…”.).
5. Click on the “Erase flash” button and wait for a seconds and set the AutoRead to OFF.
6. Check in the desired software version is selected in the “Load BinàFlash” option. If it’s not the correct one,
please double click on the file name and select it. The first time this software is use it’s necessary to confirm write
Addressing margin as from 0x0 to 0x7ffff.
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VCTp Software Updating, I2C (continued) LC-32GA5E
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��
7. Click on the “Load Bin à Flash” to start updating process.

��
8. When the updating process finishes, the “Progress” pop up window automatically closes. If appears some problem
during the updating process a error label appears in the filename information line.
If the TV has problem to enters in the “Bootloader mode”, it’s possible to force it by hardware method. This alternative
method is described below:
1.Switch off TV set or hold VCTp RESET line to GND.

2.Pull down SCL line (pin 1) to GND (pin 3) in P2306 connector.
3.Switch on TV set or release VCTp RESET line.
4.Release SCL pull down after minimum of 2 seconds.
5.Check if VCTp is in bootloader mode with Autoread setting in ON.
6.Wait until “40” appears in Bootloader Version field.
7.Follow instruction from item 5 on software method.
Sometimes, depending on the PC hardware, the progress bar runs very fast (Normal time: 1 minute) or some error mes-
sage appears in the filename information line. This means it’s necessary to modify some parameter of LPT port, for this
reason select “LPT Preferences” on the “File\Preferences…” menu and increase Delay from “0” to “1” or “2” (normally,
these values are the best choice).
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There are
2. 2How
methods to update
to update software
the Digital Board in the VCTp: I2C method and RS-232C method.
Software.
There are 2 methods to update the Digital Board Software on Flash Memory (IC4203) throught the Digital Proces-
· RS-232C method is allowed when the TV is working properly and the action should be only
sor (IC4001).
· I2C method is required
• Jig RS-232 when
Method (From PC the
trough VCTp flash
RS-232C COMis empty or corrupted (it means, any software
port).
• PCMCIA CARD (Compact Flash Memory) Method.
RS-232C Method Description

Note: The PCMCIA method is only compatible with those PCs running XP Windows Version.
he hardware tools
2.1. Jig requirement
RS-232 are:
Method Description
• Hardware requirements:
2. An adaptor1. ADB9
modem male to mini-Din
null (Cross type) DB99female
pin male
to DB9 cable (Sharp Code: QCNWGA015WJPZ)
female cable.
3. Make the2.connections asCode:
The Jig Kit (Sharp indicated in the figure:
QCNWKA012WJZZ)
3. Make the connections as in the below figure.
��
Computer
��
TV Set
(CI Terminal)
~
~
Jig
RS-232C serial control cable

(cross type, commercially available)
• Software requirements:
oftware requirements :
1. “Winupload” application software on PC.
To upgrade VCTp software from RS-232C external connector is necessary to use a Tera Term (P
The URL of Tera Term home page is:
• How to setup the “Winupload” software for the first time:
http://hp.vector.co.jp/authors/VA002416/teraterm.html
(The address may be changed
1. Start “Winupload”. It will appear in
thefuture)
following picture.
Tera Term (Pro) supported operating systems:
MS-Windows 95 or upper
MS-Windows NT 3.5 and 4.0 or upper
Note.- For Windows 3.1 use Tera Term version 1.X.
Copy all the distribution files to an empty floppy disk or temporary directory (for example C:\ TEM
Run SETUP.EXE and follow the instruction given by it.
After the installation, the distribution files are no longer needed, 33you can delete them or may kee
disk.
33
ow to use Tera Term Pro :
When the Tera Term (Pro) program is used, it’s necessary to configure some settings. Follows n
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Digital Board Software Updating , Jig RS-232 (continued)
2. Select the most suitable RS232 Serial Port from “Port Setting” - “Process” Menu.
3. Select the following settings from “Port Settings” Menu.

Bits Per Second: 115200
Parity: None
Data bits: 8
Stop bits: 1
Hardware Flow Control: OFF
• Procedure for updating the TV set.
1. Switch off the TV set to be updated, in DTV mode.
2. Start “Winupload”. It will appear the following picture on PC.
3. Establish connection on Winupload Software.
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4. Select “Upload URT file”
5. Select and open the “.urt” data file from data directory
Note: Consider the version shown below just an example, may be is not the latest one, and could be
different depending on the TV set destination (market/Country) or model.
6. Switch On the TV Set (previously in DTV Mode). The Uploading Process starts automatically.
While the TV set is uploading the software, the following information is shown on the TV set screen.
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Then, data transfer from PC to TV set finishes when the “Upload progress completed” label appears in the
“Winupload” screen. Now, the TV set made some additional verification (Items #2 to #7). When the full
uploading process is finished, in the “Winupload” window appears the label “Preparing to start application” for
a new TV Set, and just now, in the TV screen of the updated set, appears a congratulations label (Item #8).
PC SCREEN PROGRESS TV SCREEN PROGRESS
1 2
TV INDICATION
2
3 3&5 4&6
4
5
6
7
8
7 8
Note: Do not turn off the TV set while the software updating was in progress.
7. Unplug the AC cord.
8. Disconnect the Jig from TV Set.
• Software Version verification procedure.
1. Connect the AC cord and Switch On the TV Set.

2. Select DTV Menu on TV Set. The following On Screen Display will appear.
3. Select “Version”. The updated version can be verified.
Note: Consider the version shown above just as example, may be is not the latest one, and could be
different depending on the TV set destination (market/Country) or model.
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2.B. PCMCIA Card (Compact Flash) Method.

2.B. PCMCIA Card (Compact Flash) Method.
2.2. PCMCIA Card (Compact Flash) Method.
�� Hardware requirements:
�� Hardware requirements:
• Hardware requirements:
1. Compact Flash Memory Card.
1. Compact Flash
1. Compact Memory
Flash Card.
Memory Card.
2. PCMCIA Compact Flash Adapter or USB Multi Card Reader.
2. PCMCIA Compact
2. PCMCIA Flash
Compact Adapter
Flash or USB
Adapter MultiMulti
or USB CardCard
Reader.
Reader.
��Software
•��
Software requirements:
requirements:
Software requirements:
1. “StorageMediaManager1.0.1“
1. “StorageMediaManager1.0.1“ application software,
application installed
software, on PC.on PC.
installed
1. “StorageMediaManager1.0.1“ application software, installed on PC.
2. “Loader
2. “Loader 2.2”
2.2” or or higher
higher application
application software,
software, installed
installed on DTVonSet.
DTV Set.
2. “Loader 2.2” or higher application software, installed on DTV Set.
Note:
Note: Storage Media
SMM only for Manager
Windows XP. only for Windows XP.
Note: SMM only for Windows XP.
• How to prepare the CF Card using the “Storage Media Manager 1.0.1” (SMM):
�� How to prepare the CF Card using the “Storage Media Manager 1.0.1” (SMM):
�� How to prepare the CF Card using the “Storage Media Manager 1.0.1” (SMM):
1. Insert PCMCIA (Compact Flash(CF) + CF-Adapter)
Please wait
Please until
wait OSOS
until recognizes the the
recognizes CARD.
CARD.
Note: Sometimes this message doesn't appear.
Note: Sometimes this message doesn't appear.
2. 2. Execute
2. Execute
Execute SMM.
SMM. SMM. If SMM
IfIf SMM
SMM does
doesdoes
not not appear
notappear
appear orWindows
a Windows
orora aWindows Error Error
Box
Error BoxBox appears,
appears, please
please
appears, verify
please verify
there
verify there
noare
are are
there nonoUSB
USB USB
media
media drivesdrives connected to the PC.
media drives connected
connectedtotothe thePC.
PC.
Note:Note:
Note:
Consider
Consider
Consider that
thatit’s
that it’s recommended
it’srecommended
recommendedremove
remove
removeunnecessary
unnecessarymediaunnecessary
mediaduring SMM
during
mediaProbably,
execution.
SMM
during
execution. IfSMM
you
Probably, tryexecution.
If you totry
use
to an
Probably,
useUSB Multi Multi
an USB
If you
Card Card try
to
Reader use
with an
SMM USB
doesn’t Multi
work Card
fine.
Reader with SMM doesn’t work fine. Reader with SMM doesn’t work fi ne.
3. If thecard
CF card never
has never been formatted forSMM the SMM (is not same format typeinused in Windows), the SMM
3. If the CFCF card has
has neverbeen
beenformatted
formattedforforthe
the SMM (is(is
notnot
same
sameformat typetype
format usedusedWindows), the SMM
in Windows), the SMM
will show you the PCMCIA-CF drive as a Windows Media Drives, hanged of the “My Computer” tree (“J” Drive
will show you the
the PCMCIA-CF drive
driveasasa aWindows Media Drives, hanged of the “My“My
Computer” (“J” Drive
treetree (“J” Drive
in theyou
picture PCMCIA-CF
showed below). Windows Media Drives, hanged of the Computer”
in the picture
picture showed
showedbelow).
below).
Already SMM
Already Formatted
SMM Formatted
CF CARDS!!!
CF CARDS!!!
NEWPCMCIA-CF
NEW PCMCIA-CF drive.
drive.
CARDis is
CARD notnot
SMMSMM formatted.
formatted yet.
But,
But, But, PCMCIA-CF
if theif PCMCIA-CF
the PCMCIA-CFcardcard
card hadbeen
had beenbeen
had formatted previously
formatted
formatted byby
previously
previously SMM,
by SMM,
SMM, directly
directly thethe
directly PCMCIA-CF
drivedrive
the PCMCIA-CF
PCMCIA-CF will will
willdrive
appearappear
appear
in the
in SMM
the formatted
SMM Drives
formatted box
Drives (Sharp
box Drives).
(Sharp Please
Drives). go
Pleaseto
go
in the SMM formatted Drives box (Sharp Drives). Please go to Item #6.Item
to #6.
Item #6.
5 5 37
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Digital Board Software Updating , PCMCIA (continued)

4. In 4.
case of notof
In case SMM
not formatted card, select
SMM formatted card,PCMCIA-CD Drive andDrive
select PCMCIA-CD using and
the Right-Click Popup MenuPop
using the Right-Click please
up Menu
format the Drive.
please format the Drive.
4. In case of not SMM formatted card, select PCMCIA-CD Drive and using the Right-Click Popup Menu please
format the Drive.
Select PCMCIA-CF Drive.

Select FormatDrive from Popup Menu.
Select PCMCIA-CF Drive.

Select FormatDrive from Popup Menu.
5. Formatting
5. Formatting the CFthe CFSelect
card. card. “Yes”
Selectto“Yes” to the
confirm confi rm the action.
action.
NOTICE: All FC’s data of the inside are erased.
#4 Select YeAll
NOTICE: s FC’s data of the inside are erased.
NOTICE: All FC's data of the inside are erased
5. Formatting the CF card. Select “Yes” to confirm the action.
NOTICE: All FC’s data of the inside are erased.
6. If SMM formatted card already appears under SHARP DRIVES box please continue, if not try to repeat from
item #1. Select origin folder and “.img” data file to be written in the CF card.
6. If SMM
6. If SMM formatted
formatted card already
card already appears
appears under under
SHARP SHARP
DRIVES DRIVES box please
box please continue,
continue, if not tryif to
notrepeat
try to from
repeat from
item #1. Select origin folder and “.img” data fi le to be written in the
item #1. Select origin folder and “.img” data file to be written in the CF card.CF card.
#5 select write ver. of ".img" file folder.
SMM f tt d
selecting origin
data ".img" file
selecting origin data folder SMM formatted

Card
selecting origin data
".img" file
selecting origin data folder
select write ver. of ".img" file

f ld
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7. First
7. First of all,ofselect
all, select
copycopy target
target drivedrive and then
and then use Drag
use Drag & drop
& drop for“.img”
for the the “.img”
file. file.
At first, take care and select copy

drive. This is important.
After select copy drive,

Drag&Drop of ".img" file.
8. Wait, copy is in process.

8.#7 waitcopy
Wait, copying
is in process.
#7 wait copying
#8 9. Copy
copy is finished, when the Copying progress bar disappears and the name of data file appears in the File
is finished.
Box.
9. #8
Copy
copy is finished,
is finished . when the Copying progress bar disappears and the name of data file appears in the File
Box.
copy is finished.
copy is finished.
#9 End SMM "X" button

39
#10 Remove PCMCIA (Windows Task bar popup menu)
#9 End SMM "X" button 7

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#9 End SMM "X" button
10. Close SMM application.
11. Remove PCMCIA safely using the Windows Task bar pop up menu (Right-click over the Tray Icon).
#10 Remove PCMCIA (Windows Task bar popup menu)
12. Now, the PCMCIA-CF card is prepared to update the TV set.

#11 end
• Procedure to update the TV Set using PCMCIA-CF Card:
1. Switch Off the LCD TV Set.
2. Insert PCMCIA Card (already prepared according the details before given at “How to prepare the CF Card
using the “Storage Media Manager 1.0.1” (SMM))”.
3. Switch On the LCD TV Set (it starts automatically the updating, Items #1 to #4).
1 2
3 4
4. Wait till the finishing indication is shown.
5. For checking the correct update, please Select DTV Menu on TV Set. The following On Screen Display will
appear.
6. Select “Version”. The updated version can be verified.
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TROUBLESHOOTING TABLE
TROUBLESHOOTING TABLE
Power unit operation check
Are the power cord and harness in the unit properly connected? NO Connect the power cord and harness properly, and turn on the
power.
YES
NO Are both ends of C704 and C705 (32"/37") short-circuited when
Is F701 normal?
checking their resistance values?
YES NO YES
Replace F701.
Is a voltage of BU5V applied to pin (20) of P701? (Set the main C704 ••• Check VA701, VA702 and D701.
power SW to OFF.) C705(32”/37”) ••• Check IC704 and 705.
YES NO
Is a voltage of approx. 8 – 15V to pin (4) of IC705?
NO YES
Check IC705, IC708, D725
and Q724.
Check short circuit of 5V line (D737, C752, etc.).
NO Is it a symptom that the relay clatters twice as soon as the main

power SW is set to ON and the power is not supplied?
YES
Does the same symptom appear even if R858 (2.7k) is removed NO Check IC704, D728, D762 and D736. If there are no problems,
and the power is supplied again? check the resistance value between pins (1) and (6) of P704.
When the value is low (several Ω- several hundred Ω),
YES
disconnect P704. If the value is still low, the parts of 24V line are
Check Q724, D731, D734, IC707, D751, D753, D754, D741, defective. When the resistance value is several kΩ, check the
D759 and D746. inverter unit.
YES
Does a relay noise sound? (Once) Check peripheral circuits of D738, R828 and D735.
NO
NO There is a possibility that control by P-CON is not performed
Are PCON1 and 2 [pins (1) and (2) of P702] at Hi (3V or more)?
properly. Check whether the "PS-ON" and "PS-ON2" signals are
sent from pins (97) and (91) of IC1710 (FPGA) of MAIN-UNIT.
YES
Check peripheral circuits of Q712, Q713, Q721, Q723 and
RY701.
26
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Troubleshooting Table (continued)

TROUBLESHOOTING TABLE (Continued)
No sound (1) (during the reception of TV broadcasting)
No audio output during UHF/VHF reception
Checklist:
1) Is the volume set to MIN or MUTE on the remote control? ··· Set the desired volume.
2) Are headphones connected to HEADPHONE (J1301)? ··· Disconnect them.
3) Is ANT-CABLE disconnected or connected improperly? ··· Connect it correctly as per the operation manual.
Is the audio signal (L/R) sent from pins (28) and (27) of IC3002 NO Is the SIF signal (SIF_IN+) Check whether +5V and +8V
YES
(VCT)? sent to pin (31) of IC3002 are supplied to pins (33) and
(VCT)? (18) of IC3002 respectively.
YES Or, check peripheral circuits.
NO
(AV-UNIT)
Is the audio signal of pins (3) Is the audio signal (SIF) sent YES Check pin (31) of IC3002
NO Check IC303 or peripheral
and (5) of IC303 (OP-AMP) from pin (1) of CONNECTOR (VCT) and peripheral
circuits.
sent properly? (SC2705)? circuits.
YES (TUNER) NO
Is the audio signal of pin (4) Check HEAD-PHONE Is the audio signal (SIF) sent YES Check Q203 (AMP) and
NO
of IC301/IC302 (AUDIO- (J1301) or peripheral from pin (12) of IC201 (IF- peripheral circuits.
AMP) sent properly? circuits. DEMOD)?
YES NO
Is the audio signal output of Check P301 (AUDIO- Is the SIF signal sent to pins YES Check IC201 and peripheral
NO
pins (2) and (4) of P301 CONNECTOR) and (23) and (24) of IC201 (IF- circuits.
(AUDIO-CONNECTOR) peripheral circuits. DEMOD)?
normal?
NO
YES
Check Speaker (right and Is the IF signal sent from pin YES Check FL202 and peripheral
left) and wire harness. (8) of TUNER (TU201)? circuits.
NO
Check whether 5V (CONT) YES
Replace TUNER (TU201).
and 5V are supplied to pins
(1) and (7) of TUNER
(TU201) respectively. Check
SDA/SCL and AGC signal.
27
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No sound from external input devices (2)
No sound from an external No sound from an external No sound from an No sound from EXT4 No sound from EXT5
input device connected to input device connected to external input device (AUDIO) connecting an (AUDIO) connecting an
EXT1 (SCART1). EXT2 (SCART2). connected to EXT3. external input device. external input device.
<EXT1> <EXT2> <EXT3> <EXT4> <EXT5>

Is IN1-L audio signal sent Is IN2-L audio signal sent Is IN3-L audio signal Is D-SUB-L audio signal Is HDMI-L audio signal
from pin (6) of SCART1 from pin (27) of SCART2 sent from pin (3) of sent from J2702 to pin sent from J2701 to pin
terminal (J1101) to pin terminal (J1101) to pin J1201 terminal to pin (15) of IC2704? (14) of IC2704?
(14) of IC3002 (VCT)? (12) of IC3002 (VCT)? (16) of IC3002? Is D-SUB-R audio signal Is HDMI-R audio signal
Is IN1-R audio signal sent Is IN2-R audio signal sent Is IN3-R audio signal sent from J2702 to pin sent from J2701 to pin
from pin (2) of SCART1 from pin (23) of SCART2 sent from pin (5) of (2) of IC2704? (5) of IC2704?
terminal (J1101) to pin terminal (J1101) to pin J1201 terminal to pin
YES YES
(13) of IC3002 (VCT)? (11) of IC3002 (VCT)? (15) of IC3002?
YES NO YES NO YES NO

Check pins (6) and Check pins (27) and Check pins 3 Is D-SUB-L audio signal Is HDMI-L audio
(2) of SCART1 and (23) of SCART2 and (J1201) and 5 sent to pin (10) of signal sent to pin
connection to an connection to an (J1201) of EXT3 IC3002? YES (10) of IC3002?
external input external input and connection to Is D-SUB-R audio signal Is HDMI-R audio
device. device. an external input sent to pin (9) of signal sent to pin (9)
device. IC3002? of IC3002?
YES NO
Check output of pins
(13) and (3) of
IC2704 and
peripheral circuits.
Check that Option-

OK
HDMI Setup-Audio
select is set to
"Analog".
Is the audio signal NO Check IC3002 or
properly sent from pins peripheral circuits.
(28) and (27) of IC3002?
YES
Is the audio signal of NO Check IC303 or
pins (1) and (7) of IC303 peripheral circuits.
(OP-AMP) sent properly?
YES
Is the audio output Check IC302/IC301
NO
signal of pins (13) and (MAIN-AMP),
(16) of IC302/IC301 HEADPHONE and
(MAIN-AMP) normal? peripheral circuits.
YES
Check CONNECTOR
(P301) and Speaker
(right and left).
28
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TROUBLESHOOTING TABLE (Continued) LC-32/37GD8E/RU
LC-32/37BT8E/RU
No sound except from speakers (3)
No audio output from the TROUBLESHOOTING TABLE (Continued)

No audio output from EXT1 No audio output from EXT2 No audio output from AUDIO
headphones (SCART) terminal. (SCART) terminal. OUTPUT terminal.
No sound except from speakers (3)
Is the
Is there
MUTEaudio output
button onon
thepins Checklist:
remote
No
(2) and control
audio setfrom
(3)output
of the to ON?
the
headphone No
1) Isaudio outputbutton
the MUTE from EXT1
on the remote control set toNo audio
ON? output
··· Set from EXT2
to OFF. No audio output from AUDIO
... Set to OFF.
headphones
terminal (J1301)? (SCART) terminal.
2) Check the connection to external devices. ··· Is (SCART)
there any terminal.
improper connection? OUTPUT terminal.
NO
Is there
Is audio audio
input/output
output signal
on pinsof Is audio signal sent to pins
Checklist: NO NO Is audio signal sent to pins NO Is audio signal sent to pins
pinsand
(2) (3) (3)
andof(5)/(1) and (7) of
the headphone (3)Isand
1) the(1) of EXT1
MUTE (J1101)?
button on the remote control set to(24)
ON?and
··· (22) ofOFF.
Set to EXT2 (13) and (15) [L/R (white)
IC303 (OP-AMP)
terminal (J1301)? normal? 2) Check the connection to external devices. ··· Is (J1101)?
there any improper connection? (red)] of AUDIO OUTPUT
terminal (J1201)?
NO YES YES
YES
Is audio
Is audio input/output
output signalsignal
(SPK-of Check the
Is audio connection
signal sent to to
pins Is audio signal sent to pins Is audio signal sent to pins
NO NO Check the connection NO
OUT(3)
pins L/R) properly
and (5)/(1) sent from
and (7) of EXT1 (J1101)
(3) and and external
(1) of EXT1 (J1101)? (24) and (22) of EXT2 to Check
(13) andthe(15)
connection to
[L/R (white)
pins (28)
IC303 and (27)normal?
(OP-AMP) of IC3002 devices. EXT2 (J1101) and external
(J1101)? AUDIO
(red)] ofOUTPUT terminal
AUDIO OUTPUT
(VCT)? devices. (J1201)
terminaland external devices.
(J1201)?
NO YES YES
NO YES
Is audio output signal (SPK- Check the connection to
CheckL/R)
OUT audio input signal
properly of pin (31) ofEXT1
sent from IC3002 (VCT),
(J1101) pins
and (18)
external Check the connection to Check the connection to
and (33)
pins (28) of
andthe(27)
power line, pins (84) and
of IC3002 (83) of I2C-LINE, and
devices. Is S-MUTE-LINE
EXT2 (J1101) and[IC1710
external(pin Is S-MUTE-LINE
AUDIO OUTPUT [IC1710
terminal (pin
(VCT)? 100)] or S2-MUTE-LINE
devices. 100)] at and
(J1201) H? external devices.
[IC3003 (pin 26)] at H? (Check Q1204/Q1203
NO (Check Q1102/Q1101 operation.)
Check audio input signal of pin (31) ofIsIC3002 (VCT), pins
S-MUTE-LINE (18)
[IC1710 operation.)
NO
and (33) of the power line, pins (84) and
(pin(83) of I2C-LINE,
100)] at H? and Is S-MUTE-LINE [IC1710 (pin Is S-MUTE-LINE [IC1710 (pin
NO
100)] or S2-MUTE-LINE 100)] at H?
peripheral circuits. (Check Q1106/Q1105
operation.) [IC3003 (pin 26)] at H? (Check Q1204/Q1203
(Check Q1102/Q1101 operation.)
Is S-MUTE-LINENO [IC1710 operation.)
NO
(pin 100)]signal
Is audio at H?sent from NO NO NO Is audio signal sent from pins
(Check
pins (24)Q1106/Q1105
and (23) of (22) and (21) of IC3002?
operation.)
IC3002?
YES
YES
NO Check the audio signal
Check
Is audiothe audio
signal signal
sent from NO Check the power supply 8/5 NO output
Is audioline fromsent
signal pinsfrom
(22) pins
and
output
pins lineand
(24) from pins
(23) of (24) V pins (18) and (33) of (21) and
(22) of IC3002
(21) oftoIC3002?
and (23) of IC3002 to pins
IC3002? IC3002 and peripheral Q1103/Q1104/Q1201/Q1202.
(3) and (1) of EXT1. circuits. YES
YES Check the audio signal
Check the audio signal Check the power supply 8/5 output line from pins (22) and
output line from pins (24) V pins (18) and (33) of (21) of IC3002 to
and (23) of IC3002 to pins IC3002 and peripheral Q1103/Q1104/Q1201/Q1202.
(3) and (1) of EXT1. circuits.
29
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DTV troubleshooting
The unit does not enter the DTV mode. Or, the DTV menu does YES Go to "The unit does not enter the DTV mode. Or, the DTV menu
not appear. does not appear."
NO
YES
No video output during DTV reception. Go to "No video output during DTV reception."
NO
YES
No audio output during DTV reception. Go to "No audio output during DTV reception."
The unit does not enter the DTV mode. Or, the DTV menu does not appear.
Digital UNIT: NO
Check peripheral circuits of IC4701/IC4704 and pin(7) of IC4701.
Is a voltage supplied from IC4701(3.3V-REG)/IC4704(1.8V-REG)?
YES
NO
Do X4001/X4002 oscillate? Check peripheral circuits of X4001/X4002.
YES
D-TUNER UNIT: NO
Check peripheral circuits of IC205/IC206.
Is a voltage of 5V supplied from IC205(SW) and IC206(SW)?
YES
Is a voltage applied to pin(20) (I2CSEL) of P202? NO MAIN UNIT:
(High=3.3V) Check around the pin (1) of IC1710(FPGA).
YES
Is CLK/DATA signal sent to pins (21) and (22) of P202 and pins (1) NO
Check peripheral circuits of IC202(COFDM)/ IC4001(D-Processor).
and (13) of IC204 (COFDM).
YES
NO
Does X202 oscillate? Check peripheral circuits of X202.
YES
Check IC202(COFDM)/IC4001(D-Processor).
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<When EXT1 is used for external input> No picture on the display (3) LC-32/37BT8E/RU
Troubleshooting
No EXT1-Composite outputTable (continued)
of the external No EXT1-RGB output of the external input No EXT1-Y/C output of the external input
input system. system. system.
Checklist: No video output during DTV reception. Colors of Images are not right.
1) Is "INPUT SOURCE" button on the remote control set up correctly? ··· See the operation manual and set "INPUT SOURCE" to "EXT1".
2) Is MENU-PICTURE-CONTRAST/BRIGHTNESS set to "MIN"? ··· Set it to an appropriate level.
D-TUNER UNIT:
3) Check the connection to the external device ··· Connect it correctly NO
as per the operation manual for the device.
Is data FED[0:7] sent from pins (3),(4),(5),(6),(8),(9),(10) and (11) Check R272 and R273.
of P202?
Is composite video YES
Check external Is RGB signal sent Check external Is Y/C signal sent Check external
signal
DIGITALsent to pin NO
UNIT: connection, input to pins (15), (11) NO connection, input to pins (20) and NO connection, input
NO
(20) of SCART1
Are video setting,
signals (R/G/B,CVBS) SCART1
sent from and (7) of SCART1 setting,Check
SCART1 (15) of SCART1 and IC4001(D-Processor).
R4011(AC8pin),R4013(AC9pin) setting, SCART1
(J1101)?
C4639/C4640/C4641/C4625? (J1101) and (J1101)? (J1101) and (J1101)? (J1101) and
YES peripheral circuits. peripheral circuits. peripheral circuits.
YES YES YES
Are video signals (R/G/B,CVBS) send from the NO
Check Q4601... Q4607 and their peripheral circuits.
Is composite video and emitters
C4636/C4637/C4638 Check of Q4607? Is RGB signal Check Is Y/C signal Check
signal (VIN_1) NO CONNECTOR (R1/G1/B1=VIN_6/ NO CONNECTOR (VIN1=Y1/C1) sent NO CONNECTOR
sent to input YES
(SC2702/P1101), 5/9) sent to input (SC2702/P1101), to input terminal (SC2702/P1101),
terminal
MAIN UNIT:pin (6) of SCART1 (J1101) terminal pins NO SCART1 (J1101) pins (190) and SCART1 (J1101)
IC2702 Check power supply and pin (1) of IC2705(SW).
Is video(SW)?
signal (CVBS) sentand
fromperipheral (187), (175) and
pin (2) of IC2705(SW). and peripheral (187) of IC3002 and peripheral
circuits. (182) of IC3002 circuits. (VCT)? circuits.
YES (VCT)?
YES YES
Are video signals (R/G/B,CVBS) fed from pins (179),(180),(181) YES
Is
andcomposite video
(184) of IC3002? Check IC2702
signal NO (SW) andYES
(CVBS1=VIN2)
sent to input DIGITAL UNIT:
terminal pin (190) YES
Are scrambled images not displayed? Check 5V output of pin (1) of IC4702.
of IC3002 (VCT)? Check 5V of pin (6) of Q4401.
YES NO
Is LVDS signal (LVDS_0N/0P-3N/3P) sent from pins (141) and (140) - (129) and (128) of IC3002 NO Check pins (192), (170) and (133) of BU3.3V
(VCTP), and is CLK signal (LVDS_CN/CP) sent from pins (132) and (131)? power line and pins (185), (169) and (142) of
BU1.8V power line of IC3002 (VCTP), and
YES
Is LVDS signal (LVDS_0N/0P-3N/3P) sent to pins (12) and (13) - (24) and (25) of CONNECTOR NO Check CONNECTOR (P2305, CN1) and
CN1 in LCD-CONT-UNIT, and is CLK signal (LVDS_CN/CP) sent to pins (21) and (22)? Harness Wire (LV).
YES
No audio output
Is power (LCD5V) supplied to pins (2) – (5) of CONNECTOR CN1 induring DTV reception. Sound is NO
LCD-CONT-UNIT? low. Is LCD5V supplied to pins (31) - (28) of
CONNECTOR (P2305)?
YES
DIGITAL UNIT: NO NO YES
Check R4002(AD2pin) and IC4001(D-Processor).
Is audio signal fed to pins (5) and (10) of IC4604 (OP-AMP)?
Replace LCD-CONT-UNIT.
YES
NO
Is audio signal sent from pins (7) and (8) of IC4604(OP-AMP)? Check power supply of IC4604(OP-AMP) and its peripheral circuits.
YES YES
Check IC1705 and peripheral parts. Is IC1705 supplying LCD 5V? Check HARNESSWIRE (LV).
MAIN UNIT: NO Check power supply and pins (9) and (10)of IC2704(SW) and
Is audio signal sent to pin (3) and (13) of IC2704 (SW)? NO (11) of IC2704.
audio signal input of pins (4) and
YES Change IC1705.
34
31
46
m pin (6) of SCART1 from pin (27) of SCART2 sent from pin (3) of sent from J2702 to pin sent from J2701 to pin
minal (J1101) to pin terminal (J1101) to pin J1201 terminal to pin (15) of IC2704? (14) of IC2704?
) of IC3002 (VCT)?
N1-R audio signal sent
(12) of IC3002 (VCT)?
Is IN2-R audio signal sent
(16) of IC3002?
Is IN3-R audio signal
Is D-SUB-R audio signal
sent from J2702 to pin
Is HDMI-R audio signal
sent from J2701 to pin
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m pin (2) of SCART1 from pin (23) of SCART2 sent from pin (5) of (2) of IC2704? (5) of IC2704? LC-32GA5E
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minal (J1101) to pin terminal (J1101) to pin J1201 terminal to pin
YES YES
) of IC3002 (VCT)? (11) of IC3002 (VCT)? (15) of IC3002?
YES NOTroubleshooting
YES Table
NO (continued)
YES NO
Check pins (6) and Check pins (27) and Check pins 3 Is D-SUB-L audio signal Is HDMI-L audio
(2) of SCART1 and (23) of SCART2 and (J1201) and 5 sent to pin (10) of signal sent to pin
connection to an connection to an (J1201) of EXT3
No audio reception. Sound is low.YES (10) of IC3002?
IC3002?
output during DTV
external input external input and connection to Is D-SUB-R audio signal Is HDMI-R audio
device. device. an external input sent to pin (9) of signal sent to pin (9)
DIGITAL UNIT: device. NO IC3002? of IC3002?
Check R4002(AD2pin) and IC4001(D-Processor).
Is audio signal fed to pins (5) and (10) of IC4604 (OP-AMP)? YES NO
YES Check output of pins
NO (13) and (3) of
Is audio signal sent from pins (7) and (8) of IC4604(OP-AMP)? Check power supply of IC4604(OP-AMP)
IC2704 and and its peripheral circuits.
YES
MAIN UNIT: NO Check power supply and pins (9) and (10)of IC2704(SW) and
Check that Option-
Is audio signal sent to pin (3) and (13) of IC2704 (SW)? OK audio signal input of pins (4) and (11) of IC2704.
HDMI Setup-Audio
YES select is set to
"Analog".
Is the audio signal NO Check IC3002 or
properly sent from pins peripheral circuits.
(28) and (27) of IC3002?
YES
Is the audio signal of NO Check IC303 or
pins (1) and (7) of IC303 peripheral circuits.
(OP-AMP) sent properly?
YES
Is the audio output Check IC302/IC301
NO
signal of pins (13) and (MAIN-AMP),
(16) of IC302/IC301 HEADPHONE and
(MAIN-AMP) normal? peripheral circuits.
YES
Check CONNECTOR
(P301) and Speaker
(right and left).
31
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<On input of the tuner> (U/V)> No picture on the display (1)
No picture appears on LCD during the tuner reception.(U/V) reception.
Checklist:
1) Is "INPUT SOURCE" button on the remote control set up correctly? ··· See the operation manual and set "INPUT SOURCE" to "TV".
2) Is MENU-PICTURE-Contrast/Brightness set to "MIN"? ··· Set it to an appropriate level.
YES
Is level of pins (4) and (5) of These are communications
NO
tuner (TU201) and pins (10) lines for control (I2C). Follow
and (11) of IC201 (IF- the path and check whether
DEMOD) at H? they are forced to L
YES (PULL_DOWN).
Is the video signal (IF) sent NO Check the tuner (TU201)

from pin (8) of tuner
and peripheral circuits.
(TU201)?
YES
Check FL201 (SAW-FIL),
Is video signal sent from pin NO
IC201 and peripheral
(17) of IC201 (IF-DEMOD)?
circuits.
YES
Is the video signal VIN1 Check IC201 (IF-DEMOD),
NO
(ATUNER-CVBS) sent to pin CONNECTOR
(191) of IC3002 (VCT)? (P201/SC2705) and
YES peripheral circuits.
Is LVDS video signal (LVDS_0N/0P-3N/3P) sent to pins NO Check pins (192)/(170)/(133) of BU3.3V line of IC3002 (VCTP),
(141)/(140) - (129)/(128) of IC3002 (VCTP), and is CLK signal pins (185)/(169)/(142) of 1.8V line and peripheral circuits.
(LVDS_CN/CP) sent to pins (132)/(131)?
YES
Is LVDS video signal (LVDS_0N/0P-3N/3P) sent to pins (12)/(13) - NO
Check CONNECTOR (P2305, CN1) and HARNESSWIRE (LV).
(24)/(25) of CONNECTOR CN1 of LCD-CONT-UNIT, and is CLK
signal (LVDS_CN/CP) sent to pins (21)/(22)?
YES
Is power (LCD5V) supplied to pins (2) – (5) of CONNECTOR CN1 NO Is LCD5V supplied to pins (31) – (28) of CONNECTOR (P2305)?
in LCD-CONT-UNIT?
YES
NO YES
YES
Check IC1705 and peripheral parts. Is IC 1705 supplying LCD 5V? Check HARNESSWIRE (LV).
NO
Change IC1705.
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<During external connection> No picture on the monitor (2)
SCART1: SCART2: SCART2:

No picture appears on EXT1-connected No picture from EXT1 appears on EXT2- No picture from EXT3 appears on EXT2-
monitor during the tuner reception. connected monitor. connected monitor.
Note: Normally, if the screen during display is
sent to EXT2, no picture is sent to EXT2.
Checklist:
1) Are input terminal on back of TV and "INPUT SOURCE" button on the remote control set up correctly? ··· See the operation manual and set
"INPUT SOURCE" appropriately.
2) Is the Signal Type (item) in MENU-Option-Input Select set to the same as that of the external device? ··· Set it to "CVBS", "Y/C" or "RGB".
4) The picture is sent to the monitor in a CVBS signal if the source during display is TV, CVBS or Y/C of EXT1-3. When sent by component, etc., that
signal is not sent to the monitor.
5) When the monitor picture is not sent and is not displayed on the monitor, refer to “No picture” for each terminal.
6) The video output from EXT1 is not the monitor output (output of the picture now watching). The picture of the last selected TV channel is always sent to
EXT1. (Specification)
Check SCART1, Check SCART2, Check SCART2,

Is video signal Is video signal Is video signal
external external external
sent to pin (19) of YES sent to pin (40) of
YES sent to pin (40) of YES
connection or input connection or input connection or input
SCART1 (J1101)? SCART2 (J1101)? SCART2 (J1101)?
setting. setting. setting.
NO NO NO
Is video signal (V- Is video signal (V- Is video signal (V-
Check SCART1 Check SCART2 Check SCART2
OUT1) sent from YES OUT2) sent from YES OUT2) sent from YES
(J1101) and (J1101) and (J1101) and
pin (2) of IC1102 pin (2) of IC1101 pin (2) of IC1101
peripheral circuits. peripheral circuits. peripheral circuits.
(SW)? (SW)? (SW)?
NO NO NO
Is video signal (V- Check IC1102 Is video signal (V- Check IC1101 Is video signal (V- Check IC1101
OUT1) sent from YES (SW), Connector OUT2) sent from YES (SW), Connector OUT2) sent from YES (SW), Connector
pin (195) of (P1101, SC2702) pin (194) of (P1102, SC2703) pin (194) of (P1102, SC2703)
IC3002 (VCT)? and peripheral IC3002 (VCT)? and peripheral IC3002 (VCT)? and peripheral
circuits. circuits. circuits.
NO NO NO
Is video signal Check power Is video signal Check power Is video signal Check power
(CVBS) sent to pin YES supply of IC1102 (VIN1) from EXT1 YES supply of IC1101 (VIN7) from EXT3 YES supply of IC1101
(191) of IC3002 (SW), Connector sent to pin (190) of (SW), Connector sent to pin (184) of (SW), Connector
(VCT)? (P1101, SC2702) IC3002 (VCT)? (P1102, SC2703) IC3002 (VCT)? (P1102, SC2703)
and peripheral and peripheral and peripheral
NO NO NO
Is video signal Check Check whether Check SCART1, Is video signal Check pin (184) of
(CVBS) sent from YES CONNECTOR video signal is sent YES IC2702 (SW), (IN3YV) sent to pin YES IC3002 (VCT),
pin (17) of IC201 (P201, SC2705) and to pin (20) of CONNECTOR (2) of IC1201 CONNECTOR
(IF-DEMOD)? peripheral circuits. SCART1. (SC2702, P1101) (SW)? (SC2703, P1102)
and peripheral and peripheral
NO NO NO
circuits. circuits.
Check IC201,
Is video signal (IF)
FL201 (SAW-FIL),
sent from pin (8) of YES
Q202 and Check SCART1, Is video signal Check pin (1)
tuner (TU201)?
peripheral circuits. external (CVBS) sent from YES (IN3SW) of IC1201
NO connection or input pin (1) of A/V- (SW), power
setting. TERMINAL supply and
Check 5/5 (CONT) V power supply pins (7) (J1201)? (EXT3) peripheral circuits.
and (1), I2C line pins (5) and (4) of tuner
(TU201) and peripheral circuits. NO
Check A/V-
TERMINAL
(J1201), external
connection or input
setting.
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<When EXT1 is used for external input> No picture on the display (3)
No EXT1-Composite output of the external No EXT1-RGB output of the external input No EXT1-Y/C output of the external input
Checklist:
3) Check the connection to the external device ··· Connect it correctly as per the operation manual for the device.
Is composite video Check external Is RGB signal sent Check external Is Y/C signal sent Check external
signal sent to pin NO connection, input to pins (15), (11) NO connection, input to pins (20) and NO connection, input
(20) of SCART1 setting, SCART1 and (7) of SCART1 setting, SCART1 (15) of SCART1 setting, SCART1
(J1101)? (J1101) and (J1101)? (J1101) and (J1101)? (J1101) and
YES YES
Is composite video Check Is RGB signal Check Is Y/C signal Check

signal (VIN_1) NO CONNECTOR (R1/G1/B1=VIN_6/ NO CONNECTOR (VIN1=Y1/C1) sent NO CONNECTOR
sent to input (SC2702/P1101), 5/9) sent to input (SC2702/P1101), to input terminal (SC2702/P1101),
terminal pin (6) of SCART1 (J1101) terminal pins SCART1 (J1101) pins (190) and SCART1 (J1101)
IC2702 (SW)? and peripheral (187), (175) and and peripheral (187) of IC3002 and peripheral
(VCT)?
YES YES
Check IC2702
signal NO (SW) and
(CVBS1=VIN2)
sent to input
terminal pin (190)
of IC3002 (VCT)?
YES
YES
YES
NO Is LCD5V supplied to pins (31) - (28) of
Is power (LCD5V) supplied to pins (2) – (5) of CONNECTOR CN1 in LCD-CONT-UNIT?
CONNECTOR (P2305)?
YES
NO YES
YES
NO
Change IC1705.
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No EXT2-Composite output of the external No EXT2-RGB output of the external input No EXT2-Y/C output of the external input
Checklist:
Is composite video Check external Is RGB signal sent Check external Is Y/C signal sent Check external
signal sent to pin NO connection, input to pins (36), (32) NO connection, input to pins (41) and NO connection, input
(41) of SCART2 setting, SCART2 and (28) of setting, SCART2 (36) of SCART2 setting, SCART2
(J1101)? (J1101) and SCART2 (J1101)? (J1101) and (J1101)? (J1101) and
YES YES
Is composite video Check Is RGB signal Check Is Y/C signal Check

signal (VIN_2) NO CONNECTOR (R2/G2/B2=VIN_1 NO CONNECTOR (VIN2=Y2/C2) sent NO CONNECTOR
sent to input (SC2702/P1101), 5/16/17) sent to (SC2702/P1101), to input terminal (SC2702/P1101),
terminal pin (4) of SCART2 (J1101) input terminal pins SCART2 (J1101) pins (190) and SCART2 (J1101)
IC2702 (SW)? and peripheral (178), (177) and and peripheral (178) of IC3002 and peripheral
(VCT)?
YES YES
Check IC2702
signal NO (SW) and
(CVBS2=VIN2)
sent to input
terminal pin (190)
of IC3002 (VCT)?
YES
YES
YES
NO Is LCD5V supplied to pins (31) - (28) of
CONNECTOR (P2305)?
YES
NO YES
YES
NO
Change IC1705.
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No EXT3 output of the external No EXT3-Y/C output of the

input system. external input system.
Checklist:
YES YES
Is composite video signal sent to NO Check external connection, Is Y/C signal sent to pins (11) NO Check external connection,
pin (1) of A/V-IN-TERMINAL input setting, A/V-IN-TERMINAL and (7) of S-TERMINAL input setting, S-TERMINAL
(J1201)? (J1201) and peripheral circuits. (J1201)? (J1201) and peripheral circuits.
YES YES
Is composite video signal (IN3- NO Check A/V-IN-TERMINAL Is Y3 signal (IN3-Y) sent to input NO Check S-TERMINAL (J1201)
CVBS) sent to input terminal pin (J1201) and peripheral circuits. terminal pin (6) of IC1201 (SW)? and peripheral circuits.
(4) of IC1201 (SW)?
YES
YES
Is composite video signal NO Check CONNECTOR Is Y/C signal (VIN7/VIN8) sent to NO Check CONNECTOR
(CVBS=VIN7) sent to input (SC2703/P1102), IC3002 (VCT) input terminal pins (184) and (SC2703/P1102), IC3002 (VCT)
terminal pin (184) of IC3002 and peripheral circuits. (183) of IC3002 (VCT)? and peripheral circuits.
(VCT)? YES
YES
Is LVDS signal (LVDS_0N/0P-3N/3P) sent from pins (141) and (140) - (129) and (128) of IC3002 (VCTP), and is NO Check pins (192), (170) and
CLK signal (LVDS_CN/CP) sent from pins (132) and (131)? (133) of BU3.3V power line and
pins (185), (169) and (142) of
YES
BU1.8V power line of IC3002
(VCTP), and peripheral circuits.
Is LVDS signal (LVDS_0N/0P-3N/3P) sent to pins (12) and (13) - (24) and (25) of CONNECTOR CN1 in LCD- NO Check CONNECTOR (P2305,
CONT-UNIT, and is CLK signal (LVDS_CN/CP) sent to pins (21) and (22)? CN1) and Harness Wire (LV).
YES
NO Is LCD5V supplied to pins (31) -

(28) of CONNECTOR (P2305)?
YES NO YES
YES
NO
Change IC1705.
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No EXT4 (15pin-D-SUB-terminal)
output of the external input system.
Checklist:
2) Connect the included D-SUB-Adapter-Cable to the COMPONENT terminal of an external device. ··· See the operation manual (use a commercially
available Component-Cable to connect to the external device).
YES
Is "EXT4" selected with NO Select "EXT4" with button
button on the remote control? on the remote control.
YES
Is D-SUB-COMPONENT signal NO Check D-SUB-adaptor and
(PCV_R/G/B) sent to pins (1), external connection.
(2) and (3) of EXT4-TERMINAL
(SC2303)?
YES
Is D-SUB-COMPONENT signal NO Check EXT4-TERMINAL and
(PCV_R/G/B=VIN19/20/21)) peripheral circuits.
sent to pins (174), (173) and
(172) of IC3002 (VCT)?
YES
pins (185), (169) and (142) of
YES
CONT-UNIT, and is CLK signal (LVDS_CN/CP) sent to pins (21) and (22)? CN1) and Hareness Wire (LV).
YES

YES NO YES
YES
NO
Change IC1705.
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No EXT5 (HDMI) output of the

external input system.
Checklist:
2) Have you checked the type of video signal sent from HDMI-connected external device? ··· Confirm the type (it should be "RGB", "YCbCr 4:4:4" or
"YCbCr 4:2:2").
3) Have you checked the type of Colour Matrix sent from HDMI-connected external device? ··· Confirm the type (it should be “ITU601’ or “ITU709”.)
YES
Is "EXT5" selected with NO Select "EXT5" with button
button on the remote control? on the remote control.
YES
Is the type of video signal NO From MENU-Option-HDMI
(Signal Type) from HDMI- Setup-Signal Type, select a
connected external device set? signal type ("RGB", "YCbCr
YES 4:4:4" or "YCbCr 4:2:2").
Is the type of colour signal NO From Option-HDMI Setup-

(Colour Matrix) from HDMI- Colour Matrix, select a color
connected external device set? signal type ("AUTO", "ITU601"
or "ITU709").
YES
Is TMDS data (RX`± signal) NO Is I2C signal (SDA/SCL signal)

sent to pins (1) – (12) of EXT5 sent to pins (16) and (15) of
(HDMI) terminal (SC1901)? EXT5 (HDMI) terminal? Check
YES external connection and
Is 8bit-DIGITAL signal (HDMI- NO Check power supply (3.3/1.8V)

R/G/B) sent from pins (110) – pins (99) and (74) of IC1905,
(144) of IC1905 (HDMI- SDA/SCL signal pins (29) and
RECEIVER)? (30), and peripheral circuits.
YES
Is 8bit-DIGITAL signal (HDMI- NO Check SDA3/SCL3 signal pins
R/G/B) sent to pins (73) – (50) of (27) and (28), interface between
IC3002 (VCT)? IC1905 and IC3002, and
YES peripheral circuits.
pins (185), (169) and (142) of
YES
CONT-UNIT, and is CLK signal (LVDS_CN/CP) sent to pins (21) and (22)? CN1) and Hareness Wire (LV).
YES

YES YES
NO
YES
NO
Change IC1705.
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<32”> Backlight failure to light up
Do all the fluorescent tubes light up? NO Check the individual fluorescent YES Replace any defective fluorescent
tubes for light-up failure. tube (s) with new one (s).
YES
Is the power supplied to CP3 on the NO Check the connection between

inverter unit? power unit and inverter unit.
YES
Replace the blown-out CP4/CP3/CP1

Check T1-T8 and their peripheral
Is the CP4/CP3/CP1 fuse in the NO fuse on the inverter unit. Turn on the YES
circuits as well as Q16-Q19 and their
inverter unit circuit functioning? power again. If the fuse gets blown out
again, check the short-circuited spot.
YES
Is the VCC power supplied to the NO Check the circuit connected with the
inverter control IC (IC1) on the VCC terminal on the inverter control
inverter unit? IC (IC1).
YES
Are there control signals (INV-ON, NO Are there the INV-ON and INV-BRT NO Check pins (5) and (7) of IC1710
INV-BRT, PWM-SEL) at CN3 on the signals at P704 on the power unit, (main PWB).
inverter unit? and the (INV-ON and INV-BRT)
YES signals at SC1702 on the main PWB?
Is the specified control signal NO Check the line between CN3 and
inputted at IC1 (INV-CTL) on the IC1.
inverter unit?
YES
Are the Q16-Q19 transistors at the NO Replace IC1 (INV-CTL) or check its
primary side of T1 functioning? peripheral circuits.
YES
NO Replace the T1-T8 transformer for

Is the secondary circuit of T1-T8
the fluorescent tubes, or check their
functioning?
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<37”> Backlight failure to light up
Do all the fluorescent tubes light up? NO Check the individual fluorescent YES Replace any defective fluorescent
tubes for light-up failure. tube (s) with new one (s).
YES
Is the power supplied to CN7501 on NO Check the connection between

the inverter unit? power unit and inverter unit.
YES
Replace the blown-out F7501 fuse on Check T7501 and T7502 and their
Is the F7501 fuse in the inverter unit NO the inverter unit. Turn on the power YES
peripheral circuits as well as IC7501
circuit functioning? again. If the fuse gets blown out and their peripheral circuits.
again, check the short-circuited spot.
YES
Is the VCC power supplied to the NO Check the circuit connected with the
inverter control IC (IC7501) on the VCC terminal on the inverter control
inverter unit? IC (IC7501).
YES
Are there control signals (INV-OFL, NO Are there the INV-OFL, INV-OSC, NO Check pins (5), (7) and (8) of IC1710
INV-BRT, INV-OSC, INV-STB (ON)) INV-STB (ON/OFF) signals at P1701
(main PWB).
at CN7502 on the inverter unit? on the main PWB?
YES
Is the specified control signal NO Check the line between CN7502 and
inputted at IC7501 (INV-CTL) on the IC7501.
inverter unit?
YES
Are the Q7528 and Q7525 NO Replace IC7501 (INV-CTL) or check

transistors at the primary side of its peripheral circuits.
T7501 functioning?
YES
NO Replace T7501 or the T75**

Is the secondary circuit of T7501
transformer for the fluorescent tubes,
functioning?
or check their peripheral circuits.
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LCD failure
Does a single or several vertical stripes The backlight functions. Is there an

appear on the LCD screen? image on the LCD screen (screen not
black)?
Does a single or several horizontal Does the entire LCD screen look whitish
stripes appear on the LCD screen? all over?
Do luminescent or black dots appear on Does the QS drive function?

the screen?
Are there data bit drop-outs?

(No solution even when turning on and
Is the on-screen image rippling or off the QS drive)
distorted?
Is the gamma correction as specified?
Replace the LCD panel. Replace the LCD control unit.
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MAJOR ICs INFORMATION
1. General ICs Information
XD890WJ (MAIN UNIT):
· IC1905 : HDMI RECEIVER

Part number: Sii9021
Sharp code: VHISII9021+-1Q
The Sii9021 is a second generation panel link cinema receiver that is compatible with the HDMI 1.1 (High Definition
Multimedia Interface) specification. The Sii9021 is capable of receiving and outputting two channel digital audio sig-
nals at up to 192 kHz— an excellent solution for digital TVs.
This IC features the following.
1) Digital video interface supports video processors.
2) Analog RGB and YPbPr output: 10-bit DAC.
3) Digital audio interface supports high-end audio systems.
· IC1901: NVM OF HDMI (E-EDID)

Part number: 24LC2BIN
Sharp code: VHI24LC2BIN-1Y
This IC is a 2-wire (I2C bus type) serial EEPROM this is electrically programmable. This EEPROM chip stores the
data structure used to carry configuration information for optimal use of a display (EDID data).
· IC2701 : SYNC SELECT

Part number: TVHC153T
Sharp code: VHITVHC153T-1Y
This VHC153 is a high-speed Dual 4-input multiplexer with common select inputs and individual enable inputs for
each section.
· IC2704 : HDMI & RGB SOUND MULTIPLEXER

Part number: CD4052BP
Sharp code: VHICD4052BP-1Y
The TC74HC4052A is a high-speed CMOS analog multiplexer/demultiplexer backed by silicon gate CMOS technol-
ogy. The multiplexer function includes the selection and mixing of analog and digital signals. The chip consists of 4
channels (x 2). A digital signal through the control terminal turns on the switch of a corresponding channel.
· IC3002 : VIDEO PROCESSOR

Part number: VCTP
Sharp code: RH-IXB624WJN1Q
The VCT 6wxyP family is dedicated to high-quality FPD and double-scan TV sets. The memory and program ROM
are integrated in the IC. Modular design and deep submicron technology allow the integration of audio, video, tele-
text, OSD, and controller-related functionalities. They cover the whole range of flat-panel display TVs. The IC is
based on proven functional blocks of existing products like VCT 49xxI, VSP 94x5B, and DPS 94xxB.
Each member of the IC family contains the entire audio, video, upconversion processing for 4:3 and 16:9 50/60 Hz
progressive or 100/120 Hz interlaced stereo TV sets plus the control/data interface for flat-panel displays. The inte-
grated microcontroller is supported by a powerful OSD and graphics generator with integrated teletext acquisition.
The VCT 6wxyP family provides a front-end video processing unit with 4 CVBS-Y/C or component inputs for HDTV,
EDTV, and SDTV. A VBI slicer, support of 1000 pages of teletext, and a 3-D comb filter for PAL and NTSC (in certain
versions) are also available. The front-end unit further allows to process an SD and an HD source in parallel, thus
enabling PiP and PaP functionality. Motion-adaptive de-interlacing, temporal noise reduction, and film mode detec-
tion are based on a unified memory technology.
Post-scaling in the display processing block ensures the desired output format. Display processing is supported by
an 8-bit 8051-compatible controller. By means of powerful alpha-blending, the graphics mixer composes the output
image from following image layers: the video layer, the OSD layer and the pixel graphics layer.
The audio part consists of a multistandard sound IF demodulator and a baseband processor supporting all desired
sound features in this range.
A connection for additional features, such as advanced motion compensation via -Micronas’ FRC 94xyA, is also
provided.
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· IC2702 & IC2705: VIDEO INPUT SELECTOR.

Part number: MM1507XN
Sharp code: VHIMM1507XN-1Y
This IC extends the series of ICs for video/audio signal switching, with a
2-input 1-output single video switch with 75Ω driver and input clamp.
· IC3001 : NVM 64Kb-E2PROM

Part number: BR24L64F
Sharp code: VHIBR24L64F-1Y
The BR24L64F is a 2-wire (I2C bus type) serial EEPROM that is electrically programmable. This IC stores the control
data of system contents (last memory, for example) for the main microprocessor’s AV PWB and main PWB. The data
is given out by commands from the main microprocessor.
· IC3003 : PIC MICROCONTROLLER

Part number: PIC16F913
Sharp code: RH-IXB664WJZZY
28 Pin Flash-Based, 8 bit CMOS Microcontrollers with LCD Driver and nanoWatt Technology.
This IC is controlled via I2C and works how expander of ports. This IC has led control and include A/D converter.
· IC3005: RESET IC FOR VCTP (IC3002)

Part number: BU4215G
Sharp code: VHIBU4215G+-1Y
Low voltage detector IC with adjustable output delay. Standard detection
voltage = 1.5V
· IC2301 : RS-232 TRANSMITTERS/RECEIVERS

Part number: ISL83220
Sharp code: VHIISL83220-1Y
The ISL83220E is a 3.0V to 5.5V powered RS-232 transmitter/receiver,+/-15kV ESD protected, minimum data rate
250 kpbs.
· IC2303 : NVM OF PC MODE (EDID)

Part number: BR24C21F
Sharp code: VHIBR24C21F-1Y
This IC is a 2-wire (I2C bus type) serial EEPROM this is electrically programmable. This EEPROM chip stores the
data structure used to carry configuration information for optimal use of a display (EDID data).
· IC1701: POWER RESET OF +BU1.8V

Low voltage detector IC with adjustable output delay. Standard Detection Voltage = 3.9V
· IC1702: BU+3.3V (VOLTAGE INPUT: BU+5V)

Part number: PQ20WZ11
Sharp code: VHIPQ20WZ11-1Y
Low power-loss voltage regulators. Variable Output. Output current 1A. Built-in overcurrent, overheat protection func-
tions, ASO protection circuit.
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· IC1703: S+8V (VOLTAGE INPUT: POW+12V)

· IC1707: +3.3V (VOLTAGE INPUT: POW+5V)

· IC1708: +1.8V (VOLTAGE INPUT: POW+5V)

Part number: MP1410
Sharp code: VHIMP1410ES-1Y
DC to DC Converter. 2A Step down switch mode regulator with a built in internal Power Mosfet. Fault condition pro-
tection includes cycle-by-cycle current limiting and thermal shutdown.
· IC1706: BU+1.8V (VOLTAGE INPUT: BU+5V)

Part number: MP1410
Sharp code: VHIMP1410ES-1Y
DC to DC Converter. 2A Step down switch mode regulator with a built in internal Power Mosfet. Fault condition pro-
tection includes cycle-by-cycle current limiting and thermal shutdown.
· IC1710: CPLD
Part number: EPM240T
Sharp code: RH-IXB823WJZZQ
This IC is a CPLD of Altera MAXII family and use 240 logic elements (LEs) (192 equivalent macrocells)
MAX II devices offer high I/O counts, fast performance. MAX II devices are designed to reduce cost and power while
providing programmable solutions for applications such as bus bridging, I/O expansion, power-on reset (POR)
and sequencing control, and device configuration control.
This device controls ON/OFF power supply, signals for inverter unit and etc.
FD604WJ (AV UNIT):
· IC301 & IC302 : AUDIO AMPLIFIER

Part number: TDA8931T
Sharp code: VHITDA893T-1Y
The TDA8931 is a switching power stage for high efficiency class-D audio power amplifier systems. The IC has a high
efficiency so that a heat sink is not required up to 20W (RMS).
· IC303 : HEADPHONE AMPLIFIER

Part number: NJM4558M
Sharp code: VHINJM4558M-1Y
The NJM4558 is a dual high-gain operational amplifier internally compensated and constructed on a single silicon
chip using an advanced epitaxial process.
IC1101 & IC1102: SCART VIDEO OUTPUT DRIVER.

This IC extends the series of ICs for video/audio signal switching, with a 2-input 1-output single video switch with 75Ω
driver and input bias (6dB gain).
IC1201: VIDEO INPUT SELECTOR.

This IC extends the series of ICs for video/audio signal switching, with a 2-input 1-output single video switch with 75Ω
driver and input clamp.
60
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FD605WJ (POWER SUPPLY UNIT):
· IC704: POWER SUPPLY CONTROLLER FOR SIGNAL BOARD

Part number: MR4030
Sharp code: VHIMR4030++-1
A high speed 900V IGBT makes ideal partial resonance operation which ensures high efficiency and low noise.
Very low power consumption at micro-loads (burst mode).
Start-up circuit eliminates the need for start-up resistor.
Excess current protection (ON period limitation, primary current limitation), excess voltage protection, and thermal
shut-down function are incorporated.
· IC705: POWER SUPPLY CONTROLLER FOR INVERTER

Part number: MR4020
Sharp code: VHIMR4020++-1
A high speed 900V IGBT makes ideal partial resonance operation which ensures high efficiency and low noise.
Very low power consumption at micro-loads (burst mode).
Start-up circuit eliminates the need for start-up resistor.
Excess current protection (ON period limitation, primary current limitation), excess voltage protection, and thermal
shut-down function are incorporated.
· IC706 & IC707: FEEDBACK CONTROL

Part number: TA76431R
Sharp code: VHITA76431R-1Y
Adjustable precision shunt regulator for feedback control for driving an optocoupler in power supplies
IC708: LOW AC MAINS VOLTAGE DETECTOR.

The IC consists of two independent, high gain internally frequency compensated operation amplifiers which were
designed specifically to operate from single power supply.
IC709: +24V/+5V VOLTAGE SUPERVISOR.

The IC consist of two independent precision voltage comparator, high gain internally frequency compensated opera-
tion amplifiers which were designed specifically to operate from single power supply.
FD607WJ (RC/LED UNIT):
· IC101 : OPC
Part number: TPS850
Sharp code: VHITPS850++-1Y
The TPS850 is a linear-output photo-IC which incorporates a photodiode and current amp circuit in a single chip. This
photo-IC is current output type, so can set up output voltage freely by arbitrary load resistance.
FD609WJ (TUNER UNIT):
· IC201 : IF-Demodulator/PLL
Part number: TDA9886
Sharp code: VHITDA9886+-1Y
The TDA9886 is an alignment-free multi-standard (PAL, SECAM and NTSC) vision and sound IF signal PLL
demodulator for positive and negative modulation including sound AM and FM processing.
This IC features the following.
* Gain controlled wide-band vision intermediate frequency (VIF) amplifier (AC-coupled).
* Multi-standard true synchronous demodulation with active carrier regeneration (very linear demodulation,
good intermodulation figures reduced harmonics, excellent pulse response).
* Gate phase detector for L/L accent standard.
* Fully integrated VIF Voltage Controlled Oscillator (VCO), alignment-free; frequencies switchable for all
negative modulated standards via I2C bus.
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* 4MHz reference frequency input [signal from phase-locked loop (PLL) tuning system] or operating as crystal
oscillator.
* VIF Automatic Gain Control (AGC) detector for gain control operating as a peak sync detector for negative
modulated signals and as a peak white detector for positive modulated signals.
IC 202: COFDM DECODER.

Part number: STV0360C
The STV0360C is a COFDM ( codec orthogonal frequency division multiplex) demodulator that performs IF to MPEG-
2 block processing of OFDM carriers. It is intended for digital terrestrial receivers for compressed video, sound
and data services. It implements all the functions from the tuner IF output to the MPEG-2 transport stream input. The
STV0360C integrates an A/D converter that delivers the required performance to handle up to 64 QAM
carriers in a direct IF sampling architecture.
IC204: I2C BUS SELECTOR (TUNER CONTROLLED FROM VCTP OR COFDM DECODER).
Part number: SN74LV4053APWR
Sharp code: VHILV4053AT-1Y
The SN74LV4053APWR is a high-speed CMOS analog multiplexer/demultiplexer backed by silicon gate CMOS tech-
nology. The multiplexer function includes the selection and mixing of analog and digital signals. The chip include two
independent 3 channels selectors. A digital signal through the control terminal turns on the switch of a corresponding
channel.
KD628WJ (DIGITAL UNIT):
IC4001: DIGITAL PROCESSOR MPEG 1/2 DECODER (Audio/Video).

Part number: STI5516AUCL
The STi5516 is a device that integrates all of the back-end functions required for mainstream set-top boxes . These
include:
An enhanced ST20 32-bit RISC CPU with a 166MHz clock, 8Kbytes of instruction cache, 8Kbytes of data cache and
8Kbytes of embedded SRAM.
A 16-bit, 133MHz Shared Memory Interface, with support for 64- and 128-bit configurations.
A programmable External Memory Interface supporting six separately configurable banks of SRAM, Flash and
DRAM.
An MPEG-2 (MP@ML) decoder, including trick modes such as smooth fast-forward and rewind.
A Graphics/Display unit with five display panes, alpha blending, antialiasing and antiflutter filters, subpicture decoder,
and display compositor with separate OSD (On-Screen Display) controls for TV and VCR outputs.
PAL/NTSC/SECAM encoder.
Audio subsystem with embedded DSP for all popular audio formats.
A full range of on-chip peripherals, including five UARTs, six parallel I/O banks, two smart card interfaces, four PWM
channels, teletext serializer, multi-channel IR transmitter/receiver, and a modem analog front-end interface.
IC 4203: 16 Mbit Flash Memory (Program Memory).

Part number: MBM29LV160BE70TN
Sharp code: RH-IXA964WJN1
IC 4201 & IC 4202: 64Mbit SDRAM (Temporary Data).

Part number: KAS641632H-UC75
IC4204: NVM 64Kb-E2PROM FOR DIGITAL PROCESSOR (IC4001).

Part number: BR24L64F
Sharp code: VHIBR24L64F-1Y
The BR24L64F is a 2-wire (I2C bus type) serial EEPROM that is electrically programmable. This IC stores all data
related to the Digital Module (Channels, User settings, etc.).
IC4003: RESET ICs FOR DIGITAL PROCESSOR (IC4001).

Low voltage detector IC with adjustable output delay. Standard detection voltage = 2.8V.
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IC4402 & IC4405: OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS.
Part number: SN74LVC573APWR
Sharp code: VHILVC573AP-1Y
These devices feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance
loads. They are particularly suitable for implementing buffer registers, input/output (I/O) ports,
bidirectional bus drivers, and working registers. In this design additionally are isolating digital processor (IC4001)
from PCMCIA connector.
IC4401: LOW VOLTAGE OCTAL BUS TRANSCEIVER WITH 5V TOLERANT INPUTS AND
OUTPUTS.
Part number: TC74LCX245FS
Sharp code: VHICLCX245-2Y
The device is designed for working in 3.3V systems but could be used to interface to 5V supply environment for both
inputs and outputs. The direction of the data transmission is controlled by the level of the DIR
input. The OE input could be used to isolate the device of the busses (PCMCIA and Digital Processor).
IC4404: LOW VOLTAGE BUFFER / LINE DRIVER WITH 5V TOLERANT INPUTS AND
OUTPUTS.
Part number: 74LCX244AE
Sharp code: VHILCX244MT-1Y
The LCX244 contains eight non-inverting buffers with 3-STATE outputs. The device may be employed as a memory
address driver, clock driver and bus-oriented transmitter/receiver. The LCX244 is designed for low voltage
(2.5V or 3.3V) VCC applications with capability of interfacing to a 5V signal environment.
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2. Detailed ICs Information

SiI 9021    
2.1. IC1905 
(VHISII9021+-1Q)

2.1.1. Pinning
Pin Diagram








































































   
   
   
   
   
   
   
   
   
   
   
   
   
   
   




SiI 9021 



  144-Pin  
 
TQFP  
   
  (Top View)  
   
   
   
   
   
   
   
   
   
   
   
   
   
   
   
SiI 9021    
 








































































Functional Description
 SiI 9021              
     Figure 1. 9021
 SiI Pin Diagram
        
2.1.2. Block Diagram                
    
    
   
 

     

  
     
 
  
 
  
PanelLink 
 
 TMDS   
 

  


 
SiliconImage Confidential
 
 
SiI-DS-0117  




For
 

 
  


 
 
Sharp

 
 
  
Internal use Only

 

  
  
 

PanelLink 

 
 TMDS  
 

 


 
  



 
 
Figure 3. Functional Block Diagram

The SiI 9021 supports two HDMI input ports. Only one port may be active at any time.
 SiI 9021              
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2.2. IC3002 (RH-IXD624WJN1Q)

ADVANCE INFORMATION VCT 69xyP
2.2.1. Pin Connections and Short Description
Volume 1: General Description
3.12.Pin Connections and Short Description IN = Input Pin

ANA = Analog Pin
NC = not connected OUT = Output Pin
LV = if not used, leave vacant SUPPLY = Supply Pin
OBL = obligatory; connect as described in circuit
diagram
VCTP Pin No. Pin Name Type Connection Short Description

PLQFP (If not used)
208-1
1 656O6 IN/OUT LV Digital 656 Bit 6 Output

P4_6 Port 4, Bit 6 Input/Output
TDOFW JTAG Interface Data Output (firmw. Controler)

TDIFW JTAG Interface Data Input (firmw. Controler)

TMSFW JTAG Interface Mode Select Input (fw. Contr.)

TCLK JTAG Interface Clock Input (TV Controler)
TDO JTAG Interface Data Output (TV Controler)

TDI JTAG Interface Data Input (TV Controler)
7 656O0 IN/OUT LV Digital 656 Bit 0 Output (LSB)

TMS JTAG Interface Mode Select Input (TV Contr.)
8 RESETQ IN/OUT OBL Reset Input/Output
9 AIN1R IN GND Analog Audio 1 Input, Right
10 AIN1L IN GND Analog Audio 1 Input, Left
17 VREFAU ANA OBL Reference Voltage, Audio
18 VSUP8.0AU SUPPLY OBL Supply Voltage Analog Audio, 8.0 V
19 GNDA SUPPLY OBL Ground Analog Audio, Platform Ground
20 SGND ANA OBL Analog Signal GND
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ADVANCE INFORMATION

2.2.1. Pin Connections and Short Description (Continued)

PLQFP (If not used)
208-1
21 AOUT2R IN/OUT LV Analog Audio 2 Output, Right

AIN5R Analog Audio 5 Input, Right
22 AOUT2L IN/OUT LV Analog Audio 2 Output, Left

AIN5L Analog Audio 5 Input, Left
23 AOUT1R OUT LV Analog Audio 1 Output, Right
24 AOUT1L OUT LV Analog Audio 1 Output, Left
25 HEADPHONER OUT LV Analog Headphone Output, Right
26 HEADPHONEL OUT LV Analog Headphone Output, Left
27 SPEAKERR OUT LV Analog Loudspeaker Output, Right
28 SPEAKERL OUT LV Analog Loudspeaker Output, Left
29 SUBWOOFER IN/OUT LV Analog SUBWOOFER Output

TEST Test Input
30 VREFSIF ANA OBL Reference Voltage, Audio SIF
31 SIFIN+ IN VREFIF Differential IF Input
32 SIFIN- IN VREFIF Differential IF Input
33 VSUP5.0SIF SUPPLY OBL Supply Voltage Analog SIF, 5.0 V
34 GNDA SUPPLY OBL Ground Analog SIF, Platform Ground
35 GND3.3DIG SUPPLY OBL Ground Digital Audio Core
36 VSUP3.3DIG SUPPLY OBL Supply Voltage Digital Audio Core, 3.3 V
37 SPDIF_OUT OUT LV SPDIF Output
38 I2S_DA_IN IN LV Audio Bus Data Input
39 I2S_CL IN LV Audio Bus Clock Input
40 I2S_WS IN LV Audio Bus Word Strobe Input
41 I2S_DEL_OUT OUT LV Audio Delay Line Bus Data Output
42 I2S_DEL_IN IN LV Audio Delay Line Bus Data Input
43 I2S_DEL_CL OUT LV Audio Delay Line Bus Clock Output
44 I2S_DEL_WS OUT LV Audio Delay Line Bus Word Strobe Output
45 VSUP3.3RAM SUPPLY OBL Supply Voltage Ram, 3.3 V
46 GND3.3RAM SUPPLY OBL Ground Ram
47 DVS IN LV Digital or Analog Video VSYNC HD Input
48 DEN IN LV Digital Video Enable Input
49 DCLK IN LV Digital Video Clock Input
50 DRI7 IN LV Digital Video Red 7 Input
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Volume 1: General
2.2.1. Pin Connections Description
and Short Description (Continued)

PLQFP (If not used)
208-1
57 DRI0 IN LV Digital Video Red 0 Input (LSB)
58 DGI7 IN LV Digital Video Green 7 Input
65 DGI0 IN LV Digital Video Green 0 Input (LSB)
66 DBI7 IN LV Digital Video Blue 7 Input
73 DBI0 IN LV Digital Video Blue 0 Input (LSB)
74 GND3.3DRI SUPPLY OBL Ground Digital Ram Interface
75 VSUP3.3DRI SUPPLY OBL Supply Voltage Digital Ram Interface, 3.3 V
76 GND3.3COM SUPPLY OBL Ground Common
77 VSUP3.3COM SUPPLY OBL Supply Voltage Common, 3.3V
78 XTALIN IN OBL Analog Crystal Input
79 XTALOUT OUT OBL Analog Crystal Output
80 CLKOUT OUT LV Digital 20MHz Clock Output
81 VSO OUT LV Vertical Sync Output, Frontend
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PLQFP (If not used)
208-1
82 HSO OUT LV Horizontal Sync Output, Frontend
83 SCL IN/OUT OBL I2C Bus Clock Input/Output
84 SDA IN/OUT OBL I2C Bus Data Input/Output
85 GND3.3FL SUPPLY OBL Ground Flash
86 VSUP3.3FL SUPPLY OBL Supply Voltage Flash, 3.3 V
87 P2_0 IN/OUT LV Port 2, Bit 0 Input/Output

TDI JTAG Interface Data Input

TMS JTAG Interface Mode Select Input
93 OSDV IN/OUT LV Graphic Vertical Sync Input/Output

DBO2_0 Channel 2 Digital 0 Blue Output (LSB)
94 OSDH IN/OUT LV Graphic Horizontal Sync Input/Output

DBO2_1 Channel 2 Digital 1 Blue Output
95 GND3.3IO1 SUPPLY OBL Ground Digital Input/Output Port 1
96 VSUP3.3IO1 SUPPLY OBL Supply Voltage Input/Output Port 1, 3.3 V
97 OSDCLK IN/OUT LV Graphic Clock Input/Output

98 OSDFSW IN/OUT LV Graphic Fast Switch Input/Output

99 OSDHCS1 IN/OUT LV Graphic Half Contrast 1 Input/Output

100 OSDHCS0 IN/OUT LV Graphic Half Contrast 0 Input/Output (LSB)

101 OSDB3 IN/OUT LV Graphic Blue 3 Input/Output (MSB)

102 OSDB2 IN/OUT LV Graphic Blue 2 Input/Output

DBO2_7 Channel 2 Digital 7 Blue Output (MSB)

DGO2_0 Channel 2 Digital 0 Green Output (LSB)

DGO2_1 Channel 2 Digital 1 Green Output
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LC-32GA5E

PLQFP (If not used)
208-1
105 OSDG3 IN/OUT LV Graphic Green 3 Input/Output (MSB)

106 OSDG2 IN/OUT LV Graphic Green 2 Input/Output



109 OSDR3 IN/OUT LV Graphic Red 3 Input/Output (MSB)

110 OSDR2 IN/OUT LV Graphic Red 2 Input/Output

DGO2_7 Channel 2 Digital 7 Green Output (MSB)
111 OSDR1 IN/OUT LV Graphic Red 1 Input/Output

DRO2_0 Channel 2 Digital 0 Red Output (LSB)
112 OSDR0 IN/OUT LV Graphic Red 0 Input/Output (LSB)

DRO2_1 Channel 2 Digital 1 Red Output
115 PCS5 IN/OUT LV Flat Panel Control Select 5 PWM Output

116 PCS4 IN/OUT LV Flat Panel Control Select 4 REV Output
117 PCS3 IN/OUT LV Flat Panel Control Select 3 DE2 Output

118 PCS2 IN/OUT LV Flat Panel Control Select 2 DE1 Output

119 PCS1 IN/OUT LV Flat Panel Control Select 1 V Output

120 PCS0 IN/OUT LV Flat Panel Control Select 0 H Output
121 PCLK2 OUT LV Flat Panel Control Clock 2 Output
122 PCLK1 OUT LV Flat Panel Control Clock 1 Output
123 GND1.8DIG SUPPLY OBL Ground Digital Core
124 VSUP1.8DIG SUPPLY OBL Supply Voltage Digital Core, 1.8 V
125 DBO1_0 OUT LV Channel 1 Digital 0 Blue Output1) (LSB)

DRO2_2 Channel 2 Digital 2 Red Output1)
LVDSA_4P LVDS Channel 1 bit 4 Positive Output2)
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PLQFP (If not used)
208-1
126 DBO1_1 OUT LV Channel 1 Digital 1 Blue Output1)

LVDSA_4N LVDS Channel 1 bit 4 Negative Output2)

VSUP3.3LVDS SUPPLY OBL Supply Digital Voltage LVDS2) Port, 3.3 V


DRO2_7 Channel 2 Digital 7 Red Output1) (MSB)
GND3.3LVDS SUPPLY OBL Ground Digital LVDS2), 3.3 V
DBO1_0 Channel 1 Digital 0 Blue Output1) (LSB)
LVDSA_CLKP LVDS Channel 1 Clock Positive Output2)

DBO1_1 Channel 1 Digital 1 Blue Output1)
LVDSA_CLKN LVDS Channel 1 Clock Negative Output2)
133 VSUP3.3IO2 SUPPLY OBL Supply Digital Output1) Port 2

VSUP3.3LVDS Supply Digital Voltage LVDS2), 3.3 V
134 GND3.3IO2 SUPPLY OBL Ground Voltage Output1) Port 2, 3.3 V
LVDSA_2P OUT LV LVDS Channel 1 bit 2 Positive Output2)

136 DBO1_9 OUT LV Channel 1 Digital 9 Blue Output1) (MSB)
137 DGO1_0 OUT LV Channel 1 Digital 0 Green Output1) (LSB)

138 DGO1_1 OUT LV Channel 1 Digital 1 Green Output1)

VSUP3.3LVDS SUPPLY OBL Supply Digital Voltage LVDS2), 3.3 V

DBO1_7 Channel 1 Digital 7 Blue Output1) (MSB)
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PLQFP (If not used)
208-1

DGO1_0 Channel 1 Digital 0 Green Output1) (LSB)

DGO1_1 Channel 1 Digital 1 Green Output1)
VSUP1.8LVDS SUPPLY OBL Supply Analog Voltage LVDS2), 1.8 V

REXT ANA OBL LVDS External Resistor2)
GND1.8LVDS SUPPLY OBL Ground Analog LVDS2), 1.8 V

LVDSB_3P Dual-LVDS Channel 2 bit 3 Positive Output2)
146 DGO1_9 OUT LV Channel 1 Digital 9 Green Output1) (MSB)
LVDSB_3N Dual-LVDS Channel 2 bit 3 Negative Output2)
147 DRO1_0 OUT LV Channel 1 Digital 0 Red Output1) (LSB)

148 DRO1_1 OUT LV Channel 1 Digital 1 Red Output1)

DGO1_7 Channel 1 Digital 7 Green Output1) (MSB)
LVDSBCLKP Dual-LVDS Channel 2 Clock Positive Output2)
149 GND3.3IO2 SUPPLY OBL Ground Digital Output1) Port 2
LVDSBCLKN OUT LV Dual-LVDS Channel 2 Clock Negative Output2)
150 VSUP3.3IO2 SUPPLY OBL Supply Voltage Output1) Port 2, 3.3 V

VSUP3.3LVDS Supply Digital Voltage LVDS2), 3.3 V
DRO1_0 Channel 1 Digital 0 Red Output1) (LSB)



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ADVANCE INFORMATION
Volume 1:Connections
2.2.1. Pin General Description

PLQFP (If not used)
208-1

VSUP3.3LVDS SUPPLY OBL Supply Digital Voltage LVDS2), 3.3 V

158 DRO1_9 OUT LV Channel 1 Digital 9 Red Output1) (MSB)

DRO1_7 Channel 1 Digital 7 Red Output1) (MSB)
159 P1_7 IN/OUT OBL Port 1, Bit 7 Input/Output
TDO JTAG Interface Data Output
160 P1_6 IN/OUT OBL Port 1, Bit 6 Input/Output

TCLK JTAG Interface Clock Input
163 GND3.3DAC SUPPLY OBL Ground DAC
164 VSUP3.3DAC SUPPLY OBL Supply Voltage DAC, 3.3V

ROUT Analog Red Output

GOUT Analog Green Output

BOUT Analog Blue Output

SVMOUT Scan Velocity Modulation Output
169 VSUP1.8FE SUPPLY OBL Supply Voltage Analog Video Frontend, 1.8 V
171 VIN22 IN GND Analog Video 22 H-Sync Input

DHS Digital Video H-Sync Input
172 VIN21 IN GND Analog Video 21 B HD Input
173 VIN20 IN GND Analog Video 20 G HD Input
174 VIN19 IN GND Analog Video 19 R HD Input
175 VIN18 IN GND Analog Video 18 Fast Blank 2 Input
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PLQFP (If not used)
208-1
182 VIN9 IN GND Analog Video 9 Y or B SD Input
183 VIN8 IN GND Analog Video 8 C or Fast Blank 1 Input
184 VIN7 IN GND Analog Video 7 Y or G SD Input
186 GNDA SUPPLY OBL Analog Video Frontend, Platform Ground
187 VIN6 IN GND Analog Video 6 C or R SD Input
188 VIN5 IN GND Analog Video 5 Y/CVBS Input
189 VIN3 IN GND Analog Video 3 CVBS Input
192 VSUP3.3VO SUPPLY OBL Supply Voltage Analog Video Output, 3.3 V
193 VOUT3 OUT LV Analog cvbs Video 3 Output
194 VOUT2 OUT OBL Analog cvbs Video 2 Output
195 VOUT1 OUT OBL Analog cvbs Video 1 Output
198 656I0 IN/OUT LV Digital 656 Bit 0 Input (LSB)

199 656I1 IN/OUT LV Digital 656 Bit 1 Input







206 656CLKI IN/OUT GND Digital 656 Clock Input
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Volume 1: Connections
2.2.1. Pin General Description

PLQFP (If not used)
208-1
207 656CLKO OUT LV Digital 656 Clock Output

TCLKFW JTAG Interface Clock Input (firmw. Controler)
VCT
1)
2)
only 69xyP
in RGB output version ADVANCE INFORMATION
only in LVDS output version
Table 3–10: Maximum Number of Ports
Display CRT FPD
Analog RGB + SVMOUT + H + V TTL (Single RGB), TTL (Dual RGB)

Application LVDS (Dual or Single)
Panel control X X X X X X X X X X X X
656IN X X X X X X X X X X X X
656OUT X X X X X X X X X X
OSD444 X X X X X X X X
OSD222 X X X X
Port 1 4 4 4 4 4 4 4 4 8 8 8 8 8 8 8 8 8 8 8 8
Port 2 8 8 8 8 8 8 8 8 6 6 6 6 6 6 6 6 6 6 6 6
Port 3 6 8 8 6 8 8 6 6 8 6 8 8 8 8
Port 4 2 2 2 2 8 8 8 8 8 8 8 8 8 8
Max Number 14 20 22 22 20 26 28 28 14 20 20 22 22 28 30 30 14 22 22 30
of Ports
Note: 24bit RGB input is always available
Maximum Number of Ports
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2.2.2. Pin Descriptions
3.13.Pin Descriptions
2.2.2.1. Supply Pins GND* − Ground
This pin are main ground for all digital analog and port
3.13.1.Supply Pins supplies.
VSUP1.8DIG − Supply Voltage 1.8 V

This pin is main and standby supply for the digital core Application Note:
logic of controller, video and display processing.
All GND pins must be connected to a low-resistive
VSUP1.8FE − Supply Voltage 1.8 V ground plane underneath the IC. All supply pins must
This pin is main and standby supply for the analog be connected separately with short and low-resistive
video frontend. lines to the power supply. Decoupling capacitors from
VSUPxx to GND have to be placed as closely as pos-
VSUP3.3FE − Supply Voltage 3.3 V sible to these pins. It is recommended to use more
This pin is main and standby supply for the analog than one capacitor. By choosing different values, the
video frontend. frequency range of active decoupling can be extended.
VSUP3.3VO − Supply Voltage 3.3 V

This pin is main and standby supply for the analog 2.2.2.2 Audio Pins
3.13.2.Audio Pins
video outputs.
VREFAU – Reference Voltage for Analog Audio
VSUP1.8LVDS − Supply Voltage 1.8 V This pin serves as the internal ground connection for
This pin is main and standby supply for the analog the analog audio circuitry. It must be connected to the
LVDS core. GND pin with a 3.3 µF and a 100 nF capacitor in paral-
lel.
VSUP3.3LVDS − Supply Voltage 3.3 V
This pin is main and standby supply for the Digital SGND − Analog Reference Input
LVDS port. This is the reference ground Analog Audio part.
VSUP3.3FL − Supply Voltage 3.3 V AIN1 R/L – Audio 1 Inputs

This pin is main and standby supply for the Flash The analog input signal for audio 1 is fed to this pin.
device. Analog input connection must be AC coupled.
VSUP3.3DRI − Supply Voltage 3.3 V AIN2 R/L – Audio 2 Inputs

This pin is main supply for the digital RAM interface. The analog input signal for audio 2 is fed to this pin.
Analog input connection must be AC coupled.
VSUP3.3RAM − Supply Voltage 3.3 V
This pin is main supply for the RAM device AIN3 R/L – Audio 3 Inputs
The analog input signal for audio 3 is fed to this pin.
VSUP3.3IO 1-3 − Supply Voltage 3.3 V Analog input connection must be AC coupled.
This 3 pins are main and standby supply for the digital
I/O-ports. AIN4 R/L – Audio 4 Inputs
VSUP3.3COM − Supply Voltage 3.3 V Analog input connection must be AC coupled.
This pin is main and standby supply for the digital Input
ports and common digital logic. AIN5 R/L – Audio 5 Inputs
VSUP3.3DIG − Supply Voltage 3.3 V Analog input connection must be AC coupled.
This pin is main supply for the digital core logic of IF
and audio processing and digital video backend. AOUT1 R/L – Audio 1 Outputs
Output of the analog audio 1 signal. Connections to
VSUP8.0AU − Supply Voltage 8.0 V these pins are intended to be AC coupled.
This pin is main supply for the analog audio process-
ing. AOUT2 R/L – Audio 2 Outputs
Output of the analog audio 2 signal. Connections to
VSUP5.0SIF − Supply Voltage 5.0 V these pins are intended to be AC coupled.
This pin is main supply for the SIF processing.
SPEAKER R/L – Loudspeaker Outputs
VSUP3.3DAC − Supply Voltage 3.3 V Output of the loudspeaker signal.
This pin is main and standby supply for the Analog
DAC. HEADPHONES R/L – Headphones Outputs
Output of the headphones signal.
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2.2.2. Pin Descriptions (Continued)
SUBWOOFER – Subwoofer Outputs OSDFSW − Graphic Fast Switch Input/Output

Output of the subwoofer signal This is the fast switch for the graphic input/output
I2S_DEL_WS - Delay Line Bus Word Strobe OSDCLK − Graphic clock Input/Output
This is the word strobe signal of the delay line bus. This is the clock for the graphic video input/output
I2S_DEL_CL - Delay Line Bus Clock OSDV − Graphic vertical sync Input/Output
This is the Clock signal of the delay line bus. This is the vertical sync for the graphic input/output
I2S_DEL_IN - Delay Line Bus Data Input OSDH − Graphic horizontal sync Input/Output
This is the data input signal of the delay line bus. This is the horizontal sync signal for the graphic I/O
I2S_DEL_OUT - Delay Line Bus Data Output DRO1_ 0-9 - Digital Red Outputs
This is the data output signal of the delay line bus. This are 10 bits digital signals for red outputs,
for dual RGB use bits (0-7).
I2S_WS - I2S Word Strobe
This is the word strobe signal of I2S bus. DGO1_ 0-9 - Digital Green Output
This are 10 bits digital signals for green outputs,
I2S_DA_IN - I2S Data Input for dual RGB use bits (0-7).
This is the data input signal of I2S bus.
DBO1_ 0-9 - Digital Blue Outputs
I2S_CL - I2S Clock This are 10 bits digital signals for blue outputs,
This is the Clock signal of I2S bus. for dual RGB use bits (0-7).
SPDIF_OUT - DRO2_ 0-7 - Digital dual Red Outputs

This is an SPDIF output signal to connect to an A/V This are 8 bits digital signals for red outputs.
receiver.
DGO2_ 0-7 - Digital dual Green Output
SIF −/+ − Sound IF Input This are 8 bits digital signals for green outputs.
This is the SIF input to connect to an external DRX.
DBO2_ 0-7 - Digital dual Blue Outputs
VREFSIF – Reference Voltage for SIF This are 8 bits digital signals for blue outputs.
This pin serves as the internal ground connection for
the analog audio circuitry. PCS 0-5 - LCD Panel Control Select Outputs
This are 6 control select signals for LCD outputs.
For CRT application use PCS_0 as H sync and PCS_1
2.2.2.3 VideoPins
3.13.3.Video Pins as V sync Back End.
656I 0-7 − Digital 656 Data Input PCLK1,2 - LCD Panel Clock Outputs
These are the 8 bits digital 656 video inputs. This are the clock signals for LCD/RGB outputs.
656CLKI − Digital 656 Input clock LVDSA_* - LCD Panel LVDS Outputs
This is the clock for the digital 656 video inputs. This are 12 signals and clocks for LVDS single or dual
output.
656O 0-7 − Digital 656 Data Output
These are the 8 bits digital 656 video outputs. LVDSB_* - LCD Panel LVDS Outputs
This are 10 signals and clocks for LVDS dual output.
656CLKO− Digital 656 output clock
This is the clock for the digital 656 video outputs. REXT - LVDS External Resistor
This pin is connected to the external LVDS resistor.
OSDR 0-3 − Graphic Data input/output (6.2 kOhm to gnd)
These are the 2 or 4 bit graphic input/output
DRI 0-7 - Digital video inputs for Red
OSDG 0-3 − Graphic Data input/output This are 8 bits digital inputs for red signal
DGI 0-7- Digital video inputs for Green
OSDB 0-3 − Graphic Data input/output This are 8 bits digital inputs for green signal
DBI 0-7- Digital video inputs for Blue
OSDHCS 0-1 − Graphic Half Contrast Input/Output This are 8 bits digital inputs for blue signal.
This is the half contrast for the graphic input/output
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LC-32/37BT8E/RU
DEN - Digital video inputs Enable SDA − I2C Bus Data

This is the enable signal for the Digital Video Inputs. This pin delivers the I2C bus data line.
DHS - Digital video inputs Horizontal Sync P1_0−P1_3 − I/O Port

This is the H Sync signal for the Digital RGB input bus These pins provide CPU controlled I/O ports.
or for the VGA Video Inputs.
P1_4−P1_7 − I/O Port
DVS - Digital video inputs Vertical Sync These pins provide CPU controlled I/O ports.
This is the V Sync signal for the Digital RGB input bus Also used as CADC1−4 − Controller A/D inputs 1 to 4.
or for the VGA Video Inputs. This 4 pins are analog/digital converters from the con-
troller
DCLK - Digital video inputs Clock
This is the Clock signal for the Digital Video Inputs. P2_0−P2_7 − I/O Port
These pins provide CPU controlled I/O ports.
CLKOUT − Digital Output clock
This is a 20MHz clock for the external video ICs. P3_0−P3_7 − I/O Port
These pins provide CPU controlled I/O ports.
VIN 1–22 − Analog Video Input
These are the 19 analog video inputs. P4_0−P4_7 − I/O Port
(Vin 4,10 and 14 are missing) These pins provide CPU controlled I/O ports.
A CVBS, S-VHS, YCrCb or RGB signal is converted
using the luma, chroma and component AD converter. TDO-TCLK-TDI-TMS -JTAG Interface Pins for TV con-
Vin 8,18 are fast blank inputs. Vin22 is an Hsync input. troler.
The input signals must be AC-coupled. TCLK at pin 4 (656O3) has during reset an internal pull
up: (TCLK=0) at end of reset enables the JTAG mode
VOUT 1-3 − Analog Video Output at 656 LSB’s, this can also be done via I2C.
The analog video inputs that are selected by the video This JTAG is also available at Port(1 and 2) but only
matrix are output at these pins. via I2C.
ROUT, GOUT, BOUT − Analog RGB Output TDOFW-TCLKFW-TDIFW-TMSFW -JTAG Interface

These pins are the analog Red/Green/Blue outputs of Pins for firmware controler.
the back-end. TCLKFW at pin 208 (656O7) has during reset an inter-
nal pull up: (TCLKFW=0) at end of reset enables the
SVMOUT − Scan Velocity Modulation Output JTAG mode, this can also be done via I2C.
This output delivers the analog SVM signal. The D/A
converter is a current sink like the RGB D/A convert-
ers. At zero signal the output current is 50% of the
maximum output current.
2.2.2.4 ControllerPins
3.13.4.Controller Pins
XTALIN Crystal Input and XTALOUT Crystal Output

These pins are connected to an 20.25 MHz crystal
oscillator. An external clock can be fed into XTALIN.
RESETQ − Reset Input/Output

A low level on this pin resets the VCT 69xyP. The
internal CPU can pull down this pin to reset external
devices connected to this pin.
TEST − Test Input

This pin enables factory test modes. For normal opera-
tion, it must be connected to ground.
SCL − I2C Bus Clock

This pin delivers the I2C bus clock line. The signal can
be pulled down by external slave ICs to slow down
data transfer.
Micronas 776251-644-1-1AI
November 3, 2004; 1-67
VCT 69xyP
LC-26GA5E
LC-32/37GD8E/RU ADVANCE INFORMATION
LC-32GA5E
LC-32/37BT8E/RU
2.2.3. Pinning
VSUP3.3LVDS
VSUP3.3LVDS
VSUP3.3LVDS
VSUP1.8LVDS
VSUP3.3LVDS
VSUP3.3LVDS
LVDSB_CLKN
LVDSA_CLKN
LVDSB_CLKP
LVDSA_CLKP
GND1.8LVDS
GND3.3LVDS
GND3.3LVDS
GND3.3LVDS
GND3.3LVDS
VSUP1.8DIG
VSUP3.3IO1
GND1.8DIG
GND3.3IO1
LVDSA_4N
LVDSB_1N
LVDSB_2N
LVDSB_3N
LVDSA_0N
LVDSA_1N
LVDSA_2N
LVDSA_3N
LVDSB_1P
LVDSB_2P
LVDSB_3P
LVDSA_0P
LVDSA_1P
LVDSA_2P
LVDSA_3P
LVDSA_4P
OSDR0
OSDG0
OSDG1
OSDG2
OSDG3
OSDR1
OSDR2
OSDR3
PCLK1
PCLK2
PCS0
PCS1
REXT
PCS2
PCS3
PCS4
PCS5
125
156
145
147
144
140
139
136
120
119
116
154
153
152
151
150
149
148
146
145
143
142
141
138
137
135
134
133
132
131
130
129
126
123
122
121
118
117
115
114
113
112
111
110
109
106
128
127
124
108
107
105
LVDSB_0P 157 104 OSDB0
LVDSB_0N 158 103 OSDB1
P1_7 159 102 OSDB2
P1_6 160 101 OSDB3
P1_5 161 100 OSDHCS0
P1_4 162 99 OSDHCS1
GND3.3DAC 163 98 OSDFSW
VSUP3.3DAC 164 97 OSDCLK
P1_3 165 96 VSUP3.3IO1
P1_2 166 95 GND3.3IO1
P1_1 167 94 OSDH
P1_0 168 93 OSDV
VSUP1.8FE 169 92 P2_5
VSUP3.3FE 170 91 P2_4
VIN22 171 90 P2_3
VIN21 172 89 P2_2
VIN20 173 88 P2_1
VIN19 174 87 P2_0
VIN18 175 86 VSUP3.3FL
VIN17 176 85 GND3.3FL
VIN16 177 84 SDA
VIN15 178 83 SCL
VIN13 179 82 HSO
VIN12 81 VSO
VCT 69xyP
180
VIN11 181 80 CLKOUT
VIN9 182 79 XTALOUT
VIN8 183 78 XTALIN
VIN7 184 77 VSUP3.3COM
VSUP1.8FE 185 76 GND3.3COM
GNDA
VIN6
VIN5
186
187 LVDS output 75
74
73
VSUP3.3DRI
GND3.3DRI
DBI0
188
VIN3 189 72 DBI1
VIN2 190 71 DBI2
VIN1 191 70 DBI3
VSUP3.3VO 192 69 DBI4
VOUT3 193 68 DBI5
VOUT2 194 67 DBI6
VOUT1 195 66 DBI7
GND3.3IO3 196 65 DGI0
VSUP3.3IO3 197 64 DGI1
656I0 198 63 DGI2
656I1 199 62 DGI3
656I2 200 61 DGI4
656I3 201 60 DGI5
656I4 202 59 DGI6
656I5 203 58 DGI7
656I6 204 57 DRI0
656I7 205 56 DRI1
656CLKI 206 55 DRI2
656CLKO 207 54 DRI3
656O7 208 53 DRI4
11
12
16
17
20
36
37
40
10
13
14
15
18
19
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
38
39
41
42
43
44
45
46
47
48
49
50
51
52
8
1
2
3
4
5
6
7
9 AIN1R
AIN2R
AIN3R
AIN4R
VREFAU
VSUP8.OAU
GNDA
HEADPHONER
SPEAKERR
SUBWOOFER
AOUT2R
AOUT1R
I2S_DA_IN
SGND
GNDA
I2S_WS
I2S_DEL_WS
656O6
656O5
656O4
656O3
656O2
656O1
656O0
AIN1L
AIN2L
AIN3L
AIN4L
HEADPHONEL
SPEAKERL
SIFIN-
I2S_DEL_IN
AOUT2L
AOUT1L
VREFSIF
VSUP3.3RAM
DEN
DCLK
GND3.3RAM
DRI7
DRI6
DRI5
SIFIN+
RESETQ
GND3.3DIG
VSUP3.3DIG
I2S_CL
DVS
VSUP5.0SIF
I2S_DEL_CL
SPDIF_OUT
I2S_DEL_OUT
Important Note from MICRONAS:
All information and data contained in the data sheet are without any commitment, are not to be considered as an offer
for conclusion of a contract, not shall they be construed as to create any liability. Any new issue of this data sheet in-
validates previous issues. Product availability and delivery are exclusively subject to our respective order confirmation
form; the same applies to orders based on development samples delivered.
By this publication, Micronas GmbH does not assume responsibility for patent infringements or other rights of third par-
ties which may result from its use.
Further, Micronas GmbH reserves the right to revise this publication and to make changes to its content, at any time,
without obligation to notify any person or entity of such revisions or changes.
78
LC-26GA5E
LC-32/37GD8E/RU
LC-32GA5E
Philips Semiconductors TDA8931 LC-32/37BT8E/RU
Power comparator 1 × 20 W
2.3. IC301, IC302 (VHITDA8931T-1Y)
6. Block2.3.1. Block Diagram

diagram
17
BOOT
TDA8931 18
5 VDDP
VDDA
DRIVER
4 HIGH
INP comparator 16
CONTROL OUT
3
INN
DRIVER
2 LOW
VSSA 15
VSSP
STABILIZER 14
STABI
12V
6 VSSD
POWERUP
VDDP
7
ENABLE
13
9 HVP
CGND
ODP
VSSP
CONTROL
OTP
VDDP
OCP
19
12 HVPI
OVP OVP
UVP VSSP
TDA8931
8
DIAG
Semiconductors HEAT SPREADER
1 10 11 20
Power comparator 1 × 20 W
001aab807
VSSD VSSD
VSSD VSSD
Fig 1. Block diagram
nning information
2.3.2. Pinning
7.1 Pinning
VSSD 1 20 VSSD
VSSA 2 19 HVPI
INN 3 18 VDDP
INP 4 17 BOOT
VDDA 5 16 OUT
TDA8931
POWERUP 6 15 VSSP
9397 750 13847 ENABLE 7 14 STABI
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Preliminary data sheet Rev. 01 — 14 January

DIAG 8 2004 13 HVP 3 of 31
CGND 9 12 OVP
VSSD 10 11 VSSD
001aab811
Fig 2. Pin configuration
7.2 Pin description 79
Table 3: Pin description

LC-32/37BT8E/RU
LC-32/37GD8E/RU
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LC-32GA5E
LC-26GA5E
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2.4. IC201
2.4.1. Block Diagram
2003 Oct 02
Philips Semiconductors
handbook, full pagewidth
alignment-free IF-PLL demodulators

I2C-bus
BLOCK DIAGRAM
(VHITDA9886+-1Y)
external reference signal
controlled single and multistandard

CVAGC(pos) VIF-PLL or 4 MHz crystal
filter
TOP TAGC VAGC (1) VPLL REF AFC

9 (8) 14 (15) 16 (17) 19 (21) 15 (16) 21 (23)
CAGC(neg) CBL
TUNER AGC VIF-AGC RC VCO DIGITAL VCO CONTROL AFC DETECTOR
VIF2 2 (31)
SOUND CARRIER (18) 17 CVBS
VIF1 1 (30) VIF-PLL TRAPS
4.5 to 6.5 MHz video output: 2 V (p-p)
[1.1 V (p-p) without trap]
TDA9885
TDA9886
80
(7) 8 AUD
audio output
7
SINGLE REFERENCE QSS MIXER AUDIO PROCESSING

SIF2 24 (27) (3) 5 DEEM
INTERCARRIER MIXER AND SWITCHES
AND AM DEMODULATOR
SIF1 23 (26)
de-emphasis
network
MAD
(4) 6 AFD
OUTPUT NARROW-BAND CAF

SUPPLY SIF-AGC I 2C-BUS TRANSCEIVER
PORTS FM-PLL DEMODULATOR
CAGC
(6, 12, 13, 14, 17,
TDA9885; TDA9886
19, 25, 28, 29, 32)
20 (22) 18 (20) 13 3 (1) 22 (24) 11 (10) 10 (9) 7 (5) 12 (11) 4 (2)
VP AGND n.c. OP1 OP2 SCL SDA DGND SIOMAD FMPLL MHC108
Product specification
sound intercarrier output FM-PLL
and MAD select filter
(1) Not connected for TDA9885.

Pin numbers for TDA9885HN and TDA9886HN in parenthesis.
Fig.1 Block diagram.

Philips Semiconductors Product specification
LC-26GA5E
LC-32/37GD8E/RU
I2C-bus controlled single and multistandard LC-32GA5E
TDA9885; TDA9886
LC-32/37BT8E/RU
alignment-free IF-PLL demodulators
2.4.2. Pinning
7 PINNING
PIN
SYMBOL TDA9885T TDA9886T DESCRIPTION
TDA9885HN TDA9886HN
TDA9885TS TDA9886TS
VIF1 1 1 30 30 VIF differential input 1
VIF2 2 2 31 31 VIF differential input 2
n.c. − − 32 32 not connected
OP1 3 3 1 1 output port 1; open-collector
FMPLL 4 4 2 2 FM-PLL for loop filter
DEEM 5 5 3 3 de-emphasis output for capacitor
AFD 6 6 4 4 AF decoupling input for capacitor
DGND 7 7 5 5 digital ground
AUD 8 8 7 7 audio output
TOP 9 9 8 8 tuner AGC TakeOver Point (TOP) for resistor
adjustment
SDA 10 10 9 9 I2C-bus data input and output
SCL 11 11 10 10 I2C-bus clock input
SIOMAD 12 12 11 11 sound intercarrier output and MAD select with
resistor
n.c. 13 13 13 13 not connected
TAGC 14 14 15 15 tuner AGC output
REF 15 15 16 16 4 MHz crystal or reference signal input
VAGC − 16 − 17 VIF-AGC for capacitor
n.c. 16 − 17 − not connected
CVBS 17 17 18 18 composite video output
AGND 18 18 20 20 analog ground
VPLL 19 19 21 21 VIF-PLL for loop filter
VP 20 20 22 22 supply voltage
AFC 21 21 23 23 AFC output
OP2 22 22 24 24 output port 2; open-collector
SIF1 23 23 26 26 SIF differential input 1 and MAD select with
resistor
SIF2 24 24 27 27 SIF differential input 2 and MAD select with
resistor
2003 Oct 02 8
81
Product specification
LC-26GA5E
LC-32/37GD8E/RU
LC-32GA5E
LC-32/37BT8E/RU
single and multistandard
TDA9885; TDA9886
PLL demodulators
2.4.2. Pinning (Continued)
handbook, halfpage
24 SIF2 VIF1 1 24 SIF2
23 SIF1 VIF2 2 23 SIF1
22 OP2 OP1 3 22 OP2
21 AFC FMPLL 4 21 AFC
20 VP DEEM 5 20 VP
19 VPLL AFD 6 19 VPLL

9885T TDA9885TS
9886T 18 AGND DGND 7 TDA9886TS 18 AGND
17 CVBS AUD 8 17 CVBS
16 VAGC (1) TOP 9 16 VAGC (1)
15 REF SDA 10 15 REF
14 TAGC SCL 11 14 TAGC
13 n.c. SIOMAD 12 13 n.c.
MHC109 MHC110
(1) Not connected for TDA9885TS.
uration for SO24. Fig.3 Pin configuration for SSOP24.

15 TAGC
16 REF
13 n.c.
14 n.c.
17 VAGC(1)
18 CVBS
19 n.c.
885HN 20 AGND
886HN 21 VPLL
22 VP
23 AFC
24 OP2
n.c. 28
SIF2 27
SIF1 26
n.c. 25
MHC111
N.
tion for HVQFN32.
82
3 Pin information LC-26GA5E
LC-32/37GD8E/RU
LC-32GA5E
LC-32/37BT8E/RU
3.1 2.5. IC202

Pin connections
(STV0360) (preliminary)
2.5.1. Pinning
Figure 3: Pin out for 64-pin TQFP (10 x 10 mm)
CDATA/.HFEC2
CCLK/HFEC1
VCCXTAL1.8
GNDXTAL
VDD_3.3
HFEC0
XTALO
XTALI
TEST
GND
GND
GND
VDD
CS0
CS1
IP0
64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49
DGNDA 1 48 CIQ/HFEC3
DVCCA1.8 2 47 AUX_CLK
VCCA1.8 3 46 GND
GNDA 4 45 OP0
REFM 5 44 VDD_3.3
REFP 6 43 LOCK/OP1
VR 7 42 LOCK/OP2
VCCA3.3 8 TQFP64 41 GND
Confidential
INM 9 40 ERROR
STV0360
INP 10 39 VDD
GNDA 11 38 D/P
RESET 12 37 GND
VDD 13 36 CLK_OUT
AGC2 14 35 VDD_3.3
GND 15 34 D0
AGC1 16 33 D1
17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
SCLT
GND
VDD
GND
STR_OUT
TEST
SCL
D7
D6
D5
D4
D3
D2
SDA
VDD_3.3
SDAT
VDD_3.3: 3.3V output buffer supply

VDD: 1.8V core and input buffer supply
GND: both core and buffer ground
6/66 STMicroelectronics Confidential 7283434C
83
STV0360 Pin information
LC-26GA5E
LC-32/37GD8E/RU
LC-32GA5E
LC-32/37BT8E/RU
3.2 Pinout description (preliminary)
2.5.2. Pin Description
Table 1: STV0360 pin description
Pin number Name Type Description Drive (mA)
Clock and resets
12 RESET I1 Hardware reset, active low -
62 XTALI Analog Crystal oscillator input/external clock (1.8 V) -
63 XTALO Analog Crystal oscillator output -
61 VCCXTAL1.8 Supply Analog oscillator supply (1.8 V) -
64 GNDXTAL Ground Analog oscillator ground -
Analog interface
2 DVCCA1.8 Supply Analog part digital supply (1.8 V) -
5 REFM Analog Internal negative reference -
6 REFP Analog Internal positive reference
3 VCCA1.8 Supply Analog supply (1.8 V) -
9 INM Analog Negative analog input -
10 INP Analog Positive analog input -

Confidential
4, 11 GNDA Supply Analog ground -
1 DGNDA Ground Analog ground -
7 VR Analog Reference -
8 VCCA3.3 Supply Analog supply (3.3 V)
I2C interface
21 SDA IO2 Serial data (open drain) 8
20 SCL I Serial clock (open drain) -
19 SDAT IO SDA tuner (open drain) 4
18 SCLT I SCL tuner
MPEG interface
25, 26, 27, 29, D7/0 O3 Serial D7, MPEG data 8/4
31, 32, 33, 34
36 CLK_OUT O MPEG byte or bit clock 4
23 STR_OUT O MPEG first byte sync 2
38 D/P O MPEG data valid/parity 4
40 ERROR O MPEG packet error 2
51 HFEC0 O Hierarchical FEC output bit 0 2
50 CCLK/HFEC1 O Hierarchical FEC output bit 1 or clock for 2

constellation display
49 CDATA/HFEC2 O Hierarchical FEC output bit 2 or data for 2

48 CIQ/HFEC3 O Hierarchical FEC output bit 3 or IQ validation for 2

7283434C STMicroelectronics Confidential 7/66
84
LC-26GA5E
LC-32/37GD8E/RU
Pin information LC-32GA5E
LC-32/37BT8E/RU
STV0360
2.5.2. Pin Description (Continued)

Table 1: STV0360 pin description
Pin number Name Type Description Drive (mA)
Front end controls
16 AGC1 IO RF AGC control Σ∆ 4
14 AGC2 IO IF AGC control Σ∆ 4
17, 60 TEST Reserved test mode, must be grounded
58 IP0 I General-purpose input port 0 and ADC input for -

RF level monitoring
45 OP0 IO General-purpose output port 0 4
43 LOCK/OP1 IO General-purpose output port 1 or lock indicator 4
42 LOCK/OP2 O General-purpose output port 2 or lock indicator 4
47 AUX_CLK IO Auxiliary clock 8
55 CS0 I Chip select LSB -
53 CS1 I Chip select MSB -
Power supply
13, 28, 39, 57 VDD Supply Digital core supply
22, 35, 44, 52 VDD_3.3 Supply Digital IO supply

Confidential
15, 24, 30, 37, GND Ground

41, 46, 54, 56,
59
1. All inputs are 3.3 V compatible

2. All bidirectional pads are 3.3 V capable
3. All outputs are 3.3 V capable
8/66 STMicroelectronics Confidential 85

7283434C
LC-32/37BT8E/RU
LC-32/37GD8E/RU
4 Pin list
LC-32GA5E
LC-26GA5E
Note: 1 NC (not connected): indicates that the pin has no electrical connection, and may be used to route
2.6. IC4001 (Sti5516)

power or signals on the PCB.
4.1 Pin-out
2.6.1. Pinning
2 Do not connect: pin is reserved. It may have an electrical connection and must not be used.
The following pages give the allocation of pins to the package, shown from the top looking down.
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26
EMI EMIFLASH EMIDATA EMIDATA EMIDATA EMIDATA EMIDATA EMIDATA EMIADDR EMIADDR EMIADDR EMIADDR EMIADDR
A SDRAM EMIADDR GND
VDDGEN
NC CLK27MA VDD18 VDD33 GND
Do not GND GND GND GND A
CLK [14] [13] [10] [7] [3] [0] [23] [19] [16] [13] [9] [5] FSYN connect
CLK
VDD
B EMIDATA EMIDATA EMIDATA EMIDATA EMIDATA EMIADDR EMIADDR EMIADDR EMIADDR EMIADDR EMIADDR EMIADDR GND
GNDGEN
AUDIO VDD18 VDD33 GND GND VDD18 GND GND GND
NOT_P1284 B
VDD33 VDD33 [15] [12] [9] [6] [2] [25] [22] [18] [15] [12] [8] [4] FSYN STROBE
FSYN
C EMIDATA EMIDATA EMIDATA EMIDATA EMIADDR EMIADDR EMIADDR EMIADDR EMIADDR EMIADDR CLK GND
VDD33 VDD33 VDD33 EMIADDR VDDVPLL SPEED AUDIO VDD18 VDD33 GND GND GND GND GND
P1284 NOT_P1284 C
[11] [8] [5] [1] [24] [21] [17] [14] [11] [7] [3] BUSY ACK
SEL FSYN
D EMIDATA EMIADDR EMIADDR EMIADDR EMIADDR AUXCLK NOT_P1284 P1284 P1284

VDD33 VDD33 VDD33 VDD33 VDD33 [4]
GND VDD33 [20]
VDD18 VDD33 [10] [6] GND GND VDD18 VDD33 GND GND GND GND D
[2] OUT AUTOFD SELECT PERROR
E GND GND GND VDD33 VDD33

NOT_P1284 NOT_P1284 NOT_P1284 E
SELECTIN INIT FAULT
F GND GND GND VDD33 P1284 P1284 P1284 P1284 F

DATA[4] DATA[5] DATA[6] DATA[7]
G VDD18 VDD18 VDD18 GND GND

P1284 P1284 P1284 G
DATA[1] DATA[2] DATA[3]
H NOT_EMI EMIBOOT TSIN2L TSIN2L TSIN2L P1284 H

NC VDD18
ACKREQ MODE[0] DATA[5] DATA[6] DATA[7] DATA[0]
J NOT_EMI NOT_EMI NOT_EMI TSIN2L

VDD33 TSIN2L TSIN2L J
Confidential
Confidential
CAS RAS REQGNT VDD33 DATA[3]
PACKET DATA[4]
CLK
K NOT_EMI NOT_EMI NOT_EMI NOT_EMI TSIN2L TSIN2L TSIN2L

CSD CSC CSB CSA GND K
DATA[0] DATA[1] DATA[2]
L NOT_EMIBE NOT_EMIBE NOT_EMI NOT_EMI GND GND GND TSIN2L TSIN2L

[1] [0] CSF CSE TSIN2L L
GND GND GND VDD18 BYTE ERROR
BYTE
CLK CLKVALID
M NOT_EMIOE VDD33 VDD33 VDD33 GND GND GND TSIN1 TSIN1 TSIN1 TSIN1
GND GND GND M
DATA[4] DATA[5] DATA[6] DATA[7]
86
EMIWAIT
N EMIRD NOT_EMI TSIN1 TSIN1 TSIN1 TSIN1
VDD33 NOTWR LBA
NOT GND GND GND GND GND GND N
TREADY DATA[0] DATA[1] DATA[2] DATA[3]
DCU TSIN1 TSIN1 TSIN1

P TRIGGER VDD18 VDD18 VDD18 GND GND GND GND GND GND BYTE PACKET
TSIN1 BYTE P
IN ERROR
CLK CLK CLKVALID
DCU
R VDD18 VDD18 TRIGGER VDD18 GND GND GND GND GND GND VDD18 VDD18 VDD18 VDD18 R
OUT
T INTER INTER INTER INTER SMIMEM SMIDATA SMIDATA T

GND GND GND GND GND GND CLKIN ML MU
NC
RUPT[3] RUPT[2] RUPT[1] RUPT[0]
U NOT_SMI NOT_SMI NOT_SMIWE

SMIMEM U
PIO0[1] PIO0[0] PIO0[2] VDD33 CAS RAS CLKOUT
V SMIDATA NOT_SMI NOT_SMI V

PIO0[6] PIO0[5] PIO0[4] PIO0[3] VDD33 [15] CS0 CS1
W SMIDATA SMIDATA SMIDATA SMIDATA W

PIO1[2] PIO1[1] PIO1[0] PIO0[7] [11] [12] [13] [14]
SMIDATA SMIDATA SMIDATA Y

Y PIO1[5] PIO1[4] PIO1[3] GND VDD33 [8] [9] [10]
A VSSAA VDDAA VDDASA GND

SMIDATA SMIDATA SMIDATA A
PIO1[6] [5] [6] [7] A
A DAC DAC DAC
A OUTM VCCAA GNDAA OUTM VDD33

SMIDATA SMIDATA SMIDATA A
B LEFT DAC DAC RIGHT [2] [3] [4] B
A VCCASA OUTP OUTP SHIELDV GNDVDAC VREFDAC GNDVDAC GND SPDIF VDD18 PIO4[4] VDD33 PIO5[3] GND VDD18 VDD33
SMIADDR SMIADDR SMIDATA SMIDATA A
C DAC IREF
LEFT RIGHT GND VDD33 TDI LPCLKIN
DAC YCC RGB RGB VDD18 [12] [13] [0] [1] C
A LPCLK VREFDAC IREFDAC DO NOT PIO3[5] PIO4[1] PIO4[5] PIO5[1] PIO5[4] PIO5[7] GND VDD33
SMIADDR SMIADDR SMIADDR SMIADDR A
D
VBGFIL PIO2[1] PIO2[5] PIO2[7] PIO3[6] PIO3[4] TMS OSC YCC CVOUT
RGB BOUT SCLK CONNECT [8] [9] [10] [11] D
A PCM PIO3[7] PIO4[2] PIO4[7] PIO5[2] PIO5[5]

NOT_ GND VDD33
SMIADDR SMIADDR SMIADDR SMIADDR A
IREFDAC VDDVDAC
E
PIO1[7] PIO2[2] PIO2[6] PIO3[1] PIO3[0] NOT_TRST NOT_RESET RTCVDD
YCC YOUT GOUT
RGB PCMCLK DATA[1] HSYNC [4] [5] [6] [7] E
DO NOT EVENNOT SMIADDR SMIADDR SMIADDR SMIADDR A

A PIO2[0] PIO2[3] PIO2[4] PIO3[3] PIO3[2] TDO TCK
NOT_WDOG
COUT VDDVDAC
ROUT NC LRCLK CONNECT
PIO4[0] PIO4[3] PIO5[0] PIO4[6] PIO5[6] ODD
GND VDD33 [0] [1] [2] [3] F
F RSTOUT YCC
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Pin list STi5516
2.6.2. Pin Description
4.2 STi5516 pin list

Signal names are prefixed by NOT_ if they are active low; otherwise they are active high.
All signals are only 3.3 V capable unless otherwise indicated as 1.8 V or 5 V tolerant.
Table 2: I/O load capacitance and DC loading
Functional pin Maximum load

Pad type Drive (mA) Notes
group capacitance (pF)
C4 Others 75 4
S8 SDRAM/EMI 75 8
S8b SDRAM/EMI 75 8
E8 EMI 35 8 a
(programmable)
25 6 a
15 4 a
5 2 a
P4 PIO 400 4
a. Typical load, but the maximum is 75 pF

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Table 3: Analog power supply pins
Pin Location Number Function
VDDVDACRGB AE12 1 3.3 V power supply for RGB video DAC
VDDVDACYCC AF10 1 3.3 V power supply for YCC video DAC
GNDVDACRGB AC12 1 Ground for RGB video DAC
GNDVDACYCC AC10 1 Ground for YCC video DAC
SHIELDVDAC AC9 1 Shield ground for 2 x video DACs
IREFDACRGB AD11 1 RGB video DAC current reference
IREFDACYCC AE9 1 YCC video DAC current reference
VREFDACRGB AC11 1 RGB video DAC voltage reference
VREFDACYCC AD9 1 YCC video DAC voltage reference
VDDVPLL C15 1 3.3 V power for video PLL
VDDAUDIOFSYN B17 1 1.8 V dedicated power for low jitter audio clock
frequency synthesizer
GNDAUDIOFSYN C17 1 Dedicated ground for low jitter audio clock frequency
synthesizer
VDDGENFSYN A16 1 1.8 V dedicated power for nonaudio clock frequency

synthesizer
GNDGENFSYN B16 1 Dedicated ground for nonaudio clock frequency

synthesizer
VDDAADAC AA2 1 3.3 V power for audio DAC
VSSAADAC AA1 1 Ground for audio DAC command switches
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STi5516 2.6.2. Pin Description (Continued) Pin list
Table 3: Analog power supply pins
VDDASADAC AA3 1 3.3 V power for audio DAC substrate
VCCAADAC AB2 1 3.3 V power for audio DAC command switches
GNDAADAC AB3 1 Ground for audio DAC
VCCASADAC AC1 1 3.3 V power for audio DAC command switches

substrate
IREF AC2 1 Audio DAC output reference current
VBGFIL AD1 1 Audio DAC filtered output reference voltage
Table 4: Digital power supply pins
VDD18 a 24 1.8 V power supply
VDD33 b 35 3.3 V power supply
RTCVDD AE8 1 Low power controller 1.8 V power supply
GND c 76 Ground for power supplies

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a. A19, B18, B22, C18, D10, D18, G1 to G3, H4, L23, P2 to P4, R1, R2, R4, R23 to R26, AC13,
AC16 and AC21.
b. A20, B1, B2, B19, C1 to C3, C19, D1 to D5, D8, D11, D19, E4, E23, F4, J4, J23, M2 to M4,
N1, U4, V23, Y23, AB23, AC6, AC18, AC22, AD22, AE22 and AF22.
c. A15, A21, A23 to A26, B15, B20, B21, B23 to B25, C20 to C24, D7, D15, D16, D20 to D23,
E1 to E3, F1 to F3, G4, G23, K23, L11 to L16, M11 to M16, N11 to N16, P11 to P16, R11 to
R16, T11 to T16, Y4, AA23, AC5, AC14, AC20, AD21, AE21 and AF21.
Table 5: RTC pins
Pin Location I/O Function
LPCLKINa AC8 I Low power clock input
LPCLKOSCA AD8 I/O Low power clock oscillator
a. 1.8 V tolerant
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Pin list 2.6.2. Pin Description (Continued) STi5516
Table 6: System pins
Pad
type
CLK27MAA A18 I Selectable input clock to PLL or for x1 mode C4
CLKSPEEDSELa C16 I PLL speed select C4
AUXCLKOUTa D17 O Auxiliary clock for general use C4
NOT_RESETB AE7 I System reset -
NOT_WDOGRSTOUTa AF8 O Internal watchdog timer reset. C4
a. 5 V tolerant
b. 1.8 V tolerant
Table 7: JTAG pins
Pad
type
TDIA AC7 I Boundary scan test data input C4
TMSa AD7 I Boundary scan test mode select C4

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TCKa AF7 I Boundary scan test clock -
NOT_TRSTa AE6 I Boundary scan test logic reset C4
TDOa AF6 O Boundary scan test data output C4
a. 5 V tolerant
Table 8: DCU pins
Pad
type
DCUTRIGGERINa P1 I External trigger input to DCU C4
DCUTRIGGEROUTA R3 O Signal to trigger external debug circuitry C4
a. 5 V tolerant
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STi55162.6.2. Pin Description (Continued) Pin list
Table 9: EMI pins
Pad
type
NOT_EMIRAS or J2 O Row address strobe for SDRAM C4

NOT_CI_IORDa
NOT_EMICAS or J1 O Column address strobe for SDRAM E8

NOT_CI_IOWa
NOT_EMICSA K4 O Peripheral chip select A E8
NOT_EMICSB K3 O Peripheral chip select B E8
NOT_EMICSC K2 O Peripheral chip select C E8
NOT_EMICSD K1 O Peripheral chip select D E8
NOT_EMICSE L4 O Peripheral chip select E E8
NOT_EMICSF L3 O Peripheral chip select F E8
NOT_EMIBE[1:0] L1, L2 O External device data bus byte enable. 1 bit per E8
byte of the data bus.
NOT_EMIOE or M1 O External device output enable. E8

NOT_CI_OE
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NOT_EMILBA or N3 O Flash device load burst address. E8

NOT_CI_WEA
EMIWAITNOTTREADYb N4 I External memory device target ready indicator C4
EMIRDNOTWR N2 O External read/write access indicator. Common to E8

all devices.
EMIDATA[15:0] c I/O External common data bus. E8
EMIADDR[25:2]d e O External common address bus E8
NOT_EMIREQGNT J3 O Bus request/grant indicator E8
NOT_EMIACKREQb H1 I Bus grant/request indicator C4
EMIBOOTMODE0b H3 I External power-up port size indicator C4
EMISDRAMCLK A1 O SDRAM clock E8
EMIFLASHCLK A2 O Peripheral clock E8
a. Or equivalent ATA HDD interface signal.

b. 5 V tolerant
c. B3, A3, A4, B4, C4, A5, B5, C5, A6, B6, C6, D6, A7, B7, C7 and A8.
d. EMIADDR[19:20] are used as ATA HDD interface function: ATA CS0 and CS1. There is no
interconnect configuration control register bit to select this function. The addresses are just
reused as chip selects.
e. B8, C8, A9, B9, C9, D9, A10, B10, C10, A11, B11, C11, A12, B12, C12, D12, A13, B13, C13,
D13, A14, B14, C14 and D14.
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Table 10: Transport stream 2 pins
Pad
type
TSIN2LBYTECLKa L24 I/O Transport stream bit clock C4
TSIN2LBYTECLKVALIDa L26 I/O Transport stream bit clock valid edge C4
TSIN2LERRORa L25 I/O Transport stream packet error C4
TSIN2LPACKETCLKa J25 I/O Transport stream packet strobe C4
TSIN2LDATA[7:0]a
bc I/O Transport stream data C4
a. 5 V tolerant
b. H25, H24, H23, J26, J24, K26, K25 and K24
c. TSIN2LDATA7 is used for data input in serial mode.
Table 11: Transport stream 1 pins
Pad
type
TSIN1BYTECLKa P23 I Transport stream bit/byte clock C4

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TSIN1BYTECLKVALIDa P26 I Transport stream bit/byte clock valid edge C4
TSIN1ERRORa P25 I Transport stream packet error C4
TSIN1PACKETCLKa P24 I Transport stream packet strobe C4
TSIN1DATA[7:0]a b, c I Transport stream data in C4
a. 5 V tolerant
b. M26, M25, M24, M23, N26, N25, N24 and N23.
c. TSIN1DATA7 is used for data input in serial mode.
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Table 12: Programmable I/O pins
Pad
type
PIO0[0:7]A b I/O Parallel input/output pin or alternative function P4
PIO1[0:7]a
c I/O P4
PIO2[0:7]a
d I/O P4
PIO3[0:7]a
e I/O P4
PIO4[0:7]a
f I/O P4
PIO5[0:7]a
g I/O P4
a. 5 V tolerant
b. U2, U1, U3, V4, V3, V2, V1 and W4
c. W3, W2, W1, Y3, Y2, Y1, AA4 and AE1
d. AF1, AD2, AE2, AF2, AF3, AD3, AE3 and AD4
e. AE5, AE4, AF5, AF4, AD6, AD15, AD5 and AE15
f. AF15, AD16, AE16, AF16, AC17, AD17, AF18 and AE17
g. AF17, AD18, AE18, AC19, AD19, AE19, AF19 and AD20
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Table 13: Digital audio pinsa
Pad
type
SCLKB AD13 O Serial clock C4
PCMDATA[1]b AE14 O PCM data out C4
PCMCLKb AE13 I/O External PCM clock input or internal PCM clock C4
output
LRCLKb AF13 O Left/right clock C4
SPDIFb AC15 O Digital audio output C4
a. Note: Digital audio input pins PCMI_SCLK, PCMI_DATA and PCMI_LRCLK are alternate
functions for NOT_CD_REQ[1], I1284HOSTLOGICHIGH, and NOT_CD_REQ[0], on PIO port
3 bits [6:4]
b. 5 V tolerant
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Table 14: AVSDRAM pins (SMI)
Pad
type
SMIADDR[13:0] a O Audio/video core SDRAM address bus S8
SMIDATA[15:0] b I/O Audio/video core SDRAM data bus S8
NOT_SMICS0 V25 O Audio/video core SDRAM chip select for 1st S8

SDRAM
NOT_SMICS1 V26 O Audio/video core SDRAM chip select for 2nd S8

16 Mbit SDRAM
NOT_SMICAS U23 O Audio/video core SDRAM column address strobe S8
NOT_SMIRAS U24 O Audio/video core SDRAM row address strobe S8
NOT_SMIWE U25 O Audio/video core SDRAM write enable S8
SMIMEMCLKIN T23 I Audio/video core SDRAM memory clock input S8b
SMIMEMCLKOUT U26 O Audio/video core SDRAM memory clock output S8
SMIDATAML T24 O Audio/video core SDRAM data bus lower byte S8

enable
SMIDATAMU T25 O Audio/video core SDRAM data bus upper byte S8

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enable
a. AC24, AC23, AD26, AD25, AD24, AD23, AE26, AE25, AE24, AE23, AF26, AF25, AF24 and
AF23.
b. V24, W26, W25, W24, W23, Y26, Y25, Y24, AA26, AA25, AA24, AB26, AB25, AB24, AC26
and AC25.
Table 15: IEEE 1284/1394 pins
Pad
type
P1284DATA[7:0]A b I/O 1284 data or 1394 AV data I14
NOT_P1284SELECTINa E24 I/O 1284 or 1394 AV control signals I14
NOT_P1284INITa E25 I/O I14
NOT_P1284FAULTa E26 I/O I14
NOT_P1284AUTOFDa D24 I/O I14
P1284SELECTa D25 I/O I14
P1284PERRORa D26 I/O I14
P1284BUSYa C25 I/O I14
NOT_P1284ACKa C26 I/O I14
NOT_P1284STROBEa B26 I/O I14
a. 5 V tolerant
b. F26, F25, F24, F23, G26, G25, G24 and H26.
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Table 16: Interrupt pins
Pad
type
INTERRUPT[3:0]A b I/O External interrupts C4
a. 5 V tolerant
b. T1, T2, T3 and T4.
Table 17: Analog audio DAC (digital-to-analog converter) pins
OUTPLEFT AC3 O Left channel, differential positive current output
OUTMLEFT AB1 O Left channel, differential negative current output
OUTPRIGHT AC4 O Right channel, differential positive current output
OUTMRIGHT AB4 O Right channel, differential negative current output
Table 18: Analog video DAC pins

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ROUT AF11 O Red output
GOUT AE11 O Green output
BOUT AD12 O Blue output
COUT AF9 O Chroma output
CVOUT AD10 O Composite video output
YOUT AE10 O Luma output
Table 19: Digital video pins
Pad
type
NOT_HSYNCA AE20 I/O Horizontal sync C4
EVENNOTODDa AF20 I/O Vertical sync C4
a. 5 V tolerant
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Table 20: Port 0 PIO signal assignments
Port 0 bit Input Output
Bit 0 SC0_DATAOUT or ASC0_TXDa
Bit 1 SC0_DATAIN or ASC0_RXDa
Bit 2 SC0_CG_EXTCLK
Bit 3 SC0CG_CLK or SMCDSS_CLKb
Bit 4 (SCO_RESET)
Bit 5 (SC0_NOT_SETVCC)
Bit 6 SC0_DIR or ASC0_NOTOEc,

(SC0_NOT_SETVPP)
Bit 7 (SC0_DETECT)
a. ASC0 TX/RX data becomes smartcard TX/RX data when the ASC module is used in
smartcard mode.
b. Output function between PIO or smartcard module clock generator alternate function and
clock generator module frequency synthesizer clock is selected by bit 28 in the interconnect
register CONFIG_CONTROL_A (SMCARDA_DSSSMCLK_NOT_PIOBIT3). If the DSS
smartcard mode is selected (bit 28 = 1), this overrides the normal PIO or PIO alternate
function output.
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c. When ASC0 is used in nonsmartcard mode, the smartcard direction signal becomes an active
low ASC TX output enable signal. The signals are in fact the same, that is, SC0_DIR = 0
means smartcard TX is active.
Bit 0 SC1_DATAOUT or ASC1_TXDa
Bit 1 SC1_DATAIN or ASC1_RXDa
Bit 2 SC1_CG_EXTCLK
Bit 3 SC1CG_CLK or SMCDSS_CLKb
Bit 4 (SC1_RESET)
Bit 5 YC[1] YC[1], (SC1_NOT_SETVCC)
Bit 6 SC1_DIR or ASC1_NOTOEc,

(SC1_NOT_SETVPP)
Bit 7 YC[0] (SC1_DETECT) YC[0]
a. ASC1 TX/RX data becomes smartcard TX/RX data when the ASC module is used in
smartcard mode.
b. Output function between PIO or smartcard module clock generator alternate function and
clock generator module frequency synthesizer clock is selected by bit 29 in the interconnect
register CONFIG_CONTROL_A (SMCARDB_DSSSMCLK_NOT_PIOBIT3). If the DSS
smartcard mode is selected (bit 29 = 1) this overrides the normal PIO or PIO alternate function
output.
c. When ASC1 is used in nonsmartcard mode the smartcard direction signal becomes an active
low ASC TX output enable signal. The signals are in fact the same, that is, SC1_DIR = 0
means smartcard TX is active.
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Bit 0 MAFE_HC1 or NOT_ASC4_RTSa
Bit 1 MAFE_DOUT or ASC4_TXDa
Bit 2 MAFE_DIN or ASC4_RXDa
Bit 3 MAFE_FS or NOT_ASC4_CTSa
Bit 4 MAFE_SCLK
Bit 5 PWM_CAPTURE0
Bit 6 PWM_COMPARE0
Bit 7 PWM_OUT0
a. Controlled by bit MAFE_OR_UART4_SEL in interconnect register CONFIG_CONTROL_D

(bit 20).

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Bit 0 SSC0_MTSR_DIN or SSC0_MRST_DIN SSC0_MTSR_DOUT or SSC0_MRST_DOUTa
Bit 1 SSC0_SCLKIN SSC0_SCLKOUT
Bit 2 SSC1_MTSR_DIN or SSC1_MRST_DIN SSC1_MTSR_DOUT or SSC1_MRST_DOUTb
Bit 3 SSC1_SCLK SSC1_SCLK
Bit 4 NOT_CD_REQ[0] or PCMI_LRCLK I1284PERILOGICHIGH
Bit 5 Slave mode I1284HOSTLOGICHIGH or Master mode I1284HOSTLOGICHIGH

PCMI_DATA
Bit 6 NOT_CD_REQ[1] or PCMI_SCLK I1284INNOTOUT
Bit 7 PWM_OUT1
a. Output function selected by bit 24 in interconnect configuration register

CONFIG_CONTROL_B (COMMS_SSC0_DOUT_MRST_NOTMTSR_MUXSEL)
b. Output function selected by bit 25 in interconnect configuration register
CONFIG_CONTROL_B (COMMS_SSC1_DOUT_MRST_NOTMTSR_MUXSEL)
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Bit 0 TTXTREQUEST or OSDENABLE OSDENABLEa
Bit 1 CFC TXTDATAOUTb
Bit 2 YC[7] YC[7]
Bit 3 ASC2_RXD
Bit 4 ASC2_TXD c
Bit 5 PWM_CAPTURE2 or YC[6] YC[6]
Bit 6 SCCG_EXTCLK PWM_COMPARE2
Bit 7 PWM_OUT2
a. OSDENABLE output function is selected rather than PIO by interconnect configuration

register CONFIG_CONTROL_C, bit 2 (CONFIG_OTHER_ALT_PIOPORT4[0]). The output
can then be turned off by the MPEG video decoder to use OSDENABLE as an input.
b. TXTDATAOUT function selected by interconnect configuration register
CONFIG_CONTROL_C, bit 3 (CONFIG_OTHER_ALT_PIOPORT4[1])
c. After reset, register CONFIG_CONTROL_C bit 4 must be set to 1 to pass PIO data or to use
ASC2_TXD in alternate output PIO mode.
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Bit 0 IRB_IR_INa
Bit 1 IRB_UHF_INb
Bit 2 Infrared transmitter/receiver drive PPM
Bit 3 Infrared transmitter/receiver drive jack (0 or z)

open drain jack output c, d
Bit 4 YC[5] ASC3_TXD or YC[5]e
Bit 5 ASC3_RXD or YC[4] YC[4]
Bit 6 NOT_ASC3_CTS or YC[3] YC[3]
Bit 7 YC[2] NOT_ASC3RTS or YC[2]e
a. The wake-up from low power mode function is enabled by interconnect configuration register
CONFIG_CONTROL_D, bit 21 (RC_IRDA_DATA_IN_EN).
b. The wake-up from low power mode function is enabled by interconnect configuration register
CONFIG_CONTROL_D, bit 22 (UHF_IN_EN).
c. PIO needs to be configured as open drain in alternate output mode to use infrared transmitter/
receiver drive jack.
d. After reset, bit 5 in CONFIG_CONTROL_C must be set to 1 to pass PIO data or use infrared
transmitter/receiver drive jack in alternate function mode.
e. Output function selected by bit 11 in CONFIG_CONTROL_E
(CONFIG_OTHER_ALT_PIO_YC)
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SOURCE OF DOCUMENTATION
IC1905 Sil9021.
SILICON IMAGE Data Sheet:
SiI9021 HDMI PanelLink Cinema Receiver
Doc: SiL-DS-0117-A . August 2004.
IC201 TDA9886.
PHILIPS Semiconductors Product Specification:
TDA9885;TDA9886 I2C-bus controlled single and multistandard alignment-free IF-PLL demodula-
tors. 2003 Oct 02
http://www.semiconductors.philips.com/acrobat_download/datasheets/TDA9885_TDA9886_2.pdf
IC301, IC302 TDA8931.

PHILIPS Semiconductors Preliminary Data Sheet:
TDA8931 Power Comparator 1x20W
Doc: 9397 750 13847 Rev.01. 14 January 2004
http://www.semiconductors.philips.com/acrobat_download/datasheets/TDA8931_1.pdf
IC3002 VCT69xyP.
MICRONAS Avance Information:
VCT69xyP Video-Controller-Text-Audio IC Family for DoubleScan and FPD TV
Doc: 6251-644-1-1AI. November 3, 2004
IC202 STV0360.
STMicroelectronics Data Sheet:
STV0360 COFDM demodulator IC with A/D converter.
Doc: 7283434C. January 2003.
IC4001 STi5516.
STMicroelectronics Data Sheet:
STi5516. Decoder.
Doc: 73688668. Oct 2003.
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CHASSIS LAYOUT
Power Supply Unit Layout QPWBFD605WJN5
LUG704
A B C D E F G H
I QPWBSD605WJN5
212
3 2
324
D734
711
4 1
750
RDA703
T702
RDA705
719
721
D728
16
C767
C758
H LUG701
704 703
L752
9
D762
3
RDA704 741
120
T701
L753
C725
706 742
323
D736
9
8
1
1
207
9
743
C735
802
1
P702
IC704
113
LA
2
702
305
23
203
1
D737
C736
C752
1
C744
412
109
117
C723
C768
D739
204
115
119
701
7
202
107
P704
G
9
D771
C755
313 205
211 PRI. SEC.
420
206
R751
D729
C756
D735
14
708
723
C740
724
1
1
903
C751
735
16
408
P701
C757
312
421
804
C741
801
C708
C778 404
C742
302
419
C754
0
R76
727
725
411
422
423
C709
C777
114 C734
C705
F
805
210
401
118
402
9
C743 1 4
410
902
D730 316 L701

405
417
416
729
728
2
112
409
3
IC705
415
L702
R702
1
1 4
DUNTKD605WE
D731
413
2
733
732
731
3
102
R853
R704
C762
7
R701
315
RDA702
707
308
705
734
309
VA701
R855
738
904
P703
C704
E
LUG702
C706
746
747
306
R854
C707
739
720
1
T703
213
108
RDA701
307 T4AL 250V 1 2

D701
SC701
SEC.
VA703 (L) (N)
F701
VA702
PRI.
C782
1
12
C761
709
1 4
740
E701
103 D732
2 3
C712
106
1
4
744
111 D733 745 TH701

2 3
116
414
418
D 317
749
726
748
C780 C779
C781
716
712
RY701
LUG
703
1 2 3 4 5 6 7
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Main Unit Layout QPWBXD890WJN2
SC2301
KD890 XD890WJN2
Q1910
D1902
C1904
D1904
D1910
C1903
D1901
D1909
Q1909
R1909
R1906
15 1 23 1
LUG1701
IC1901
FB2302
5 8
8
5
D1908 14
22 SC2707 2
IC1902
SC2705 2
C2731 P2702 60
RJ1708
2
TH3001
LUG1703
C3044
1 4
C1751
C1750
C1749
C1748
R1738
R1749
4
1
FB1902
R2307
H RJ3020 FB2301 C1901 1

C1902
LUG1705
RJ3014
RJ3013
RJ3023
RJ3025
RJ3024
C1976 C1977
R3002
a
FL1902 FL1901
R1902
FB1906
C1911
1 59
P2302
RJ3016
1
19
C3036
C3019
SC1902
C1910
8
3
LUG1709
FB3006
KM LB
FB3010
L1905
R1927
P1701
1 C3008 C3005
36
C2316
32
1
L1906
R2321
144
R1925
37
FB3009
C3002 C2312 FB2303
L1907 C3041 C3010 C2311 FB2304
C3040
R1924
P2304
FB3005 1 20
C3004
FB3002 LCD+5V
IC1905
C3012
X3001
L1908
R1923
R2309
FB3004
G
C3006
R1901 R2311
C3007
FB3003
L1901 IC3004
FB3015
R1922
C1739
R1714
C1740
3
RJ3004
C3009
P2305
LV
C3048
R1903
C1755
R1770
C3043
R1921
L1902
19
C1741
C1753
72 4 5
109
L1903 FB3012 ANT+5V
73 108
C3030
S+8V C1724
C1953
SC1901
R1920 C1721 FB1701

C1954 C3035
C1756
C3021
C3020
RJ3018 R2315
C3016
R1935 R2724 RESET-TP
L1904
1
R1928 R1926
L1701
C1923
C1922
C1929
C1942
C1943
C1934
R1933
R1932
R1929
1
C1720
Q2701
Q2702
X1901
R2703
R2704
C1961
F
R3306 RJ3001
C1723
R3307 RJ3003
IC3303
IC3304
C3342
R3318
R3316
R3315
R3317
R3314
R3308 RJ3002 C1706

C1722
R3319
C2705 3 1 3 1
C1718
FB2707 C1708
D3301
C3325 D1704
1
R2707 R2709 R2711 1
C2306
LUG1706
P2306
FB2708 R3320
R3313
D1702
R3013
C2703
3
IC1706
FB2706 C2709
9
8
FB3016
RJ3036
RJ3035
RJ3034
RJ3033
5
C3042
R3011
R3009
R3305
Q2705 BU1.8V
C1716
P+35V
R2305 R1752
RJ1705
D2701 D1703
C3335
BU3.3V
2 SC1702
C3302 C3327
R2713
R1759
FB3301 C3331
C3340
D2705 FB3302 C3332

C3328
1
BU+5V 28 IC3003 15
Q2704 C3330 +1.8V
E
J2701
FB3305
FB3304 C3334
P2301
C2707 4 1 FB3303 C3333
C3329 C1735
L1702
1
FB3306
1
IC2303
C3336 14
SH
R2333
22
C2307
23
R2335
8
5 FB3307
D1707 R2341 FB3019
D1710
C3306
1
R1739
C1761
+5V
C1733
R1728
3 1
R2717
IC2705
RJ2301 R2705
D1706
R2721 R2715
IC2701
IC1704
4
RJ2303 9 R2720
C1762
SC1701
8 6
C3338
R1740 4
R2719 C2719
6
C2728
D RJ2719
Q1703
R1713
C1703
R1720
C2727
RJ2302
10
FB3308
C2714
C2711
R2718
16 1
+3.3V RJ3030
C1707
R1724
RA
P2303
C2706 RJ3039
D2305 D2309 R2339
FL2301 C2308 D2310
BU+12V
RJ3031
LUG1708
FL2303 C2310 D2312

C2720
D1713
FL2302 C2309 D2311 RJ3032

1
R1734
R1735
R1732
SC2303 C2704 LUG1707

C2708 C1715
FB2705
RJ2736
RJ2712
RJ2713
RJ2709
RJ2702
RJ2705
RJ2704
RJ2703
RJ2722
RJ2721
RJ2717
RJ2730
RJ2729
RJ2735
RJ2734
RJ3022
RJ3041
C2702
RJ2732
RJ1701
RJ2737
FB2710
RJ2728
RJ2731
R2706
FB2715
RJ2714
RJ2725
RJ2726
C2732
FB2709 RJ2727 22 LUG1704

2 RJ2723 2 2 22
22
C
J2702 LUG1702
23 1 23 1 23
1 SC2702 SC2703 SC2704
CPU A B C D E F GH
1 2 3 4 5 6 7
100
LC-26GA5E
LC-32GA8/LC-32BV8 LC-26GA5E
LC-32/37GD8E/RU
LC-32GA5E
LC-37GA8/LC-37BV8 LC-32GA5E
LC-32/37BT8E/RU
Inverter
Inverter UnitUnit Layout
Layout RDENC2266TPZC
RDENC2266TPZC
G Inverter
Layout RUNTKA216WJZZ
RUNTKA216WJZZ
Inverter
Layout RUNTKA217WJZZ
RUNTKA217WJZZ
1 2 3 4 5 6 7
101
70
LC-26GA5E
LC-32/37GD8E/RU
LC-32GA5E
LC-32/37BT8E/RU
AV Unit Layout QPWBX604WJN3
1 2 3 4 5 6 7
102
LC-26GA5E
LC-32/37GD8E/RU
LC-32GA5E
LC-32/37BT8E/RU
KEY Unit Layout QPWBX606WJZZ
RC/LED Unit Layout QPWBX607WJN1
TUNER Unit Layout QPWBX609WJN3
DUNTKD609WE D203
C244
D204 FL202 C226
3
1
LUG201
L212
a
C279
IC205
IC207
4 5
4
3
24
1
X202
FL201
TU201
1
C252
6
Q205
L206
IC202 R245
C246 49
64
C270
C221
13
A B C D E F GH
B
IC201
48
R263 1
12
2 1
C242
C247
3 4
X201 IC206
C237
C261
16 33
C217 C230 L207 17 C273
P201 32
C241 Q209 R273
16
9 C249 P202
R272
4
5
LUG203
8 5
8
15 1
IC208
C206
1 8
C201
LUG202 4 1 IC204
IC203 C204 QPWBND609WJN3 23 1
1 2 3 4 5 6 7
103
LC-26P70E
LC-26GA5E
LC-26GA5E
LC-32/37GD8E/RU
LC-32P70E
LC-32GA5E
LC-32GA5E
LC-32/37BT8E/RU
LC-37P70E
Digital Unit Layout QPWBX628WJN2

LC-26/32/37P70E Digital Unit Layout QPWBXD628WJN2
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1 1 2 2 3 3 4 4 5 5 6 6 7 7
102
104
LC-32/37GD8E/RU
LC-32/37BT8E/RU
OVERALL WIRING DIAGRAM

LC32/37GD8E/K/F/I/RU
WIRING DIAGRAM
LC32/37BT8E
LCD-MODULE
I
R1LK315T3LF15 (32) A3IU32D8E1
R1LK370T3LZ5BX(37) A3KU37D8E1
SERVICE EXTENSION CABLE
QCNW-E546WJZZ (7P)
QCNW-E542WJZZ (23P) TFT LCD PANEL
QCNW-E543WJZZ (9P)
QCNW-E544WJZZ (15P)
QCNWKA011WJZZ (FOR DIGITAL 60P)
QCNWKA012WJZZ (FOR DIGITAL SOFT WRITING)
QCNWKA015WJZZ (FOR MAIN SOFT WRITING)
80 1 80 1
H CORE RCORFA064WJZZ CORE RCORFA064WJZZ
KEY UNIT
DUNTKD606FMV0 KM 1 80 1 80
CKITKD609FM01 (SERVICE) P153 CN4

CN5 BACK LIGHT
(32/37) 1 3
LCD-CONT-UNIT
QCNW-E232WJQZ(32)
QCNW-E412WJQZ(37)
CN3 CN1 CN2

G 1 10 1 32 1 7
T1 (32) CN4 (32)
INVERTER T7501(37) CN7504(37)
-UNIT
QCNW-E684WJPZ(32/37)
QCNW-E234WJQZ(32)
QCNW-E609WJQZ(37)
TUNER-UNIT
T2 (32) CN5 (32)
DUNTKD609FM01 (32/37) T7502(37) CN7505(37)
B to B
TUNER SC4601
F TU201
P201 P202
DIGITAL UNIT
RCORF0103CEZZ (37)
15 1 23 1
RCORFA023WJZZ (32)
20 19
DUNTKD628FM01 (32/37)
15 1 23 1 LB *8(32) *8(32)
SC2301 P1701 CN4190
SC2705 SC2707 P4003 *5(37) *5(37)
1
RS-232C B to B 2 1
100 8
P2702 LB(37only)
1 8 CN7502
P4001
SC4602 1 T6 (32)
KM 3 CORE CN9 (32)
P2302 - (37) - (37)
1 QCNW-E419WJQZ(37)
E CARD SLOT
32 QCNCMA199WJSA
HDMI SC1901 MAIN-UNIT LV
DUNTKD890FM06 (32) P2305
EXT5 DUNTKD890FM07 (37)
1
T7 (32) CN10 (32)
HDMI P2306 - (37) - (37)
AUDIO L/R J2701
LA
SH 7 P704 1 1 LA
QCNW-E799WJQZ(32)
P2301 QCNW-E415WJQZ(37) CN3 (32)
1
CN7501 (37)
9
14
P702 14
D-SUB RA SC1702
SC2303 T8 (32)
D
1
CN11 (32)
P2303 1 1M3819(32) - (37) - (37)
EXT4 CORE 23
RUNTKA216WJZZ
D-SUB J2702 RCORFA023WJZZ(37only) 10
37 UNIT 1/2
AUDIO L/R P701
SC1701
SC2702 SC2703 SC2704 SC7503
1
POWER-UNIT
1 23 1
23
1 23
DUNTKD605FM14(32) - (32) - (32)
P1101 P1102 P1201 CN7705
DUNTKD605FM03(37) T7701(37) CN7701(37)
C EXT2/
EXT1 J1101
AV-UNIT
SC301 P703 AC-IN
DUNTKD604FM10 (32/37) 7 7 SC701
*4(37) *4(37)
1 1
Y/C L R
IN OUT OUT
J1201
EXT3 CVBS L R CORE
IN IN IN (RCORFA020WJZZ) - (32) - (32)
SP T7704(37) CN7704(37)
P301 AC-CORD
HEADPHONE
OUT
J1301 4 1 AC-IN
RUNTKA217WJZZ
B QACCKA021WJPZ (E/I/F/R)
37 UNIT 2/2
CORE CORE RCORF0103CEZZ(32/37) QACCBA073WJPZ (K)
RCORFA023WJZZ(37only)
(32/37)
RCORF0103CEZZ(32only) R L
QCNW-E800WJQZ(32)
QCNW-E233WJQZ(32) QCNW-E801WJQZ(37)
QCNW-E413WJQZ(37)
R/C LED UNIT SPEAKER R SPEAKER L

B R
P101
DUNTKD607FMV0 RA RSP-ZA184WJZN1 RSP-ZA184WJN2
(32/37) (32/37)
A3KU2655EJ (SERVICE) R B
A (32/37)
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
105
LC-32/37GD8E/RU
LC-32/37BT8E/RU
BLOCK DIAGRAM
System Block Diagram

32/37GD8E/KS/F/I/RU BLOCK DIAGRAM
BT8E
I
KEY-UNIT
4 5 6
DUNTKD606FMV0
(26/32/37)
CH+ CH- INPUT VOL+ VOL-
LCD-MODULE R1LK315T3LF15(32) A3IU32D8E1
POWER SW A3KU2655EK
OFF
ON
S156 (SERVICE)
P0035GE RRMCGA472WJSA(GD8E)
TFT LCD PANEL
1 2 3 P153 RRMCGA490WJSA(BT8E)
TUNER-UNIT
IF-AGC IC202
CKITKD609FM01 (32/37)
IC201 14 COFDM-
DEMOD-IC
H
SIF 23 IF(D1/D2)
FL202 24 IXB682WJ
IF-DEMOD 10/9 12
IF(A) 23
8 VIF 1 TDA9886 TSDA/SCL 19/18 36
FL201 2 38
21 43
5V/5V(CONT)
TU201 7 1 10/11 17 12 20 45 40 34-25
IF-AGC
9 FED[0:7]
CN5 CN4
IF(D1/D2)
FE**
FESDA
FESCL
RTUNQA033WJZZ 10 11
(P70E) SDA/SCL
5 4
Q205
2
AGC IC203 14/15 13/1
12 SDA
Q209
CORE RCORFA064WJZZ CORE RCORFA064WJZZ LCD
7 IC204 (32/37) (32/37)
1 5 2 SCL
P201
BACK-LIGHT
CVBS
MULTIPLEX P202
AGC
SIF
I2CSEL 9-11 QCNCMA012WJ 1 3 QCNCMA250WJ

21 | |
20 12 10/9 2 1 23 20 11 CN5 CN4
RCORF0103CEZZ(37)
22
50 37 25 36 LCD-CONT-UNIT
| | 39 29 21 24 32
MAIN-UNIT SC2705
M2
SC2707
M2
57 58 41 27 19 23 20 28 33 M2
P2702 KM
P2302
SEL
SDA
DUNTKD890FM06/07
SCL
I2C
FESDA
FESCL
FESDA
H/V
FESCL
FE**
I2CSEL
FE**
D-L/R
FED[0:7] KEY
D-R/G/B
(32/37) PANEL
DTUNER-CVBS
KEY-PSW 2 GRAY LEVEL COM-BIAS
RCORFA023WJZZ(32)
1
POW BLOCK
G
AGC
ADJ.DRIVE ADJ
PC-INPUT RS-232C M5
BU3.3V
13 IC2301 11 TXD LB(37)
3 I2C DTU-ON
RS-232C SEL 3 P1701
1 REG/
Tra/Receiver DTM-RESET REG2
6/7
DRAM
8 9 RXD 2
2
H-SYNC IC1710 OSC(37) OSC
8 4
ISL83220 V-SYNC
INV-BRT(FL-OFL) PANEL CONTROL
27/26 OFL
M5 SDA 7 3
SCK INV-ON(BL-ON) STB CORE
FPGA 5 2 VOLTAGE
SC2301 SDE
BL-ERR REG EPROM
42/35/41
QSOCDA036WJ 5
PCLK PCON1
12 97 8
ATUNER-CVBS
PCON2 M6
RESET IXB823WJ 91 37only
14
S-MUTE
100 CN2
CN1
M6
SIF
LV
HDMI-WP
P2305
21
1.8V 3.3V LCDUD/LR LCDUD/LR
IC3001
5/6
24/23 4/5 32 INCH INVERTER UNIT IM3819
E2PROM 25 FRAME
BR24L64F IC3003 TEMP1-3 CN3 CP4 5A
F
74 99 4/5
M3 6/7
MICRO
OPC-IN LVDS_ CN4
HDMI-RST 2 CN/CP
11/10 CP3 5A T1
102 11
IC1905 HDMI-R CONTROLLER LEDPOWR/G 1-5 24V
119-110
HDMI-G SDA3
9/10 LVDSxx 50 41 19 CP1 1A
132-123 A
RX2+/- HDMI-B SCL3
17 IXB664WJ OPC/SLP | / / 43 29
1/3 71/70 SC4601 33 36 32 28 25 24 20
EXT-5 RX1+/-
144-133
HDMI- 18
28/27
M5 DIGITAL-UNIT
23 57 39 21 45 27
L R B
67/66 HDMI SDO/ 16 CCP-1
IC4701 RSTIN Q16
4/6
DUNTKD628FM01(32/37) 3.3V IC4604 B3.3V
H/V
14 POWON
FED
RECEIVER WS/
8 8 8 PIC16F913
RX0+/- SCK 15 MUTE-SP P2306 OP-AMP CN5
TVSCA
HDMI-IN VA1 19
TVSCL
7/9 63/62 84-86 22 5V IC4702 IC4002 T2
Q4607
SDA3 12 7 8
8
RXC+/- SCL3 13 26 M3 3 FED 8
FED[0:7] 1
10/12 59/58 27/28 Q17 C
HDMI- 2
TH3002 IC4003
EQ
EQ
EQ
Q4601/2
INV-ON
Q4603/4
SDA/SCL INT VA2 18
Q14
Q4605/6
SC1901 16/15 29/30
SII9021
104 SC4602 IC4402 RESET 12
H-SYNC
KEY,KEY-PSW BU4228G D
V-SYNC
8 3-STATE EMIA IC4204 5 9

20 Vcc
GPIOO/IOI
M1 CIA
RXD
G
TXD
B
5/6 7 2/3 BL-ERR 10 D1
H/V
OUTPUT E2PROM 6 Q18

M1 IC1901 Q1901
DTUNER_R/G/B P2301 D4 CN6
I2CSDA
8 BR24L64F
I2SSCL
FED[0:7]
Q1903 HDMI LVC573AP VB2
QSOCZA117WJ E2PROM LVDS_CN/CP D3 D2 17 T3
CVBS
HS/VS FRAME Q4001
MUTE
24LC2BIN LVDSxx 10 7 Q4002
IC5 IC1 E
M1 D-L/R TEMP1-3 D65
24LC2BINEES
2/3
4/6
8 CIA IC4405 EMIA
EMIA AA3 AF9 AF12 AF13 AD1 P4001 INV-BRT
3-STATE AE12 U1 AF1 AF6 1 Duty VB1 16
AUDIO R (SERVICE) ROMSEL0
OUTPUT 8 AC5 AE1 AF11 AC1 AB1 TXD 13 F
H/V
5 CN4190 16
RXD Q19
S2_MUTE
191 159 102 38 73 57 91 122 109 141 M5 TS2D[0-7] LVC573AP AC11

65 | 119 84 162 132 |
L IC2701 31 39 |
| 92 120 115 83 90 131 128
TS2D*** 11 D3 AE6 CN7
40 66 50
J2701 M2
6
10
4
12
H/V
SELECTOR B
58
G R
116
117
181
180
RA P2303 TDI/TDO
FE*** 4 IC4001 2 BCT T4
CI*** 4
QJAKEA073WJ
DH/DV 179 OPC 6 TMS/TCK DIGITAL P4003 G
7/9 SYNC 33 5V CORE
E
171
47 LEDPOWR/G CS3 PROCESSOR 3
IC3002 18 8V 5/4 8 IC4401 EMIDM 8 BE0 N4 AC21
PWM-SEL INV-CTL H
RCORFA023WJZZ(37)
5V CID N3 AD21
5/11 TXD
EXT-4 9
PCV
14/2 M2
174
192/170/133 BU3.3V
OPC/SLP
9/7
OCTAL
TRANCEIVER
RQ1
R3
IXB680WJ RXD
14
V 9 CN8
R/G/B
1/2/3 173 IXB624WJ(GD8E) 185/169/142 BU1.8V
M5
IC4403 TCLCX245 CPU T5
PCV DTVPC 172 D3 WAIT
P4 D1
H/V DTVHDMI
13/14
(A/B) 9 VCT6973 6 RT F/B 8 3
D-SUB-15 10 M3
28/27
SC1702 IC4404 4
EMI
11
EMIDM
EMIAM
25/26 4 CIOE BUFFER EMI
22
16
SDA/SCL PCON1
12/15 IC3005 16/15 1 /LINE I 10
16
14
7
5 CT
8 IC2705 DRIVER
SC2303 5/6
RESET 187
175 189
178
177 VIN7 DTUNER-CVBS
PCON2
2 CARD-SLOT LCX244MT D3 12 SS
M3 188
M5 IC2303 D-L/R 190 182 160 14 24 176 161 12 22 184 INV_ON
4
13 23 11
16
QSOCNA229WJ E2PROM 195 87 194 88 21 183
INV_BRT IC4406 EMICS3
BR24C21F 5
7
R 4 10/9 CE1 EMIBE0
16
SMIAM
IN3YV 4 REG
SDIDM
PWM-SEL 9 3 DRIVE
15
22
M5 9
SMI
R CIRCUIT2
VIN2
5 3 OR
EMIAM
EMIDM
EMIAM
IXB731WJ D3
C
EMIDM
AUDIO R (SERVICE) M6 QCNCMA199WJSA 3 OVP 14
VOUT2
R 2
EMI
EMI
VOUT1
IN1_FSW
IN2_FSW
AOUT1_R/L
IN1_L/R
2
AV-LINK1
D2 IC4407
AOUT2_L/R
IN2_L/R
AV-LINK2
SC1701 99 CD1
L 11 CIIRQ0
R1(C1)/G1/B1
L
R2(C2)/G2/B2
35V 52
J2702 M2 14 13 L
1
OR
IC4203 IC4202 IC4201
OUTMON_L/R
D3
HPOUT_L/R
OPEN 13.5V
MUTE_-SP
IC4
CVBS/Y-IN
4-6 64MSDRAM
S2_MUTE
16M-FLASH 64MSDRAM 4
SPK_L/R
S-MUTE
L 15 A
IN3_L/R
POW_5V CN11
SLOW_SW2
6 4
SLOW_SW1
QJAKEA073WJ 10-15 IC4408 T8

IC2702
IC2704 BU+5V WAIT CPUWAIT IXB681WJ IXB076WJ IXB076WJ

20-21 87 D2 D2 D2 B
VIN2
CD4052BP
O
VIN_1
VIN_2
M2 NOR D3
D
M6 IC3
4 4 SC2703 C D E F G H
6 1 13 18 6 1 13 18 2 6 9 14 P
SC2702 10 15 8 2 3 12 17 10 15 8 2 3 12 17 23 21 19 1 5 11 10 13 15 7 SC2704
I J K L M N O P
M2
M2 M2
POWER-UNIT DUNITKD605FM14/03 (32/37)

RY701
DUNTKD604FM10 (32/37) LA 37 INCH INVERTER UNIT 1/2 RUNTKA216WJZZ
AV-UNIT P1101 P1102 11 P1201 (32) C705 C706
13.5V
CN7501
F7501 6.3A
220 &L220 &L
400V 400V Q721 24V ZD7502 ZD7501
P-CON2 P701 1-5
20 VIN1(Y/V) T7501
EXT-1 CN7504
HPMUTE
VOUT1 IC1102 6 OPEN (37) C705 C706 35V 35V

2 14
19 +8V 270 &L270 &L T701 1
4 D701 D735
R(C1)/G/B -AIN 400V 400V 7
15/11/7 380V 30V 13.5V 4-6 19
PRE-DRIVE
1 16 VA1
Q7517/22/18
SCART1 10
A-IN-L/R C762 D741 5V
10-15
Vcc 2 20 Vcc 8 Q7528 A
D759 PRE-DRIVE B
6/2 IC705 LB VA2 18
A-OUT-L/R RDA702 SW-REG 15 D738 BU5V Q7515/21/18 Q7527
3/1 35V
20-21 CN7502 D7501 9 T7502
FAST-SW1/ MR4020 14
SLOW-SW1 OFL VB2 PRE-DRIVE
R828 GND 17
J1101 16/8
1 2 4 C754
D753 3 1 Duty Q7514/20
Q1107 9 7 D754 IC7502 10 Q7526
AV D739 PRE-DRIVE
Q1106 Q1108 S_MUTE
13.5V VB1 16
FB
QSOCZA116WJ BRT
VCC
Q1105 S_MUTE OUT1-L/R 13 Q7513/19
C
900V 8
I-DET
VIN2(Y/V) 3 D756 P702 Vcc C D

41 TH701 D725 C757 Q7502 IC7501 Q7525
EXT-2 VOUT2 IC1101 2 6 VA702
HXA033WJ 5 12 PCON1 Q7501 Q7503
CN7505
40 1
4 SC301 REG
R(C2)/G/B 11 REG 4 3
36/32/28 PCON2
6 2
AV-LINK 2 BCT
31
SCART2 A-IN-L/R
T703 Q724
D737
INV_ON
4 7
REG2
Q7504 E
27/23 7 5V INV_BRT
A-OUT-L/R
+8V
30V 10
C752 D751 5V 5
24/22 -AIN D724 Vcc I-SENCE 10
FAST-SW2/ PWM-SEL
SLOW-SW2 9 IC7502 11 I-sen
J1101 37/29 Q726 D731 ERR
12 SS
AV P703 5
Q1102
S_MUTE Q1103 S2_MUTE D778 D726 3
REG
QSOCZA116WJ IC1201 OUT2-L/R S_MUTE Q708 14 INV-CTL
Q1101 Q1104 D777 30V 24V REG 3 14 24V
4 S2_MUTE +8V 1-3
CVBS-IN 2 IN3YV D730
EXT-3 1
6 -AIN Q730
BD9777FV 2
Vcc
3 REG
L701 IC706 STB
2 Q7511
A/V-IN L702
3/5
LIN/RIN 5-7
V-SENCE 9 IC7502 D7516
13
LOUT/ROUT 7 D732 Q731
Vcc Q7512 A
A-OUT 13/15 OUT3-L/R
Q1204 Q710 OSC B
S/VIDEO Q1201 4 5 CT D7517
11 Y Q1203 S_MUTE S_MUTE IC708 D746
7 C Q1202 NJM2904 D733 C
Q723 Vcc 6 RT
J1201
IC303 C704 P-CON1 Q7507 OVP 14
B
AV L L 1 3 L Q713 D
R Q7505
QJAKZA033WJZZ P-CON2 REG
Q306 OP-AMP VA701 P704 6 E
5 R 7 5 R T702 Q712
HEAD 4 L Q305 R Q301 380V
IC301 SPR
NJM4558M 1 24V 24V CN7503 Q7506 Q7509
PHONE 2
3
4 MAIN
-AMP
13/16
RDA706(37) D728
15 1-5
IC704 Vin=24V
7
R
L IC302 TDA8931T Q302 C744 1-5 6
J1301 8 SPL
S-MUTE RDA703 SW-REG INV_ON Vcc Q7508
1 4 MAIN 13/16 MR4030 (32/37) D762 D736 12 6 2
-AMP INV_BRT
4A
AV Reg
TDA8931T P301 4 2 1 9 13 2 3
QJAKJA007WJZZ 900V PWM-SEL VA1 J
3 14 14 5 7
FB
D7525
VCC
QFS-ZA007WJZZ
R858 VA2
5
I-DET
3 8 T7505
F701
GND VB2 CN7508

RCORF0103CEZZ(32) 6-10 7 9
CORE
RCORF0103CEZZ (32/37) RCORFA023WJZZ(37) Q702
6 6 7 1 2 1
VB1
10
5 3 I-sen
9 11
CORE D734 OVP
Q704
IC707 4 12 I J
STB
RA IC709 8 13
P101 SC701 NJM2903M
SPEAKER L SPEAKER R R
CN7704
B F7701 6.3A
R/C LED UNIT CN7705 37 INCH INVERTER UNIT 2/2
RSP-ZA184WJN2 L G R CORE (RCORFA020WJZZ) F7702 1A RUNTKA217WJZZ
A
G SENS SENS DUNTKD607FMV0 RSP-ZA184WJN1 R
R B
(32/37)
OPC
-LED
SLEEP POW
-LED OPC REMOCON
(26/32/37)
AC-CORD QACCKA021WJPZ(E/F/I/R)
A3KU2655EJ (32/37)
D102 D104 D103 IC101 RMC101
(SERVICE) QACCBA073WJPZ(K)
AC-IN (32/37)
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
106
LC-32/37GD8E/RU
LC-32/37BT8E/RU
Power-Source Block Diagram

32/37GD8E/BT8E/K/F/I/RU POWER-BLOCK-DIAGRAM
KEY-UNIT RRMCGA472WJSA(GD8E)
4 5 6
DUNTKD606FMV0 CH+ CH- INPUT VOL+ VOL-
RRMCGA490WJSA(BT8E)
I POWER SW
(32/37)
LCD-MODULE
OFF
ON
S156
P0035GE
1 2 3 P153 R1LK315T3LF15 (32) A3IU32D8E1
TUNER-UNIT 5V(CONT)
CKITKD609FM01 5V 8V
TFT LCD PANEL
(32/37)
IC204 IC203 Q203

MULTIPLEX MULTIPLEX Q211
FL202
LV4053AT SN2G53CT IC207
SW
IC201 SSM6J51TU
H 3.3V
IF-DEMOD
TDA9886 IC206
7 1
3.3V REG
1.8V
MM3033E
D-TU201
CN5
IC202 IC205
RTUNQA033WJ CN4
COFDM 1.8V REG
RCORFA023WJZZ (32)
RCORF0103CEZZ (37)
P201
DE-MODIC PQ1M185M QCNCMA012WJ
IXB682WJ 8 6 14
RCORFA064WJZZ(37) CORE RCORFA064WJZZ CORE
8 6
MAIN-UNIT
M2
SC2705 P2302
+5V 8V
CN5
DUNTKD890FM06(32)
OPEN
P1701 LCD-CONT-UNIT CN4
LCD
DUNTKD890FM07(37) M6
BACK-LIGHT
IC1711
P2305 M5 CORE
PQ1R50
LCD+5V
28-31
IC1709
PC-INPUT RS-232C SSM6J51TU
G
P2303
M5 CORE
3 BU3.3V BU3.3V BU3.3V 2
2 S+8V S8V IC1703 SC1702

IC2301 8V REG M6
RS-232C PQ20WZ11
M6
SC1701
ISL83220 M6
SC2301 M5 9 35V 1
QSOCDA036WJ
IC1710 13.5V
LCD5V IC1705 4-6
CN1 CN2
FPGA
5V-REG.
SSM6J51TU
(32) *8
IXB823WJ M6 (37) *9
M6
EDID5V 5V 5V IC1704 LCD+5V
5V-REG.
+1.8V +1.8V SSM6J51TU
M6
+3.3V
EXT-5 1/3
F BU3.3V SC4601 POW5V

HDMI-IN
4/6 SC4602
IC1708 POW+5V
7/9
74 99 +1.8V
1.8V-REG. DIGITAL-UNIT
IC1901
20 IC4702 Q4401
10/12 MP1410ES 10-15 DUNTKD628FM01 P5V
E2PROM IC1905
SC1901 16/15 8 IC3003 M6
(32/37) SW SW
24LC2BIN SSM6J51TU TXA026WJ
M1 D4
M1 HDMI IC3001 D3
RECEIVER MICRO IC4604
QSOCZA117WJ 24LC2BINEES CONTROLLER P2702 OP-AMP
E2PROM
(SERVICE) TSH73CPT
SII9021 IXB664WJ D4
BR24L64F
PIC16F913
AUDIO M1 M3
1.8V
M3 IC1707 IC4701 3.3V IC4704
EDID5V +3.3V +3.3V 16-6
+3.3V REG 3.3VREG 1.8V REG 3.3V
J2701 M2
PQ018ENA
PQ20WZ11 MP1583
QJAKEA073WJ S+8V 8V BU3.3V M6 D4 D4
CN4190 P3V3 IC4001

EXT-4 BU+1.8V BU+1.8V IC1706 DIGITAL
1/2/3
1.8V-REG. PROCESSOR
IC2303 MP1410ES
IC4005 IC4002 IC4003
13/14
E2PROM CARD-SLOT INVERTER AND GATE RESET IXB680WJ
IM3819
D-SUB-15 IC2701 33 18 192 185
M6
SN1GU04C SN1G08DC BU4228G 32 INCH INVERTER UNIT
E IC3005 170 169 D1 D1 D1 D1
12/15 BR24C21F SYSNC 133 142
SC2303 M5 SELECTOR RESET T1
M5 BU3.3V IC1702 BU+5V P3V3 CP4 5A
TVHC153T BU4215G CN3
IXB731WJZZS IC3002 3.3V REG CN4
QSOCNA229WJ (SERVICE) M2 M3
PQ20WZ11 20-21 CP3 5A
QCNCMA199WJSA
VIDEO
M6 IC4203 IC4202 IC4201 IC4204 1-5 24V
CP1 1A
PROCESSOR 64MSDRAM EEPROM
AUDIO 16M-FLASH 64MSDRAM
IXB076WJ BR24L64F Q16
IC2704 IXB681WJ
D2 IXB076WJ D2 D2 D2
IC2702/5 Q18
IXB624WJ P3V3
J2702 M2 ANALOG SW
SWITCH VCT6973 Q17
QJAKEA073WJ CD4052BP Q19
MM1507XN IC4401 IC4402 IC4404 IC4405
M2 M2 M3
OCTAL RACHE RACHE
BUFFER/LINE Q14
TERMINAL+5V TRANCEIVER OUTPUT DRIVER OUTPUT 20 Vcc T8
TCLCX245 D3 LVC573AP D3 LCX244MT D3 LVC573AP D3
CN11
SC2702 S8V SC2704
SC2703
19 22 M2
IC4406 IC4407 IC4408 IC4403 IC1
23
Q20
OR GATE OR GATE NOR GATE AND GATE
22
SN1G32DC SN1G32DC SN1G02DC SN1G08DC
INV-CTL Q22
D3 D3 D3 D3
DUNTKD604FM10 19 Q21
AV-UNIT
23
D (32/37)
A+5V
P1101 P1102
A+5V A8V
P1201 Q23
20
EXT-1
19
15/11/7
RUNTKA216WJZZ(37)
IC1102 POWER-UNIT DUNITKD605FM14/03 (32/37) INV(37) UNIT 1/2
10
LA
RY701 CN7501
SCART1 6/2 SWITCH
13.5V F7501
MM1506XN 1-5
24V 6.3A
J1101 3/1 (32) C705 C706 T7501 CN7504
220 &L220 &L
16/8 AV1 400V 400V Q721
P-CON2 P701
AV
QSOCZA116WJ
(37) C705 C706
T701
35V 35V Q7526
270 &L270 &L 1
D701 400V 400V 380V
D735
30V 13.5V
Q7524
41 4-6
1 16
EXT-2 40 IC1101 C762 D741 5V
10-15
LB
D759
IC705 CN7502
36/32/28 SWITCH RDA702 SW-REG 15 D738 BU5V
20-21
Q7525
31 MM1506XN MR4020 14 35V Q7523
GND
27/23 R828 D753
1 2 4 C754
SCART2 AV1 9 7
D739
D754
24/22
13.5V *5
C
FB
Vcc
VCC
13
37/29 900V CN7503
I-DET
J1101 3 D756 P702 6

AV 8V TH701 D725 C757 T7505 CN7508
QSOCZA116WJ
VA702 HXA033WJ 5
12 PCON1
VCC
IC1201 1 15-19
IC303 11
IC7501
EXT-3 1
SWITCH OP-AMP
6
PCON2
2
T703 INV_ON INV-CTL
A/V-IN MM1507XN Q724
NJM4558M D737 4
BD9777FV
3/5 SC301 7 5V C752 D751 5V INV_BRT
AV1 AV1 D724 10 5
PWM-SEL
A-OUT 13/15 9
Q726 D731
S/VIDEO 11 P703
7 B+30V B+30V 1-3 D778 D726 RUNTKA217WJZZ(37)
J1201 D777 Q708
30V INV(37) UNIT 2/2
1-3
AV
D730 Q730
QJAKZA033WJZZ CN7705 T7701 CN7701
L701 IC706 F7701 6.3A
5 L702 15-19
HEAD 4
IC302 IC301
5-7
PHONE 3
2 7 D732 Q731
7
SOUND AMP SOUND AMP Q7526
Q710
J1301 8
1 TDA8931T TDA8931T IC708
NJM2904 D746 Q7524
AV P301 D733
AV1 AV1 Q723 Q7529
QJAKJA007WJZZ C704 P-CON1
1-2 3-4 Q713 Q7527
B VA701
380V
T702 Q712
P-CON2
P704 F7702 1.0A
Vcc
*4
CORE RCORF0103CEZZ(32/37) 1 24V 24V
RDA706(37) D728
15 1-5 T7704 CN7704
IC704 C744
6
RDA703 SW-REG INV_ON
MR4030 (32/37) D762 D736 12
4A
INV_BRT 13
BU3.3V CORE 4 2 1 9
900V PWM-SEL
3 14 14
FB
VCC
QFS-ZA007WJZZ
R858
5
I-DET
RCORF0103CEZZ(32only)
F701
GND
P101 6-10
6 6 2
Q702 7 1
B
SPEAKER L SPEAKER R R
5 3
D734
RSP-ZA184WJN2 R/C LED UNIT RSP-ZA184WJN1 Q704 IC707
(32/37) G R IC709
R
G SENS SENS DUNTKD607FMV0 (32/37)
B SC701 NJM2903M
OPC SLEEP POW (32/37)
-LED -LED OPC REMOCON
D102 D104 D103 IC101 RMC101
CORE (RCORFA020WJZZ)
AC-CORD QACCKA021WJPZ(E/F/I/R)
A QACCBA073WJPZ(K)
AC-IN (32/37)
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
107
LC-32/37GD8E/RU
LC-32/37BT8E/RU
SCHEMATIC DIAGRAMS LC-32/37GD8, LC-32/37BT8 RC/LED Unit Diagram

LC-32P70E/LC-26P70E/LC-37P70E 1U>=%G%8%?%k%7%9%F%‘Bh#3;v6HItBh#25
LC-32P55E/LC-26P55E/LC-37P55E It D9 I{;2;v 78 D9 C4 Ev
LC-32GA9E/LC-37GA9E
Description: LC-32GD9E/LC-37GD9E/LC-45GD9E
LC-32GA8E/LC-37GA8E
LC-32GD8E/LC-37GD8E R/C.LED Ver.N1 (2006.01.26)
I
VOLTAGE MEASUREMENT CONDITION:
1. The voltages at test points are measured on exclusive AC adaptor and the stable supply voltage of AC 230V.
RMC101
RRMCUA053WJZZ
DUNTKD607WEV0 IR RECEIVER MODULE
Signals are fed by a color bar signal generator for servicing purpose and the above voltages are measured with a
20k ohm/V tester. OUT GND VCC SLD101
PSLDM4646CEFW
P101 1 2 3
NA344WJ
TO MAIN 5 RA
INDICATION OF RESISTOR & CAPACITOR:

TL101
R/C 1
TL102
H
BU+3.3V
BU+3.3V 2
TL103 R101
GND 3 C101 100 C102
TL104 100u D101 2.2u
RESISTOR
4 16V EXA092WJ 16V
POWG_LED
ASY 12V
TL105 TVF
POWR_LED 5
1. The unit of resistance “Ω ” is omitted. (K=kΩ=1000 Ω, M=MΩ).

TL106 R108
OPC 6 270
TL107 3 4
7
2. All resistors are ± 5%, unless otherwise noted. (J= ± 5%, F= ± 1%, D= ± 0.5%)
SLEEP_LED
TL108
1 2
NC 8
TL109 R109
3. All resistors are 1/16W, unless otherwise noted.

R114 D104 1.2K
LED_OPC 9 PX0419CE D103
820
PX0210TA
GND 10 TV POW
BU+3.3V
4. All resistors are Carbon type, unless otherwise noted.

C : Solid W : Cement G
S : Oxide Film T : Special
N : Metal Coating R112
470 D102
PX0202TA
CAPACITOR
BU+3.3V BU+3.3V
C105
1. All capacitors are µF, unless otherwise noted. (P=pF=µµ F).

0.01u Z
0 3.3 50V
2 3
2. All capacitors are 50V, unless otherwise noted. IC101

TPS850
3. All capacitors are Ceramic type, unless otherwise noted. F OPC
(ML): Mylar (TA): Tantalum

1 4
0 2.5
(PF): Polypro Film (ST): Styrol C104

10u
LC-32P70E/LC-26P70E/LC-37P70E
16V
ASX
CAUTION: LC-32P55E/LC-26P55E/LC-37P55E 1U>=%G%8%?%k%7%9%F%‘Bh#3;v6HItBh#25;=QIt

This circuit diagram is original one, therefore there may be a LC-32GA9E/LC-37GA9E It D9 I{;2;v 78 D9 C4 Ev
slight difference from yours. E LC-32GD9E/LC-37GD9E/LC-45GD9E
LC-32/37GD8, LC-32/37BT8 KEY Unit Diagram
LC-32GA8E/LC-37GA8E
LC-32GD8E/LC-37GD8E
IMPORTANT SAFETY NOTICE: KEY
Ver.ZZ (2006.01.26)
PARTS MARKED WITH “ ! ” ( )

ARE DUNTKD606WEV0
IMPORTANT FOR MAINTAINING THE SAFETY OF CH-UP

S151
"% CH-DOWN
S152
!!"’ INPUT
S153
VOL-UP
S154
"% VOL-DOWN
S155
!!"’
THE SET. BE SURE TO REPLACE THESE PARTS D

K0003AJ K0003AJ K0003AJ K0003AJ K0003AJ
WITH SPECIFIED ONES FOR MAINTAINING THE TL159 TL160 TL161 TL162 TL163
SAFETY AND PERFORMANCE OF THE SET.
P153
NA057WJ
D151
R152 R153 R151 R156 R155
TO MAIN 5 KM EX0641GE 430 8.2K 1.8K 910 4.3K
TL152
POW 1 1/8W 1/8W 1/8W 1/8W 1/8W
C
TL153
KEY 2
TL151
GND 3
6
S156
P0035GE
3
A
1 2 3 4 5 6 7 8
108
LC-32/37GD8E/RU
LC-32/37BT8E/RU
LC-32GD8, LC-32BT8 Main Unit Diagram 1/6 (HDMI)
LC-32GD8E
HDMI
(MAIN 1)
CONFIDENTIAL Ver.N2 (2006.05.16)
Ver.N2 (2006.05.16)
TO MAIN 6/6
EDID5V
I DUNTKD890WE06 D1901
TL1909 TL1911
3
DAN202K EDID5V
R1913
FB1901 +3.3V
47K +3.3V
2 0060TA R1914
3 10
+1.8V
4
1 *C1901
D1903
47u
1SS355 2 1
16V R1906 TO MAIN 3/6
ASY 47K
4 3 HDMI_INT
C1903
0.1u Z HDMI_RST
25V
TP1911
SC1901 HDMI_WP
ZA117WJ
5.0 5.0 5.0 5.0 TL1915 HOTP_CONT0

20 21
2 4 6 8 10 12 14 16 18 8 7 6 5
HOTP_CONT1
TP1916
VCC WP SCL SDA
1 3 5 7 9 11 13 15 17 19
22 23 SDA3
IC1901
H R1903
1.5K
24LC2BIN SCL3
EEPROM
A0 A1 A2 VSS
1 2 3 4
R1901 TP1909 TP1913
0 0 0 0 X1901
HDMI_WS
2.7K DINR[7]
HDMI_SDO
HDMI_SCK
SCA108WJ
28.322MHz
DINR[6]
Q1903
2SK536 DINR[5]
4.5 3.2 R1932

DINR[4]
D S 1M
R3306 R3307 R3308 DINR[3]

Q1901 C1929 C1934 22
22 22
2SK536 G 3.3 12P 12P
DINR[2]
3.2 (CH) (CH)
L1901 4.5
FA134WJ D S DINR[1]
RR1XC- HDMI_RST
4 8
3
DINR[0]
G 3.3 R1911 FB1904

G R1933
3 7 470K 0060TA
Q1909 +3.3V(D)_FB1902
1.5K DING[7]
+3.3V_IOVCC
2 6 DTC144EE +3.3V_IOVCC
DING[6]
4
+3.3V(D)_FB1903
RR1XC+ FB1907
5.0 0 C1936 C1943 C1956
1 5 HDMI_WP 0210TA
FB1905 1000P 1000P 1000P DING[5]
0060TA
*C1906 C1953
RR1X0- C1919 C1921 R1928 DING[4]
4 8 0.1u 0 10u 10u
C1923 22K 0.1u Z
25V Z 1000P 25V
HDMI_RST
16V 16V R1929 R1936 DING[3]
3 7 L1902 KZA073WJ TP1907
KZA073WJ 4.7K 33
FA134WJ
DING[2]
2 6 TP1901 R1935
HDMI_INT
33
RR1X0+ DING[1]
1 5
R1926 DING[0]
1.67
1.75
1.8
3.3
3.3
3.3
1.8
1.8
3.3
1.8
3.3
1.8
4.7K
0
RR1X1- R1937
4 8 Q1905 Q1907 10K 108 107 106 105 104 103 102 101 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 75 74 73 DINB[7]
C1912
DTC144EE DTC144EE 1000P
3 7 L1903 DINB[6]
WS
NC
NC
NC
+3.3V_IOVCC
OGND
NC
NC
GND
VCC
GND
DGND
GND
SD0
VCC
OGND
OVCC
VCC
DVCC
OGND
SCK
SCDT
OVCC
FA134WJ R1920
INT
DGND2
TEST
DVCC2
SPDIF
REGVCC
MUTEOUT
CLK48B
RESET#
MCLKOUT
0 2.4 2.4 0 3.3
MCLKIN
0
XTALOUT
XTALIN
XTALVCC
F
2 6 10 109 OVCC 72 DINB[5]
AGND
RR1X1+ DINR[7] 3.3 3.3 RR1X2+

1 5 110 Q23 R1X2+ 71 DINB[4]
0 0
1
R1908 R1917
DINR[6] 3.3 3.3 RR1X2-
10K 10K 111 R1X2- 70 DINB[3]
Q22
3
RR1X2-
4 8 DINR[5] 3.3 3.3 +3.3VSIIAVCC
D1905 112 Q21 AVCC 69 DINB[2]
5
3 7 1SS355 DINR[4] 0 0
HOTP_CONT1
113 Q20 AGND 68 C1965 DINB[1]
7
R1PWR5V
1000P
2 6 1.8 3.3 RR1X1+
DSDA1
DSCL1
114 VCC R1X1+ 67 DINB[0]
RR1X2+ R1921
1 5
10 0 3.3 RR1X1-
115 GND R1X1- 66 DINCK
C1913
L1904 DINR[3] 1000P 3.3 3.3
116 Q19 AVCC 65 DINEN
FA134WJ
1
DINR[2] 3.3 0
117 Q18 AGND 64 C1967 HDMI_SCK
3
1000P
DINR[1] 3.3 3.3 RR1X0+
118 Q17 R1X0+ 63 HDMI_WS
5
DINR[0] 3.3 3.3 RR1X0-
119 Q16 R1X0- 62 HDMI_SDO
7
E
0 3.3
120 OGND AVCC 61
R1919 10
DINCK HDMI_CLK 0 0
121 ODCK AGND 60 C1968
R1922 1000P
10 3.3 3.3 RR1XC+
122 OVCC R1XC+ 59
TO MAIN 2/6
DING[7] 3.3 3.3 RR1XC-
123 Q15 R1XC- 58
1
HDMI-HS
DING[6] 3.3 3.3
124 Q14 AVCC 57
3
C1969 HDMI-VS
DING[5] 3.3 0 1000P
125 Q13 ANTSTO 56
HDMI RECEIVER
5
DING[4] 3.3 3.3 TP1908
126 Q12 IC1905 PVCC1 55
7
0 SII9021 0
127 GND PGND 54
R1923
10 1.8 0
128 VCC AGND 53
C1971
DING[3] 0 3.3 1000P
129 Q11 R0X2+ 52
1
DING[2] 0 3.3
130 Q10 R0X2- 51
3
DING[1] 3.3 3.3
131 Q9 AVCC 50
5
DING[0] 3.3 0
132 Q8 AGND 49
7
0 3.3
133 Q7 R0X1+ 48
R1924 C1973
10 3.3 3.3 1000P
134 OVCC R0X1- 47
DINB[7] 0 3.3 +3.3VSIIAVCC

135 OGND AVCC 46
1
C1916
C1974
DINB[6] 1000P 3.3 0
136 45 1000P
Q6 AGND
3
DINB[5] C1917 3.3 3.3
137 Q5 R0X0+ 44
5
1000P
DINB[4] 0 3.3 FB1909
138 GND R0X0- 43
8
7
+3.3VSIIAVCC 0210TA
1.8 3.3
139 VCC AVCC 42
R1925 C1975
10 3.3 0 1000P
140 Q4 AGND 41
DINB[3] 0 3.3
C
141 Q3 R0XC+ 40
2
DINB[2] 0 3.3
142 Q2 R0XC- 39
4
DINB[1] 3.3 3.3

143 Q1 AVCC 38
6
DINB[0] 3.3 3.3 +3.3V(D)_SIIPVCC
DACGNDG
PVCC0
DACGNDR
DACDGND
DACOVCC
DACGNDB
DACVCCR
DACAGND
DACVCCG
R1PWR5V
R0PWR5V
DACAVCC
DACVCCB
DACDVCC
144 Q0 37
8
HSYNC
VSYNC
DSDA1
DSDA0
DSCL1
COMP
DSCL0
AnRPr
AnBPb
OGND
OVCC
FB1908
DGND
OGND
DVCC
OVCC
CSDA
VREF
RSET
AnGY
CSCL
GND
VCC
C1959 0060TA
DE
0.1u Z
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 25V
0
0
3.3
3.3
3.3
3.3
3.3
3.3
1.8
1.8
3.3
3.3
3.3
3.3
3.3
3.3
3.3
1.8
3.3
C1960
C1928 C1930 1000P
TP1902 TP1903 TP1904
C1910 0.01u 1000P
10u C1931 C1947
FB1903 R1930
16V 10u 0.1u Z R0PWR5V
0060TA KZA073WJ 91 F
+3.3V_IOVCC FB1906 16V 25V
R1PWR5V
0060TA KZA073WJ +1.8V_SIICVCC
B
C1941
C1918 R1931 1000P
10u 91 F
16V
KZA073WJ
C1924 C1935 C1946 C1948 C1955
C1927
1000P 10u 1000P 1000P 1000P
1000P
16V
1 3 5 7
KZA073WJ
3
R1927
10
R1934
100
2 4 6 8
4
HDMI-HS
HDMI-VS
DINEN
SDA3
SCL3
DSDA1
DSDA0
DSCL1
DSCL0
A
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
109
LC-32/37GD8E/RU
LC-32/37BT8E/RU
LC-32GD8, LC-32BT8 Main Unit Diagram 2/6 (Signal IN OUT)

Signal INOUT
(MAIN 2)
CONFIDENTIAL
LC-32GD8E Ver.N2 (2006.05.16)
Ver.N2 (2006.05.16)
3.3V to 8V LEVEL Shift
I TO MAIN 6/6
+3.3V
DUNTKD890WE06 Q2707
C2706
DTC144EE
FB2704
0061TA 1u
50V 8.1 0
ASX
TO MAIN 1/6
HDMI-VS Q2703 0 Q2708
HDMI-VS TO MAIN 3/6
2SC3928AR DTC144EE
R2710 DTVPC
HDMI-HS C2708 7 8 10K
8.1 *R2721
DTVPC C2702 C2704 8.1 0
C2701 1u 3.9 100K DTVHDMI
100P 100P 5 6
0.1u Z 50V 3 4
3
(CH) (CH) ASX
25V R2716
DVSYNC 3 4 0
TO MAIN 5/6 1 2 3.3 Q2706 10K
*R2720
PCVV DTUNER-V 8.1 2SC3928AR 100K
PCVV 1 2
*R2715 *R2719
4
3.3 0 0 0 0 0 0 0 3.9 1K 1K 2 1 (DTVHDMI,DTVPC)=
PCVH R2708
16 15 14 13 12 11 10 9 *R2701 00:C0 DTV
*Q2709 *Q2710 10K R2706 100K 01:C1 PC
220K 4 3 10:C2 HDMI
BU_SDA3 3.3
H
3LN01S 3LN01S VCC /2G A 2C3 2C2 2C1 1C0 2Y 11:C3 *
BU_SCL3
G G SYNC SELECT TO MAIN 6/6
IC2701 POW_AUDIOSEL
S+8V
TVHC153T (B,A)=
/1G B 1C3 1C2 1C1 1C0 1Y GND 00:C0 DTV DTUNER-AL FB2711
3
D S D S 01:C1 PC C2724
0061TA
10:C2 HDMI R2712
RGB_L
1 2 3 4 5 6 7 8 0.1u Z
11:C3 * 4.7K
25V
TO MAIN 3/6 0 0 0 0 0 0 0 0
DVSYNC DPC_L
PCVH
DTMSCL
4
TL2701 FB2707
BU_SCL3 HDMI-HS *R2705 0061TA
for HDMI INPUT HDMIA_R C2723
10K TTL LEVEL INPUT
5V Tolerant C2709 0.1u
DHSYNC INPUT PROTECT WHEN POWERDOWN J2701
DHSYNC 1u 25V Z
DTVHDMI EA073WJ 50V
TL2705 FB2708 8.1 3.3 3.3 0 0 0 8.1 8.1
BU_SDA3 0061TA ASX
HDMIA_L C2714 16 15 14 13 12 11 10 9
10u C2715
DTM_IRQ TL2706 FB2706 VDD 2 1 X 0 3 A B
C2707 16V 0.1u Z
0061TA ASX (B,A)=
1u 25V
DTUNER-AR
J2702 Q2704 11:C3 DTV
EA073WJ TL2702 FB2709
0061TA
50V R2711
2SC3928AR IC2704 CD4052BP 10:C2 PC
01:C1 HDMI
ASX 10K
G
HD1AR 00:C0 *
DTM_POWON
TO MAIN 6/6 7 8 8.1
*RJ2739 0 2 Y 3 1 INH VEE VSS
DTU_ON C2703 C2705
4.0
5 6 3 4 1 2 3 4 5 6 7 8
3
100P 100P
DTI2CSEL for RGB INPUT
(CH) (CH)
TL2703 FB2710 3 4 1
Q2705 0 3.3 0.2 0 0 0 0 0
*P2702 0061TA 2 8.1 C2722
HD1AL 3.5
DTM_RESET MA202WJ
2SC3928AR 0.1u Z
*TL2798 R2707 1 2
25V
TL2704 220K 4.0
4
60 GND GND 59 FB2705
0061TA R2709 C2719
100K 1u
58 FECLK FED7 57 16V
3.5 RGB_R
56 FED6 FED5 55 DPC_R
*SC2707
WA251WJ 54 FED4 FED3 53
DTUNER-V
3
C2718
TO DTUNIT R2713
1u
*TL2716 52 FED2 FED1 51 4.7K
16V
FECLK 1 50 FED0 GND 49
DTMSDA
DTUNER-H
4
GND 2 48 GND FEERR_UNCOR 47
*TL2717 *TL2800
F FED0 3
*TL2718
46 FEVAL_DEN FEGP1_LOCK 45
*TL2789
FED1 4 44 FESTR_PSYNC FEGP0_COMP 43 TO MAIN 3/6
*TL2719 IN2FSW RJ2702
VIN18
FED2 5 42 GND FESDA 41
VIN_2
VIN_1
*TL2720 BLUE2 RJ2703
VIN17
FED3 6 40 FEOFF_X4M 39
DTUNER-CVBS
FESCL
GREEN2 RJ2704
VIN16
GND 7 38 GND FERESETn 37
*TL2721 *TL2799 SW(L=IN1,H=IN2) RJ2705
RED/C2
VIN15
FED4 8 36 RED GND 35 2-IN,1-OUT,SWITCH
*TL2722 *TL2791 RJ2706
FED5 9 34 GND CVBS 33 *R2717
*IC2705 *C2728
DTUNER-B
VIN13
*TL2723 *TL2735 100
MM1507XN DTUNER-G RJ2707
1u Z
VIN12
FED6 10 32 GREEN GND 31 16V
*TL2724 *TL2792 DTUNER-R RJ2708
1 SW IN1 6 VIN11
FED7 11 30 GND H 29
*TL2736 *TL2793 BULE1 RJ2709
*C2711 VIN9
GND 12 28 BLUE V 27 2 OUT GND 5
*TL2725 *TL2794 SC2702 SC2703 SC2704 1u Z RJ2710
IN3C
WA251WJ WA251WJ WA251WJ 16V VIN8
FEERR_UNCOR 13 26 GND L 25 IN3Y
E
*TL2726 *TL2783 *TL2795 3 VCC IN2 4 RJ2711
TO AV TO AV TO AV VIN7
FEVAL_DEN 14 24 R POWON 23 TL2737 TL2751 TL2768 *C2727
*TL2728 *TL2784 *TL2796 NC NC NC RJ2712
IN1FSW IN2FSW IN3R 0.1u Z RED/C1
VIN6
FESTR_PSYNC 15 22 IRQ SDA 21 IN1FSW 1 IN2FSW 1 IN3R 1 25V
*TL2727 *TL2785 *TL2797 TL2738 TL2752 TL2769 RJ2713
AVLINK1 AVLINK2 IN3L GREEN1
VIN5
FEOFF_X4M 16 20 RESETn SCL 19 AVLINK1 2 AVLIN2 2 IN3L 2
*TL2787 TL2770 C2729
TL2739 TL2753 IN1FSW RJ2714
SLOWSW1 SLOWSW2 0.1u VIN3
GND 17 18 GND ASPECT 17 SLOWSW1 3 SLOWSW2 3 GND 3
*TL2729 *TL2786 TL2740 TL2754 RJ2715
RED/C1 RED/C2 PO_MUTE VIN2
FEGP0_COMP 18 16 +5V GND 15 RED/C1 4 RED/C2 4 PO_MUTE 4
*TL2730 TL2741 TL2755 TL2771 ATUNER-CVBS RJ2716
OUTMONR VIN1
FEGP1_LOCK 19 14 +5V GND 13 GND 5 GND 5 OUTMONR 5
*TL2731 TL2742 TL2756 TL2772 OUTV RJ2717
GREEN1 GREEN2 OUTMONL CVO2
I2CSEL 20 12 +5V GND 11 GREEN1 6 GREEN2 6 OUTMONL 6
*TL2732 TL2773 RJ2718
S_MUTE CVO1
FESDA 21 10 +5V GND 9 GND 7 GND 7 S_MUTE 7
*TL2733 TL2743 TL2757
BULE1 BLUE2 SCART12
FESCL 22 8 +5V GND 7 BLUE1 8 BLUE2 8 NC 8
*TL2734 *TL2788 RJ2719
TL2774 AUDIO2_L
HPOUT-R SW(L=IN1,H=IN2)
AIN1L
FERESETn 23 6 +5V GND 5 GND 9 GND 9 HPOUTR 9
TL2744 TL2758 TL2775 2-IN,1-OUT,SWITCH AUDIO2_R RJ2720
VIN_1 VIN_2 HPOUT-L
D
AIN1R
*FB2713
4 GND +12V 3 VIN1 10 VIN2 10 HPOUTL 10 R2714 IC2702 RJ2721
100 MM1507XN IN2L
0254TA AIN2L
2 GND +12V 1 GND 11 GND 11 (HPMUTE) 11
TL2745 TL2759 TL2776 RJ2722
IN1R IN2R C2710 1.4 IN2R
0 AIN2R
TO DTUNER IN1R 12 IN2R 12 HPPLUG 12 1 SW IN1 6
0.1u RJ2723
TL2746 TL2760 TL2777 IN1L
SC2705 IN1L IN2L SPKR 25V AIN3L
WA010WJ
IN1L 13 IN2L 13 SPKR 13 1.4 0
TL2778 2 OUT GND 5 RJ2724
SPKL IN1R
AIN3R
TO ATUNER GND 14 GND 14 SPKL 14
TL2747 TL2761 TL2779 4.8 1.5 IN3L
RJ2725
TL2707 OUTTNV OUTV MUTE_SP 3 VCC IN2 4 AIN4L
SIF
OUTTNV 15 OUTV 15 SPMUTE 15
1 IN3R
RJ2726
TL2708 DTUNER-G AIN4R
CVBS DTUNER-R
GND 16 GND 16 SPPOW 16 C2712
2 TL2748 TL2762
DTUNER-B OUTTNR OUTMONR 0.1u RJ2727
OUTTNR 17 OUT2R 17 GND 17 OUTTNL
GND 25V Z AOUT1L
3 ATUNER-SIF TL2749 TL2763
TL2709 OUTTNL OUTMONL RJ2728
OUTTNL 18 OUT2L 18 GND 18 OUTTNR
+35V C2725 RJ2736 RJ2738 AOUT1R
4 TL2750 TL2780 SLOWSW2
220P S2_MUTE RJ2729
GND 19 S2_MUTE 19 A+5V 19 OUTMONL
GND AOUT2L
5 ATUNER-CVBS TL2764 SLOWSW1
TL2710 SV1JSW RJ2730
NC 20 IN3SW 20 GND 20 OUTMONR
+8V FB2702 RJ2737 AOUT2R
6 0254TA C2726 TL2765 TL2781
C
ATUNER+8V S+8V IN3Y RJ2731
0.1u NC 21 IN3YV 21 GND 21 HPOUT-L
GND HPOUTL
7 FB2703 TVB TL2766 TL2782
TL2711 RJ2732
0254TA NC 22 GND 22 8V 22 HPOUT-R
+5V ATUNER+5V +5V HPOUTR
8 TL2767
TL2712 IN3C
SCL3
ATUNER-SCL SCL3 NC 23 IN3C 23 8V 23 SBW_TEST
9 2 1 TP2701
TL2713 NC NC NC RJ2733
TERMINAL+5V ATUNER-SIF
ATUNER-SDA SDA3 SIF
SDA3 10 4 3
SPKL RJ2734
GND SPKOUTL
11 R2702
TL2714 100 RJ2735
SPKR
IFAGC ATUNER-IFAGC SPKOUTR
12
RJ2701
AVLINK1 P1_5
GND 13 3
*R2723 4
TL2715 4.7 DTUIN3Y
AVLINK2 DTUIN3Y
+5V(CONT) 14 1 2
*C2730 *L2701 MUTE_SP
GND MUTE_SP
15 *C2731 10u 1.5uH R2704
0.01u 16V CUN 10K SV1JSW
OUTTNV SV1JSW
KZA073WJ
B TO MAIN 5/6
Q2702
3LN01S
AVLK2
1
3
DTM12V
CADC4 4.8 AVLK1

D S
3.3
R2703 S2_MUTE
TO MAIN 3/6 47K S2_MUTE
SDA3
TO MAIN 5/6
2
R2722
SCL3 G
100 R2724 CADC3
RESET_N 0 3.3
AVLK1 TO MAIN 6/6

S_MUTE
TO MAIN 6/6 S_MUTE
*FB2714 FB2715
+5V
0254TA 0210TA TERMINAL+5V
B+8V
S+8V BU+5V
BU+5V
BU+3.3V
BU+3.3V
POW+12V PO_MUTE
POW+12V
A POW+5V
C2732
0.01u
ANT+5V
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
110
LC-32/37GD8E/RU
LC-32/37BT8E/RU
LC-32GD8, LC-32BT8 Main Unit Diagram 3/6 (VCTP)

LC-32GD8E
VCTP
(MAIN 3)
Ver.N2 (2006.05.16)
I
LVDS3.3V
DUNTKD890WE06 C3029 FB3009
0254TA
10u
TO MAIN 6/6
16V
PCLK
KZA073WJ PCLK
BU+3.3V
BU+3.3V
LVDS1.8V BU+1.8V
BU+1.8V
TO MAIN 2/6 C3027 FB3010
0254TA
10u +3.3V
SCL3 C3019 16V
SCL3
C3015 0.1u Z FAN_ERR
R3002 KZA073WJ
SDA3 0.1u Z 25V
SDA3 22
C3013 25V C3023
BU_SCL3 C3028 TO MAIN 5/6
0.1u Z R3007 0.1u Z
BU_SCL3
25V 6.2K 25V 0.1u Z LVDS0N
TP3015
TP3016
BU_SDA3
LVDSCN
LVDSCP
LVDS0N
LVDS1N
LVDS2N
LVDS3N
LVDS0P
LVDS1P
LVDS2P
LVDS3P
25V
TP3007
TP3008
TP3009
TP3010
TP3011
TP3012
TP3013
TP3014
P4_2
P4_3
P4_0
P4_1
P2_6
P2_7
P3_0
P3_1
P3_2
P3_4
BU_SDA3
TP3026
TP3027
LVDS0P
TP3017
TP3018
TP3024
TP3025
FB3013 LVDS1N
H
FB3001 0254TA
VSUP3.3IO1
3
TO MAIN 1/6 VSUP3.3IO1
0254TA R3004
LVDS1P
100
SCL3
C3036
R3005 LVDS2N
10u
3.3
3.3
1.8
1.3
1.2
3.3
1.2
1.2
1.2
1.2
3.3
1.2
1.3
1.3
1.2
3.3
3.0
1.8
2.5
3.2
3.3
SDA3 4.7K
0
2
4
16V
156 155 154 153 152 151 150 149 148 147 146 145 144 143 142 141 140 139 138 137 136 135 134 133 132 131 130 129 128 127 126 125 124 123 122 121 120 119 118 117 116 115 114 113 112 111 110 109 108 107 106 105
KZA073WJ LVDS2P
2 1
VSUP3.3LVDS
TO MAIN 4/6 C3001 LVDSCN
REXT
OSDG0
OSDG1
4
OSDR1
3
TP3001
PSDR0
P3_0
P3_1
P3_2
P3_3
PCLK1
PCLK2
0.1u Z
TP3002
TP3003
SCL3
LVDSB_2N
LVDSB_3N
LVDSA_0N
LVDSA_1N
LVDSA_2N
LVDSA_3N
LVDSA_4N
LVDSB_1P
LVDSB_2P
LVDSB_3P
LVDSA_0P
LVDSA_1P
LVDSA_2P
LVDSA_3P
LVDSA_4P
LVDSBCLKN
LVDSBCLKP
25V
GD3.3LVDS
LVDSA_CLKN
LVDSA_CLKP
GND1.8DIG
LVDSCP
GND3.3LVDS
GND1.8LVDS
GND3.3LVDS
P4_2/PCS0
P4_3/PCS1
P4_0/PCS2
P4_1/PCS3
P2_6/PCS4
P2_7/PCS5
GND3.3IO1
LVDSB_1N
VSUP1.8DIG
GND3.3_LVDS
VSUP3.3LVDS
VSUP1.8LVDS
VSUP3.3LVDS
VSUP3.3LVDS
VSUP3.3LVDS
VSUP3.3IO1
+3.3V
TP3005
0 LVDSB_0P 0 TP3028
SDA3 157 OSDB0 104
3.3 0 3.3 3.3 LVDS3N
8 7 6 5 TP3006
0 LVDSB_0N 0 TP3029
BU+3.3V 158 OSDB1 103 TP3039 TP3041
LVDS3P
VCC WP SCL SDA P1_7 1.0 CADC4/P1_7/TDO 0 P3_4
159 P3_4 102 TP3044 TP3042 TXD
P1_0 TXD
Q3003
IC3001 FB3006
P1_6 0
160 CADC3/P1_6/TCLK P3_5 101
0 P3_5
3LN01S
R3010
4.7K RXD
0254TA P1_1 RXD
BR24L64F P1_5 0 0 P3_7
161 CADC2/P1_5 P3_7 100 D FAN_ERR P1_7
P1_2 P1_7
P1_4 0 CADC1/P1_4 3.3 P3_6 3.3
162 99
G
A0 A1 A2 GND C3010 P3_6 P1_6
P1_3 P1_6
TO MAIN 6/6 10u 0 0
GND3.3DAC TP3030
VSUP1.8FE
1 2 3 4 163 PSDFSW 98 G P1_4
16V P1_4
RESET_N
KZA073WJ
3.3 R3018
0 0 0 0 3.3 VSUP3.3DAC(ADC) 0 TP3031 S 3.3 0
164 OSDCLK 97 P2_2/IR IRIN
FB3005 IRIN
0254TA P1_3 3.3 3.3
FB3002 165 P1_3/ROUT 96
VSUP3.3IO1
0254TA KEY_PSW
*R3008
P1_2 0 P1_2/GOUT 0
166 GND3.3IO1 95 C3033 4.7K
TO MAIN 5/6 0.1u Z
C3011 P1_1 0 0 SDA3
TO MAIN 2/6
C3002 C3005 167 P1_1/BOUT 94 25V
C3003 C3008 0.1u Z OSDH 3 4 P1_5
SDA3 10u 10u R3012 P1_5
0.1u Z 0.1u Z TP3032
16V 16V
25V P1_0 3.3 P1_0/SVMOUT 0 SCL3
10K TP3040
25V 25V 168 OSDV 93 1 2
SCL3 KZA073WJ KZA073WJ DTM_IRQ
TP3033
1.8 VSUP1.8FE 3.3 RXD
RESET_N 169 P4_5/TMS/RXD 92
RESET_N SV1JSW
VSUP3.3FE 3.3 VSUP3.3FE 3.3 TXD RJ3009
170 P2_4/TDI/TXD 91 3.3 S P2_0 AVLK1
VIN21 G AVLK1
VIN20 0 VIN22/DHS 0 P2_3 Q3004 RJ3010
171 P2_3 90 P2_1 AVLK2
3.3 AVLK2
VIN19
VIN21 0 3.2 P2_2/IR
3LN01S
172 VIN21 89 TP3038
P2_2
0 0 TO MAIN 6/6
F
VIN20 VIN20 P2_1 D RJ3012
173 P2_1 88 3.3 P2_3 KEY_PSW TP3043
FPGA_SDE
VIN19 1.0 0 P2_0 FB3014
174 VIN19 87 0254TA RJ3013
TO MAIN 2/6 P2_0 P2_6 FPGA_SCK
FPGA_SCK
VIN5 0 VIN5 3.3 VSUP3.3FL RJ3014
VIN18 175 VSUP3.3FL 86 P2_7 FPGA_SDA
FPGA_SDA
VIN17 1.0 VIN17 0 C3041 RJ3015
176 GND3.3FL 85 C3038 P3_0 DTM_IRQ
10u BL_ERR
VIN16 0.1u
VIN16 1.0 VIN16 3.3 BU_SDA3 16V RJ3016 BL_ERR
VIN15 177 SDA 84 KZA073WJ P3_1 VSYNC_OSC
VIN13 VIN15 0 VIN15 3.3 BU_SCL3 RJ3017 TP3045 HSYNC_OSC

178 SCL 83 X3001 P3_2 POW_ERR
VIN12
SC0012CE
VIN13 1.0 VIN13 0.6 TP3034 *R3014
POW_ERR
VIN11 179 HSO 82 20.25MHz
4.7K TO MAIN 1/6
VIN9 VIN12 1.0 VIN12 0.2 TP3035 RJ3018
180 VSO 81 P3_4 HDMI_INT
VIN8 HDMI_INT
VIN7
VIN11 1.0
181 VIN11 *IC3002 CLKOUT 80
2.3 TP3036 C3034 C3039
P3_5
RJ3019
HOTP_CONT0
15P 18P HOTP_CONT0
VIN6 VIN9 0 IXB624WJ 1.8
182 VIN9 79 (CH) (CH) RJ3020
VCT6973 XTALOUT P3_7 HOTP_CONT1
HOTP_CONT1
VIN5
VIN8 1.0 VIN8 1.8 FB3015 RJ3021
183 XTALIN 78 P3_6
VIN3 HDMI_WP
0254TA
E VIN2
VIN1
VIN7 1.0
184 VIN7
VSUP3.3COM 77
3.3
C3049 C3037
VSUP3.3COM
C3040
P4_0
RJ3022
SV1JSW
HDMI_RST
C3012 1.8 VSUP1.8FE 0 10u RJ3023
185 GND3.3COM 76 1000P 0.1u P4_1 FPGA_SDE
BU+3.3V
0.1u Z 16V
CVO2
25V 0 GNDA 3.3 VSUP3.3DRI KZA073WJ RJ3024
186 VSUP3.3DRI 75 FB3018 P4_2 VSYNC_OSC
CVO1 C3032 0254TA
VIN6 1.0 0 R3017
187 VIN6 74 0.1u Z RJ3025 HSYNC_OSC
GND3.3DRI 25V 39 P4_3
RESET_N C3035
VIN18 1.0 VIN18 0 DINB[0]
R3009
188 DBI0 73 10u FB3012 FB3016 100 RJ3040
16V PICB0 HDMI_WP
VIN3 0 VIN3 0 DINB[1] 0254TA 0254TA
189 DBI1 72 KZA073WJ
2 1 PICC0 RJ3042 HDMI_RST
AIN1L 190 DBI2 71
AIN1L BU_SCL3 4 3
AIN1R VIN1 1.0 0 DINB[3] TO MAIN 5/6
VIN1 191 VIN1 70 RJ3026 TEMP3
AIN1R DBI3 BU_SDA3 PICA2
AIN2L TEMP3
AIN2L VSUP3.3VO 3.3 VSUP3.3VO 0 DINB[4] C3048
RJ3027
AIN2R 192 DBI4 69 PICA3 TEMP2
AIN2R 47u TEMP2
AIN3L RJ3004 0 0 DINB[5] 6.3V
AIN3L TP3004 193 VOUT3 68 RJ3028 TEMP1
DBI5 C3042 PICA4
AIN3R ASX TEMP1
CCP1
AIN3R CVO2 1.8 0 DINB[6] 0.1u
PICC4
PICB7
PICB6
PICB5
PICB4
PICB3
PICB2
PICB1
PICB0
D
AIN4L 194 VOUT2 67 RJ3029 QSSET
DBI6 PICA5
AIN4L QSSET
AIN4R CVO1 1.0 VOUT1 0 DINB[7]
RJ3030
AIN4R 195 DBI7 66 PICA6 LEDPOWG
LEDPOWG
0 0 DING[0] 3.3 3.3 0 3.3 0 0 0 0 3.3 0 3.3 3.3 0 0
AOUT1L 196 GND3.3IO3 65 RJ3039 LEDPOWR
DGI0 28 27 26 25 24 23 22 21 20 19 18 17 16 15 PICA7
AOUT1L LEDPOWR
AOUT1R VSUP3.3IO3 3.3 VSUP3.3IO3 0 DING[1]
RJ3031 LEDSLP
AOUT1R 197 DGI1 64 PICB6
AOUT2L LEDSLP
AOUT2L FRCO[0] 0 656I0 0 DING[2]
RJ3032
AOUT2R 198 DGI2 63 PICB7 LEDOPC
AOUT2R LEDOPC
HPOUTL FB3003 FRCO[1] 0
199 656I1 62
0 DING[3] IC3003 IXB664WJ RJ3033 LCDLR
HPOUTL DGI3 PICB2
0254TA LCDLR
HPOUTR
0 0
HPOUTR
SBW_TEST
C3004
FRCO[2]
200 656I2
DGI4 61
DING[4]
PIC16F913 PICB3 RJ3034 LCDUD
SBW_TEST C3007 LCDUD
SIF 10u 0.1u Z FRCO[3] 0 656I3
0 DING[5]
RJ3035
SIF 201 DGI5 60 PICB4 FRAME
SPKOUTL 16V 25V 1 2 3 4 5 6 7 8 9 10 11 12 13 14 FRAME
SPKOUTL KZA073WJ FRCO[4] 0 0 DING[6]
SPKOUTR 202 656I4 59 3.3 2.7 0 0 0 0 3.3 0 3.3 0 0 0 0 0 RJ3036 TP3037
DGI6 PICB5
SPKOUTR
DHSYNC FRCO[5] 0 656I5
0 DING[7]
RJ3047
DHSYNC 203 DGI7 58 R3001 CCP1 PWMOUT
PICAA0
PICAA1
PICC0
PICC1
PICC2
PICC3
PWMOUT
PICA2
PICA3
PICA4
PICA5
PICA7
PICA6
DVSYNC
DVSYNC FB3004 FRCO[6] 0 0 DINR[0] 1K
204 656I6 57 RJ3038
0254TA DRI0 PICAA0 OPCIN
OPCIN
C
FRCO[7] 0 656I7
0 DINR[1]
RA total<=100mA,RB total<=100mA
205 DRI1 56
TO MAIN 1/6 C3006
C3009
20mA(Icc Clamp) 25mA(Max) /PIN TO MAIN 2/6
RJ3001
I2S_CL 10u 0.1u Z FRCCKO 0 656CLKI
0 DINR[2]
POWER ON -> INPUT
R3003
HDMI_SCK 206 DRI2 55 S2_MUTE
16V 25V (RA[4:0] Analog Input) 10K PICAA1
RJ3002 KZA073WJ RJ3041
I2S_DI FRCCKI 0.1 656CLKO
0 DINR[3] PICB1
HDMI_SDO 207 DRI3 54 MUTE_SP
SUBWOOFER TEST
RJ3003 I2S_WS 0 0 RJ3043

FRCI[7] DINR[4] C3044 PICC1 SCART12
HDMI_WS 208 656O7 53 TH3002 SCART12
DRI4
TCLKFW
HEADPHONER
656O4/TMSFW
HEADPHONEL
I2S_DEL_OUT
0.01u
656O5/TDIFW
VSUP3.3RAM
I2S_DEL_WS
DINEN M1103J03 RJ3044
VSUP3.3DIG
656O3/TCLK
I2S_DEL_CL
GND3.3RAM
VSUP5.0SIF
SPDIF_OUT
I2S_DEL_IN
VSUP8.0AU
PICC2 DTUIN3Y
SPEAKERR
656O2/TDO
656O0/TMS
GND3.3DIG
SPEAKERL
I2S_DA_IN
DINEN
656O1/TDI
DTUIN3Y
VREFSIF
RESETQ
VREFAU
AOUT2R
AOUT1R
AOUT2L
AOUT1L
DINCK *R3013
TDOFW
I2S_WS
I2S_CL
SIFIN+
656O6
AIN1R
AIN2R
AIN3R
AIN4R
GNDA
SGND
SIFIN-
GNDA
AIN1L
AIN2L
AIN3L
AIN4L
DINCK
DCLK
RJ3045
DRI7
DRI6
DRI5
10K PICC3 DTVPC
DEN
DVS
DINR[7] DTVPC
DINR[7]
DINR[6] 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 PICC4 RJ3046 DTVHDMI
DINR[6] DTVHDMI
DINR[5]
0
0
DINR[5]
TO MAIN 6/6
3.3
3.7
3.7
3.7
3.7
3.7
3.7
3.7
3.7
3.0
8.0
3.8
3.8
3.8
3.8
3.8
3.8
3.8
3.8
2.7
1.6
4.7
3.3
3.3
1.67
DINR[4]
DINR[4]
DINR[3] +5V
VSUP3.3RAM
+5V
DINR[3]
DINR[2] TP3047
DINR[2] S+8V
S+8V
FRCI[6]
FRCI[5]
FRCI[4]
FRCI[3]
FRCI[2]
FRCI[1]
FRCI[0]
DINR[1]
TP3019
TP3020
TP3021
TP3022
TP3023
DINR[1]
DVSYNC
C3024
TO MAIN 4/6
DINR[7]
DINR[6]
DINR[5]
DINR[0]
DINEN
DINCK
DINR[0] C3021 0.1u Z
FRCCKO
VSUP8.0AU
B
DING[7] C3030
AIN1R
AIN2R
AIN3R
AIN4R
AIN1L
AIN2L
AIN3L
AIN4L
if not used, leave vacant C3020 56P 25V FRCCKO

DING[7] TP3046
SBW_TEST
0.1u Z FRCCKI
SPKOUTR
SPKOUTL
DING[6] 0.1u (CH)

HPOUTR
AOUT2R
AOUT1R
HPOUTL
AOUT2L
AOUT1L
FRCCKI
DING[6] C3025 25V
DING[5] FRCO[7]
0.1u Z FRCO[7]
SIF
I2S_WS
I2S_CL
DING[5]
I2S_DI
DING[4] 25V FRCO[6]

FRCO[6]
DING[4]
DING[3] FRCO[5]
FB3011 FRCO[5]
DING[3]
DING[2] 0254TA FRCO[4]
VSUP3.3DIG FRCO[4]
DING[2] 0.94
DING[1] FRCO[3]
FRCO[3]
DING[1] C3045 5 4 C3016 C3031
C3022 FRCO[2]
DING[0] 0.1u C3017 FRCO[2]
DING[0] 0.01u C3018 10u 10u
DINB[7] R3006 10u 0.1u Z FRCO[1]
16V 16V FRCO[1]
DINB[7] 4.7K 16V KZA073WJ
25V FRCO[0]
DINB[6] KZA073WJ
IC3005
VSUP5.0SIF
KZA073WJ FRCO[0]
DINB[6]
DINB[5] FB3008 FRCI[7]
BU4215G FRCI[7]
DINB[5] 0254TA
DINB[4] FRCI[6]
+5V FRCI[6]
DINB[4]
DINB[3] FRCI[5]
FRCI[5]
DINB[3] FB3007
DINB[2] FRCI[4]
1 2 3 FRCI[4]
DINB[2] 0254TA
DINB[1] S+8V FRCI[3]
DINB[1]
3.2 1.7 0 FRCI[3]
C3014 FRCI[2]
DINB[0] 0.1u FRCI[2]
DINB[0]
FRCI[1]
A
C3046 FRCI[1]
10u FRCI[0]
FRCI[0]
16V
KZA073WJ
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
111
LC-32/37GD8E/RU
LC-32/37BT8E/RU
LC-32GD8, LC-32BT8 Main Unit Diagram 4/6 (FRC) Not used for these models
LC-32GD8, LC-32BT8 Main Unit Diagram 5/6 (MISC)
LC-32GD8E
MISC
(MAIN 5)
Ver.N2 (2006.05.16)
I
DUNTKD890WE06
D2310 D2311 D2312
1366x768 PANEL Connect 1SS226 1SS226 1SS226
P2305 JAE FIX30M 3 3 3
NA493WJ
FB2304
TO MAIN 6/6 0.56 FL2301
32 1 2 1 2 1 2 TO MAIN 3/6
1/4W TL2322 N0003TA C2308
LCD5V LCD+5V TL2312 0.1u RJ2301
LCD5V APC_B PCVB
31 VIN21
FL2302
C2312 TL2313 C2309
R2309 30 N0003TA 0.1u RJ2302
0.1u Z APC_R PCVR
FB2303 4.7K VIN19
25V
L2301 0.56 29 C2310
FA071WJ TL2314 0.1u RJ2303
1/4W APC_G PCVG
TO MAIN 3/6 VIN20
TL2323 28 FL2303
H
LVDS0N N0003TA
LVDS0N R2322 R2324 R2325 EDID5V
2 4 27 75 75 75
16 TL2311 PC_DDC5V
LVDS0P
LVDS0P 1/4W 1/4W 1/4W
1 3 26
6
R2329
R2332 C2307 R2335 TO MAIN 6/6
25 1 11 10K 47K 0.1u 1K
FB2307 EDID5V EDID5V
L2302 7
FA071WJ 24 TL2315 0061TA
TL2324 2 12
SEL_LVDS FB2305 TO MAIN 2/6
LVDS1N
23 8
TL2316 0061TA RJ2304
LVDS1N RGB_H PCVH
2 4 3 13 PCVH
TL2308
LVDS1P
22 FB2308
9
LVDS1P 1 3 TL2317 0061TA RGB_V RJ2305
PCVV
TL2325
21 4 14 PCVV
FB2306
RIN0- 10
20 TL2318 0061TA
L2303 TL2326 5 15
FA071WJ RIN0+
19 D2309
17 DAN202K
LVDS2N 18 TL2319
2
LVDS2N SC2303
2 4 TL2327 2
RIN1- NA229WJ
LVDS2P 17 3 R2333
G
LVDS2P 1 3 TL2328 DSUB_DDC5V
RIN1+ 100
1
16 CH
1
L2304 15
FA071WJ TL2329
RIN2- D2305 D2306 D2307 D2308
14 EX1247CE EX1247CE EX1247CE EX1247CE
TL2330
LVDSCN RIN2+ 5.6V 5.6V 5.6V 5.6V 4.4 0 4.4 4.2
LVDSCN 2 4 13 8 7 6 5
LVDSCP
LVDSCP 1 3 12 VCC VCLK SCL SDA
TL2331
CLKIN- D2313
R2326
11 EX1247CE 1K
IC2303
TL2332
L2305 CLKIN+ 5.6V
FA071WJ 10 BR24C21F
GND
LVDS3N
9
TL2333
LVDS3N 2 4 RIN3- 1 2 3 4
LVDS3P
8 0 0 0 0
TL2334
LVDS3P 1 3 RIN3+ P2302
7 NA337WJ
TL2335
KM TO KEY
F
6
TL2336
TL2355
LCDLR KEY_PSW
5 1 KEY_PSW
TL2337
TL2356
LCDUD RJ2307
4 KEY_ETC
2 KEY_ETC
TL2357
TL2309 3 3 GND
TL2310 2
1 3 5 7
1
1 3 5 7
R2302 LV
10K
2 4 6 8 R2342 *C2318
R2343
2 4 6 8 10K 100P
1K F
P2301 (CH)
P2303
R2313
R2305 NA341WJ NA344WJ
10
10K BU+3.3V
SH RA TO LED/IR/OPC
TL2338
TL2358
1 FB2310 1 R/C
E
TL2339 TL2359
TEMP1 BU+3.3V 0210TA IR_VCC
TEMP1 2 TEMP1 2 BU+3.3V
TL2340 TL2360
TEMP2 TEMP2
TEMP2 3 TEMP2 3 GND
TL2341 TL2361
TEMP3 LEDPOWG
TEMP3 4 TEMP3 4 LED-G
TL2342 TL2362
LEDPOWR
5 ROMSEL0 5 POWR_LED
TL2343 TL2363
QSSET
QSSET 6 OSEN 6 OPC
TL2344 TL2364
FRAME LEDSLP
FRAME 7 ROMSEL1 7 SLEEP_LED
TL2365
P2306 8
RJ2308 NC
P1_6 N0565FJ TL2366
LEDOPC
RJ2309 9 LED_OPC
P1_7 TL2367
TL2345 10 GND
RESET_N R2339
1 1K
TL2346
RJ2310
RXD
2
D TXD
RJ2311
3 R2341 TO MAIN 3/6
39K
IRIN
OPCIN
LEDOPC
LEDSLP
R2315
100
LEDPOWR
BU_SDA3
1 2
LEDPOWG
3 4
P1_4
KEY_PSW
TO MAIN 2/6
C CADC4 PWMOUT
CADC3
TO MAIN 2/6
BU_SDA3
BU_SCL3
TO MAIN 6/6
BU+3.3V
BU+3.3V R2321
TL2353
TO MAIN 6/6
0
+3.3V
SC2301
DA036WJ TL2306 C2301
FB2309 BL_ON
0.1u Z
0061TA 25V
RS232C_3.3V
7
R2314
11
TL2301 FB2301
0061TA 10K
B
3
*R2303
0
4
R2307 3.3 3.3 0 -5.6 0 3.3 0 3.3

100 16 15 14 13 12 11 10 9
1
TL2302
1 2 SHDN VCC GND NC NC
10
TL2303 FB2302
0061TA
3 4 IC2301
2
TL2304
D2301 D2303 ISL83220
5
EX1271CE EX1271CE BL_ON5

12V 12V
6
TL2305 EN C1+ V+ C1- C2+ C2- V-

R2301
0
1 2 3 4 5 6 7 8
12
*
D2302 D2304 0 6.2 6.2 3.3 5.7 -3.0 -5.6 0 R2334
9
EX1271CE EX1271CE 10K

12V 12V
8
RJ2306
C2306
10u
A C2302
0.1u Z
C2303
0.1u
25V
Z
C2304
0.1u
25V
Z
C2305
0.1u
25V
Z
16V
ASX
25V
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
112
LC-32/37GD8E/RU
LC-32/37BT8E/RU
LC-32GD8, LC-32BT8 Main Unit Diagram 6/6 (POWER DC-DC)

LC-32GD8E
PowerDC-DC
(MAIN 6) CONFIDENTIAL Ver.N2 (2006.05.16)
Ver.N2 (2006.05.16)
LUG1701 LUG1702 LUG1703 LUG1704

HA006WJ HA006WJ HA006WJ HA006WJ
I
BU+5V
TO MAIN 2/6
BU+5V DUNTKD890WE06
TO MAIN 5/6
BU+3.3V
TO MAIN 5/6 C1702

0.1u
BU+5V 4.8 0 TO MAIN 3/6
5 4
BU+3.3V
TO MAIN 3/6 TL1707 C1718 S+8V

IC1701 0.1u
BU+1.8V
BU4239G TO MAIN 2/6
C1706 L1701 D1704 FB1701
R1719 R1721 15uH SFPA73 0250TA BU+3.3V
6.2K 22u BU+5V_FB1706
5.6K PA213WJ
6.3V
F KZA070WJ
0 3.0 5.2 6.3 S+8V
1 2 3 F S+8V
C1723 C1724
4 3 2 1 C1721
10u 10u
SC1701 3.8 5.0 0 68u S+8V
TL1705 GND SW IN BS 10V 16V 16V
WA251WJ R1723 VHIMP1410ES-1Y AAPD POW+5V
KZA073WJ KZA073WJ
H
6.2K POW+5V
R1709 3
TO POWER 10K
F
IC1706 POW+12V
TL1716
+35V 1
POW+35V MP1410ES ANT+5V
FB COMP EN NC ANT+5V
TL1717
2 1 DC-DC 1.8V
GND 2 INPUT 4.5V to 25V 5 6 7 8
D1702
EX0487CE 1.5 1.5 3.8 0
GND 3 TL1718 2.0V R1733
100
+13.5V 4
*C1746
R1737
+13.5V 5 5.6K 1000P
*R1774 (CH)
FPGA_VCC
+13.5V 6 C1717
47
TL1719
2700P *R1717
GND 7 *C1741 *C1753
0
TL1720
100P 0.1u Z
GND 8 R1758
1
GND 9 1/2W
IC1702
TL1721 PQ20WZ11
G 10 Vin Vc Vo Vadj GND

+5V R1757
1 1 2 3 4 5
+5V 11 1/2W
*R1775
TL1722 5.0 3.6 3.3 2.6 0 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51
R1761
+5V 12 100 R1726 R1729 10K
510 2K
+5V 13
TL1723
TL1706 <0.57A FPGA_EP1
76 50
R1714
0
+5V 14
77 49
D1703
+5V 15 HSU119 C1716
TL1724 78 48
22u
16 *C1754
GND 16V
79 47
ASX
*Q1705 0.1u Z
GND 17 C3340
TL1725 47u
*C1756
VS2 80 46
GND 18 6.3V
10u
2SA1530AR *C1755 C1742
ASX 0.1u Z 81 45
R1759 16V 10u
GND 19 1 ASX 16V C1745
TL1726 82 44
1/2W ASX 100P
BU+5V 20 (CH)
83 43
F
R1764
BU+5V 21 22 FPGA_SDA
84 42
GND 22 TL1727 FPGA_SDE

85 41
GND 23
IC1703 *R1769
6 5 4
R1763
10K 86 40
PQ20WZ11 22
Vin Vc Vo Vadj GND
*R1770 C1744
87 39
10K 100P
1 2 3 4 5
R1735 R1734 *IC1711 IC1710 (CH)
13.1 3.3 8.0 2.6 0 88 38
2K 2.2K
<0.24A PQ1R50 IXB823WJ
89 37
1 2 3
R1724 90 36
R1732 TL1708
100 *C1711
SC1702 2K *R1771 FPGA_EP4 FPGA_SCK
0.01u 91 35
WA248WJ 100
TO POWER D1705 92 34
R1760 C1720
HSU119
TL1728 1 22u *R1756
PCON1 93 33
1 1/2W 16V 100K *RJ1702
PCON1
C1758
TL1729 ASX
E PCON2 C1715 0.1u Z 94 32

PCON2 2 22u
TL1730 R1705 *R1772
35V 10K 95 31
3 0 *C1740
SGND
TL1731 ASX 1000P K RESET_N
96 30
INV_ON(BL_ON5) 4
TL1732
*IC1709 FPGA_EP2
SSM6J51TU 97 29
INV_BRT(VBRT) 5 3 2 1
TL1701
98 28
POW_ERR 6 G D D
TL1702 HSYNC_OSC
R1704 99 27
FAN_ERR 7 0
TL1703 VSYNC_OSC
100 26
NC 8
TL1704
S D D
PWM SEL 9
*R1712
4 5 6
10K 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25
*R1773
0
*R1752 TP1703 TO MAIN 5/6
*R1711
47 10K
FL_OFL
BL_ON
D +3.3V
R1762
22
RJ1705 PCLK
RJ1703
C1739 C1757
0.1u Z 0.1u Z
IC1705 IC1707
R1707
PQ20WZ11 FPGA_EP3 RJ1704
0 SSM6J51TU TO MAIN 2/6
VDSS=12V,ID=4A RJ1706
FPGA_EP5 DTU_ON
DTU_ON
FPGA_EP6 RJ1707 DTM_RESET

0 5.0 5.0 DTM_RESET
Q1704 Vin Vc Vo Vadj GND RJ1708
3 2 1 FPGA_EP7 DTI2CSEL
2SC3928AR TL1709 DTI2CSEL
1 2 3 4 5
G D D RJ1701 S_MUTE
FPGA_EP0
R1716 0 4.8 2.8 3.3 2.6 0 <0.86A S_MUTE
5.6K R1745 +3.3V
0.63
C
1.3K +3.3V
R1727 R1747 R1748

0 3.3K S D D
R1746
2K 510 2K
R1722
10K 4 5 6 D1706
HSU119 C1733
5.0 5.0 5.0 22u
R1739 16V
1 ASX
1/2W C3338 TO MAIN 3/6
47u
6.3V BL_ERR
R1728 R1740 ASX
Q1703 3.3K 1 RESET_N
2SC3928AR 1/2W
VSYNC_OSC
R1713 0 0 5.0 5.0 R1767

10K HSYNC_OSC
5.6K 0.67 3 2 1
G D D R1741 PCLK
1 C1734 R1768
TO MAIN 5/6 0 TL1710
IC1704 1/2W 10K FPGA_SCK
B
0.1u
EDID5V R1720
10K SSM6J51TU D1708 FB1702 FPGA_SDE
C1726 L1702
LCD5V R1754 SFPA73 0250TA
S D D R1742 R1744 22u 15uH POW5V_FB1702
6.2K 5.6K PA213WJ FPGA_SDA
1 6.3V
VBRT F F
KZA070WJ
0 3.0 5.0 6.3
4 5 6 1/2W C1737 C1738
4 3 2 1 C1735 +3.3V
BL_ON5 5.0 5.0 5.0 10u 10u
68u 16V 16V
GND SW IN BS 10V
R1753 VHIMP1410ES-1Y AAPD KZA073WJ KZA073WJ
TO MAIN 1/6 FB3307 6.2K
0061TA 3 TO MAIN 1/6
EDID5V
D1707
F
IC1708
+1.8V
TO MAIN 3/6 EX0487CE MP1410ES
2.0V FB COMP EN NC +3.3V
2 1 DC-DC 1.8V
INPUT 4.5V to 25V 5 6 7 8
1.3 1.5 3.3 0
+5V <0.4A
+5V R1743 TO MAIN 4/6
100 +3.3V
TO MAIN 2/6 FB3308
R1755 +1.8V
0061TA +1.8V
+5V 5.6K
TERMINAL+5V
A +5V
C1730
2700P
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
113
LC-32/37GD8E/RU
LC-32/37BT8E/RU
LC-37GD8, LC-37BT8 Main Unit Diagram 1/6 (HDMI)
LC-37GD8E
HDMI
(MAIN 1)
Ver.N2 (2006.05.16)
TO MAIN 6/6
EDID5V
I DUNTKD890WE07 D1901
TL1909 TL1911
3
DAN202K EDID5V
R1913
FB1901 +3.3V
47K +3.3V
2 0060TA R1914
3 10
+1.8V
4
1 *C1901
D1903
47u
1SS355 2 1
16V R1906 TO MAIN 3/6
ASY 47K
4 3 HDMI_INT
C1903
0.1u Z HDMI_RST
25V
TP1911
SC1901 HDMI_WP
ZA117WJ
5.0 5.0 5.0 5.0 TL1915 HOTP_CONT0

20 21
2 4 6 8 10 12 14 16 18 8 7 6 5
HOTP_CONT1
TP1916
VCC WP SCL SDA
1 3 5 7 9 11 13 15 17 19
22 23 SDA3
IC1901
H R1903 24LC2BIN SCL3
1.5K EEPROM
A0 A1 A2 VSS
1 2 3 4
R1901 TP1909 TP1913
0 0 0 0 X1901
HDMI_WS
2.7K DINR[7]
HDMI_SDO
HDMI_SCK
SCA108WJ
28.322MHz
DINR[6]
Q1903
2SK536 DINR[5]
4.5 3.2 R1932

DINR[4]
D S 1M
R3306 R3307 R3308 DINR[3]

Q1901 C1929 C1934 22
22 22
2SK536 G 3.3 12P 12P
DINR[2]
3.2 (CH) (CH)
L1901 4.5
FA134WJ D S DINR[1]
RR1XC- HDMI_RST
4 8
3
G
DINR[0]
3.3 R1911 FB1904
G R1933
3 7 470K 0060TA
Q1909 +3.3V(D)_FB1902
1.5K DING[7]
+3.3V_IOVCC
2 6 DTC144EE +3.3V_IOVCC
DING[6]
4
+3.3V(D)_FB1903
RR1XC+ FB1907
5.0 0 C1936 C1943 C1956
1 5 HDMI_WP 0210TA
FB1905 1000P 1000P 1000P DING[5]
0060TA
*C1906 C1953
RR1X0- C1919 C1921 R1928 DING[4]
4 8 0.1u 0 10u 10u
C1923 22K 0.1u Z
25V Z 1000P 25V
HDMI_RST
16V 16V R1929 R1936 DING[3]
3 7 L1902 KZA073WJ TP1907
KZA073WJ 4.7K 33
FA134WJ
DING[2]
2 6 TP1901 R1935
HDMI_INT
33
RR1X0+ DING[1]
1 5
R1926 DING[0]
1.67
1.75
1.8
3.3
3.3
3.3
1.8
1.8
3.3
1.8
3.3
1.8
4.7K
0
RR1X1- R1937
4 8 Q1905 Q1907 10K 108 107 106 105 104 103 102 101 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 75 74 73 DINB[7]
C1912
DTC144EE DTC144EE 1000P
3 7 L1903 DINB[6]
WS
NC
NC
NC
+3.3V_IOVCC
OGND
NC
NC
GND
VCC
GND
DGND
GND
SD0
VCC
OGND
OVCC
VCC
DVCC
OGND
SCK
SCDT
OVCC
FA134WJ R1920
INT
DGND2
TEST
DVCC2
SPDIF
REGVCC
MUTEOUT
CLK48B
RESET#
MCLKOUT
0 2.4 2.4 0 3.3
MCLKIN
0
XTALOUT
XTALIN
F
XTALVCC
2 6 10 109 OVCC 72 DINB[5]
AGND
RR1X1+ DINR[7] 3.3 3.3 RR1X2+

1 5 110 Q23 R1X2+ 71 DINB[4]
0 0
1
R1908 R1917
DINR[6] 3.3 3.3 RR1X2-
10K 10K 111 R1X2- 70 DINB[3]
Q22
3
RR1X2-
4 8 DINR[5] 3.3 3.3 +3.3VSIIAVCC
D1905 112 Q21 AVCC 69 DINB[2]
5
3 7 1SS355 DINR[4] 0 0
HOTP_CONT1
113 Q20 AGND 68 C1965 DINB[1]
7
R1PWR5V
1000P
2 6 1.8 3.3 RR1X1+
DSDA1
DSCL1
114 VCC R1X1+ 67 DINB[0]
RR1X2+ R1921
1 5
10 0 3.3 RR1X1-
115 GND R1X1- 66 DINCK
C1913
L1904 DINR[3] 1000P 3.3 3.3
116 Q19 AVCC 65 DINEN
FA134WJ
1
DINR[2] 3.3 0
117 Q18 AGND 64 C1967 HDMI_SCK
3
1000P
DINR[1] 3.3 3.3 RR1X0+
118 Q17 R1X0+ 63 HDMI_WS
5
DINR[0] 3.3 3.3 RR1X0-
119 Q16 R1X0- 62 HDMI_SDO
7
E
0 3.3
120 OGND AVCC 61
R1919 10
DINCK HDMI_CLK 0 0
121 ODCK AGND 60 C1968
R1922 1000P
10 3.3 3.3 RR1XC+
122 OVCC R1XC+ 59
TO MAIN 2/6
DING[7] 3.3 3.3 RR1XC-
123 Q15 R1XC- 58
1
HDMI-HS
DING[6] 3.3 3.3
124 Q14 AVCC 57
3
C1969 HDMI-VS
DING[5] 3.3 0 1000P
125 Q13 ANTSTO 56
HDMI RECEIVER
5
DING[4] 3.3 3.3 TP1908
126 Q12 IC1905 PVCC1 55
7
0 SII9021 0
127 GND PGND 54
R1923
10 1.8 0
128 VCC AGND 53
C1971
DING[3] 0 3.3 1000P
129 Q11 R0X2+ 52
1
DING[2] 0 3.3
130 Q10 51
D
R0X2-
3
DING[1] 3.3 3.3
131 Q9 AVCC 50
5
DING[0] 3.3 0
132 Q8 AGND 49
7
0 3.3
133 Q7 R0X1+ 48
R1924 C1973
10 3.3 3.3 1000P
134 OVCC R0X1- 47
DINB[7] 0 3.3 +3.3VSIIAVCC

135 OGND AVCC 46
1
C1916
C1974
DINB[6] 1000P 3.3 0
136 45 1000P
Q6 AGND
4
3
DINB[5] C1917 3.3 3.3
137 Q5 R0X0+ 44
6
5
1000P
DINB[4] 0 3.3 FB1909
138 GND R0X0- 43
8
7
+3.3VSIIAVCC 0210TA
1.8 3.3
139 VCC AVCC 42
R1925 C1975
10 3.3 0 1000P
140 Q4 AGND 41
DINB[3] 0 3.3
C
141 Q3 R0XC+ 40
2
DINB[2] 0 3.3
142 Q2 R0XC- 39
4
DINB[1] 3.3 3.3

143 Q1 AVCC 38
6
DINB[0] 3.3 3.3 +3.3V(D)_SIIPVCC
DACGNDG
PVCC0
DACGNDR
DACDGND
DACOVCC
DACGNDB
DACVCCR
DACAGND
DACVCCG
R1PWR5V
R0PWR5V
DACAVCC
DACVCCB
DACDVCC
144 Q0 37
8
HSYNC
VSYNC
DSDA1
DSDA0
DSCL1
COMP
DSCL0
AnRPr
AnBPb
OGND
OVCC
FB1908
DGND
OGND
DVCC
OVCC
CSDA
VREF
RSET
AnGY
CSCL
GND
VCC
C1959 0060TA
DE
0.1u Z
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 25V
0
0
3.3
3.3
3.3
3.3
3.3
3.3
1.8
1.8
3.3
3.3
3.3
3.3
3.3
3.3
3.3
1.8
3.3
C1960
C1928 C1930 1000P
TP1902 TP1903 TP1904
C1910 0.01u 1000P
10u C1931 C1947
FB1903 R1930
16V 10u 0.1u Z R0PWR5V
0060TA KZA073WJ 91 F
+3.3V_IOVCC FB1906 16V 25V
R1PWR5V
0060TA KZA073WJ +1.8V_SIICVCC
B
C1941
C1918 R1931 1000P
10u 91 F
16V
KZA073WJ
C1924 C1935 C1946 C1948 C1955
C1927
1000P 10u 1000P 1000P 1000P
1000P
16V
1 3 5 7
KZA073WJ
3
R1927
10
R1934
100
2 4 6 8
4
HDMI-HS
HDMI-VS
DINEN
SDA3
SCL3
DSDA1
DSDA0
DSCL1
DSCL0
A
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
114
LC-32/37GD8E/RU
LC-32/37BT8E/RU
LC-37GD8, LC-37BT8 Main Unit Diagram 2/6 (Signal IN OUT)

Signal INOUT
(MAIN 2)
CONFIDENTIAL
LC-37GD8E Ver.N2 (2006.05.16)
Ver.N2 (2006.05.16)
3.3V to 8V LEVEL Shift

DUNTKD890WE07
I
TO MAIN 6/6
Q2707
+3.3V
C2706
DTC144EE
FB2704
0061TA 1u
50V 8.1 0
ASX
TO MAIN 1/6
HDMI-VS Q2703 0 Q2708
HDMI-VS TO MAIN 3/6
2SC3928AR DTC144EE
R2710 DTVPC
HDMI-HS C2708 7 8 10K
8.1 *R2721
DTVPC C2702 C2704 8.1 0
C2701 1u 3.9 100K DTVHDMI
100P 100P 5 6
0.1u Z 50V 3 4
3
(CH) (CH) ASX
25V R2716
DVSYNC 3 4 0
TO MAIN 5/6 1 2 3.3 Q2706 10K
*R2720
PCVV DTUNER-V 8.1 2SC3928AR 100K
PCVV 1 2
*R2715 *R2719
4
3.3 0 0 0 0 0 0 0 3.9 1K 1K 2 1 (DTVHDMI,DTVPC)=
PCVH R2708
16 15 14 13 12 11 10 9 *R2701 00:C0 DTV
*Q2709 *Q2710 10K R2706 100K 01:C1 PC
220K 4 3 10:C2 HDMI
BU_SDA3 3LN01S 3LN01S VCC /2G A 2C3 2C2 2C1 1C0 2Y 3.3 11:C3 *
H BU_SCL3
G G SYNC SELECT TO MAIN 6/6
IC2701 POW_AUDIOSEL
S+8V
TVHC153T (B,A)=
/1G B 1C3 1C2 1C1 1C0 1Y GND 00:C0 DTV DTUNER-AL FB2711
3
D S D S 01:C1 PC C2724
0061TA
10:C2 HDMI R2712
RGB_L
1 2 3 4 5 6 7 8 0.1u Z
11:C3 * 4.7K
25V
TO MAIN 3/6 0 0 0 0 0 0 0 0
DVSYNC DPC_L
PCVH
DTMSCL
4
TL2701 FB2707
BU_SCL3 HDMI-HS *R2705 0061TA
for HDMI INPUT HDMIA_R C2723
10K TTL LEVEL INPUT
5V Tolerant C2709 0.1u
DHSYNC INPUT PROTECT WHEN POWERDOWN J2701
DHSYNC 1u 25V Z
DTVHDMI EA073WJ 50V
TL2705 FB2708 8.1 3.3 3.3 0 0 0 8.1 8.1
BU_SDA3 0061TA ASX
HDMIA_L C2714 16 15 14 13 12 11 10 9
10u C2715
DTM_IRQ TL2706 FB2706 VDD 2 1 X 0 3 A B
C2707 16V 0.1u Z
0061TA ASX (B,A)=
1u 25V
DTUNER-AR
J2702 Q2704 11:C3 DTV
EA073WJ TL2702 FB2709
0061TA
50V R2711
2SC3928AR IC2704 CD4052BP 10:C2 PC
01:C1 HDMI
HD1AR ASX 10K 00:C0 *
G
DTM_POWON
TO MAIN 6/6 7 8 8.1
*RJ2739 0 2 Y 3 1 INH VEE VSS
DTU_ON C2703 C2705
4.0
5 6 3 4 1 2 3 4 5 6 7 8
3
100P 100P
DTI2CSEL for RGB INPUT
(CH) (CH)
TL2703 FB2710 3 4 1
Q2705 0 3.3 0.2 0 0 0 0 0
*P2702 0061TA 2 8.1 C2722
HD1AL 3.5
DTM_RESET MA202WJ
2SC3928AR 0.1u Z
*TL2798 R2707 1 2
25V
TL2704 220K 4.0
4
60 GND GND 59 FB2705
0061TA R2709 C2719
100K 1u
58 FECLK FED7 57 16V
3.5 RGB_R
56 FED6 FED5 55 DPC_R
*SC2707
WA251WJ 54 FED4 FED3 53
DTUNER-V
3
C2718
TO DTUNIT R2713
1u
*TL2716 52 FED2 FED1 51 4.7K
16V
FECLK 1 50 FED0 GND 49
DTMSDA
DTUNER-H
4
GND 2 48 GND FEERR_UNCOR 47
*TL2717 *TL2800
F FED0 3
*TL2718
46 FEVAL_DEN
FESTR_PSYNC
FEGP1_LOCK 45
*TL2789
TO MAIN 3/6
FED1 4 44 FEGP0_COMP 43
*TL2719 IN2FSW RJ2702
VIN18
FED2 5 42 GND FESDA 41
VIN_2
VIN_1
*TL2720 BLUE2 RJ2703
VIN17
FED3 6 40 FEOFF_X4M 39
DTUNER-CVBS
FESCL
GREEN2 RJ2704
VIN16
GND 7 38 GND FERESETn 37
*TL2721 *TL2799 SW(L=IN1,H=IN2) RJ2705
RED/C2
VIN15
FED4 8 36 RED GND 35 2-IN,1-OUT,SWITCH
*TL2722 *TL2791 RJ2706
FED5 9 34 GND CVBS 33 *R2717
*IC2705 *C2728
DTUNER-B
VIN13
*TL2723 *TL2735 100
MM1507XN DTUNER-G RJ2707
1u Z
VIN12
FED6 10 32 GREEN GND 31 16V
*TL2724 *TL2792 DTUNER-R RJ2708
1 SW IN1 6 VIN11
FED7 11 30 GND H 29
*TL2736 *TL2793 BULE1 RJ2709
*C2711 VIN9
GND 12 28 BLUE V 27 2 OUT GND 5
*TL2725 *TL2794 SC2702 SC2703 SC2704 1u Z RJ2710
IN3C
WA251WJ WA251WJ WA251WJ 16V VIN8
FEERR_UNCOR 13 26 GND L 25 IN3Y
*TL2783 *TL2795 3 VCC IN2 4
E
*TL2726 RJ2711
TO AV TO AV TO AV VIN7
FEVAL_DEN 14 24 R POWON 23 TL2737 TL2751 TL2768 *C2727
*TL2728 *TL2784 *TL2796 NC NC NC RJ2712
IN1FSW IN2FSW IN3R 0.1u Z RED/C1
VIN6
FESTR_PSYNC 15 22 IRQ SDA 21 IN1FSW 1 IN2FSW 1 IN3R 1 25V
*TL2727 *TL2785 *TL2797 TL2738 TL2752 TL2769 RJ2713
AVLINK1 AVLINK2 IN3L GREEN1
VIN5
FEOFF_X4M 16 20 RESETn SCL 19 AVLINK1 2 AVLIN2 2 IN3L 2
*TL2787 TL2770 C2729
TL2739 TL2753 IN1FSW RJ2714
SLOWSW1 SLOWSW2 0.1u VIN3
GND 17 18 GND ASPECT 17 SLOWSW1 3 SLOWSW2 3 GND 3
*TL2729 *TL2786 TL2740 TL2754 RJ2715
RED/C1 RED/C2 PO_MUTE VIN2
FEGP0_COMP 18 16 +5V GND 15 RED/C1 4 RED/C2 4 PO_MUTE 4
*TL2730 TL2741 TL2755 TL2771 ATUNER-CVBS RJ2716
OUTMONR VIN1
FEGP1_LOCK 19 14 +5V GND 13 GND 5 GND 5 OUTMONR 5
*TL2731 TL2742 TL2756 TL2772 OUTV RJ2717
GREEN1 GREEN2 OUTMONL CVO2
I2CSEL 20 12 +5V GND 11 GREEN1 6 GREEN2 6 OUTMONL 6
*TL2732 TL2773 RJ2718
S_MUTE CVO1
FESDA 21 10 +5V GND 9 GND 7 GND 7 S_MUTE 7
*TL2733 TL2743 TL2757
BULE1 BLUE2 SCART12
FESCL 22 8 +5V GND 7 BLUE1 8 BLUE2 8 NC 8
*TL2734 *TL2788 RJ2719
TL2774 AUDIO2_L
HPOUT-R SW(L=IN1,H=IN2)
AIN1L
FERESETn 23 6 +5V GND 5 GND 9 GND 9 HPOUTR 9
TL2744 TL2758 TL2775 2-IN,1-OUT,SWITCH AUDIO2_R RJ2720
VIN_1 VIN_2 HPOUT-L AIN1R
4 3 IC2702
D
GND +12V VIN1 10 VIN2 10 HPOUTL 10 R2714
*FB2713 100 RJ2721
MM1507XN IN2L
0254TA AIN2L
2 GND +12V 1 GND 11 GND 11 (HPMUTE) 11
TL2745 TL2759 TL2776 RJ2722
IN1R IN2R C2710 1.4 IN2R
0 AIN2R
TO DTUNER IN1R 12 IN2R 12 HPPLUG 12 1 SW IN1 6
0.1u RJ2723
TL2746 TL2760 TL2777 IN1L
SC2705 IN1L IN2L SPKR 25V AIN3L
WA010WJ
IN1L 13 IN2L 13 SPKR 13 1.4 0
TL2778 2 OUT GND 5 RJ2724
SPKL IN1R
AIN3R
TO ATUNER GND 14 GND 14 SPKL 14
TL2747 TL2761 TL2779 4.8 1.5 IN3L
RJ2725
TL2707 OUTTNV OUTV MUTE_SP 3 VCC IN2 4 AIN4L
SIF
OUTTNV 15 OUTV 15 SPMUTE 15
1 IN3R
RJ2726
TL2708 DTUNER-G AIN4R
CVBS DTUNER-R
GND 16 GND 16 SPPOW 16 C2712
2 TL2748 TL2762
DTUNER-B OUTTNR OUTMONR 0.1u RJ2727
OUTTNR 17 OUT2R 17 GND 17 OUTTNL
GND 25V Z AOUT1L
3 ATUNER-SIF TL2749 TL2763
TL2709 OUTTNL OUTMONL RJ2728
OUTTNL 18 OUT2L 18 GND 18 OUTTNR
+35V C2725 RJ2736 RJ2738 AOUT1R
4 TL2750 TL2780 SLOWSW2
220P S2_MUTE RJ2729
GND 19 S2_MUTE 19 A+5V 19 OUTMONL
GND AOUT2L
5 ATUNER-CVBS TL2764 SLOWSW1
TL2710 SV1JSW RJ2730
NC 20 IN3SW 20 GND 20 OUTMONR
+8V FB2702 RJ2737 AOUT2R
6 0254TA C2726 TL2765 TL2781
C
ATUNER+8V S+8V IN3Y RJ2731
0.1u NC 21 IN3YV 21 GND 21 HPOUT-L
GND HPOUTL
7 FB2703 TVB TL2766 TL2782
TL2711 RJ2732
0254TA NC 22 GND 22 8V 22 HPOUT-R
+5V ATUNER+5V +5V HPOUTR
8 TL2767
TL2712 IN3C
SCL3
ATUNER-SCL SCL3 NC 23 IN3C 23 8V 23 SBW_TEST
9 2 1 TP2701
TL2713 NC NC NC RJ2733
TERMINAL+5V ATUNER-SIF
ATUNER-SDA SDA3 SIF
SDA3 10 4 3
SPKL RJ2734
GND SPKOUTL
11 R2702
TL2714 100 RJ2735
SPKR
IFAGC ATUNER-IFAGC SPKOUTR
12
RJ2701
AVLINK1 P1_5
GND 13 3
*R2723 4
TL2715 4.7 DTUIN3Y
AVLINK2 DTUIN3Y
+5V(CONT) 14 1 2
*C2730 *L2701 MUTE_SP
GND MUTE_SP
15 *C2731 10u 1.5uH R2704
0.01u 16V CUN 10K SV1JSW
OUTTNV SV1JSW
KZA073WJ
B TO MAIN 5/6
Q2702
3LN01S
AVLK2
1
3
DTM12V
CADC4 4.8 AVLK1

D S
3.3
R2703 S2_MUTE
TO MAIN 3/6 47K S2_MUTE
SDA3
TO MAIN 5/6
2
R2722
SCL3 G
100 R2724 CADC3
RESET_N 0 3.3
AVLK1 TO MAIN 6/6

S_MUTE
TO MAIN 6/6 S_MUTE
*FB2714 FB2715
+5V
0254TA 0210TA TERMINAL+5V
B+8V
S+8V BU+5V
BU+5V
BU+3.3V
BU+3.3V
POW+12V PO_MUTE
POW+12V
A POW+5V
C2732
0.01u
ANT+5V
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
115
LC-32/37GD8E/RU
LC-32/37BT8E/RU
LC-37GD8, LC-37BT8 Main Unit Diagram 3/6 (VCTP)

LC-37GD8E
VCTP
(MAIN 3)
Ver.N2 (2006.05.16)
I
LVDS3.3V
DUNTKD890WE07 C3029 FB3009
0254TA
10u
TO MAIN 6/6
16V
PCLK
KZA073WJ PCLK
BU+3.3V
BU+3.3V
LVDS1.8V BU+1.8V
BU+1.8V
TO MAIN 2/6 C3027 FB3010
0254TA
10u +3.3V
SCL3 C3019 16V
SCL3
C3015 0.1u Z FAN_ERR
R3002 KZA073WJ
SDA3 0.1u Z 25V
SDA3 22
C3013 25V C3023
BU_SCL3 C3028 TO MAIN 5/6
0.1u Z R3007 0.1u Z
BU_SCL3
25V 6.2K 25V 0.1u Z LVDS0N
TP3015
TP3016
BU_SDA3
LVDSCN
LVDSCP
LVDS0N
LVDS1N
LVDS2N
LVDS3N
LVDS0P
LVDS1P
LVDS2P
LVDS3P
25V
TP3007
TP3008
TP3009
TP3010
TP3011
TP3012
TP3013
TP3014
P4_2
P4_3
P4_0
P4_1
P2_6
P2_7
P3_0
P3_1
P3_2
P3_4
BU_SDA3
TP3026
TP3027
LVDS0P
TP3017
TP3018
TP3024
TP3025
FB3013 LVDS1N
H
FB3001 0254TA
VSUP3.3IO1
3
TO MAIN 1/6 VSUP3.3IO1
0254TA R3004
LVDS1P
100
SCL3
C3036
R3005 LVDS2N
10u
3.3
3.3
1.8
1.3
1.2
3.3
1.2
1.2
1.2
1.2
3.3
1.2
1.3
1.3
1.2
3.3
3.0
1.8
2.5
3.2
3.3
SDA3 4.7K
0
2
4
16V
156 155 154 153 152 151 150 149 148 147 146 145 144 143 142 141 140 139 138 137 136 135 134 133 132 131 130 129 128 127 126 125 124 123 122 121 120 119 118 117 116 115 114 113 112 111 110 109 108 107 106 105
KZA073WJ LVDS2P
2 1
VSUP3.3LVDS
TO MAIN 4/6 C3001 LVDSCN
REXT
OSDG0
OSDG1
4
OSDR1
3
TP3001
PSDR0
P3_0
P3_1
P3_2
P3_3
PCLK1
PCLK2
0.1u Z
TP3002
TP3003
SCL3
LVDSB_2N
LVDSB_3N
LVDSA_0N
LVDSA_1N
LVDSA_2N
LVDSA_3N
LVDSA_4N
LVDSB_1P
LVDSB_2P
LVDSB_3P
LVDSA_0P
LVDSA_1P
LVDSA_2P
LVDSA_3P
LVDSA_4P
LVDSBCLKN
LVDSBCLKP
25V
GD3.3LVDS
LVDSA_CLKN
LVDSA_CLKP
GND1.8DIG
LVDSCP
GND3.3LVDS
GND1.8LVDS
GND3.3LVDS
P4_2/PCS0
P4_3/PCS1
P4_0/PCS2
P4_1/PCS3
P2_6/PCS4
P2_7/PCS5
GND3.3IO1
LVDSB_1N
VSUP1.8DIG
GND3.3_LVDS
VSUP3.3LVDS
VSUP1.8LVDS
VSUP3.3LVDS
VSUP3.3LVDS
VSUP3.3LVDS
VSUP3.3IO1
+3.3V
TP3005
0 LVDSB_0P 0 TP3028
SDA3 157 OSDB0 104
3.3 0 3.3 3.3 LVDS3N
8 7 6 5 TP3006
0 LVDSB_0N 0 TP3029
BU+3.3V 158 OSDB1 103 TP3039 TP3041
LVDS3P
VCC WP SCL SDA P1_7 1.0 CADC4/P1_7/TDO 0 P3_4
159 P3_4 102 TP3044 TP3042 TXD
P1_0 TXD
Q3003
IC3001 FB3006
P1_6 0
160 CADC3/P1_6/TCLK P3_5 101
0 P3_5
3LN01S
R3010
4.7K RXD
0254TA P1_1 RXD
BR24L64F P1_5 0 0 P3_7
161 CADC2/P1_5 P3_7 100 D FAN_ERR P1_7
P1_2 P1_7
P1_4 0 CADC1/P1_4 3.3 P3_6 3.3
99
G
162 P3_6 P1_6
A0 A1 A2 GND C3010 P1_6
TO MAIN 6/6 P1_3
10u 0 0
GND3.3DAC TP3030
VSUP1.8FE
1 2 3 4 163 PSDFSW 98 G P1_4

16V P1_4
RESET_N
KZA073WJ
3.3 R3018
0 0 0 0 3.3 VSUP3.3DAC(ADC) 0 TP3031 S 3.3 0
164 OSDCLK 97 P2_2/IR IRIN
FB3005 IRIN
0254TA P1_3 3.3 3.3
FB3002 165 P1_3/ROUT 96
VSUP3.3IO1
0254TA KEY_PSW
*R3008
P1_2 0 P1_2/GOUT 0
166 GND3.3IO1 95 C3033 4.7K
TO MAIN 5/6 0.1u Z
C3011 P1_1 0 0 SDA3
TO MAIN 2/6
C3002 C3005 167 P1_1/BOUT 94 25V
C3003 C3008 0.1u Z OSDH 3 4 P1_5
SDA3 10u 10u R3012 P1_5
0.1u Z 0.1u Z TP3032
16V 16V
25V P1_0 3.3 P1_0/SVMOUT 0 SCL3
10K TP3040
25V 25V 168 OSDV 93 1 2
SCL3 KZA073WJ KZA073WJ DTM_IRQ
TP3033
1.8 VSUP1.8FE 3.3 RXD
RESET_N 169 P4_5/TMS/RXD 92
RESET_N SV1JSW
VSUP3.3FE 3.3 VSUP3.3FE 3.3 TXD RJ3009
170 P2_4/TDI/TXD 91 3.3 S P2_0 AVLK1
VIN21 G AVLK1
VIN20 0 VIN22/DHS 0 P2_3 Q3004 RJ3010
171 P2_3 90 P2_1 AVLK2
3.3 AVLK2
VIN19
VIN21 0 3.2 P2_2/IR
3LN01S
172 VIN21 89 TP3038
P2_2
0 0 TO MAIN 6/6
F
VIN20 VIN20 P2_1 D RJ3012
173 P2_1 88 3.3 P2_3 KEY_PSW TP3043
FPGA_SDE
VIN19 1.0 0 P2_0 FB3014
174 VIN19 87 0254TA RJ3013
TO MAIN 2/6 P2_0 P2_6 FPGA_SCK
FPGA_SCK
VIN5 0 VIN5 3.3 VSUP3.3FL RJ3014
VIN18 175 VSUP3.3FL 86 P2_7 FPGA_SDA
FPGA_SDA
VIN17 1.0 VIN17 0 C3041 RJ3015
176 GND3.3FL 85 C3038 P3_0 DTM_IRQ
10u BL_ERR
VIN16 0.1u
VIN16 1.0 VIN16 3.3 BU_SDA3 16V RJ3016 BL_ERR
VIN15 177 SDA 84 KZA073WJ P3_1 VSYNC_OSC
VIN13 VIN15 0 VIN15 3.3 BU_SCL3 RJ3017 TP3045 HSYNC_OSC

178 SCL 83 X3001 P3_2 POW_ERR
VIN12
SC0012CE
VIN13 1.0 VIN13 0.6 TP3034 *R3014
POW_ERR
VIN11 179 HSO 82 20.25MHz
4.7K TO MAIN 1/6
VIN9 VIN12 1.0 VIN12 0.2 TP3035 RJ3018
180 VSO 81 P3_4 HDMI_INT
VIN8 HDMI_INT
VIN7
VIN11 1.0
181 VIN11 *IC3002 CLKOUT 80
2.3 TP3036 C3034 C3039
P3_5
RJ3019
HOTP_CONT0
15P 18P HOTP_CONT0
VIN6 VIN9 0 IXB624WJ 1.8
182 VIN9 79 (CH) (CH) RJ3020
VCT6973 XTALOUT P3_7 HOTP_CONT1
HOTP_CONT1
VIN5
VIN8 1.0 VIN8 1.8 FB3015 RJ3021
183 XTALIN 78 P3_6
VIN3 HDMI_WP
E
0254TA
VIN2 VIN7 1.0 VIN7 3.3 VSUP3.3COM RJ3022
184 VSUP3.3COM 77 P4_0 SV1JSW
C3040 HDMI_RST
VIN1 C3049 C3037
C3012 1.8 VSUP1.8FE 0 10u RJ3023
185 GND3.3COM 76 1000P 0.1u P4_1 FPGA_SDE
BU+3.3V
0.1u Z 16V
CVO2
25V 0 GNDA 3.3 VSUP3.3DRI KZA073WJ RJ3024
186 VSUP3.3DRI 75 FB3018 P4_2 VSYNC_OSC
CVO1 C3032 0254TA
VIN6 1.0 0 R3017
187 VIN6 74 0.1u Z RJ3025 HSYNC_OSC
GND3.3DRI 25V 39 P4_3
RESET_N C3035
R3009
188 DBI0 73 10u FB3012 FB3016 100 RJ3040
16V PICB0 HDMI_WP
VIN3 0 VIN3 0 DINB[1] 0254TA 0254TA
189 DBI1 72 KZA073WJ
2 1 PICC0 RJ3042 HDMI_RST
AIN1L 190 DBI2 71
AIN1L BU_SCL3 4 3
AIN1R VIN1 1.0 0 DINB[3] TO MAIN 5/6
VIN1 191 VIN1 70 RJ3026 TEMP3
AIN1R DBI3 BU_SDA3 PICA2
AIN2L TEMP3
AIN2L VSUP3.3VO 3.3 VSUP3.3VO 0 DINB[4] C3048
RJ3027
AIN2R 192 DBI4 69 PICA3 TEMP2
AIN2R 47u TEMP2
AIN3L RJ3004 0 0 DINB[5] 6.3V
AIN3L TP3004 193 VOUT3 68 RJ3028 TEMP1
DBI5 C3042 PICA4
AIN3R ASX TEMP1
CCP1
AIN3R CVO2 1.8 0 DINB[6] 0.1u
PICC4
D
PICB7
PICB6
PICB5
PICB4
PICB3
PICB2
PICB1
PICB0
AIN4L 194 VOUT2 67 RJ3029 QSSET
DBI6 PICA5
AIN4L QSSET
AIN4R CVO1 1.0 VOUT1 0 DINB[7]
RJ3030
AIN4R 195 DBI7 66 PICA6 LEDPOWG
LEDPOWG
0 0 DING[0] 3.3 3.3 0 3.3 0 0 0 0 3.3 0 3.3 3.3 0 0
AOUT1L 196 GND3.3IO3 65 RJ3039 LEDPOWR
DGI0 28 27 26 25 24 23 22 21 20 19 18 17 16 15 PICA7
AOUT1L LEDPOWR
AOUT1R VSUP3.3IO3 3.3 VSUP3.3IO3 0 DING[1]
RJ3031 LEDSLP
AOUT1R 197 DGI1 64 PICB6
AOUT2L LEDSLP
AOUT2L FRCO[0] 0 656I0 0 DING[2]
RJ3032
AOUT2R 198 DGI2 63 PICB7 LEDOPC
AOUT2R LEDOPC
HPOUTL FB3003 FRCO[1] 0
199 656I1 62
0 DING[3] IC3003 IXB664WJ RJ3033 LCDLR
HPOUTL DGI3 PICB2
0254TA LCDLR
HPOUTR
0 0
HPOUTR
SBW_TEST
C3004
FRCO[2]
200 656I2
DGI4 61
DING[4]
PIC16F913 PICB3 RJ3034 LCDUD
SBW_TEST C3007 LCDUD
SIF 10u 0.1u Z FRCO[3] 0 656I3
0 DING[5]
RJ3035
SIF 201 DGI5 60 PICB4 FRAME
SPKOUTL 16V 25V 1 2 3 4 5 6 7 8 9 10 11 12 13 14 FRAME
SPKOUTL KZA073WJ FRCO[4] 0 0 DING[6]
SPKOUTR 202 656I4 59 3.3 2.7 0 0 0 0 3.3 0 3.3 0 0 0 0 0 RJ3036 TP3037
DGI6 PICB5
SPKOUTR
DHSYNC FRCO[5] 0 656I5
0 DING[7]
RJ3047
DHSYNC 203 DGI7 58 R3001 CCP1 PWMOUT
PICAA0
PICAA1
PICC0
PICC1
PICC2
PICC3
PWMOUT
PICA2
PICA3
PICA4
PICA5
PICA7
PICA6
DVSYNC
DVSYNC FB3004 FRCO[6] 0 0 DINR[0] 1K
204 656I6 57 RJ3038
0254TA DRI0 PICAA0 OPCIN
OPCIN
C
FRCO[7] 0 656I7
0 DINR[1]
RA total<=100mA,RB total<=100mA
205 DRI1 56
TO MAIN 1/6 C3006
C3009
20mA(Icc Clamp) 25mA(Max) /PIN TO MAIN 2/6
RJ3001
I2S_CL 10u 0.1u Z FRCCKO 0 656CLKI
0 DINR[2]
POWER ON -> INPUT
R3003
HDMI_SCK 206 DRI2 55 S2_MUTE
16V 25V (RA[4:0] Analog Input) 10K PICAA1
RJ3002 KZA073WJ RJ3041
I2S_DI FRCCKI 0.1 656CLKO
0 DINR[3] PICB1
HDMI_SDO 207 DRI3 54 MUTE_SP
SUBWOOFER TEST
RJ3003 I2S_WS 0 0 RJ3043

FRCI[7] DINR[4] C3044 PICC1 SCART12
HDMI_WS 208 656O7 53 TH3002 SCART12
DRI4
TCLKFW
HEADPHONER
656O4/TMSFW
HEADPHONEL
I2S_DEL_OUT
0.01u
656O5/TDIFW
VSUP3.3RAM
I2S_DEL_WS
DINEN M1103J03 RJ3044
VSUP3.3DIG
656O3/TCLK
I2S_DEL_CL
GND3.3RAM
VSUP5.0SIF
SPDIF_OUT
I2S_DEL_IN
VSUP8.0AU
PICC2 DTUIN3Y
SPEAKERR
656O2/TDO
656O0/TMS
GND3.3DIG
SPEAKERL
I2S_DA_IN
DINEN
656O1/TDI
DTUIN3Y
VREFSIF
RESETQ
VREFAU
AOUT2R
AOUT1R
AOUT2L
AOUT1L
DINCK *R3013
TDOFW
I2S_WS
I2S_CL
SIFIN+
656O6
AIN1R
AIN2R
AIN3R
AIN4R
GNDA
SGND
SIFIN-
GNDA
AIN1L
AIN2L
AIN3L
AIN4L
DINCK
DCLK
RJ3045
DRI7
DRI6
DRI5
10K PICC3 DTVPC
DEN
DVS
DINR[7] DTVPC
DINR[7]
DINR[6] 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 PICC4 RJ3046 DTVHDMI
DINR[6] DTVHDMI
DINR[5]
0
0
DINR[5]
TO MAIN 6/6
3.3
3.7
3.7
3.7
3.7
3.7
3.7
3.7
3.7
3.0
8.0
3.8
3.8
3.8
3.8
3.8
3.8
3.8
3.8
2.7
1.6
4.7
3.3
3.3
1.67
DINR[4]
DINR[4]
DINR[3] +5V
VSUP3.3RAM
+5V
DINR[3]
DINR[2] TP3047
DINR[2] S+8V
S+8V
FRCI[6]
FRCI[5]
FRCI[4]
FRCI[3]
FRCI[2]
FRCI[1]
FRCI[0]
DINR[1]
TP3019
TP3020
TP3021
TP3022
TP3023
DINR[1]
DVSYNC
C3024
TO MAIN 4/6
DINR[7]
DINR[6]
DINR[5]
DINR[0]
DINEN
DINCK
DINR[0] C3021 0.1u Z
FRCCKO
B
VSUP8.0AU
DING[7] C3030
AIN1R
AIN2R
AIN3R
AIN4R
AIN1L
AIN2L
AIN3L
AIN4L
if not used, leave vacant C3020 56P 25V FRCCKO

DING[7] TP3046
SBW_TEST
0.1u Z FRCCKI
SPKOUTR
SPKOUTL
DING[6] 0.1u (CH)

HPOUTR
AOUT2R
AOUT1R
HPOUTL
AOUT2L
AOUT1L
FRCCKI
DING[6] C3025 25V
DING[5] FRCO[7]
0.1u Z FRCO[7]
SIF
I2S_WS
I2S_CL
DING[5]
I2S_DI
DING[4] 25V FRCO[6]

FRCO[6]
DING[4]
DING[3] FRCO[5]
FB3011 FRCO[5]
DING[3]
DING[2] 0254TA FRCO[4]
VSUP3.3DIG FRCO[4]
DING[2] 0.94
DING[1] FRCO[3]
FRCO[3]
DING[1] C3045 5 4 C3016 C3031
C3022 FRCO[2]
DING[0] 0.1u C3017 FRCO[2]
DING[0] 0.01u C3018 10u 10u
DINB[7] R3006 10u 0.1u Z FRCO[1]
16V 16V FRCO[1]
DINB[7] 4.7K 16V KZA073WJ
25V FRCO[0]
DINB[6] KZA073WJ
IC3005
VSUP5.0SIF
KZA073WJ FRCO[0]
DINB[6]
DINB[5] FB3008 FRCI[7]
BU4215G FRCI[7]
DINB[5] 0254TA
DINB[4] FRCI[6]
+5V FRCI[6]
DINB[4]
DINB[3] FRCI[5]
FRCI[5]
DINB[3] FB3007
DINB[2] FRCI[4]
1 2 3 FRCI[4]
DINB[2] 0254TA
DINB[1] S+8V FRCI[3]
DINB[1]
3.2 1.7 0 FRCI[3]
C3014 FRCI[2]
DINB[0] 0.1u FRCI[2]
DINB[0]
FRCI[1]
A
C3046 FRCI[1]
10u FRCI[0]
FRCI[0]
16V
KZA073WJ
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
116
LC-32/37GD8E/RU
LC-32/37BT8E/RU
LC-37GD8, LC-37BT8 Main Unit Diagram 4/6 (FRC) Not used for these models
LC-37GD8, LC-37BT8 Main Unit Diagram 5/6 (MISC)
LC-37GD8E
MISC
(MAIN 5)
Ver.N2 (2006.05.16)
I
DUNTKD890WE07
D2310 D2311 D2312
1366x768 PANEL Connect 1SS226 1SS226 1SS226
P2305 JAE FIX30M 3 3 3
NA493WJ
FB2304
TO MAIN 6/6 0.56 FL2301
32 1 2 1 2 1 2 TO MAIN 3/6
1/4W TL2322 N0003TA C2308
LCD5V LCD+5V TL2312 0.1u RJ2301
LCD5V APC_B PCVB
31 VIN21
FL2302
C2312 TL2313 C2309
R2309 30 N0003TA 0.1u RJ2302
0.1u Z APC_R PCVR
FB2303 4.7K VIN19
25V
L2301 0.56 29 C2310
FA071WJ TL2314 0.1u RJ2303
1/4W APC_G PCVG
TO MAIN 3/6 VIN20
TL2323 28 FL2303
H
LVDS0N N0003TA
LVDS0N R2322 R2324 R2325 EDID5V
2 4 27 75 75 75
16 TL2311 PC_DDC5V
LVDS0P
LVDS0P 1/4W 1/4W 1/4W
1 3 26
6
R2329
R2332 C2307 R2335 TO MAIN 6/6
25 1 11 10K 47K 0.1u 1K
FB2307 EDID5V EDID5V
L2302 7
FA071WJ 24 TL2315 0061TA
TL2324 2 12
SEL_LVDS FB2305 TO MAIN 2/6
LVDS1N
23 8
TL2316 0061TA RJ2304
LVDS1N RGB_H PCVH
2 4 3 13 PCVH
TL2308
LVDS1P
22 FB2308
9
LVDS1P 1 3 TL2317 0061TA RGB_V RJ2305
PCVV
TL2325
21 4 14 PCVV
FB2306
RIN0- 10
20 TL2318 0061TA
L2303 TL2326 5 15
FA071WJ RIN0+
19 D2309
17 DAN202K
LVDS2N 18 TL2319
2
LVDS2N SC2303
2 4 TL2327 2
RIN1- NA229WJ
LVDS2P 17 3 R2333
LVDS2P
G
1 3 TL2328 DSUB_DDC5V 100
RIN1+ 1
16 CH
1
L2304 15
FA071WJ TL2329
RIN2- D2305 D2306 D2307 D2308
14 EX1247CE EX1247CE EX1247CE EX1247CE
TL2330
LVDSCN RIN2+ 5.6V 5.6V 5.6V 5.6V 4.4 0 4.4 4.2
LVDSCN 2 4 13 8 7 6 5
LVDSCP
LVDSCP 1 3 12 VCC VCLK SCL SDA
TL2331
CLKIN- D2313
R2326
11 EX1247CE 1K
IC2303
TL2332
L2305 CLKIN+ 5.6V
FA071WJ 10 BR24C21F
GND
LVDS3N
9
TL2333
LVDS3N 2 4 RIN3- 1 2 3 4
LVDS3P
8 0 0 0 0
TL2334
LVDS3P 1 3 RIN3+ P2302
7 NA337WJ
TL2335
6 KM TO KEY
F
TL2336
TL2355
LCDLR KEY_PSW
5 1 KEY_PSW
TL2337
TL2356
LCDUD RJ2307
4 KEY_ETC
2 KEY_ETC
TL2357
TL2309 3 3 GND
TL2310 2
1 3 5 7
1
1 3 5 7
R2302 LV
10K
2 4 6 8 R2342 *C2318
R2343
2 4 6 8 10K 100P
1K F
P2301 (CH)
P2303
R2313
R2305 NA341WJ NA344WJ
10
10K BU+3.3V
SH RA TO LED/IR/OPC
TL2338
TL2358
1 FB2310 1 R/C
TL2359
E
TL2339
TEMP1 BU+3.3V 0210TA IR_VCC
TEMP1 2 TEMP1 2 BU+3.3V
TL2340 TL2360
TEMP2 TEMP2
TEMP2 3 TEMP2 3 GND
TL2341 TL2361
TEMP3 LEDPOWG
TEMP3 4 TEMP3 4 LED-G
TL2342 TL2362
LEDPOWR
5 ROMSEL0 5 POWR_LED
TL2343 TL2363
QSSET
QSSET 6 OSEN 6 OPC
TL2344 TL2364
FRAME LEDSLP
FRAME 7 ROMSEL1 7 SLEEP_LED
TL2365
P2306 8
RJ2308 NC
P1_6 N0565FJ TL2366
LEDOPC
RJ2309 9 LED_OPC
P1_7 TL2367
TL2345 10 GND
RESET_N R2339
1 1K
TL2346
RJ2310
RXD
2
D
RJ2311
TXD
3 R2341 TO MAIN 3/6
39K
IRIN
OPCIN
LEDOPC
LEDSLP
R2315
100
LEDPOWR
BU_SDA3
1 2
LEDPOWG
3 4
P1_4
KEY_PSW
TO MAIN 2/6
C CADC4 PWMOUT
CADC3
TO MAIN 2/6
BU_SDA3
BU_SCL3
TO MAIN 6/6
BU+3.3V
BU+3.3V R2321
TL2353
TO MAIN 6/6
0
+3.3V
SC2301
DA036WJ TL2306 C2301
FB2309 0.1u Z
0061TA 25V
RS232C_3.3V
7
R2314
11
TL2301 FB2301
0061TA 10K
B
3
4
R2307 3.3 3.3 0 -5.6 0 3.3 0 3.3

100 16 15 14 13 12 11 10 9
1
TL2302
1 2 SHDN VCC GND NC NC
10
TL2303 FB2302
0061TA
3 4 IC2301
2
TL2304
D2301 D2303 ISL83220
5
EX1271CE EX1271CE
12V 12V
6
TL2305 EN C1+ V+ C1- C2+ C2- V-

R2301
0
1 2 3 4 5 6 7 8
12
*
D2302 D2304 0 6.2 6.2 3.3 5.7 -3.0 -5.6 0 R2334
9
EX1271CE EX1271CE 10K

12V 12V
8
RJ2306
C2306
10u
A C2302 C2303 C2304 C2305 16V

Z
0.1u Z 0.1u Z 0.1u Z 0.1u ASX
25V 25V 25V 25V
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
117
LC-32/37GD8E/RU
LC-32/37BT8E/RU
LC-37GD8, LC-37BT8 Main Unit Diagram 6/6 (POWER DC-DC)

LC-37GD8E
PowerDC-DC
(MAIN 6) CONFIDENTIAL Ver.N2 (2006.05.16)
Ver.N2 (2006.05.16)
LUG1701 LUG1702 LUG1703 LUG1704

HA006WJ HA006WJ HA006WJ HA006WJ
I
BU+5V
TO MAIN 2/6
BU+5V DUNTKD890WE07
TO MAIN 5/6
BU+3.3V
TO MAIN 5/6 C1702

0.1u
BU+5V 4.8 0 TO MAIN 3/6
5 4
BU+3.3V
TO MAIN 3/6 TL1707 C1718 S+8V

IC1701 0.1u
BU+1.8V
BU4239G TO MAIN 2/6
C1706 L1701 D1704 FB1701
R1719 R1721 15uH SFPA73 0250TA BU+3.3V
6.2K 22u BU+5V_FB1706
5.6K PA213WJ
6.3V
F KZA070WJ
0 3.0 5.2 6.3 S+8V
1 2 3 F S+8V
C1723 C1724
4 3 2 1 C1721
10u 10u
SC1701 3.8 5.0 0 68u S+8V
TL1705 GND SW IN BS 10V 16V 16V
WA251WJ R1723 VHIMP1410ES-1Y AAPD POW+5V
KZA073WJ KZA073WJ
H
6.2K POW+5V
R1709 3
TO POWER 10K
F
IC1706 POW+12V
TL1716
+35V 1
POW+35V MP1410ES ANT+5V
FB COMP EN NC ANT+5V
TL1717
2 1 DC-DC 1.8V
GND 2 INPUT 4.5V to 25V 5 6 7 8
D1702
EX0487CE 1.5 1.5 3.8 0
GND 3 TL1718 2.0V R1733
100
+13.5V 4 *P1701
*C1748 *C1746 NA342WJ
R1737
+13.5V 5 5.6K 100P 1000P
(CH) (CH) LB
FPGA_VCC *TL1733
+13.5V 6 C1717
TL1719 *C1747
SGND
2700P *R1717 100P 1
GND 7 *C1741 *C1753
47 *TL1734
TL1720 (CH)
100P 0.1u Z STB
*R1718 2
GND 8 R1758
47 *TL1735
1
GND 9 1/2W
IC1702 *TL1736
3 OFL
TL1721 *R1715 47
PQ20WZ11 OSC
4
G 10 Vin Vc Vo Vadj GND
+5V R1757 *TL1737
1 ERR
1 2 3 4 5 5
+5V 11 1/2W
*R1731 1K *R1730 *TL1738
TL1722 5.0 3.6 3.3 2.6 0 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51
REG
R1761 6
+5V 12 100 R1726 R1729
*R1736
47 *TL1739
1K
510 2K REG2
7
+5V 13
TL1723
TL1706 <0.57A FPGA_EP1
76 50
R1714 *C1749 *TL1740
0 100P BRT
8
+5V 14
77 49
D1703
*C1751 *C1750
15 *C1752
+5V HSU119 C1716 100P 100P
TL1724 78 48 100P
22u (CH) (CH)
16 *C1754 (CH)
GND 16V
79 47
ASX
*Q1705 0.1u Z
GND 17 C3340
TL1725 47u
*C1756
VS2 80 46
GND 18 6.3V
10u
2SA1530AR *C1755 C1742
ASX 0.1u Z 81 45
R1759 16V 10u
GND 19 1 ASX 16V C1745
TL1726 82 44
1/2W ASX 100P
BU+5V 20 (CH)
83 43
F
R1764
BU+5V 21 22 FPGA_SDA
84 42
GND 22 TL1727 FPGA_SDE

85 41
GND 23
IC1703 *R1769
6 5 4
R1763
10K 86 40
PQ20WZ11 22
Vin Vc Vo Vadj GND
*R1770 C1744
87 39
10K 100P
1 2 3 4 5
R1735 R1734 *IC1711 IC1710 (CH)
13.1 3.3 8.0 2.6 0 88 38
2K 2.2K
<0.24A PQ1R50 IXB823WJ
89 37
1 2 3
R1724 90 36
R1732 TL1708
100 *C1711
SC1702 2K *R1771 FPGA_EP4 FPGA_SCK
0.01u 91 35
WA248WJ 100
TO POWER D1705 92 34
R1760 C1720
HSU119
TL1728 1 22u *R1756
PCON1 93 33
1 1/2W 16V 100K *RJ1702
PCON1
C1758
TL1729 ASX
E PCON2 C1715 0.1u Z 94 32

PCON2 2 22u
TL1730 R1705 *R1772
35V 10K 95 31
3 0 *C1740
SGND
TL1731 ASX 1000P K RESET_N
96 30
INV_ON(BL_ON5) 4
TL1732
*IC1709 FPGA_EP2
SSM6J51TU 97 29
INV_BRT(VBRT) 5 3 2 1
TL1701
98 28
POW_ERR 6 G D D
TL1702 HSYNC_OSC
R1704 99 27
FAN_ERR 7 0
TL1703 VSYNC_OSC
100 26
NC 8
TL1704
S D D
PWM SEL 9
*R1712
4 5 6
10K 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25
*R1752 TP1703 TO MAIN 5/6

*R1711
47
FL_OSC
10K
FL_OFL
D
BL_ON
+3.3V
R1762
22
RJ1705 PCLK
RJ1703
C1739 C1757
0.1u Z 0.1u Z
IC1705 IC1707
R1707
PQ20WZ11 FPGA_EP3 RJ1704
0 SSM6J51TU TO MAIN 2/6
VDSS=12V,ID=4A RJ1706
FPGA_EP5 DTU_ON
DTU_ON
FPGA_EP6 RJ1707 DTM_RESET

0 5.0 5.0 DTM_RESET
Q1704 Vin Vc Vo Vadj GND RJ1708
3 2 1 FPGA_EP7 DTI2CSEL
2SC3928AR TL1709 DTI2CSEL
1 2 3 4 5
G D D RJ1701 S_MUTE
FPGA_EP0
R1716 0 4.8 2.8 3.3 2.6 0 <0.86A S_MUTE
5.6K R1745 +3.3V
0.63
C
1.3K +3.3V
R1727 R1747 R1748

0 3.3K S D D
R1746
2K 510 2K
R1722
10K 4 5 6 D1706
HSU119 C1733
5.0 5.0 5.0 22u
R1739 16V
1 ASX
1/2W C3338 TO MAIN 3/6
47u
6.3V BL_ERR
R1728 R1740 ASX
Q1703 3.3K 1 RESET_N
2SC3928AR 1/2W
VSYNC_OSC
R1713 0 0 5.0 5.0 R1767

10K HSYNC_OSC
5.6K 0.67 3 2 1
G D D R1741 PCLK
1 C1734 R1768
TO MAIN 5/6 0 TL1710
IC1704 FPGA_SCK
B
1/2W 0.1u 10K
EDID5V R1720
10K SSM6J51TU D1708 FB1702 FPGA_SDE
C1726 L1702
LCD5V R1754 SFPA73 0250TA
S D D R1742 R1744 22u 15uH POW5V_FB1702
6.2K 5.6K PA213WJ FPGA_SDA
1 6.3V
VBRT F F
KZA070WJ
0 3.0 5.0 6.3
4 5 6 1/2W C1737 C1738
4 3 2 1 C1735 +3.3V
BL_ON5 5.0 5.0 5.0 10u 10u
68u 16V 16V
GND SW IN BS 10V
R1753 VHIMP1410ES-1Y AAPD KZA073WJ KZA073WJ
TO MAIN 1/6 FB3307 6.2K
0061TA 3 TO MAIN 1/6
EDID5V
D1707
F
IC1708
+1.8V
TO MAIN 3/6 EX0487CE MP1410ES
2.0V FB COMP EN NC +3.3V
2 1 DC-DC 1.8V
INPUT 4.5V to 25V 5 6 7 8
1.3 1.5 3.3 0
+5V <0.4A
+5V R1743 TO MAIN 4/6
100 +3.3V
TO MAIN 2/6 FB3308
R1755 +1.8V
0061TA +1.8V
+5V 5.6K
A
TERMINAL+5V
+5V C1730
2700P
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
118
LC-32/37GD8E/RU
LC-32/37BT8E/RU
LC-32/37GD8, LC-32/37BT8 AV Unit Diagram

LC-32GA8E/LC-37GA8E
LC-32GD8E/LC-37GD8E AV
Ver.N3 (2006.05.16)
R IN R OUT
DUNTKD604WE10 2-IN,1-OUT,SWITCH
I IC1101 C1148
10u
L IN L OUT HeadPhone OUT
MM1506XN 16V
KZA073WJ
0 2.1 OUTV
1 SW IN1 6 J1301
AVLINK2
LUG301 LUG302 LUG303 LUG304 2 3
JA007WJ
2.4 0
2 OUT GND 5 CVBS IN Y/C IN 5 4 7 8 1
C1130 TL1101 L TL1104
5.3 2.0 R
470u 3 VCC IN2 4 J1201
16V TL1111 ZA033WJ TL1102 TL1105
C1147 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
ASY *D1107 0.1u Z
INPUT3
EX1034CE 25V TL1113 TL1103 TL1106
TL1114
TL1115
TL1108
TL1112
TL1110
TL1109
TL1116
TL1117
5.1V R1204
75 TL1107
C1131 TL1118
0.01u
Z
*D1105 C350 C354
EX1064CE FB1203 0.01u 1000P
R1131 R1216
13V 220 *D1201 0062TA
270
C1124 EX1239CE R349
*D1104 C351 C355
1u R1228 4.3V
100
C1220
H
R1108 EX1068CE FB1104 FB1107 R1134 R1201 R1202 0 C1222 0.01u 1000P
16V C1224
39K F 0077TA 0051TA 1K 100 10u
15V 3.9K 10u
SLOWSW2 IN2L R1217
16V
100P
330 16V (CH)
IN2FSW IN2_BLANK KZA073WJ
KZA073WJ
C1117 C1120
R1128 R1173 C352
FB1102 C1116 100P FL1211 FB1201 FB1202
100 1000P 100K FL1212
R1101 0062TA *D1103 0.01u
R1129 220P (CH) R1203 N0017TA 0051TA 0051TA
15K F EX1026CE C1201 N0017TA
75 1000P 6.8K
3.9V C1121
1/4W R350
FB1105 R1147 1u C353
FB1204 100
0051TA 1K 16V R1206 C1210 C1216 R1219 0.01u
C1108 IN2R C1207 R1209 0062TA
R1121 C1204 75 100P
R1210
100P R1213 270
100P 75 10P 1/4W
10P 75
1K 1K
(CH) (CH)
(CH) C1118 C1119 (CH)
(CH) 1/4W
1/4W Q1101 C1221
VIN2 R1150 C1223 C1225
100P 1000P
100K 10u R1226
DTC314TK 10u
(CH) D309 C1202 C1211 16V
100P
0.1 1K
*C1110 C1205 C1208 C1217 16V 0.36
FL1104 1SS390 0.01u 10u 10u 1000P KZA073WJ
(CH)
10u 0.1 *D1113 1000P KZA073WJ
16V N0017TA 0.36 S2_MUTE Z 16V 16V
*D1116 EX1034CE
KZA073WJ KZA073WJ KZA073WJ
EX1034CE R1145 5.1V Q1203
INPUT2
R1142 C1203 C1206 R1212 R1215 R1224
C348
5.1V R1111
1K
*D1115 560K 0 DTC314TK Q305
560K 0 D310 100P 100P 100K 100K 22u
68 FL1105 EX1034CE
R1109 1SS390 (CH) (CH)
R1221 MUTE 35V R346
2SC3928AR
1/4W N0017TA TL1124 5.1V
CVBS_OUT 220 S_MUTE 330 ASX
56
1/10W 4.4 HP_R HP_ROUT 0
Q1103 0
Q1204
SC_AVLINK
3.8 OUT2R
TL1123 C1125 2SA1530AR 1.5 0 1.4 R351
G
FB1106 C1122
C1253 DTC314TK R348
330P 470P *D1109 10K
0062TA 6 5 4 MUTE 2.2K
EX1049CE 0 0.1u Z R1227 0
25V R1218 R1222
C1101 C1132 8.2V 2.7K 2.7K 0.36 1K 3 4
GND
0.1u *D1114 R1211 R1214
IN1
IN2
R1104 FL1101 10u C1136
C1123 R1139 1K 1K
25V 0 N0017TA TL1128 16V 10u EX1034CE 0.1
MM1507XN
RED/C2 100 1 2
TL1119 TL1120 330P 5.1V
TL1130
R1138 KZA073WJ 16V IC1201 C1212 C1218 4.4 4.4 0
0
*D1118 0 FB1108 R1225 C349
3 4 3 4 3 4 2-IN,1-OUT,SWITCH
OUT
VCC
C1102 R1114 1u 1u
SW
EX1026CE TL1121 TL1122 560K 22u
75
0062TA
16V 16V 3.7 Q1201 3.7 Q1202
3.9V 0.1u 35V 0
R1105
1/4W
FL1102 R1130 TL1131 1 2 1 2 1 2 2SA1530AR 2SA1530AR R347
25V 0 R1107 C1126 1 2 3 ASX
GREEN2
0 N0017TA TL1127
C1133 C1137 HP_L
56 0 HP_LOUT
220 470P R1140 R1143 3.1 1.5 5.3 0
TL1151 10u 10u 0
*D1119 1/10W 330 2.7K
OUTMONR
OUTMONL
16V 16V R352 Q306
HPMUTE
EX1026CE C1103 R1117
KZA073WJ 10K
IN3SW
IN3YV
75 C320
2SC3928AR
IN3C
IN3R
3.9V *D1110
IN3L
0.1u R1106 FL1103 TL1126
25V 1/4W 41 39 37 35 33 31 29 27 25 23 EX1049CE
4.4 2.2u
0 N0017TA
BLUE2 8.2V
50V
VIN (G20) BLANK (G16) RSV CTRL SLOWSW AIN-L AGND AIN-R 3.8 ASX
QSOCZA116WJZZ
*D1120 OUT2L
HPOI_L HPO_L
EX1026CE SCART 2 Q1104
HP_R
+8V_AIN HPOI_R
3.9V 0 HPO_R
VOUT/L (G19) RED/C (G15) GREEN (G11) BLUE (G7) AO-L AO-R 2SA1530AR
J1101 C1219
0.36 R1144 47u
C321
42 40 38 36 34 32 30 28 26 24 22 ZA116WJ
2.2u
R1123 0.1 1K FB1218 16V R332 C361 D305
75 0254TA ASY R318 C360 3 4 50V
TL1125 1K 10u EXA089WJ
TL1129 82 47u ASX
F
1/4W R319 R321 16V 4.3V
TL1133 R1141 1/2W 16V C347
TL1132 Q1102 1 2
2
1.2K 10K KZA073WJ 1u
560K 0 ASY
R333
DTC314TK 50V
TL1137 TL1138 C358 C306 10K
R327 ASX
HP_L
SLOWSW1 TL1139 10u 2.2u C316 C318 10K
TL1141 50V Q301 50V 33P 47P
R1103 FB1103 R353 R310 *R325 D301
1
TL1140 ASX 2SC3928AR ASX (CH) (CH) D303
39K F 0077TA 1K 1K 2.7K EXA092WJ
R1102 TL1136 EXA092WJ
*D1101 FB1213 12V
15K F 12V
EX1068CE 0210TA 0 C324
15V 20 18 16 14 12 10 8 6 4 2 SCART+5V *C301 4.0 4.2 4.2 8.0 R328
TL1148 10u C336
R1126
R301 0.027u 0 R306 R307 5 6 7 8 3.9K R341 R342 C344 R344
0 *C1251 R302 50V 1u
C1114 TL1135 VIN (G20) BLANK (G16) RSV CTRL SLOWSW AIN-L AGND AIN-R 1K 4.7K 100K 10K 3.3K 1u 10K
100u C1252 4.7K ASX 50V 50V
220P 3 4
SCART 1 16V 1u
16V 3 4 3 4
0 3 4 3 4 IC303 ASX
2 1 2 1 ASX 2 1
ASX
1 2
VOUT/L (G19) RED/C (G15) GREEN (G11) BLUE (G7) AO-L AO-R 1 1
1 1
2 2 NJM4558M C337 4 3 4 3 C345 4 3
C1142 2 2 0 1u
21 19 17 15 13 11 9 7 5 3 1 1u
1u
FB1111 R1177 4 3 2 1 50V
16V 50V R345
0051TA 1K *C302 ASX
IN1FSW SC1FSW IN1L 0 4.0 4.2 4.2 ASX 10K
0.027u 0 R311 *R326
FB1101 R1119 TL1134 0 1K 2.7K
TL1150 C1127 2 1
0062TA 100 TL1147 C1134 R1153 C346
TL1145
TL1144
TL1146
R1127
TL1143
*D1102 100P
TL1142
1000P 100K 1u
C307 C317 C319 C325 D302 D304 4
EX1026CE 75 (CH) Q302 50V
3
3.9V 1/4W C359 R354 2.2u 33P 47P 10u EXA092WJ EXA092WJ
TL1149 1K
2SC3928AR 50V C311 (CH) (CH) 50V 12V 12V
ASX
C1138 10u PRE_L
E
ASX 22u ASX
1u 50V
FL1108 FL1109 FL1110 FB1112 R1179 16V
C1104 16V ASX R320 R322
R1118 0051TA 1K ASX
100P N0017TA N0017TA N0017TA IN1R 1.2K 10K
75 FL1106
(CH) N0017TA
1/4W
VIN1 C1128
C1135 S_MUTE
R1137 R1154
100P
0 1000P
*C1109 (CH) 100K
*D1117
10u
EX1034CE 16V Q1105
5.1V KZA073WJ DTC314TK
R337
0.84 0 S_MUTE 10 SC301
C312
FL1107 C356 1/4W Z0738CE
R1160 D311 2200P R343
N0017TA 47u R329
R1157 1K EXA103WJ 0
50V 6.8K TL302 TO POWER
560K 0 36V 1/4W
R1112 ASY TDA_VP
R314 B+29V
68 0 0 1 +30V
VSSD
3.9K
VSSD
20
1
1/4W
INPUT1
4.4 C338
C365 C332 2 +30V
Q1107 2200P 220P
470u
3.8 OUTTNR 0 15.5 50V
2SA1530AR 3
VSSA
TL301
HVPI
EZA513WJ +30V
19
2
C1105 R1146 *D1111
C310 C328 C333 4
220 C1143 EX1049CE NC
0.1u R1110 0 2200P R312 15.5 30.5 2.2u 220P
VDDP
25V 1/10W 470P C1145 8.2V
1K
18
3
0 50V
INN
RED/C1 10u C1157
R309 R315
TL307 5 GND
D
ASX
16V 10u
47K 470K
*D1121 FB1109 C1139 KZA073WJ 16V PRE_R 12.4 30.6 6 GND
BOOT
EX1026CE 0062TA C326 R330 R335
INP
17
4
330P
C1106 3 4 3 4 3 4 10
3.9V C304 R305 C314 0.015u 2.2K TL308 7 GND
0.1u 1/4W
TDA8931T
R1115 0.22u Z 2.2K 0.015u
25V
0 1 2 1 2 1 2 TDA_VPA 30.3 21.6 SPKR+
OUT
VDDA
GREEN1
16
5
C1140 C1158
C1146 *D314
FB1110 330P R1152 R1155 R1158 *L302 C340
*D1122 10u 10u EXA101WJ
0062TA 100 330 2.7K 47uH 0.22u *C342
EX1026CE 16V 16V 4.5 0 30V
PWRUP
PA386WJ 25V
VSSP
C1107 0.33u
15
6
3.9V KZA073WJ
0.1u R1148 C1144 R355 R303 FYF
R1120 C308
25V 220 470P *D1112 4.4 2.7 2.2K D318 (ML)
BLUE1
0
EX1049CE
3.8 0.1u 10.3 12.4 C362
1/10W 1/4W 1SS390
STABI
OUTTNL
14
ENA
7
8.2V 0.22u
*D1123 25V
EX1026CE R1113 R1116 R1125
3.9V
75 75 75 Q1108 0 0 15.5 C322 SPKR-
HVP
IC301
DIAG
13
8
1/4W 1/4W 1/4W 2SA1530AR 0.22u *C330 *D315
0.86 R1159 R358 470u EXA101WJ R339
0 0 0 0 22
CGND
1K 35V 30V
OVP
D306
12
9
SYA 1/4W
1SS390
R1156 0 0
IC1102 C1161 Q1106
VSSD
Q303
VSSD
560K 0
10
11
10u DTC314TK
MM1506XN DTC314TK
16V C364
KZA073WJ 470u
MUTE 10.1 Reference Design
C
0 2.1 0
C1162 TDA_EN
16V
6
1
470u ASY
16V
ASY 0
R338
2.4 0 7.7 R324
OUTTNV
10
5
8.2
2
47K
1/4W
*D1106 R356 Q307

EX1034CE 5.3 2.0 10K
2SA1530AR
4
0.15
3
5.1V D312 C313

C1160 2200P
EXA103WJ R334
0.1u Z
25V 36V C357 6.8K
47u R316
C1159 50V 3.9K
0.01u Z ASY
R360 0 0
VSSD
C366
VSSD
20
1
4.7K 2200P C339
C334 470u
220P
D307 D308 0 15.5 50V
VSSA
HVPI
19
2
1SS390 1SS390 EZA513WJ P301
R313 NA173WJ
C329 C335
1K
OUTV
OUT2R
IN1R
IN2R
OUT2L
OUTTNR
IN1L
OUTTNV
IN2L
S_MUTE
OUTTNL
C309 15.5 30.5 2.2u 220P

S2_MUTE
VDDP
AVLINK1
AVLINK2
SP
TDA8931T
18
3
2200P 50V
INN
R308 R317 ASX
47K 470K TL303
R336 4
B
12.4 30.6 SPKR+
BOOT
A+8V C327 10
INP
17
4
R331
0.015u TL304
1/4W 3 SPKR-
IN3C
IN3R
A+8V PRE_L C315 2.2K

HPMUTE
IN3SW
OUTMONR
IN3L
OUTMONL
IN3YV
VIN1
VIN2
BLUE1
BLUE2
SLOWSW1
GREEN1
SLOWSW2
GREEN2
IN1FSW
IN2FSW
0.015u
RED/C1
RED/C2
30.3 21.6 SPKL+ TL305

R304
OUT
2
VDDA
A+5V C303 SPKL+
16
5
0.22u Z 2.2K
*L301 C341
*D316 *C343 TL306
C305
EXA101WJ
47uH 0.22u
0.33u
1 SPKL-
4.5 0
PWRUP
0.1u PA386WJ 25V
VSSP
30V FYF
15
6
TL1198
TL1197
TL1152
TL1153
TL1154
TL1155
TL1157
TL1158
TL1159
TL1160
TL1161
TL1162
TL1163
TL1164
TL1166
TL1167
TL1168
TL1169
TL1171
TL1172
TL1173
TL1174
TL1175
TL1176
TL1177
TL1178
TL1179
TL1183
TL1184
TL1186
TL1187
TL1188
*D313 (ML)
IC302
TL1191
TL1192
TL1193
TL1194
TL1195
TL1182 EX1026CE 10.3 12.4 C363

TL1185
TL1180
STABI
3.9V 0.22u
14
ENA
7
TL1156
TL1190
TL1189
TL1170 TL1181 TL1196 25V

TL1199
TL1165
0 15.5 C323 SPKL-
HVP
DIAG
13
8
0.22u Z
Q304 *C331 *D317
R340
SPKR
SPKL
DTC314TK 0 0 470u EXA101WJ 22
CGND
OVP
P1101 MUTE 35V 30V
12
9
1/4W
MA250WJ P1102 SYA
0 10.0
MA250WJ
0 0
VSSD
VSSD
19
20
21
22
23
19
20
21
22
23
19
20
21
22
23
10
11
12
13
14
15
16
17
18
10
11
12
13
14
15
16
17
18
10
11
12
13
14
15
16
17
18
1
10
11
P1201
MA250WJ
0
NC
GND
NC

Sharp-Lc-32bt8 37BT8 32GD8 37GD8 Ee Ef Ei Ek Ru

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Sharp-Lc-32bt8 37BT8 32GD8 37GD8 Ee Ef Ei Ek Ru

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LC-26GA5E

LCD COLOUR TELEVISION

PAL B/G, I / SECAM B/G, D/K, L/L’ SYSTEM COLOUR TELEVISION

SHARP CORPORATION This document has been published to

SERVICE MANUAL UPDATE LOG SHEET

Technical Report No. Application

Specifications ELECTRICAL SPECIFICATIONS

Item 32o LCD COLOUR TV, 37o LCD COLOUR TV,

LC-32GD8E_GB_f 35 06.5.1, 0:11 PM

IMPORTANT SERVICE SAFETY PRECAUTION

CAUTION: FOR CONTINUED PROTECTION AGAINST A RISK OF

BEFORE RETURNING THE RECEIVER (Fire & Shock Hazard)

PRECAUTIONS FOR USING LEAD-FREE SOLDER

1 Employing lead-free solder

2 Using lead-free wire solder

Lead-free wire solder for servicing.

Remote control unit TV (Front view)

LC-32GD8E_GB_a 6 06.5.1, 0:07 PM

Operation Manual (Continued)

Connecting a game console or Component D-sub adapter

audiovisual equipment used. Depending on the

Operation Manual (Continued)

• No picture. • Is connection to other components correct? (See pages 9 and 10.)

• Is the correct input source selected? (See page 9.)

Cautions regarding use in high and low temperature environments

IMPORTANT NOTE ON RESETTING THE PIN

The supply voltage (5V) must be correspondingly

Operation Manual (Continued)

VGA 640 g 480

NOTE I N P 1 1 _ _ _ EXT1 (CVBS) W I D E 9 _ _ _ NORMAL (PC)

11. Disconnect all the connectors from all the PWBs.

12. Remove the chassis frame fixing screws (5 pcs.).

1. Entering and exiting the adjustment process mode

1- Unplug the AC power cord of TV set to force power off.

2.2 Description of display

1/11 [INFO] TV AUTO 32: EURO Adjustment process menu

3. Adjustment process mode menu

Page Line Item Description Remarks (Adjustment detail, etc.)

- ERROR STAND-BY CAUSE (Page 1/11)

5. Video Signal Adjustment Procedure

The adjustment process mode menu is listed in Section 3.

5.2. Entering the adjustment process mode

5.3. RF AGC Adjustment

Adjustment Point Adjustment conditions Adjustment procedure

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5.4. RF AGC Adjustment (SMPTE RF SIGNAL- Alternative Method)

Adjustment Point Adjustment conditions Adjustment procedure

5.5. PAL Signal & Tuner Adjustment

Adjustment Point Adjustment conditions Adjustment procedure

5.6. PAL Signal & Tuner Adjustment (SMPTE RF SIGNAL-Alternative Method)

Adjustment Point Adjustment conditions Adjustment procedure

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5.7. ADC Adjustment (Component 15K)

Adjustment Point Adjustment conditions Adjustment procedure

6. White Balance Adjustment

Condition of the inspection: • Backlight: MAX (+8) [DYNAMIC]

M GAMMA IN 1 160 M GAMMA IN 2 320

2- Read the value of the luminance meter.

Offset value of M GAMMA G1 = (Offset value of M GAMMA G6)*(160/960)

6- Repeat step “5” for GAMMA points 4, 3, 2, and 1.

7. QS Temperature NVM Data Conﬁrmation

8. Initialization to factory settings

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