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Home Assignment No-4

Subject: Course: Teacher: Digital Logic Design BEE-3BC Arshad Nazir Marks: Issue: Due on: 100 15 Nov 2012 23 Nov 2012

Note: (10:00 AM) Attempt the given problem set in a sequential order. Show all the design steps. Make an index showing summary of the problems solved with page numbers
and also specify the missing ones. No late submissions will be accepted unless a prior approval from the teacher has been obtained under extremely genuine reasons. The assignments submitted after due date/time will be graded zero. University has zero tolerance for plagiarism and serious penalties apply. All assignments found mutually copied will be marked zero and such recurrence will result in award of zero marks out of total assignments weight age. All the students will submit a certificate with the assignment work stating the originality of their efforts and no copying from others. Note that Ten Marks are reserved for neat work, table of contents, and certificate to be attached with the assignment work. Problem No-1 Design a code converter that should convert a BCD digit to 7-bit ASCII code. Show the following design steps:a. Construct the truth table and write the minterm list equations for each output variable. b. Simplify each output function using map method. Take maximum advantage of dont cares for your optimized design. c. Draw the logic diagram using minimum number of AND, OR, and NOT gates. Assume that only normal inputs are available from the source. d. Let the AND or OR gates have a propagation delay of 10 ns, and propagation delay of NOT gates be 5ns. What is the total propagation delay time in the converter?

Problem No-2

A BCD to seven-segment decoder is a combinational circuit that converts a decimal digit in BCD to an appropriate code for the selection of segments in a display indicator used for displaying the decimal digit in a familiar form. The seven outputs of the decoder (a, b, c, d, e, f, g) select the corresponding segments in the display, as shown in figure P4-9(a) of your text book and reproduced below. The numeric display chosen to represent the decimal digit is shown in figure P4-9(b). Design the BCD to seven-segment decoder using a minimum number of gates. The six invalid combinations result in blank display on the numerical readout. Page 1


Problem No-3

Design a circuit that will add either 1 or 2 to a 4-bit binary number N. Let the inputs N3, N2, N1, N0 represent N. The input K is a control signal. The circuit should have outputs M3, M2, M1, M0, which represent the 4-bit number M. When K=0, M=N+1. When K=1, M=N+2. Assume that the inputs for which M>1111 2 will never occur. Realize the circuit using only 2, 3, and 4-input NAND gates and inverters. Try to minimize the total number of gates and inverters required. The input variables K, N3, N2, N1, and N0, will be available from toggle switches. Any solution that uses 13, or fewer gates and inverters (not counting the five inverters for the inputs) is acceptable.

Problem No-4

Design a 4-bit Arithmetic Logic Unit (ALU) to perform the following functions: Select Lines S1 0 0 1 1 S0 0 1 0 1 Output Z X plus Y X plus Yplus 1 (X Y) X OR Y Comments Addition 2s complement Subtraction Equivalence Logical OR

Use 2-to-1 multiplexers, binary adders, XOR and AND gates as needed. Assume that X and Y are 4-bit numbers. Draw a logic circuit. Problem No-5 Design a commercial Decimal-to-BCD priority encoder with inputs D0, D1, D2,, D9 and outputs w, x, y, z. Provide an output V to indicate that at least one of the inputs is present. The input with the highest subscript number has the highest priority.


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Specify the truth table, derive algebraic expressions for each output function and draw the logic diagram of the encoder circuit. Problem No-6 Realize the logic circuit shown in Figure P6 with a 4-to-16 decoder constructed from five 2-to-4 decoders with active-low enable and active-low outputs and external logic gate. Also show internal schematics for only one decoder block used in your design.

Figure P6: Problem No-7

Logic Circuit

A simple security system for two doors consists of a card reader and a keypad.

Card reader

A B Logic Circuit




To door1 To door2 To alarm

A person may open a particular door if he or she has a card containing the corresponding code and enters an authorized EE221 DLD Page 3

keypad code for that card. The outputs from the card reader are as follows:

A B No card inserted 0 0 Valid code for door1 0 1 Valid code for door2 1 1 Invalid card code 1 0 To unlock a door, a person must hold down the proper keys on the keypad and, then, insert the card in the reader. The authorized keypad codes for door1 are 101 and110, and the authorized keypad codes for door2 are 101 and 011. If the card has an invalid code or if the wrong keypad code is entered, the alarm will ring when the card is inserted. If the correct keypad code is entered, the corresponding door will be unlocked when the card is inserted. Design the logic circuit for this simple security system. Your circuits inputs will consist of a card code AB, and a keypad code CDE. The circuit will have three outputs XYZ (if X or Y=1, door1 or 2 will be opened; if Z=1, the alarm will sound). Design your circuit using only 2, 3, and 4-input NOR gates and inverters. Any solution with 19 or fewer gates and inverters (not counting the five inverters for the inputs) is acceptable. Problem No-8 Realize the function F(A,B,C,D)=AC+ABD+ACD+ABD a. With an 8-to-1 MUX constructed from two 4-to-1 MUXes, two three-state buffers and one inverter. Use A, C, and D as select inputs where A is the most significant and D is the least significant bit. Use a single 4-to-1 MUX constructed from four three-state buffers and a decoder. Take C and D as select inputs where A is the most significant and D is the least significant bit.


______________________________________________________________________ Good Luck


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