R-2R Binary Ladder DAC

R= 10k 2R = 20k

Req3

Req2

Req1

Vref = 10 Vdc Circuit analysis

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R-2R ladder analysis (cont.)

V=10 Vdc V1 I1 I 20k I2 10k V2 I 20k I3 20k 20k 10k V3

Voltages and currents

I4

R-2R network produces binary weighted currents from 2 values of resistance

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Example: Find the output voltage for the R-2R DAC shown below. The digital input is 1102. R= 15k 2R = 30k Rf = 15k

I2

I1

I0

Req

IT

Vref = 5 Vdc
Find currents I0, I1, I2 and use formula V0 = - ITRf

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Commerical DACs DAC0800 Family

Devices used in practical designs use intergrated R-2R networks and transistor switching. TTL compatiable.

Iref
14

4 2

8-bit binary code converted to 256 levels of I0 Full scale value set by reference current. 1 bit change produces change of 1/256 in I0 Equations: D = decimal equivalent of binary input
Iref = Vref Rref
4

D I0 = Iref 256

Ifs =

Vref 255 Rref 256

Full scale output

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IC DAC Example: Use OP AMP to convert current to voltage. The reference voltage is +10 Vdc and the Reference resistance is 5k. The value of Rf = 2.5k

a.) Digital input 000011012 b.) Digital input 100011012

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IC DAC example (cont.)

input 100011012

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Analog-to-digital Conversion Convert continuous signals to digital values

Requires 3 steps 1.) Sample analog signal (Nyquist rate) Need a minimum of 2 x max frequency of interest Higher sample rates, easier to reconstruct signal 2.) Hold analog sample value while conversion in progress 3.) Convert analog value to digital value

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Types of Analog-to-Digital Converters

Integrating High accuracy Low speed low cost Not used in data acquisition systems Tracking (Counter) High speed in tracking mode Slow conversion time (some sub-types) susceptible to noise Successive Approximation conversion time independent of value Flash Parallel Multicomparator type of conversion Highest speed HIgh cost
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Counter Analog-to-Digital (A/D) Converters

When V+ = VV V+ + VClock V

Digital output
A B AND C O U N T E R D A C

1.) Input a constant value. Requires a sample and hold circuit. Not shown. 2.) AND gate passes clock signal when pt. A logic high 3.) Counter incremented by signal B 4.) DAC output increases as counter output increases

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Counter-type A/D converter

input V+ + VClock V

A B AND C O U N T E R D A C

5.) Counter stops when DAC V exceeds input V

input V input DAC output

time

Conversion time depends on the input level Tracking A/D converters us up/down counters to minimize conversion times
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Successive Approximation A/D Converters

Counter A/D converters conversion time proportional to the input level Improve conversion speed using a binary search technique. Procedure 1. Set MSB to 1 2. Test input, Vin, against DAC output, VDAC 3. If VDAC > Vin, reset bit to 0, else bit = 1 (VDAC < Vin) 4. Move to next bit and repeat steps 1 - 3 The input is converted to digital value in n steps, where n = the number of bits in digital signal

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Successive-Approximation A/D Converters

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Example: an 8-bit successive approximation ADC is presented with a analog value that has a value of 143. Use the successive approximation algorithm given previously to determine the binary value. Assuming that each test takes a single clock cycle, determine the maximum conversion time for the ADC if it is clocked at 4.77 MHz

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Example continued

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Digital Input/Output Signals (Digital I/O)

Boolean logic level 1 = logic high 0 = logic low Boolean levels form basis of numbering system and computer structure. 1 and 0s bits groups of bits 8-bits = byte 16-bits = 2 bytes = 1 word All collections of bits are power of 2 Addressing bits in a byte
7 1 6 1 5 0 4 0 3 0 2 1 1 1 0 0 Address location Bit

Weighted number system - conversion from binary to decimal n = 1x27+1x26+0x25+0x24+0x23+1x22+1x21+0x20 n = 1x128+1x64+1x4+1x2 = 198 198 decimal equivalent of binary number
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Digital Hardware Standards

Specifies voltage levels of logic high and logic low current output and input levels. Makes chips from same family compatible with each other Transistor-Transistor Logic (TTL) Nominal 5 Vdc logic high and 0 Vdc logic low Practical TTL output port characteristics Source current 200 A Sink current 1.7 mA Logic 1 Threshold voltage V>= 2.4 Vdc

Switch source of current

+5

Switch sink of current

Load Load

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Simple TTL gate Sink and Source

Vcc = + 5 Vdc IL RL Rb Vin Vo IL flows to ground when Vin = logic 1 Vin = 5 V for Logic high and 0 V for logic low

Switch model of gate

Vcc = + 5 Vdc IL Load RL Vo Vin Load will draw current went Vin = 5 Vdc switch (Transistor) must sink load current ILL When Vin = 5 Vdc Vo = 0 V When Vin = 0 Vdc Vo = 5 V Logic Inverter input output 1 0 0 1

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Switch model of gate - current sourcing

Vcc = + 5 Vdc IL

Load Vo Vin ILL

When Vin is logic 1 load is de-activated (switch closed) When Vin is logic 0 load draws current from source With Transistors current sourcing Load ILL Vin sourcing current TTL Inverter symbol Load ILL

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TTL Sinking LEDs

Output byte port feeding loads from inverters (buffering) Resistor used to limit current through gate

When input is logic 1 (+5 Vdc) output is logic 0 (ground)

Limits of TTL buffers - 1.7 mA For high current output - use discrete transistor or relay (electromechanical or solid state)

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Solid State Relay

Ac supplies only Optically coupled device
+5 Vdc AC

AC Ground

Typical Application
+5 Vdc

Motor Load 1/4 HP 120 Vac M 120 V

Grd

Output bit low motor is on Output bit high motor is off

Must remember output logic level to get desired action in device

Output Bit
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Electromechanical Relays
+ 12 Vdc Typical diode voltage spike protector Relay coil dc resistance load to transistor

To output bit Resistor sized to allow TTL level to turn on relay

To high power load AC or DC

NPN transistor

Relay interface using TTL gate (open collector)

Lower current handling ability + 12 Vdc Typical Current limited by the TTL chip To high power loads AC or DC

To output bit

LS7406 chip
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Digital Input Interface

Limit current and change voltage levels Using mechanical switches
+ 5 Vdc

Input port constructed of TTL chips

2.2 k

To data acquisition board

Resistor sized to limit current to value below port sinking limit

Mechanical switch

+ 5 Vdc Digital interface for a byte of inputs. All resistors sized to limit sink current Switches can be either momentary contact or toggle
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Digital Interface Non-TTL Levels

+24 Vdc + 5 Vdc

2.2k Typical 2.2k Typical To TTL input R TTL inverter gate (7404 or 7414)

Optocoupler

Switch closed - LED de-energized Switch open - LED energized LED and Optical transistor integrated on same chip energizing LED causes optical transistor to conduct Transistor off - inverter input +5 Vdc output 0 V Transistor on - inverter input 0 Vdc output 5 V

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Example: determine the logic levels and currents in the digital interface circuit shown below Assume that the optocoupler diode has an on-state voltage drop of 1.4 V and the optical transistor has a on-state drop of 0.4 V.
+24 Vdc + 5 Vdc

2.2k R = 100

2.2k To TTL input

Logic open switch = 0 = 0 V close switch = 1 = 5 V

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Example (cont.)

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Relay Interface Example

Ic

+24Vdc Relay Coil model

Size Rb such that Q1 will activate with a TTL input

10 mH

Transistor Parameters 500 Vs + Rb + Vbe 2N3904 Vce Q1 hfe = 200 (nominal) Vce(sat) = 0.2 V Vbe(sat) = 0.8 V

Ib

Assume transistor is in saturation and compute value of Ic

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Relay Interface Example (cont.)

Freewheeling diode

+24Vdc

10 mH D1 500 Vs Rb 2N3904 Q1

Relay Coil model

Diode D1 provides a path for the current induced when the transistor is switched off. If also clamps the induced voltage to the forward drop of the diode.
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