ELEC2630 EMBEDDED

SYSTEMS THEORY
Lecture 2: Embedded Systems
Concepts [part 2]
 Serial v Parallel
• Serial has one data line / Parallel many
• Parallel quicker as all bits sent at once
• Serial needs a method of defining where
one bit ends and the next starts. This is
done using time intervals, pre-defined or
transmitted with the data.
TYPES OF SERIAL INTERFACES

• Asynchronous

• Synchronous

• SPI
 TRANSCEIVERS
The physical layer of serial communications
often involve a circuit known as a
transceiver which changes the logic level
signals into voltages more suitable for
transmission over long cables. One of the
most common is specified by the RS 232
standard.
ASYNCH WAVEFORM
 PARITY
The previous slide shows 8 bits of data, but the
ASCCI encoding of computer characters only
requires 7 bits, so the LSB is sometimes used
as a PARITY bit. This is a simple form of error
checking where the number of bits are level “1”
are added and the MSB is used to make the
total an even number for even PARITY and odd
for odd PARITY.
TERMINAL SOFTWARE
ASCII TABLE
USART
 SYNCHRONOUS
• Synchronous transmission can use the
same RS232 levels via transceivers but
uses an extra signal, a clock which is used
to syncronise each end of the
transmission.
• The error checking for synchronous data
is much using CRCs, Cyclic Redundancy
Checksums which are calculated at each
end and compared.
SPI WAVEFORM
 Uses and features of SPI
• Short range communications between
devices on a board or to nearby boards.

• Works at normal logic levels, i.e. No

transceivers needed.

• Speed of transmission governed by the

clock speed.