9/20/2009

Digital cosine generator

Patent number: Publication date: Inventor(s): A pplicant(s): Classification: - international:

esp@cenet Bibliographic data

DE3112570 (A1) 1982-10-28 KOFFLER HANS DR ING [DE] SIEMENS AG [DE] H03H17/00; H03H17/02; H03H17/00; H03H17/02; (IPC1-7): H03BX; H03B1/04 H03H17/00; H03H17/02A DE19813112570 19810330 DE19813112570 19810330

A lso published as:

DE3112570 (C2)
Cited documents:

DE2927713 (A1) DE2549574 (A1)

- european: A pplication number: Priority number(s):

Abstract of DE 3112570 (A1) The invention relates to a digital cosine generator based on the wave digital filter principle. The generator requires only two memories, a multiplier and five adders. Its circuit arrangement represents a parallel resonant circuit with infinite quality. An amplitude, once entered, is therefore retained. The frequency is defined via a modification of the gain factor. This cosine generator has a circuit arrangement in which two adders (1, 2) are connected in series. The output of the second adder (2) is fed to the output (0) and simultaneously connected to the first input (31) of a third adder (3). The inputs of all adders are designated with the indices (1 and 2), and their outputs with the index (3).; The output (33) of the third adder is connected to the first input (41) of a fourth adder (4) whose output is connected via a delay component, a memory (6) to the input (51) of a fifth adder (5). A second memory (7) is connected to the output (33) of the third adder (3). Its output is connected to the inputs (11) and (52) of the first and fifth adders. The output (53) of the fifth adder is connected to the second input (42) of the fourth adder and to the input of a multiplier (8). The output of this multiplier is connected to the second inputs (12) and (32) of the first and third adders. A start-up device (9) is connected to the second input (22) of the second adder, via which the maximum amplitude value is entered. Data supplied from the esp@cenet database Worldwide

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