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NUMBER SYSTEM BINARY CODES BOOLEAN ALGEBRA K MAPS

COMBINATIONAL CKT INTRODUCTION ADDER FULL ADDER(FA) FA using HAs BINARY ADDER SERIAL ADDER PARALLEL ADDER CARRY LOOK AHEAD ADDER (CLA) QUESTION (BCD to Excess-3 using ADDER) SUBTRACTORS FULL SUBTRACTOR FS using HSs SERIAL SUBTRACTOR PARALLEL SUBTRACTOR SUBTRACTION using ADDER 4-bit ADDER & SUB. in a SINGLE CIRCUIT COMPARATORS 2-bit COMPARATOR HIGHER COMPARITOR from LOWER COMPARATORS QUESTION (10-bit using 4-bit Comparator) DECODER FA USING DECODER HIGHER DECODER from LOWER DECODERS DEMULTIPLEXER ENCODER QUESTION (Octal to Binary Encoder) MULTIPLEXER(MUX) HIGHER MUXes from LOWER MUX Implementation of BOOLEAN FUNCTION using MUXes-I Implementation of BOOLEAN FUNCTION using MUXes-II QUESTION (Implement function using MUX) QUESTION (Implement function using MUX) Implementation of GATES using MUXes BINARY to GRAY converter GRAY to BINARY converter PARITY GENERATOR(4-bit message) PARITY GENERATOR(3-bit

PARITY GENERATOR ( 4-bit MESSAGE):

Q-Implement the parity generator (a) Even (b) Odd for 4-bit message Ans: (a) Following is the truth table and K-map for even parity Binary number 0000 0001 0010 0011 0100 0101 0110 0111 1000 1001 1010 1011 1100 1101 1110 1111 Parity (even) 0 1 1 0 1 0 0 1 1 0 0 1 0 1 1 0

K-MAP for even parity:

We know this is the K-map for XOR gate. Hence the equation we get is P (even) = x xor y xor z xor w

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PARITY GENERATOR(3-bit message) MORE QUESTIONS Q1 (Timing Diagram) Q2 (Timing Diagram) Q3 (Implement equation using Half Adder) Q4 (Error in 2 to 1 MUX) Q5 (Palindrome Circuit) Q6 (Implement function using MUX & ADDER) Q7 (Implement function using ADDER & MUX) Q8 (Implement function using ADDER & MUX) Q9 (4 to 1 MUX using 2 to 1 MUX) Q10 (Implement ALU using MUX & ADDER)

(b) Following is the truth table and K-map for odd parity Binary number 0000 0001 0010 0011 0100 0101 0110 0111 1000 1001 1010 1011 1100 1101 1110 1111 K-map for odd parity: Parity (odd) 1 0 0 1 0 1 1 0 0 1 1 0 1 0 0 1

SEQUENTIAL CIRCUITS TIMING CIRCUITS

We know this is K-map for XNOR gate. Hence the equation we get is P (odd) = x xnor y xnor z xnor w

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