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M.Tech - II Semester Supplementary April/May 2012 Examinations (for students admitted in 2009- 10 & 2010-11 only) FPGA ARCHITECTURE & APPLICATIONS
(Digital Systems and Computer Electronics) Time: 3 hours Answer any FIVE Questions All Questions carry equal marks ***** 1. (a) Distinguish between ROMs, PLAs and PALs. (b) Mention the features of altera flex logic 1000 series CPLD. 2. (a) Design a BCD counter using appropriate programming logic elements or devices. (b) A combinational circuit whose i/p is a 4 bit number and whose o/p is a 2s complement of the input number is to be implemented using FPGA device. Show the appropriately coded logic diagram of the selected device. 3. Give the features, programming and any typical applications of any CPLD device of altera- max 5000 series. Max. Marks: 60
4. (a) Give the Xilinx XC 4000 features and compare them with alteras flex 8000 series FPGA. (b) Explain about top down design flow of FSM. 5. (a) Explain how realization of state machine chart using microprogramming. (b) Explain about the linked state machines and on-hot state machine. 6. (a) Describe the methodology of architectures certend around non-registered PLDs. (b) Explain about on-hot design method. 7. (a) Explain about linked state machine. (b) Give the basic concepts and properties of pertrinetes for state machines. 8. Write notes on any two. (a) Metal stability. (b) Parallel adder sequential circuits. (c) FPGA advantages EDA.
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