library IEEE;

use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
-- Uncomment the following library declaration if using
-- arithmetic functions with Signed or Unsigned values
--use IEEE.NUMERIC_STD.ALL;
-- Uncomment the following library declaration if instantiating
-- any Xilinx primitives in this code.
--library UNISIM;
--use UNISIM.VComponents.all;
entity AUTO_HAND is
Port ( CK100 : in STD_LOGIC;
START : in STD_LOGIC;
STOP : in STD_LOGIC;
UP : in STD_LOGIC;
DN : in STD_LOGIC;
AH : in STD_LOGIC;
SSEG : out STD_LOGIC_VECTOR (7 downto 0);
AN : out STD_LOGIC_VECTOR (3 downto 0));
end AUTO_HAND;
architecture Behavioral of AUTO_HAND is
SIGNAL CK4HZ:STD_LOGIC:='0';
SIGNAL CHIA:STD_LOGIC_VECTOR(27 DOWNTO 0):=X"0000000";
SIGNAL NG:STD_LOGIC_VECTOR(3 DOWNTO 0);
SIGNAL TR:STD_LOGIC_VECTOR(3 DOWNTO 0);
SIGNAL CH:STD_LOGIC_VECTOR(3 DOWNTO 0);
SIGNAL DV:STD_LOGIC_VECTOR(3 DOWNTO 0);
SIGNAL CH1:STD_LOGIC_VECTOR(3 DOWNTO 0);
SIGNAL DV1:STD_LOGIC_VECTOR(3 DOWNTO 0);
SIGNAL CKQ:STD_LOGIC_VECTOR(1 DOWNTO 0);
SIGNAL BCD:STD_LOGIC_VECTOR(3 DOWNTO 0);
SIGNAL TT:STD_LOGIC;
SIGNAL TT1:STD_LOGIC;
SIGNAL TT2:STD_LOGIC;
SIGNAL TT3:STD_LOGIC;
begin
CX: PROCESS(CK100,CHIA,CK4HZ)
BEGIN
IF FALLING_EDGE(CK100) THEN
IF CHIA=X"0BEBC20" THEN
CHIA<=X"0000000";
CK4HZ <= NOT CK4HZ;
ELSE
CHIA<=CHIA+1;
END IF;
END IF;
CKQ<=CHIA(15 DOWNTO 14);
END PROCESS CX;
DEM: PROCESS(CK4HZ,START,STOP,UP,DN,AH,NG,TR,CH,DV,TT,TT1,TT2,TT3)
BEGIN
IF STOP='1' THEN
TT<='0';
ELSIF START='1' THEN

TT<='1';
ELSE
IF TT='0' THEN
TT<='0';
ELSIF TT='1' THEN
TT<='1';
END IF;
END IF;
IF UP='1' THEN
TT3<='0';NG<=X"D";TR<=X"B";CH1<=X"1";DV1<=X"4";
ELSIF DN='1' THEN
TT3<='1';NG<=X"D";TR<=X"F";CH1<=X"3";DV1<=X"6";
ELSE
IF TT3='0' THEN
TT3<='0';CH<=X"1";DV<=X"4";
ELSIF TT3='1' THEN
TT3<='1';CH<=X"3";DV<=X"6";
END IF;
END IF;
IF TT='0' THEN
IF AH='0' THEN
TT1<='0';NG<=X"A";TR<=X"B";CH<=X"C";DV<=
X"0";CH1<=X"1";DV1<=X"4";
ELSE
TT1<='1';NG<=X"D";TR<=X"A";CH<=X"E";DV<=
X"F";CH1<=X"3";DV1<=X"6";
END IF;
ELSE
IF TT1='0' THEN
IF TT2='0' THEN
IF RISING_EDGE(CK4HZ) TH
EN
TT2<='0';
IF CH1=X"3" AND
DV1=X"6" THEN
TT2<='1'
;
ELSIF DV1=X"9" T
HEN
DV1<=X"0
";
CH1<=CH1
+1;
ELSE
DV1<=DV1
+1;
END IF;
END IF;
CH<=CH1;DV<=DV1;NG<=X"A"
;TR<=X"B";
ELSE
IF RISING_EDGE(CK4HZ) TH
EN
TT2<='1';
IF CH1=X"1" AND
DV1=X"4" THEN
TT2<='0'
;
ELSIF DV1=X"0" T
HEN

DV1<=X"9
";
CH1<=CH1
-1;
ELSE
DV1<=DV1
-1;
END IF;
END IF;
CH<=CH1;DV<=DV1;NG<=X"A"
;TR<=X"F";
END IF;
ELSE
IF TT3='0' THEN
IF RISING_EDGE(CK4HZ) THEN
IF CH1=X"3" AND DV1=X"6"
THEN
CH1<=X"1";DV1<=X
"4";
ELSIF DV1=X"9" THEN
DV1<=X"0";
CH1<=CH1+1;
ELSE
DV1<=DV1+1;
END IF;
END IF;
CH<=CH1;DV<=DV1;NG<=X"D";TR<=X"B
";
ELSE
IF RISING_EDGE(CK4HZ) THEN
IF CH1=X"1" AND DV1=X"4"
THEN
CH1<=X"3";DV1<=X
"6";
ELSIF DV1=X"0" THEN
DV1<=X"9";
CH1<=CH1-1;
ELSE
DV1<=DV1-1;
END IF;
END IF;
CH<=CH1;DV<=DV1;NG<=X"D";TR<=X"F
";
END IF;
END IF;
END IF;

END PROCESS DEM;

DAHOP: PROCESS(CKQ,DV,CH,TR,NG)
BEGIN
CASE CKQ IS
WHEN
WHEN
WHEN
WHEN

"00" => BCD<= DV;AN<= "1110";

"01" => BCD<= CH;AN<= "1101";
"10" => BCD<= TR;AN<= "1011";
OTHERS => BCD<=NG;AN<="0111";

END CASE;
END PROCESS DAHOP;
GIAIMA: PROCESS(BCD)
BEGIN
CASE BCD IS
WHEN
WHEN
WHEN
WHEN
WHEN
WHEN
WHEN
WHEN
WHEN
WHEN
WHEN
WHEN
WHEN
WHEN
WHEN
WHEN
WHEN
END CASE;
END PROCESS GIAIMA;
end Behavioral;

X"0" => SSEG<=X"C0";

X"1" => SSEG<=X"F9";
X"2" => SSEG<=X"A4";
X"3" => SSEG<=X"B0";
X"4" => SSEG<=X"99";
X"5" => SSEG<=X"92";
X"6" => SSEG<=X"82";
X"7" => SSEG<=X"F8";
X"8" => SSEG<=X"80";
X"9" => SSEG<=X"90";
X"A" => SSEG<=X"88";--CHU
X"B" => SSEG<=X"C1";--CHU
X"C" => SSEG<=X"87";--CHU
X"D" => SSEG<=X"89";--CHU
X"E" => SSEG<=X"AB";--CHU
X"F" => SSEG<=X"A1";--CHU
OTHERS => NULL;

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