module excess3bcdadder(A,B,Cin,Sum,Cout);

input [3:0] A,B;

input Cin;
output [3:0] Sum;
output Cout;
wire [3:0] ea,eb,claA,claB;
wire [9:0] excess1;
wire excess,Cout1;
//assign excess = ((B[3]&B[0])& (A[3]|A[2]|A[1]|A[0]))|(B[3]&(A[3]|A[2]|
A[1]))|((B[2]&B[1]&B[0])&(A[3]|A[2]|(A[1]&A[0])))|((B[2]&B[1])&(A[3]|A[2]))|((B[
2]&B[0])|(A[3]|(A[2]&A[0])|(A[2]&A[1])))|(B[2]&(A[3]|(A[2]&A[1])))|((B[1]&B[0])&
(A[3]|(A[2]&A[1]&A[0])))|(B[1]&A[3])|(B[0]&(A[3]&(A[2]|A[1]|A[0])));
assign excess1[9] = ((B[3]&B[0])&(((A[3]|A[2]|A[1]|A[0])&!Cin)|(!(A[3]&A
[2]&A[1]&A[0])&Cin)));
assign excess1[8] = (B[3]&((A[3]|A[2]|A[1])|(A[0]&Cin)));
assign excess1[7] = ((B[2]&B[1]&B[0])&((A[3]|A[2]|(A[1]&A[0]))|(A[1]&Cin
)));
assign excess1[6] = ((B[2]&B[1])&((A[3]|A[2])|(A[1]&A[0]&Cin)));
assign excess1[5] = ((B[2]&B[0])&((A[3]|(A[2]&A[0])|(A[2]&A[1]))|(A[2]&C
in)));
assign excess1[4] = (B[2]&((A[3]|(A[2]&A[1]))|(A[2]&A[0]&Cin)));
assign excess1[3] = ((B[1]&B[0])&((A[3]|(A[2]&A[1]&A[0]))|(A[2]&A[1]&Cin
)));
assign excess1[2] = (B[1]&(A[3]|(A[2]&A[1]&A[0]&Cin)));
assign excess1[1] = (B[0]&(A[3]&((A[2]|A[1]|A[0])|Cin)));
assign excess1[0] = A[3]&A[0]&Cin;
assign excess = excess1[9]|excess1[8]|excess1[7]|excess1[6]|excess1[5]|e
xcess1[4]|excess1[3]|excess1[2]|excess1[1]|excess1[0];
assign
assign
assign
assign

ea[3]
ea[2]
ea[1]
ea[0]

=
=
=
=

A[3] | (A[2]&A[1]) | (A[2]&A[0]);

(~A[2]&A[1]) | (~A[2]&A[0]) | (A[2]&~A[1]&~A[0]);
~(A[1] ^ A[0]);
~A[0];

assign
assign
assign
assign

eb[3]
eb[2]
eb[1]
eb[0]

=
=
=
=

B[3] | (B[2]&B[1]) | (B[2]&B[0]);

(~B[2]&B[1]) | (~B[2]&B[0]) | (B[2]&~B[1]&~B[0]);
~(B[1] ^ B[0]);
~B[0];

assign claA = excess?ea:A;

assign claB = excess?eb:B;
assign Cout = excess;
Cla4 cla0(Cout1, Sum, claA,claB,Cin);
endmodule