CAD for VLSI List of Some References for Logic Synthesis

Ciesielski M. J., Shen J. J., Davio M.: A unified approach to input-output encoding for FSM state assignment; ACM/IEEE Design Automation Conference, pages 176-181, 1991. Devdas S., Newton A. R., Ma H. K., Sangiovanni-Vincentelli A: MUSTANG: State Assignment of Finite State Machines Targeting Multilevel Logic Implementations; IEEE Transactions on CAD, pages 1290-1300, vol. 7, No. 12, December 1988. Devdas S., Newton A. R.: Exact Algorithms for Output Encoding, State Assignment and Four-Level Boolean Minimization; IEEE Transaction on CAD, pages 13-27, Vol. 10, No. 1, January 1991. Goldberg E. I., Villa T., Brayton R. K., Sangiovanni-Vincentelli A.: Theory and Algorithms for Face Hypercube Embedding; IEEE Transactions on CAD of Integrated Circuits and Systems, pages 472-488, Vol-17, No. 6, June 1998. Hachtel G. D., Rho J. K., Jecoby R.: Exact and Heuristic Algorithms for the Minimization of Incompletely Specified State Machines; pages 184-191. Micheli G.D., Brayton R. K., Sangiovanni-Vincentelli A.: Optimal State Assignment for Finite State Machines; IEEE transaction on Computer Design, pages 269-285, Vol. CAD-4, No. 3, July 1985. Mohan C. R., Chakrabarti P. P.: EARTH: combined state assignment of PLA-based FSM's targeting areaand testability; Computer-Aided Design of Integrated Circuits and Systems, pages 727-731, Vol. 15, No. 7, July 1996. Rosenkrantz D. J.: Half-Hot State Assignments for Finite State Machines; IEEE Transaction on Computers, pages 700-702, Vol. 39, No. 5, May 1990. Rudell R. L.: Multi-values Logic Minimization for PLA Synthesis; June 1986. Yang S., Ciesielski M. J.: Optimum and suboptimum algorithms for input encoding and its relationship to logic minimization; IEEE Transactions on CAD, Vol. 10, No. 1, January 1991.