///////////////////////////////////////////////////////////////////////////// ////////////// ///////////////////////////////////////////////////////////////////////////// ////////////////// ///////////////////////////////////////////////////////////////////////////// ////////////////// #include "stm32f4xx.h" #include "stm32f4xx_rcc.h" #include "stm32f4xx_gpio.h" #include "stm32f4xx_fsmc.

h"

/* Private define -----------------------------------------------------------*/ #define BUFFER_SIZE #define WRITE_READ_ADDR 20000-->38000 #define COMMAND_ADDR 0x100 0x10000 //changed from

0x000

/* Private macro ------------------------------------------------------------*/ #define Bank1_SRAM1_ADDR ((uint32_t)0x60000000) >60000000 this is availabe in stm32f407 uint32_t *LCD_LCDREG=0x60000000; uint32_t *LCD_LCDRAM=0x60020000; /* Private variables --------------------------------------------------------*/ uint8_t TxBuffer[BUFFER_SIZE]; //eddited 640000000-

__IO uint32_t WriteReadStatus = 0; uint32_t Index = 0; char readbuf[10];

/* Private function prototypes ----------------------------------------------*/ void Fill_Buffer(uint16_t *pBuffer, uint16_t BufferLenght, uint32_t Offset); //void STM_EVAL_LEDInit(void); //void STM_EVAL_LEDOn(Led_TypeDef Led); void SRAM_Init(void); void SRAM_ReadBuffer(uint8_t* pBuffer, uint32_t NumHalfwordToRead); void SRAM_WriteBuffer(uint8_t* pBuffer, uint32_t NumHalfwordToWrite);

void LCD_writeData( uint16_t value ) { value=value<<8; *LCD_LCDREG=value; } void LCD_writeCommand(uint16_t value) { value=value<<8; *LCD_LCDRAM=value; }

void SRAM_WriteBuffer(uint8_t* pBuffer, uint32_t NumHalfwordToWrite) { for (; NumHalfwordToWrite != 0; NumHalfwordToWrite--) /* while there is data to write */ { /* Transfer data to the memory */ *(uint8_t *) (Bank1_SRAM1_ADDR+WRITE_READ_ADDR ) = *pBuffer++; Delay(16);

/* Increment the address*/ //WriteAddr += 2; } } void FILLLCD(uint8_t* pBuffer) { int i,k; for(i=0;i<76800;i++) { *(uint8_t *) (Bank1_SRAM1_ADDR+WRITE_READ_ADDR ) = *pBuffer++; *(uint8_t *) (Bank1_SRAM1_ADDR+WRITE_READ_ADDR ) = *pBuffer++; *(uint8_t *) (Bank1_SRAM1_ADDR+WRITE_READ_ADDR ) = *pBuffer++; *pBuffer--; *pBuffer--; *pBuffer--; } } void CLEAR(uint8_t* pBuffer,int length) { int i,k; for(i=0;i<length;i++) { *(uint8_t *) (Bank1_SRAM1_ADDR+WRITE_READ_ADDR ) = *pBuffer++; *(uint8_t *) (Bank1_SRAM1_ADDR+WRITE_READ_ADDR ) = *pBuffer++; *(uint8_t *) (Bank1_SRAM1_ADDR+WRITE_READ_ADDR ) = *pBuffer++; *pBuffer--; *pBuffer--; *pBuffer--; //1581=51*31 //1581=51*31

} } void setcolor(uint8_t* pBuffer,int len) { for(;len!=0;len--) { *(uint8_t *) (Bank1_SRAM1_ADDR+WRITE_READ_ADDR ) = *pBuffer++; *(uint8_t *) (Bank1_SRAM1_ADDR+WRITE_READ_ADDR ) = *pBuffer++; *(uint8_t *) (Bank1_SRAM1_ADDR+WRITE_READ_ADDR ) = *pBuffer++; } }

void SRAM_writecommand(uint8_t* pBuffer,uint32_t NumHalfwordToWrite) { //SRAM_ReadBuffer(readbuf,30000,4); //inorder to pull RDX high

for (; NumHalfwordToWrite != 0; NumHalfwordToWrite--) /* while there is data to write */ { *(uint8_t*)(Bank1_SRAM1_ADDR+COMMAND_ADDR)=*pBuffer++;

} void sendfont(uint8_t* pBuffer,uint32_t NumHalfwordToWrite) {

for (; NumHalfwordToWrite != 0; NumHalfwordToWrite--) // while there is data to write {

//uint16_t* value=(*pBuffer|0x0000)<<8; *(uint8_t*)(Bank1_SRAM1_ADDR+WRITE_READ_ADDR)=*pBuffer++;//<<8; }

} void SRAM_ReadBuffer(uint8_t* pBuffer, uint32_t NumHalfwordToRead) {

for (; NumHalfwordToRead != 0; NumHalfwordToRead--) /* while there is data to read */ { /* Read a half-word from the memory */ *pBuffer++ = *(__IO uint8_t*) (Bank1_SRAM1_ADDR +0x10000 );//ReadAddr);

/* Increment the address*/ // } } ReadAddr += 2;

void Fill_Buffer(uint16_t *pBuffer, uint16_t BufferLenght, uint32_t Offset) { uint16_t IndexTmp = 0;

/* Put in global buffer different values */ for (IndexTmp = 0; IndexTmp < BufferLenght; IndexTmp++ ) { pBuffer[IndexTmp] = IndexTmp +Offset; }

/* Private functions --------------------------------------------------------*/ /** * @brief * @param Main program. None

* @retval None */ void SRAM_Init(void) { FSMC_NORSRAMInitTypeDef FSMC_NORSRAMInitStructure; p;

FSMC_NORSRAMTimingInitTypeDef

GPIO_InitTypeDef GPIO_InitStructure;

/* Enable GPIOs clock */ RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOD | RCC_AHB1Periph_GPIOE, ENABLE);

/* Enable FSMC clock */ RCC_AHB3PeriphClockCmd(RCC_AHB3Periph_FSMC, ENABLE);

/*-- GPIOs Configuration ----------------------------------------------------*/ /* +-------------------+--------------------+------------------+-----------------+ + + SRAM pins assignment

+-------------------+--------------------+------------------+-----------------+ | PD0 <-> FSMC_D2 FSMC_A10 | | PD1 <-> FSMC_D3 FSMC_A11 | | PE0 <-> FSMC_NBL0 | PF0 <-> FSMC_A0 | PG0 <->

| PE1

<-> FSMC_NBL1 | PF1

<-> FSMC_A1 | PG1 <->

| PD4 <-> FSMC_NOE | PE3 FSMC_A12 | | PD5 <-> FSMC_NWE | PE4 FSMC_A13 | | PD7 <-> FSMC_NE1 |

<-> FSMC_A19

| PF2

<-> FSMC_A2 | PG2 <->

<-> FSMC_A20

| PF3

<-> FSMC_A3 | PG3 <->

| PD8 <-> FSMC_D13 | PE7 FSMC_A14 | | PD9 <-> FSMC_D14 | PE8 FSMC_A15 | | PD10 <-> FSMC_D15 | PE9 FSMC_NE2 |

<-> FSMC_D4

| PF4

<-> FSMC_A4 | PG4 <->

<-> FSMC_D5

| PF5

<-> FSMC_A5 | PG5 <->

<-> FSMC_D6

| PF12 <-> FSMC_A6 | PG9 <->

| PD11 <-> FSMC_A16 | PE10 <-> FSMC_D7 ---+ | PD12 <-> FSMC_A17 | PE11 <-> FSMC_D8 | PD13 <-> FSMC_A18 | PE12 <-> FSMC_D9 | PD14 <-> FSMC_D0 | PD15 <-> FSMC_D1 | | PE13 <-> FSMC_D10 | PE14 <-> FSMC_D11 | PE15 <-> FSMC_D12

| PF13 <-> FSMC_A7 |---------------

| PF14 <-> FSMC_A8 | | PF15 <-> FSMC_A9 | |------------------+ | |

+-------------------+--------------------+ */

/* GPIOD configuration */ GPIO_PinAFConfig(GPIOD, GPIO_PinSource0, GPIO_AF_FSMC); GPIO_PinAFConfig(GPIOD, GPIO_PinSource1, GPIO_AF_FSMC);

GPIO_PinAFConfig(GPIOD, GPIO_PinSource5, GPIO_AF_FSMC);

//NWE

GPIO_PinAFConfig(GPIOD, GPIO_PinSource14, GPIO_AF_FSMC); GPIO_PinAFConfig(GPIOD, GPIO_PinSource15, GPIO_AF_FSMC);

// // //

GPIO_PinAFConfig(GPIOD, GPIO_PinSource8, GPIO_AF_FSMC); GPIO_PinAFConfig(GPIOD, GPIO_PinSource9, GPIO_AF_FSMC); GPIO_PinAFConfig(GPIOD, GPIO_PinSource10, GPIO_AF_FSMC);

// GPIO_PinAFConfig(GPIOD, GPIO_PinSource11, GPIO_AF_FSMC);//required for fsmc line in lcd's DC line

GPIO_InitStructure.GPIO_Pin = GPIO_Pin_5 |GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_14 |GPIO_Pin_15;//edit this line

GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF; GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz; GPIO_InitStructure.GPIO_OType = GPIO_OType_PP; GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_DOWN; //added

GPIO_Init(GPIOD, &GPIO_InitStructure);

//NE1 setup . GPIO_PinAFConfig(GPIOD, GPIO_PinSource4, GPIO_AF_FSMC); //NOE

GPIO_PinAFConfig(GPIOD, GPIO_PinSource7, GPIO_AF_FSMC);//PD7-->NE1 GPIO_PinAFConfig(GPIOD, GPIO_PinSource11, GPIO_AF_FSMC);//PD11-->DC GPIO_InitStructure.GPIO_Pin=GPIO_Pin_7|GPIO_Pin_11|GPIO_Pin_4; GPIO_InitStructure.GPIO_Mode=GPIO_Mode_AF; GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz; GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;

GPIO_InitStructure.GPIO_PuPd

= GPIO_PuPd_DOWN;

GPIO_Init(GPIOD, &GPIO_InitStructure);

/////////////////////added block /* GPIOE configuration */ GPIO_PinAFConfig(GPIOE, GPIO_PinSource7 , GPIO_AF_FSMC); GPIO_PinAFConfig(GPIOE, GPIO_PinSource8 , GPIO_AF_FSMC); GPIO_PinAFConfig(GPIOE, GPIO_PinSource9 , GPIO_AF_FSMC); GPIO_PinAFConfig(GPIOE, GPIO_PinSource10, GPIO_AF_FSMC);

GPIO_InitStructure.GPIO_Pin = GPIO_Pin_7 | GPIO_Pin_8 | GPIO_Pin_9 | GPIO_Pin_10 ; GPIO_InitStructure.GPIO_Mode =GPIO_Mode_AF; GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz; GPIO_InitStructure.GPIO_OType = GPIO_OType_PP; GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP;

GPIO_Init(GPIOE,&GPIO_InitStructure); ///////////////////////block end

/* GPIOE configuration */ // // // // // // GPIO_PinAFConfig(GPIOE, GPIO_PinSource11 , GPIO_AF_FSMC); GPIO_PinAFConfig(GPIOE, GPIO_PinSource12 , GPIO_AF_FSMC); GPIO_PinAFConfig(GPIOE, GPIO_PinSource13 , GPIO_AF_FSMC); GPIO_PinAFConfig(GPIOE, GPIO_PinSource14 , GPIO_AF_FSMC); GPIO_PinAFConfig(GPIOE, GPIO_PinSource15 , GPIO_AF_FSMC);

// GPIO_InitStructure.GPIO_Pin = GPIO_Pin_11 | GPIO_Pin_12 | GPIO_Pin_13 | GPIO_Pin_14 | // // // // // // // GPIO_Init(GPIOE, &GPIO_InitStructure); GPIO_Pin_15; GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF; GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz; GPIO_InitStructure.GPIO_OType = GPIO_OType_PP; GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;

/*

GPIO_PinAFConfig(GPIOF, GPIO_PinSource0 , GPIO_AF_FSMC); GPIO_PinAFConfig(GPIOF, GPIO_PinSource1 , GPIO_AF_FSMC); GPIO_PinAFConfig(GPIOF, GPIO_PinSource2 , GPIO_AF_FSMC); GPIO_PinAFConfig(GPIOF, GPIO_PinSource3 , GPIO_AF_FSMC); GPIO_PinAFConfig(GPIOF, GPIO_PinSource4 , GPIO_AF_FSMC); GPIO_PinAFConfig(GPIOF, GPIO_PinSource5 , GPIO_AF_FSMC); GPIO_PinAFConfig(GPIOF, GPIO_PinSource12 , GPIO_AF_FSMC); GPIO_PinAFConfig(GPIOF, GPIO_PinSource13 , GPIO_AF_FSMC); GPIO_PinAFConfig(GPIOF, GPIO_PinSource14 , GPIO_AF_FSMC); GPIO_PinAFConfig(GPIOF, GPIO_PinSource15 , GPIO_AF_FSMC);

GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 GPIO_Pin_3 | GPIO_Pin_4

| GPIO_Pin_1

| GPIO_Pin_2

| GPIO_Pin_5

GPIO_Pin_12 | GPIO_Pin_13 | GPIO_Pin_14 | GPIO_Pin_15;

GPIO_Init(GPIOF, &GPIO_InitStructure);

GPIO_PinAFConfig(GPIOG, GPIO_PinSource0 , GPIO_AF_FSMC); GPIO_PinAFConfig(GPIOG, GPIO_PinSource1 , GPIO_AF_FSMC); GPIO_PinAFConfig(GPIOG, GPIO_PinSource2 , GPIO_AF_FSMC); GPIO_PinAFConfig(GPIOG, GPIO_PinSource3 , GPIO_AF_FSMC); GPIO_PinAFConfig(GPIOG, GPIO_PinSource4 , GPIO_AF_FSMC); GPIO_PinAFConfig(GPIOG, GPIO_PinSource5 , GPIO_AF_FSMC); GPIO_PinAFConfig(GPIOG, GPIO_PinSource9 , GPIO_AF_FSMC);

GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 GPIO_Pin_3 | GPIO_Pin_4

| GPIO_Pin_1

| GPIO_Pin_2

| GPIO_Pin_5

|GPIO_Pin_9;

GPIO_Init(GPIOG, &GPIO_InitStructure);

/*-- FSMC Configuration -----------------------------------------------------*/ p.FSMC_AddressSetupTime =0; p.FSMC_AddressHoldTime =0; p.FSMC_DataSetupTime =0; p.FSMC_BusTurnAroundDuration =0; p.FSMC_CLKDivision =1; p.FSMC_DataLatency =0; p.FSMC_AccessMode = FSMC_AccessMode_A;

FSMC_NORSRAMInitStructure.FSMC_Bank = FSMC_Bank1_NORSRAM1; from NORSRAM2-SRAM1 FSMC_NORSRAMInitStructure.FSMC_DataAddressMux = FSMC_DataAddressMux_Disable;

//Changed

FSMC_NORSRAMInitStructure.FSMC_MemoryType = FSMC_MemoryType_SRAM; //changed from psram to sram FSMC_NORSRAMInitStructure.FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_8b; FSMC_NORSRAMInitStructure.FSMC_BurstAccessMode = FSMC_BurstAccessMode_Disable; FSMC_NORSRAMInitStructure.FSMC_AsynchronousWait = FSMC_AsynchronousWait_Disable; FSMC_NORSRAMInitStructure.FSMC_WaitSignalPolarity = FSMC_WaitSignalPolarity_Low; FSMC_NORSRAMInitStructure.FSMC_WrapMode = FSMC_WrapMode_Disable; FSMC_NORSRAMInitStructure.FSMC_WaitSignalActive = FSMC_WaitSignalActive_BeforeWaitState; FSMC_NORSRAMInitStructure.FSMC_WriteOperation = FSMC_WriteOperation_Enable; FSMC_NORSRAMInitStructure.FSMC_WaitSignal = FSMC_WaitSignal_Disable; FSMC_NORSRAMInitStructure.FSMC_ExtendedMode = FSMC_ExtendedMode_Enable; //eddited from disable to enable. FSMC_NORSRAMInitStructure.FSMC_WriteBurst = FSMC_WriteBurst_Disable; FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct = &p; FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct = &p;

FSMC_NORSRAMInit(&FSMC_NORSRAMInitStructure);

/*!< Enable FSMC Bank1_SRAM1 Bank */ FSMC_NORSRAMCmd(FSMC_Bank1_NORSRAM1, ENABLE); //edited

void SRAM_Test(void) { /*!< At this stage the microcontroller clock setting is already configured, this is done through SystemInit() function which is called from startup file (startup_stm32f4xx.s) before to branch to application main. To reconfigure the default setting of SystemInit() function, refer to system_stm32f4xx.c file */

/* Initialize LEDs on STM324xG-EVAL board */ //STM_EVAL_LEDInit();

/* Configure FSMC Bank 1 NOR/SRAM2 SRAM_Init();

*/

/* Write data to FSMC SRAM memory */ /* Fill the buffer to send */ Fill_Buffer(TxBuffer, BUFFER_SIZE, 0x320F); SRAM_WriteBuffer(TxBuffer, BUFFER_SIZE);

/* Read data from FSMC SRAM memory */ // SRAM_ReadBuffer(RxBuffer, WRITE_READ_ADDR, BUFFER_SIZE);

/* Read back SRAM memory and check content correctness */ /* for (Index = 0x00; (Index < BUFFER_SIZE) && (WriteReadStatus == 0); Index++) {

if (RxBuffer[Index] != TxBuffer[Index]) { WriteReadStatus++; } } */ while (1) { } }