Quanta SA8 Gateway M-73xx

1
PCB STACK UP
LAYER 2 : SGND1
DDRII-SODIMM1
LAYER 3 : IN1
DDRII
667/800 MHz
AMD Lion
Sabie
Griffin
PAGE 6,7
LAYER 4 : IN2
LAYER 5 : VCC
DDRII-SODIMM2
LAYER 6 : IN3
PAGE 6,7
DDRII
CPU THERMAL
SENSOR
S1G2 Processor
667/800 MHz
CPU_CLK
NBGFX_CLK
LAYER 8 : BOT
CLOCK GEN
NBGPP_CLK
ICS9LPRS476AKLFT-->HP
SBLINK_CLK
SLG8SP626VTR-->HP
HT3
RTM880N-795 -->HP
PCI-Express 16X
HDMI
PAGE 23
PCI-E
NORTH BRIDGE
PCIE-LAN
Express
Card X1
Mini PCI-E
Card X2
MARVELL_88E8040
(NEW CARD)
(Wireless LAN)
LAN
Hybrid CrossFire
CRT
PAGE 25
RS780MN
PAGE 35
128 Bit GDDR3*4
Side port
PAGE 30
M82M/M86LP
LVDS
PAGE 24
PAGE 26
PAGE 17,18,19
20,21,22
Reserved
PAGE 8,9,10,11,
RJ45
256mb RAM
for UMA only
PCIE X4
PAGE 8
PAGE 26
SATA0
SATA - HDD
0,8,2
PAGE 37
21mm X 21mm, 528pin BGA
PAGE 29
DDR II SMDDR_VTERM
1.8V/1.8VSUS
Bluetooth
PAGE 31
4.3W(Int)
VCCP +1.2V & +1.1V
CARD reader
OZ126T
PAGE 27
CX20561
LPC
AUDIO CODEC
MDC CONN
VGACORE(1.1V~1.2V)
PAGE 34
PAGE 34
PAGE 40
PAGE 28
PAGE 31
KBC
ITE
IT8502
CPU CORE +VCORE0 +VCORE1
AUDIO
Amplifier
TPA6017A2
RJ11
to Daughter
board
PAGE 28
PAGE 33
SMBUS TABLE
SB--SCL0/SD0
SB--SCL1/SD1
Wlan Card
+3V/S5
SB--SCL2/SD2
epress card
+3v/S5
EC --SCL/SD
Battery charge/discharge
+3VPCU
EC--SCL2/SD2
VGA thermal/system thermal
+3V
+3V
AUDIO CONN
Speaker Conn.
(Phone/ MIC)
PAGE 28
FAN
SPI
FLASH
PAGE 32 PAGE 33
PAGE 28
PROJECT : SA8
Quanta Computer Inc.
Size
Custom
NB2/RD1
Date:
Camera
PAGE 24
Azalia
PAGE 38
Clock gen
/DDR2/DDR2 thermal/Accelerometer
Express
Card X1
(NEW CARD)
PAGE 35
PCI BUS / 33MHz
PAGE 12,13.14.15.16
Keyboard
Touch Pad
11
Mini PCI-E X2
PAGE 30
4.5W(Ext)
PAGE 39
PAGE 42
4,5
Fingerprint
PAGE 31
SB700
SATA4
SATA - ODD
USB2.0 Ports
X3 PAGE 31,32
SOUTH BRIDGE
PAGE 29
SYSTEM POWER
SBSRC_CLK
USB2.0
SYSTEM CHARGER
PAGE 36
PAGE 2
ATI
29mm X 29mm, 528pin BGA
(10/100/GagaLAN)
14.31818MHz
PAGE 5
638P (uPGA)/35W
PAGE 3,4,5
LAYER 7 : SGND2
SA8 SYSTEM DIAGRAM
LAYER 1 : TOP
Document Number
Rev
1A
Block Diagram
Sheet
1
8
of
46
60 ohm, 0.5A
+1.2V
CLOCKS name
L78
BLM18PG221SN1D
C754
C744
C752
C749
C734
10U/6.3V/X5_8
.1U/10V/X5_4
.1U/10V/X5_4
.1U/10V/X5_4
.1U/10V/X5_4
DCR: 0.5 ohm
600 ohms@100Mhz
C728
.1U/10V/X5_4
+3V_CLKVDD
Clock pin function
UMA
DISCRETE
NBGFX_CLKP
NBGFX_CLKN
RP49 STUFF
RP49 STUFF
to NB for VGA reference clock
EXT_GFX_CLKP
EXT_GFX_CLKN
RP48 NC
RP48 STUFF
to M86-M external reference clock
NBGPP_CLKP
NBGPP_CLKN
RP43 NC
RP43 NC
to NB for RX780 for PCIEX2 interface reference clock only

RS780 is internal share with AC-LINK clock,RS780 not need
SBLINK_CLKP
SBLINK_CLKN
RP51 STUFF
RP51 STUFF
C755
C753
C751
C750
C747
C745
C732
C729
.1U/10V/X5_4
.1U/10V/X5_4
.1U/10V/X5_4
.1U/10V/X5_4
.1U/10V/X5_4
60 ohm, 0.5A
.1U/10V/X5_4
+3V_CLKVDD
.1U/10V/X5_4
L77
BLM18PG221SN1D
10U/6.3V/X5_8
+3.3V
+1.2V_CLKVDDIO
600 ohms@100Mhz
C746
to NB for AC-LINK reference clock
.1U/10V/X5_4
EMI reserved
R280
U34
+3V_CLKVDD
Place very
close to
C/G
+3V_CLKVDD
L75
BLM18PG221SN1D
+3V_CLK_VDDA
C736
2.2U/6.3V/X5_6
C735
.1U/10V/X5_4
+1.2V_CLKVDDIO
33P/50V/NPO_4
61
62
X1
X2
PCLK_SMB
PDAT_SMB
2
3
CG_XOUT
Ver.B update XTAL.
VDDSRC_IO0
VDDSRC_IO1
VDDATIG_IO
VDDSB_SRC_IO
VDDCPU_IO
CG_XIN
CG_XOUT
CG_XIN
33P/50V/NPO_4
11
17
25
34
47
GND48
GNDDOT
GNDSRC0
GNDSRC1
GNDATIG
GNDSB_SRC
GNDSATA
GNDCPU
GNDHTT
GNDREF
Y2
XTAL_14.318MHZ
C396
VDDDOT
VDDSRC
VDDATIG
VDDSB_SRC
VDDSATA
VDDCPU
VDDHTT
VDDREF
VDD48
1
7
10
18
24
33
43
46
52
60
C397
4
16
26
35
40
48
55
56
63
*261_4
F27-DELETE RP50,RP49,RP48,RP52,RP51,RP47,RP46,RP43,RP44,RP45 0 ohm

CPUCLKP
CPUCLKN
CPUK8_0T
CPUK8_0C
50
49
ATIG0T
ATIG0C
ATIG1T
ATIG1C
30
29
28
27
SB_SRC0T
SB_SRC0C
SB_SRC1T
SB_SRC1C
37
36
32
31
PCIE_LAN_CLKP
PCIE_LAN_CLKN
SBLINK_CLKP
SBLINK_CLKN
SRC0T
SRC0C
SRC1T
SRC1C
SRC2T
SRC2C
SRC3T
SRC3C
SRC4T
SRC4C
22
21
20
19
15
14
13
12
9
8
PCIE_MINI1_CLKP
PCIE_MINI1_CLKN
PCIE_MINI2_CLKP
PCIE_MINI2_CLKN
NBGPP_CLKP
NBGPP_CLKN
PCIE_NEW_CLKP
PCIE_NEW_CLKN
SBSRC_CLKP
SBSRC_CLKN
SRC6T/SATAT
SRC6C/SATAC
SRC7T/27M_SS
SRC7C/27M_NS
42
41
6
5
HTT0T/66M
HTT0C/66M
54
53
48MHz_0
64
REF0/SEL_HTT66
REF1/SEL_SATA
REF2/SEL_27
59
58
57
QFN64
CPUCLKP 3
CPUCLKN 3
NBGFX_CLKP
NBGFX_CLKN
EXT_GFX_CLKP
EXT_GFX_CLKN
NBGFX_CLKP 10
NBGFX_CLKN 10
EXT_GFX_CLKP 17
EXT_GFX_CLKN 17
PCIE_LAN_CLKP 26
PCIE_LAN_CLKN 26
SBLINK_CLKP 10
SBLINK_CLKN 10
PCIE_MINI1_CLKP 30
PCIE_MINI1_CLKN 30
PCIE_MINI2_CLKP 30
PCIE_MINI2_CLKN 30
NBGPP_CLKP 10
NBGPP_CLKN 10
PCIE_NEW_CLKP 35
PCIE_NEW_CLKN 35
SBSRC_CLKP 12
SBSRC_CLKN 12
T82
T81
T80
T79
CLK_VGA_27M_SS
CLK_VGA_27M_NSS
+3.3V
R517
8.2K_4
CLK_PD#
23
45
44
39
38
30 MINI1CLK_REQ#
30 MINI2CLK_REQ#
51
35 NEW-CARD_CLK_REQ#
PD#
CLKREQ0#
CLKREQ1#
CLKREQ2#
CLKREQ3#
CLKREQ4#
SLG8SP628VTR
Clock chip has internal serial

terminations
for differencial pairs, external resistors
are
reserved for debug purpose.
NBHTREFCLK0P
NBHTREFCLK0N
CLK48MUSB
R513
R516
0_4
0_4
NBHT_REFCLKP
NBHT_REFCLKN
R501
33_4
CLK_48M_USB
NBHT_REFCLKP 10
NBHT_REFCLKN 10
CLK_48M_USB 13
SEL_HT66
SEL_SATA
SEL_27
R505
Ra
R506
158/F_4
90.9/F_4
EXT_NB_OSC 10
Rb
C731
*10P/50VC0G_4
TGND0
TGND1
TGND2
TGND3
TGND4
TGND5
TGND6
TGND7
TGND8
TGND9
CLK_PD#
SMBCLK
SMBDAT
RX780
RS780
1.8V
1.1V
Ra
82.5R
158R
Rb
130R
90.9R
65
66
67
68
69
70
71
72
73
74
6,7,13 PCLK_SMB
6,7,13 PDAT_SMB
+3V_CLKVDD
RES CHIP 130 1/16W +-1%(0402)L-F -->CS11302FB15
RES CHIP 158 1/16W +-1%(0402) -->CS11582FB00
RES CHIP 90.9 1/16W +-1%(0402) -->CS09092FB15
RES CHIP 82.5 1/16W +-1%(0402) -->CS08252FB11
R510
8.2K_4
SEL_SATA
SEL_27
* default
1
66 MHz 3.3V single ended HTT clock
0*
100 MHz differential HTT clock
1*
100 MHz non-spreading differential SRC clock
100 MHz spreading differential SRC clock
27MHz and 27M SS outputs
0*
100 MHz SRC clock
SEL_HTT66
R508
*8.2K_4
PROJECT : SA8
R511
8.2K_4
SEL_SATA
Size
Custom
SEL_27
NB2/RD1
Document Number
Rev
2A
Clock Gen
Date:
5
Sheet
1
of
46
BLM21PG221SN1D
+CPUVDDA
+2.5V
CPU CLK
L38
C276
22U/6.3V/X5
C292
4.7U/6.3V/X5_6
C271
C268
C634
C635
HT_NB_CPU_CAD_H[15..0]
8 HT_NB_CPU_CAD_H[15..0]
HT_NB_CPU_CAD_L[15..0]
8 HT_NB_CPU_CAD_L[15..0]
HT_NB_CPU_CLK_H[1..0]
8 HT_NB_CPU_CLK_H[1..0]
HT_NB_CPU_CLK_L[1..0]
8 HT_NB_CPU_CLK_L[1..0]
HT_NB_CPU_CTL_H[1..0]
8 HT_NB_CPU_CTL_H[1..0]
HT_NB_CPU_CTL_L[1..0]
8 HT_NB_CPU_CTL_L[1..0]
HT_CPU_NB_CAD_H[15..0]
8 HT_CPU_NB_CAD_H[15..0]
HT_CPU_NB_CAD_L[15..0]
8 HT_CPU_NB_CAD_L[15..0]
HT_CPU_NB_CLK_H[1..0]
8 HT_CPU_NB_CLK_H[1..0]
HT_CPU_NB_CLK_L[1..0]
8 HT_CPU_NB_CLK_L[1..0]
C
4.7U/6.3V/X5_6
4.7U/6.3V/X5_6
.22U/6.3V/X5_4
180P/50V/NPO_4
HT_CPU_NB_CTL_H[1..0]
8 HT_CPU_NB_CTL_H[1..0]
HT_CPU_NB_CTL_L[1..0]
8 HT_CPU_NB_CTL_L[1..0]
C289
.22U/6.3V/X5_4
C288
3300P/50V_4
2
2
+CPUVDDA
U28A
+1.2V
+1.2V
+1.2V
+1.2V
D1
D2
D3
D4
VLDT_A0
VLDT_A1
VLDT_A2
VLDT_A3
AE2
AE3
AE4
AE5
+1.2V
+1.2V
+1.2V
+1.2V
AD1
AC1
AC2
AC3
AB1
AA1
AA2
AA3
W2
W3
V1
U1
U2
U3
T1
R1
AD4
AD3
AD5
AC5
AB4
AB3
AB5
AA5
Y5
W5
V4
V3
V5
U5
T4
T3
HT_CPU_NB_CAD_H0
HT_CPU_NB_CAD_L0
HT_CPU_NB_CAD_H1
HT_CPU_NB_CAD_L1
HT_CPU_NB_CAD_H2
HT_CPU_NB_CAD_L2
HT_CPU_NB_CAD_H3
HT_CPU_NB_CAD_L3
HT_CPU_NB_CAD_H4
HT_CPU_NB_CAD_L4
HT_CPU_NB_CAD_H5
HT_CPU_NB_CAD_L5
HT_CPU_NB_CAD_H6
HT_CPU_NB_CAD_L6
HT_CPU_NB_CAD_H7
HT_CPU_NB_CAD_L7
HT_CPU_NB_CAD_H8
HT_CPU_NB_CAD_L8
HT_CPU_NB_CAD_H9
HT_CPU_NB_CAD_L9
HT_CPU_NB_CAD_H10
HT_CPU_NB_CAD_L10
HT_CPU_NB_CAD_H11
HT_CPU_NB_CAD_L11
HT_CPU_NB_CAD_H12
HT_CPU_NB_CAD_L12
HT_CPU_NB_CAD_H13
HT_CPU_NB_CAD_L13
HT_CPU_NB_CAD_H14
HT_CPU_NB_CAD_L14
HT_CPU_NB_CAD_H15
HT_CPU_NB_CAD_L15
L0_CLKOUT_H0
L0_CLKOUT_L0
L0_CLKOUT_H1
L0_CLKOUT_L1
Y1
W1
Y4
Y3
HT_CPU_NB_CLK_H0
HT_CPU_NB_CLK_L0
HT_CPU_NB_CLK_H1
HT_CPU_NB_CLK_L1
L0_CTLOUT_H0
L0_CTLOUT_L0
L0_CTLOUT_H1
L0_CTLOUT_L1
R2
R3
T5
R5
HT_CPU_NB_CTL_H0
HT_CPU_NB_CTL_L0
HT_CPU_NB_CTL_H1
HT_CPU_NB_CTL_L1
HT LINK
HT_NB_CPU_CAD_H0
HT_NB_CPU_CAD_L0
HT_NB_CPU_CAD_H1
HT_NB_CPU_CAD_L1
HT_NB_CPU_CAD_H2
HT_NB_CPU_CAD_L2
HT_NB_CPU_CAD_H3
HT_NB_CPU_CAD_L3
HT_NB_CPU_CAD_H4
HT_NB_CPU_CAD_L4
HT_NB_CPU_CAD_H5
HT_NB_CPU_CAD_L5
HT_NB_CPU_CAD_H6
HT_NB_CPU_CAD_L6
HT_NB_CPU_CAD_H7
HT_NB_CPU_CAD_L7
HT_NB_CPU_CAD_H8
HT_NB_CPU_CAD_L8
HT_NB_CPU_CAD_H9
HT_NB_CPU_CAD_L9
HT_NB_CPU_CAD_H10
HT_NB_CPU_CAD_L10
HT_NB_CPU_CAD_H11
HT_NB_CPU_CAD_L11
HT_NB_CPU_CAD_H12
HT_NB_CPU_CAD_L12
HT_NB_CPU_CAD_H13
HT_NB_CPU_CAD_L13
HT_NB_CPU_CAD_H14
HT_NB_CPU_CAD_L14
HT_NB_CPU_CAD_H15
HT_NB_CPU_CAD_L15
E3
E2
E1
F1
G3
G2
G1
H1
J1
K1
L3
L2
L1
M1
N3
N2
E5
F5
F3
F4
G5
H5
H3
H4
K3
K4
L5
M5
M3
M4
N5
P5
L0_CADIN_H0
L0_CADIN_L0
L0_CADIN_H1
L0_CADIN_L1
L0_CADIN_H2
L0_CADIN_L2
L0_CADIN_H3
L0_CADIN_L3
L0_CADIN_H4
L0_CADIN_L4
L0_CADIN_H5
L0_CADIN_L5
L0_CADIN_H6
L0_CADIN_L6
L0_CADIN_H7
L0_CADIN_L7
L0_CADIN_H8
L0_CADIN_L8
L0_CADIN_H9
L0_CADIN_L9
L0_CADIN_H10
L0_CADIN_L10
L0_CADIN_H11
L0_CADIN_L11
L0_CADIN_H12
L0_CADIN_L12
L0_CADIN_H13
L0_CADIN_L13
L0_CADIN_H14
L0_CADIN_L14
L0_CADIN_H15
L0_CADIN_L15
HT_NB_CPU_CLK_H0
HT_NB_CPU_CLK_L0
HT_NB_CPU_CLK_H1
HT_NB_CPU_CLK_L1
J3
J2
J5
K5
L0_CLKIN_H0
L0_CLKIN_L0
L0_CLKIN_H1
L0_CLKIN_L1
HT_NB_CPU_CTL_H0
HT_NB_CPU_CTL_L0
HT_NB_CPU_CTL_H1
HT_NB_CPU_CTL_L1
N1
P1
P3
P4
VLDT_B0
VLDT_B1
VLDT_B2
VLDT_B3
L0_CADOUT_H0
L0_CADOUT_L0
L0_CADOUT_H1
L0_CADOUT_L1
L0_CADOUT_H2
L0_CADOUT_L2
L0_CADOUT_H3
L0_CADOUT_L3
L0_CADOUT_H4
L0_CADOUT_L4
L0_CADOUT_H5
L0_CADOUT_L5
L0_CADOUT_H6
L0_CADOUT_L6
L0_CADOUT_H7
L0_CADOUT_L7
L0_CADOUT_H8
L0_CADOUT_L8
L0_CADOUT_H9
L0_CADOUT_L9
L0_CADOUT_H10
L0_CADOUT_L10
L0_CADOUT_H11
L0_CADOUT_L11
L0_CADOUT_H12
L0_CADOUT_L12
L0_CADOUT_H13
L0_CADOUT_L13
L0_CADOUT_H14
L0_CADOUT_L14
L0_CADOUT_H15
L0_CADOUT_L15
L0_CTLIN_H0
L0_CTLIN_L0
L0_CTLIN_H1
L0_CTLIN_L1
4.7U/6.3V/X5_6
.22U/6.3V/X5_4
180P/50V/NPO_4
C630
C632
C631
CPUCLKIN
CPUCLKP
CPUCLKN
R217
169/F_4
C297
C293
12 CPU_LDT_RST#
12 CPU_PWRGD
10,12 CPU_LDT_STOP#
VDDA1
VDDA2
A9
A8
CLKIN_H
CLKIN_L
CPU_LDT_RST#
CPU_PWRGD
CPU_LDT_STOP#
CPU_LDT_REQ#_CPU
B7
A7
F10
C6
RESET_L
PWROK
LDTSTOP_L
LDTREQ_L
CPU_SIC
CPU_SID
CPU_ALERT
AF4
AF5
AE6
SIC
SID
ALERT_L
R6
P6
HT_REF0
HT_REF1
F6
E6
CPU_DBRDY
CPU_TMS
CPU_TCK
CPU_TRST#
CPU_TDI
Ver.B Reserver R212 for Debug.

R227
R212
+1.8V_SUS
CPU_THERMTRIP_L#
CPU_PROCHOT_L#
CPU_MEMHOT_L#
THERMDC
THERMDA
W7
W8
CPU_THERMDC
CPU_THERMDA
VDD0_FB_H
VDD0_FB_L
VDDIO_FB_H
VDDIO_FB_L
W9
Y9
VDDIO_FB_H
VDDIO_FB_L
Y6
AB6
VDD1_FB_H
VDD1_FB_L
VDDNB_FB_H
VDDNB_FB_L
H6
G6
G10
AA9
AC9
AD9
AF9
DBRDY
TMS
TCK
TRST_L
TDI
R216
+1.8V_SUS
R192
R594
300_4
CPUTEST21
R595
300_4
CPUTEST24
R596
300_4
CPU_DBREQ#
CPUTEST23
AD7
TEST23
T66
T33
CPUTEST18
CPUTEST19
H10
G9
TEST18
TEST19
510/F_4 CPUTEST25H
*510/F_4 CPUTEST25L
CPUTEST21
CPUTEST20
CPUTEST24
CPUTEST22
CPUTEST12
CPUTEST27
0_4
E9
E8
AB8
AF7
AE7
AE8
AC8
AF8
SVC
SVD
THERMTRIP_L
PROCHOT_L
MEMHOT_L
DBREQ_L
TDO
A3
A5
B3
B5
C1
RSVD1
RSVD2
RSVD3
RSVD4
RSVD5
CPU_DBREQ#
AE9 CPU_TDO
J7
H8
CPUTEST28H
CPUTEST28L
TEST17
TEST16
TEST15
TEST14
D7
E7
F7
C7
CPUTEST17
CPUTEST16
CPUTEST15
CPUTEST14
TEST7
TEST10
C3
K8
CPUTEST7
TEST8
C4
CPUTEST8
TEST29_H
TEST29_L
C9
C8
CPUTEST29H
CPUTEST29L
TEST21
TEST20
TEST24
TEST22
TEST12
TEST27
TEST9
TEST6
E10
VDDIO_FB_H 39
VDDIO_FB_L 39
CPU_VDDNB_RUN_FB_H 40
CPU_VDDNB_RUN_FB_L 40
TEST28_H
TEST28_L
TEST25_H
TEST25_L
C2
AA6
CONN_CPU
+1.8V_SUS
AF6
AC7
AA8
T118
T27
T142
T140
T135
T31
300_4
KEY1
KEY2
M11
W18
CPU_SVC_R
CPU_SVD_R
40 CPU_VDD0_RUN_FB_H
40 CPU_VDD0_RUN_FB_L
40 CPU_VDD1_RUN_FB_H
40 CPU_VDD1_RUN_FB_L
+1.8V
A6
A4
CPU_HTREF0
44.2/F_4
44.2/F_4
CPU_HTREF1
place them to CPU within 1.5"
R191
R190
R226
R231
R223
R200
Ver.B update
CPUCLKIN
CPUCLKIN#
SideBand Temp sense I2C
H_THRMDC 5
H_THRMDA 5
U28D
F8
F9
CPUCLKIN#
0_4
0_4
300_4
300_4
300_4
300_4
W/S= 15 mil/20mil
+CPUVDDA
+CPUVDDA
3900P/25V_4
3900P/25V_4
+1.2V
R463
R464
CPU_LDT_RST#
CPU_LDT_STOP#
CPU_PWRGD
CPU_LDT_REQ#_CPU
CPUCLKP
CPUCLKN
CPUCLKP
CPUCLKN
Keep trace from resisor to CPU within 0.6"

keep trace from caps to CPU within 1.2"
+1.2V
CPU_THERMDC
CPU_THERMDA
W/S= 15 mil/20mil
T15
T36
C
T22
T18
T29
T23
T190
T192
Ver.B Reserved
RSVD10
RSVD9
RSVD8
RSVD7
RSVD6
T34
T19
H18
H19
AA7
D5
C5
CONN_CPU
Ver.B Griffin Sighting issue.
C327
+1.8V_SUS
+3.3V
.1U/10V/X5_4
R244
+3.3V
20K/F_4
R239
CPU_SVC_R
CPU_SVD_R
CPU_PWRGD
34.8K/F_4
CNTR_VREF
*BSS138_NL/SOT23
3
R198
R230
0_4
CPU_LDT_REQ# 10
CPU_LDT_RST#
Q16
CPU_LDT_REQ#_CPU 1
0_4
3
Q15
BSS138_NL
+1.8V_SUS
G3
*SHORT_ PAD1
10K_4
R221
R218
300_4
CPU_MEMHOT_L#
Q14
MMBT3904
CPU_MEMHOT#
1
R199
R197
R219
0_4
0_4
0_4
Serial VID
CPU_SVC
CPU_SVD
CPU_PWRGD_SVID_REG
*220_4
*220_4
*220_4
C807
SVC
SVD
0
0
1
1
0
1
0
1
CPU_SVC 40
CPU_SVD 40
CPU_PWRGD_SVID_REG
+1.8V_SUS
40
.1U/10V/X5_4
R207
390_4
PRE-PWROK Metal VID Codes
CPU_LDT_RST_HTPA#
for debug only

+1.8V_SUS
*2.2K_4
1K/F_4
1K/F_4
R193
R188
R220
R250
1K/F_4
R222
R189
R194
R214
390_4
R203
*1K_4
Ver.B reserved.
Voltage Output
CPU_SIC
1.1V
1.0V
0.9V
0.8V
CPU_SID
CPU_ALERT
HDT Connector
CPU_MEMHOT# 7,13
+1.8V_SUS
R201
10K_4
300_4
CPU_PROCHOT_L#
Q12
3
MMBT3904
CPU_PROCHOT# 12
+1.8V_SUS
R204
+1.8V_SUS
R215
CPU_THERMTRIP_L#
CPU_DBREQ#
CPU_DBRDY
CPU_TCK
CPU_TMS
CPU_TDI
CPU_TRST#
CPU_TDO
10K_4
300_4
+1.8V_SUS
R196
+1.8V_SUS
Q13
MMBT3904
3
CPU_THERMTRIP# 13
C403 *.1U/10V/X5_4
1
3
5
7
9
11
13
15
17
19
21
23
KEY
2
4
6
8
10
12
14
16
18
20
22
24
25
PROJECT : SA8
CPU_LDT_RST_HTPA#
Size
Custom
*CONN_HDT
NB2/RD1
CN6
Document Number
Rev
2A
S1G2 HT,CTL I/F 1/3
Date:
Sheet
1
of
46
+0.9VSMVTT
+1.8V_SUS
VTT1
VTT2
VTT3
VTT4
AF10
AE10
MEMZP
MEMZN
MEM_MA_RESET# H16
T71
39.2/F_4 M_ZP
39.2/F_4 M_ZN
D10
C10
B10
AD10
6,7 MEM_MA0_ODT0
6,7 MEM_MA0_ODT1
6,7 MEM_MA0_CS#0
6,7 MEM_MA0_CS#1
6,7 MEM_MA_CKE0
6,7 MEM_MA_CKE1
MEM:CMD/CTRL/CLK VTT5
VTT6
VTT7
VTT8
VTT9
VTT_SENSE
R272
Y10 CPU_VTT_SENSE
RSVD_M1
MEMVREF
T19
V22
U21
V19
MA0_ODT0
MA0_ODT1
MA1_ODT0
MA1_ODT1
RSVD_M2
B18 MEM_MB_RESET#
T20
U19
U20
V20
MA0_CS_L0
MA0_CS_L1
MA1_CS_L0
MA1_CS_L1
J22
J20
MA_CKE0
MA_CKE1
CPU_VTT_SENSE 39
MB0_ODT0
MB0_ODT1
MB1_ODT0
W26
W23
Y26
MEM_MB0_ODT0 6,7
MEM_MB0_ODT1 6,7
MB0_CS_L0
MB0_CS_L1
MB1_CS_L0
V26
W25
U22
MEM_MB0_CS#0 6,7
MEM_MB0_CS#1 6,7
J25
H26
MEM_MB_CKE0 6,7
MEM_MB_CKE1 6,7
MEM_MB_CLK1_P
MEM_MB_CLK1_N
MEM_MB_CLK7_P
MEM_MB_CLK7_N
MA_CLK_H5
MA_CLK_L5
MA_CLK_H1
MA_CLK_L1
MA_CLK_H7
MA_CLK_L7
MA_CLK_H4
MA_CLK_L4
MB_CLK_H5
MB_CLK_L5
MB_CLK_H1
MB_CLK_L1
MB_CLK_H7
MB_CLK_L7
MB_CLK_H4
MB_CLK_L4
N21
M20
N22
M19
M22
L20
M24
L21
L19
K22
R21
L22
K20
V24
K24
K19
MA_ADD0
MA_ADD1
MA_ADD2
MA_ADD3
MA_ADD4
MA_ADD5
MA_ADD6
MA_ADD7
MA_ADD8
MA_ADD9
MA_ADD10
MA_ADD11
MA_ADD12
MA_ADD13
MA_ADD14
MA_ADD15
MB_ADD0
MB_ADD1
MB_ADD2
MB_ADD3
MB_ADD4
MB_ADD5
MB_ADD6
MB_ADD7
MB_ADD8
MB_ADD9
MB_ADD10
MB_ADD11
MB_ADD12
MB_ADD13
MB_ADD14
MB_ADD15
P24
N24
P26
N23
N26
L23
N25
L24
M26
K26
T26
L26
L25
W24
J23
J24
6,7 MEM_MA_BANK0
6,7 MEM_MA_BANK1
6,7 MEM_MA_BANK2
R20
R23
J21
MA_BANK0
MA_BANK1
MA_BANK2
MB_BANK0
MB_BANK1
MB_BANK2
R24
U26
J26
MEM_MB_BANK0 6,7
MEM_MB_BANK1 6,7
MEM_MB_BANK2 6,7
6,7 MEM_MA_RAS#
6,7 MEM_MA_CAS#
6,7 MEM_MA_WE#
R19
T22
T24
MA_RAS_L
MA_CAS_L
MA_WE_L
MB_RAS_L
MB_CAS_L
MB_WE_L
U25
U24
U23
MEM_MB_RAS# 6,7
MEM_MB_CAS# 6,7
MEM_MB_WE# 6,7
6,7 MEM_MA_ADD[0..15]
MEM_MA_ADD0
MEM_MA_ADD1
MEM_MA_ADD2
MEM_MA_ADD3
MEM_MA_ADD4
MEM_MA_ADD5
MEM_MA_ADD6
MEM_MA_ADD7
MEM_MA_ADD8
MEM_MA_ADD9
MEM_MA_ADD10
MEM_MA_ADD11
MEM_MA_ADD12
MEM_MA_ADD13
MEM_MA_ADD14
MEM_MA_ADD15
U28C
R273
*0_4
Reserved
T72
P22
R22
A17
A18
AF18
AF17
R26
R25
MEM_MA_CLK1_P
MEM_MA_CLK1_N
MEM_MA_CLK7_P
MEM_MA_CLK7_N
2K/F_4
R271
2K/F_4
C400
.1U/10V/X5_4
C401
1000P/50V_4
6
6
6
6
MEM_MB_ADD[0..15] 6,7
MEM_MB_ADD0
MEM_MB_ADD1
MEM_MB_ADD2
MEM_MB_ADD3
MEM_MB_ADD4
MEM_MB_ADD5
MEM_MB_ADD6
MEM_MB_ADD7
MEM_MB_ADD8
MEM_MB_ADD9
MEM_MB_ADD10
MEM_MB_ADD11
MEM_MB_ADD12
MEM_MB_ADD13
MEM_MB_ADD14
MEM_MB_ADD15
CONN_CPU
MEM_MB_CLK7_P
1
.22U/6.3V/X5_4
C351
C324
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
C325
180P/50V/NPO_4
.22U/6.3V/X5_4
C335
180P/50V/NPO_4
C320
180P/50V/NPO_4
C313
180P/50V/NPO_4
C328
C323
.22U/6.3V/X5_4
C321
.22U/6.3V/X5_4
4.7U/6.3V/X5_6
C340
1000P/50V_4
C329
1000P/50V_4
1000P/50V_4
C347
C322
1000P/50V_4
+0.9VSMVTT
C336
4.7U/6.3V/X5_6
C352
4.7U/6.3V/X5_6
C319
4.7U/6.3V/X5_6
6 MEM_MB_DM[0..7]
Place close to socket
+0.9VSMVTT
MEM_MA_CLK7_P
C373
1.5P/50V/NPO_4
Processor Memory Interface
+0.9VSMVREF 6,39
750 mA
W17 MEMVREF_CPU
MB_CKE0
MB_CKE1
6 MEM_MB_DATA[0..63]
+1.8V_SUS
W10
AC10
AB10
AA10
A10
N19
N20
E16
F16
Y16
AA16
P19
P20
6
6
6
6
+0.9VSMVTT
U28B
PLACE CLOSE TO
CPU WITHIN 1"
R236
R229
MEM_MB_DQS0_P
MEM_MB_DQS0_N
MEM_MB_DQS1_P
MEM_MB_DQS1_N
MEM_MB_DQS2_P
MEM_MB_DQS2_N
MEM_MB_DQS3_P
MEM_MB_DQS3_N
MEM_MB_DQS4_P
MEM_MB_DQS4_N
MEM_MB_DQS5_P
MEM_MB_DQS5_N
MEM_MB_DQS6_P
MEM_MB_DQS6_N
MEM_MB_DQS7_P
MEM_MB_DQS7_N
MEM:DATA
MEM_MB_DATA0
MEM_MB_DATA1
MEM_MB_DATA2
MEM_MB_DATA3
MEM_MB_DATA4
MEM_MB_DATA5
MEM_MB_DATA6
MEM_MB_DATA7
MEM_MB_DATA8
MEM_MB_DATA9
MEM_MB_DATA10
MEM_MB_DATA11
MEM_MB_DATA12
MEM_MB_DATA13
MEM_MB_DATA14
MEM_MB_DATA15
MEM_MB_DATA16
MEM_MB_DATA17
MEM_MB_DATA18
MEM_MB_DATA19
MEM_MB_DATA20
MEM_MB_DATA21
MEM_MB_DATA22
MEM_MB_DATA23
MEM_MB_DATA24
MEM_MB_DATA25
MEM_MB_DATA26
MEM_MB_DATA27
MEM_MB_DATA28
MEM_MB_DATA29
MEM_MB_DATA30
MEM_MB_DATA31
MEM_MB_DATA32
MEM_MB_DATA33
MEM_MB_DATA34
MEM_MB_DATA35
MEM_MB_DATA36
MEM_MB_DATA37
MEM_MB_DATA38
MEM_MB_DATA39
MEM_MB_DATA40
MEM_MB_DATA41
MEM_MB_DATA42
MEM_MB_DATA43
MEM_MB_DATA44
MEM_MB_DATA45
MEM_MB_DATA46
MEM_MB_DATA47
MEM_MB_DATA48
MEM_MB_DATA49
MEM_MB_DATA50
MEM_MB_DATA51
MEM_MB_DATA52
MEM_MB_DATA53
MEM_MB_DATA54
MEM_MB_DATA55
MEM_MB_DATA56
MEM_MB_DATA57
MEM_MB_DATA58
MEM_MB_DATA59
MEM_MB_DATA60
MEM_MB_DATA61
MEM_MB_DATA62
MEM_MB_DATA63
C11
A11
A14
B14
G11
E11
D12
A13
A15
A16
A19
A20
C14
D14
C18
D18
D20
A21
D24
C25
B20
C20
B24
C24
E23
E24
G25
G26
C26
D26
G23
G24
AA24
AA23
AD24
AE24
AA26
AA25
AD26
AE25
AC22
AD22
AE20
AF20
AF24
AF23
AC20
AD20
AD18
AE18
AC14
AD14
AF19
AC18
AF16
AF15
AF13
AC12
AB11
Y11
AE14
AF14
AF11
AD11
MB_DATA0
MB_DATA1
MB_DATA2
MB_DATA3
MB_DATA4
MB_DATA5
MB_DATA6
MB_DATA7
MB_DATA8
MB_DATA9
MB_DATA10
MB_DATA11
MB_DATA12
MB_DATA13
MB_DATA14
MB_DATA15
MB_DATA16
MB_DATA17
MB_DATA18
MB_DATA19
MB_DATA20
MB_DATA21
MB_DATA22
MB_DATA23
MB_DATA24
MB_DATA25
MB_DATA26
MB_DATA27
MB_DATA28
MB_DATA29
MB_DATA30
MB_DATA31
MB_DATA32
MB_DATA33
MB_DATA34
MB_DATA35
MB_DATA36
MB_DATA37
MB_DATA38
MB_DATA39
MB_DATA40
MB_DATA41
MB_DATA42
MB_DATA43
MB_DATA44
MB_DATA45
MB_DATA46
MB_DATA47
MB_DATA48
MB_DATA49
MB_DATA50
MB_DATA51
MB_DATA52
MB_DATA53
MB_DATA54
MB_DATA55
MB_DATA56
MB_DATA57
MB_DATA58
MB_DATA59
MB_DATA60
MB_DATA61
MB_DATA62
MB_DATA63
MEM_MB_DM0
MEM_MB_DM1
MEM_MB_DM2
MEM_MB_DM3
MEM_MB_DM4
MEM_MB_DM5
MEM_MB_DM6
MEM_MB_DM7
A12
B16
A22
E25
AB26
AE22
AC16
AD12
MB_DM0
MB_DM1
MB_DM2
MB_DM3
MB_DM4
MB_DM5
MB_DM6
MB_DM7
C12
B12
D16
C16
A24
A23
F26
E26
AC25
AC26
AF21
AF22
AE16
AD16
AF12
AE12
MB_DQS_H0
MB_DQS_L0
MB_DQS_H1
MB_DQS_L1
MB_DQS_H2
MB_DQS_L2
MB_DQS_H3
MB_DQS_L3
MB_DQS_H4
MB_DQS_L4
MB_DQS_H5
MB_DQS_L5
MB_DQS_H6
MB_DQS_L6
MB_DQS_H7
MB_DQS_L7
MA_DATA0
MA_DATA1
MA_DATA2
MA_DATA3
MA_DATA4
MA_DATA5
MA_DATA6
MA_DATA7
MA_DATA8
MA_DATA9
MA_DATA10
MA_DATA11
MA_DATA12
MA_DATA13
MA_DATA14
MA_DATA15
MA_DATA16
MA_DATA17
MA_DATA18
MA_DATA19
MA_DATA20
MA_DATA21
MA_DATA22
MA_DATA23
MA_DATA24
MA_DATA25
MA_DATA26
MA_DATA27
MA_DATA28
MA_DATA29
MA_DATA30
MA_DATA31
MA_DATA32
MA_DATA33
MA_DATA34
MA_DATA35
MA_DATA36
MA_DATA37
MA_DATA38
MA_DATA39
MA_DATA40
MA_DATA41
MA_DATA42
MA_DATA43
MA_DATA44
MA_DATA45
MA_DATA46
MA_DATA47
MA_DATA48
MA_DATA49
MA_DATA50
MA_DATA51
MA_DATA52
MA_DATA53
MA_DATA54
MA_DATA55
MA_DATA56
MA_DATA57
MA_DATA58
MA_DATA59
MA_DATA60
MA_DATA61
MA_DATA62
MA_DATA63
G12
F12
H14
G14
H11
H12
C13
E13
H15
E15
E17
H17
E14
F14
C17
G17
G18
C19
D22
E20
E18
F18
B22
C23
F20
F22
H24
J19
E21
E22
H20
H22
Y24
AB24
AB22
AA21
W22
W21
Y22
AA22
Y20
AA20
AA18
AB18
AB21
AD21
AD19
Y18
AD17
W16
W14
Y14
Y17
AB17
AB15
AD15
AB13
AD13
Y12
W11
AB14
AA14
AB12
AA12
MA_DM0
MA_DM1
MA_DM2
MA_DM3
MA_DM4
MA_DM5
MA_DM6
MA_DM7
E12
C15
E19
F24
AC24
Y19
AB16
Y13
MA_DQS_H0
MA_DQS_L0
MA_DQS_H1
MA_DQS_L1
MA_DQS_H2
MA_DQS_L2
MA_DQS_H3
MA_DQS_L3
MA_DQS_H4
MA_DQS_L4
MA_DQS_H5
MA_DQS_L5
MA_DQS_H6
MA_DQS_L6
MA_DQS_H7
MA_DQS_L7
G13
H13
G16
G15
C22
C21
G22
G21
AD23
AC23
AB19
AB20
Y15
W15
W12
W13
MEM_MA_DATA0
MEM_MA_DATA1
MEM_MA_DATA2
MEM_MA_DATA3
MEM_MA_DATA4
MEM_MA_DATA5
MEM_MA_DATA6
MEM_MA_DATA7
MEM_MA_DATA8
MEM_MA_DATA9
MEM_MA_DATA10
MEM_MA_DATA11
MEM_MA_DATA12
MEM_MA_DATA13
MEM_MA_DATA14
MEM_MA_DATA15
MEM_MA_DATA16
MEM_MA_DATA17
MEM_MA_DATA18
MEM_MA_DATA19
MEM_MA_DATA20
MEM_MA_DATA21
MEM_MA_DATA22
MEM_MA_DATA23
MEM_MA_DATA24
MEM_MA_DATA25
MEM_MA_DATA26
MEM_MA_DATA27
MEM_MA_DATA28
MEM_MA_DATA29
MEM_MA_DATA30
MEM_MA_DATA31
MEM_MA_DATA32
MEM_MA_DATA33
MEM_MA_DATA34
MEM_MA_DATA35
MEM_MA_DATA36
MEM_MA_DATA37
MEM_MA_DATA38
MEM_MA_DATA39
MEM_MA_DATA40
MEM_MA_DATA41
MEM_MA_DATA42
MEM_MA_DATA43
MEM_MA_DATA44
MEM_MA_DATA45
MEM_MA_DATA46
MEM_MA_DATA47
MEM_MA_DATA48
MEM_MA_DATA49
MEM_MA_DATA50
MEM_MA_DATA51
MEM_MA_DATA52
MEM_MA_DATA53
MEM_MA_DATA54
MEM_MA_DATA55
MEM_MA_DATA56
MEM_MA_DATA57
MEM_MA_DATA58
MEM_MA_DATA59
MEM_MA_DATA60
MEM_MA_DATA61
MEM_MA_DATA62
MEM_MA_DATA63
MEM_MA_DM0
MEM_MA_DM1
MEM_MA_DM2
MEM_MA_DM3
MEM_MA_DM4
MEM_MA_DM5
MEM_MA_DM6
MEM_MA_DM7
MEM_MA_DATA[0..63] 6
MEM_MA_DM[0..7] 6
MEM_MA_DQS0_P
MEM_MA_DQS0_N
MEM_MA_DQS1_P
MEM_MA_DQS1_N
MEM_MA_DQS2_P
MEM_MA_DQS2_N
MEM_MA_DQS3_P
MEM_MA_DQS3_N
MEM_MA_DQS4_P
MEM_MA_DQS4_N
MEM_MA_DQS5_P
MEM_MA_DQS5_N
MEM_MA_DQS6_P
MEM_MA_DQS6_N
MEM_MA_DQS7_P
MEM_MA_DQS7_N
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
CONN_CPU
C362
1.5P/50V/NPO_4
MEM_MB_CLK7_N
MEM_MA_CLK7_N
Close to CPU within 1500 mils
MEM_MB_CLK1_P
C388
1.5P/50V/NPO_4
MEM_MB_CLK1_N
MEM_MA_CLK1_P
PROJECT : SA8
C374
1.5P/50V/NPO_4
MEM_MA_CLK1_N
Size
Custom
NB2/RD1
Document Number
Date:
A
Rev
1A
S1G2 DDRII MEMORY I/F 2/3

Sheet
E
of
46
U28F
CONN_CPU
C361
C338
C379
C371
C348
.01U/16V_4
C380
C382
180P/50V/NPO_4
180P/50V/NPO_4
C360
C303
180P/50V/NPO_4
C326
.22U/6.3V/X5_4
+1.8V_SUS
C359
.01U/16V_4
.22U/6.3V/X5_4
C298
.22U/6.3V/X5_4
C294
C334
180P/50V/NPO_4
.01U/16V_4
C357
C354
.22U/6.3V/X5_4
C358
22U/6.3V/X5
C314
C344
22U/6.3V/X5
+CPUVDDNB
C305
22U/6.3V/X5
VDDIO27
VDDIO26
VDDIO25
VDDIO24
VDDIO23
VDDIO22
VDDIO21
VDDIO20
VDDIO19
VDDIO18
VDDIO17
VDDIO16
VDDIO15
VDDIO14
VDDIO13
C295
22U/6.3V/X5
C296
22U/6.3V/X5
VDDIO1
VDDIO2
VDDIO3
VDDIO4
VDDIO5
VDDIO6
VDDIO7
VDDIO8
VDDIO9
VDDIO10
VDDIO11
VDDIO12
+VCORE1
C304
22U/6.3V/X5
H25
J17
K18
K21
K23
K25
L17
M18
M21
M23
M25
N17
2A
+1.8V_SUS
C306
22U/6.3V/X5
BOTTOM SIDE DECOUPLING
22U/6.3V/X5
+1.8V_SUS
Y25
V25
V23
V21
V18
U17
T25
T23
T21
T18
R17
P25
P23
P21
P18
+VCORE0
22U/6.3V/X5
VDDNB_1
VDDNB_2
VDDNB_3
VDDNB_4
VDDNB_5
P8
P10
R4
R7
R9
R11
T2
T6
T8
T10
T12
T14
U7
U9
U11
U13
U15
V6
V8
V10
V12
V14
W4
Y2
AC4
AD2
22U/6.3V/X5
K16
M16
P16
T16
V16
3A
VDD1_1
VDD1_2
VDD1_3
VDD1_4
VDD1_5
VDD1_6
VDD1_7
VDD1_8
VDD1_9
VDD1_10
VDD1_11
VDD1_12
VDD1_13
VDD1_14
VDD1_15
VDD1_16
VDD1_17
VDD1_18
VDD1_19
VDD1_20
VDD1_21
VDD1_22
VDD1_23
VDD1_24
VDD1_25
VDD1_26
J6
J8
J10
J12
J14
J16
J18
K2
K7
K9
K11
K13
K15
K17
L6
L8
L10
L12
L14
L16
L18
M7
M9
AC6
M17
N4
N8
N10
N16
N18
P2
P7
P9
P11
P17
R8
R10
R16
R18
T7
T9
T11
T13
T15
T17
U4
U6
U8
U10
U12
U14
U16
U18
V2
V7
V9
V11
V13
V15
V17
W6
Y21
Y23
N6
22U/6.3V/X5
+CPUVDDNB
VDD0_1
VDD0_2
VDD0_3
VDD0_4
VDD0_5
VDD0_6
VDD0_7
VDD0_8
VDD0_9
VDD0_10
VDD0_11
VDD0_12
VDD0_13
VDD0_14
VDD0_15
VDD0_16
VDD0_17
VDD0_18
VDD0_19
VDD0_20
VDD0_21
VDD0_22
VDD0_23
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98
VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
22U/6.3V/X5
G4
H2
J9
J11
J13
J15
K6
K10
K12
K14
L4
L7
L9
L11
L13
L15
M2
M6
M8
M10
N7
N9
N11
+VCORE1
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
22U/6.3V/X5
U28E
+VCORE0
AA4
AA11
AA13
AA15
AA17
AA19
AB2
AB7
AB9
AB23
AB25
AC11
AC13
AC15
AC17
AC19
AC21
AD6
AD8
AD25
AE11
AE13
AE15
AE17
AE19
AE21
AE23
B4
B6
B8
B9
B11
B13
B15
B17
B19
B21
B23
B25
D6
D8
D9
D11
D13
D15
D17
D19
D21
D23
D25
E4
F2
F11
F13
F15
F17
F19
F21
F23
F25
H7
H9
H21
H23
J4
DECOUPLING BETWEEN PROCESSOR AND DIMMs

PLACE CLOSE TO PROCESSOR AS POSSIBLE
+1.8V_SUS
C368
4.7U/6.3V/X5_6
C365
C412
C407
C381
C376
4.7U/6.3V/X5_6 4.7U/6.3V/X5_6 4.7U/6.3V/X5_6 .22U/6.3V/X5_4 .22U/6.3V/X5_4
+1.8V_SUS
C369
C378
.22U/6.3V/X5_4
.22U/6.3V/X5_4
C377
.01U/16V_4
C372
.01U/16V_4
C370
180P/50V/NPO_4
CONN_CPU
B
PROCESSOR POWER AND GROUND

+3.3V
+3.3V
+VCORE0
R468
Ver.B Correct VGS control
200/F_6
R490
10K_4
R497
+VCORE1
C299
.01U/16V_4
C316
.01U/16V_4
C315
.01U/16V_4
C300
.01U/16V_4
R493
10K_4
10K_4
Address: 98H
C695
.1U/10V/X5_4
U30
21,33
ABCLK
21,33
ABDATA
37
A
SYS_SHDN#
R489
R495
R494
13 PM_THERM#
0_4
SCLK
0_4
SDA
DXP
ALERT#
DXN
OVERT#
GND
*0_4
VCC
For fix HyperTransport nets

across plane splits
H_THRMDA 3
C694
2200P/50V_4
H_THRMDC 3
G786P81U
EC C-11
PROJECT : SA8
2/20 Change CPU thermal IC to 781-1P8.
Size
Custom
NB2/RD1
Document Number
Date:
5
Rev
2A
S1G2 PWR & GND 3/3

Sheet
1
of
46
4
4
4
4
MEM_MA_DQS0_P
MEM_MA_DQS1_P
MEM_MA_DQS2_P
MEM_MA_DQS3_P
MEM_MA_DQS4_P
MEM_MA_DQS5_P
MEM_MA_DQS6_P
MEM_MA_DQS7_P
13
31
51
70
131
148
169
188
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
4
4
4
4
4
4
4
4
MEM_MA_DQS0_N
MEM_MA_DQS1_N
MEM_MA_DQS2_N
MEM_MA_DQS3_N
MEM_MA_DQS4_N
MEM_MA_DQS5_N
MEM_MA_DQS6_N
MEM_MA_DQS7_N
11
29
49
68
129
146
167
186
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
30
32
164
166
CK0
CK0
CK1
CK1
MEM_MA_CLK1_P
MEM_MA_CLK1_N
MEM_MA_CLK7_P
MEM_MA_CLK7_N
MEM_MA_RAS#
MEM_MA_CAS#
MEM_MA_WE#
MEM_MA0_CS#0
MEM_MA0_CS#1
4,7 MEM_MA0_ODT0
4,7 MEM_MA0_ODT1
DIM1_SA0
DIM1_SA1
B
DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7
4
4
4
4
4
4
4
4
4,7 MEM_MA_CKE0
4,7 MEM_MA_CKE1
4,7
4,7
4,7
4,7
4,7
10
26
52
67
130
147
170
185
2,7,13 PDAT_SMB
2,7,13 PCLK_SMB
+3.3V
+0.9VSMVREF_DIMM
PDAT_SMB
PCLK_SMB
C770
.1U/10V/X5_4
CKE0
CKE1
108
113
109
110
115
RAS
CAS
WE
S0
S1
114
119
ODT0
ODT1
NC1
NC2
NC3
NC4
NC/TEST
50
69
83
120
163
198
200
SA0
SA1
195
197
SDA
SCL
199
VDDspd
VREF
VSS56
VSS55
VSS54
VSS53
VSS52
VSS51
VSS50
VSS49
VSS48
VSS47
VSS46
VSS45
VSS44
VSS43
VSS42
VSS41
VSS40
VSS39
VSS38
VSS37
VSS36
VSS35
VSS34
196
193
190
187
184
183
178
177
172
171
168
165
162
161
156
155
150
149
145
144
139
138
133
2
3
8
9
12
15
18
21
24
27
28
33
34
39
40
41
42
47
48
53
54
VSS0
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
MEM_MA_RESET#1
MEM_MA_NC5
4 MEM_MB_DM[0..7]
102
101
100
99
98
97
94
92
93
91
105
90
89
116
86
84
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
MEM_MB_BANK0
MEM_MB_BANK1
MEM_MB_BANK2
107
106
85
BA0
BA1
BA2
MEM_MB_DM0
MEM_MB_DM1
MEM_MB_DM2
MEM_MB_DM3
MEM_MB_DM4
MEM_MB_DM5
MEM_MB_DM6
MEM_MB_DM7
10
26
52
67
130
147
170
185
DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7
4
4
4
4
4
4
4
4
MEM_MB_DQS0_P
MEM_MB_DQS1_P
MEM_MB_DQS2_P
MEM_MB_DQS3_P
MEM_MB_DQS4_P
MEM_MB_DQS5_P
MEM_MB_DQS6_P
MEM_MB_DQS7_P
13
31
51
70
131
148
169
188
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
4
4
4
4
4
4
4
4
MEM_MB_DQS0_N
MEM_MB_DQS1_N
MEM_MB_DQS2_N
MEM_MB_DQS3_N
MEM_MB_DQS4_N
MEM_MB_DQS5_N
MEM_MB_DQS6_N
MEM_MB_DQS7_N
11
29
49
68
129
146
167
186
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
4
4
4
4
MEM_MB_CLK1_P
MEM_MB_CLK1_N
MEM_MB_CLK7_P
MEM_MB_CLK7_N
30
32
164
166
CK0
CK0
CK1
CK1
4,7 MEM_MB_CKE0
4,7 MEM_MB_CKE1
79
80
CKE0
CKE1
4,7 MEM_MB_RAS#
4,7 MEM_MB_CAS#
4,7 MEM_MB_WE#
4,7 MEM_MB0_CS#0
4,7 MEM_MB0_CS#1
108
113
109
110
115
RAS
CAS
WE
S0
S1
114
119
ODT0
ODT1
T167
DIM2_SA0
DIM2_SA1
198
200
SA0
SA1
T166
PDAT_SMB
PCLK_SMB
195
197
SDA
SCL
199
VDDspd
4,7 MEM_MB0_ODT0
4,7 MEM_MB0_ODT1
MEMHOT_SODIMM# 7
+3.3V
C787
.1U/10V/X5_4
+0.9VSMVREF_DIMM
C436
2.2U/6.3V/X5_6
C433
.1U/10V/X5_4
+1.8V_SUS
+0.9VSMVREF_DIMM
R294
1K/F_4
Reserved
4,39 +0.9VSMVREF
R290
*0_4
+0.9VSMVREF_DIMM
C451
1000P/50V_4
1
2
o3
8
9
12
15
18
21
24
27
28
33
34
39
40
41
42
47
48
53
54
VREF
5
7
17
19
4
6
14
16
23
25
35
37
20
22
36
38
43
45
55
57
44
46
56
58
61
63
73
75
62
64
74
76
123
125
135
137
124
126
134
136
141
143
151
153
140
142
152
154
157
159
173
175
158
160
174
176
179
181
189
191
180
182
192
194
NC1
NC2
NC3
NC4
NC/TEST
50
69
83
120
163
VSS56
VSS55
VSS54
VSS53
VSS52
VSS51
VSS50
VSS49
VSS48
VSS47
VSS46
VSS45
VSS44
VSS43
VSS42
VSS41
VSS40
VSS39
VSS38
VSS37
VSS36
VSS35
VSS34
196
193
190
187
184
183
178
177
172
171
168
165
162
161
156
155
150
149
145
144
139
138
133
MEM_MB_DATA4
MEM_MB_DATA5
MEM_MB_DATA2
MEM_MB_DATA3
MEM_MB_DATA0
MEM_MB_DATA1
MEM_MB_DATA6
MEM_MB_DATA7
MEM_MB_DATA13
MEM_MB_DATA12
MEM_MB_DATA11
MEM_MB_DATA10
MEM_MB_DATA8
MEM_MB_DATA9
MEM_MB_DATA14
MEM_MB_DATA15
MEM_MB_DATA16
MEM_MB_DATA17
MEM_MB_DATA18
MEM_MB_DATA19
MEM_MB_DATA20
MEM_MB_DATA21
MEM_MB_DATA22
MEM_MB_DATA23
MEM_MB_DATA24
MEM_MB_DATA25
MEM_MB_DATA26
MEM_MB_DATA27
MEM_MB_DATA28
MEM_MB_DATA29
MEM_MB_DATA30
MEM_MB_DATA31
MEM_MB_DATA37
MEM_MB_DATA36
MEM_MB_DATA34
MEM_MB_DATA35
MEM_MB_DATA33
MEM_MB_DATA32
MEM_MB_DATA38
MEM_MB_DATA39
MEM_MB_DATA40
MEM_MB_DATA45
MEM_MB_DATA47
MEM_MB_DATA46
MEM_MB_DATA44
MEM_MB_DATA41
MEM_MB_DATA43
MEM_MB_DATA42
MEM_MB_DATA52
MEM_MB_DATA53
MEM_MB_DATA50
MEM_MB_DATA51
MEM_MB_DATA48
MEM_MB_DATA49
MEM_MB_DATA54
MEM_MB_DATA55
MEM_MB_DATA56
MEM_MB_DATA60
MEM_MB_DATA58
MEM_MB_DATA59
MEM_MB_DATA61
MEM_MB_DATA57
MEM_MB_DATA62
MEM_MB_DATA63
MEMHOT_SODIMM#
MEM_MB_RESET#2
T177
MEM_MB_NC5
T176
F9-DELETE R286,R289
VSS0
VSS1
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
MEM_MB_DATA[0..63] 4
CN27
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
oVSS2
R291
1K/F_4
59
60
65
66
71
72
77
78
121
122
127
128
132
C431
C454 1000P/50V_4
C449 .1U/10V/X5_4
2.2U/6.3V/X5_6
79
80
4,7 MEM_MB_BANK[0..2]
MEM_MB_ADD0
MEM_MB_ADD1
MEM_MB_ADD2
MEM_MB_ADD3
MEM_MB_ADD4
MEM_MB_ADD5
MEM_MB_ADD6
MEM_MB_ADD7
MEM_MB_ADD8
MEM_MB_ADD9
MEM_MB_ADD10
MEM_MB_ADD11
MEM_MB_ADD12
MEM_MB_ADD13
MEM_MB_ADD14
MEM_MB_ADD15
SO-DIMM
(REVERSE)
MEM_MA_DM0
MEM_MA_DM1
MEM_MA_DM2
MEM_MA_DM3
MEM_MA_DM4
MEM_MA_DM5
MEM_MA_DM6
MEM_MA_DM7
MEM_MA_DATA0
MEM_MA_DATA1
MEM_MA_DATA2
MEM_MA_DATA3
MEM_MA_DATA4
MEM_MA_DATA5
MEM_MA_DATA6
MEM_MA_DATA7
MEM_MA_DATA8
MEM_MA_DATA9
MEM_MA_DATA10
MEM_MA_DATA11
MEM_MA_DATA12
MEM_MA_DATA13
MEM_MA_DATA14
MEM_MA_DATA15
MEM_MA_DATA16
MEM_MA_DATA17
MEM_MA_DATA18
MEM_MA_DATA19
MEM_MA_DATA20
MEM_MA_DATA21
MEM_MA_DATA22
MEM_MA_DATA23
MEM_MA_DATA24
MEM_MA_DATA25
MEM_MA_DATA26
MEM_MA_DATA27
MEM_MA_DATA28
MEM_MA_DATA29
MEM_MA_DATA30
MEM_MA_DATA31
MEM_MA_DATA36
MEM_MA_DATA37
MEM_MA_DATA35
MEM_MA_DATA39
MEM_MA_DATA38
MEM_MA_DATA32
MEM_MA_DATA33
MEM_MA_DATA34
MEM_MA_DATA40
MEM_MA_DATA41
MEM_MA_DATA46
MEM_MA_DATA47
MEM_MA_DATA44
MEM_MA_DATA45
MEM_MA_DATA42
MEM_MA_DATA43
MEM_MA_DATA52
MEM_MA_DATA49
MEM_MA_DATA54
MEM_MA_DATA55
MEM_MA_DATA53
MEM_MA_DATA48
MEM_MA_DATA51
MEM_MA_DATA50
MEM_MA_DATA61
MEM_MA_DATA60
MEM_MA_DATA63
MEM_MA_DATA62
MEM_MA_DATA56
MEM_MA_DATA57
MEM_MA_DATA58
MEM_MA_DATA59
VDD0
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
BA0
BA1
BA2
5
7
17
19
4
6
14
16
23
25
35
37
20
22
36
38
43
45
55
57
44
46
56
58
61
63
73
75
62
64
74
76
123
125
135
137
124
126
134
136
141
143
151
153
140
142
152
154
157
159
173
175
158
160
174
176
179
181
189
191
180
182
192
194
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
4 MEM_MA_DM[0..7]
MEM_MA_BANK0 107
MEM_MA_BANK1 106
MEM_MA_BANK2 85
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
4,7 MEM_MB_ADD[0..15]
59
60
65
66
71
72
77
78
121
122
127
128
132
4,7 MEM_MA_BANK[0..2]
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
SO-DIMM
(Normal)
102
101
100
99
98
97
94
92
93
91
105
90
89
116
86
84
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
MEM_MA_ADD0
MEM_MA_ADD1
MEM_MA_ADD2
MEM_MA_ADD3
MEM_MA_ADD4
MEM_MA_ADD5
MEM_MA_ADD6
MEM_MA_ADD7
MEM_MA_ADD8
MEM_MA_ADD9
MEM_MA_ADD10
MEM_MA_ADD11
MEM_MA_ADD12
MEM_MA_ADD13
MEM_MA_ADD14
MEM_MA_ADD15
MEM_MA_DATA[0..63] 4
CN24
VDD0
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
4,7 MEM_MA_ADD[0..15]
81
82
87
88
95
96
103
104
111
112
117
118
+1.8V_SUS
81
82
87
88
95
96
103
104
111
112
117
118
+1.8V_SUS
CONN_DDR2_H8R
0 ohm.
Ver.B Modified DDR footprint and

change to H4/H8 Parts.
H8
CONN_DDR2_H4R
H4
R287
R288
10K/F_4
10K/F_4
DIM2_SA0
DIM2_SA1
DIM1_SA0
DIM1_SA1
R566
R561
10K/F_4
10K/F_4
PROJECT : SA8
+3.3V
SMbus address A2
SMbus address A0
Size
Custom
NB2/RD1
Document Number
Rev
2A
DDR2 SODIMMS: A/B CHANNEL
Date:
Sheet
1
of
46
MEM_MA_ADD[0..15]
4,6 MEM_MA_ADD[0..15]
MEM_MB_ADD[0..15]
4,6 MEM_MB_ADD[0..15]
MEM_MA_BANK[0..2]
4,6 MEM_MA_BANK[0..2]
MEM_MB_BANK[0..2]
4,6 MEM_MB_BANK[0..2]
+0.9VSMVTT
MEM_MA_CKE0
MEM_MA_BANK2
MEM_MA_ADD12
MEM_MA_ADD9
MEM_MA_ADD8
MEM_MA_ADD5
MEM_MA_ADD3
MEM_MA_ADD1
MEM_MA_ADD10
MEM_MA_BANK0
MEM_MA_WE#
MEM_MA_CAS#
MEM_MA0_ODT1
MEM_MA0_CS#1
MEM_MA_ADD15
MEM_MA_CKE1
4,6 MEM_MA_CKE0
4,6
4,6
4,6
4,6
MEM_MA_WE#
MEM_MA_CAS#
MEM_MA0_ODT1
MEM_MA0_CS#1
4,6 MEM_MA_CKE1
RP9
3
1
3
1
1
3
1
3
3
1
3
1
3
1
3
1
MEM_MA_ADD7 RP16
MEM_MA_ADD14
MEM_MA_ADD6 RP15
MEM_MA_ADD11
4
2
4
2
3 47_4P2R
1
3 47_4P2R
1
MEM_MA_ADD2
MEM_MA_ADD4
4
2
3 47_4P2R
1
C448
.1U/10V/X5_4
2
4
1 47_4P2R
3
C460
.1U/10V/X5_4
4
2
3 47_4P2R
1
RP8
RP5
RP4
RP7
RP6
RP10
RP17
RP12
MEM_MA_BANK1 RP11
MEM_MA_ADD0
MEM_MA0_CS#0 RP14
MEM_MA_RAS#
4,6 MEM_MA0_CS#0
4,6 MEM_MA_RAS#
MEM_MA_ADD13 RP13
MEM_MA0_ODT0
4,6 MEM_MA0_ODT0
+0.9VSMVTT
47_4P2R
4
2
4
2
2
4
2
4
4
2
4
2
4
2
4
2
.1U/10V/X5_4
C452
.1U/10V/X5_4
C447
.1U/10V/X5_4
C434
.1U/10V/X5_4
C446
.1U/10V/X5_4
C453
.1U/10V/X5_4
C422
.1U/10V/X5_4
C429
.1U/10V/X5_4
C443
.1U/10V/X5_4
C428
.1U/10V/X5_4
C421
.1U/10V/X5_4
+1.8V_SUS
47_4P2R
47_4P2R
+1.8V_SUS
47_4P2R
47_4P2R
+1.8V_SUS
47_4P2R
47_4P2R
+1.8V_SUS
47_4P2R
3 47_4P2R
1
4
2
C461
4,6 MEM_MB_CKE0
C426
.1U/10V/X5_4
C459
.1U/10V/X5_4
C458
.1U/10V/X5_4
4,6
4,6
4,6
4,6
4,6
MEM_MB_WE#
MEM_MB_CAS#
MEM_MB0_ODT1
MEM_MB0_CS#1
MEM_MB_CKE1
+1.8V_SUS
+1.8V_SUS
+1.8V_SUS
MEM_MB_CKE0
MEM_MB_BANK2
MEM_MB_ADD12
MEM_MB_ADD9
MEM_MB_ADD8
MEM_MB_ADD5
MEM_MB_ADD3
MEM_MB_ADD1
MEM_MB_ADD10
MEM_MB_BANK0
MEM_MB_WE#
MEM_MB_CAS#
MEM_MB0_ODT1
MEM_MB0_CS#1
MEM_MB_CKE1
MEM_MB_ADD15
RP23
MEM_MB_ADD7
MEM_MB_ADD14
RP32
MEM_MB_ADD6
MEM_MB_ADD11
RP31
MEM_MB_ADD2
MEM_MB_ADD4
RP30
MEM_MB_BANK1
MEM_MB_ADD0
RP29
RP22
RP21
RP20
RP19
RP18
RP24
RP33
47_4P2R
4
2
2
4
4
2
4
2
4
2
4
2
4
2
2
4
3
1
1
3
3
1
3
1
3
1
3
1
3
1
1
3
4
2
3 47_4P2R
1
4
2
3 47_4P2R
1
4
2
3 47_4P2R
1
4
2
3 47_4P2R
1
.1U/10V/X5_4
C442
.1U/10V/X5_4
C427
.1U/10V/X5_4
C441
.1U/10V/X5_4
C463
.1U/10V/X5_4
C420
.1U/10V/X5_4
C457
.1U/10V/X5_4
C423
.1U/10V/X5_4
C438
.1U/10V/X5_4
C419
.1U/10V/X5_4
C450
.1U/10V/X5_4
C440
.1U/10V/X5_4
C435
.1U/10V/X5_4
C444
.1U/10V/X5_4
C437
.1U/10V/X5_4
47_4P2R
+1.8V_SUS
+1.8V_SUS
47_4P2R
47_4P2R
+1.8V_SUS
47_4P2R
47_4P2R
MEM_MB0_CS#0
MEM_MB_RAS#
RP28
4
2
3 47_4P2R
1
4,6 MEM_MB0_ODT0
MEM_MB0_ODT0
MEM_MB_ADD13
RP27
2
4
1 47_4P2R
3
PLACE CLOSE TO PROCESSOR

WITHIN 1.5 INCH
.1U/10V/X5_4
C462
47_4P2R
4,6 MEM_MB0_CS#0
4,6 MEM_MB_RAS#
+1.8V_SUS
C445
47_4P2R
+1.8V_SUS
+1.8V_SUS
+1.8V_SUS
+1.8V_SUS
+1.8V_SUS
PLACE CLOSE TO PROCESSOR

WITHIN 1.5 INCH
+1.8V_SUS
+1.8V_SUS
C416
.1U/10V/X5_4
C417
.1U/10V/X5_4
C418
.1U/10V/X5_4
C425
.1U/10V/X5_4
C406
.1U/10V/X5_4
C414
.1U/10V/X5_4
C424
.1U/10V/X5_4
PLACE CLOSE TO SOCKET( FOR EMI/EMC)
C409
.1U/10V/X5_4
C411
.1U/10V/X5_4
C415
.1U/10V/X5_4
C405
.1U/10V/X5_4
C791
.1U/10V/X5_4
PLACE CLOSE TO SOCKET( FOR EMI/EMC)
+3.3V
+3.3V
R519
*10K/F_4
R520
*10K/F_4
3
CPU_MEMHOT# 3,13
Close DDR2 socket

+3.3V
U37
PDAT_SMB
PCLK_SMB
1
2
SDA
SCL
O.S
GND
C792
R521
+VS
.1U/10V/X5_4
MEMHOT_SODIMM#
*33_4
2
Q36
*2N7002E-G
2
Q37
*2N7002E-G
2,6,13 PDAT_SMB
2,6,13 PCLK_SMB
A0
A1
A2
+3.3V
7
6
5
*DS75U+T&R
Address:92h
+3.3V
R526
10K/F_4 MEMHOT_SODIMM#
MEMHOT_SODIMM# 6
PROJECT : SA8
Size
Custom
NB2/RD1
Document Number
Date:
5
Rev
1A
DDR2 SODIMMS TERMINATIONS

Sheet
1
of
46
U22A
R400
Y25
Y24
V22
V23
V25
V24
U24
U25
T25
T24
P22
P23
P25
P24
N24
N25
HT_RXCAD0P
HT_RXCAD0N
HT_RXCAD1P
HT_RXCAD1N
HT_RXCAD2P
HT_RXCAD2N
HT_RXCAD3P
HT_RXCAD3N
HT_RXCAD4P
HT_RXCAD4N
HT_RXCAD5P
HT_RXCAD5N
HT_RXCAD6P
HT_RXCAD6N
HT_RXCAD7P
HT_RXCAD7N
PART 1 OF 6
HYPER TRANSPORT CPU I/F
HT_CPU_NB_CAD_H0
HT_CPU_NB_CAD_L0
HT_CPU_NB_CAD_H1
HT_CPU_NB_CAD_L1
HT_CPU_NB_CAD_H2
HT_CPU_NB_CAD_L2
HT_CPU_NB_CAD_H3
HT_CPU_NB_CAD_L3
HT_CPU_NB_CAD_H4
HT_CPU_NB_CAD_L4
HT_CPU_NB_CAD_H5
HT_CPU_NB_CAD_L5
HT_CPU_NB_CAD_H6
HT_CPU_NB_CAD_L6
HT_CPU_NB_CAD_H7
HT_CPU_NB_CAD_L7
HT_TXCAD0P
HT_TXCAD0N
HT_TXCAD1P
HT_TXCAD1N
HT_TXCAD2P
HT_TXCAD2N
HT_TXCAD3P
HT_TXCAD3N
HT_TXCAD4P
HT_TXCAD4N
HT_TXCAD5P
HT_TXCAD5N
HT_TXCAD6P
HT_TXCAD6N
HT_TXCAD7P
HT_TXCAD7N
D24
D25
E24
E25
F24
F25
F23
F22
H23
H22
J25
J24
K24
K25
K23
K22
HT_NB_CPU_CAD_H0
HT_NB_CPU_CAD_L0
HT_NB_CPU_CAD_H1
HT_NB_CPU_CAD_L1
HT_NB_CPU_CAD_H2
HT_NB_CPU_CAD_L2
HT_NB_CPU_CAD_H3
HT_NB_CPU_CAD_L3
HT_NB_CPU_CAD_H4
HT_NB_CPU_CAD_L4
HT_NB_CPU_CAD_H5
HT_NB_CPU_CAD_L5
HT_NB_CPU_CAD_H6
HT_NB_CPU_CAD_L6
HT_NB_CPU_CAD_H7
HT_NB_CPU_CAD_L7
HT_TXCAD8P
HT_TXCAD8N
HT_TXCAD9P
HT_TXCAD9N
HT_TXCAD10P
HT_TXCAD10N
HT_TXCAD11P
HT_TXCAD11N
HT_TXCAD12P
HT_TXCAD12N
HT_TXCAD13P
HT_TXCAD13N
HT_TXCAD14P
HT_TXCAD14N
HT_TXCAD15P
HT_TXCAD15N
F21
G21
G20
H21
J20
J21
J18
K17
L19
J19
M19
L18
M21
P21
P18
M18
HT_NB_CPU_CAD_H8
HT_NB_CPU_CAD_L8
HT_NB_CPU_CAD_H9
HT_NB_CPU_CAD_L9
HT_NB_CPU_CAD_H10
HT_NB_CPU_CAD_L10
HT_NB_CPU_CAD_H11
HT_NB_CPU_CAD_L11
HT_NB_CPU_CAD_H12
HT_NB_CPU_CAD_L12
HT_NB_CPU_CAD_H13
HT_NB_CPU_CAD_L13
HT_NB_CPU_CAD_H14
HT_NB_CPU_CAD_L14
HT_NB_CPU_CAD_H15
HT_NB_CPU_CAD_L15
HT_TXCLK0P
HT_TXCLK0N
HT_TXCLK1P
HT_TXCLK1N
H24
H25
L21
L20
HT_NB_CPU_CLK_H0
HT_NB_CPU_CLK_L0
HT_NB_CPU_CLK_H1
HT_NB_CPU_CLK_L1
HT_CPU_NB_CAD_H8
HT_CPU_NB_CAD_L8
HT_CPU_NB_CAD_H9
HT_CPU_NB_CAD_L9
HT_CPU_NB_CAD_H10
HT_CPU_NB_CAD_L10
HT_CPU_NB_CAD_H11
HT_CPU_NB_CAD_L11
HT_CPU_NB_CAD_H12
HT_CPU_NB_CAD_L12
HT_CPU_NB_CAD_H13
HT_CPU_NB_CAD_L13
HT_CPU_NB_CAD_H14
HT_CPU_NB_CAD_L14
HT_CPU_NB_CAD_H15
HT_CPU_NB_CAD_L15
AC24
AC25
AB25
AB24
AA24
AA25
Y22
Y23
W21
W20
V21
V20
U20
U21
U19
U18
HT_RXCAD8P
HT_RXCAD8N
HT_RXCAD9P
HT_RXCAD9N
HT_RXCAD10P
HT_RXCAD10N
HT_RXCAD11P
HT_RXCAD11N
HT_RXCAD12P
HT_RXCAD12N
HT_RXCAD13P
HT_RXCAD13N
HT_RXCAD14P
HT_RXCAD14N
HT_RXCAD15P
HT_RXCAD15N
HT_CPU_NB_CLK_H0
HT_CPU_NB_CLK_L0
HT_CPU_NB_CLK_H1
HT_CPU_NB_CLK_L1
T22
T23
AB23
AA22
HT_RXCLK0P
HT_RXCLK0N
HT_RXCLK1P
HT_RXCLK1N
HT_CPU_NB_CTL_H0
HT_CPU_NB_CTL_L0
HT_CPU_NB_CTL_H1
HT_CPU_NB_CTL_L1
M22
M23
R21
R20
HT_RXCTL0P
HT_RXCTL0N
HT_RXCTL1P
HT_RXCTL1N
HT_TXCTL0P
HT_TXCTL0N
HT_TXCTL1P
HT_TXCTL1N
M24
M25
P19
R18
HT_NB_CPU_CTL_H0
HT_NB_CPU_CTL_L0
HT_NB_CPU_CTL_H1
HT_NB_CPU_CTL_L1
C23
A24
HT_RXCALP
HT_RXCALN
HT_TXCALP
HT_TXCALN
B24
B25
HT_TXCALP R401
HT_TXCALN
300/F_4
HT_RXCALP
HT_RXCALN
3
D
RS780
signals
RX780
HT_TXCALP
HT_TXCALN
R401
300 ohm 1%
R401
1.21k ohm 1%
R400
300 ohm 1%
R400
1.21k ohm 1%
HT_RXCALP
HT_RXCALN
300/F_4
RS780MN
SIDE-PORT Reserved
This block is for UMA RS780 only , RX780 NC
U22D
PAR 4 OF 6
MEM_A0(NC)
MEM_A1(NC)
MEM_A2(NC)
MEM_A3(NC)
MEM_A4(NC)
MEM_A5(NC)
MEM_A6(NC)
MEM_A7(NC)
MEM_A8(NC)
MEM_A9(NC)
MEM_A10(NC)
MEM_A11(NC)
MEM_A12(NC)
MEM_A13(NC)
AD16
AE17
AD17
MEM_BA0(NC)
MEM_BA1(NC)
MEM_BA2(NC)
W12
Y12
AD18
AB13
AB18
V14
MEM_RASb(NC)
MEM_CASb(NC)
MEM_WEb(NC)
MEM_CSb(NC)
MEM_CKE(NC)
MEM_ODT(NC)
V15
W14
MEM_CKP(NC)
MEM_CKN(NC)
AE12
AD12
SBD_MEM/DVO_I/F
AB12
AE16
V11
AE15
AA12
AB16
AB14
AD14
AD13
AD15
AC16
AE13
AC14
Y14
MEM_COMPP(NC)
MEM_COMPN(NC)
MEM_DQ0/DVO_VSYNC(NC)
MEM_DQ1/DVO_HSYNC(NC)
MEM_DQ2/DVO_DE(NC)
MEM_DQ3/DVO_D0(NC)
MEM_DQ4(NC)
MEM_DQ5/DVO_D1(NC)
MEM_DQ6/DVO_D2(NC)
MEM_DQ7/DVO_D4(NC)
MEM_DQ8/DVO_D3(NC)
MEM_DQ9/DVO_D5(NC)
MEM_DQ10/DVO_D6(NC)
MEM_DQ11/DVO_D7(NC)
MEM_DQ12(NC)
MEM_DQ13/DVO_D9(NC)
MEM_DQ14/DVO_D10(NC)
MEM_DQ15/DVO_D11(NC)
AA18
AA20
AA19
Y19
V17
AA17
AA15
Y15
AC20
AD19
AE22
AC18
AB20
AD22
AC22
AD21
MEM_DQS0P/DVO_IDCKP(NC)
MEM_DQS0N/DVO_IDCKN(NC)
MEM_DQS1P(NC)
MEM_DQS1N(NC)
Y17
W18
AD20
AE21
MEM_DM0(NC)
MEM_DM1/DVO_D8(NC)
W17
AE19
IOPLLVDD18(NC)
IOPLLVDD(NC)
AE23
AE24
IOPLLVSS(NC)
AD23
MEM_VREF(NC)
AE18
+1.8V
+1.1V
RS780MN
PROJECT : SA8
Size
Custom
NB2/RD1
Document Number
Date:
5
Rev
1A
RS780MN-HT LINK I/F 1/4

Sheet
1
of
46
Discrete
M8x
Close to North Bridge

U22B
26 PCIE_RXP_LAN
26 PCIE_RXN_LAN
30 PCIE_RXP1
30 PCIE_RXN1
30 PCIE_RXP2
30 PCIE_RXN2
35 PCIE_RXP3
35 PCIE_RXN3
T10
T11
T8
T9
12
12
12
12
12
12
12
12
PCIE_RXP_LAN
PCIE_RXN_LAN
PCIE_RXP1
PCIE_RXN1
PCIE_RXP2
PCIE_RXN2
PCIE_RXP3
PCIE_RXN3
PCIE_RXP4
PCIE_RXN4
PCIE_RXP5
PCIE_RXN5
PCIE_SB_NB_RX0P
PCIE_SB_NB_RX0N
PCIE_SB_NB_RX1P
PCIE_SB_NB_RX1N
PCIE_SB_NB_RX2P
PCIE_SB_NB_RX2N
PCIE_SB_NB_RX3P
PCIE_SB_NB_RX3N
D4
C4
A3
B3
C2
C1
E5
F5
G5
G6
H5
H6
J6
J5
J7
J8
L5
L6
M8
L8
P7
M7
P5
M5
R8
P8
R6
R5
P4
P3
T4
T3
GFX_RX0P
GFX_RX0N
GFX_RX1P
GFX_RX1N
GFX_RX2P
GFX_RX2N
GFX_RX3P
GFX_RX3N
GFX_RX4P
GFX_RX4N
GFX_RX5P
GFX_RX5N
GFX_RX6P
GFX_RX6N
GFX_RX7P
GFX_RX7N
GFX_RX8P
GFX_RX8N
GFX_RX9P
GFX_RX9N
GFX_RX10P
GFX_RX10N
GFX_RX11P
GFX_RX11N
GFX_RX12P
GFX_RX12N
GFX_RX13P
GFX_RX13N
GFX_RX14P
GFX_RX14N
GFX_RX15P
GFX_RX15N
AE3
AD4
AE2
AD3
AD1
AD2
V5
W6
U5
U6
U8
U7
GPP_RX0P
GPP_RX0N
GPP_RX1P
GPP_RX1N
GPP_RX2P
GPP_RX2N
GPP_RX3P
GPP_RX3N
GPP_RX4P
GPP_RX4N
GPP_RX5P
GPP_RX5N
AA8
Y8
AA7
Y7
AA5
AA6
W5
Y5
SB_RX0P
SB_RX0N
SB_RX1P
SB_RX1N
SB_RX2P
SB_RX2N
SB_RX3P
SB_RX3N
GFX_TX0P
GFX_TX0N
GFX_TX1P
GFX_TX1N
GFX_TX2P
GFX_TX2N
GFX_TX3P
GFX_TX3N
GFX_TX4P
GFX_TX4N
GFX_TX5P
GFX_TX5N
GFX_TX6P
GFX_TX6N
GFX_TX7P
GFX_TX7N
GFX_TX8P
GFX_TX8N
GFX_TX9P
GFX_TX9N
GFX_TX10P
GFX_TX10N
GFX_TX11P
GFX_TX11N
GFX_TX12P
GFX_TX12N
GFX_TX13P
GFX_TX13N
GFX_TX14P
GFX_TX14N
GFX_TX15P
GFX_TX15N
A5
B5
A4
B4
C3
B2
D1
D2
E2
E1
F4
F3
F1
F2
H4
H3
H1
H2
J2
J1
K4
K3
K1
K2
M4
M3
M1
M2
N2
N1
P1
P2
C_PEG_TX15
C_PEG_TX#15
C_PEG_TX14
C_PEG_TX#14
C_PEG_TX13
C_PEG_TX#13
C_PEG_TX12
C_PEG_TX#12
C_PEG_TX11
C_PEG_TX#11
C_PEG_TX10
C_PEG_TX#10
C_PEG_TX9
C_PEG_TX#9
C_PEG_TX8
C_PEG_TX#8
C_PEG_TX7
C_PEG_TX#7
C_PEG_TX6
C_PEG_TX#6
C_PEG_TX5
C_PEG_TX#5
C_PEG_TX4
C_PEG_TX#4
C_PEG_TX3
C_PEG_TX#3
C_PEG_TX2
C_PEG_TX#2
C_PEG_TX1
C_PEG_TX#1
C_PEG_TX0
C_PEG_TX#0
C593
C596
C576
C582
C565
C572
C569
C570
C566
C555
C562
C551
C561
C560
C549
C550
C547
C546
C533
C530
C545
C544
C535
C534
C553
C552
C538
C537
C559
C558
C556
C557
GPP_TX0P
GPP_TX0N
GPP_TX1P
GPP_TX1N
GPP_TX2P
GPP_TX2N
GPP_TX3P
GPP_TX3N
GPP_TX4P
GPP_TX4N
GPP_TX5P
GPP_TX5N
AC1
AC2
AB4
AB3
AA2
AA1
Y1
Y2
Y4
Y3
V1
V2
PCIE_TXP0_C
PCIE_TXN0_C
PCIE_TXP1_C
PCIE_TXN1_C
PCIE_TXP2_C
PCIE_TXN2_C
PCIE_TXP3_C
PCIE_TXN3_C
PCIE_TXP4_C
PCIE_TXN4_C
PCIE_TXP5_C
PCIE_TXN5_C
C105
C116
C143
C132
C93
C94
C542
C541
SB_TX0P
SB_TX0N
SB_TX1P
SB_TX1N
SB_TX2P
SB_TX2N
SB_TX3P
SB_TX3N
AD7
AE7
AE6
AD6
AB6
AC6
AD5
AE5
PCE_CALRP(PCE_BCALRP)
PCE_CALRN(PCE_BCALRN)
AC8
AB8
PART 2 OF 6
PCIE I/F GFX
PEG_RXP15
PEG_RXN15
PEG_RXP14
PEG_RXN14
PEG_RXP13
PEG_RXN13
PEG_RXP12
PEG_RXN12
PEG_RXP11
PEG_RXN11
PEG_RXP10
PEG_RXN10
PEG_RXP9
PEG_RXN9
PEG_RXP8
PEG_RXN8
PEG_RXP7
PEG_RXN7
PEG_RXP6
PEG_RXN6
PEG_RXP5
PEG_RXN5
PEG_RXP4
PEG_RXN4
PEG_RXP3
PEG_RXN3
PEG_RXP2
PEG_RXN2
PEG_RXP1
PEG_RXN1
PEG_RXP0
PEG_RXN0
PCIE I/F GPP
PCIE I/F SB
A_TX0P_C C608
A_TX0N_C C610
A_TX1P_C C607
A_TX1N_C C604
A_TX2P_C C184
A_TX2N_C C178
A_TX3P_C C594
A_TX3N_C C599
NB_PCIECALRP
NB_PCIECALRN
.1U/10V/X5_4
.1U/10V/X5_4
.1U/10V/X5_4
.1U/10V/X5_4
.1U/10V/X5_4
.1U/10V/X5_4
.1U/10V/X5_4
.1U/10V/X5_4
.1U/10V/X5_4
.1U/10V/X5_4
.1U/10V/X5_4
.1U/10V/X5_4
.1U/10V/X5_4
.1U/10V/X5_4
.1U/10V/X5_4
.1U/10V/X5_4
.1U/10V/X5_4
.1U/10V/X5_4
.1U/10V/X5_4
.1U/10V/X5_4
.1U/10V/X5_4
.1U/10V/X5_4
.1U/10V/X5_4
.1U/10V/X5_4
.1U/10V/X5_4
.1U/10V/X5_4
.1U/10V/X5_4
.1U/10V/X5_4
.1U/10V/X5_4
.1U/10V/X5_4
.1U/10V/X5_4
.1U/10V/X5_4
17 PEG_RXN[15:0]
PEG_TXP15
PEG_TXN15
PEG_TXP14
PEG_TXN14
PEG_TXP13
PEG_TXN13
PEG_TXP12
PEG_TXN12
PEG_TXP11
PEG_TXN11
PEG_TXP10
PEG_TXN10
PEG_TXP9
PEG_TXN9
PEG_TXP8
PEG_TXN8
PEG_TXP7
PEG_TXN7
PEG_TXP6
PEG_TXN6
PEG_TXP5
PEG_TXN5
PEG_TXP4
PEG_TXN4
PEG_TXP3
PEG_TXN3
PEG_TXP2
PEG_TXN2
PEG_TXP1
PEG_TXN1
PEG_TXP0
PEG_TXN0
.1U/10V/X5_4
.1U/10V/X5_4
.1U/10V/X5_4
.1U/10V/X5_4
.1U/10V/X5_4
.1U/10V/X5_4
.1U/10V/X5_4
.1U/10V/X5_4
17 PEG_RXP[15:0]
PEG_RXN[15:0]
PEG_TXN[15:0]
PEG_RXP[15:0]
PEG_TXP[15:0]
PEG_TXN[15:0] 17
PEG_TXP[15:0] 17
RS780
C_PEG_TX15
C_PEG_TX#15
C_PEG_TX14
C_PEG_TX#14
C_PEG_TX13
C_PEG_TX#13
C_PEG_TX12
C_PEG_TX#12
C_PEG_TX15 23
C_PEG_TX#15 23
C_PEG_TX14 23
C_PEG_TX#14 23
RS780 Display Port Support (muxed on GFX)
C_PEG_TX13 23
C_PEG_TX#13 23
C_PEG_TX12 23
C_PEG_TX#12 23
GFX_TX0,TX1,TX2 and TX3

DP0
AUX0 and HPD0
To HDMI CONN
GFX_TX4,TX5,TX6 and TX7

DP1
AUX1 and HPD1
PCIE_TXP_LAN 26
PCIE_TXN_LAN 26
PCIE_TXP1 30
PCIE_TXN1 30
PCIE_TXP2 30
PCIE_TXN2 30
PCIE_TXP3 35
PCIE_TXN3 35
PORT0 TO PCIE-LAN
C
PORT1 To Mini PCI-E CN26

PORT2 To Mini PCI-E CN20
PORT3 TO NEW CARD
T7
T6
T5
T4
.1U/10V/X5_4
.1U/10V/X5_4
.1U/10V/X5_4
.1U/10V/X5_4
.1U/10V/X5_4
.1U/10V/X5_4
.1U/10V/X5_4
.1U/10V/X5_4
R380
R385
PCIE_NB_SB_TX0P
PCIE_NB_SB_TX0N
PCIE_NB_SB_TX1P
PCIE_NB_SB_TX1N
PCIE_NB_SB_TX2P
PCIE_NB_SB_TX2N
PCIE_NB_SB_TX3P
PCIE_NB_SB_TX3N
1.27K/F_4
2K/F_4
12
12
12
12
12
12
12
12
+1.1V
RS780MN
RX780/RS740/RS780 difference table (PCIE LINK)
RX780/RS780
B
NB_PCIECALRP
1.27K (GND)
GPP4
GPP4
GPP5
GPP5
PROJECT : SA8
Size
Custom
NB2/RD1
Document Number
Rev
1A
RS780MN-PCIE I/F 2/4
Date:
Sheet
1
of
46
U22C
+1.8V_AVDDQ_NB
Ver.B Check PowerXpress switch

NB_RST#_IN
0_4
R149
24,25 PX_LVDS_SWITCH
RS780
25 INT_CRT_RED
North Bridge RESET

D
C200
25 INT_CRT_GRN
*1000P/16V_4
25 INT_CRT_BLU
R152
150/F_4
R156
150/F_4
R159
150/F_4
R142
0 ohm
715/F_6
NB_PWRGD_IN
Ver.B Update
UMA
C_Pr(DFT_GPIO5)
Y(DFT_GPIO2)
COMP_Pb(DFT_GPIO4)
G18
G17
E18
F18
E19
F19
RED(DFT_GPIO0)
REDb(NC)
GREEN(DFT_GPIO1)
GREENb(NC)
BLUE(DFT_GPIO3)
BLUEb(NC)
DAC_RSET_NB
G14
DAC_RSET(PWM_GPIO1)
+1.1V_PLLVDD
+1.8V_PLLVDD18
A12
D14
B12
PLLVDD(NC)
PLLVDD18(NC)
PLLVSS(NC)
H17
VDDA18HTPLL
R383,R382,R117,R121
+1.8V_VDDA18HTPLL
*1000P/16V_4
R158,R152,R160
R156,R165,R159
+1.8V_VDDA18PCIEPLL
D7
E7
VDDA18PCIEPLL1
VDDA18PCIEPLL2
NB_RST#_IN
NB_PWRGD_IN
NB_LDT_STOP#
NB_ALLOW_LDTSTOP
D8
A10
C10
C12
SYSRESETb
POWERGOOD
LDTSTOPb
ALLOW_LDTSTOP
NBHT_REFCLKP
NBHT_REFCLKN
C25
C24
HT_REFCLKP
HT_REFCLKN
E11
F11
REFCLK_P/OSCIN(OSCIN)
REFCLK_N(PWM_GPIO3)
2 NBHT_REFCLKP
2 NBHT_REFCLKN
2
+3.3V
HDTV_DET
2
2
2
2
2
2
R581
*10K_4
PX_LVDS_SWITCH
24,25
4.7K_4 R124
0_4
0_4
GFX_REFCLKP
GFX_REFCLKN
I/O
NBGPP_CLKP
NBGPP_CLKN
U1
U2
GPP_REFCLKP
GPP_REFCLKN
I/O
SBLINK_CLKP
SBLINK_CLKN
V4
V3
GPPSB_REFCLKP(SB_REFCLKP)
GPPSB_REFCLKN(SB_REFCLKN)
R586
*10K_4
A9
B9
B8
A8
B7
A7
I2C_DATA
I2C_CLK
DDC_DATA/AUX0N(NC)
DDC_CLK/AUX0P(NC)
AUX1P(NC)
AUX1N(NC)
R379
38 DYN_PWR_EN
T97
POWER XPRESS
PX_LVDS_SWITCH
0_4 STRP_DATA
RS780_AUX_CAL
VGA+IGP
RS780
Ver.B Update
R372/R368
R378/R376
R377/R374
D31/D32/R580
R581/Q56
R586
R369
*4.7K_4
R378
4.7K_4
INT_CRT_DDCDAT
R376
4.7K_4
INT_CRT_DDCCLK
UMA
V
HDTV_DET
+3.3V
T105
T106
LA_CLK
LA_CLK#
LB_CLK
LB_CLK#
VDDLTP18(NC)
VSSLTP18(NC)
A13
B13
+1.8V_VDDLTP18_NB
VDDLT18_1(NC)
VDDLT18_2(NC)
VDDLT33_1(NC)
VDDLT33_2(NC)
A15
B15
A14
B14
+1.8V_VDDLT_18_NB
VSSLT1(VSS)
VSSLT2(VSS)
VSSLT3(VSS)
VSSLT4(VSS)
VSSLT5(VSS)
VSSLT6(VSS)
VSSLT7(VSS)
C14
D15
C16
C18
C20
E20
C22
LVDS_DIGON(PCE_TCALRP)
LVDS_BLON(PCE_RCALRP)
LVDS_ENA_BL(PWM_GPIO2)
E9
F7
G12
24
24
24
24
Ver.B Update
UMA
Hybrid
R112/R104/R371
R140
*0_4
DISP_ON_NB
LVDS_BLON_NB
DPST_PWM
B10
STRP_DATA
G11
RSVD
C8
R371
0_4
TMDS_HPD(NC)
HPD(NC)
D9
D10
TMDS_HPD0
TMDS_HPD1
TVCLKIN(PWM_GPIO5)
D12
SUS_STAT#_NB
THERMALDIODE_P
THERMALDIODE_N
AE8
AD8
R_NB_THRMDA
R_NB_THRMDC
MIS.
DISP_ON_NB 24
LVDS_BLON_NB 24
DPST_PWM 24
TMDS_HPD 18,23
T100
R127
0_4
SUS_STAT# 13
T102
T101
D13 TEST_EN
TESTMODE
R394
1.82K/F_4
AUX_CAL(NC)
+3V_AVDD_NB
+1.1V_PLLVDD
+1.1V
L62
+1.8V
PLLVDD - Graphics PLL

not applicable to
BLM18PG221SN1D
C615
RX780
2.2U/6.3V/X5_6
C228
2.2U/6.3V/X5_6
+1.8V_VDDLTP18_NB
L63
C617
2.2U/6.3V/X5_6
+1.8V
X
V
L30
BLM18PG221SN1D
AVDD-DAC Analog
not applicable to RX780
Hybrid
LA_CLK
LA_CLK#
LB_CLK
LB_CLK#
24
24
24
24
24
24
BLM18PG221SN1D
RX780 -->NC / RS780 --- ADD

+3.3V
TXCLK_LP(DBG_GPIO1)
TXCLK_LN(DBG_GPIO3)
TXCLK_UP(PCIE_RESET_GPIO4)
TXCLK_UN(PCIE_RESET_GPIO1)
B16
A16
D16
D17
LB_DATAP0
LB_DATAN0
LB_DATAP1
LB_DATAN1
LB_DATAP2
LB_DATAN2
T104
T103
RS780MN
PX_EN
VGA only
LB_DATAP0
LB_DATAN0
LB_DATAP1
LB_DATAN1
LB_DATAP2
LB_DATAN2
LB_DATAP3
LB_DATAN3
24
24
24
24
24
24
HDTV_DET
RS740_DFT_GPIO0
T193
23 HDMI_DDC_CLK
23 HDMI_DDC_DATA
D32
T2
T1
12
TXOUT_U0P(NC)
TXOUT_U0N(NC)
TXOUT_U1P(PCIE_RESET_GPIO3)
TXOUT_U1N(PCIE_RESET_GPIO2)
TXOUT_U2P(NC)
TXOUT_U2N(NC)
TXOUT_U3P(PCIE_RESET_GPIO5)
TXOUT_U3N(NC)
B18
A18
A17
B17
D20
D21
D18
D19
LA_DATAP0
LA_DATAN0
LA_DATAP1
LA_DATAN1
LA_DATAP2
LA_DATAN2
NBGFX_CLKP
NBGFX_CLKN
24 INT_LVDS_PNDAT
24 INT_LVDS_PNLCLK
PX_EN
NB_REFCLK_P
NB_REFCLK_N
4.7K_4
NBGFX_CLKP
NBGFX_CLKN
NBGPP_CLKP
NBGPP_CLKN
SBLINK_CLKP
SBLINK_CLKN
CH501H-40PT
CH501H-40PT
R134
+1.1V
0_4
R580
4.7K_4 Q56
*2N7002E
R126
R123
EXT_NB_OSC
+3.3V
R600
A22
B22
A21
B21
B20
A20
A19
B19
PM
C612
Ver.B Modified for PX_EN control
E17
F17
F15
TXOUT_L0P(NC)
TXOUT_L0N(NC)
TXOUT_L1P(NC)
TXOUT_L1N(NC)
TXOUT_L2P(NC)
TXOUT_L2N(DBG_GPIO0)
TXOUT_L3P(NC)
TXOUT_L3N(DBG_GPIO2)
PART 3 OF 6
DAC_HSYNC(PWM_GPIO4)
DAC_VSYNC(PWM_GPIO6)
DAC_SDA(PCE_TCALRN)
DAC_SCL(PCE_RCALRN)
Hybrid
16,24 NB_PWRGD_IN
D31
AVDD1(NC)
AVDD2(NC)
AVDDDI(NC)
AVSSDI(NC)
AVDDQ(NC)
AVSSQ(NC)
A11
B11
E8
F8
25 INT_HSYNC
25 INT_VSYNC
25 INT_CRT_DDCDAT
25 INT_CRT_DDCCLK
F10-DELETE R158,R160,
R165,R383,R382,R117,R121
,R374,R377,R601,R602,R104,R112
ESD Reserved
*0_4
F12
E12
F14
G15
H15
H14
CRT/TVOUT
+1.8V_AVDDDI_NB
rail
or
PLL PWR
LVTM
R129
12 NB_PLTRST#
rail
or
LA_DATAP0
LA_DATAN0
LA_DATAP1
LA_DATAN1
LA_DATAP2
LA_DATAN2
LA_DATAP3
LA_DATAN3
CLOCKs
RX780: Powered from the 1.8-V

and driven by SB600 LDT_RST#,
SB700 LDT_RST# or A_RST#.
RS780: Powered from the 3.3-V
and driven by SB600 LDT_RST#,
SB700 LDT_RST# or A_RST#.
+3V_AVDD_NB
VDDLTP18 - LVDS or DVI/HDMI PLL

+1.8V
SA8 didn't support

Hybrid for HDMI.
BLM21PG221SN1D
L29
BLM18PG221SN1D
+1.8V_PLLVDD18
C626
10U/6.3V/X5_8
R135
0_6
+1.8V_AVDDDI_NB
L66
C211
2.2U/6.3V/X5_6
C227
2.2U/6.3V/X5_6
C624
C619
4.7U/6.3V/X5_6 .1U/10V/X5_4
BLM18PG221SN1D
VDDLT18 - LVDS or
DVI/HDMI digital
not applicable to
RX780
AVDDQ-DAC Bandgap Reference

+1.8V_AVDDQ_NB
PLLVDD18 - Graphics PLL

+1.8V_VDDLT_18_NB
AVDDI-DAC Digital
L31
C226
2.2U/6.3V/X5_6
RS780
R386
3K_4
+1.8V
+3.3V
L24
BLM18PG221SN1D
Indicates if memory Side port

is available or not
0: available RS780 , Default
1: Not available RS780
( RS780 use HSYNC#)
R387
3K_4
R384
*3K_4
20mils width
+1.8V_VDDA18PCIEPLL
RS780/RX780
STRP_DATA
R390
10K/F_4
3 CPU_LDT_REQ#
+VDDG_NB
12 ALLOW_LDTSTOP
R381
RS780
RS780
Q33
*BSS138_NL
For extrnal EEPROM Debug only
0_6
+VDDG_NB
RS780
+VDDG_NB
+1.8V
20mils width
+1.8V_VDDA18HTPLL
C240
2.2U/6.3V/X5_6
R393
0_4
VDDA18HTPLL -HT LINK PLL

L33
BLM18PG221SN1D
+3.3V
NB_LDT_STOP#
R614
+3.3V
R395
*4.7K_4
3,12 CPU_LDT_STOP#
RS780
+VDDG_NB
RS780
Q34
*BSS138_NL
C179
2.2U/6.3V/X5_6
RS780
INT_HSYNC
+1.8V
VDDA18PCIEPLL -PCIE PLL
INT_VSYNC
R396
0_4
R615
D11-Signal by pass directly for AMD request.
R389
*4.7K_4
Enables Debug Bus acess

through memory T/O pads and GPIO.
0 : Enable RS780 , Default
1 : Disable RS780
(RS780 use VSYNC#)
NB_ALLOW_LDTSTOP
PROJECT : SA8
0_4
Size
Custom
*10K/F_4
NB2/RD1
Document Number
Date:
5
Rev
2A
RS780MN-SYSTEM I/F 3/4

Sheet
1
10
of
46
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSSAPCIE1
VSSAPCIE2
VSSAPCIE3
VSSAPCIE4
VSSAPCIE5
VSSAPCIE6
VSSAPCIE7
VSSAPCIE8
VSSAPCIE9
VSSAPCIE10
VSSAPCIE11
VSSAPCIE12
VSSAPCIE13
VSSAPCIE14
VSSAPCIE15
VSSAPCIE16
VSSAPCIE17
VSSAPCIE18
VSSAPCIE19
VSSAPCIE20
VSSAPCIE21
VSSAPCIE22
VSSAPCIE23
VSSAPCIE24
VSSAPCIE25
VSSAPCIE26
VSSAPCIE27
VSSAPCIE28
VSSAPCIE29
VSSAPCIE30
VSSAPCIE31
VSSAPCIE32
VSSAPCIE33
VSSAPCIE34
VSSAPCIE35
VSSAPCIE36
VSSAPCIE37
VSSAPCIE38
VSSAPCIE39
VSSAPCIE40
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
L12
M14
N13
P12
P15
R11
R14
T12
U14
U11
U15
V12
W11
W15
AC12
AA14
Y18
AB11
AB15
AB17
AB19
AE20
AB21
K11
VSSAHT1
VSSAHT2
VSSAHT3
VSSAHT4
VSSAHT5
VSSAHT6
VSSAHT7
VSSAHT8
VSSAHT9
VSSAHT10
VSSAHT11
VSSAHT12
VSSAHT13
VSSAHT14
VSSAHT15
VSSAHT16
VSSAHT17
VSSAHT18
VSSAHT19
VSSAHT20
VSSAHT21
VSSAHT22
VSSAHT23
VSSAHT24
VSSAHT25
VSSAHT26
VSSAHT27
A25
D23
E22
G22
G24
G25
H19
J22
L17
L22
L24
L25
M20
N22
P20
R19
R22
R24
R25
H20
U22
V19
W22
W24
W25
Y21
AD25
RX780/RS780 POWER DIFFERENCE TABLE
GROUND
PART 6/6
U22F
AE14
D11
G8
E14
E15
J15
J12
K14
M11
L15
A2
B1
D3
D5
E4
G1
G2
G4
H7
J4
R7
L1
L2
L4
L7
M6
N4
P6
R1
R2
R4
V7
U4
V8
V6
W1
W2
W4
W7
W8
Y6
AA4
AB5
AB1
AB7
AC3
AC4
AE1
AE4
AB2
PIN NAME
RX780
RS780
PIN NAME
RX780
VDDHT
+1.1V
+1.1V
IOPLLVDD
NC
+1.1V
VDDHTRX
+1.1V
+1.1V
AVDD
NC
+3.3V
VDDHTTX
+1.2V
+1.2V
AVDDDI
NC
+1.8V
VDDA18PCIE
+1.8V
+1.8V
AVDDQ
NC
+1.8V
VDDG18
+1.8V
+1.8V
PLLVDD
NC
+1.1V
VDD18_MEM
NC
+1.8V
PLLVDD18
NC
+1.8V
VDDPCIE
+1.1V
+1.1V
VDDA18PCIEPLL
+1.8V
+1.8V
+1.1V
VDDA18HTPLL
+1.8V
+1.8V
VDDLTP18
NC
+1.8V
RS780
VDDC
+1.1V
VDD_MEM
NC
+1.8V/1.5V
VDDG33
NC
+3.3V
VDDLT18
NC
+1.8V
IOPLLVDD18
NC
+1.8V
VDDLT33
NC
NC
+1.1V
+1.1V 2A for RS780M

0.6A
C620
C218
C224
4.7U/6.3V/X5_6 .1U/10V/X5_4 .1U/10V/X5_4
VDDHTRX - HT
LINK RX I/O for
RX780/RS780
0.45A
L67
BLM21PG221SN1D
C216
.1U/10V/X5_4
+1.1V_VDDHTRX
C628
C233
C627
C625
4.7U/6.3V/X5_6 .1U/10V/X5_4 .1U/10V/X5_4 .1U/10V/X5_4
+1.2V 2A for RS780M+SB700

+1.2V
L32
BLM21PG221SN1D
0.5A
+1.2V_VDDHTTX
C234
4.7U/6.3V/X5_6
C238
.1U/10V/X5_4
C235
.1U/10V/X5_4
C221
.1U/10V/X5_4
C230
.1U/10V/X5_4
Ver.B Mount
B
+1.8V 1A for RS780M+SB700

L25
+1.8V
600mA
+1.8V_VDDA18PCIE
C191
C190
C196
C186
C197
4.7U/6.3V/X5_6
4.7U/6.3V/X5_6
.1U/10V/X5_4
.1U/10V/X5_4
.1U/10V/X5_4
BLM21PG221SN1D
VDDA18PCIE PCIE TX stage

I/O for
RX780/RS780
VDD18 - RS780 I/O

transform
+1.8V
R118
0_6
R388
0_6
C192
.1U/10V/X5_4
0.005A
C198
1U/10V/X5_4
+1.8V
VDDPCIE - PCIE-E Main power
U22E
+1.1V_VDDHT
L64
BLM21PG221SN1D
0.005A
C616
1U/10V/X5_4
VDD18_MEM For UMA RS780 only

Not applicable to RX780
memory I/O transform
+1.8V_VDDG18_NB
+1.8V_VDD18_MEM
J17
K16
L16
M16
P16
R16
T16
VDDHT_1
VDDHT_2
VDDHT_3
VDDHT_4
VDDHT_5
VDDHT_6
VDDHT_7
H18
G19
F20
E21
D22
B23
A23
VDDHTRX_1
VDDHTRX_2
VDDHTRX_3
VDDHTRX_4
VDDHTRX_5
VDDHTRX_6
VDDHTRX_7
AE25
AD24
AC23
AB22
AA21
Y20
W19
V18
U17
T17
R17
P17
M17
J10
P10
K10
M10
L10
W9
H9
T10
R10
Y9
AA9
AB9
AD9
AE9
U10
F9
G9
AE11
AD11
PART 5/6
VDDHTTX_1
VDDHTTX_2
VDDHTTX_3
VDDHTTX_4
VDDHTTX_5
VDDHTTX_6
VDDHTTX_7
VDDHTTX_8
VDDHTTX_9
VDDHTTX_10
VDDHTTX_11
VDDHTTX_12
VDDHTTX_13
POWER
VDDHT - HT
LINK digital
I/O for
RX780/RS780
VDDA18PCIE_1
VDDA18PCIE_2
VDDA18PCIE_3
VDDA18PCIE_4
VDDA18PCIE_5
VDDA18PCIE_6
VDDA18PCIE_7
VDDA18PCIE_8
VDDA18PCIE_9
VDDA18PCIE_10
VDDA18PCIE_11
VDDA18PCIE_12
VDDA18PCIE_13
VDDA18PCIE_14
VDDA18PCIE_15
VDDG18_1(VDD18_1)
VDDG18_2(VDD18_2)
VDD18_MEM1(NC)
VDD18_MEM2(NC)
RS780MN
VDDPCIE_1
VDDPCIE_2
VDDPCIE_3
VDDPCIE_4
VDDPCIE_5
VDDPCIE_6
VDDPCIE_7
VDDPCIE_8
VDDPCIE_9
VDDPCIE_10
VDDPCIE_11
VDDPCIE_12
VDDPCIE_13
VDDPCIE_14
VDDPCIE_15
VDDPCIE_16
VDDPCIE_17
VDDC_1
VDDC_2
VDDC_3
VDDC_4
VDDC_5
VDDC_6
VDDC_7
VDDC_8
VDDC_9
VDDC_10
VDDC_11
VDDC_12
VDDC_13
VDDC_14
VDDC_15
VDDC_16
VDDC_17
VDDC_18
VDDC_19
VDDC_20
VDDC_21
VDDC_22
VDD_MEM1(NC)
VDD_MEM2(NC)
VDD_MEM3(NC)
VDD_MEM4(NC)
VDD_MEM5(NC)
VDD_MEM6(NC)
VDDG33_1(NC)
VDDG33_2(NC)
A6
B6
C6
D6
E6
F6
G7
H8
J9
K9
M9
L9
P9
R9
T9
V9
U9
K12
J14
U16
J11
K15
M12
L14
L11
M13
M15
N12
N14
P11
P13
P14
R12
R15
T11
T15
U12
T14
J16
0.7A
+1.1V_VDD_PCIE
C193
C177
C189
C180
.1U/10V/X5_4 .1U/10V/X5_4 1U/10V/X5_4 1U/10V/X5_4
0_8
+1.1V
C174
4.7U/6.3V/X5_6
7A
VDDC - Core Logic power

+1.1V_DYN
C212
C214
C206
.1U/10V/X5_4 .1U/10V/X5_4 .1U/10V/X5_4
C215
.1U/10V/X5_4
C201
.1U/10V/X5_4
C205
.1U/10V/X5_4
C204
.1U/10V/X5_4
VDD_MEM For UMA RS780 only

memory I/O transform
AE10
AA11
Y11
AD10
AB10
AC10
H11
H12
R102
+3V_VDDG33
C202
.1U/10V/X5_4
R125
C199
.1U/10V/X5_4
RS780
0_6
3.3V(0.03A)
+3.3V
VDD33 - 3.3V I/O

PROJECT : SA8
Size
Custom
NB2/RD1
Document Number
Date:
5
Rev
2A
RS780MN-POWER 4/4
Sheet
1
11
of
46
PCI_CLK3
L40
R235
R234
BLM18PG221SN1D
562/F_4
2.05K/F_4
N2
A_RX0P_C
A_RX0N_C
A_RX1P_C
A_RX1N_C
A_RX2P_C
A_RX2N_C
A_RX3P_C
A_RX3N_C
V23
V22
V24
V25
U25
U24
T23
T22
PCIE_TX0P
PCIE_TX0N
PCIE_TX1P
PCIE_TX1N
PCIE_TX2P
PCIE_TX2N
PCIE_TX3P
PCIE_TX3N
U22
U21
U19
V19
R20
R21
R18
R17
PCIE_RX0P
PCIE_RX0N
PCIE_RX1P
PCIE_RX1N
PCIE_RX2P
PCIE_RX2N
PCIE_RX3P
PCIE_RX3N
PCIE_CALRP_SB T25
PCIE_CALRN_SB T24
+1.2V_PCIE_PVDD
40mA
PCIE_PVDD-- PCIE PLL POWER
C337
2.2U/6.3V/X5_6
SB700
A_RST#_SB
PCIE_NB_SB_TX0P
PCIE_NB_SB_TX0N
PCIE_NB_SB_TX1P
PCIE_NB_SB_TX1N
PCIE_NB_SB_TX2P
PCIE_NB_SB_TX2N
PCIE_NB_SB_TX3P
PCIE_NB_SB_TX3N
PCIE_NB_SB_TX0P
PCIE_NB_SB_TX0N
PCIE_NB_SB_TX1P
PCIE_NB_SB_TX1N
PCIE_NB_SB_TX2P
PCIE_NB_SB_TX2N
PCIE_NB_SB_TX3P
PCIE_NB_SB_TX3N
+1.2V_PCIE_VDDR
.1U/10V/X5_4
.1U/10V/X5_4
.1U/10V/X5_4
.1U/10V/X5_4
.1U/10V/X5_4
.1U/10V/X5_4
.1U/10V/X5_4
.1U/10V/X5_4
C330
1U/10V/X5_4
P24
P25
A_RST#
Part 1 of 5
PCICLK0
PCICLK1
PCICLK2
PCICLK3
PCICLK4
PCICLK5/GPIO41
P4
P3
P1
P2
T4
T3
PCI_CLK2_R
PCI_CLK3_R
PCI_CLK4_R
PCI_CLK5_R
PCIRST#
N1
PCIRST#_L
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
CBE0#
CBE1#
CBE2#
CBE3#
FRAME#
DEVSEL#
IRDY#
TRDY#
PAR
STOP#
PERR#
SERR#
REQ0#
REQ1#
REQ2#
REQ3#/GPIO70
REQ4#/GPIO71
GNT0#
GNT1#
GNT2#
GNT3#/GPIO72
GNT4#/GPIO73
CLKRUN#
LOCK#
U2
P7
V4
T1
V3
U1
V1
V2
T2
W1
T9
R6
R7
R5
U8
U5
Y7
W8
V9
Y8
AA8
Y4
Y3
Y2
AA2
AB4
AA1
AB3
AB2
AC1
AC2
AD1
W2
U7
AA7
Y1
AA6
W5
AA5
Y5
U6
W6
W4
V7
AC3
AD4
AB7
AE6
AB6
AD2
AE4
AD5
AC6
AE5
AD6
V5
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
PCIE_CALRP
PCIE_CALRN
PCIE_PVDD
INTE#/GPIO33
INTF#/GPIO34
INTG#/GPIO35
INTH#/GPIO36
AD3
AC4
AE2
AE3
INTE#
INTF#
INTG#
PE_GPIO0
LPCCLK0
LPCCLK1
LAD0
LAD1
LAD2
LAD3
LFRAME#
LDRQ0#
LDRQ1#/GNT5#/GPIO68
BMREQ#/REQ5#/GPIO65
SERIRQ
G22
E22
H24
H23
J25
J24
H25
H22
AB8
AD7
V15
LPC_CLK0
LPC_CLK1
LPC_LAD0
LPC_LAD1
LPC_LAD2
LPC_LAD3
LPC_LFRAME#
LDRQ#0
LDRQ1#_SB
SB_GPIO65
SERIRQ
C3
C2
B2
RTC_CLK
INTRUDER_ALERT#
+AVBAT
PCIE_PVSS
RTC_X1
SBSRC_CLKP
SBSRC_CLKN
N25
N24
PCIE_RCLKP/NB_LNK_CLKP
PCIE_RCLKN/NB_LNK_CLKN
T143
T141
NB_DISP_CLKP
NB_DISP_CLKN
K23
K22
NB_DISP_CLKP
NB_DISP_CLKN
T136
T137
NB_HT_CLKP
NB_HT_CLKN
M24
M25
NB_HT_CLKP
NB_HT_CLKN
T42
T46
CPU_HT_CLKP
CPU_HT_CLKN
P17
M18
CPU_HT_CLKP
CPU_HT_CLKN
T139
T138
SLT_GFX_CLKP
SLT_GFX_CLKN
M23
M22
SLT_GFX_CLKP
SLT_GFX_CLKN
T56
T55
GPP_CLK0P
GPP_CLK0N
J19
J18
GPP_CLK0P
GPP_CLK0N
T50
T51
GPP_CLK1P
GPP_CLK1N
L20
L19
GPP_CLK1P
GPP_CLK1N
T39
T37
GPP_CLK2P
GPP_CLK2N
M19
M20
GPP_CLK2P
GPP_CLK2N
GPP_CLK3P
GPP_CLK3N
N22
P22
GPP_CLK3P
GPP_CLK3N
L18
25M_48M_66M_OSC
J21
25M_X1
SBSRC_CLKP
SBSRC_CLKN
T44
T45
T53
Y5
3
2
T58
R481
100MHZ
CLOCK GENERATOR
2
2
PCI INTERFACE
RTC_X2
T54
J20
25M_X2
R445
R442
R433
R440
R450
REQ0#
GNT0#
PE_GPIO1
T47
T40
22_4
22_4
22_4
22_4
33_4
PCI_CLK_TPM 16
PCI_CLK3 16,27
PCI_CLK4 16
PCI_CLK5 16
PCIRST#
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
CBE0#
CBE1#
CBE2#
CBE3#
FRAME#
DEVSEL#
IRDY#
TRDY#
PAR
STOP#
27
27
27
27
27
27
27
27
27
27
27
27
27
27
27
27
27
27
27
27
27
27
27
16,27
16,27
16,27
16,27
16,27
16,27
16,27
16,27
16,27
27
27
27
27
27
27
27
27
27
27
REQ0#
27
T21
T25
GNT0#
27
PCIRST# 27
+3.3V
PE_GPIO1
+1.8V
R472
*10K/F_4
RTC_X2
B3
X2
+3.3V
R469
10K/F_4
10 ALLOW_LDTSTOP
3 CPU_PROCHOT#
3
CPU_PWRGD
3,10 CPU_LDT_STOP#
3 CPU_LDT_RST#
ALLOW_LDTSTOP
CPU_PROCHOT#
CPU_PWRGD
CPU_LDT_STOP#
CPU_LDT_RST#
ESD Reserved
F23
F24
F22
G25
G24
ALLOW_LDTSTP
PROCHOT#
LDT_PG
LDT_STP#
LDT_RST#
LPC
X1
RTC
A3
RTCCLK
INTRUDER_ALERT#
VBAT
INTE#
T28
R253
R475
follow AMD
reference schematic
+AVBAT
D26
R484
CH501H-40PT
510/F_4+3VRTC
D25
CH501H-40PT
1U/10V/X5_4
C706
1U/10V/X5_4
20MIL
0 ohm
CN21
CONN_RTC
CLKRUN# 27,30,33
27
R582
0_4
Ver.B Correct connection.

PX_EN 10
PE_GPIO0 17
LPC_CLK0 16
LPC_CLK1 16
PCLK_LPC_DEBUG
LPC_CLK_8502 33
Ver.B Modified for PX_EN control

30
LPC_LAD0 30,33
LPC_LAD1 30,33
LPC_LAD2 30,33
LPC_LAD3 30,33
LPC_LFRAME# 30,33
LDRQ#0
30
PCLK_LPC_DEBUG
LPC_CLK_8502
T24
T113
SERIRQ
30,33
RTC_CLK 16
C698
15P/50V/NPO_4
T152
+AVBAT
C364
15P/50V/NPO_4
A
G1
*SHORT_ PAD1
C704
.1U/10V/X5_4
Ver.B BOM change
PROJECT : SA8
C301
*1000P/16V_4
Size
Custom
NB2/RD1
Document Number
Rev
2A
SB700-PCIE/PCI/CPU/LPC 1/4
Date:
5
+3.3V_ALW
+VCCRTC_2
C705
22_4
22_4
20MIL
IC CTRL(528P) SB700 A11(218S7EALA11FG)

P/N : AJALA110T00
100K/F_4
SB700
CPU_PWRGD
*8.2K_4
R411
RTC_X1
C712
18P/50V/C0G_4
CPU
C713
18P/50V/C0G_4
R415
All the PCI bus has

build-in Pull-UP/Down
resistors
F11-DELETE R416,R518
20M_6
RTC XTAL
R480
*8.2K_4
Maybe can remove
XTAL_32.768KHZ
*20M_6
R404
SB_GPIO65
PE_GPIO1 33
FPBACK# 24
R410
0_4
T127
T35
CLKRUN#_R
1
2
9
9
9
9
9
9
9
9
+1.2V
C658
C657
C660
C662
C668
C663
C670
C669
PCIE_SB_NB_RX0P
PCIE_SB_NB_RX0N
PCIE_SB_NB_RX1P
PCIE_SB_NB_RX1N
PCIE_SB_NB_RX2P
PCIE_SB_NB_RX2N
PCIE_SB_NB_RX3P
PCIE_SB_NB_RX3N
C664
*10P/50VC0G_4
U27A
PCI CLKS
PLACE THESE
PCIE AC
COUPLING CAPS
CLOSE TO U600
To RS780
9
9
9
9
9
9
9
9
33_4
33_4
33_4
33_4
33_4
PCI EXPRESS INTERFACE
R447
R446
R449
R443
R448
10 NB_PLTRST#
17 PCIE_RST#
26 LAN_PLTRST#
35 EPRESS_PLTRST#
30 MINI_PLTRST#
Sheet
1
12
of
46
+3.3V_SUS
0 ohm
R262
*10K/F_4 SWI#
SCL0/SDATA0 is 3V tolerance
AMD datasheet define it
R185
2.2K_4
PCLK_SMB
R186
2.2K_4
PDAT_SMB
+3.3V_S5
33
33
33
33
Clock gen/Robson
/DDR2/DDR2
thermal/Accelerometer
SB_SMBCLK1
SB_SMBDATA1
2.2K_4
2.2K_4
SYS_RST#
PCIE_WAKE#
SWI#
CPU_THERMTRIP#
WD_PWRGD
26,30,35 PCIE_WAKE#
33
SWI#
3 CPU_THERMTRIP#
16 WD_PWRGD
SCL1/SDATA1 is 3V/S5 tolerance

R458
R457
GATEA20
RCIN#
SCI#
KBSMI#
T145
33
D3
RSMRST#
Ver.B Correct GPIO6,39 netname

Ver.B correct R180 BOM error
+3.3V_S5SCL2/SDATA2
is 3V/S5 tolerance
R172
R173
R245
2.2K_4
2.2K_4
1K_4
R583
Ver.B add R583
SB_SCLK2
SB_SDATA2
DNBSWON#
PCI_PME#
R180
28 ACZ_SPKR
2,6,7 PCLK_SMB
2,6,7 PDAT_SMB
30 SB_SMBCLK1
30 SB_SMBDATA1
10K_4
E3 Change R241 to ASM.
+3.3V
D1-R241 Delete for AMD request.

R406
R241
R211
R210
R208
R209
R405
10K_4
4.7K_4
10K_4
10K_4
10K_4
10K_4
10K_4
GPIO10
SUS_STAT#
GPIO0
GPIO39
GPIO40
GPIO4
GPIO6
D20
1
3,7 CPU_MEMHOT#
5 PM_THERM#
CH501H-40PT
2
R491
R492
+3.3V
SYS_RST#
PM_BATLOW#
SES_INT
GEVENT7#
T153
T26
T60
G2
2
CPU_MEMHOT#_IN
*0_4
SMBALERT#_1
*10K/F_4
35 NEWCARD_DETECT
31
32
32
*SHORT_ PAD1
SB_JTAG_TDO
SB_JTAG_TCK
SB_JTAG_TDI
SB_JTAG_RST#
USB_OC2#
USB_OC1#
USB_OC0#
ACZ_BCLK
ACZ_SDOUT
ACZ_SDIN0_R
ACZ_SDIN1_R
To Azalia
ACZ_SDOUT
R451
33_4
ACZ_SDOUT_AUDIO
C671
ACZ_SYNC
R225
ACZ_BCLK
R454
ACZ_RST#
R233
ACZ_SDIN0_R
R238
28
T49
T52
*10P/50VC0G_4
16
33_4
ACZ_SYNC_AUDIO
C302
*10P/50VC0G_4
C676
*10P/50VC0G_4
33_4
ACZ_SYNC
ACZ_RST#
ACZ_RST#
28
33_4
ACZ_RST#_AUDIO
0_4
ACZ_SDIN0
ACZ_SYNC
ACZ_BCLK
R453
33_4
R228
+3.3V
ACZ_SDOUT_AUDIO_MDC
C674
*10P/50VC0G_4
C317
*10P/50VC0G_4
33_4
R455
ACZ_SYNC_AUDIO_MDC
33_4
BIT_CLK_AUDIO_MDC
L86
ACZ_RST#
R232
33_4
ACZ_SDIN1_R R243
33_4
SATA_IS0#/GPIO10
CLK_REQ3#/SATA_IS1#/GPIO6
SMARTVOLT/SATA_IS2#/GPIO4
CLK_REQ0#/SATA_IS3#/GPIO0
CLK_REQ1#/SATA_IS4#/FANOUT3/GPIO39
CLK_REQ2#/SATA_IS5#/FANIN3/GPIO40
SPKR/GPIO2
SCL0/GPOC0#
SDA0/GPOC1#
SCL1/GPOC2#
SDA1/GPOC3#
DDC1_SCL/GPIO9
DDC1_SDA/GPIO8
LLB#/GPIO66
SHUTDOWN#/GPIO5
DDR3_RST#/GEVENT7#
B9
B8
A8
A9
E5
F8
E4
USB_OC6#/IR_TX1/GEVENT6#
USB_OC5#/IR_TX0/GPM5#
USB_OC4#/IR_RX0/GPM4#
USB_OC3#/IR_RX1/GPM3#
USB_OC2#/GPM2#
USB_OC1#/GPM1#
USB_OC0#/GPM0#
M1
M2
J7
J8
L8
M3
L6
M4
L5
AZ_BITCLK
AZ_SDOUT
AZ_SDIN0/GPIO42
AZ_SDIN1/GPIO43
AZ_SDIN2/GPIO44
AZ_SDIN3/GPIO46
AZ_SYNC
AZ_RST#
AZ_DOCK_RST#/GPM8#
28
28
27NH_5%_200MA
HDD_AUX_RST#
USB_FSD13P
USB_FSD13N
E6
E7
USB_FSD13P
USB_FSD13N
USB_FSD12P
USB_FSD12N
F7
E8
USB_FDS12P
USB_FSD12N
USB_HSD11P
USB_HSD11N
H11
J10
USBP11+ 35
USBP11- 35
USB_HSD10P
USB_HSD10N
E11
F11
T74
T69
USB_HSD9P
USB_HSD9N
A11
B11
T189
T188
USB_HSD8P
USB_HSD8N
C10
D10
USBP8+
USBP8-
32
32
USB Connector
USB_HSD7P
USB_HSD7N
G11
H12
USBP7+
USBP7-
24
24
Carama USB
USB_HSD6P
USB_HSD6N
E12
E14
USBP6+
USBP6-
31
31
FINGERPRINT
USB_HSD5P
USB_HSD5N
C12
D12
USBP5+
USBP5-
30
30
Min-Card
USB_HSD4P
USB_HSD4N
B12
A12
USBP4+
USBP4-
30
30
WLAN Min-Card
USB_HSD3P
USB_HSD3N
G12
G14
T59
T64
USB_HSD2P
USB_HSD2N
H14
H15
USBP9+
USBP9-
32
32
USB Connector
USB_HSD1P
USB_HSD1N
A13
B13
USBP1+
USBP1-
31
31
BLUETOOTH
USB_HSD0P
USB_HSD0N
B14
A14
USBP0+
USBP0-
31
31
USB Connector
IMC_GPIO8
IMC_GPIO9
IMC_PWM0/IMC_GPIO10
SCL2/IMC_GPIO11
SDA2/IMC_GPIO12
SCL3_LV/IMC_GPIO13
SDA3_LV/IMC_GPIO14
IMC_PWM1/IMC_GPIO15
IMC_PWM2/IMC_GPO16
IMC_PWM3/IMC_GPO17
A18
B18
F21
D21
F19
E20
E21
E19
D19
E18
IMC_GPIO18
IMC_GPIO19
IMC_GPIO20
IMC_GPIO21
IMC_GPIO22
IMC_GPIO23
IMC_GPIO24
IMC_GPIO25
G20
G21
D25
D24
C25
C24
B25
C23
IMC_GPIO26
IMC_GPIO27
IMC_GPIO28
IMC_GPIO29
IMC_GPIO30
IMC_GPIO31
IMC_GPIO32
IMC_GPIO33
IMC_GPIO34
IMC_GPIO35
IMC_GPIO36
IMC_GPIO37
IMC_GPIO38
IMC_GPIO39
IMC_GPIO40
IMC_GPIO41
B24
B23
A23
C22
A22
B22
B21
A21
D20
C20
A20
B20
B19
A19
D18
C18
H19
H20
H21
F25
IMC_GPIO0
IMC_GPIO1
SPI_CS2#/IMC_GPIO2
IDE_RST#/F_RST#/IMC_GPO3
D22
E24
E25
D23
IMC_GPIO4
IMC_GPIO5
IMC_GPIO6
IMC_GPIO7
CLK_48M_USB 2
R247
11.8K/F_6
T78
T155
T68
T73
NEW CARD
Ver.B Change Port9 to Port2
SB_SCLK2
SB_SDATA2
SB_SCLK3
SB_SDATA3
SB_SCLK2 35
SB_SDATA2 35
T67
T61
SB_GPIO16
SB_GPIO17
SB_GPIO16 16
SB_GPIO17 16
SPI/LPC define
+3.3V_SUS
CN4
SB JTAG
1
2
3
4
5
6
7
8
SB_JTAG_TCK
SB_JTAG_TDO
SB_JTAG_TDI
SB_TEST1
SB_JTAG_RST#
*S/W_JTAG_DEBUG
SB700
31
31
C681
ACZ_RST#_AUDIO_MDC
ACZ_SDIN1
31
22K_4
USB_RCOMP_SB
RSMRST#
BIT_CLK_AUDIO 28
To Modem Board
ACZ_SDOUT
AE18
AD18
AA19
W17
V17
W20
W21
AA18
W18
K1
K2
AA20
Y18
C1
Y19
G5
HD audio
interface is
3.3V voltage
R466
0_4
GPIO10
GPIO6
GPIO4
GPIO0
GPIO39
GPIO40
ACZ_SPKR_R
PCLK_SMB
PDAT_SMB
SB_SMBCLK1
SB_SMBDATA1
CLK_48M_USB
G8
USB MISC
+3.3V_SUS
C8
USB_RCOMP
USB 1.1
SB_TEST2
USBCLK/14M_25M_48M_OSC
USB 2.0
*2.2K_4
Part 4 of 5
SB700
PCI_PME#/GEVENT4#
RI#/EXTEVNT0#
SLP_S2/GPM9#
SLP_S3#
SLP_S5#
PWR_BTN#
PWR_GOOD
SUS_STAT#
TEST2
TEST1
TEST0
GA20IN/GEVENT0#
KBRST#/GEVENT1#
LPC_PME#/GEVENT3#
LPC_SMI#/EXTEVNT1#
S3_STATE/GEVENT5#
SYS_RESET#/GPM7#
WAKE#/GEVENT8#
BLINK/GPM6#
SMBALERT#/THRMTRIP#/GEVENT2#
NB_PWRGD
INTEGRATED uC
R246
E1
E2
H7
F5
G1
H2
H1
K3
H5
H4
H3
Y15
W15
K4
K24
F1
J2
H6
F2
J6
W14
GPIO
PCI_PME#
RI#
SLP_S2
SUSB#
SUSC#
DNBSWON#
SB_PWRGD_IN
SUS_STAT#
SB_TEST2
SB_TEST1
SB_TEST0
GATEA20
RCIN#
SCI#
KBSMI#
PCI_PME#
T149
T57
33
SUSB#
33
SUSC#
33
DNBSWON#
16 SB_PWRGD_IN
10
SUS_STAT#
U27D
ACPI / WAKE UP EVENTS
F12-DELETE R255,R254,R242,R258,R474
INTEGRATED uC
SB_TEST1
USB OC
SB_TEST0
*2.2K_4
HD AUDIO
*2.2K_4
R275
+3.3V
NC only ,Can't be install
R460
27
31
10P/50V/C0G_4
Ver.B Add for EMI
PROJECT : SA8
31
Size
Custom
NB2/RD1
Document Number
Date:
5
Rev
2A
SB700-ACPI/GPIO/USB 2/4
Sheet
1
13
of
46
29
29
SATA_RXN0
SATA_RXP0
C638
C639
SATA_TXP0_C
SATA_TXN0_C
.01U/16V_4
.01U/16V_4
SATA ODD
SATA_TXP4
SATA_TXN4
29
29
SATA_RXN4
SATA_RXP4
SATA_TX1P
SATA_TX1N
T117
T123
SATA_RXN1_C
SATA_RXP1_C
AD11
AE11
SATA_RX1N
SATA_RX1P
AB12
AC12
SATA_TX2P
SATA_TX2N
AE12
AD12
SATA_RX2N
SATA_RX2P
AD13
AE13
SATA_TX3P
SATA_TX3N
.01U/16V_4
.01U/16V_4
SATA_TXP4_C
SATA_TXN4_C
T20
T17
R361
1K/F_4
NOTE:
SATA_RX3N
SATA_RX3P
AE14
AD14
SATA_TX4P
SATA_TX4N
SATA_RX4N
SATA_RX4P
SATA_TXP5_C
SATA_TXN5_C
AB16
AC16
SATA_TX5P
SATA_TX5N
SATA_RXN5_C
SATA_RXP5_C
AE16
AD16
SATA_RX5N
SATA_RX5P
SATA_RBIAS_PN
SATA_X2
SB_SATA_LED#
PLVDD_SATA-10K/F_4
SATA PLL
+3.3V R292
+1.2V_PLLVDD_SATA
POWER
R361 IS 1K 1% FOR 25MHz

XTAL, 4.99K 1% FOR 100MHz
INTERNAL CLOCK
AB14
AC14
AD15
AE15
SATA_X1
PLACE SATA_CAL
RES VERY CLOSE
TO BALL OF SB700
SATA_RX0N
SATA_RX0P
AE10
AD10
C637
C636
R224
AB10
AC10
SATA_TXP1_C
SATA_TXN1_C
T14
T16
SATA_TX0P
SATA_TX0N
T107
T110
SATA PORT 4,5 are

only support IDE
mode
29
29
SB700
AD9
AE9
+3V_XTLVDD_SATA
V12
SATA_CAL
Y12
SATA_X1
AA12
SATA_X2
W11
Part 2 of 5
ATA 66/100/133
SATA_TXP0
SATA_TXN0
AA11
PLLVDD_SATA
W12
XTLVDD_SATA
HW MONITOR
XTLVDD_SATA-- SATA
crystal power
SATA_X1
2
27P/50V/NPO_4
Y1
AA24
AA25
Y22
AB23
Y23
AB24
AD25
AC25
AC24
Y25
Y24
IDE_D0/GPIO15
IDE_D1/GPIO16
IDE_D2/GPIO17
IDE_D3/GPIO18
IDE_D4/GPIO19
IDE_D5/GPIO20
IDE_D6/GPIO21
IDE_D7/GPIO22
IDE_D8/GPIO23
IDE_D9/GPIO24
IDE_D10/GPIO25
IDE_D11/GPIO26
IDE_D12/GPIO27
IDE_D13/GPIO28
IDE_D14/GPIO29
IDE_D15/GPIO30
AD24
AD23
AE22
AC22
AD21
AE20
AB20
AD19
AE19
AC20
AD20
AE21
AB22
AD22
AE23
AC23
G6
D2
D1
F4
F3
LAN_RST#/GPIO13
ROM_RST#/GPIO14
U15
J1
T131
T124
T32
T125
T130
T128
T126
T132
T129
T134
T133
IF THERE IS NO IDE, TEST

POINTS FOR DEBUG BUS
IS MANDATORY
WLAN_RF_OFF#
T120
T112
T116
T122
T109
T114
T121
T115
T108
T111
10K/F_4
BOARD_ID0
R418
*10K/F_4
R183
10K/F_4
BOARD_ID1
R182
*10K/F_4
R408
10K/F_4
BOARD_ID2
R414
*10K/F_4
R407
10K/F_4
BOARD_ID3
R413
*10K/F_4
R420
*10K/F_4
BOARD_ID4
R421
10K/F_4
ROM_RST#
P5
P8
R8
SB_FANTACH0
SB_FANTACH1
PORT_80_PWR_DWN
TEMP_COMM
TEMPIN0/GPIO61
TEMPIN1/GPIO62
TEMPIN2/GPIO63
TEMPIN3/TALERT#/GPIO64
C6
B6
A6
A5
B5
TEMP_COMM
TEMPIN0
TEMPIN1
MB_THRMDA_SB
VIN0/GPIO53
VIN1/GPIO54
VIN2/GPIO55
VIN3/GPIO56
VIN4/GPIO57
VIN5/GPIO58
VIN6/GPIO59
VIN7/GPIO60
A4
B4
C4
D4
D5
D6
A7
B7
Ver.B update XTAL. Cload.
+1.2V
( 1.2V @ 60mA) +1.2V_PLLVDD_SATA
AVDD
F6
AVSS
G7
0 ohm
UMA
M82
M86
ID0
ID1
ID2
ID3
ID4
VIN0
VIN1
VIN2
VIN3
VIN4
VIN5
VIN6
VIN7
T144
FANIN0/GPIO50
FANIN1/GPIO51
FANIN2/GPIO52
SB700
30,34
BT_ON# 31
SB_FANOUT0
SB_FANOUT1
27P/50V/NPO_4
T63
T147
T148
T62
T146
T43
T48
T41
T38
T30
T160
T159
T162
T150
T151
T154
T156
T77
T76
T75
T157
T158
+3.3V
AVDD--H/W monitor
Analog power
SATA_X2
B
R417
BOARD_ID0
BOARD_ID1
BOARD_ID2
BOARD_ID3
BOARD_ID4
M8
M5
M7
XTAL_25MHZ
WLAN_RF_OFF#
FANOUT0/GPIO3
FANOUT1/GPIO48
FANOUT2/GPIO49
R187 10M_6
1
IDE_IORDY
IDE_IRQ
IDE_A0
IDE_A1
IDE_A2
IDE_DACK#
IDE_DRQ
IDE_IOR#
IDE_IOW#
IDE_CS1#
IDE_CS3#
SPI_DI/GPIO12
SPI_DO/GPIO11
SPI_CLK/GPIO47
SPI_HOLD#/GPIO31
SPI_CS#/GPIO32
SATA_ACT#/GPIO67
C267
C266
U27B
SPI ROM
SATA HDD
29
29
+3.3V
PLACE SATA AC COUPLING

CAPS CLOSE TO SB600
SERIAL ATA
SATA PORT 0,1,2,3

can support AHCI
mode
SATA PWR
5mA
+3V_VDD_HWM
C384
*.1U/10V/X5_4
L43
0_6
C387
*2.2U/6.3V_6
77mA
L36
BLM18PG221SN1D
+3.3V
C284
1U/10V/X5_4
C439
.1U/10V/X5_4
+3.3V
( 3.3V @ 1.2mA)
1
SB_SATA_LED#
1mA
+3V_XTLVDD_SATA
L35
BLM18PG221SN1D
SATA_LED#
2
3
34
C286
.1U/10V/X5_4
C318
1U/10V/X5_4
U12
TC7SH08FU
Place near
ball
Ver.B Correct Pin error
PROJECT : SA8
Size
Custom
NB2/RD1
Document Number
Date:
5
Rev
2A
SB700-ACPI/GPIO/USB 2/4
Sheet
1
14
of
46
EC C-07
2/20 Del R465 and Add R237 for SB source.
PLACE ALL THE DECOUPLING CAPS ON

THIS SHEET CLOSE TO SB AS POSSIBLE.
VDD-- S/B CORE power
Y20
AA21
AA22
AE25
VDD33_18_1
VDD33_18_2
VDD33_18_3
VDD33_18_4
C310
1U/10V/X5_4
1U/10V/X5_4
C311
.1U/10V/X5_4
C309
.1U/10V/X5_4
P18
P19
P20
P21
R22
R24
R25
PCIE_VDDR_1
PCIE_VDDR_2
PCIE_VDDR_3
PCIE_VDDR_4
PCIE_VDDR_5
PCIE_VDDR_6
PCIE_VDDR_7
+1.2V_AVDD_SATA
0.2A
L68
BLM18PG221SN1D
C633
10U/6.3V/X5_8
C640
.1U/10V/X5_4
C645
C641
.1U/10V/X5_4
C644
1U/10V/X5_4 1U/10V/X5_4
AA14
AB18
AA15
AA17
AC18
AD17
AE17
AVDD_SATA_1
AVDD_SATA_4
AVDD_SATA_2
AVDD_SATA_3
AVDD_SATA_5
AVDD_SATA_6
AVDD_SATA_7
R237
C341
22U/6.3V/X5
.1U/10V/X5_4
286mA
.1U/10V/X5_4
L41
+1.2V
BLM18PG221SN1D
C343
.1U/50V_6
C349
.1U/50V_6
C353
2.2U/6.3V/X5_6
S5_3.3V_1
S5_3.3V_2
S5_3.3V_3
S5_3.3V_4
S5_3.3V_5
S5_3.3V_6
S5_3.3V_7
S5_1.2V_1
S5_1.2V_2
R498
C702
C339
.1U/10V/X5_4 .1U/10V/X5_4
USB_PHY_1.2V_1
USB_PHY_1.2V_2
A10
B10
0_6
Ver.B
S5_1.2V--1.2V standby power

R467
C693
1U/10V/X5_4
0.2A
+3.3V_S5
C714
10U/6.3V/X5_8
0.22A
G2
G4
0_6
+1.2V_S5
C692
1U/10V/X5_4
+1.2V_USB_PHY_R
+3V_AVDD_USB
L74
A16
B16
C16
D16
D17
E17
F15
F17
F18
G15
G17
G18
BLM18PG221SN1D
C725
C724
10U/6.3V/X5_8
10U/6.3V/X5_8
AVSS_SATA_1
AVSS_SATA_2
AVSS_SATA_3
AVSS_SATA_4
AVSS_SATA_5
AVSS_SATA_6
AVSS_SATA_7
AVSS_SATA_8
AVSS_SATA_9
AVSS_SATA_10
AVSS_SATA_11
AVSS_SATA_12
AVSS_SATA_13
AVSS_SATA_14
AVSS_SATA_15
AVSS_SATA_16
AVSS_SATA_17
AVSS_SATA_18
AVSS_SATA_19
AVSS_SATA_20
A15
B15
C14
D8
D9
D11
D13
D14
D15
E15
F12
F14
G9
H9
H17
J9
J11
J12
J14
J15
K10
K12
K14
K15
AVSS_USB_1
AVSS_USB_2
AVSS_USB_3
AVSS_USB_4
AVSS_USB_5
AVSS_USB_6
AVSS_USB_7
AVSS_USB_8
AVSS_USB_9
AVSS_USB_10
AVSS_USB_11
AVSS_USB_12
AVSS_USB_13
AVSS_USB_14
AVSS_USB_15
AVSS_USB_16
AVSS_USB_17
AVSS_USB_18
AVSS_USB_19
AVSS_USB_20
AVSS_USB_21
AVSS_USB_22
AVSS_USB_23
AVSS_USB_24
V5_VREF--PCI 5V TOLERANCE
0.2A
C699
.1U/10V/X5_4
C709
.1U/10V/X5_4
AVDDTX_0
AVDDTX_1
AVDDTX_2
AVDDTX_3
AVDDTX_4
AVDDTX_5
AVDDRX_0
AVDDRX_1
AVDDRX_2
AVDDRX_3
AVDDRX_4
AVDDRX_5
PLL
+3.3V_S5
AVDDTX--USB Phy
Analog I/O power
USB I/O
For support USB wakeup-->3V_S5
T10
U10
U11
U12
V11
V14
W9
Y9
Y11
Y14
Y17
AA9
AB9
AB11
AB13
AB15
AB17
AC8
AD8
AE8
S5_3.3--3.3v standby power
0.01A
A17
A24
B17
J4
J5
L1
L2
4mA
+5V_VREF
V5_VREF
AE7
AVDDCK_3.3V
J16
+3V_AVDDCK
7mA
AVDDCK_1.2V
K17
+1.2V_AVDDCK
44mA
AVDDC
E9
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
C332
CKVDD_1.2V-- Internal
clock Generator I/O
power
C345
2.2U/6.3V/X5_6
U27E
+1.2V
SB700
C356
L21
L22
L24
L25
0_8
C355
+1.2VALW_R
SATA I/O
AVDD_SATA--SATA phy power

+1.2V
C350
+3VALW_R
3.3V_S5 I/O
22U/6.3V/X5
C312
CORE S5
844mA
BLM18PG221SN1D
C308
C342
POWER
+1.2V_PCIE_VDDR
PCIE_VDDR--PCIE I/O power

L39
CKVDD_1.2V_1
CKVDD_1.2V_2
CKVDD_1.2V_3
CKVDD_1.2V_4
CLKGEN I/O
0.45A
0_8
IDE/FLSH I/O
R213
C333
+1.2V_CKVDD
VDD33_18--3.3V IDE I/O power

1.8V flash memory I/O power
L15
M12
M14
N13
P12
P14
R11
R15
T16
+VDD33_18
+3.3V
+1.2V
VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9
Part 3 of 5
1U/10V/X5_4
VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VDDQ_6
VDDQ_7
VDDQ_8
VDDQ_9
VDDQ_10
VDDQ_11
VDDQ_12
+3V_AVDDC
R412
1K/F_4
1
D19
C643
+5V
2
H18
J17
J22
K25
M16
M17
M21
P16
+3.3V
CH501H-40PT
1U/10V/X5_4
16mA
F9
PCIE_CK_VSS_1
PCIE_CK_VSS_2
PCIE_CK_VSS_3
PCIE_CK_VSS_4
PCIE_CK_VSS_5
PCIE_CK_VSS_6
PCIE_CK_VSS_7
PCIE_CK_VSS_8
AVSSC
SB700
GROUND
.1U/10V/X5_4
.1U/10V/X5_4
L9
M9
T15
U9
U16
U17
V8
W7
Y6
AA4
AB5
AB21
1U/10V/X5_4
C285
A1-2 chip using +1.2V

604mA
1U/10V/X5_4
C281
1U/10V/X5_4
C346
1U/10V/X5_4
C291
1U/10V/X5_4
C307
1U/10V/X5_4
C290
C275
1U/10V/X5_4
C287
.1U/10V/X5_4
C331
1U/10V/X5_4
22U/6.3V/X5
100U/6.3V/TAN_3528
+3.3V_SB_R
C277
CORE S0
0_8
C642
SB700
A-LINK I/O
R409
+3.3V
0.8A
PCI/GPIO I/O
VDDQ--3.3V I/O power
+1.2V_VCC_SB_R
U27C
1U/10V/X5_4
+3.3V_SB_R
PCIE_CK_VSS_9
PCIE_CK_VSS_10
PCIE_CK_VSS_11
PCIE_CK_VSS_12
PCIE_CK_VSS_13
PCIE_CK_VSS_14
PCIE_CK_VSS_15
PCIE_CK_VSS_16
PCIE_CK_VSS_17
PCIE_CK_VSS_18
PCIE_CK_VSS_19
PCIE_CK_VSS_20
PCIE_CK_VSS_21
AVSSCK
Part 5 of 5
A2
A25
B1
D7
F20
G19
H8
K9
K11
K16
L4
L7
L10
L11
L12
L14
L16
M6
M10
M11
M13
M15
N4
N12
N14
P6
P9
P10
P11
P13
P15
R1
R2
R4
R9
R10
R12
R14
T11
T12
T14
U4
U14
V6
Y21
AB1
AB19
AB25
AE1
AE24
P23
R16
R19
T17
U18
U20
V18
V20
V21
W19
W22
W24
W25
L17
SB700
C394
C375
C700
C395
C393
C708
C366
1U/10V/X5_4 1U/10V/X5_4 1U/10V/X5_4 .1U/10V/X5_4 .1U/10V/X5_4 .1U/10V/X5_4 .1U/10V/X5_4
+3.3V_S5
+1.2V_S5
+3V_AVDDC
+1.2V_USB_PHY_R
R485
AVDDC--USB Analog PLL power
USB_PHY_1.2V--USB Phy
digital power
0_6
L48
BLM18PG221SN1D
C383
.1U/10V/X5_4
C701
.1U/10V/X5_4
C710
.1U/10V/X5_4
C390
22U/6.3V/X5
C711
10U/6.3V/X5_8
+1.2V
+1.2V_AVDDCK
L44
BLM18PG221SN1D
+3.3V
AVDDCK_1.2--USB Phy
digital power
C385
2.2U/6.3V/X5_6
L45
BLM18PG221SN1D
+3V_AVDDCK
AVDDCK_3.3--Analog
system PLL power
PROJECT : SA8
C386
2.2U/6.3V/X5_6
Size
Custom
NB2/RD1
Document Number
Date:
5
Rev
2A
SB700-PWR/DECOUPLING 4/4
Sheet
1
15
of
46
16
OVERLAP COMMON PADS WHERE

POSSIBLE FOR DUAL-OP RESISTORS.
It must ready
refore RSMRST#
+3.3V_S5
Ver.B Note
+3.3V
+3.3V
+3.3V_S5
R486
2.2K_4
Mount for Old version of SB700
REQUIRED STRAPS
R432
10K/F_4
R439
10K/F_4
R477
*10K/F_4
13
13
12
12
PCI_CLK4
12
12,27 PCI_CLK3
12
12 PCI_CLK_TPM
12
R441
10K/F_4
PCI_CLK_TPM
C
BOOTFAIL
TIMER
ENABLED
PULL
HIGH
SB_GPIO17
SB_GPIO16
PCI_CLK5
R444
10K/F_4
RTC_CLK
LPC_CLK1
13
R431
*10K/F_4
R436
*10K/F_4
R251
10K/F_4
PCI_CLK3
PCI_CLK4
PCI_CLK5
LPC_CLK0
LPC_CLK1
RTC_CLK
AZ_RST#
USE
DEBUG
STRAPS
RESERVED
RESERVED
ENABLE PCI
MEM BOOT
CLKGEN
ENABLED
INTERNAL
RTC
EC
ENABLED
BOOTFAIL
TIMER
DISABLED
IGNORE
DEBUG
STRAPS
DISABLE PCI CLKGEN

MEM BOOT
DISABLED
DEFAULT
DEFAULT
DEFAULT
DEBUG STRAPS
EXT. RTC
(PD on X1,
apply
32KHz to
RTC_CLK)
DEFAULT
EC
DISABLED
TYPE
GPIO16
GPIO17
FWH
L : 2.2K
pull down
L : 2.2K
pull down
LPC
NC
L : 2.2K
pull down
SPI
L : 2.2K
pull down
NC
NC
NC
RSVD
NB_PWRGD_IN:
RS780/RX780 = 1.8V; RS740 = 3.3V
Do NOT share it with SB_PWRGD when use Internal Clk Gen
(Need SB PLL initialize firstly)
SB700 HAS 15K INTERNAL PU FOR PCI_AD[28:23]

+3.3V
GPIO17
DEFAULT
+3.3V_S5
12,27
12,27
12,27
12,27
12,27
12,27
12,27
12,27
12,27
R488
2.2K_4
R240
10K/F_4
R476
10K/F_4
DEFAULT
PULL
LOW
R487
*2.2K_4
GPIO16
ACZ_RST#
LPC_CLK0
AD31
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
R252
10K/F_4
R249
*10K/F_4
R248
0_4
SB_PWRGD_IN
C367
*2.2U/6.3V_6
SB_PWRGD_IN 13
+1.8V
+1.8V
B
U11
D7
40 VRM_PWRGD
R587
*10K/F_4
R588
*10K/F_4
R589
*10K/F_4
R419
*10K/F_4
R424
*10K/F_4
R423
*10K/F_4
R425
*10K/F_4
R426
*10K/F_4
R430
*10K/F_4
CH501H-40PT
2
CH501H-40PT
2
D8
33
PWROK
NC VCC
GND
C389
R256
*.1U/10V/X5_4
R257
300_4
RX780,RS780
*33_4
NB_PWRGD_IN
NB_PWRGD_IN 10,24
*NL17SZ17DFT2G
SOT-353
R260
*10K/F_4
+1.8V
Use 2.2K PD.

Ver.B Add AD[30..31] Reserved PD.
PCI_AD28
PULL
HIGH
PULL
LOW
0_4
NB/SB POWER GOOD CIRCUIT
PCI_AD27
PCI_AD26
PCI_AD25
PCI_AD24
PCI_AD23
USE
LONG
RESET
USE PCI
PLL
USE ACPI
BCLK
USE IDE
PLL
USE DEFAULT
PCIE STRAPS
RESERVED
DEFAULT
DEFAULT
DEFAULT
DEFAULT
DEFAULT
USE
SHORT
RESET
BYPASS
PCI PLL
BYPASS
ACPI
BCLK
BYPASS IDE
PLL
USE EEPROM
PCIE STRAPS
R261
WD_PWRGD 13
AL17SZ17000
IC(5P) NL17SZ17DFT2G(SOT-353)
SOT-353
ALUC1G17000
IC OTHER(5P) SN74AUC1G17DBVR(SOT23-5)
SOT23-5
PROJECT : SA8
Size
Custom
NB2/RD1
Document Number
Rev
2A
SB700-STRAPS
Date:
5
Sheet
1
16
of
46
+3V_D
U19A
R609
10K/F_4
PART 1 OF 7
PEG_TXP0
PEG_TXN0
9
9
PEG_TXP1
PEG_TXN1
9
9
PEG_TXP2
PEG_TXN2
9
9
PEG_TXP3
PEG_TXN3
9
9
PEG_TXP4
PEG_TXN4
9
9
PEG_TXP5
PEG_TXN5
9
9
PEG_TXP6
PEG_TXN6
9
9
PEG_TXP7
PEG_TXN7
PEG_TXP8
PEG_TXN8
9
9
PEG_TXP9
PEG_TXN9
9
9
PEG_TXP10
PEG_TXN10
9
9
PEG_TXP11
PEG_TXN11
PCIE_RX0P
PCIE_RX0N
PCIE_TX0P
PCIE_TX0N
AG31
AG30
C_PEG_RXP0 .1U/10V/X5_4
C_PEG_RXN0 .1U/10V/X5_4
PEG_TXP1
PEG_TXN1
AJ35
AJ34
PCIE_RX1P
PCIE_RX1N
PCIE_TX1P
PCIE_TX1N
AF31
AF30
C59
C55
PEG_TXP2
PEG_TXN2
AH35
AH34
PCIE_RX2P
PCIE_RX2N
PCIE_TX2P
PCIE_TX2N
AF28
AF27
C49
C50
PEG_TXP3
PEG_TXN3
AG35
AG34
PCIE_RX3P
PCIE_RX3N
PCIE_TX3P
PCIE_TX3N
AD31
AD30
C62
C60
PEG_TXP4
PEG_TXN4
AF33
AE33
PCIE_RX4P
PCIE_RX4N
PCIE_TX4P
PCIE_TX4N
AD28
AD27
C72
C65
PEG_TXP5
PEG_TXN5
AE35
AE34
PCIE_RX5P
PCIE_RX5N
PCIE_TX5P
PCIE_TX5N
AB31
AB30
C73
C76
PEG_TXP6
PEG_TXN6
AD35
AD34
PCIE_TX6P
PCIE_TX6N
AB28
AB27
C92
C96
PEG_TXP7
PEG_TXN7
AC35
AC34
PCIE_TX7P
PCIE_TX7N
AA31
AA30
C88
C78
PEG_TXP8
PEG_TXN8
AB33
AA33
PCIE_RX8P
PCIE_RX8N
PCIE_TX8P
PCIE_TX8N
AA28
AA27
C106
C118
PEG_TXP9
PEG_TXN9
AA35
AA34
PCIE_RX9P
PCIE_RX9N
PCIE_TX9P
PCIE_TX9N
W31
W30
C97
C104
PEG_TXP10
PEG_TXN10
Y35
Y34
PCIE_RX10P
PCIE_RX10N
PCIE_TX10P
PCIE_TX10N
W28
W27
C121
C125
PEG_TXP11
PEG_TXN11
W35
W34
PCIE_RX11P
PCIE_RX11N
PCIE_TX11P
PCIE_TX11N
V31
V30
C128
C134
PEG_TXP12
PEG_TXN12
V33
U33
PCIE_RX12P
PCIE_RX12N
PCIE_TX12P
PCIE_TX12N
V28
V27
C149
C165
PEG_TXP13
PEG_TXN13
U35
U34
PCIE_RX13P
PCIE_RX13N
PCIE_TX13P
PCIE_TX13N
U31
U30
C140
C145
PEG_TXP14
PEG_TXN14
T35
T34
PCIE_RX14P
PCIE_RX14N
PCIE_TX14P
PCIE_TX14N
U28
U27
C181
C185
PEG_TXP15
PEG_TXN15
R35
R34
PCIE_RX15P
PCIE_RX15N
PCIE_TX15P
PCIE_TX15N
R31
R30
C166
C175
PCIE_RX6P
PCIE_RX6N
PCIE_RX7P
PCIE_RX7N
P
C
I
E
X
P
R
E
S
S
C54
C53
PEG_RXP0 9
PEG_RXN0 9
D33
12
PCIE_RST#
PEG_RXP1 9
PEG_RXN1 9
CH501H-40PT
2
CH501H-40PT
2
D34
12
PE_GPIO0
MXM_RST#
PEG_RXP2 9
PEG_RXN2 9
8.5A
PEG_RXP3 9
PEG_RXN3 9
+1.8V_SUS
PEG_RXP4 9
PEG_RXN4 9
C825
E@10u/25V_1206
I
N
T
E
R
F
A
C
E
PEG_RXP5 9
PEG_RXN5 9
PEG_RXP6 9
PEG_RXN6 9
39,41 1.8V_OND
R610
0_6
R611
*0_6
4
C
Q66
33
GPE3
E@FDS8884
D6-Change R610 and R612

P/N to CS00003J951
PEG_RXP7 9
PEG_RXN7 9
+1.8V_M
PEG_RXP8 9
PEG_RXN8 9
C826
0.1U/10V/X5R_4
+1.1V
5A
PEG_RXP9 9
PEG_RXN9 9
1
2
5
6
9
9
AK33
AJ33
PEG_TXP0
PEG_TXN0
5
6
7
8
9
9
3
2
1
9
9
PEG_TXP12
PEG_TXN12
9
9
PEG_TXP13
PEG_TXN13
9
9
PEG_TXP14
PEG_TXN14
9
9
PEG_TXP15
PEG_TXN15
Clock
2 EXT_GFX_CLKP
2 EXT_GFX_CLKN
EXT_GFX_CLKP
EXT_GFX_CLKN
AJ31
AJ30
PCIE_REFCLKP
PCIE_REFCLKN
SM Bus
AK35
AK34
NC_SMB_DATA
NC_SMBCLK
AM32
PERSTB
MXM_RST#
Calibration
PEG_RXP11 9
PEG_RXN11 9
39,41 1.8V_OND
33
GPE3
R612
0_6
R613
*0_6
Q69
E@FDC653N_NL
PEG_RXP10 9
PEG_RXN10 9
+1.1V_M
PEG_RXP12 9
PEG_RXN12 9
PEG_RXP13 9
PEG_RXN13 9
PEG_RXP14 9
PEG_RXN14 9
PEG_RXP15 9
PEG_RXN15 9
+1.1V
PCIE_CALRN
AG26
PCIE_CALRP
AJ27
NC_DRAM_0
NC_DRAM_1
NC_AC_BATT
NC_FAN_TACH
AF3
AG9
AK29
AK14
R66
2K/F_4
PCIE_VDDC
R67
1.27K/F_4
PROJECT : SA8
M86-M
Size
B
NB2/RD1
Document Number
Rev
1A
GFX(PCIE I/F)
Date:
5
C827
0.1U/10V/X5R_4
Sheet
1
17
of
46
F14-DELETE R41
0 ohm
LVDDR
U19B
C57
1U//10V/X5_4 .1U/10V/X5_4
AJ26
AH26
LVDDR_1
LVDDR_2
AK27
AL27
LVDDC_1
LVDDC_2
AM24
AN28
AN21
AN24
AN25
AM22
AP21
AP26
AM27
AR21
AR26
AM26
AJ22
AJ24
LVSSR_1
LVSSR_2
LVSSR_3
LVSSR_4
LVSSR_5
LVSSR_6
LVSSR_7
LVSSR_8
LVSSR_9
LVSSR_10
LVSSR_11
LVSSR_12
LVSSR_13
LVSSR_14
ControlVARY_BL
DIGON
+1.8V_M
L10
LVDDC
BK1608HS220
C36
C47
C43
10U/6.3V/X5_6 1U//10V/X5_4 .1U/10V/X5_4

FOR M8x
INSTALL LVDDR AND LVDDC TO +1.8V(400mA)
WITH THE ONE LVDDC FILTER
DO NOT INSTALL LVDDR FILTER
INSTALL STRAP RESISTOR
LPVDD
BLM15BD121SN1
C39
AL22
AK22
C29
LPVDD
LPVSS
C34
AG7
LVDS_BLON_VGA
AJ6
TXCLK_UP
TXCLK_UN
TXOUT_U0P
TXOUT_U0N
TXOUT_U1P
TXOUT_U1N
TXOUT_U2P
TXOUT_U2N
TXOUT_U3P
TXOUT_U3N
AK24
AL24
AN27
AN26
AP27
AR27
AG24
AH24
AK26
AL26
TXCLK_LP
TXCLK_LN
TXOUT_L0P
TXOUT_L0N
TXOUT_L1P
TXOUT_L1N
TXOUT_L2P
TXOUT_L2N
TXOUT_L3P
TXOUT_L3N
AR22
AP22
AN23
AN22
AP23
AR23
AP24
AR24
AP25
AR25
DISP_ON_VGA
Vendor
Type
Hynix
Qimonda
Samsung
Hynix
Qimonda
Samsung
Hynix
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
16*32
16*32
16*32
32X32
32X32
32X32
16*32
R315
R338
R324
R328
Vendor P/N
700
700
700
700
900
HY5RS123235BFP-14
HYB18H512321BF-14
K4J52324QE-BC14
NA
HYB18H1G321AF-14
NA
HY5RS123235BFP-11
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
C831
C832
22U/6.3V/X5
22U/6.3V/X5
22U/6.3V/X5
22U/6.3V/X5
22U/6.3V/X5
VHAD0
AM9
AL9
VHAD_0
VHAD_1
AJ9
VPHCTL
AL7
AK7
VPCLK0
VIPCLK
AM7
PSYNC
21
PSYNC
21
DVALID
R314
R333
R326
R331
21
21
21
21
21
21
21
T87
RAM_STRAP0
RAM_STRAP1
RAM_STRAP2
RAM_STRAP3
*10K_4
*10K_4
*10K_4
*10K_4
42 GFX_CORE_CNTRL0
21 ALT#_GPIO17
R52
42 GFX_CORE_CNTRL1
20
BBEN
21 SCS#_GPIO22
+3V_D
R39
10K_4
+1.8V(120mA)
C497
C501
VREFG
L1
C622
.1U/10V/X5_4
C17
10U/6.3V/X5_6
BLM15BD121SN1
1U//10V/X5_4
C621
1U//10V/X5_4
+1.1V(300mA)
C623
C472
6.8P/50V/NPO_4
Y3
C479
DPLL_VDDC
C10
C12
.1U/10V/X5_4
R330
1M_4
GPIO_0
GPIO_1
GENERAL
GPIO_2
PURPOSE
GPIO_3
I/O
GPIO_4
GPIO_5
GPIO_6
GPIO_7_BLON
GPIO_8_ROMSO
GPIO_9_ROMSI
GPIO_10_ROMSCK
GPIO_11
GPIO_12
GPIO_13
GPIO_14_HPD2
GPIO_15_PWRCNTL_0
GPIO_16_SSIN
GPIO_17_THERMAL_INT
GPIO_18_HPD3
GPIO_19_CTF
GPIO_20_PWRCNTL_1
GPIO_21_BBEN
GPIO_22_ROMCSB
GPIO_23_CLKREQB
GPIO_24_JMODE
GPIO_25_TDI
GPIO_26_TCK
GPIO_27_TMS
GPIO_28_TDO
GEN_A
GEN_B
GEN_C
GEN_D_HPD4
GEN_E
GEN_F
GEN_G
AM35
A14
B15
AR33
AP33
PCIE_PVDD
MPVDD
MPVSS
PLL
CLOCKS
XTALIN
XTALOUT
AG19
DPLL_VDDC
AG21
TS_FDO
AK4
AM4
DMINUS
DPLUS
M86-M
Ver.B update XTAL.
TXCBM_DPB0P
TXCBP_DPB0N
AR14
AP14
T88
T84
TX3M_DPB1P
TX3P_DPB1N
AR15
AP15
T90
T85
T92
T83
DAC1
DAC2
T91
T86
120 ohm/300mA
TPVDD
L5
C26
AH17
AG17
BLM15BD121SN1
.1U/10V/X5_4
10U/6.3V/X5_6
L7
C28
C33
1U//10V/X5_4
AN18
AP18
AR18
AN16
AN17
AN15
AN11
AN12
AN13
AN14
.1U/10V/X5_4
AG15
AH18
AG18
AG6
+1.1V(200mA)
BLM15BD121SN1 +1.1V_M
+1.1V(200mA)
10U/6.3V/X5_6
L53
C476
1U//10V/X5_4
R47
C38
DPA_VDDR
C473
+1.8V(40mA)
+1.8V_M
C37
DPB_VDDR
.1U/10V/X5_4
10U/6.3V/X5_6
TMDS_HPD 10,23
G
GB
EXT_VGA_GRN
B
BB
AR29
AP29
EXT_VGA_BLU
HSYNC
VSYNC
AN29
AN30
RSET
AN31
AVDD
AR32
EXT_VGA_RED 25
EXT_VGA_RED
R335
150/F_4
EXT_VGA_GRN
R336
150/F_4
EXT_VGA_BLU
R337
150/F_4
EXT_VGA_GRN 25
EXT_VGA_BLU 25
F15-DELETE R40,R42,R43
0 ohm
EXT_HSYNC 21,25
EXT_VSYNC 21,25
R51
499/F_4
AVDD
+1.8V(121mA)
AVSSQ
AP32
VDD1DI
VSS1DI
AR28
AP28
R2
R2B
AM19
AL19
G2
G2B
AM18
AL18
VDD1DI
L56
C494
C482
B2
B2B
AM17
AL17
C
Y
COMP
AK19
AK18
AK17
V2SYNC
H2SYNC
AL15
AM15
V2SYNC
H2SYNC
A2VDD
AM21
A2VDD
A2VDDQ
AL21
A2VDDQ
C503
10U/6.3V/X5_6
+1.8V(85mA)
AVDD
L11
C31
C42
10U/6.3V/X5_6
V2SYNC
H2SYNC
AK21
VDD2DI
VSS2DI
AH22
AG22
R2SET
AJ21
VDD1DI
R60
715/F_4
AM29
AL29
DDC1DAT
DDC1CLK
AJ15
AH15
EXT_LVDS_PNLDAT
EXT_LVDS_PNLCLK
DDC3DATA_DP3_AUXN
DDC3CLK_DP3_AUXP
AJ5
AJ4
DDC4DATA_DP4_AUXN
DDC4CLK_DP4_AUXP
AH14
AG14
.1U/10V/X5_4
+1.8V(48mA)
L4
C21
A2VSSQ
21
21
C44
1U//10V/X5_4
C22
C23
10U/6.3V/X5_6
EXT_CRT_DDCDAT
EXT_CRT_DDCCLK
EXT_LVDS_PNLDAT
EXT_LVDS_PNLCLK
25
25
R37
R24
2.2K_4
2.2K_4
+3V_D
EXT_LVDS_PNLDAT 24
EXT_LVDS_PNLCLK 24
HDMI_SDA 23
HDMI_SCL 23
DDC4DAT
DDC4CLK
T1
T3
+3.3V(135mA)
A2VDD
L9
C30
DDC3,DDC4 ARE 5V TOLERANT ON M8x
1U//10V/X5_4
C35
.1U/10V/X5_4
BLM15BD121SN1 +3V_D
C40
10U/6.3V/X5_6
PROJECT : SA8
Size
C
NB2/RD1
Document Number
Rev
2A
GFX(LVDS, DVI, CRT, TV)
Date:
5
C480
150/F_4
AR30
AP30
DDC
DP AUX DDC2DATA
C32
1U//10V/X5_4
AN19
AN20
AP19
AR19
EXT_VGA_RED
DDC2CLK
THERMAL
Ver.B Correct HDMI P/N connection.
AR31
AP31
DDC1DATA
DDC1CLK
TX2_HDMI_L- 23
TX2_HDMI_L+ 23
AM14
AL14
PCIE_PVDD
DD+
TX1_HDMI_L- 23
TX1_HDMI_L+ 23
AR12
AP12
DVPCNTL__MVP_0
DPA_PVDD
DVPCNTL__MVP_1
DPA_PVSS
DVPCNTL_0
INTEGRATED
DVPCNTL_1
DPB_PVDD
TMDS/DP
DVPCNTL_2
DPB_PVSS
DVPCLK
DVPDATA_0
DPB_VDDR_1
DVPDATA_1 MULTI_GFX
DPB_VDDR_2
DVPDATA_2 EXTERNAL
DPA_VDDR_3
DVPDATA_3 TMDS
DPA_VDDR_4
DVPDATA_4
DVPDATA_5
DPB_VSSR_1
DVPDATA_6
DPB_VSSR_2
DVPDATA_7
DPB_VSSR_3
DVPDATA_8
DPB_VSSR_4
DVPDATA_9
DPB_VSSR_6
DVPDATA_10
DPA_VSSR_5
DVPDATA_11
DPA_VSSR_7
DVPDATA_12
DPA_VSSR_8
DVPDATA_13
DPA_VSSR_9
DVPDATA_14
DPA_VSSR_10
DVPDATA_15
DVPDATA_16
DP_CALR
DVPDATA_17
NC_TPVDDC
DVPDATA_18
NC_TPVSSC
DVPDATA_19
HPD1
DVPDATA_20
DVPDATA_21
DVPDATA_22
R
DVPDATA_23
RB
XTAL_27MHZ
6.8P/50V/NPO_4
21
21
AR11
AP11
TX2M_DPA3P
TX2P_DPA3N
AN8
AP8
AG1
AH3
AH2
AH1
AJ3
AJ2
AJ1
AK2
AK1
AL3
AL2
AL1
AM3
AM2
AN2
AP3
AR3
AN4
AR4
AP4
AN5
AR5
AP5
AP6
AR6
AN7
AP7
AR7
DPLL_PVDD
DPLL_PVSS
DPLL_VDDC
TX1M_DPA2P
TX1P_DPA2N
AR17
AP17
VREFG
XTALI
XTALO
TX0_HDMI_L- 23
TX0_HDMI_L+ 23
TX5M_DPB3P
TX5P_DPB3N
AR20
AP20
2
1
MPVDD
TXC_HDMI_L- 23
TXC_HDMI_L+ 23
AR10
AP10
TX4M_DPB2P
TX4P_DPB2N
DPLL_PVDD
C77
.1U/10V/X5_4
AN9
AN10
TX0M_DPA1P
TX0P_DPA1N
SDA
SCL
AD12
MPVDD
1U//10V/X5_4
L65
BK1608HS220
.1U/10V/X5_4
R71
249/F_4
TXCAM_DPA0P
TXCAP_DPA0N
DVALID
PCIE_PVDD
10U/6.3V/X5_6
+VGA_CORE(414mA)
+1.1V_M
C478
R69
499/F_4
L58
BLM15BD121SN1
+VGA_CORE
C483
.1U/10V/X5_4
10U/6.3V/X5_6
+1.8V_M
C495
+1.8V_M
4
3
+1.8V(40mA)
C504
1U//10V/X5_4
BLM15BD121SN1
10U/6.3V/X5_6
+1.8V_M
R55
*10K_4
DPLL_PVDD
L54
VIP / I2C
AK6
AM6
AG2
AF2
AF1
AE3
AE2
AE1
AD3
AD2
AD1
AD5
AD4
AC3
AC2
AC1
AB3
AB2
AB1
AF5
AF4
GFX_CTF AG4
10K_4
AG3
AD9
AD8
AD7
AB4
AB6
AB7
R56
AB9
AA9
1K_4
AF8
AF7
AG5
AP9
AR9
AP13
AR13
GPIO0
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
T89
SOUT_GPIO8
SIN_GPIO9
SCLK
GPIO11
GPIO12
GPIO13
VIP_0
VIP_1
VIP_2
VIP_3
VIP_4
VIP_5
VIP_6
VIP_7
AR16
AP16
AJ7
+1.8V_M
21
21
21
21
21
21
C830
21
RAM_STRAP0
RAM_STRAP1
RAM_STRAP2
RAM_STRAP3
10K_4
10K_4
10K_4
10K_4
+VGA_CORE
C829
VIP3
24
EXT_LVDS_TXLCK 24
EXT_LVDS_TXLCK# 24
EXT_LVDS_TXL0 24
EXT_LVDS_TXL#0 24
EXT_LVDS_TXL1 24
EXT_LVDS_TXL#1 24
EXT_LVDS_TXL2 24
EXT_LVDS_TXL#2 24
D13
C828
21
24
EXT_LVDS_TXUCK 24
EXT_LVDS_TXUCK# 24
EXT_LVDS_TXU0 24
EXT_LVDS_TXU#0 24
EXT_LVDS_TXU1 24
EXT_LVDS_TXU#1 24
EXT_LVDS_TXU2 24
EXT_LVDS_TXU#2 24
MEM_ID[3:0]
PART 2 OF 7
AM12
AL12
AJ12
AH12
AM10
AL10
AJ10
AH10
M86-M
.1U/10V/X5_4
L8
120 ohm/300mA
1U//10V/X5_4
+1.8V_M
10U/6.3V/X5_6
+1.8V(20mA)
LVDS channel
22 ohm/1A
+1.8V(400mA)
*10K_4
PART 7 OF 7
.1U/10V/X5_4
10U/6.3V/X5_6
C56
.1U/10V/X5_4
C27
M86-M=> LVDDR+LVDDC(400mA)
R54
U19F
BK1608HS220
22 ohm/1A
1U//10V/X5_4
L6
1U//10V/X5_4
+1.8V_M
D
Sheet
1
18
of
46
U19G
U19C
Part 4 of 7
VMA_WDQS[7..0]
22 VMA_WDQS[7..0]
VMA_MA[12..0]
22 VMA_MA[12..0]
22
22
22
VMA_BA0
VMA_BA1
VMA_BA2
VMA_BA0
VMA_BA1
VMA_BA2
+1.8V_M
R365
40.2/F_4
MVREFDA
C598
R366
100/F_4
.1U/10V/X5_4
N35
N34
AM34
MVREFDA
MVREFSA
NC_1
VMA_MA0
VMA_MA1
VMA_MA2
VMA_MA3
VMA_MA4
VMA_MA5
VMA_MA6
VMA_MA7
VMA_MA8
VMA_MA9
VMA_MA10
VMA_MA11
VMA_MA12
VMA_BA2
VMA_BA0
VMA_BA1
DQMAb_0
DQMAb_1
DQMAb_2
DQMAb_3
DQMAb_4
DQMAb_5
DQMAb_6
DQMAb_7
M29
K33
G30
E33
C22
H21
C17
G17
VMA_DM0
VMA_DM1
VMA_DM2
VMA_DM3
VMA_DM4
VMA_DM5
VMA_DM6
VMA_DM7
QSA_0
QSA_1
QSA_2
QSA_3
QSA_4
QSA_5
QSA_6
QSA_7
M30
K34
G31
E34
B22
F21
B17
D17
VMA_RDQS0
VMA_RDQS1
VMA_RDQS2
VMA_RDQS3
VMA_RDQS4
VMA_RDQS5
VMA_RDQS6
VMA_RDQS7
QSA_0B
QSA_1B
QSA_2B
QSA_3B
QSA_4B
QSA_5B
QSA_6B
QSA_7B
M31
K35
G32
E35
A22
E21
A17
E17
VMA_WDQS0
VMA_WDQS1
VMA_WDQS2
VMA_WDQS3
VMA_WDQS4
VMA_WDQS5
VMA_WDQS6
VMA_WDQS7
ODTA0
ODTA1
C31
C25
CLKA0
CLKA1
A33
A26
CLKA0b
CLKA1b
B33
B26
RASA0b
RASA1b
A31
D24
CASA0b
CASA1b
C32
H26
VMA_CLK0
VMA_CLK1
VMA_CLK0#
VMA_CLK1#
RASA0#
RASA1#
CASA0#
CASA1#
CSA0b_0
CSA0b_1
A30
B30
CSA0_0#
CSA0_1#
CSA1b_0
CSA1b_1
G24
H24
CSA1_0#
CSA1_1#
CKEA0
CKEA1
B31
F24
WEA0b
WEA1b
C29
D22
CKEA0
CKEA1
WEA0#
WEA1#
VMB_DQ[63..0]
22 VMB_DQ[63..0]
VMB_DM[7..0]
22 VMB_DM[7..0]
VMB_RDQS[7..0]
22 VMB_RDQS[7..0]
VMB_WDQS[7..0]
22 VMB_WDQS[7..0]
VMB_MA[12..0]
22 VMB_MA[12..0]
22
22
22
VMB_BA0
VMB_BA1
VMB_BA2
VMB_BA0
VMB_BA1
VMB_BA2
VMA_CLK0 22
VMA_CLK1 22
VMA_CLK0# 22
VMA_CLK1# 22
RASA0#
RASA1#
22
22
CASA0#
CASA1#
22
22
+1.8V_M
CSA0_0# 22
CSA0_1# 22
R139
40.2/F_4
CSA1_0# 22
CSA1_1# 22
CKEA0
CKEA1
WEA0#
WEA1#
MVREFDB
22
22
B14
A13
C195
R138
100/F_4
22
22
.1U/10V/X5_4
R50
R57
R58
R68
T2
+1.8V_M
+1.8V_M
1K_4
AM30
4.7K_4
AA8
4.7K_4
AA7
240/F_4 AA5
AH19
MAB_0
MAB_1
MAB_2
MAB_3
MAB_4
MAB_5
MAB_6
MAB_7
MAB_8
MAB_9
MAB_10
MAB_11
MAB_A12
MAB_BA2
MAB_BA0
MAB_BA1
H2
H3
J3
J5
J4
J6
G5
J9
F3
F4
J1
J2
J7
F1
G2
G3
VMB_MA0
VMB_MA1
VMB_MA2
VMB_MA3
VMB_MA4
VMB_MA5
VMB_MA6
VMB_MA7
VMB_MA8
VMB_MA9
VMB_MA10
VMB_MA11
VMB_MA12
VMB_BA2
VMB_BA0
VMB_BA1
DQMBb_0
DQMBb_1
DQMBb_2
DQMBb_3
DQMBb_4
DQMBb_5
DQMBb_6
DQMBb_7
D12
C10
E7
C6
P3
R4
W3
V8
VMB_DM0
VMB_DM1
VMB_DM2
VMB_DM3
VMB_DM4
VMB_DM5
VMB_DM6
VMB_DM7
QSB_0
QSB_1
QSB_2
QSB_3
QSB_4
QSB_5
QSB_6
QSB_7
J14
B10
F9
B6
P2
P8
W2
V6
VMB_RDQS0
VMB_RDQS1
VMB_RDQS2
VMB_RDQS3
VMB_RDQS4
VMB_RDQS5
VMB_RDQS6
VMB_RDQS7
QSB_0B
QSB_1B
QSB_2B
QSB_3B
QSB_4B
QSB_5B
QSB_6B
QSB_7B
H14
A10
E9
A6
P1
P7
W1
V5
VMB_WDQS0
VMB_WDQS1
VMB_WDQS2
VMB_WDQS3
VMB_WDQS4
VMB_WDQS5
VMB_WDQS6
VMB_WDQS7
ODTB0
ODTB1
D2
K5
CLKB0
CLKB1
A3
K1
VMB_CLK0
VMB_CLK1
CLKB0b
CLKB1b
B3
K2
VMB_CLK0#
VMB_CLK1#
RASB0b
RASB1b
D3
K7
RASB0#
RASB1#
CASB0b
CASB1b
C1
K4
CASB0#
CASB1#
CSB0b_0
CSB0b_1
E1
E2
CSB0_0#
CSB0_1#
CSB1b_0
CSB1b_1
L3
M4
CSB1_0#
CSB1_1#
MVREFDB
MVREFSB
CKEB0
CKEB1
E3
K8
CKEB0
CKEB1
TESTEN
TEST_MCLK
TEST_YCLK
MEMTEST
PLLTEST
WEB0b
WEB1b
F2
M6
WEB0#
WEB1#
DQB_0
DQB_1
DQB_2
DQB_3
DQB_4
DQB_5
DQB_6
DQB_7
DQB_8
DQB_9
DQB_10
DQB_11
DQB_12
DQB_13
DQB_14
DQB_15
DQB_16
DQB_17
DQB_18
DQB_19
DQB_20
DQB_21
DQB_22
DQB_23
DQB_24
DQB_25
DQB_26
DQB_27
DQB_28
DQB_29
DQB_30
DQB_31
DQB_32
DQB_33
DQB_34
DQB_35
DQB_36
DQB_37
DQB_38
DQB_39
DQB_40
DQB_41
DQB_42
DQB_43
DQB_44
DQB_45
DQB_46
DQB_47
DQB_48
DQB_49
DQB_50
DQB_51
DQB_52
DQB_53
DQB_54
DQB_55
DQB_56
DQB_57
DQB_58
DQB_59
DQB_60
DQB_61
DQB_62
DQB_63
MEMORY INTERFACE B
VMA_RDQS[7..0]
22 VMA_RDQS[7..0]
C27
B28
B27
G26
F27
E27
D27
J27
E29
C30
E26
A27
G27
D26
C28
B29
H15
G14
E14
D14
H12
G12
F12
D10
B13
C12
B12
B11
C9
B9
A9
B8
J10
H10
F10
D9
G7
G6
F6
D6
C8
C7
B7
A7
B5
A5
C4
B4
M3
M2
N2
N1
R3
R2
T3
T2
M8
M7
P5
P4
R9
R8
R6
U4
U3
U2
U1
V2
Y3
Y2
AA2
AA1
U9
U7
U6
V4
W9
W7
W6
W4
read strobe
VMA_DM[7..0]
22 VMA_DM[7..0]
MAA_0
MAA_1
MAA_2
MAA_3
MAA_4
MAA_5
MAA_6
MAA_7
MAA_8
MAA_9
MAA_10
MAA_11
MAA_A12
MAA_BA2
MAA_BA0
MAA_BA1
VMB_DQ0
VMB_DQ1
VMB_DQ2
VMB_DQ3
VMB_DQ4
VMB_DQ5
VMB_DQ6
VMB_DQ7
VMB_DQ8
VMB_DQ9
VMB_DQ10
VMB_DQ11
VMB_DQ12
VMB_DQ13
VMB_DQ14
VMB_DQ15
VMB_DQ16
VMB_DQ17
VMB_DQ18
VMB_DQ19
VMB_DQ20
VMB_DQ21
VMB_DQ22
VMB_DQ23
VMB_DQ24
VMB_DQ25
VMB_DQ26
VMB_DQ27
VMB_DQ28
VMB_DQ29
VMB_DQ30
VMB_DQ31
VMB_DQ32
VMB_DQ33
VMB_DQ34
VMB_DQ35
VMB_DQ36
VMB_DQ37
VMB_DQ38
VMB_DQ39
VMB_DQ40
VMB_DQ41
VMB_DQ42
VMB_DQ43
VMB_DQ44
VMB_DQ45
VMB_DQ46
VMB_DQ47
VMB_DQ48
VMB_DQ49
VMB_DQ50
VMB_DQ51
VMB_DQ52
VMB_DQ53
VMB_DQ54
VMB_DQ55
VMB_DQ56
VMB_DQ57
VMB_DQ58
VMB_DQ59
VMB_DQ60
VMB_DQ61
VMB_DQ62
VMB_DQ63
write strobe
22 VMA_DQ[63..0]
DQA_0
DQA_1
DQA_2
DQA_3
DQA_4
DQA_5
DQA_6
DQA_7
DQA_8
DQA_9
DQA_10
DQA_11
DQA_12
DQA_13
DQA_14
DQA_15
DQA_16
DQA_17
DQA_18
DQA_19
DQA_20
DQA_21
DQA_22
DQA_23
DQA_24
DQA_25
DQA_26
DQA_27
DQA_28
DQA_29
DQA_30
DQA_31
DQA_32
DQA_33
DQA_34
DQA_35
DQA_36
DQA_37
DQA_38
DQA_39
DQA_40
DQA_41
DQA_42
DQA_43
DQA_44
DQA_45
DQA_46
DQA_47
DQA_48
DQA_49
DQA_50
DQA_51
DQA_52
DQA_53
DQA_54
DQA_55
DQA_56
DQA_57
DQA_58
DQA_59
DQA_60
DQA_61
DQA_62
DQA_63
read strobe
VMA_DQ[63..0]
P27
P28
P31
P32
M27
K29
K31
K32
M33
M34
L34
L35
J33
J34
H33
H34
K27
J29
J30
J31
F29
F32
D30
D32
G33
G34
G35
F34
D34
C34
C35
B34
C24
B24
B23
A23
C21
B21
C20
B20
J22
H22
F22
D21
J19
G19
F19
D19
C19
B19
A19
B18
C16
B16
C15
A15
H18
F18
E18
D18
J17
G15
E15
D15
write strobe
VMA_DQ0
VMA_DQ1
VMA_DQ2
VMA_DQ3
VMA_DQ4
VMA_DQ5
VMA_DQ6
VMA_DQ7
VMA_DQ8
VMA_DQ9
VMA_DQ10
VMA_DQ11
VMA_DQ12
VMA_DQ13
VMA_DQ14
VMA_DQ15
VMA_DQ16
VMA_DQ17
VMA_DQ18
VMA_DQ19
VMA_DQ20
VMA_DQ21
VMA_DQ22
VMA_DQ23
VMA_DQ24
VMA_DQ25
VMA_DQ26
VMA_DQ27
VMA_DQ28
VMA_DQ29
VMA_DQ30
VMA_DQ31
VMA_DQ32
VMA_DQ33
VMA_DQ34
VMA_DQ35
VMA_DQ36
VMA_DQ37
VMA_DQ38
VMA_DQ39
VMA_DQ40
VMA_DQ41
VMA_DQ42
VMA_DQ43
VMA_DQ44
VMA_DQ45
VMA_DQ46
VMA_DQ47
VMA_DQ48
VMA_DQ49
VMA_DQ50
VMA_DQ51
VMA_DQ52
VMA_DQ53
VMA_DQ54
VMA_DQ55
VMA_DQ56
VMA_DQ57
VMA_DQ58
VMA_DQ59
VMA_DQ60
VMA_DQ61
VMA_DQ62
VMA_DQ63
MEMORY INTERFACE A
Part 3 of 7
DRAM_RST
AA4
VMB_CLK0 22
VMB_CLK1 22
VMB_CLK0# 22
VMB_CLK1# 22
RASB0#
RASB1#
22
22
CASB0#
CASB1#
22
22
CSB0_0# 22
CSB0_1# 22
CSB1_0# 22
CSB1_1# 22
MEM_RST#
R62
CKEB0
CKEB1
22
22
WEB0#
WEB1#
22
22
MEM_RST# 22
4.7K_4
M86-M
+1.8V_M
M86-M
DIVIDER RESISTORS
R392
40.2/F_4
R361
40.2/F_4
DIVIDER RESISTORS
DDR2
DDR3
MVREFSB
DDR2
DDR3
MVREF TO 1.8V
100R
40.2R
MVREF TO GND
100R
100R
MVREF Voltage
0.9V
1.28V
MVREFSA
A
C590
R362
100/F_4
.1U/10V/X5_4
MVREF TO 1.8V
100R
40.2R
MVREF TO GND
100R
100R
MVREF Voltage
0.9V
1.28V
0.5*VDDQ
C618
R391
100/F_4
.1U/10V/X5_4
0.5*VDDQ
PROJECT : SA8
0.713*VDDQ
0.713*VDDQ
Size
Custom
NB2/RD1
Document Number
Rev
1A
GFX(MEM I/F 1/2)
Date:
Sheet
1
19
of
46
U19D
U19E
Part 6 of 7
PART 5 OF 7
VDDRHB1
VDDRHB2
VDDRHA1
BLM15BD121SN1
120ohm/300mA
+1.8V_M
L26
C203
.1U/10V/X5_4
VDDRHA2
BLM15BD121SN1
+VBBP
120ohm/300mA
C217
1U//10V/X5_4
VSSRHA_1
VSSRHA_2
B2
L1
VDDRHB_1
VDDRHB_2
C2
L2
VSSRHB_1
VSSRHB_2
W13
AA13
BBN_1
BBN_2
U13
V13
BBP_1
BBP_2
C223
.1U/10V/X5_4
M86-M
+1.8V_M
L61
1U//10V/X5_4
.1U/10V/X5_4
1U//10V/X5_4
1U//10V/X5_4
1U//10V/X5_4
.1U/10V/X5_4
.1U/10V/X5_4
10U/6.3V/X5_6
10U/6.3V/X5_6
M12
M24
P11
P25
10U/6.3V/X5_6
VDDCI_1
VDDCI_2
VDDCI_3
VDDCI_4
C98
C102
1U//10V/X5_4
.1U/10V/X5_4
C67
1U//10V/X5_4
C81
C117
C113
C127
C69
1U//10V/X5_4
B25
B32
C137
C138
C109
C82
1U//10V/X5_4
VDDRHA_1
VDDRHA_2
C75
C101
10U/6.3V/X5_6
1U//10V/X5_4
VDDR5_1
VDDR5_2
A25
A32
Back
Bias
C209
1U//10V/X5_4
AN1
AP1
C99
1U//10V/X5_4
VDDRHA1
VDDRHA2
C154
.1U/10V/X5_4
10U/6.3V/X5_6
C139
C68
C119
C80
C126
1U//10V/X5_4
A2
A34
C3
C5
A4
C18
A21
C23
C11
C13
C14
A18
A11
C26
C33
F35
R7
G10
F15
H17
G21
D29
A29
G1
F14
J15
E19
E22
E24
D7
G9
F26
G29
D33
M5
G4
E10
E12
F17
G18
G22
F30
J35
J18
H19
J21
F7
J12
J24
J26
K30
J32
F33
K6
K9
K14
K15
K17
K18
K19
K21
K22
M28
K3
L33
C90
1U//10V/X5_4
C91
C124
.1U/10V/X5_4
.1U/10V/X5_4
L28
C159
VDDR4_1
VDDR4_2
Memory I/O
Clock
+1.8V_M
C496
AP2
AR2
C100
.1U/10V/X5_4
C505
10U/6.3V/X5_6
VDDR3_1
VDDR3_2
VDDR3_3
VDDR3_4
+1.1V_M
+VGA_CORE
C86
33ohm/3000mA
VDDCI
L17
C131
C135
C136
1U//10V/X5_4
+1.8V(170mA)
AE14
AE15
AF12
AE17
BLM18PG330SN1D
C89
VDDC+VDDCI
0.95~1.1V(20A)
.1U/10V/X5_4
BLM15BD121SN1
1U//10V/X5_4
L57
1U//10V/X5_4
+1.8V_M
C70
.1U/10V/X5_4
P
O
W
E
R
+1.8V_M
C46
C95
1U//10V/X5_4
C71
1U//10V/X5_4
VDD_CT_5
VDD_CT_6
VDD_CT_7
VDD_CT_8
L12
C103
1U//10V/X5_4
+3.3V(60mA)
R11
R25
U11
U25
C74
BLM18PG330SN1D
33ohm/3000mA
1U//10V/X5_4
VDDR3
VDD_CT_1
VDD_CT_2
VDD_CT_3
VDD_CT_4
C79
L55
P33
P34
P35
R27
R28
R29
R32
R33
U29
U32
V29
V32
T33
V34
V35
W29
W32
W33
AA29
AA32
AB29
AB32
Y33
AB34
AB35
AC33
AD29
AD32
AF29
AF32
AD33
AF34
AF35
AG27
AG29
AG32
AG33
AJ29
AJ32
AH33
AL34
AL35
AK32
PCIE_VDDC+1.1V(2A)
.1U/10V/X5_4
BLM15BD121SN1
AA11
AB11
AD10
AF10
10U/6.3V/X5_6
1U//10V/X5_4
L13
+3V_D
C123
C120
1U//10V/X5_4 .1U/10V/X5_4
N13
N15
N18
N21
N23
P14
P17
P19
P22
V18
V21
V23
W14
W17
W19
W22
AA15
AA18
AA21
AA23
AB14
AB17
AB19
AB22
AC13
AC15
AC18
AC21
AC23
AE18
AE22
AE19
AE21
R13
R15
R18
R21
R23
U14
U17
U19
U22
V15
W11
C481
1U//10V/X5_4
C66
10U/6.3V/X5_6
VDDC_1
VDDC_2
VDDC_3
VDDC_4
VDDC_5
VDDC_6
VDDC_7
VDDC_8
VDDC_9
VDDC_10
VDDC_11
VDDC_12
VDDC_13
VDDC_14
VDDC_15
VDDC_16
VDDC_17
VDDC_18
VDDC_19
VDDC_20
VDDC_21
VDDC_22
VDDC_23
VDDC_24
VDDC_25
VDDC_26
VDDC_27
VDDC_28
VDDC_29
VDDC_30
VDDC_31
VDDC_32
VDDC_33
VDDC_34
VDDC_35
VDDC_36
VDDC_37
VDDC_38
VDDC_39
VDDC_40
VDDC_41
VDDC_42
VDDC_43
VDDC_44
C502
1U//10V/X5_4
+1.8V(136mA)
R26
U26
V25
V26
W25
W26
AA25
AD26
AF26
AA26
AB25
AB26
C498
1U//10V/X5_4
.1U/10V/X5_4
VDD_CT
PCIE_VDDC_1
PCIE_VDDC_2
PCIE_VDDC_3
PCIE_VDDC_4
PCIE_VDDC_5
PCIE_VDDC_6
PCIE_VDDC_7
PCIE_VDDC_8
PCIE_VDDC_9
PCIE_VDDC_10
PCIE_VDDC_11
PCIE_VDDC_12
PCIE_VDDR
.1U/10V/X5_4
.1U/10V/X5_4
BLM15BD121SN1
AR34
AL33
AM33
AN33
AN34
AN35
AP34
AP35
.1U/10V/X5_4
C499
C155
.1U/10V/X5_4
.1U/10V/X5_4
1U//10V/X5_4
C157
PCI-Express
10U/6.3V/X5_6
C163
.1U/10V/X5_4
1U//10V/X5_4
C162
.1U/10V/X5_4
1U//10V/X5_4
C274
120ohm/300mA
L16
C144
C161
1U//10V/X5_4
PCIE_VDDR_1
PCIE_VDDR_2
PCIE_VDDR_3
PCIE_VDDR_4
PCIE_VDDR_5
PCIE_VDDR_6
PCIE_VDDR_7
PCIE_VDDR_8
33ohm/3000mA
+1.8V(500mA)
BLM18PG330SN1D
+VGA_CORE
C122
10U/6.3V/X5_6
VDDRHB1
BLM15BD121SN1
120ohm/300mA
B
C614
1U//10V/X5_4
+3.3V
C613
.1U/10V/X5_4
+3.3V
+VBBP
VDDRHB2
BLM15BD121SN1
L14
*BLM18PG221SN1D(220,1.4A)_6
+VGA_CORE
Q1
SI-1 modified -- ADD

power play function
2
Q6
2N7002E
AO3413
3
+1.8V_M
R10
0_4
+3V_D
C58
10U/6.3V/X5_6
+VGA_CORE
Q8
ME2303T1
1
+1.8V_M
C8
C11
1U//10V/X5_4 .1U/10V/X5_4
R61
1
100K/F_4
2
+5V
C9
*1U_4
+3.3V(1.5A)
Q3
PDTC143TT
C141
.1U/10V/X5_4
C142
1U//10V/X5_4
120ohm/300mA
L20
R11
100K_4
+1.8V_M
BBEN
Q7
2N7002E
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
VSS_51
VSS_52
VSS_53
VSS_54
VSS_55
VSS_56
VSS_57
VSS_58
VSS_59
VSS_60
VSS_61
VSS_62
VSS_63
VSS_64
VSS_65
VSS_66
VSS_67
VSS_68
VSS_69
VSS_70
VSS_71
VSS_72
VSS_73
VSS_74
VSS_75
VSS_76
VSS_77
VSS_78
VSS_79
VSS_80
VSS_81
VSS_82
VSS_83
VSS_84
VSS_85
VSS_86
VSS_87
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92
VSS_93
VSS_94
VSS_95
VSS_96
VSS_97
VSS_98
VSS_99
VSS_100
VSS_101
VSS_102
VSS_103
VSS_104
VSS_105
VSS_106
VSS_107
VSS_108
VSS_109
VSS_110
VSS_111
VSS_112
VSS_113
VSS_114
VSS_115
VSS_116
VSS_117
VSS_118
VSS_119
VSS_120
VSS_121
VSS_122
VSS_123
VSS_124
VSS_125
VSS_126
VSS_127
VSS_128
VSS_129
VSS_130
VSS_131
VSS_132
VSS_133
VSS_134
VSS_135
VSS_136
VSS_137
VSS_138
VSS_139
VSS_140
VSS_141
VSS_142
VSS_143
VSS_144
VSS_145
VSS_146
VSS_147
VSS_148
VSS_149
VSS_150
VSS_151
VSS_152
VSS_153
VSS_154
VSS_155
VSS_156
VSS_157
VSS_158
VSS_159
VSS_160
VSS_161
VSS_162
VSS_163
VSS_164
VSS_165
VSS_166
P6
M9
M26
K28
M32
N14
N17
N19
N22
N33
N3
R5
U8
P13
P15
P18
P21
P23
P26
P29
P30
R1
U5
P9
R10
R14
R17
R19
R22
V3
AK9
U10
U15
U18
U21
U23
V7
W8
V10
V14
V17
V19
V22
V1
AK12
V9
W10
W15
W18
W21
W23
AA6
AA10
AA14
AA17
AA19
AA22
AB8
AB10
AB13
AB15
AB18
AB21
AB23
AC14
AC17
AC19
AC22
AF9
AD6
AB5
AD24
W5
AF6
AF14
AF21
AF22
AK10
AF17
AF18
AF19
AA3
AG12
AJ14
AH21
D4
AF15
AG10
AN6
AK15
AJ17
AJ18
AJ19
AF24
AN32
AK3
AN3
AR8
AM1
AK30
V11
MECH_1
MECH_2
MECH_3
A35
AR1
AR35
CORE GND
M86-M
18
PCIE_VSS_1
PCIE_VSS_2
PCIE_VSS_3
PCIE_VSS_4
PCIE_VSS_5
PCIE_VSS_6
PCIE_VSS_7
PCIE_VSS_8
PCIE_VSS_9
PCIE_VSS_10
PCIE_VSS_11
PCIE_VSS_12
PCIE_VSS_13
PCIE_VSS_14
PCIE_VSS_15
PCIE_VSS_16
PCIE_VSS_17
PCIE_VSS_18
PCIE_VSS_19
PCIE_VSS_20
PCIE_VSS_21
PCIE_VSS_22
PCIE_VSS_23
PCIE_VSS_24
PCIE_VSS_25
PCIE_VSS_26
PCIE_VSS_27
PCIE_VSS_28
PCIE_VSS_29
PCIE_VSS_30
PCIE_VSS_31
PCIE_VSS_32
PCIE_VSS_33
PCIE_VSS_34
PCIE_VSS_35
PCIE_VSS_36
PCIE_VSS_37
PCIE_VSS_38
PCIE_VSS_39
PCIE_VSS_40
PCIE_VSS_41
PCIE_VSS_42
PCIE_VSS_43
PCI-Express GND
C158
VDDR1_1
VDDR1_2
VDDR1_3
VDDR1_4
VDDR1_5
VDDR1_6
VDDR1_7
VDDR1_8
VDDR1_9
VDDR1_10
VDDR1_11
VDDR1_12
VDDR1_13
VDDR1_14
VDDR1_15
VDDR1_16
VDDR1_17
VDDR1_18
VDDR1_19
VDDR1_20
VDDR1_21
VDDR1_22
VDDR1_23
VDDR1_24
VDDR1_25
VDDR1_26
VDDR1_27
VDDR1_28
VDDR1_29
Memory I/O
C156
+1.8V_M
C270
C160
1U//10V/X5_4
1U//10V/X5_4
C150
1U//10V/X5_4
C51
10U/6.3V/X5_6
C13
10U/6.3V/X5_6
C257
D
D1
A8
A12
A16
A20
A24
A28
B1
H1
H35
L18
L19
L21
L22
M10
M35
P10
T1
Y1
B35
M1
D35
K10
K12
K24
K26
L14
L15
L17
Core
+1.8V_M
I/O Internal
+1.8V(2.2A)
PROJECT : SA8
Size
C
NB2/RD1
Document Number
Rev
1A
GFX(GPIO, STRAP)
Date:
Sheet
1
20
of
46
+3V_D
CONFIGURATION STRAPS
18
GPIO0
18
GPIO1
18
GPIO2
18
GPIO3
18
GPIO4
18
GPIO5
18
GPIO6
SIN_GPIO9
18
GPIO11
18
GPIO12
18
GPIO13
VIP3
18
VHAD0
DVALID
18
PSYNC
R327
*10K_4
R325
*10K_4
R341
R30
R32
M8x
STRAPS
PIN
H2SYNC
M7x
D
DESCRIPTION OF DEFAULT SETTINGS
BIF_MSI_DIS
VIP1
MESSAGE SIGNAL INTERRUPT ENABLED
NA
BIF_AUDIO_EN
VIP3
ENABLE HD AUDIO (M8x-M)
NA
BIF_64BAR_EN_A
VIP5
64 BIT BARS DISABLED
NA
TX_PWRS_ENB
GPIO0
PCIE FULL TX OUTPUT SWING
TX_DEEMPH_EN
GPIO1
PCIE TRANSMITTER DE-EMPHASIS ENABLED
BIF_DEBUG_ACCESS
GPIO4
DEBUG SIGNALS MUXED OUT
BIF_AUDIO_EN
GPIO8
ENABLE HD AUDIO (M82-S)
RSVD
BIF_GEN2_EN_A
GPIO5
Allows either PCIe 2.5GT/s or 5.0GT/s operation
DISABLE EXTERNAL BIOS ROM
NA
*10K_4
*10K_4
*10K_4
*10K_4
*10K_4
*10K_4
*10K_4
Base on U5 not stuff,

R30 not stuff.
10K_4
BIOS_ROM_EN
GPIO_22_ROMCSB
ROMIDCFG(3:0)
V2SYNC
EC C-12
*10K_4
R343
18,25 EXT_HSYNC
18
*10K_4
R316
R339
18,25 EXT_VSYNC
18
*10K_4
R329
R25
18
R332
R22
18 SCS#_GPIO22
18
*10K_4
R334
18 SOUT_GPIO8
18
R340
RECOMMENDED SETTINGS
0= DO NOT INSTALL RESISTOR
1 = INSTALL 10K RESISTOR
X = DESIGN DEPENDANT
NA = NOT APPLICABLE
RSVD = ATI RESERVED
(DO NOT INSTALL)
STRAP
R21
*10K_4
R49
*10K_4
R45
*10K_4
R29
*10K_4
R28
10K_4
R48
*10K_4
R38
*10K_4
SERIAL ROM TYPE OR MEMORY APERTURE SIZE SELECT
GPIO[13:11,9]
XX X X
X
X X X X
VIP_DEVICE_STRAP_ENA
VSYNC
IGNORE VIP DEVICE STRAPS
BIF_VGA DIS
PSYNC
VGA ENABLED
BIF_HDMI_EN
HSYNC
HDMI ENABLE (SEE NOTE 2)
DEBUG_ I2C_ENABLE
GPIO6
Internal use only
ANY UNUSED
GPIO OR DVP
THAT ARE NOT
CONFIG STRAPS
FOR EXAMPLE
DVPDATA20:23
IN THIS DESIGN
MEM_TYPE
2/20 For M86 HDMI audio issue.
X X X X
MEMORY TYPE,MAKE AND SIZE INFO
X X X X
EEPROM
Thermal Sensor
+3V_D
+3V_D
U5
18
R44
200_6
R53
10K_4
ADDRESS: 9AH
U6
Need to pull-high +3VPCU in M/B side

5,33
5,33
A
18
ABCLK
ABDATA
ALT#_GPIO17
R31
0_4
C41
SCLK
VCC
SDA
DXP
ALERT#
DXN
OVERT#
GND
VCC_TH
R35
10K_4
SIN_GPIO9
18
18
.1U/10V/X5_4
SCLK
SCS#_GPIO22
+3V_D
R8
D+
D+
18
W#
C45
2200P/50V_4
D-
D-
*10K_4
18
HDCP
Enable
Disable
HOLD
R14
*10K_4
VCC
VSS
SOUT_GPIO8 18
*FLASH_M25P10-AVMN6P
C18
*.1U/10V/X5_4
A
PROJECT : SA8
G781-1P8
EC C-10
2/20 Change VGA thermal IC to 781-1P8.
Size
B
NB2/RD1
Document Number
Rev
1A
STRAP & Others
Date:
5
Sheet
1
21
of
46
19
19
VMA_CLK0
VMA_CLK0#
19
19
19
19
19
19
CKEA0
CSA0_0#
RASA0#
CASA0#
WEA0#
MEM_RST#
19
CSA0_1#
J2
J3
RFU1
RFU2
A9
MF_L (MF_H)
D32-D39
D48-D55
D56-D63
D40-D47
19
19
VMA_CLK1
VMA_CLK1#
19
19
19
19
19
CKEA1
CSA1_0#
RASA1#
CASA1#
WEA1#
19
RDQS0(1)
RDQS1(0)
RDQS2(3)
RDQS3(2)
VMA_WDQS4 D2
VMA_WDQS6 D11
VMA_WDQS7 P11
VMA_WDQS5 P2
WDQS0(1)
WDQS1(0)
WDQS2(3)
WDQS3(2)
VMA_DM4
VMA_DM6
VMA_DM7
VMA_DM5
E3
E10
N10
N3
DM0(1)
DM1(0)
DM2(3)
DM3(2)
VMA_BA2
VMA_BA1
VMA_BA0
H10
G9
G4
BA2 (RAS)
BA1 (BA0)
BA0 (BA1)
VMA_MA11
VMA_MA10
VMA_MA9
VMA_MA8
VMA_MA7
VMA_MA6
VMA_MA5
VMA_MA4
VMA_MA3
VMA_MA2
VMA_MA1
VMA_MA0
L4
K2
M9
K11
L9
K10
H11
K9
M4
K3
H2
K4
A11 (A7)
A10 (A8)
A9 (A3)
A8 (A10)
A7 (A11)
A6 (A2)
A5 (A1)
A4 (A0)
A3 (A9)
A2 (A6)
A1 (A5)
A0 (A4)
VMA_CLK1
VMA_CLK1#
J11
J10
CK
CK
CKEA1
CSA1_0#
RASA1#
CASA1#
WEA1#
MEM_RST#
H4
F9
H3
F4
H9
V9
CKE (WE)
CS (CAS)
RAS (BA2)
CAS (CS)
WE (CKE)
RESET
J2
J3
RFU1
RFU2
VMA_MA12
CSA1_1#
CSA1_1#
0_4
V4
SEN
240/F_4
A4
ZQ
VDDA_VMC1
VDDA_VMC2
C651
A1
A12
C1
C4
C9
C12
E1
E4
E9
E12
J4
J9
N1
N4
N9
N12
R1
R4
R9
R12
V1
V12
VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5
VSSQ6
VSSQ7
VSSQ8
VSSQ9
VSSQ10
VSSQ11
VSSQ12
VSSQ13
VSSQ14
VSSQ15
VSSQ16
VSSQ17
VSSQ18
VSSQ19
VSSQ20
B12
B1
B4
B9
D1
D4
D9
D12
G2
G11
L2
L11
P1
P4
P9
P12
T1
T4
T9
T12
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
A3
A10
G1
G12
L1
L12
V3
V10
VSSA1
VSSA2
J1
J12
MF_L (MF_H)
R171
GDDR3-16X32
W : 10mil
L : <0.5"
A9
R429
.1U/10V/X5_4
L72
L70
BLM18PG181SN1D
BLM18PG181SN1D
+1.8V_M
C649
.1U/10V/X5_4
+1.8V_M
C272
C255
C260
C263
C264
1U//10V/X5_4
+1.8V_M
C258
C278
C283
10U/6.3V/X5_6
C269
.1U/10V/X5_4
D8-D15
D0-D7
D16-D23
D24-D31
19
19
VMB_CLK0
VMB_CLK0#
19
19
19
19
19
19
CKEB0
CSB0_0#
RASB0#
CASB0#
WEB0#
MEM_RST#
19
19
VMB_MA12
CSB0_1#
DQ0(DQ8)
DQ1(DQ9)
DQ2(DQ10)
DQ3(DQ11)
DQ4(DQ12)
DQ5(DQ13)
DQ6(DQ14)
DQ7(DQ15)
DQ8(DQ0)
DQ9(DQ1)
DQ10(DQ2)
DQ11(DQ3)
DQ12(DQ4)
DQ13(DQ5)
DQ14(DQ6)
DQ15(DQ7)
DQ16(DQ24)
DQ17(DQ25)
DQ18(DQ26)
DQ19(DQ27)
DQ20(DQ28)
DQ21(DQ29)
DQ22(DQ30)
DQ23(DQ31)
DQ24(DQ16)
DQ25(DQ17)
DQ26(DQ18)
DQ27(DQ19)
DQ28(DQ20)
DQ29(DQ21)
DQ30(DQ22)
DQ31(DQ23)
VMB_RDQS1
VMB_RDQS0
VMB_RDQS2
VMB_RDQS3
D3
D10
P10
P3
RDQS0(1)
RDQS1(0)
RDQS2(3)
RDQS3(2)
VMB_WDQS1 D2
VMB_WDQS0 D11
VMB_WDQS2 P11
VMB_WDQS3 P2
WDQS0(1)
WDQS1(0)
WDQS2(3)
WDQS3(2)
VMB_DM1
VMB_DM0
VMB_DM2
VMB_DM3
E3
E10
N10
N3
DM0(1)
DM1(0)
DM2(3)
DM3(2)
VMB_BA2
VMB_BA1
VMB_BA0
H10
G9
G4
BA2 (RAS)
BA1 (BA0)
BA0 (BA1)
VMB_MA11
VMB_MA10
VMB_MA9
VMB_MA8
VMB_MA7
VMB_MA6
VMB_MA5
VMB_MA4
VMB_MA3
VMB_MA2
VMB_MA1
VMB_MA0
L4
K2
M9
K11
L9
K10
H11
K9
M4
K3
H2
K4
A11 (A7)
A10 (A8)
A9 (A3)
A8 (A10)
A7 (A11)
A6 (A2)
A5 (A1)
A4 (A0)
A3 (A9)
A2 (A6)
A1 (A5)
A0 (A4)
VMB_CLK0
VMB_CLK0#
J11
J10
CK
CK
CKEB0
CSB0_0#
RASB0#
CASB0#
WEB0#
MEM_RST#
H4
F9
H3
F4
H9
V9
CKE (WE)
CS (CAS)
RAS (BA2)
CAS (CS)
WE (CKE)
RESET
J2
J3
RFU1
RFU2
VMB_MA12
CSB0_1#
VREF1
0_4
V4
SEN
240/F_4
A4
ZQ
GDDR3-16X32
.1U/10V/X5_4
VREF2
H12 VMREFB1 C210
VDDA1
VDDA2
K1
K12
.1U/10V/X5_4
W : 10mil
L : <0.5"
VDDA_VMB1
VDDA_VMB2
L34
L27
BLM18PG181SN1D
BLM18PG181SN1D
C222
C252
.1U/10V/X5_4
.1U/10V/X5_4
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
A2
A11
F1
F12
M1
M12
V2
V11
VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
VDDQ10
VDDQ11
VDDQ12
VDDQ13
VDDQ14
VDDQ15
VDDQ16
VDDQ17
VDDQ18
VDDQ19
VDDQ20
VDDQ21
VDDQ22
A1
A12
C1
C4
C9
C12
E1
E4
E9
E12
J4
J9
N1
N4
N9
N12
R1
R4
R9
R12
V1
V12
VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5
VSSQ6
VSSQ7
VSSQ8
VSSQ9
VSSQ10
VSSQ11
VSSQ12
VSSQ13
VSSQ14
VSSQ15
VSSQ16
VSSQ17
VSSQ18
VSSQ19
VSSQ20
B12
B1
B4
B9
D1
D4
D9
D12
G2
G11
L2
L11
P1
P4
P9
P12
T1
T4
T9
T12
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
A3
A10
G1
G12
L1
L12
V3
V10
VSSA1
VSSA2
J1
J12
MF_L (MF_H)
R151
C251
W : 15mil
L : <0.5"
A9
R147
VMREFB1
H1
+1.8V_M
C248
C239
C219
C220
C246
1U//10V/X5_4
+1.8V_M
C249
C241
VMB_DQ35
VMB_DQ32
VMB_DQ34
VMB_DQ33
VMB_DQ36
VMB_DQ37
VMB_DQ39
VMB_DQ38
VMB_DQ49
VMB_DQ50
VMB_DQ48
VMB_DQ51
VMB_DQ55
+1.8V_M
VMB_DQ54
VMB_DQ52
VMB_DQ53
VMB_DQ57
VMB_DQ56
VMB_DQ59
VMB_DQ58
VMB_DQ63
VMB_DQ61
VMB_DQ62
VMB_DQ60
VMB_DQ47
VMB_DQ46
VMB_DQ43
VMB_DQ40
VMB_DQ42
VMB_DQ44
VMB_DQ41
VMB_DQ45
D32-D39
D48-D55
D56-D63
D40-D47
19
19
VMB_CLK1
VMB_CLK1#
19
19
19
19
19
CKEB1
CSB1_0#
RASB1#
CASB1#
WEB1#
19
DQ0(DQ8)
DQ1(DQ9)
DQ2(DQ10)
DQ3(DQ11)
DQ4(DQ12)
DQ5(DQ13)
DQ6(DQ14)
DQ7(DQ15)
DQ8(DQ0)
DQ9(DQ1)
DQ10(DQ2)
DQ11(DQ3)
DQ12(DQ4)
DQ13(DQ5)
DQ14(DQ6)
DQ15(DQ7)
DQ16(DQ24)
DQ17(DQ25)
DQ18(DQ26)
DQ19(DQ27)
DQ20(DQ28)
DQ21(DQ29)
DQ22(DQ30)
DQ23(DQ31)
DQ24(DQ16)
DQ25(DQ17)
DQ26(DQ18)
DQ27(DQ19)
DQ28(DQ20)
DQ29(DQ21)
DQ30(DQ22)
DQ31(DQ23)
D3
D10
P10
P3
RDQS0(1)
RDQS1(0)
RDQS2(3)
RDQS3(2)
VMB_WDQS4 D2
VMB_WDQS6 D11
VMB_WDQS7 P11
VMB_WDQS5 P2
WDQS0(1)
WDQS1(0)
WDQS2(3)
WDQS3(2)
VMB_RDQS4
VMB_RDQS6
VMB_RDQS7
VMB_RDQS5
C236
10U/6.3V/X5_6
C247
.1U/10V/X5_4
B2
B3
C2
C3
E2
F3
F2
G3
B11
B10
C11
C10
E11
F10
F11
G10
M11
L10
N11
M10
R11
R10
T11
T10
M2
L3
N2
M3
R2
R3
T2
T3
C183
.1U/10V/X5_4
+1.8V_M
VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
VDDQ10
VDDQ11
VDDQ12
VDDQ13
VDDQ14
VDDQ15
VDDQ16
VDDQ17
VDDQ18
VDDQ19
VDDQ20
VDDQ21
VDDQ22
A1
A12
C1
C4
C9
C12
E1
E4
E9
E12
J4
J9
N1
N4
N9
N12
R1
R4
R9
R12
V1
V12
VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5
VSSQ6
VSSQ7
VSSQ8
VSSQ9
VSSQ10
VSSQ11
VSSQ12
VSSQ13
VSSQ14
VSSQ15
VSSQ16
VSSQ17
VSSQ18
VSSQ19
VSSQ20
B12
B1
B4
B9
D1
D4
D9
D12
G2
G11
L2
L11
P1
P4
P9
P12
T1
T4
T9
T12
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
A3
A10
G1
G12
L1
L12
V3
V10
VSSA1
VSSA2
J1
J12
H10
G9
G4
BA2 (RAS)
BA1 (BA0)
BA0 (BA1)
L4
K2
M9
K11
L9
K10
H11
K9
M4
K3
H2
K4
A11 (A7)
A10 (A8)
A9 (A3)
A8 (A10)
A7 (A11)
A6 (A2)
A5 (A1)
A4 (A0)
A3 (A9)
A2 (A6)
A1 (A5)
A0 (A4)
VMB_CLK1
VMB_CLK1#
J11
J10
CK
CK
CKEB1
CSB1_0#
RASB1#
CASB1#
WEB1#
MEM_RST#
H4
F9
H3
F4
H9
V9
CKE (WE)
CS (CAS)
RAS (BA2)
CAS (CS)
WE (CKE)
RESET
J2
J3
RFU1
RFU2
A9
MF_L (MF_H)
V4
A4
GDDR3-16X32
A2
A11
F1
F12
M1
M12
V2
V11
VMB_MA11
VMB_MA10
VMB_MA9
VMB_MA8
VMB_MA7
VMB_MA6
VMB_MA5
VMB_MA4
VMB_MA3
VMB_MA2
VMB_MA1
VMB_MA0
240/F_4
VDDA1
VDDA2
K1
K12
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VMB_BA2
VMB_BA1
VMB_BA0
0_4
H12 VMREFD1 C63
VDDA_VMD1
VDDA_VMD2
C61
DM0(1)
DM1(0)
DM2(3)
DM3(2)
R101
VREF2
.1U/10V/X5_4
W : 10mil
L : <0.5"
E3
E10
N10
N3
R100
VMREFD1
H1
W : 15mil
L : <0.5"
VMB_DM4
VMB_DM6
VMB_DM7
VMB_DM5
VMB_MA12
CSB1_1#
CSB1_1#
VREF1
SEN
ZQ
L22
L15
BLM18PG181SN1D
BLM18PG181SN1D
+1.8V_M
C173
.1U/10V/X5_4
+1.8V_M
C115
C87
C229
.1U/10V/X5_4
C273
.1U/10V/X5_4
D3
D10
P10
P3
VDDA1
VDDA2
K1
K12
C646
B2
B3
C2
C3
E2
F3
F2
G3
B11
B10
C11
C10
E11
F10
F11
G10
M11
L10
N11
M10
R11
R10
T11
T10
M2
L3
N2
M3
R2
R3
T2
T3
5.49K/F_4
C85
C133
C164
.1U/10V/X5_4
C265
VMA_RDQS4
VMA_RDQS6
VMA_RDQS7
VMA_RDQS5
H12 VMREFC1
VMB_DQ8
VMB_DQ12
VMB_DQ10
VMB_DQ9
VMB_DQ11
VMB_DQ13
VMB_DQ14
VMB_DQ15
VMB_DQ3
VMB_DQ2
VMB_DQ0
VMB_DQ1
VMB_DQ6
VMB_DQ5
VMB_DQ7
VMB_DQ4
VMB_DQ19
VMB_DQ16
VMB_DQ18
VMB_DQ17
VMB_DQ23
VMB_DQ22
VMB_DQ21
VMB_DQ20
VMB_DQ28
VMB_DQ29
VMB_DQ31
VMB_DQ30
VMB_DQ26
VMB_DQ27
VMB_DQ25
VMB_DQ24
2.37K/F_4
R110
.1U/10V/X5_4
C16
C279
10U/6.3V/X5_6
.1U/10V/X5_4
R106
U20
.1U/10V/X5_4
J1
J12
CKE (WE)
CS (CAS)
RAS (BA2)
CAS (CS)
WE (CKE)
RESET
C254
VREF2
VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
VDDQ10
VDDQ11
VDDQ12
VDDQ13
VDDQ14
VDDQ15
VDDQ16
VDDQ17
VDDQ18
VDDQ19
VDDQ20
VDDQ21
VDDQ22
Normal
+1.8V_M
.1U/10V/X5_4
VSSA1
VSSA2
CK
CK
H4
F9
H3
F4
H9
V9
C253
C262
1U//10V/X5_4
+1.8V_M
C280
W : 15mil
L : <0.5"
A2
A11
F1
F12
M1
M12
V2
V11
5.49K/F_4
.1U/10V/X5_4
A3
A10
G1
G12
L1
L12
V3
V10
J11
J10
CKEA0
CSA0_0#
RASA0#
CASA0#
WEA0#
MEM_RST#
C261
H1 VMREFC1
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
R167
.1U/10V/X5_4
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VMA_CLK0
VMA_CLK0#
C259
Normal
2.37K/F_4
.1U/10V/X5_4
B12
B1
B4
B9
D1
D4
D9
D12
G2
G11
L2
L11
P1
P4
P9
P12
T1
T4
T9
T12
+1.8V_M
Channel B-2
R175
.1U/10V/X5_4
+1.8V_M
VREF1
+1.8V_M
U23
.1U/10V/X5_4
BLM18PG181SN1D
BLM18PG181SN1D
DQ0(DQ8)
DQ1(DQ9)
DQ2(DQ10)
DQ3(DQ11)
DQ4(DQ12)
DQ5(DQ13)
DQ6(DQ14)
DQ7(DQ15)
DQ8(DQ0)
DQ9(DQ1)
DQ10(DQ2)
DQ11(DQ3)
DQ12(DQ4)
DQ13(DQ5)
DQ14(DQ6)
DQ15(DQ7)
DQ16(DQ24)
DQ17(DQ25)
DQ18(DQ26)
DQ19(DQ27)
DQ20(DQ28)
DQ21(DQ29)
DQ22(DQ30)
DQ23(DQ31)
DQ24(DQ16)
DQ25(DQ17)
DQ26(DQ18)
DQ27(DQ19)
DQ28(DQ20)
DQ29(DQ21)
DQ30(DQ22)
DQ31(DQ23)
5.49K/F_4
.1U/10V/X5_4
VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5
VSSQ6
VSSQ7
VSSQ8
VSSQ9
VSSQ10
VSSQ11
VSSQ12
VSSQ13
VSSQ14
VSSQ15
VSSQ16
VSSQ17
VSSQ18
VSSQ19
VSSQ20
A11 (A7)
A10 (A8)
A9 (A3)
A8 (A10)
A7 (A11)
A6 (A2)
A5 (A1)
A4 (A0)
A3 (A9)
A2 (A6)
A1 (A5)
A0 (A4)
ZQ
L71
L37
B2
B3
C2
C3
E2
F3
F2
G3
B11
B10
C11
C10
E11
F10
F11
G10
M11
L10
N11
M10
R11
R10
T11
T10
M2
L3
N2
M3
R2
R3
T2
T3
R202
.1U/10V/X5_4
A1
A12
C1
C4
C9
C12
E1
E4
E9
E12
J4
J9
N1
N4
N9
N12
R1
R4
R9
R12
V1
V12
BA2 (RAS)
BA1 (BA0)
BA0 (BA1)
SEN
VDDA_VMA1
VDDA_VMA2
VMA_DQ34
VMA_DQ35
VMA_DQ32
VMA_DQ33
VMA_DQ37
VMA_DQ36
VMA_DQ38
VMA_DQ39
VMA_DQ48
VMA_DQ50
VMA_DQ49
VMA_DQ51
VMA_DQ53
VMA_DQ54
VMA_DQ55
VMA_DQ52
VMA_DQ58
VMA_DQ57
VMA_DQ59
VMA_DQ56
VMA_DQ60
VMA_DQ61
VMA_DQ63
VMA_DQ62
VMA_DQ45
VMA_DQ43
VMA_DQ42
VMA_DQ46
VMA_DQ41
VMA_DQ40
VMA_DQ44
VMA_DQ47
0.7*VDDQ
.1U/10V/X5_4
VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
VDDQ10
VDDQ11
VDDQ12
VDDQ13
VDDQ14
VDDQ15
VDDQ16
VDDQ17
VDDQ18
VDDQ19
VDDQ20
VDDQ21
VDDQ22
L4
K2
M9
K11
L9
K10
H11
K9
M4
K3
H2
K4
A4
.1U/10V/X5_4
.1U/10V/X5_4
A2
A11
F1
F12
M1
M12
V2
V11
H10
G9
G4
240/F_4
K1
K12
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VMA_MA11
VMA_MA10
VMA_MA9
VMA_MA8
VMA_MA7
VMA_MA6
VMA_MA5
VMA_MA4
VMA_MA3
VMA_MA2
VMA_MA1
VMA_MA0
R177
C629
C282
C650
.1U/10V/X5_4 .1U/10V/X5_4
VMA_BA2
VMA_BA1
VMA_BA0
V4
H12 VMREFA1
W : 10mil
L : <0.5"
VDDA1
VDDA2
DM0(1)
DM1(0)
DM2(3)
DM3(2)
0_4
Normal
U25
2.37K/F_4
.1U/10V/X5_4
VREF2
E3
E10
N10
N3
R428
.1U/10V/X5_4
W : 15mil
L : <0.5"
VMA_DM1
VMA_DM0
VMA_DM2
VMA_DM3
VMA_MA12
CSA0_1#
5.49K/F_4
C648
.1U/10V/X5_4
WDQS0(1)
WDQS1(0)
WDQS2(3)
WDQS3(2)
R435
.1U/10V/X5_4
VMA_WDQS1 D2
VMA_WDQS0 D11
VMA_WDQS2 P11
VMA_WDQS3 P2
VMREFA1
.1U/10V/X5_4
RDQS0(1)
RDQS1(0)
RDQS2(3)
RDQS3(2)
0.7*VDDQ
H1
Channel B-1
R195
.1U/10V/X5_4
D8-D15
D0-D7
D16-D23
D24-D31
D3
D10
P10
P3
VREF1
.1U/10V/X5_4
VMA_RDQS1
VMA_RDQS0
VMA_RDQS2
VMA_RDQS3
DQ0(DQ8)
DQ1(DQ9)
DQ2(DQ10)
DQ3(DQ11)
DQ4(DQ12)
DQ5(DQ13)
DQ6(DQ14)
DQ7(DQ15)
DQ8(DQ0)
DQ9(DQ1)
DQ10(DQ2)
DQ11(DQ3)
DQ12(DQ4)
DQ13(DQ5)
DQ14(DQ6)
DQ15(DQ7)
DQ16(DQ24)
DQ17(DQ25)
DQ18(DQ26)
DQ19(DQ27)
DQ20(DQ28)
DQ21(DQ29)
DQ22(DQ30)
DQ23(DQ31)
DQ24(DQ16)
DQ25(DQ17)
DQ26(DQ18)
DQ27(DQ19)
DQ28(DQ20)
DQ29(DQ21)
DQ30(DQ22)
DQ31(DQ23)
.1U/10V/X5_4
B2
B3
C2
C3
E2
F3
F2
G3
B11
B10
C11
C10
E11
F10
F11
G10
M11
L10
N11
M10
R11
R10
T11
T10
M2
L3
N2
M3
R2
R3
T2
T3
+1.8V_M
.1U/10V/X5_4
Normal
U24
VMA_DQ11
VMA_DQ13
VMA_DQ8
VMA_DQ10
VMA_DQ9
VMA_DQ12
VMA_DQ15
VMA_DQ14
VMA_DQ2
VMA_DQ7
VMA_DQ6
VMA_DQ3
VMA_DQ4
VMA_DQ5
VMA_DQ1
VMA_DQ0
VMA_DQ23
VMA_DQ18
VMA_DQ19
VMA_DQ21
VMA_DQ22
VMA_DQ20
VMA_DQ16
VMA_DQ17
VMA_DQ30
VMA_DQ25
VMA_DQ26
VMA_DQ28
VMA_DQ27
VMA_DQ29
VMA_DQ24
VMA_DQ31
2.37K/F_4
.1U/10V/X5_4
Channel A-2
R434
.1U/10V/X5_4
Channel A-1
.1U/10V/X5_4
.1U/10V/X5_4
C244
10U/6.3V/X5_6
+1.8V_M
C171
10U/6.3V/X5_6
C
C83
C84
.1U/10V/X5_4
.1U/10V/X5_4
GDDR3-16X32
+1.8V_M
+1.8V_M
+1.8V_M
+1.8V_M
VMA_CLK0
R179
60.4/F_4
VMA_CLK0# R181
60.4/F_4
RASA0#
121_4
VMB_CLK0
VMA_CLK1
19 VMA_DQ[63..0]
19 VMA_DM[7..0]
19 VMA_WDQS[7..0]
19 VMA_RDQS[7..0]
VMA_DQ[63..0]
VMA_DM[7..0]
VMA_WDQS[7..0]
VMA_RDQS[7..0]
CSA0_0#
CKEA0
WEA0#
CASA0#
19 VMA_MA[12..0]
19
19
19
VMA_BA2
VMA_BA1
VMA_BA0
R166
R398
R397
R399
R161
R205
60.4/F_4
VMA_CLK1# R206
60.4/F_4
CKEA1
R155
121_4
CSA1_0#
R154
121_4
CASA1#
R150
121_4
WEA1#
R153
121_4
RASA1#
R146
121_4
19 VMB_DQ[63..0]
19 VMB_DM[7..0]
19 VMB_WDQS[7..0]
121_4
19 VMB_RDQS[7..0]
121_4
121_4
19 VMB_MA[12..0]
121_4
VMA_MA[12..0]
19
19
19
VMA_BA2
VMA_BA1
VMA_BA0
VMB_BA2
VMB_BA1
VMB_BA0
R136
60.4/F_4
VMB_CLK1
R63
60.4/F_4
VMB_CLK0# R137
60.4/F_4
VMB_CLK1# R64
60.4/F_4
CKEB0
R132
121_4
CKEB1
R70
121_4
CSB0_0#
R141
121_4
CSB1_0#
R72
121_4
WEB0#
R133
121_4
WEB1#
R74
121_4
VMB_MA[12..0]
RASB0#
R130
121_4
RASB1#
R98
121_4
VMB_BA2
VMB_BA1
VMB_BA0
CASB0#
R131
121_4
CASB1#
R97
121_4
VMB_DQ[63..0]
VMB_DM[7..0]
VMB_WDQS[7..0]
VMB_RDQS[7..0]
PROJECT : SA8
Size
Custom
NB2/RD1
Document Number
Rev
1A
VRAM*4 (GDDR3)
Date:
Sheet
1
22
of
46
UMA AND DISCRETE SELECT

RP2
HDMI HPD SENSE

TMDS_HPD
R310
18
18
20K/F_4 HDMI_DET
RP3
D2
HDMI_SCLK
HDMI_SDATA
2
4
*0_4P2R
1
3
10 HDMI_DDC_CLK
10 HDMI_DDC_DATA
R309
100K_4
2
4
UDZS2.7BTE-17
0_4P2R
1
3
HDMI_SCL
HDMI_SDA
10,18 TMDS_HPD
SA8 not support HDMI hybrid

UMA
Hybrid
PR2
PR3
HDMI PORT
CN14
TX2_HDMI+
TX2_HDMITX1_HDMI+
From RS780M
For UMA
9 C_PEG_TX#14
9 C_PEG_TX14
9 C_PEG_TX#13
9 C_PEG_TX13
9 C_PEG_TX#12
9 C_PEG_TX12
C_PEG_TX#15 C595
C_PEG_TX15
C592
C_PEG_TX#14 C581
C_PEG_TX14
C575
C_PEG_TX#13 C571
C_PEG_TX13
C564
C_PEG_TX#12 C577
C_PEG_TX12
C574
for Layout
concern
,placement close
HDMI conn
*.1U/10V/X5_4 TX2_HDMI-L RP35

TX2_HDMI+L
*.1U/10V/X5_4
TX1_HDMI+L
*.1U/10V/X5_4
TX0_HDMI+L
*.1U/10V/X5_4
*.1U/10V/X5_4 TXC_HDMI-L RP1
TXC_HDMI+L
*.1U/10V/X5_4
TX0_HDMITXC_HDMI+
D8-Delete C4 and
C5 for HDMI issue.
3
1
4 *0_4P2R
2
TX2_HDMITX2_HDMI+
1
3
2 *0_4P2R
4
TX1_HDMITX1_HDMI+
3
1
4 *0_4P2R
2
TX0_HDMITX0_HDMI+
3
1
4 *0_4P2R
2
TXC_HDMITXC_HDMI+
.1U/10V/X5_4
.1U/10V/X5_4
TX2_HDMITX2_HDMI+
18 TX1_HDMI_L18 TX1_HDMI_L+
TX1_HDMI_L- C486
TX1_HDMI_L+ C487
.1U/10V/X5_4
.1U/10V/X5_4
TX1_HDMITX1_HDMI+
TX0_HDMI_L- C491
TX0_HDMI_L+ C490
.1U/10V/X5_4
.1U/10V/X5_4
TX0_HDMITX0_HDMI+
18 TXC_HDMI_L18 TXC_HDMI_L+
TXC_HDMI_L- C484
TXC_HDMI_L+ C485
.1U/10V/X5_4
.1U/10V/X5_4
TXC_HDMITXC_HDMI+
C469
TX2_HDMI+
499/F_4
TX2_HDMI-
R322
499/F_4
TX1_HDMI+
0 ohm
F29
for Layout
concern
,placement close
HDMI conn
+5V_HDMVCC
D12
+5V_HDMVCC
D12
D4
CH501H-40PT
1
499/F_4
R320
LAYOUT must support

connectors from JAE,
Molex, and Acon
HDMI_DET
R115
*0_6
R319
22
23
*.1U/10V/X5_4
TX2_HDMI_L- C489
TX2_HDMI_L+ C488
Q4
2N7002E
2
+5V_HDMVCC
FUSE_1A_6V_POLY
2
1
F1
+5V
F16-DELETE L2,L3
+5V
HDMI_SCLK
HDMI_SDATA
20
21
CONN_HDMI
From M86 for Hybrid

C
TXC_HDMI-
9 C_PEG_TX#15
9 C_PEG_TX15
TX1_HDMITX0_HDMI+
for Layout
concern
,placement close
north bridge
D2+
D2 Shield
D2D1+
D1 Shield
D1- SHELL1
D0+ SHELL2
D0 Shield
D0- SHELL3
CK+ SHELL4
CK Shield
CKCE Remote
NC
DDC CLK
DDC DATA
GND
+5V
HP DET
R120
*0_6
D5
CH501H-40PT
TX2_HDMI-
R311
180/F_4
TX2_HDMI+
TX1_HDMI-
R313
180/F_4
TX1_HDMI+
TX0_HDMI-
R312
180/F_4
TX0_HDMI+
TXC_HDMI-
R9
*100/F_4
TXC_HDMI+
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
R23
2K/F_4
R26
2K/F_4
RS780M put 750 ohm CS17502FB19

R323
499/F_4
TX1_HDMI-
R317
499/F_4
TX0_HDMI+
R318
499/F_4
TX0_HDMI-
R20
499/F_4
TXC_HDMI+
R19
499/F_4
TXC_HDMI-
DIS M86M put 499 ohm CS14992FB24

HDMI_SCLK
HDMI_SDATA
D
R33
1
2
100K_4
Close to HDMI Connector

Close to HDMI Connector
PROJECT : SA8
DDC4 is 5V tolerance , the

MOSFET level shifter no
need
Size
B
NB2/RD1
Date:
Document Number
Rev
2A
HDMI CONN
Sheet
23
8
of
46
+1.8V
+1.8V
10
10
LB_DATAP1
LB_DATAN1
10
10
LB_DATAP2
LB_DATAN2
36
35
2B1
3B1
LB_DATAP1
LB_DATAN1
29
28
4B1
5B1
LB_DATAP2
LB_DATAN2
27
26
6B1
7B1
42
40
30
20
18
13
8
5
.1U/10V/X5_4
BLM21PG600SN1D
C493
.1U/10V/X5_4
C600
.1U/50V_6
A0
A1
2
3
TXUCLKOUT+
TXUCLKOUT-
A2
A3
6
7
TXUOUT0+
TXUOUT0-
32
31
A4
A5
11
12
TXUOUT1+
TXUOUT1-
2B2
3B2
18 EXT_LVDS_TXU1
18 EXT_LVDS_TXU#1
25
24
4B2
5B2
A6
A7
15
16
TXUOUT2+
TXUOUT2-
18 EXT_LVDS_TXU2
18 EXT_LVDS_TXU#2
23
22
TXUOUT0TXUOUT0+
+3.3V
*33P/50V/NPO_4
R574
4.7K_4
TXUOUT1TXUOUT1+
*33P/50V/NPO_4
R575
4.7K_4
TXUCLKOUTTXUCLKOUT+
Q44
2N7002E
+3.3V
Q45
2N7002E
10 LVDS_BLON_NB
TXLOUT0TXLOUT0+
LVDS_BLON
Q46
2N7002E
TXLOUT1TXLOUT1+
TXLOUT2TXLOUT2+
C597
.1U/10V/X5_4
PX-PI2PCIE412-D
10
33
DPST_PWM
PWM_INV
R105
*0_4
L23
0_4
PWM_INV_1
L60
0_4
FPBACK_1
Inverter Wired OR
value from 0/100kohm to 6.8k/10k to allow LVDS_SEL is 1.8V swing
TXLCLKOUTTXLCLKOUT+
PWM_INV_2
4
FPBACK
Rev.C : Modify resistor divider R34/R27
C602
TXUOUT2TXUOUT2+
L : A-->B1
H: A-->B2
+3.3V
SEL
C169
USBP7+
USBP7-
DMIC0
DMIC_CLK
C603
GND08
GND07
GND06
GND05
GND04
GND03
GND02
GND01
GND00
R27
10K_4
GND-THERMAL
GPIO2:
C170
1000P/16V_4
18 LVDS_BLON_VGA
41
39
21
19
17
14
10
4
1
LVDS_SEL
6.8K_4
13
13
28
28
1000P/16V_4
43
R34
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
EDIDCLK
EDIDDATA
0B2
1B2
6B2
7B2
LCDVCC_1
R370
BLM21PG600SN1D
34
33
10U/6.3V/X5_8
.1U/10V/X5_4
.01U/16V_4
LCDVCC
+3.3V
18 EXT_LVDS_TXU0
18 EXT_LVDS_TXU#0
C605
C168
C167
Ver.B Update
.1U/10V/X5_4
F17-DELETE C601,R363,R364
PI2PCIE412-D
18 EXT_LVDS_TXUCK
18 EXT_LVDS_TXUCK#
LCDVCC_1
VIN_BLIGHT
C601
*10U/25V/X6_1206
U21
TC7SH08FU
+1.8V
R107
R373
+5V
+5V_SUS
0_4
*0_4
VIN_BLIGHT
C172
47P/50V/NPO_4
+1.8V
20mil
G_0
0B1
1B1
LB_DATAP0
LB_DATAN0
C475
C20
.1U/10V/X5_4
G_1
T
O
G_2
P
A
N
E
A
L
G_3
G_4
G_5
LB_CLK
LB_CLK#
LB_DATAP0
LB_DATAN0
R375
+PWR_SRC
C19
C510
.1U/10V/X5_4
10
10
10
10
38
37
VDD8
VDD7
VDD6
VDD5
VDD4
VDD3
VDD2
VDD1
U14
LB_CLK
LB_CLK#
CN2
CONN_LVDS
C15
6B1
7B1
18 EXT_LVDS_TXLCK
18 EXT_LVDS_TXLCK#
34
33
0B2
1B2
18 EXT_LVDS_TXL0
18 EXT_LVDS_TXL#0
32
31
2B2
3B2
18 EXT_LVDS_TXL1
18 EXT_LVDS_TXL#1
25
24
4B2
5B2
18 EXT_LVDS_TXL2
18 EXT_LVDS_TXL#2
23
22
LA_DATAP2
LA_DATAN2
LA_DATAP2
LA_DATAN2
6B2
7B2
A0
A1
2
3
TXLCLKOUT+
TXLCLKOUT-
A2
A3
6
7
TXLOUT0+
TXLOUT0-
A4
A5
11
12
A6
A7
15
16
Q48
2N7002E
Q49
2N7002E
+3.3V_ALW
2
NB_PWRGD_5V
TXLOUT1+
TXLOUT1-
Q45,Q48
UMA
Hybrid
LCDVcc Wired OR
TXLOUT2+
TXLOUT2-
R59
330K_4
D6
LVDS_BLON
R65
1K_4
FPBACK
MXLID#
R603
*2N7002W-7-F *2K/F_4
C64
47P/50V/NPO_4
C52
C48
12
SW3
SWITCH_LID
FPBACK#
+3.3V_ALW
1
3
0_4
Rev.C: Gate terminal on both Q50 and Q51 must be changed from +3.3V to +3V_D
.1U/10V/X5_4
1000P/50V_4
Q5
PDTC144EU
GND08
GND07
GND06
GND05
GND04
GND03
GND02
GND01
GND00
GND-THERMAL
33
SW1010CPT
Q60
R604
41
39
21
19
17
14
10
4
1
SEL
Q47
2N7002E
10 DISP_ON_NB
MXLID#
43
LCD CONNECTOR(Include WEB CAM function)
R577
4.7K_4
DISP_ON
PI2PCIE412-D
LVDS_SEL
R576
4.7K_4
18 DISP_ON_VGA
27
26
10
10
+3.3V
4B1
5B1
+3.3V
2B1
3B1
29
28
LA_DATAP1
LA_DATAN1
.1U/10V/X5_4
36
35
LA_DATAP1
LA_DATAN1
LA_DATAP0
LA_DATAN0
10
10
.1U/10V/X5_4
LA_DATAP0
LA_DATAN0
10
10
.1U/10V/X5_4
0B1
1B1
C14
C500
.1U/10V/X5_4
38
37
LA_CLK
LA_CLK#
VDD8
VDD7
VDD6
VDD5
VDD4
VDD3
VDD2
VDD1
U15
LA_CLK
LA_CLK#
10
10
C509
C477
.1U/10V/X5_4
42
40
30
20
18
13
8
5
+3V_D
+3V_D
EC C-05
PX-PI2PCIE412-D
2/20 Change LID switch to Hall IC.
Pull-High at NB page
2
18 EXT_LVDS_PNLCLK
EXT_LVDS_PNLCLK
EDIDCLK
1
3
2N7002E
2
4
Q50
between NB & VGA
EXT_LVDS_PNLDAT
18 EXT_LVDS_PNLDAT
INT_LVDS_PNLCLK 10
INT_LVDS_PNDAT 10
0_4P2R
RP53
Q51
EDIDDATA
PR53
2N7002E
Q50,Q51
UMA NC
BACKLIGHT CONTROL
UMA
Hybrid
Pull-High at VGA page
40 mil
+12V_ALW
+3.3V
+5V
+3.3V
C611
.1U/10V/X5_4
1
2
5
6
R351
330K_4
R605
*100K_4
+5V_SUS
Q32
AO6402
LCDVCC
Q61
NB_PWRGD_5V
C824
*1U//10V/X5_4
R367
47_8
C606
2
Q29
PDTC144EU
Q31
2N7002W-7-F
C609
.1U/10V/X5_4
10U/6.3V/X5_8
RN6
4
2
3 *0X2
1
LB_CLK#
LB_CLK
TXUOUT0TXUOUT0+
RN10
4
2
3 *0X2
1
LB_DATAN0
LB_DATAP0
TXUOUT1TXUOUT1+
RN15
4
2
3 *0X2
1
LB_DATAN1
LB_DATAP1
TXUOUT2TXUOUT2+
RN16
4
2
3 *0X2
1
LB_DATAN2
LB_DATAP2
LB_CLK# 10
LB_CLK 10
LB_DATAN0 10
LB_DATAP0 10
LB_DATAN1 10
LB_DATAP1 10
LB_DATAN2 10
LB_DATAP2 10
UMA
TXLCLKOUTTXLCLKOUT+
RN8
4
2
3 *0X2
1
LA_CLK#
LA_CLK
TXLOUT0TXLOUT0+
RN14 4
2
3 *0X2
1
LA_DATAN0
LA_DATAP0
TXLOUT1TXLOUT1+
RN12 4
2
3 *0X2
1
LA_DATAN1
LA_DATAP1
TXLOUT2TXLOUT2+
RN11 4
2
3 *0X2
1
LA_DATAN2
LA_DATAP2
R352
Q63
100K_4
R607
*2N7002W-7-F *2K/F_4
LA_CLK# 10
LA_CLK
10
LA_DATAN0 10
LA_DATAP0 10
R608
C573
47P/50V/NPO_4
LCDON#
Q30
2N7002W-7-F
2
1
TXUCLKOUTTXUCLKOUT+
DISP_ON
40 mil
3
C567
.022U/25V_4
LCDDISCHG
C823
*10U/6.3V/X5_6
NB_PWRGD_5V
Q62
*PDTC143TT
C822
*1U_4
UMA only
*0_4
R606
10,16 NB_PWRGD_IN
between NB & VGA
R353
100K_4
*AO3413
3LCDONG
0_4
LA_DATAN1 10
LA_DATAP1 10
PROJECT : SA8
LA_DATAN2 10
LA_DATAP2 10
Ver.B delete discrete only selection.
PANEL VCC CONTROL
Size
Custom
NB2/RD1
Document Number
Rev
2A
LCD CONN & MUX
Date:
5
Sheet
1
24
of
46
Ver.B Modified for CRT DDC leakage.

*0_4
+5V
+3V_D
+3V_D
F2
FUSE_1A_6V_POLY
2
1
+3.3V
D18
18 EXT_CRT_DDCCLK
DDCCLK2
+5VCRT
+5VCRT
Q53 2N7002E
CRT_R
L18
BK1608LL680
CRT_R1
+3.3V
CRT_G
L19
BK1608LL680
CRT_G1
CRT_B
L21
BK1608LL680
CRT_B1
INT_CRT_DDCCLK
10
6
1
7
2
8
3
9
4
10
5
Q55
R372
INT_CRT_DDCDAT
10
C108
R73
150/F_4
2N7002E
R99
R103
150/F_4 150/F_4
*0_4
C130
C152
5.6P/50V/NPO_6
+5VCRT
+3.3V
+3V_D
R119
4.7K_4
INT_CRT_DDCCLK
R349
4.7K_4
INT_CRT_DDCDAT
R578
4.7K_4
EXT_CRT_DDCCLK
R579
EXT_CRT_DDCDAT
4.7K_4
C129
+5VCRT
R360
6.8K_4
Rev. C : Gate terminal on both Q52 and Q54, PU power on R578 and R579 must be changed from +3.3V to +3V_D
UMA
C151
Q52,Q54
Q53,Q55
R578,R579
12
13
14
15
C107
5.6P/50V/NPO_6
F8-DELETE R122,R356
R114
6.8K_4
Hybrid
11
17
2N7002E
5.6P/50V/NPO_6
5.6P/50V/NPO_6
Q54
DDCDAT2
5.6P/50V/NPO_6
5.6P/50V/NPO_6
2N7002E
18 EXT_CRT_DDCDAT
CN16
CONN_CRT
Ver.B BOM change for EMI

1
Q52
.1U/10V/X5_4
40 MIL
+5V
C187
SDM10U45-7
40 mils
16
R368
0 ohm.
DDCCLK2
VSYNC1
HSYNC1
R111
R109
33_4
33_4
CRTVSYNC
CRTHSYNC
DDCDAT2
C176
C208
*470P/50V_4
C182
*47P/50V_4
CRT PORT
C589
*470P/50V_4
*47P/50V_4
+5V
EXT_VGA_HI
U3
AHCT1G125DCH
18,21 EXT_HSYNC
HSYNC1
R157/R162/R174
+5V
U4
18,21 EXT_VSYNC
Hybrid
U1/U2
U3/U4
EXT_VGA_HI
UMA
AHCT1G125DCH
VSYNC1
+5V
10 INT_CRT_RED
10 INT_CRT_GRN
5
U1
10
INT_HSYNC
10 INT_CRT_BLU
AHCT1G125DCH
R157
*0_4
CRT_R
R162
*0_4
CRT_G
R174
*0_4
CRT_B
UMA
+3.3V
HSYNC1
U9
10
INT_VSYNC
AHCT1G125DCH
4
inputs
YA
YB
YC
YD
4
7
9
12
VCC
GND
16
8
EXT_VGA_HI
/E
+5V
SN74CBT3257CPWR
VSYNC1
R5
10K_4
function
Dis
CRT_R
CRT_G
CRT_B
U2
5
IA0
IA1
IB0
IB1
IC0
IC1
ID0
ID1
SEL
/E
C256
.1U/10V/X5_4
R178
10K_4
SET
+5V
2
3
5
6
11
10
14
13
1
15
Y - port 0
Y - port 1
Disconnect
Q2
2N7002E
Ver.B Updated
INT_CRT_RED
EXT_VGA_RED
INT_CRT_GRN
EXT_VGA_GRN
INT_CRT_BLU
EXT_VGA_BLU
10
18
10
18
10
18
CRT SWITCH
U1/U2 FOR UMA ONLY

U1/U2/U3/U4 FOR UMA+M86 HYBRID
R120/R115
FOR UMA+M86 HYBRID
PROJECT : SA8
Size
C
NB2/RD1
Document Number
Rev
2A
CRT CONN & MUX
Date:
Sheet
1
25
of
46
U18
35
34
37
36
LANVCC
R346
4.7K_4
PU_VDDO_TTL 43
42
for 8040
12 LAN_PLTRST#
R359
*0_4
R358
0_4
41
38
LAN_REST#
PCIE_WAKE#
13,30,35 PCIE_WAKE#
LAN_RSET
R355
2K/F_4
4.87K Ohm for 8055
R354
*4.87K/F_4
LAN_RSET
LAN_DISABLE#
32
57
RSET
TESTMODE
47
12
VMAIN_AVLBL
VAUX_AVLBL
SWITCH_VAUX
11
SWITCH_VCC
10
LOM_DISABLEn
15
XTALI
LAN_XOUT
14
XTALO
74
65
66
67
68
69
70
71
72
73
1
Y4
XTAL_25MHZ
WAKEn
LAN_XIN
LAN_XIN
27P/50V/NPO_4
PERSTn/TSTPT
VDD25
64
LAN_N5
CTRL18
CTRL18
LAN_XOUT
C568
*.01U/16V_4
2
7
13
33
39
44
48
58
TSTPT
12
HSDACN
25
MDI0-
11
HSDACP
24
V_DAC 10
TST1284
C514 .01U/16V_4
MDI3MDI3+
MDI2MDI2+
MDI1MDI1+
MDI0MDI0+
MDI1-
LAN_ACTLED#
100MBPS#
1000MBPS#
10_1000MBPS#
*PAD
*PAD
*PAD
*PAD
T93
T94
T95
T96
LAN_MX0+
TD4+
MX4+
14
LAN_MX0-
TCT4
MCT4
15
LAN_MCT0
TD3-
MX3-
16
LAN_MX1+
TD4-
TD3+
MX3+
17
LAN_MX1-
TCT3
MCT3
18
LAN_MCT1
MDI2+
TD2-
MX2-
19
LAN_MX2+
MDI2-
TD2+
MX2+
20
LAN_MX2-
V_DAC 4
TCT2
MCT2
21
LAN_MCT2
TD1-
MX1-
22
LAN_MX3+
TD1+
MX1+
23
LAN_MX3-
V_DAC 1
TCT1
MCT1
24
LAN_MCT3
MDI3+
MDI3C515 *.01U/16V_4
E4
R18
75/F_8
R17
75/F_8
R16
*75/F_8
R15
*75/F_8
U13
C474
Ver.B update PN
EC C-14
1000P/3KV/X7_1808
BOT TST1284 10/100

88E8040
R342
*4.7K_4
MX4-
13
V_DAC 7
C508 .01U/16V_4
C512 *.01U/16V_4
LANVCC
R344
*4.7K_4
C529
*.01U/16V_4
F28
MDI0+
59
60
62
63
C536
*.01U/16V_4
R46
0_6
CTRL12
29
LED_ACTn
LED_LINK10/100n
LED_LINK1000n
LED_LINKn
+2.5V_1.8V_LAN
MDI1+
GND10
GND1
GND2
GND3
GND4
GND5
GND6
GND7
GND8
GND9
RP37
*49.9/F_4P2R
for 8055
Block A
+1.2V_LAN
31
30
27
26
21
20
18
17
RP38
*49.9/F_4P2R
C548
*.01U/16V_4
CTRL12
MDIN[3]
MDIP[3]
MDIN[2]
MDIP[2]
MDIN[1]
MDIP[1]
MDIN[0]
MDIP[0]
MDI3+
MDI3-
NC
NC
RP39
*49.9/F_4P2R
RP40
*49.9/F_4P2R
2
4
51
52
+2.5V_1.8V_LAN
R347
0_6
LANCT3
27P/50V/NPO_4
16
+3.3V
LANVCC
R357
4.7K/F_4
C579
AVDDL
AVDDL
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VPD_DATA
VPD_CLK
46
LANVCC
C580
PU_VDDO_TTL
CLKREQn
23
19
22
28
88E805X/8040
VPD_DATA
VPD_CLK
33 PM_LAN_RST#
SPI_DI
SPI_DO
SPI_CLK
SPI_CS
AVDD
AVDD
AVDD
AVDD
1
3
AVDDH
2 MDI2+
4 MDI2-
REFCLKN
REFCLKP
LANVCC
1
3
56
55
1
40
45
61
MDI1+
MDI1-
TX_N
TX_P
RX_N
RX_P
2
4
CLK_PCIE_LAN#
CLK_PCIE_LAN
2 PCIE_LAN_CLKN
2 PCIE_LAN_CLKP
VDDO_TTL
VDDO_TTL
VDDO_TTL
VDDO_TTL
50
49
53
54
1
3
PCIE_RXN2_LAN_L
PCIE_RXP2_LAN_L
MDI0+
MDI0-
.1U/10V/X5_4
.1U/10V/X5_4
2
4
C531
C527
PCIE_RXN_LAN
PCIE_RXP_LAN
PCIE_TXN_LAN
PCIE_TXP_LAN
1
3
9
9
9
9
LAN-AGND
2/21 Footprint for SMT open issue.
E2
U16
VPD_DATA
VPD_CLK
EEPROM No Use
VPD_DATA Pull Down
R345
*0_4
5
6
SDA
SCL
WP
GND
A0
A1
A2
1
2
3
VCC
LANVCC
*FLASH_24LC08
LANVCC
.1U/10V/X5_4
C522
.1U/10V/X5_4
C520
.1U/10V/X5_4
C554
.1U/10V/X5_4
+2.5V_1.8V_LAN
Close Pin64
*4.7U/6.3V_6
.1U/10V/X5_4
R350
*4.7K_4
C532
.1U/10V/X5_4
C540
.1U/10V/X5_4
C563
.1U/10V/X5_4
C525
4.7U/6.3V/X5_6
for 8040
Q27
B
C
C578
C543
*.1U/10V/X5_4
C513
C585
LANVCC_L
L59
BK1608HS220
R321
0_4
R2
0_4
CTRL18
*BCP69T1
C588
*4.7U/6.3V_6
C586
.1U/10V/X5_4
C587
.1U/10V/X5_4
9 9
LAN-AGND
LAN-AGND
10 10
25 mil Trace width

Close Q38
for 8055
LAN_MX0+
LAN_MX0LAN_MX1+
LAN_MX2+
LAN_MX2LAN_MX1LAN_MX3+
LAN_MX3-
+1.2V_LAN
Close Pin39
for 8040
C519
.1U/10V/X5_4
C523
.1U/10V/X5_4
C521
.1U/10V/X5_4
C518
4.7U/6.3V/X5_6
1
2
3
4
5
6
7
8
CONN_RJ45
B
2
CTRL12
*BCP69T1
C516
*4.7U/6.3V_6
C517
.1U/10V/X5_4
C584
.1U/10V/X5_4
C583
.1U/10V/X5_4
C539
.1U/10V/X5_4
C524
.1U/10V/X5_4
PROJECT : SA8
25 mil Trace width

Close Q33
for 8055
Size
Custom
NB2/RD1
Document Number
Rev
2A
LAN(Marvell 88E8040&55)
Date:
5
1
2
3
4
5
6
7
8
Q26
*.1U/10V/X5_4
R348
*4.7K_4
C526
*4.7U/6.3V_6
C528
CN13
RJ45
10U/10V/X5_8
C591
Sheet
1
26
of
46
+3.3V
C194
C213
C147
.1U/10V/X5_4
.1U/10V/X5_4
+3.3V
C153
.1U/10V/X5_4
C231
4.7U/6.3V/X5_8
+1.8V
.1U/10V/X5_4
126T_1.8V
D
C207
4.7U/6.3V/X5_8
12,16
12
12
12
12
12
12
12
12
12
12
13
12,30,33
AD25
R116
PCI_CLK3
DEVSEL#
FRAME#
IRDY#
TRDY#
STOP#
PAR
REQ0#
GNT0#
PCIRST#
INTE#
PCI_PME#
CLKRUN#
OZIDSEL
100_4
106
PME#, CLKRUN# AND INTA#
NC
NC
NC
NC
NC
73
74
72
71
128
MC_3V#
SD/MS_CLK
SD_D3
SD_D2
SD_D1
SD_D0
SD_CMD
SM_WPI#/SD_WP
SD_CD#
4
113
111
112
107
108
110
117
114
MS_D1/XD_D7
XD_D6
XD_D5
XD_D4
MS_BS/XD_D3
MS_D0/XD_D2
MS_D2/XD_D1
MS_D3/XD_D0
XD_CE#
XD_R/B#
XD_CLE
XD_ALE
XD_WE#
XD_RE#
XD_WPO#
MS_CD#
XD_CD#
95
93
89
87
88
90
94
96
119
100
118
109
105
101
98
99
97
MMC_D4
MMC_D5
MMC_D6
MMC_D7
9
10
126
127
+1.8V_OUT
NOTE: PLACE R9 - R29 NEAR CONNECTORS

MC_3V#
SD/MS_CLK
SD_D3
SD_D2
SD_D1
SD_D0
SD_CMD
SM_WPI#/SD_WP
SD_CD#
SD/MS_CLK
SD_D3
SD_D2
SD_D1
SD_D0
SD_CMD
R91
R77
R78
R88
R90
R76
33_4
33_4
33_4
33_4
33_4
33_4
SP15
SP16
SP17
SP18
SP19
SP20
MS_D1/XD_D7
XD_D6
XD_D5
XD_D4
MS_BS/XD_D3
MS_D0/XD_D2
MS_D2/XD_D1
MS_D3/XD_D0
XD_CE#
XD_R/B#
XD_CLE
XD_ALE
XD_WE#
XD_RE#
XD_WP#
R85
R86
R87
R89
R92
R93
R94
R95
R96
R84
R82
R81
R80
R83
R79
33_4
33_4
33_4
33_4
33_4
33_4
33_4
33_4
33_4
33_4
33_4
33_4
33_4
33_4
33_4
SP0
SP1
SP2
SP3
SP4
SP5
SP6
SP7
SP8
SP9
SP10
SP11
SP12
SP13
SP14
EC C-09
2/20 Change for new card-reader IC.

+5V
C114
*10P/50VC0G_4
+3.3V
R108
*10K_4
3
MS_D1/XD_D7
XD_D6
XD_D5
XD_D4
MS_BS/XD_D3
MS_D0/XD_D2
MS_D2/XD_D1
MS_D3/XD_D0
XD_CE#
XD_R/B#
XD_CLE
XD_ALE
XD_WE#
XD_RE#
XD_WP#
MS_CD#
XD_CD#
Q9
*2N7002K-T1-E3
2
MC_3V#
2
Q10
*PDTC144EU
Ver.B delete for fast discharge.
R75
C110
*1U/10V/X5_6
C111
0_6
CARD_3V3_OUT
.1U/10V/X5_4
CARD_3V3
+3.3V
3.3V_IN
3.3V_IN
3.3V_OUT
3.3V_OUT
MEDIA_ACTV
12
16
33
67
68
104
115
116
121
123
124
77
80
83
MUST BE PULLED-UP ON THE MLB.
76
79
82
IDSEL
PCI_CLK
DEVSEL#
FRAME#
IRDY#
TRDY#
STOP#
PAR
REQ#
GNT#
PCI_RST#
INTA#
PME#
CLKRUN#
1.8VOUT
1.8VOUT
1.8VOUT
5
45
42
39
40
41
43
44
17
18
1
11
3
6
R128
0_6
1.8VCCD
1.8VCCD
1.8VCCD
1.8VCCD
1.8VCCD
1.8VCCD
C/BE3#
C/BE2#
C/BE1#
C/BE0#
C146
.1U/10V/X5_4
ASSIGN IDSEL
28
38
46
55
C188
.1U/10V/X5_4
65
66
69
70
CARD_3V3_OUT
B
CN1
SP9
SP13
SP8
SP10
SP11
SP12
SP14
SP7
SP6
SP17
SP16
SP20
NC
NC
NC
NC
NC
NC
12,16 AD[0..31]
12
CBE3#
12
CBE2#
12
CBE1#
12
CBE0#
AD31
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AD22
AD21
AD20
AD19
AD18
AD17
AD16
AD15
AD14
AD13
AD12
AD11
AD10
AD9
AD8
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
19
20
21
22
23
24
25
27
29
30
31
32
34
35
36
37
47
48
49
50
51
52
53
54
57
58
59
60
61
62
63
64
13
86
85
2
8
84
U7
AD31
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AD22
AD21
AD20
AD19
AD18
AD17
AD16
AD15
AD14
AD13
AD12
AD11
AD10
AD9
AD8
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0
C148
.1U/10V/X5_4
*0_6
14
15
91
92
120
125
26
56
7
102
103
122
75
78
81
C243
.1U/10V/X5_4
PCI_VCC
PCI_VCC
3.3VCC
3.3VCC
3.3VCC
3.3VCC
3.3VCC
3.3VCC
3.3VCC
C232
4.7U/6.3V/X5_8
R113
OZ126T-B
SP15
SP7
MS_CD#
SP6
SP5
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
XD-R/B
XD-RE
XD-CE
XD-CLE
XD-ALE
XD-WE
XD-WP
XD-D0
XD-D1
SD-DAT2
SD-DAT3
SD-CMD
4IN1-GND1
MS-VCC
MS-SCLK
MS-DATA3
MS-INS
MS-DATA2
MS-DATA0
MS-DATA1
MS-BS
4IN1-GND2
SD-VCC
SD-CLK
SD-DAT0
XD-D2
XD-D3
XD-D4
SD-DAT1
XD-D5
XD-D6
XD-D7
XD-VCC
XD-CD-SW
SD-WP-SW
SD-CD-SW
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
SHIELD1-GND
SHIELD2-GND
SHIELD3-GND
SHIELD4-GND
37
38
41
42
SP0
SP4
SP15
SP19
SP5
SP4
SP3
SP18
SP2
SP1
SP0
XD_CD#
SM_WPI#/SD_WP
SD_CD#
C112
1U/10V/X5_6
CONN_CARDREADER
PROJECT : SA8
Size
Custom
NB2/RD1
Document Number
Date:
5
Rev
2A
Card Reader-OZ126T
Sheet
1
27
of
46
(CX20561-15Z for QFN)
+AVDDA
L69
C656
C654
+AVDDA
1U/10V/X5_6
C647
C661
C667
C666
C686
.1U/10V/X5_4 10U/10V/X5_8 .1U/10V/X5_4
C653
1U/10V/X5_6
C679
10U/10V/X5_8
ADO_GND
ADO_GND
C682
10U/6.3V/X5_8
C683
1U/10V/X5_6
ADO_GND
43
42
DIB_P
DIB_N
12
PC_BEEP
BEEP
R437
*10K_4 GPIO1
R438
*10K_4 GPIO2
SPDIF_OUT
48
S/PDIF
GPIO2
GPIO1
EAPD#
45
46
47
GPIO2
GPIO1
EAPD#/GPIO0
26
40
36
MICBIASB
PORTB_L
PORTB_R
19
14
15
MICBIASC
PORTC_L
PORTC_R
18
16
17
AUD_HP_JACK_L
AUD_HP_JACK_R
27
28
MIC_L
MIC_R
20
21
MONO
STEREO_L
STEREO_R
29
30
31
R473
4.7K_4
AUD_LINE_OUT_L
AUD_LINE_OUT_R
SENSEA
13
SENSEA
VREF_FILT
24
CX20561_VILT
FLY_P
FLY_N
39
37
CX20561_FLY_P
CX20561_FLY_N
VREF_HI
VREF_LO
RESERVED_32
RESERVED_33
22
23
32
33
CX20561_RVD22
CX20561_RVD23
100_4
1
2
omit
-6dB
omit
-12dB
10K
-18dB
omit
CX20561-15Z
AVSS_49
GPIO2
10K
DVSS_7
DVSS_41
GPIO1
0dB
7
41
GAIN
CX20561-12Z Not
support digital MIC
CX20561-13Z support
digital MIC
AVSS_25
AVSS_38
0_4
PC Beep GAIN CONTROL
2.2U/6.3V/X5_6
2.2U/6.3V/X5_6
R470
R471
0_6
R427
0_6
R259
0_6
R591
0_6
R592
0_6
R593
0_6
Ver.B BOM change for EMI.
MIC1_L_1
L49
BLM18BD601SN1D
MIC1_R_1
L50
BLM18BD601SN1D
Ver.B Add for EMI
MIC1_L_1
MIC1_R_1
100_6
100_6
R459
5.11K/F_4
+AVDDA
R461
5.11K/F_4
HPSENSE
R462
20K/F_4
1
2
6
3
4
5
C413
C410
8
CONN_MIC
ADO_GND
MIC1_PLG
ADO_GND
PC BEEP
Q19
2N7002K-T1-E3
0_4
MIC1_PLG
R281
10K_4 +AVDDA
+3V_DVDD
C659
1U/10V/X5_4
C691
F18-DELETE R482
C685
.1U/10V/X5_4
0 ohm
U31
10U/10V/X5_8
BEEP
C703
1U/10V/X5_6
C688
1U/10V/X5_4
49
R584
DMIC_CLOCK
DMIC_1/2
25
38
R585
MIC_CLOCK
DMIC0
DMIC_CLK
DMIC0
MIC_VREFO
C689
C690
MIC1_L
MIC1_R
Ver.B For Conexant concern.

24
24
0_6
R279
ADO_GND
R479
C774
100P/50V/NPO_4
CN22
PORTD_L
PORTD_R
CX20561
R264
100P/50V/NPO_4
BIT_CLK
SYNC
SDATA_IN
SDATA_OUT
33_4 ACZ_SDIN20561
RESET#
C776
100P/50V/NPO_4
EXT. Mic in
13 BIT_CLK_AUDIO
13 ACZ_SYNC_AUDIO
13 ACZ_SDIN0
13 ACZ_SDOUT_AUDIO
6
10
8
5
CONN_SPEAKER
C777
100P/50V/NPO_4
C687
1U/10V/X5_4
C723
*.1U/10V/X5_4
ADO_GND
11
MIC_VREFO
34
35
1
2
3
4
C684
.1U/10V/X5_4
ADO_GND
audio GND to VSS

should be placed as
close as possible to
the audio connector.
PORTA_L
PORTA_R
CN7
ADO_GND
BEEP2
4
3
13 ACZ_RST#_AUDIO
R452
AVDD_26
AVDD_40
AVEE
9
4
3
44
VDD_IO
DVDD_1-8
DVDD_3-3
DVDD_44
U26
Int. Stereo Speakers
C780
100P/50V/NPO_4
+3V_DVDD
C678
.1U/10V/X5_4
AUD_SPK_R1
AUD_SPK_R2
AUD_SPK_L1
AUD_SPK_L2
TI321611U480_1206
100P/50V/NPO_4
10U/10V/X5_8 .1U/10V/X5_4
+3V_DVDD
L73
C665
+3.3V
C652
.1U/10V/X5_4
C655
C677
10U/6.3V/X5_8 .1U/10V/X5_4
TI321611U480_1206
*10U/6.3V/X5R_8
+3V_DVDD
+3.3V
1U/10V/X5_6
C717
*1000P/16V_4
ADO_GND
ACZ_SPKR 13
2
*TC7SH08FU
omit
ADO_GND
10K
Headphone out + Spdif Out (normal open)
ADO_GND
+5V
Q39
AUDIO AMPLIFIER TPA6017A2
+12V_ALW
C741
.1U/10V/X5_4
C718
.1U/10V/X5_4
C737
.047U/10V_4
C696
C697
LIN-1
RIN-1
R478
R483
ADO_GND
C726
Ver.B Modified for

Single-Ended Input spec
GAIN0 GAIN1 AV(INV)
+5V_SPK_AMP
6dB
10dB
15.6dB
21.6dB
LINRIN-
5
17
LIN+
RIN+
9
7
AMP_BYPASS
1U/10V/X5_6
100P/50V/NPO_4
6017A2 Gain Table

0
0_6
0_6
.47U/10V_6
.47U/10V_6
C716
ADO_GND
1U/16V/X7_1206
1U/16V/X7_1206
AUDIO_G0
AUDIO_G1
2N7002K-T1-E3
10
2
3
ROUT+
ROUT-
18
14
AUD_SPK_R1
AUD_SPK_R2
4
8
AUD_SPK_L1
AUD_SPK_L2
SHUTDOWN
19
MUTE#
NC
EPAD
GND1
GND2
GND3
GND4
12
21
1
11
13
20
LOUT+
LOUT-
LINRINLIN+
RIN+
BYPASS
GAIN0
GAIN1
HPSENSE
R504
100K_4
VOLMUTE#
2
2N7002K-T1-E3
Ver.B change to 2N7002

*0_4 HPSENSE
D24
R515
SW1010CPT
D22
SW1010CPT
VOLMUTE#_R
D23
SW1010CPT
EAPD#
SPDIF_VCC
ADO_GND
SPDIF_OUT
R531
33_4 SPDIF_1
C772
R535
*110_6
APA2031 ,AL002031K00
33
Q38
PVDD1
PVDD2
VDD
TPA6017A2PWPRG4
100P/50V/NPO_4
C715
C740
C721
AUD_LINE_OUT_L
AUD_LINE_OUT_R
U32
6
15
16
ADO_GND
1M_6
+5V_SPK_AMP
+5V_SPK_AMP
C743
10U/10V/X5_8
R523
Place close U30
+5V_SPK_AMP
L76
2
1
BLM21PG600SN1D
+5V
.1U/10V/X5_4
C779
*100P/50VA_6
CN23
ADO_GND
VOLMUTE#
R512
9
8
7
AUD_HP_JACK_R
R284
0_4 HP_JACK_R_1
AUD_HP_JACK_L
R283
0_4 HP_JACK_L_1
L51
BLM18BD601SN1D
L52
BLM18BD601SN1D
HP_JACK_R_2
0_4 VOLMUTE#_R
ADO_GND
R285
*20K_4
ADO_GND
R282
*20K_4
C432
100P/50V/NPO_6
HP_JACK_L_2
HPSENSE
C430
100P/50V/NPO_6
*100K/F_4
AUDIO_G0
R266
1K/F_4
R269
100K/F_4
AUDIO_G1
R265
*1K/F_4
C738
C739
C719
C720
100P/50V/NPO_4
100P/50V/NPO_4
100P/50V/NPO_4
100P/50V/NPO_4
AUD_SPK_R1
AUD_SPK_R2
AUD_SPK_L1
AUD_SPK_L2
IC
1
3
2
4
5
11
10
6
CONN_SPDIF_PHONE
Ver.B reserver for ESD

R270
DRIVE
HPSENSE
ADO_GND
A
VOLMUTE#_R
ADO_GND
EAPD#
ADO_GND
D3- Seting Gain value for TGA request.
ADO_GND
ADO_GND
PROJECT : SA8
*Varistor_4
C810
*Varistor_4
Varistor_4
C809
1
C808
D8-Add C808 varistor

for ESD issue.
Size
C
NB2/RD1
ADO_GND
Document Number
Rev
2A
AUDIO(CX20561)&CONN
Date:
Sheet
1
28
of
46
SATA ODD CONNECTOR
Ver.B Change footpring for SMT issue.

CN30
14
14
14
14
C805
C804
SATA_RXN4
SATA_RXP4
SATA_TXP4
SATA_TXN4
0.01U 50V_4
0.01U 50V_4
SATA_RXN_C
SATA_RXP_C
R571
E1
1K/F_4
+5V
F19-DELETE L82
1
2
3
4
5
6
7
GND1
TXP
TXN
GND2
RXN
RXP
GND3
8
9
10
11
12
13
14
15
16
17
DP
+5V
+5V
MD
GND
GND
GND
GND
GND
GND
0 ohm
CONN_ODD
120 mils
+5V
C803
10U/6.3V/X5_8
C806
.1U/10V/X5_4
SATA HDD CONNECTOR

CN29
GND1
TXP
TXN
GND2
RXN
RXP
GND3
1
2
3
4
5
6
7
3.3V
3.3V
3.3V
GND
GND
GND
5V
5V
5V
GND
RSVD
GND
12V
12V
12V
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
SATA_TXP0 14
SATA_TXN0 14
SATA_RXN0_C
SATA_RXP0_C
C794
C793
0.01U 50V_4
0.01U 50V_4
SATA_RXN0 14
SATA_RXP0 14
+3.3V
E1
+3.3V
C797
C796
4.7U/6.3V/X5_8
C225
.1U/10V/X5_4
*1000P/16V_4
+5V
SATA_P11
T186
ESD recommend
+5V
C799
1000P/16V_4
C800
.1U/10V/X5_4
C795
10U/10V/X5_8
CONN_HDD
PROJECT : SA8
Size
Custom
NB2/RD1
Document Number
Date:
5
Rev
2A
SATA HDD ODD

Sheet
1
29
of
46
+3.3V
WLAN_LED#
MiniCard WLAN connector 1
D21
WWAN_LED#
+3.3V
WIRELESS_LED# 34
C727
.1U/10V/X5_4
*CH501H-40PT
C722
10U/6.3V/X5_8
D29
+3.3V +1.5V
*CH501H-40PT
CN20
9
9
R514
22_4
PCIE_RXP2
PCIE_RXN2
12 PCLK_LPC_DEBUG
12 MINI_PLTRST#
C748
2 PCIE_MINI1_CLKP
2 PCIE_MINI1_CLKN
22P/50V/NPO_4
13,26,35 PCIE_WAKE#
MINI1CLK_REQ#
COEX2
COEX1
PCIE_WAKE_MINI_1#
2 MINI1CLK_REQ#
31
COEX2
31
COEX1
15
13
11
9
7
5
3
1
GND
REFCLK+
REFCLKGND
CLKREQ#
COEX2
COEX1
WAKE#
FOR SYSTEM DEBUG
+3.3V_SUS
UIM_VPP
UIM_RESET
UIM_CLK
UIM_DATA
UIM_PWR
+1.5V
GND
+3.3V
16
14
12
10
8
6
4
2
R499
WLAN_LED#
*0_4
R500
BT_LED#
*1K_4
+1.5V
T161
+3.3V
+3.3V_SUS
T164
USBP4+ 13
USBP4- 13
C742
.047U/10V_4
C756
.047U/10V_4
C408
.1U/10V/X5_4
SB_SMBDATA1 13
SB_SMBCLK1 13
R277
0_6
+3.3V_SUS
MINI_PLTRST# 12
WLAN_RF_OFF# 14,34
WLAN_RF_OFF#
+3.3V
C758
LPC_LAD0 12,33
LPC_LAD1 12,33
LPC_LAD2 12,33
LPC_LAD3 12,33
LPC_LFRAME# 12,33
FOR SYSTEM DEBUG
C733
C730
C757
C759
4.7U/6.3V/X5_8
PCLK_LPC_DEBUG
52
50
48
46
44
42
40
38
36
34
32
30
28
26
24
22
20
18
.047U/10V_4
PCIE_TXP2
PCIE_TXN2
+3.3V
GND
+1.5V
LED_WPAN#
LED_WLAN#
LED_WWAN#
GND
USB_D+
USB_DGND
SMB_DATA
SMB_CLK
+1.5V
GND
+3.3Vaux
PERST#
W_DISABLE#
GND
.1U/10V/X5_4
9
9
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
GND
PETp0
PETn0
GND
GND
PERp0
PERn0
GND
UIM_C4
UIM_C8
.047U/10V_4
FAI Add for EMI
51
49
47
45
43
41
39
37
35
33
31
29
27
25
23
21
19
17
.1U/10V/X5_4
12,27,33 CLKRUN#
12,33
SERIRQ
12
LDRQ#0
T163
CONN_MiniPCI-E
PDTC144EU
Q18
+3.3V
R522
10K_4
MINI1CLK_REQ#
F20-DELETE R502,R503,R507,R509,R534,R536
0 ohm
Ver.B Updated
MiniCard connector 2
+1.5V
R544
R541
9
9
PCIE_RXP1
PCIE_RXN1
12 PCLK_LPC_DEBUG
12 MINI_PLTRST#
FOR SYSTEM DEBUG
+3.3V_SUS
2
2 PCIE_MINI2_CLKP
2 PCIE_MINI2_CLKN
MINI2CLK_REQ#
COEX2
COEX1
2 MINI2CLK_REQ#
13,26,35 PCIE_WAKE#
PCIE_WAKE_MINI_2#
1
PDTC144EU
Q42
15
13
11
9
7
5
3
1
GND
REFCLK+
REFCLKGND
CLKREQ#
COEX2
COEX1
WAKE#
UIM_VPP
UIM_RESET
UIM_CLK
UIM_DATA
UIM_PWR
+1.5V
GND
+3.3V
16
14
12
10
8
6
4
2
T171
T170
WWAN_LED#
USBP5+
USBP5-
*0_6
0_6
+3.3V
+3.3V_SUS
R529
*1K_4
USBP5+
USBP5-
+1.5V
+3.3V
C788
.047U/10V_4
SB_SMBDATA1 13
SB_SMBCLK1 13
WLAN_RF_OFF#
+3.3V_SUS
13
13
MINI_PLTRST# 12
WLAN_RF_OFF# 14,34
C769
33P/50V/NPO_4
C786
.1U/10V/X5_4
+3.3V
LPC_LAD0 12,33
LPC_LAD1 12,33
LPC_LAD2 12,33
LPC_LAD3 12,33
LPC_LFRAME# 12,33
C763
CONN_MiniPCI-E
C790
C775
C771
C760
4.7U/6.3V/X5_8
PCIE_TXP1
PCIE_TXN1
2/20 Add Pin.17 and Pin.19 for debug port.
52
50
48
46
44
42
40
38
36
34
32
30
28
26
24
22
20
18
.047U/10V_4
9
9
EC C-04
+3.3V
GND
+1.5V
LED_WPAN#
LED_WLAN#
LED_WWAN#
GND
USB_D+
USB_DGND
SMB_DATA
SMB_CLK
+1.5V
GND
+3.3Vaux
PERST#
W_DISABLE#
GND
33P/50V/NPO_4
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
GND
PETp0
PETn0
GND
GND
PERp0
PERn0
GND
UIM_C4
UIM_C8
.047U/10V_4
+3.3V
CN26
51
49
47
45
43
41
39
37
35
33
31
29
27
25
23
21
19
17
33P/50V/NPO_4
+3.3V
12,27,33 CLKRUN#
12,33
SERIRQ
12
LDRQ#0
T187
Ver.B Updated
+3.3V
R554
10K_4
MINI2CLK_REQ#
A
PROJECT : SA8
Size
Custom
NB2/RD1
Document Number
Date:
A
Rev
2A
MINI PCI-E Card X2

Sheet
E
30
of
46
BLUETOOTH CONNECTOR
+12V_ALW
+3.3V_SUS
V_BT
CONN_BLUETOOTH
R300
1M_4
13
13
Q23
AO3404
30
30
R303
R302
COEX2
COEX1
0_4
0_4
V_BT
BT_ON#
2
1
14
1
2
3
4
5
6
7
8
USBP1+
USBP1BT_BUSY
WIFI_BUSY
R301
Q22
2N7002W-7-F
*0_4
CN9
C466
.1U/10V/X5_4
C465
10U/6.3V/X5_8
FINGERPRINT CONNECTOR
0 ohm
CONN_FingerPrint
13
13
USBP6USBP6+
+3.3V
C399
1
2
2
*Varistor_4
AOZ8001JI
6
5
4
3
2
1
+3.3V_SUS
CN28
1
3
5
7
9
11
ACZ_SDOUT_AUDIO_MDC
ACZ_SYNC_AUDIO_MDC
ACZ_SDIN1
ACZ_RST#_AUDIO_MDC
CN5
1
1
*Varistor_4
C398
Varistor
U33
+3.3V
C402
For MDC Module
Ver.B Change Footprint for SMT issue
GND
AC_SDO
GND
AC_SYNC
AC_SDI
AC_RST#
RSV
RSV
3.3V
GND
GND
AC_BCLK
2
4
6
8
10
12
R568
0_4
+3.3V
BIT_CLK_MDC
R569
56NH_5%_0.2A
CONN_MDC
C801
*10P/50VC0G_4
C798
10P/50V/C0G_4
B
Ver.B EMI BOM change
13 ACZ_SDIN1
13 BIT_CLK_AUDIO_MDC
13 ACZ_SDOUT_AUDIO_MDC
13 ACZ_SYNC_AUDIO_MDC
13 ACZ_RST#_AUDIO_MDC
0 ohm
CN25
USB_OC2#
USBP0USBP0+
R570
0_4
BIT_CLK_MDC
TO RJ11/USB PORT
+5V_SUS
13
13
13
ACZ_SDIN1
BIT_CLK_AUDIO_MDC
ACZ_SDOUT_AUDIO_MDC
ACZ_SYNC_AUDIO_MDC
ACZ_RST#_AUDIO_MDC
1
2
3
4
5
6
USB_OC2#
USBP0USBP0+
+5V_SUS
L84
EC31
.1U/10V/X5_4
C814 15P/50V/NPO_4
CONN_RJ11
5.6NH_0.3NH_300MA
BIT_CLK_AUDIO_MDC
Ver.B Add for EMI.
Ver.B Close to CN25.1
PROJECT : SA8
Size
Custom
NB2/RD1
Document Number
Date:
A
Rev
2A
Bluetooth,FingerPrint,USBX1
Sheet
E
31
of
46
USB-0
CN12
USB0PWR
1
2
3
4
USBP_9C468
60MIL
OC1
OC2
8
5
USB0PWR
USB1PWR
C506
C511
4.7U/6.3V/X5_8
4.7U/6.3V/X5_8
USB_OC0# 13
USB_OC1# 13
G546B2P1UF
CONN_USB
1
EN1
EN2
GND
7
6
3
4
1
OUT1
OUT2
VCC
100U/6.3V/TAN_6032
U17
+5V_SUS
+ C507
USBP_9+
.1U/10V/X5_4
60MIL
5
6
7
8
C2
Varistor
C3
Varistor
USB-1
CN11
USBP_9+
USB1PWR
C470
0_4
USBP_8-
R13
0_4
USBP_8+
+ C471
USBP_8+
5
6
7
8
CONN_USB
1
R12
1
2
3
4
USBP_8-
USBP8USBP8+
USBP_9-
0_4
13
13
0_4
R6
USBP9+
R7
100U/6.3V/TAN_6032
13
USBP9-
.1U/10V/X5_4
13
C6
Varistor
C7
Varistor
Ver.B Delete C492
+5V
CPU FAN
30 mil
30 mil
C673
1U/10V/X5_6
U29
30 mil
B
33
PWM_FAN1
+5V_FAN
R456
100K_4
C680
1
2
3
4
VEN
VIN
VO
SET
GND
GND
GND
GND
CN18
+5V_FAN
1
2
3
4
5
CONN_FAN
C675
.1U/10V/X5_4
8
7
6
5
C672
10U/10V/X5_8
C707
1000P/16V_4
G993P1U
.1U/10V/X5_4
+3.3V
2/20 Add C680 for FAN speed issue.

1
EC C-06
Q35
PDTA124EU
33
FANSIG1
R496
100K_4
PROJECT : SA8
Size
Custom
NB2/RD1
Document Number
Date:
5
Rev
2A
USB CONN X2ports

Sheet
1
32
of
46
IT8502_AVCC
C785
BLM11A05
+3.3V_ALW
L79
BLM11A05
+3.3V_ALW
+AVBAT
BLM11A05
C773
.1U/10V/X5_4
IT8512_AGND
Layout Note:
Place all capacitors close to IT8502.
C765
C781
C778
C766
C782
C784
Ver.B Correct VRON net
.1U/10V/X5_4
.1U/10V/X5_4
.1U/10V/X5_4
.1U/10V/X5_4
.1U/10V/X5_4
.1U/10V/X5_4
GPE3
17
GPE1
VCLK
VDATA
42
34
34
RTC_VCC
EC_GPG1
+3.3V_ALW
36
D28
D27
D/C#
D/C#
CIR_TX
T173
R525
470K_4
126
5
KBSMI#1
15
SCI#1
23
WRST_8502# 14
4
SWI#
16
119
123
WRST_8502#
C764
.1U/10V/X5_4
R551
*1K_4
CELL_SLT
R550
100K_4
TMKBC Function
36
High
Enable
Low
Disable
CELL_SLT
F23-DELETE R552
T179
0 ohm
8502_SCK
EC_GPG6
8502_SO
8502_SI
8502_SCE#
EC_ME_ALERT
R553
*100K_4
FLASH TYPE SELECT
High
LPC/FWH FLASH ROM
Low
SPI FLASH ROM (Default)
36
37
38
39
40
41
42
43
44
45
46
51
52
53
54
55
10K_4
R549
R548
R530
R558
+3.3V_ALW
R36
10K_4
NBSWON#
L85
PS2CLK0/GPF0
PS2DAT0/GPF1
PS2CLK1/GPF2
PS2DAT1/GPF3
PS2CLK2/GPF4
PS2DAT2/GPF5
85
86
87
88
89
90
MSCLK
MSDATA
KPCLK
KPDATA
TPCLK
TPDATA
PWM
PWM0/GPA0
PWM1/GPA1
PWM2/GPA2
PWM3/GPA3
PWM4/GPA4
PWM5/GPA5
PWM6/GPA6
PWM7/GPA7
24
25
28
29
30
31
32
34
TACH0/GPD6
TACH1/GPD7
47
48
SM BUS
KSO16/GPC3
KSO17/GPC5
GINT/GPD5
L80HLAT/GPE0
L80LLAT/GPE7
C24
SWITCH_POWER
*1000P/16V_4
2.2N_0.3N_1.9A
C813 15P/50V/NPO_4
ESD Reserved
+3.3V
+5V
Q40
2N7002W-7-F
ABCLK_L
TMR0/WUI2/GPC4
TMR1/WUI3/GPC6
MBCLK
MBDATA
36
36
RN17
10K_8P4R
R564
10K_4
R565
10K_4
ABCLK
ABDATA
ABCLK
5,21
ABDATA
5,21
+3.3V
Q41
2N7002W-7-F
CAPSLED 34
NUMLED 34
ABDATA_L 3
TPCLK
TPDATA
34
34
FLRST#/WUI7/GPG0/TM
FLCLK/SCK
FLAD3/GPG6
FLASH
FLAD2/SO
FLAD1/SI
FLAD0/SCE#
FLFRAME#/GPG2
Ver.B Correct netname
PWRLED1 34
LED_ON# 34
PWM_FAN1 32
PWM_FAN2
T168
200Hz_LED#
T169
PWM_INV 24
FANSIG2
FANSIG1
32
120
124
VHS
34
RF ON/OFF SLIDE SWITCH
+3.3V_ALW
T174
R1
10K_4
SW1
SWITCH_RF
RF_OFF_SW#
PWRSW/GPE4
RI1#/WUI0/GPD0
RI2#/WUI1/GPD1
125
18
21
NBSWON#
WUI5/GPE5
RING#/PWRFAIL#/LPCRST#/GPB7
35
112
VSAT
EC_GPB7R618
UART
TXD/GPB1
RXD/GPB0
109
108
BAT_RED_LED#
BAT_GREEN_LED#
A/D D/A
ADC0/GPI0
ADC1/GPI1
ADC2/GPI2
ADC3/GPI3
ADC4/GPI4
ADC5/GPI5
ADC6/GPI6
ADC7/GPI7
66
67
68
69
70
71
72
73
DAC0/GPJ0
DAC1/GPJ1
DAC2/GPJ2
DAC3/GPJ3
DAC4/GPJ4
DAC5/GPJ5
76
77
78
79
80
81
WAKE UP
3
5
4
100K_4
10K_4
10K_4
Ver.B Add for EMI.
CLKRUN# 12,27,30
MBCLK
MBDATA
ABCLK_L
ABDATA_L
IT8502
C25
.1U/10V/X5_4
VRON
110
111
115
116
117
118
GPIO
Note 2 :
(1) Each input pin should be driven or pulled.
(2) Each output-drain output pin should be pulled.
R559
R545
R547
SW2
10K_4
10K_4
10K_4
10K_4
+3.3V_ALW
BL/C#
BAT_RED_LED#
BAT_GREEN_LED#
38,40
SMCLK0/GPB3
SMDAT0/GPB4
SMCLK1/GPC1
SMDAT1/GPC2
SMCLK2/GPF6
SMDAT2/GPF7
LPC
GPC0
GPB2
KSO0/PD0
KSO1/PD1
KSO2/PD2
KSO3/PD3
KSO4/PD4
KSO5/PD5
KSO6/PD6
KSO7/PD7
KSO8/ACK#
KSO9/BUSY
KSO10/PE
KSO11/ERR#
KSO12/SLCT
KSO13
KSO14
KSO15
R537
107
99
98
97
96
95
94
93
56
57
33
19
20
84
83
82
127
VSTBY
GPE3/ISCLK
GPE2/ISAS
GPE1/ISAD
3
74
VBAT
AVCC
11
26
50
92
114
121
VCC
VSTBY
VSTBY
VSTBY
VSTBY
VSTBY
GA20/GPB5
SERIRQ
ECSMI#/GPD4
ECSCI#/GPD3
WRST#
KBRST#/GPB6
PWUREQ#/GPC7
SUSB#
ACIN
VSAT
10K_4
3
2
1
C1
13
36
.1U/10V/X5_4
B
34
F26
BAT_RED_LED# 34
BAT_GREEN_LED# 34
8Mbit (1M Byte), SPI

+3.3V_ALW
TEMP_MBAT 36
MBATV 36
SYS_I
36
MBATV
EC_GPI3
PE_GPIO1
T181
PE_GPIO1 12
HWPG
HWPG
SUSC#
R563
10K_4
37,38,39,42
13
R555
10K_4
U36
KBMX
CLOCK
CK32KE
CK32K
CC-SET
36
T182
BL/C#
36
PM_LAN_RST# 26
CV_SET
BL/C#
DNBSWON_R
1
D30
T183
8502_SCE#
8502_SCK R560
8502_SI
R567
8502_SO R557
8502_SCK1
8502_SI1
8502_SO1
1
6
5
2
3
2
SW1010CPT
DNBSWON# 13
CE#
SCK
SI
SO
VDD
HOLD#
WP#
VSS
C783
FLASH_SST25VF080B
Layout Note:
Place R428,R416,R420 within 500 mils from SPI Flash.
IT8502_CK32KE
2
128
47_4
47_4
15_4
75
MX0
MX1
MX2
MX3
MX4
MX5
MX6
MX7
58
59
60
61
62
63
64
65
MY[0..15]
IT8502_CK32K
Y6
34
1
12
27
49
91
113
122
R3444
MY0
MY1
MY2
MY3
MY4
MY5
MY6
MY7
MY8
MY9
MY10
MY11
MY12
MY13
MY14
MY15
106
105
104
103
102
101
100
0_4
LPCPD#/WUI6/GPE6
Note 1 : Since all GPIO belong to VSTBY power domain, and

there are some special considerations below:
(1) If it is output to external VCC derived power domain
circuit, this signal should be isolated by a diode such as
KBRST# and GA20.
(2) If it is input from external VCC derived power domain
circuit, this external circuit must consider not to float the
GPIO input.
+3.3V_ALW
VRON
PS/2
SW1010CPT
SW1010CPT
13
RCIN#
13
SWI#
VHS
POWER SWITCH
AVSS
KBSMI#
SCI#
LAD0
LAD1
LAD2
LAD3
LPCRST#/WUI4/GPD2
LPCCLK
LFRAME#
VSS
VSS
VSS
VSS
VSS
VSS
VSS
13
GATEA20
12,30 SERIRQ
13
13
17
*10K_4
10K_4
10K_4
Ver.B Correct netname
GPG1/ID7
GPH6/ID6
GPH5/ID5
GPH4/ID4
GPH3/ID3
GPH2/ID2/BADDR1
GPH1/ID1/BADDR0
CLKRUN
LPCPD
T165
R546
R539
R562
C761
RSMRST# 13
VR2.5_ON 39
LAN_POWER 41
MAINON 38,41,42
SUSON
39,41
S5_ON
41,42
+3.3V_ALW
KSI0/STB#
KSI1/AFD#
KSI2/INIT#
KSI3/SLIN#
KSI4
KSI5
KSI6
KSI7
41
*1000P/16V_4
0_4
R556
10
9
8
7
22
13
6
F2
VOLMUTE# 28
PWROK
16
R572
U35
C762
IT8502E/IX-L
.1U/10V/X5_4
EC_GPG1
EC_GPB7
PE_GPIO1
VDATA
VCLK
VSAT
HWPG
PWROK
M86ON
PWROK
12,30 LPC_LAD0
12,30 LPC_LAD1
12,30 LPC_LAD2
12,30 LPC_LAD3
24
MXLID#
12 LPC_CLK_8502
12,30 LPC_LFRAME#
ESD Reserved
M86ON
+3.3V
4.7K_4
4.7K_4
4.7K_4
4.7K_4
10K_4
10K_4
+3.3V
RF_OFF_SW#
Layout Note:
net "3VPCU" and "RTC_VCC"
minimum trace width 12mils.
R543
R542
R528
R532
R524
R533
.1U/10V/X5_4
+3.3V_ALW
MBCLK
MBDATA
ABCLK_L
ABDATA_L
LPCPD
CIR_TX
8
6
4
2
RTC_VCC
Ver.B Correct VGS control
7
5
3
1
L81
(For PLL Power)
IT8502_VSTBY
R527
0_4
.1U/10V/X5_4
+3.3V_ALW
1000P/16V_4
C789
L80
34
MX[0..7]
XTAL_32.768KHZ
IT8502_AGND
C815
0.1U/10V/X5R_4
EC C-02
2/20 KBC change to 8502JX Pin12 need add two Cap.

5
C816
1U/10V_4
C768
18P/50V/C0G_4
C767
18P/50V/C0G_4
Layout Note:
32.768kHz clock lines:
a. If possible, please avoid using any through-hole.
b. Please make the trace length short, and the trace width wide enough.
c. The spacing to the closest neighbor should be wide enough.
Size
Custom
NB2/RD1
Ver.B update XTAL.

4
PROJECT : SA8
Document Number
Date:
2
Rev
2A
KBC-IT8502
Sheet
1
33
of
46
R274
SW4
2
4
1K_4
C404
680P/50V/X5_4
RV1
*VARISTOR_6
1
3
R297
SWITCH_TOUCHPADL
SW5
2
4
1K_4
C456
680P/50V/X5_4
RV2
*VARISTOR_6
1
3
SWITCH_TOUCHPADR
33
33
L46
L47
TPCLK
TPDATA
TPCLK-1
TPDATA-1
BLM11A05
BLM11A05
C392
*100P-ESD_6
C391
*100P-ESD_6
33
33
33
33
33
33
33
33
33
33
33
33
33
33
33
33
33
33
33
33
33
33
33
33
+3.3V_ALW
RP25
10
MY8 9
MY5 8
MY14 7
MY15 6
1
2
3
4
5
10K_10P8R
+3.3V_ALW
RP26
10
MY2 9
MY9 8
MY6 7
MY7 6
MY10
MY11
MY12
MY13
+3.3V_ALW
MY15
MY14
MY13
MY12
2
4
6
8
220P/50V_8P4C
MY11
MY10
MY5
MY8
2
4
6
8
220P/50V_8P4C
CP3
1
3
5
7
MY7
MY6
MY9
MY2
2
4
6
8
220P/50V_8P4C
+3.3V
MX5
MY4
MX2
MX1
2
4
6
8
220P/50V_8P4C
Ver.B BOM change for EMI.

33
33
33
33
CP6
1
3
5
7
CN10
MY3
MX4
MX3
MX0
2
4
6
8
220P/50V_8P4C
+3.3V_ALW
VSAT
VSAT
VCLK
VDATA
VHS
VHS
CONN_SWITCHBOARD
CP4
1
3
5
7
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
MX6
MX5
MX4
MX3
MX2
MX1
MX0
MY5
MX7
C802
.1U/10V/X5_4
CP5
1
3
5
7
MY4
MY3
MY0
MY1
1
2
3
4
5
CP2
1
3
5
7
12
11
10
9
8
7
6
5
4
3
2
1
CONN_TOUCHPAD
TP_L
MX0
MX3
MX4
MY3
MX1
MX2
MY4
MX5
MX7
MY0
MY1
MX6
MY2
MY9
MY6
MY7
MY8
MY5
MY10
MY11
MY12
MY13
MY14
MY15
CONN_KEYBOARD
CN3
TP_R
MX0
MX3
MX4
MY3
MX1
MX2
MY4
MX5
MX7
MY0
MY1
MX6
MY2
MY9
MY6
MY7
MY8
MY5
MY10
MY11
MY12
MY13
MY14
MY15
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
CP1
1
3
5
7
CN8
TP_R
KEYBOARD
For New Keyboard use.
TOUCHPAD SWITCH CONN

TP_L
MX6
MY1
MY0
MX7
2
4
6
8
220P/50V_8P4C
0 ohm
10K_10P8R
B
LED INDICATOR
+5V_LED
12 MIL
0_8 5VTP
L42
+5V
C363
.1U/10V/X5_4
14
SATA_LED#
SATA_LED#_1 R298
LED_BLUE_EVL
100_4
D16
*100_4
D12
ODDLED#_1
R293
*LED_BLUE_EVL
SWITCH/Volume cintral BOARD

+3.3V_LED
Ver.B remove
33
NUMLED
33
CAPSLED
NUMLED_2 R278
LED_BLUE_EVL
100_4
D11
CAPSLED_2 R276
LED_BLUE_EVL
100_4
D10
+3.3V_LED
+3.3V_ALW
D17
WIRELESS LED
33 BAT_GREEN_LED#
33 BAT_RED_LED#
From ICH8-M
R305
220_4 BAT_G_LED#_R
R306
220_4 BAT_R_LED#_R
GREEN2
3
1
RED
LED_Green/Red
D3 1
R4
150/F_4
D1 1
R3
150/F_4
+3.3V_ALW
+3.3V_LED
Q17
PDTC144EU
*SW1010CPT
D9
WIRELESS_LED#
R263
D13
R295
*5.6M_4
D15
14,30 WLAN_RF_OFF#
-PWRLED_R
R299
150/F_4
LED_BLUE_LIT
100_4
33
LED_BLUE_EVL
R296
PWRLED1
2M_4
2
Q20
2N7002E
D14
EC C-01
2/20
for LED +3.3V_LED and +5V_LED
+3.3V_S5
30 WIRELESS_LED#
leak electricity.
+5V_LED
+5V
+3.3V_LED
SW1010CPT
To WLAN card
C455
R597
100K_4
.47U/10V_6
+12V_ALW
R598
47_4
LED_ON#1
Q58
2N7002W-7-F
2
2
Q59
2N7002W-7-F
Q57
LED_ON#1
+3.3V
Q24
PDTC144EU
1
+5V_LED
C464
.1U/10V/X5_4
+3.3V_LED
PROJECT : SA8
C467
.1U/10V/X5_4
*Varistor_4
C812
Size
Custom
NB2/RD1
Ver.B Add Reserved ESD solution.

1
2N7002W-7-F
Q25
2N7002E
LED_ON#
C811
*Varistor_4
33
2
Q21
2N7002E
+5V
R304
1M_6
LED POWER DISCHARGE
R599
47_4
Date:
6
Document Number
Rev
2A
TP/KB/LED/SW CONN.
Sheet
34
8
of
46
+3.3V
NEWCARD
CPUSB#
R176
*10K_4
CPPE#
R170
10K_4
2231_SHDN#
R145
10K_4
2231_STBY#
R148
10K_4
U8
2231_STBY#
+3.3V_SUS
3VAUX
NEWCARD_DETECT
T13
*PAD
T12
0 ohm
13 NEWCARD_DETECT
0_4
SB_SCLK2
SB_SDATA2
3V_NEWCARD
0.75A need 30~40 mil

PERST#
2 NEW-CARD_CLK_REQ#
R169
R164
0_4
0_4
CLK_NEW_OE#
CPPE#
2 PCIE_NEW_CLKN
2 PCIE_NEW_CLKP
9
9
PCIE_RXN3
PCIE_RXP3
9
9
PCIE_TXN3
PCIE_TXP3
+1.5V
3
5
3V_NEWCARD
11
13
1.5V_NEWCARD
1.35A need 60 mil
0.75A need 30~40 mil
+3.3V_SUS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
CPUSB#
1.5V_NEWCARD
NEWCARD_DETECT
12
14
CN17
13,26,30 PCIE_WAKE#
3VAUX
+3.3V
OZ27C10LN-C1
13
13
2
4
GND4
USB_DUSB_D+
CPUSB#
RESERVED2
RESERVED1
SMB_CLK
SMB_DATA
+1.5V2
+1.5V1
WAKE#
+3.3VAUX
PERST#
+3.3V2
+3.3V1
CLKREQ#
CPPE#
REFCLKREFCLK+
GND3
PERn0
PERp0
GND2
SHIELD4
PETn0
SHIELD3
PETp0
SHIELD2
GND1
SHIELD1
C250
.1U/10V/X5_4
C
1.35A need 60 mil

13
USBP1113
USBP11+
NEWCARD_DETECT R163
*1K/F_4
STBY#
3.3VIN
AUXIN
3.3VIN
AUXOUT
SYSRST# 1.5VIN
CPPE#
1.5VIN
CPUSB#
PERST# 3.3VOUT
SHDN# 3.3VOUT
RCLKEN
OC#
1.5VOUT
GND
1.5VOUT
12 EPRESS_PLTRST#
2
3
R144
*PAD
1
17
15
6
10
9
PERST#
8
2231_SHDN# 20
RCLKEN
18
OC#
19
7
CP_RST#
3V_NEWCARD
C245
.1U/10V/X5_4
30
29
28
27
CP_RST#
4
U10
TC7SH08FU
3VAUX
1.5V_NEWCARD
C237
.1U/10V/X5_4
C242
.1U/10V/X5_4
CONN_NEWCARD
+3.3V
R168
10K_4
NEW-CARD_CLK_REQ#
PROJECT : SA8
Size
Custom
NB2/RD1
Document Number
Rev
1A
NEW CARD
Date:
A
Sheet
E
35
of
46
BATTERY CHARGER
Ver.B Change Footprint
C-Test Modify
R1
PR177
10K/F_6
2
PR179
*200K/F_6
5D/C#1
CSIN
PR180
D/C#
PR145
1M/F_4
PR151
0_4
*2N7002E
PQ38
100P/50V/NPO_4
CELL_SLT = 1 -- 3 S (Cells = GND 3S) Ver.B Modified.

CELL_SLT = 0 -- 4 S (Cells = VDD 4S)
VADJ
CHLIM
VADJ =
VERF >> 4.2V +5%
Float >> 4.2V
GND >> 4.2 -5%
ACLIM
PR206
29.4K/F_4
PU10
ISL6251AHAZ-T
PR207
*100K/F_4
CSON
Ver.B BOM change

ACOK
PD12
SW1010CPT
+3.3V_ALW
0_4
33
1
CC-SET
V ACLIM = VREF * (Rlow // 152K) / (Rhigh // 152K + Rlow// 152K)

Iin_max = (1/R1)[(0.05/Vref) * Vaclim + 0.05]
PR211
*100K/F_4
PC190
*1U/25V/X5R_6
PC184
*1000P/50V_4
+5V_ALW
Charging Curret setting =>

I chg = 165mV / R2 * (Vchlim / 3.3V)
SYS_I
+3.3V_ALW
PD13
SW1010CPT
33
PR214
10K/F_4
PR218
332K/F_6
PC185
*1000P/50V_4
D/C#
4
PU11
G1331T11U
PR216
10K/F_4
PR215
*0_4
PC183
3300P/50V_4
Rhigh
P/N
65W
178K/F_4
CS41782FB11
PQ61
2N7002E
90W
11K/F_4
CS31102FB11
ADP TYPE
Input Current monitor
V icm = 19.9 * (Vcsip - Vcsin)
BL/C#
33
Battery Low 7.5V
PROJECT : SA8
Ver.B PC185 NC
Ver.B PC184 NC
Size
Custom
NB2/RD1
Document Number
Rev
2A
CHARGER ( ISL6251)
Date:
4
33
PQ59
2N7002K-T1-E3
PR217
475K/F_6
Ver.B change PR214/PR216 from 100K to 10K
PQ58
2N7002K-T1-E3
Rlow
+PWR_SRC
PR212
PR213
100K/F_4
Ver.B Change BOM for EMI
PR210
100/F_4
PC182
2
2P
1
PC103 CSOP
VRFE
ICM
10U/25V/X5_1206
10U/25V/X5_1206
5
6
7
8
PR150
*100K/F_4
PR149
11K/F_4
PC167
.01U/50V_4
ACLIM
10
PC165
10U/25V/X5_1206
11
PC166
10U/25V/X5_1206
GND
VADJ
PC176
PR134
2.2_8
6251VREF
2200P/50V_4
13
12
3
2
1
PGND
BAT+
PD7
SW1010CPT
CELL_SLT
PR209
10K/F_4
.01U/16V_4
33
ACOK#
6251LR 1
6251CELLS_1
2N7002E
PQ36
PQ57
ME4410A
PR194
0.02/1W_3702
1P
ISL6251_LGATE
PQ56
SI4800BDY-T1-E3
PL12
10uH/4.4A
14
C-Test Modify
3
2
1
LGATE
VCOMP
26251VCOMP2
*100K/F_4
Setting the Vin min to 17V

For EN = 1.06V
PD5
UDZS5.6BTE-17
5
6
7
8
VDDP
ISL6251_PHASE
100P/50V/NPO_4
PR146
15K/F_4
PR205
*100K/F_4
PC105
1U/25V/X7_8
18
PC177
PR152
PHASE
VREF = 2.39V
ACIN
PD6
UDZS5.6BTE-17
6800P/25V_4
PC178
ISL6251_VDD
17
6251VREF
1 ISL6251_VDD
MBDATA 33
MBCLK
PC101
R2
UGATE
Rhigh
PR208
150K/F_4
EN
6251EN
6251ACIN
TEMP_MBAT 33
Ver.B BOM change
ACSET
CELLS
PC168
PC170
6251B_1
.1U/50V_6
ISL6251_UGATE
DCIN
6251ACIN
PC99
ICOMP
24
DCIN
33
PC169
ACPRN
23
Setting the Vin

PR202
min to 12V
For ACSET 1.26V 12.4K/F_4
33
PR80
330/F_4
ACOK_IN
PR203
100K/F_4
ACOK#
PR200
0_6
6251B_2
16
CSON
6251VCOMP1
CSON_1 22
PR201
10_6
PR204
10K/F_4
PR85
10K/F_4
+PWR_SRC
2
2
15
20
CSOP
PC172
.047U/10V_4
CSON
PC171
4.7U/6.3V/X5_6
1
2
CH501H-40PT
PD10
BOOT
PQ37
DTA124EUA
CN19
PR144
14K/F_4
PC77
.01U/16V_4
.1U/50V_6
ISL6251_VDD
PR148
4.7_6
ISL6251_VDDP
VDD
CSOP_1 21
CSIN
19
CSIP_1
PC173
.1U/50V_6
CSIP
CSOP
PR147
10K/F_4
Place these CAPs

close to FETs
+3.3V_ALW
PR198
20_6
CSIN_1
PR197
20_6
PC104
.01U/16V_4
*0_4
ACOK
3
PQ23
*2N7002K-T1-E3
PC175 1U//10V/X5_4
PR199
2_6
PC174
1U/25V/X7_8
MBATV
C-Test Modify
PR192
100K/F_6
PR81
330/F_4
6
PR196
20_6
33
PR78
*10K/F_6
2
1
CSIP
VA
*0_4
PQ43
*IMD2
C-Test Modify
PD11
SW1010CPT
ACOK_IN
PQ39
DTA124EUA
1
2
3
4
5
6
7
8
9
PR143
100K/F_4
PR79
*0_4
PR183
*0_4
PR193
200K/F_6
BATT+
8
7
6
5
SMC
PR178
PD14
P4SMAJ20A
PR191
*33K/F_6
CONN_BATTERY
PL11
HI0805R800R
1
2
3
4
SMD
PC125
.1U/50V_6
1000P/50V_4
PC115
.1U/50V_6
PR182
*200K/F_6
3
PC128
1U/25V/X7_8
D/C#1
PL2
HI0805R800R
PC2
.1U/50V_6
PC129
*.1U/50V_6
PQ55
AP6679GM
3
2
VAD-1
VA
1
5
6
2
3
4
PD8
PDS1040-13
1
1P
HI0805R800R
PL3
CSIP
CN15
CONN_DC_JACK90W
D
PL10
HI0805R800R
Place close to EC,
+PWR_SRC
PQ42
AP4435GH
CSIN 2P
PR171
0.02/1W_3702
VAD 1
65W for UMA
90W for Discrete
Sheet
1
36
of
46
TON: 5V / 3.3V
GND = 400 / 500KHz
REF = 400 / 300KHz
VCC = 200 / 300KHz
+PWR_SRC
Place these CAPs

close to FETs
+PWR_SRC
+5V_AL
PC30
4.7U/6.3V/X5_6
+5V_AL
6236AGND
1
I_lim*MOSFET(RDSON)=V_ILIM(mV)/10
V_ILIM(mV)=5uA*R_ILIM
2/21 For SMT open issue.
42
3
2
1
3V_DH
1
+
2
PAD
6236AGND
PR48
0_4
PC136
*100P/50V/NPO_6
40
PAD
PAD
PQ44
FDS6690AS_NL
PR47
*0_4
Rds(on) 15m ohm
PC141
Ver.B Change SHORT PAD

C
C-Test Modify
6237OUT2
6236AGND
PR39
1
2
1_6
PC42
*.1U/10V/X5_4
3V_DL
6236AGND
F30 rev.
PR43
0_4
PR44
*SHORT-1A
PGOOD2
*SHORT-1A
PGOOD1
6236AGND
PR30
*SHORT-1A
HWPG
6236AGND
33,38,39,42
.1U/50V_6
F30 rev.
PR184
*2.2/F_6
PC20
PD1
BAT54SPT
+12V_ALWP
Ver.B Change from .1U to 22U
C-Test Modify
B
+3.3V_ALW
PR46
*SHORT-1A
PC192
2.2U/25V/X5R_8
PR33
100K_4
5
6
7
8
+12V_ALW
243K/F_4
PGOOD2
PC32
1U/10V/X5_4
PR42
6236AGND
PD2
BAT54SPT
1
PR26
0_6
Del PJP5
and PJP6
PR181
.1U/50V_6
PL5
2.5uH/7.5A
1
3V_LX
PC25
3
PC21
2.2U/25V/X5R_8
PAD
41
2
5VBST1
32
31
30
29
28
27
26
25
38
39
PAD
PAD
PAD
LDOREFIN
LDO
IN
RTC
ONLDO
VCC
TON
REF
8
7
6
5
4
3
2
1
1
2
3
BST1
DL1
VDD
SECFB
AGND
PGND
DL2
BST2
1
2
3
1
Rds(on) 15m ohm
PR32 1_6
1
2
3VBST2
.1U/10V/X5_4
330U/6.3V
6236AGND
PAD
REFIN2
3VBST2R
PR28
0_4
PQ14
FDS6690AS_NL
5VBST1R
C-Test Modify
PC31
.1U/50V_6
PR41
0_4
PC40
PC17
*100P/50V/NPO_6
Rb
5V_DL
35
34
33
1
PC118
5V_DH
5V_LX
REFIN2
ILIM2
PU2
OUT2
SKIP
ISL6237IRZ-T
PGOOD2
ON2
DH2
LX2
PQ41
SI4800BDY-T1-E3
6236AGND
.1U/50V_6
PR31
*0_4
Ra
PC117
8
7
6
5
2
PR25
*2.2/F_6
6236FB1
243K/F_4
PGOOD1
6237ON1
PR29
BYP
OUT1
FB1
ILIM1
PGOOD1
ON1
DH1
LX1
PAD
PAD
+3.3V_ALW
4
PC142
.1U/10V/X5_4
9
10
11
12
13
14
15
16
37
36
17
18
19
20
21
22
23
24
+5V_ALW
PL1
2.5uH/7.5A
1
6236AGND
Rb around 49.9k
6236AGND
PC28
*.1U/10V/X5_4
PQ13
SI4800BDY-T1-E3
+3.3Volt +/- 5%
Countinue current:7.5A
OCP minimum:10A
6236AGND
PR40
0_4
TON
1U/10V/X5_4
6236AGND
8
7
6
5
Vout=0.7(Ra+Rb)/Rb
EC C-13
PC34
1U/10V/X5_4
PC41
.1U/10V/X5_4
Ver.B BOM change

4
Ver.B BOM change
REF
PC126
+5V_AL1
5
6
7
8
6237VIN
PC33
.1U/50V_6
Del PJP1
and PJP2
PC24
2200P/50V_4
Ver.B Change SHORT PAD
PC26
.1U/50V_6
PC29
10U/25V/X5_1206
+5V_ALW
PR37
150K/F_4
F30 rev.
6237ONLDO
Place these CAPs

close to FETs
330U/6.3V_6359
*SHORT-1A
+5Volt +/- 5%
Countinue current:7.5A
OCP minimum:10A
5
6
7
8
390K_4
3
2
1
PR35
PC127
10U/25V/X5_1206
*47_6
PR34
D
PC130
.1U/50V_6
PR38
PC131
2200P/50V_4
+PWR_SRC
+5V_AL
PR45
5 SYS_SHDN#
6237ON2
*SHORT-1A
39,41
MAIND
PQ18
SI4800BDY-T1-E3
F30 rev.
+5V_ALW
+3.3V_ALW
+5VSUS
PQ1
+5V
SI4800BDY-T1-E3
5A
41
SUSD
PQ17
PQ2
SI4800BDY-T1-E3
4A
ME3424
3
S0-S3
4
+5V_SUS
+5V
SUSD
+5V
+3V
5.76A
S0-S1
41
+3.3V_SUS
2A
S0-S1
A
PC45
.1U/10V/X5_4
6
5
2
1
MAIND 4
3
2
1
MAIND
3
2
1
39,41
+3.3V
5
6
7
8
5
6
7
8
3
2
1
+5V_ALW
+3.3V_SUS 13,30,31,35,38,39,41
15,20,23,24,25,27,28,29,32,33,34,38,41,42,43
PC1
.1U/10V/X5_4
+5V_SUS 24,31,32,41,43
PC43
.1U/10V/X5_4
PC3
.1U/10V/X5_4
PROJECT : SA8
Size
Custom
NB2/RD1
Document Number
Date:
5
Rev
2A
+5V/+3V(ISL6237)
Sheet
1
37
of
46
Ver.B Change PR21 from 0 to 2.2.

PD9
CH501H-40PT
Place these CAPs

close to FETs
PR19
2.0A
BST
5
1
2
3
PQ45
AOL1412
D
G
RTDL
RTFB
PR36
*2.2/F_6
PR8
6.34K/F_6
PR7
10K/F_4
PC35
*100P/50V/NPO_6
RDSon=4.1m-ohm
R1
RTPG
F33 rev.
R2
PQ15
ME3424
RTPG
9338EN
PR175
0_4
PGD
EN
+5V
1
PC122
*.1U/10V/X5_4
DRV
PC16
10U/4V/X6_8
PR27
47/F_4
PC19
.033U/25V_6
VCC
+1.1V
PR173
127/F_6
PR174
100/F_4
PR23
0_6
R1
RTLFB
+1.1V_DYN
High
Low
1.0
1.1
PR31 for UMA only
Ver.B Change Short PAD
R2
PR17
10K/F_4
PROJECT : SA8
PQ4
SST3904
Del PJP3
and PJP4
Vo=0.75(R1+R2)/R2
PQ6
2N7002E
2 2
S0-S1
10 DYN_PWR_EN
DYN_PWR_EN
D5-Change PR13
footprint to 0603
PC37
10U/4V/X6_8
PR13
26.7K/F_4
PC38
10U/4V/X6_8
PR15
3.4K/F_6
PC39
10U/4V/X6_8
R1
C-Test Modify
PC11
22P/50V/NPO_4
+5V_ALW
PR4
2.2K_4
7.0A
+1.1V_DYN
Vout1=(1+R1)/R2*0.5
+1.1V
PQ16
SI4856ADY-T1-E3
PC14
C1-Test Modify
PR3
100K_4
PC27
10U/4V/X6_8
PC36
.1U/10V/X5_4
R2
Keep R2 higher than 10Kohm
22P/50V/NPO_4
PC124
.1U/10V/X5_4
GND
PC7
9338ADJ
G9338-ADJTBUF
ADJ 5
R_ILIM=I_LIMIT*Rsense/20uA
RTLDRI
22P/50V/NPO_4
33,37,39,42 HWPG
PU8
Vo=0.75(R1+R2)/R2
+1.2V
3
2
1
PR176
*0_4
9338DRV 3
PC23
.1U/10V/X5_4
C-Test Modify
C1-Test Modify
F32 rev.
4
PC15
.1U/10V/X5_4
PC22
10U/4V/X6_8
+1.1V
F5
6
5
2
1
Size
B
NB2/RD1
Document Number
Rev
2A
+1.2V & +1.1V(RT8204)
Date:
5
PC6
100P/50V/NPO_4
PC12
0.22U/6.3V/X5_4
5
6
7
8
+1.2V
S0-S1
Del PJP8
and PJP9
C-Test Modify
20K/F_4
C-Test Modify
3.4K/F_4
13
9
VDDP
VOUT
LDRI
FB
LEN
14
F4
DL
PC133
560U/2.5V_6358
reserved for pwr seq -- andrew
PAD
ILIM
10
+1.2V
PL4
MPO104-1R5/1.5u/20A
2
1
PR20
PC123
*560U/2.5V_6358
*0_4
17
RTLX
PC120
*.1U/10V/X5_4
PR16
RT8204PQWILIM
C1-Test Modify
PC121
*10U/4V/X6_8
PC10
*100P/50V/NPO_4
33,41,42 MAINON
11
EN/DEM
LFB
0_4
LX
S0-S1
Ver.B BOM change
PQ40
AOL1414
RTEN 15
VRON
PU1
15A
LPGD
DH
RTDH
+1.2V
PGD
PC13
.1U/50V_6
12
1
2
3
RTLEN
33,40
PR10
*SHORT-1A
PR12
RTPG
RTLPPG
F31 rev.
33,37,39,42 HWPG
TON
RBST
VDD
RTTON 16
PR9
47K/F_4
E5
PC132
*10U/25V/X5_1206
1U/10V/X5_4
PR11
604K_4
PC134
10U/25V/X5_1206
8204VDD
Frequency=Vout/(VIN*TON)
PR21
2.2/F_6
PC135
.1U/50V_6
PC116
PC137
2200P/50V_4
+3.3V_SUS
PC119
1U/10V/X5_4
PR172
10_6
+PWR_SRC
Ton=3.85p*R_TON*VOUT/(VIN-0.5)
+PWR_SRC
RTBST
+5V_ALW
D
Sheet
1
38
of
46
+PWR_SRC
+1.8VSUS
18A
Ver.B Change PR21 from 0 to 2.2.
C1-Test Modify
1.8V_LX
20
LL
1.8_DL
19
PQ62
AOL1412
14
PR162
Rds(on) 7.25m ohm
13
HWPG
*SHORT-1A
S5
11
S5ON
TPS51116RGERS3
10
S3ON
VLDOIN
23
+1.8V_SUS
VDDQSNS
1.8V_FB
VDDQSET
COMP
51116_V5FILT
PR156
0_4
6
7
12
VTTGND
MODE
VTT
VTTSNS
COMP
NC
NC
*0_4
51116_V5FILT
SUSON
PR160
PR155
51.5K/F_4
+0.9VSMVTT
PC112
10U/4V/X6_8
PC113
10U/4V/X6_8
24
2
PGND
18
PAD
GND
25
3
+0.9VSMVTT 4,7,43
VTTSNS
PR168
0_4
PR166
*0_4
VDDIO_FB_H
PR153
*0_4
+1.8V_SUS
PR164
0_6
Differential Pair
4,6 +0.9VSMVREF
VDDIO_FB_L 3
SHDN
VIN
GND
+1.8V_SUS
5
6
7
8
D4-4/15 Change MAINON to MAIND
VOUT
37,41
MAIND
R616
*0_6
+1.8V
6A
PQ53
SI4800BDY-T1-E3
+3.3V_ALW
R1
SET
+
PR60
100K/F_4
V5IN
No discharge
VDDQ
Tracking discharge
Gnd
Non-tracking discharge
PC56
4.7U/6.3V/X5_6
5SET
R617
0_6
I_OCP=V_trip/Rds_on+I_Ripple/2
VDDQSET
S0~S1
VDDQ(V)
VTTREF and Vtt
GND
+1.8V
G913C
Vout=1.25(1+R1/R2)
+1.8V
PR61
100K/F_4
F1
V5IN
3,8,10,11,12,16,24,27,41
PC193
10U/4V/X6_8
17,41 1.8V_OND
PC48
10U/4V/X6_8
R2
FB
2.5
V_ vddqsns/2
1.8
V _vddqsns/2
adjustable
DDR
DDR2
V_VDDQSNS/2
1.5V<VDDQ<3V
1
PROJECT : SA8
Ver.B Change from .1U to 10U

Size
Custom
NB2/RD1
Document Number
Rev
2A
1.8VSUS/DDR_VTER/+1.8V/2.5V
Date:
A
Note
3
2
1
PC63
1U/10V/X5_4
PC65
.1U/10V/X5_4
Discharge Mode
V_TRIP(mV)=R_TRIP(Kohm)*10(uA)
+2.5V
4
Mode
5A
S0~S1
SI power
PU4
VR2.5_ON
C1-Test Modify
+2.5V
0.25A
Close to CPU
33
S0~S3
PR165
MODE
PC108
.033U/25V_6
CPU_VTT_SENSE 4
+0.9VSMVT
1.53A
0_4
Ver.B Add
PR68
10K_4
33,41
0_4
PC114
1U/10V/X5_4
PR157
*0_4
Rb
33,37,38,42
PR163
0_4
DRVL
1.8V_OUT
C-Test modify
Ver.B Pull high at EC Page
F34 rev.*10K_4
16 CS
3
2
1
+3.3V_SUS
PR169
7.15K/F_6
G
4
PR159
Ver.B remove
15
DRVH
CS_GND
PR158
0_4
PC106
*100P/50V/NPO_4
Fix 1.8V Output
21
VTTREF
Ra
PR154
75K/F_4
1.8V_DH
D
G
3
2
1
1
2
PQ63
*AOL1412
D
PR219
*2.2_8
PC191
*100P/50V/NPO_6
PC107
.1U/10V/X5_4
PC180
560U/2.5V_6358
PC181
560U/2.5V_6358
PC109
1U/10V/X5_4
PR161
PGOOD
G
S
CS
3
2
1
PL13
1.5uH/20A
2
.1U/50V_6
Ver.B Change Footprint
C-Test modify
51116_BST
22 VBST
V5FILT
Rb value from 100K to 300K ohm
PQ60
AOL1414
V5IN
PC111
5
Ra=(Vout-0.75)/0.75*Rb
10_6
PU7
PR170
2.2/F_6
51116_V5FILT
PC110
2.2U/6.3V/X5_6
17
Del PJP12
and PJP13
and PJP14
PR167
PC187
2200P/50V_4
PC186
.1U/50V_6
Ver.B BOM change
C-Test modify
I_lim(Valley)=10uA*R_ILIM/RDS_ON
For OCP set.
+5V_ALW
Place these CAPs

close to FETs
1
2
+1.8V_SUS
PC188
10U/25V/X5_1206
PC189
*10U/25V/X5_1206
S0~S3
PC179
100U/25V_6.3X7.7
PC138
100U/25V_6.3X7.7
Sheet
E
39
of
46
Ver.B footprint
Del
PJP7
EC30
PR104
22.1K/F_4
PC84
1U/10V/X5_4
Output
51P/50V/COG_4
33
CPU_SVC
PR116
1
0_4
2
SVC
PGND_0
32
PR118
1
0_4
2
ENABLE
LGATE_0
31
RBIAS
PVCC
30
OCSET
LGATE_1
29
BOOT_1
25
PQ50
AOL1414
PR122
PR126
ISN_1
24
23
ISP_1
VW_1
COMP_1
22
21
20
FB_1
VDIFF_1
VSEN_1
19
18
RTN_1
17
RTN_0
16
ISN_0
14
ISP_0
13
1
2
3
1
2
3
PR185
2.2_8
D7-Change
PC148
footprint
C1-Test Modify
2
1
1
2
0_4
PC98
0_4
G
4
2
1
PC100
.1U/50V_6
1000P/50V_4
PR132
*4.02K/F_4
D
D
PC55
330U/2.5V/ESR9_7
PQ51
AOL1412
ISN_0
10_4
PQ52
AOL1412
PR137
PR139
.22U/25V/X5_6
PC145
330U/2.5V/ESR9_7
C1-Test Modify
+VCORE0
PC91
PL7
0.36uH/30A
Ver.B Add PQ47, PQ51
PC148
2200P/50V_4
ISP_0
1_6
PR133
3.65K/F_4
PR129
Close to
CPU
socket
Ver.B Change FootPrint

S
PC201
330U/2.5V/ESR9_7
PC94
1000P/50V_4
VSEN_0
VW_0
6.81K/F_4
15
12
PC96
180P/50V/NPO_4
+VCORE1
D
G
UGATE_1
UGATE_1
26
PHASE_1
27
1
2
3
1200P/50V_6
COMP_0
54.9K/F_4
5
1
2
3
C-Test modify
PGND_1
PHASE_1
FB_0
2/20 Change PC44 footprint.
VDIFF_0
4.7U/6.3V/X5_6
LGATE_1
28
PC92
11
C1-Test Modify
EC C-03
10
ISL6265HRTZ-T
PC146
10U/25V/X6_1206
PR119
1K/F_4
ISN_0
PC88
Pin 49 is GND Pin
ISP_0
+PWR_SRC
+5V_ALW
PC144
10U/25V/X6_1206
C1-Test Modify
LGATE_0
PC50
.1U/50V_6
PR117
10K/F_4
1
2
3
180P/50V/NPO_4
107K/F_4
PC89
4700P/25V_4
PC49
2200P/50V_4
PR120
D
G
1
2
3
PR121
D
G
PHASE_0
PHASE_0
PQ48
AOL1412
34 UGATE_0
SVD
.22U/25V/X5_6 PQ47
AOL1412
UGATE_0
PR49
2.2_8
5
PWROK
0_4
2
+VCORE0
PC87
37
38
PHASE_NB
UGATE_NB
40
39
LGATE_NB
PGND_NB
41
PR115
1
6265AGND
OCSET_NB
6265VCC
2
42
43
RTN_NB
VSEN_NB
45
FB_NB
46
47
VCC
44
VIN
COMP_NB
36 BOOT_NB
35 BOOT_0
1_6
PC90
PR125
BOOT_0
CPU_SVD
VRON
255/F_4
BOOT_NB
PL6
0.36uH/30A
1
PC44
2200P/50V/X7_4
33,38
PR109
1_6
0_4
2
10K_4
3
PR113
Ver.B BOM change
D
G
PU6
PR111
3 CPU_PWRGD_SVID_REG
PR220
PGOOD
PQ49
AOL1414
PC140
330U/2.5V/ESR9_7
*SHORT-1A
PC83
.1U/50V_6
*10K_4
16 VRM_PWRGD
Ver.B Update
OFS/VFIXEN
Ver.B Change FootPrint
UGATE_NB
PR105
1
PHASE_NB
PC139
330U/2.5V/ESR9_7
PR110
LGATE_NB
PC200
330U/2.5V/ESR9_7
6265AGND
F35 rev.
2
Ver.B Change to 12.1K
PR108
12.1K/F_4
2
1
GND
PR107
*0_4
+3.3V_ALW
PR112
10K_4
6265AGND
2
48
+3.3V_ALW
6265VIN
PR106
0_4
1
49
+5V_ALW
PR103
PC85
.01U/50V_4
*short
6265AGND
0_4
0.8
PC86
1.0
PR102
0_4
PR101
44.2K/F_6
33P/50V/NPO_4
+PWR_SRC
6265AGND
PR195
SI4914DY-T1-E3
PC147
10U/25V/X6_1206
1.0
LGATE_NB
PC143
10U/25V/X6_1206
S2 4
PC47
.1U/50V_6
PR97
10_6
PC46
2200P/50V_4
1.1
PC81
1200P/50V_6
G2 3
Ver.B Add for EMI.
FSET_NB
+PWR_SRC
PC82
SVD
1000P/50V_4
PR96
10_6
150P/50V/NPO_4
47/F_4
Close to
CPU socket
+5V_ALW
D1 2
C1-Test Modify
EC38
6265AGND
Pre-PWROK Metal VID Codes

SVC
5V
PR90
3 CPU_VDDNB_RUN_FB_L
7 S1/D2
PC164
10U/25V/X6_1206
3.3V
PL9
3.3UH/11A_10
PC163
.1U/50V_6
47/F_4
1.2V
+PWR_SRC
D1 1
PC162
2200P/50V_4
C-Test modify
PC67
.1U/10V/X5_4
PR91
3 CPU_VDDNB_RUN_FB_H
PC161
VFIXEN
560U/2.5V_6358
OFS
PQ54
8 G1
UGATE_NB
+CPUVDDNB
ISL6265 Pin1
PC93
.1U/50V_6
PR123
*4.02K/F_4
Ver.B BOM change

ISP_1
PR124
3.65K/F_4
PR130
PR141
6.81K/F_4
3 CPU_VDD0_RUN_FB_L
PR127
3 CPU_VDD0_RUN_FB_H
0_4
10_4
ISN_1
C1-Test Modify
Parallel
PR135
*1K/F_4
PR128
0_4
3 CPU_VDD1_RUN_FB_H
PR136
255/F_4
10_4
PR140
PR138
+VCORE1
54.9K/F_4
PC95
180P/50V/NPO_4
PR131
1K/F_4
3 CPU_VDD1_RUN_FB_L
PC97
4700P/25V_4
10_4
PC102
Reserve for uni-plane
1200P/50V_6
PR142
+1.8V_SUS
Close to
CPU socket
+VCORE0
+VCORE1
PR50
2
1
4
*0.001_2512
Reserve for uni-plane
PROJECT : SA8
Size
C
NB2/RD1
Date:
A
Document Number
Rev
2A
CPU_CORE(ISL6265)
Sheet
H
40
of
46
+12V_ALW
+5V
+PWR_SRC
+PWR_SRC
+3.3V
+12V_ALW
LANVCC_L
+3.3V_ALW
PR92
1M_4
PR87
0.8A
PQ5
2N7002E
LAN_POWER_G2
2200P/50V_4
PQ8
PDTC144EU
33 LAN_POWER
LANVCC_L
PC4
2
PQ30
2N7002E
PQ25
CH2507SPT
PQ26
PDTC144EU
PQ3
*2N7002E-G
PR82
1M_4
33,38,42 MAINON
2200P/50V_4
MAINON_G
PQ7
FDC655BN
PC78
3
PQ24
2N7002E-G
PR5
1M_4
PR6
*22_8
PR1
1M_4
37,39
LAN_ON
1M_4
MAIND
1
2
5
6
PR76
22_8
PR86
22_8
PC5
PR2
1M_4
.1U/10V/X5_4
D10-Add PR76,PR86,PQ24 and PQ25 for LCD flash.
+3.3V_SUS
+PWR_SRC
+1.1V
+5V_SUS
+12V_ALW
PR98
22_8
PR77
22_8
PR99
1M_4
PR89
*22_8
SUSD
37
PQ31
*2N7002E-G
PC80
2200P/50V_4
+1.8V
PR88
1M_4
PQ33
2N7002E
+PWR_SRC
2/20 Add leak circuit.
PR93
1M_4
UMA
PR84
*0_4
33,38,42 MAINON
1
2
5
6
S5_OND
PQ11
2N7002E-G
PR22
1M_4
33
3
PC9
2200P/50V_4
PQ12
PDTC144EU
PQ10
PR24
1M_4
S5_ON
+3.3V_S5
2200P/50V/X7R_4
VCORE_PG_G
F6
PQ29
2N7002E
M86ON
PR221
0_4
F2-Add PR221 for EC control.

0.07A
+3.3V_S5 13,15,16,34
PC8
.1U/10V/X5_4
2N7002E
D
33,42
Dis
PQ9
ME3424
PR18
22_8
F3-Change to no stuff.
1.8V_OND 17,39
PC79
PR14
1M_4
PQ28
PDTC144EU
+3.3V_ALW
+3.3V_S5
+PWR_SRC
PR83
*0_4
Dis
PQ32
*2N7002E-G
PR94
1M_4
42 VCORE_PG
+12V_ALW
PR95
1M_4
2
EC C-08
+12V_ALW
PR114
*22_8
PQ35
PDTC144EU
SUSON
PQ34
2N7002E-G
33,39
PQ27
2N7002E-G
SUSON_G
SUSD
PR100
1M_4
S5_ONG
PROJECT : SA8
Size
Custom
NB2/RD1
Document Number
Rev
1A
DISCHARGE
Date:
1
Sheet
5
41
of
46
ATI M86
VDD_CORE
5
6
7
8
11
8118CSP
1.5uH/20A
PQ22
FDS6690AS_NL
CSN
12
PL8
PR63
511K/F_4
PR59
51.1/F_4
PC153
+VGA_CORE 18,20,43
PR64
100K/F_4
PC57
4700P/25V_4
Ver.B footprint
GNDA1
17
CSP
Ver.B BOM change
PR67
*2.2/F_6
C-Test modify
8118CSN
PR186
5.6K/F_4
PC151
22P/50V/NPO_4
PC150
1000P/50V_4
LDR
8118LDR
C1-Test Modify
PC54
.022U/25V_6
8118AGND
PC51
1000P/50V_4
PR53
210K/F_6
PC53
.1U/50V_6
PC149
1000P/50V_4
PQ20
2N7002E
F37 rev.
PR56
*130K/F_6
8118LX
TSET
8118AGND
PR57
54.9K/F_6
PU3
OZ8118LN
3
2
1
VREF
PR55
0_4
8118VDDA
VSET
8118VREF 14
15
10
LX
ON/SKIP
13
8118TSET
PR58
82.5K/F_6
+VGA_CORE
Del PJP10
and PJP11
PC152
PR66
10K_4
PQ21
SI4800BDY-T1-E3
PC66
.1U/50V_6
PC69
*100P/50V/NPO_6
PC64
*100P/50V/NPO_4
8118VSET
PR54
150K/F_6
8118HDR
560U/2.5V_6358
8118EN
D14-change PR54 from 330K to 150K for SA8 MP.
HDR
8118BST
PGD
F36 rev.
VCORE_PG
33 GPE1
15K/F_4
*SHORT-1A
*SW1010CPT
41
8118PG
BST
PR69
33,37,38,39 HWPG
PR70
VIN
S0~S1
.1U/10V/X5_4
PD3
3
2
1
D2- Delete PD3 for power protection.
8118VIN
.01U/50V_4
PR71
0_6
5
6
7
8
8118AGND
PR74
10K_4
16
8118AGND
PC60
+VGA_CORE
9.4A
PC160
*10U/25V/X5_1206
+5V_ALW
PC68
1U/10V/X5_4
PC75
10U/25V/X5_1206
PC52
1U/10V/X5_4
PC73
.1U/50V_6
PR62
1K_4
+PWR_SRC
PC71
2200P/50V_4
18 GFX_CORE_CNTRL0
+5V_ALW
PR73
20_6
VDDP
0.95V
GNDP
0.9V
VDDA
1.1V
PD4
CH501H-40PT
OCT
PWRCTL0
PWRCTL1
C1-Test Modify
PR187
18 GFX_CORE_CNTRL1
8118AGND
PQ19
2N7002E
*short
8118AGND
F37 rev.
8118AGND
C1-Test Modify
Ver.B Add +1.35V power supply for A11 version of RS780.
F4
20K/F_4
F5
PC154
0.22U/6.3V/X5_4
1
2
3
4
+5V_ALW
POK
VEN
VIN
VPP
S0-S1
PC155
.1U/10V/X5_4
+1.2V_S5
8
7
6
5
GND
ADJ
VO
NC
+1.2V_S5 15
R1
G966-25ADJF1UF
PC158
4.7U/6.3V/X5_6
0.5A
S0~S5
PU9
+3.3V_ALW
Ver.D Del +1.35V power supply for A11 version of RS780.
+1.2V_S5
0.5A
S5EN_G966
966ADJ
PR189
S5_ON
33,41
PR190
51.1K/F_6
PC157
10U/4V/X6_8
PC156
.1U/10V/X5_4
PC159
.1U/10V/X5_4
R2
PR188
100K/F_4
C-Test Modify
Vo=0.8(R1+R2)/R2
R2<120Kohm
+1.8V_SUS
PC62
PC58
10U/4V/X6_8 .1U/10V/X5_4
VIN
POK
VIN1
GND
PR65
10K_4
APL5913KAC-TRL
EN
VOUT
VCNTL
VOUT
PC59
.1U/10V/X5_4
PC61
.1U/10V/X5_4
FB
8
+5V
S0~S1
+1.5V
5913EN
33,38,41 MAINON
+1.5V
2.0A
PU5
+1.5V
PR75
5913FB
PC70
.1U/10V/X5_4
PC76
10U/4V/X6_8
30,35
PC74
10U/4V/X6_8
R1
41.2K/F_6
PR72
47K/F_4
R2
PC72
56P/50V/NPO_6
PROJECT : SA8
Vo=0.8(1+R1/R2)
Size
C
NB2/RD1
Document Number
Rev
2A
VGA PWR 1.2V_S5/+1.5/+1.35V
Date:
Sheet
1
42
of
46
CPU SCREW HOLE

HOLE19
*H-TC315D169P1
MINI PCI-E SCREW HOLE 2
HOLE14
*H-TC315D169P1
HOLE18
*H-TC315D169P1
HOLE30
H-C236D142P2
MINI PCI-E SCREW HOLE 1
HOLE33
H-C236D142P2
MDC SCREW HOLE
HOLE32
HOLE31
H-C236D142P2 H-C236D142P2
HOLE23
H-C236D142P2
NB SCREW HOLE
HOLE5
H-C236D142P2
HOLE27
H-C236D142P2
HOLE28
H-C236D142P2
HOLE15
*H-TC315D169P1
HOLE20
HOLE17
*h-ts7bs8d110p2 *H-TS354BC280D110P2
HOLE9
HOLE22
*h-o118x125d118x125n*H-C98D98N
HOLE7
*H-C236D118P2
HOLE6
*H-C236D118P2
F7-Del HOLE29
HOLE16
*h-ts5bs6d110p2
HOLE26
*h-tc276bs3d196p2
HOLE25
*h-ts2bs2d110p2
Ver.B Delete Hole11, Hole12

1
HOLE24
*H-TC276BC354D110P2
HOLE13
*h-te433bs354d110p2
HOLE3
*H-TS314BS1D110P2
HOLE1
HOLE10
HOLE4
*h-ts4bs8d110p2 *h-ts8bs8d110p2 *h-ts1-be354x354d110p2
Change Hole23,27 to BOT side.

Change Hole5 Footprint and Side.
HOLE21
*H-C236D110P2
HOLE8
*H-TC276TD110RB
HOLE2
*h-ts314bs354d119p2
ADO_GND
Add ESD component

to close R33
Ver.B Add
C817
C818
+5V
C819
EC12
EC13 EC11
.1U/10V/X5_4
EC4
+5V
.1U/10V/X5_4
EC28
EC8
EC29
*Varistor_4
EC37
EC36
+5V
100P/50V/NPO_4
Ver.B Add
EC35
EC34
*Varistor_6
EC33
EC10
+5V
EC22
+PWR_SRC
*Varistor_6
EC26
+PWR_SRC
.1U/10V/X5_4
EC23
+3.3V_ALW +3.3V_ALW +3.3V_ALW
.1U/10V/X5_4
EC42
+3.3V_ALW
.1U/10V/X5_4
EC41
+5V_SUS
100P/50V/NPO_4
EC40
.1U/10V/X5_4
EC39
+5V_SUS
.1U/10V/X5_4
+5V_SUS
.1U/10V/X5_4
+5V_SUS
51P/50V/NPO_4
+5V_SUS
150P/50V/NPO_4
+5V_SUS
.1U/10V/X5_4
+5V_SUS
.1U/10V/X5_4
+5V_SUS
.1U/10V/X5_4
+5V_SUS
100P/50V/NPO_4
+3.3V
51P/50V/NPO_4
+3.3V
51P/50V/NPO_4
+3.3V
150P/50V/NPO_4
+3.3V
EC32
+3.3V
150P/50V/NPO_4
+3.3V
+3.3V
EC17
.1U/10V/X5_4
+3.3V
EC16
.1U/10V/X5_4
EC1
.1U/10V/X5_4
EC5
+3.3V
.1U/10V/X5_4
+3.3V
100P/50V/NPO_4
+3.3V
Add ESD component to close PC71 and EC20

+PWR_SRC
+0.9VSMVTT +0.9VSMVTT +0.9VSMVTT +0.9VSMVTT +0.9VSMVTT
*Varistor_4
+0.9VSMVTT
+0.9VSMVTT
+0.9VSMVTT
+0.9VSMVTT
+1.8V_SUS
+1.8V_SUS
+PWR_SRC
+PWR_SRC
+PWR_SRC
+PWR_SRC
+1.8V_SUS
+1.8V_SUS
EC20
EC49
EC50
Ver.B Add
EC21
.1U/50V_6
100P/50V/NPO_4
EC48
51P/50V/NPO_4
Ver.B Add
EC47
51P/50V/NPO_4
EC46
150P/50V/NPO_4
EC45
150P/50V/NPO_4
.1U/10V/X5_4
EC44
51P/50V/NPO_4
.1U/10V/X5_4
EC43
51P/50V/NPO_4
EC15
150P/50V/NPO_4
EC24
150P/50V/NPO_4
+VGA_CORE +VGA_CORE +VGA_CORE +VGA_CORE
EC18
.1U/10V/X5_4
Add ESD component to close

C762 and EC39
EC19
100P/50V/NPO_4
EC14
100P/50V/NPO_4
*Varistor_4
C821
1
C820
EC27
.1U/50V_6
EC25
.1U/50V_6
EC3
.1U/50V_6
EC2
EC9
EC7
.1U/10V/X5_4
.1U/10V/X5_4
.1U/10V/X5_4
100P/50V/NPO_4
EC6
PROJECT : SA8
Size
Custom
NB2/RD1
Document Number
Date:
5
Rev
2A
EMI PAD &Hole

Sheet
1
43
of
46
Ver.A to Ver.B
PAGE 3
Add C807 for Old CPU Boot-up issue.

NC R212 for Debug reserved.
Correct REST_L,PWROK,LDTSTOP_L,LDTREQ_L to +1.8V...12/14
Add R594,R595,R596 for Griffin Sighting issue...12/18
Add test PAD for TEST7,TEST8...12/18
(1) Change SATA ODD connector for SMT issue.

PAGE 30
PAGE 6
PAGE 31
(1) Modify DDR Socket footprint, and change Part to Heigh 4/8.
(1)
(2)
(3)
(4)
PAGE 10
and DDC connection for Hybrid.
TMDS connection. for M86.
control logic.
control logic, add R586 for UMA reserved..12/14
Change CN5 Footprint for SMT issue...12/12

Add EC31 close to CN25.1 for EMI...12/17
Add L84,C814 for BICLK EMI...12/17
Change R569,C798 BOM for EMI...12/17
PAGE 32
(1) Delete C492, Already have USB Bulk in design.
PAGE 11
PAGE 33
(1) Mount L32 for NB 1.2V source.
(1) Correct ABDATA netname.

(2) Correct EC output ABCLK,ABDATA netname.
(3) Correct VRON net and remove R546 due to VRON
pull-low at power page.
(4) Correct SM Bus level shift VGS control.
(5) Add R572 to connect VRON.
(6) Add ESD(Reserved) solution for Led_On#1 and LED_ON#...12/14
(7) Add L85,C813 for VRON EMI...12/17
(8) Update Xtal Y6 CLoad to 18P...12/25
PAGE 12
(1) Correct CMOS Battery connector connection.
(2) Connect GPIO35 for PX_EN control.
(3) C698,C364 change BOM for EMI...12/17
PAGE 13
(1)
(2)
(3)
(4)
(5)
(1) Add LPC connection for CN26, Futher Wirelss support.
(1) Correct SM Bus Level Shift VGS control.
Add CRT Sync

Add Hot Plug
Modify PX_EN
Update PX_EN
PAGE 29
PAGE 5
(1)
(2)
(3)
(4)
(1) Swap AMp Pin9/7 connection to Pin5/17 for Singal

End input Spec, Also change 726 to 1U for pop issue.
(2) Change Q38 to 2N7002E.... 12/12
(3) Add ESD solution(Reserved) for Audio...12/14
(4) Add 100Ohm in series with DMIC_CLK...12/14
(5) EMI BOM change for Speaker out...12/17
(6) Add R591,R592,R593 for ADO/GND EMI...12/17
(1) Update Xtal Y2 Cload to 33P...12/25
(1)
(2)
(3)
(4)
(5)
PAGE 28
PAGE 2
Correct GPIO6, GPIO39 netname.

Change USB Port9 to Port2 due to Phoenix BIOS can't program in DOS mode.
Correct R180 BOM error.
Add R583 to pull high PCI_PME# to solve CardController S3 floating issue...12/12
Add L86 for EMI...12/17
PAGE 14
(1) Correct U12 Power and GND Pin define.
(2) Update 25MHz Xtal Cload to 27P...12/25
PAGE 34
(1) Remove ODD LED indicator.
(2) Change CN10 Footprint for SMT issue...12/12
(4) C802 BOM change for EMI...12/17
PAGE 15
(1) Correct U27.F12 connection.
PAGE 16
POWER CHANGES
(1) Reserve R486 for old version of SB700.

(2) Add AD[30..31] Reserved PD...12/17
PAGE 18
PAGE 36
(1) Correct HDMI P/N connection for Discrete HDMI issue... 12/14
(2) Update XTAL Y3 to 6.8P...12/25
(1)
(2)
(3)
(4)
(5)
(6)
PAGE 23
(1) Add Isolation Logic for HPD signal...Cancel change on 12/18
Change PR214/PR216 from 100K to 10K.

Change CN15 DC Jack Footprint for SMT issue.
Delete PC185, PC184.
PR134,PC103 BOM change for EMI...12/17
PC101,PC168,PC165,PC166 change BOM...12/17
NC PQ38, PR205, Mount PR151...12/19
PAGE 37
PAGE 24
(1) Change PJP1,2,5,6 Open PAD to SHORT PAD

(2) Change PC21,PC18 from .1U to 22U
(3) PC127,PC29 change BOM...12/17
(1) Remove VGA to LVDS Jump connection.RN1,2,3,4,5,7,9,13.

(2) Add Isolation and Wired Or Logic for LVDS control signal.
B
PAGE 38
PAGE 25
(1)
(2)
(3)
(4)
(5)
(1)
(2)
(3)
(4)
(5)
Add U1/U2 Synce connection from VGA for Hybrid.

Change +5VCRT source for DDC leakage issue.
Add F2 for CRT Pin9 5V current limit.
Add Isolataion Logic for Sync control.
Change L18,L19,L21 BOM for EMI...12/17
Change PJP8,9,3,4 Open PAD to SHORT PAD

Change PR21/PR36 from 0 to 2.2.
PQ46 remove...12/17
Change PL4 PN...12/17
PC134 change BOM...12/17
PAGE 26
PAGE 39
(1) Change 10/100 transformer PN for material issue...12/31
(1)
(2)
(3)
(4)
(5)
(6)
(7)
(8)
(9)
PAGE 27
(1) Remove C110,C111 for VCC fast discharge...12/20
Change PJP12,13,14 Open PAD to SHORT PAD

Remove PR162 due to HWPG Pull-High at EC Page.
Change PQ60,62,63 footprint and material.
Add +1.8V Bulk, PC48, PC193.
Change PR170 from 0 to 2.2Ohm
Change PL4 PN...12/17
PC188 change PN...12/17
Remove PR159...12/22
Add PR154,PR155 to fine tune +1.8V...12/22
PAGE 40
(1) Change PQ49,PQ48,PQ47,PQ50,PQ51,PQ52 footprint and material.
(2) Change PR108 to 12.1K.
(3) Add VRON PullLow PR220= 10K.
(4) Change PR121 to 22K.
(5) Update PL9 Footprint.
(6) Add PQ47,PQ51.
(7) Add EC30/EC38 for EMI...12/17
(8) PR185,PR49,PC148,PC44 BOM change for EMI...12/17
(9) Change PJP7 footprint.
(10) Change PC145,PC55 to ESR9 material for 3DMark ripple issue...12/31
PAGE 42
(1)
(2)
(3)
(4)
(5)
(6)
(7)
(8)
Add VGA core vary control for M86/M82 Config.

Change PR54 from 665K to 604K; PR53 from 665K to 240K...12/21
Change PR58 from 165K to 147K...12/19
Change PR57 from 110K to 100K.
Add +1.35V support.
PC75 change PN...12/17
Change PJP10,PJP11 footprint...12/17
Change PL8 to 1.5uH/20A...12/19
PROJECT : SA8
PAGE 43
(1)
(2)
(3)
(4)
5
Delete Hole11, Hole12.

Change HOLE23,HOLE27 to Bottom side.
Change Hole5 Footprint and Side.
Add EMI decoupling...12/17
3
Size
C
NB2/RD1
Document Number
Rev
1A
Change List Ver.A to Ver.B
Date:
Sheet
1
44
of
46
PAGE 34
(1)
EC C-01
2/20
for LED +3.3V_LED and +5V_LED
leak electricity.
PAGE 33
(2)
EC C-02
2/20 KBC change to 8502JX Pin12 need add two Cap.
PAGE 40
(3)
EC C-03
2/20 Change PC44 footprint.
PAGE 30
(4)
EC C-04
2/20 Add Pin.17 and Pin.19 for debug port.
PAGE 24
(5)
EC C-05
2/20 Change LID switch to Hall IC.
PAGE 32
(6)
EC C-06
2/20 Add C680 for FAN speed issue.
PAGE 15
(7)
EC C-07
2/20 Del R465 and Add R237 for SB source.
PAGE 41
(8)
EC C-08
2/20 Add leak circuit.
PAGE 27
(9)
EC C-09
2/20 Change for new card-reader IC.
PAGE 21
(10)
EC C-10
2/20 Change VGA thermal IC to 781-1P8.
PAGE 5
(11)
EC C-11
2/20 Change CPU thermal IC to 781-1P8.
PAGE 21
(12)
EC C-12
2/20 For M86 HDMI audio issue.
PAGE 37
(13)
EC C-13
2/21 For SMT open issue.
PAGE 26
(14)
EC C-14
2/21 Footprint for SMT open issue.
PROJECT : SA8
Size
B
NB2/RD1
Document Number
Date:
5
Rev
1A
Change List Ver.B to Ver.C

Sheet
1
45
of
46
D12-Add R115,R120 Reserve for AMD requement.
(13)
D13-Add C828,C829,C830,C831,C832 Reserve for +VGA_CORE Power.
(14)
D14-Change PR54 value from CS43303F912 to CS41503F914 for SA8 MP.
(01) D1-R241 Delete for AMD request.
(48)
F29-Change R311,R313,R312 from no stuff to 180ohm for EMI.
(50)
F30-PR30,PR34,PR44,PR45,PR46 change from 0 to short pad.
(51)
F31-PR10 change from 0 to short pad.
(52)
F32-Add PC6 (100P/50V/NPO_4)
(53)
F33-Delete PC120, PC121
(54)
(55)
(56)
(57)
F37-Delete PR51, PR52, PC202, PC203
(58)
F38-
(59)
F39-
(60)
F40-
(61)
F41-
PAGE 23
PAGE 13
(02) D2-Delete PD3 for power protection.
PAGE 23
PAGE 18
PAGE 42
(03) D3-Seting Gain value for TGA request.
PAGE 37
PAGE 42 (Power)
PAGE 28
PAGE 38
(15)
E1-Change C804,C805,C793,C794 value from CH23904KB13 to CH31006KB18
(16)
E2-Change U16,R344,R342 to no stuff.
for blue screen 0xEA issue.
(04) D4-4/15 Change driver from MAINON to MAIND; PQ53 P/N from BAM653N0Z03 to BAM48000040
PAGE 38
PAGE 29
PAGE 39
D
(12)
(05) D5-Change PR13 footprint to 0603
(17)
(06) D6-Change R610 and R612 P/N to CS00003J951
E3-Change R241 to ASM.
PAGE 39
PAGE 13
PAGE 17
(07) D7-Change PC148 footprint
(18)
E4-Change R15,R16,R17,R18 Footprint from 0402 to 0603.
(19)
E5-Change PU1 P/N from AL008204000 to AL008204001.
PAGE 40
PAGE 26
PAGE 40
(08) D8-Delete C4 and C5 for HDMI issue.
PAGE 42
PAGE 26
PAGE 23
(09) D8-Add C808 varistor for ESD issue.
(20)
F1-PQ53 pin4 change to PQ29 pin 3 for power sequence issue.
(21)
F2-PQ28 pin 2 connect to U35 pin 33(T172) for power sequence issue.
PAGE 42
PAGE 39
PAGE 28
(10) D10-Add PR76,PR86,PQ24 and PQ25 for LCD flash.
PAGE
PAGE 33,41
PAGE 41
(22)
(11) D11-Signal by pass directly for AMD request.
F3-Delete PR83 for power sequence issue.
PAGE
PAGE 41
PAGE 10
(23)
F4-Change PR19 from 0 ohm to 20K ohm and PR189 From 10K to 20K ohm.
(24)
F5-Change PC12,PC154 from no stuff to 0.22U.
Change PR20 value from CS31072FB10 to CS23402FB08.
PAGE
PAGE 38,42
Change PQ40 value and footprint from BAM48000040 to BAM14140001.

Change PQ45 value and footprint from BAM66900022 to BAM14120000.
PAGE 38
PAGE 26
PAGE 38
PAGE
PAGE 38,42
Delete PQ46.
(25)
F6-Add PC79 for power sequence issue.
(26)
F7-DELETE HOLE29.
(27)
F8-DELETE R122,R356
Change PL4 PN from DC-15A00010 to CV-15K0MZ05.
PAGE 41
Change PR173 value from CS12213F915 to CS11273F928.
PAGE 43
PAGE 38 (Power)
Delete PC106 (Dont put it in BOM).
Change PQ53 value and footprint from BAM653N0Z03 to BAM48000040 (Drive net must be maind).
(28)
F9-DELETE R286,R289
(29)
F10-DELETE R158,R160,R165,R383,R382,R117,R121,R374,R377,R601,R602,R104,R112
PAGE 39 (Power)
0 ohm.
PAGE 6
Change PL9 value from CV-2575TZ51 to DC-33B0M003.
0 ohm
PAGE 10
Add a capacitor (CH733RY8802) at Vcore0 output.
(30)
(31)
F12-DELETE R255,R254,R242,R258,R474
Add a capacitor (CH733RY8802) at Vcore1 output.
0 ohm
PAGE 12
PC55 and PC145 must use CH733RY8802, dont change them.

0 ohm
PAGE 13
(32)
Change PR133 and PR124 value from CS31622FB27 to CS23652FB08.
0 ohm
PAGE 14
Delete PR132 and PR123 (Dont put it in BOM).
(33)
F14-DELETE R41
(34)
F15-DELETE R40,R42,R43
PAGE 40 (Power)
0 ohm.
PAGE 25
0 ohm
PAGE 18
Change PR51 and PR52 value from CS00002JB38 to CS21002JB34.
0 ohm
PAGE 18
Add a capacitor (CH14706KB18) at PQ20 pin2.
(35)
F16-DELETE L2,L3
(36)
F17-DELETE C601,R363,R364
(37)
F18-DELETE R482
Add a capacitor (CH14706KB18) at PQ19 pin2.
0 ohm
PAGE 23
Change PQ20 and PQ19 pin1 from GND to 8118agnd.

PAGE 24

0 ohm
PAGE 28
(38)
F19-DELETE L82
(39)
F20-DELETE R502,R503,R507,R509,R534,R536
Change PR55 value from CS36342FB11 to CS00002JB38.
0 ohm
PAGE 29
Delete PR56 (Dont put it in BOM)

0 ohm
PAGE 30
(40)
(41)
Change PC57 value from CH33302KB12 to CH24704KB19.
0 ohm
PAGE 31
Change PR186 value from CS34992FB10 to CS25602FB19 (This component must put in BOM).
Change PR59 to connect to PR63.
0 ohm
PAGE 31
(42)
PAGE 42 (Power)
F23-DELETE R552
0 ohm
PAGE 33
(43)
(44)
0 ohm
PAGE 34
A
0 ohm
PAGE 35
(45)
F26-Add R618 pull low for PCB Rev: F
(46)
F27-DELETE RP50,RP49,RP48,RP52,RP51,RP47,RP46,RP43,RP44,RP45 0 ohm
(47)
F28-Change R15,R16,R17,R18 Footprint from 0603 to 0805.
PAGE 33
PROJECT : SA8
PAGE 02
PAGE 26
Size
Custom
NB2/RD1
Document Number
Rev
1A
Change List Ver.C to MP
Date:
5
Sheet
1
46
of
45

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1

128 Bit GDDR3*4

21mm X 21mm, 528pin BGA

VCCP +1.2V & +1.1V

CPU CORE +VCORE0 +VCORE1

VGA thermal/system thermal

PCI BUS / 33MHz

29mm X 29mm, 528pin BGA

SA8 SYSTEM DIAGRAM

DCR: 0.5 ohm

Clock pin function

to NB for VGA reference clock

to M86-M external reference clock

to NB for RX780 for PCIEX2 interface reference clock only

to NB for AC-LINK reference clock

Ver.B update XTAL.

F27-DELETE RP50,RP49,RP48,RP52,RP51,RP47,RP46,RP43,RP44,RP45 0 ohm

Clock chip has internal serial

66 MHz 3.3V single ended HTT clock

100 MHz differential HTT clock

100 MHz non-spreading differential SRC clock

100 MHz spreading differential SRC clock

27MHz and 27M SS outputs

100 MHz SRC clock

Ver.B Reserver R212 for Debug.

SideBand Temp sense I2C

Keep trace from resisor to CPU within 0.6"

Ver.B Griffin Sighting issue.

PRE-PWROK Metal VID Codes

for debug only

S1G2 HT,CTL I/F 1/3

Place close to socket

Processor Memory Interface

Close to CPU within 1500 mils

S1G2 DDRII MEMORY I/F 2/3

BOTTOM SIDE DECOUPLING

DECOUPLING BETWEEN PROCESSOR AND DIMMs

PROCESSOR POWER AND GROUND

Ver.B Correct VGS control

For fix HyperTransport nets

2/20 Change CPU thermal IC to 781-1P8.

S1G2 PWR & GND 3/3

Ver.B Modified DDR footprint and

DDR2 SODIMMS: A/B CHANNEL

PLACE CLOSE TO PROCESSOR

PLACE CLOSE TO PROCESSOR

PLACE CLOSE TO SOCKET( FOR EMI/EMC)

PLACE CLOSE TO SOCKET( FOR EMI/EMC)

Close DDR2 socket

DDR2 SODIMMS TERMINATIONS

HYPER TRANSPORT CPU I/F

RS780MN-HT LINK I/F 1/4

Close to North Bridge

PCIE I/F GFX

PCIE I/F GPP

RS780 Display Port Support (muxed on GFX)

GFX_TX0,TX1,TX2 and TX3

GFX_TX4,TX5,TX6 and TX7

PORT1 To Mini PCI-E CN26

RS780MN-PCIE I/F 2/4

Ver.B Check PowerXpress switch

North Bridge RESET