module Carpark (y_out,x_in, clock, reset); output y_out; input x_in,clock,reset; reg y_out; reg [1:0]state,next_state; parameter S0 !

"#00, S1 !"#01, S! !"#10, S$ !"#11;

al%ays & ( posedge clock, negedge reset) i' (reset 0) state ( S0;

else state ( next_state; al%ays & (state, x_in) case (state) S0: i' (x_in) next_state S1: i' (x_in) next_state S!: i' ()x_in) next_state S$: i' (x_in) next_state endcase al%ays & (state, x_in) case (state) S0: y_out 0; )x_in; S1; else next_state S$; else next_state S0; else next_state S!; else next_state S0; S0; S!; S0;

S1, S!, S$: y_out endcase endmodule **+est ,enc-

module +est_.;

** /nputs reg x_in;

reg clock; reg reset;

** 0utputs %ire y_out;

** /nstantiate t-e 1nit 1nder +est (11+) Carpark uut ( 2y_out(y_out), 2x_in(x_in), 2clock(clock), 2reset(reset) ); initial #egin clock 0; )clock;

'ore.er 34 clock end initial #egin x_in clock reset 3100; 0; 0; 0;

end initial 'ork reset 0; 1;

3! reset

356 reset 357 reset 310 x_in 3$0 x_in 380 x_in 340 x_in 34! x_in 348 x_in 360 x_in 350 x_in 360 x_in 370 x_in 3100 x_in 31!0 x_in 3190 x_in 3160 x_in :oin

0; 1; 1; 0; 1; 0; 1; 0; 1; 1; 0; 1; 0; 1; 0; 1;

endmodule