Toshiba Satellite A500 Series Service Manual

A
Compal confidential
Bradford 10AT
NSKAE LA-5381P REV 0.2 Schematics Document

Mobile AMD SIG3/RS880M&RS880MC/SB710
2009-04-10 Rev. 0.2
3
Compal Secret Data
Security Classification
2008/04/14
Issued Date
Title
Compal Electronics, Inc.

Cover Sheet
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
http://hobi-elektronika.net
A
2009/04/14
Deciphered Date
Date:
Rev
0.2
LA-5381P
Friday, April 10, 2009
Sheet
E
of
46
Thermal Sensor
Compal Confidential
Fan Control
Memory BUS(DDRII)
AMD S1G3 CPU
page 4
Model Name : NSKAE
Dual Channel
uFCPGA-638 Package
File Name : LA-5381P
Clock Generator
page 6
ADM1032ARMZ
1.8V DDRII 667/800MHZ
200pin DDRII-SO-DIMM X2
page 4,5,6,7
page 8,9
BANK 0, 1, 2, 3
page 15
SLG8SP626
Hyper Transport Link 2.6GHz

16X16
NEW Card PCIe port 0
USB Port 11 page 25
Display Port
page 16
CRT
5IN1
ATI
page 16
LCD Conn.
RS880M
page 17
page 31
JMB380
5IN1
PCIeMini Card
WLAN (Slot 1)
PCIe 4x
1.5V 2.5GHz(250MB/s)
USB Port 8
PCIe port 1
1394
page 31
page 31
PCIe Port 2
page 27
RS880MC
EC
SMBUS
HDMI CEC Controller

R5F211A4SP
RTL8111D/8103E
LAN 1G/10/100M
HDMI Conn.
page 18
page 18
PCIe port 3
page 28
page 28
PCIeMini Card
WUSB (Slot 3)
page 10,11,12,13,14
PCIe Port 5
USB Port 10
USB Port 5
USB
ATI
5V 480MHz
SATA port 0
5V 1.5GHz(150MB/s)
26
SATA port 3
Touch Pad BTN/B

LS-5003P page 34
Light Pipe/B
LS-4991P page
Right USB/B
LS-5006P page
5V 1.5GHz(150MB/s)
SB710
5V 1.5GHz(150MB/s)
page 20,21,22,23,24
page 24
SSD
FM tuner Conn
Finger Printer/B
LS-5004P page 26
page 26
I2C from SB
page 19
page 34
DC/DC Interface CKT.
Power/B
LS-4992P
USB port 7
USB port 4
page 24
page 26
BT conn
Felica
Int. Camera
USB port 3
page 26
USB port 9
page 26
page 26
page 24
Touch Screen conn
USB port 13
SATA port 2
eSATA
page 24
3.3V 24.576MHz/48Mhz
LPC BUS
HDA Codec
MDC 1.5 Conn

Debug Port
ALC272
page 26
ENE KB926 D3
page 33
Power On/Off CKT.
FP conn
USB port 0,1
page 24
3.3V 33 MHz
RTC CKT.
USB/B Right USB/B Left
USB port 6
SATA ODD
5V 480MHz
26
page 25
SATA HDD0
USB port 2
HD Audio
BCAS
page 26
5V 1.5GHz(150MB/s)
34
page 27
page 26
SATA port 1
FM Tuner/B
LS-430GP page
PCIe Port 4
page 28
PCIeMini Card
GPS/TV Tuner (Slot2)
A-Link Express II
4X PCI-E
RJ45
page 29
page 32
page 34
Cap Sensor/B
LS-4993P page
SPI ROM
Int.KBD
page 33
page 33
CIR
Int.
MIC CONN
page 30
GSENSOR
page 32
page 33
AMP.
MIC CONN
page 30
TPA6017
HP CONN
page 30
page 30
34
page 35
Power Circuit DC/DC

page 36,37,38,39
40,41,42,43
LED/B
LS-4994P
Left USB/B
LS-4995P
A
SPK CONN
page 30
page 34
Compal Secret Data
2008/04/14
Issued Date
2009/04/14
Deciphered Date
Title
Custom
page 24
Date:
Block Diagram
Rev
0.2
LA-5381P
Sheet
E
of
46
O MEANS ON
Voltage Rails
X MEANS OFF
Symbol Note :
: means Digital Ground
Item
CPU
NB
VGA
SB
+5VS
1
+3VS
power
plane
+2.5VS
: means Analog Ground
S1G3
RS880MC
NA
SB710
S1G3
RS880M
NA
SB710
+1.8VS
+1.5VS
@ : means just reserve , no build
+1.1VS
B+
+5VALW
+1.8V
+3VL
+3VALW
+0.9V
+5VL
+1.2VALW
+VGA_CORE
BTO Option Table
+1.2V_HT
+VDDNB
State
+RTCVCC
+3V_LAN
+CPU_CORE_0
HDMI
Function
Side Port
DIPLAY PORT
+CPU_CORE_1
Memory
description
S0
S1
S3
S5 S4/ Battery only
S5 S4/AC & Battery

don't exist
explain
HDMI
BTO
HDMI@
CEC
DIPLAY PORT
H@
Side Port
SIDE@
DP@
Hynix
SAMSIDE@
HYNSIDE@
LAN
MINI PCI-E SLOT
Function
Samsung
Felica
No Side Port
NOSIDE@
BLUETOOTH
CRT
S5 S4/AC
SB SM Bus1 Address
Power
3
Device
HEX
SB SM Bus2 Address
Address
Power
+3VS
DDR SO-DIMM 0
A0 H
1010 0000 b
+3VS
DDR SO-DIMM 1
A4 H
1010 0100 b
+3VS
Clock Generator
D2 H
1101 0010 b
+3VS
description
New Card
Device
+3VALW
HEX
explain
3G
B-CAS
WIMAX
10/100M
Giga
BTO
3G@
TV@
WIMAX@
8103EL@
8111DL@
G-SENSOR
Modem
FM TUNER
Fingerprint
explain
HDD PROTECT
Modem
FM TUNER
Fingerprint
BTO
GSENSOR@
RJ11@
FM@
FP@
Function
Address
SOURCE
SMB_EC_CK1
+3VS
FM Tuner
HEX
KB926
Address
SMB_EC_CK2
KB926
SMB_EC_DA2
Virtual I2C
I2C_CLK
RS780M
I2C_DATA
DDC_CLK0
RS780M
DDC_DATA0
DDC_CLK1
EC SM Bus1 Address
EC SM Bus2 Address
RS780M
DDC_DATA1
SCL0
SB700
SDA0
Power
Device
HEX
Address
Power
Device
HEX
Address
SCL1
+5VL
Smart Battery
16 H
0001 011X b
+3VS
CPU_ADM1032-1
98 H
1001 100X b
SDA1
1001 101X b
SCL2
+5VL
HDMI-CEC
34 H
0011 010X b
Power
Device
HEX
+3VL
Cap. Sensor
Address
9A H
+3VS
VGA_ADM1032-2
+3VS
G-Sensor
SDA2
+3VS
Light Sensor
SCL3
SB700
SB700
SB700
SDA3
New Card
X
X
X
X
X
V
X
X
X
CRT@
SSD
CIR
SSD@
CIR@
BATT
V
X
X
X
X
X
X
X
X
CEC
THERMAL
SENSOR
CPU &
ADM1032
V
X
X
X
X
X
X
X
X
SODIMM
CLK
3G/TV
LCD
HDMI
X
X
X
X
X
V
X
X
X
X
X
X
X
X
X
V
X
X
X
X
V
X
X
X
X
X
X
X
X
X
V
X
X
X
X
X
I / II
X
V
X
X
X
X
X
X
X
X
X
X
X
X
V
X
X
X
Display
Port
G-Sensor
3
X
V
X
X
X
X
X
X
X
X
X
X
X
V
X
X
X
X
Virtual I2C
Compal Secret Data
2008/04/14
Issued Date
2009/04/14
Deciphered Date
Title
Custom
A
CRT
BT@
description
SMB_EC_DA1
Device
BLUE TOOTH
FEL@
SMBUS Control Table
WLAN/WIMAX
Power
FELICA
Date:
Notes List
Rev
0.2
LA-5381P
Sheet
E
of
46
+1.2V_HT
<10> H_CADIP[0..15]
<10> H_CADIN[0..15]
H_CADIP[0..15]
H_CADOP[0..15]
H_CADIN[0..15]
H_CADON[0..15]
H_CADOP[0..15]
<10>
H_CADON[0..15]
<10>
250 mil
1
+1.2V_HT
C1
10U_0805_10V6K
C2
10U_0805_10V6K
C3
0.22U_0603_16V4Z
C4
0.22U_0603_16V4Z
C5
180P_0402_50V8J
C6
180P_0402_50V8J
JCPUA
E3
E2
E1
F1
G3
G2
G1
H1
J1
K1
L3
L2
L1
M1
N3
N2
E5
F5
F3
F4
G5
H5
H3
H4
K3
K4
L5
M5
M3
M4
N5
P5
L0_CADIN_H0
L0_CADIN_L0
L0_CADIN_H1
L0_CADIN_L1
L0_CADIN_H2
L0_CADIN_L2
L0_CADIN_H3
L0_CADIN_L3
L0_CADIN_H4
L0_CADIN_L4
L0_CADIN_H5
L0_CADIN_L5
L0_CADIN_H6
L0_CADIN_L6
L0_CADIN_H7
L0_CADIN_L7
L0_CADIN_H8
L0_CADIN_L8
L0_CADIN_H9
L0_CADIN_L9
L0_CADIN_H10
L0_CADIN_L10
L0_CADIN_H11
L0_CADIN_L11
L0_CADIN_H12
L0_CADIN_L12
L0_CADIN_H13
L0_CADIN_L13
L0_CADIN_H14
L0_CADIN_L14
L0_CADIN_H15
L0_CADIN_L15
H_CLKIP0
H_CLKIN0
H_CLKIP1
H_CLKIN1
J3
J2
J5
K5
<10>
<10>
<10>
<10>
H_CLKIP0
H_CLKIN0
H_CLKIP1
H_CLKIN1
<10>
<10>
<10>
<10>
H_CTLIP0
H_CTLIN0
H_CTLIP1
H_CTLIN1
H_CTLIP0
H_CTLIN0
H_CTLIP1
H_CTLIN1
N1
P1
P3
P4
L0_CADOUT_H0
L0_CADOUT_L0
L0_CADOUT_H1
L0_CADOUT_L1
L0_CADOUT_H2
L0_CADOUT_L2
L0_CADOUT_H3
L0_CADOUT_L3
L0_CADOUT_H4
L0_CADOUT_L4
L0_CADOUT_H5
L0_CADOUT_L5
L0_CADOUT_H6
L0_CADOUT_L6
L0_CADOUT_H7
L0_CADOUT_L7
L0_CADOUT_H8
L0_CADOUT_L8
L0_CADOUT_H9
L0_CADOUT_L9
L0_CADOUT_H10
L0_CADOUT_L10
L0_CADOUT_H11
L0_CADOUT_L11
L0_CADOUT_H12
L0_CADOUT_L12
L0_CADOUT_H13
L0_CADOUT_L13
L0_CADOUT_H14
L0_CADOUT_L14
L0_CADOUT_H15
L0_CADOUT_L15
L0_CLKIN_H0
L0_CLKIN_L0
L0_CLKIN_H1
L0_CLKIN_L1
L0_CLKOUT_H0
L0_CLKOUT_L0
L0_CLKOUT_H1
L0_CLKOUT_L1
L0_CTLIN_H0
L0_CTLIN_L0
L0_CTLIN_H1
L0_CTLIN_L1
L0_CTLOUT_H0
L0_CTLOUT_L0
L0_CTLOUT_H1
L0_CTLOUT_L1
6090022100G_B
AE2 +VLDT_B 1
AE3
AE4
AE5
AD1
AC1
AC2
AC3
AB1
AA1
AA2
AA3
W2
W3
V1
U1
U2
U3
T1
R1
AD4
AD3
AD5
AC5
AB4
AB3
AB5
AA5
Y5
W5
V4
V3
V5
U5
T4
T3
H_CADOP0
H_CADON0
H_CADOP1
H_CADON1
H_CADOP2
H_CADON2
H_CADOP3
H_CADON3
H_CADOP4
H_CADON4
H_CADOP5
H_CADON5
H_CADOP6
H_CADON6
H_CADOP7
H_CADON7
H_CADOP8
H_CADON8
H_CADOP9
H_CADON9
H_CADOP10
H_CADON10
H_CADOP11
H_CADON11
H_CADOP12
H_CADON12
H_CADOP13
H_CADON13
H_CADOP14
H_CADON14
H_CADOP15
H_CADON15
Y1
W1
Y4
Y3
H_CLKOP0
H_CLKON0
H_CLKOP1
H_CLKON1
R2
R3
T5
R5
H_CTLOP0
H_CTLON0
H_CTLOP1
H_CTLON1
Near CPU Socket
FAN Control Circuit

+5VS
1A
H_CADIP0
H_CADIN0
H_CADIP1
H_CADIN1
H_CADIP2
H_CADIN2
H_CADIP3
H_CADIN3
H_CADIP4
H_CADIN4
H_CADIP5
H_CADIN5
H_CADIP6
H_CADIN6
H_CADIP7
H_CADIN7
H_CADIP8
H_CADIN8
H_CADIP9
H_CADIN9
H_CADIP10
H_CADIN10
H_CADIP11
H_CADIN11
H_CADIP12
H_CADIN12
H_CADIP13
H_CADIN13
H_CADIP14
H_CADIN14
H_CADIP15
H_CADIN15
VLDT_B0
VLDT_B1
VLDT_B2
VLDT_B3
1SS355_SOD323-2
D1
2
H_CLKOP0
H_CLKON0
H_CLKOP1
H_CLKON1
<10>
<10>
<10>
<10>
H_CTLOP0
H_CTLON0
H_CTLOP1
H_CTLON1
<10>
<10>
<10>
<10>
C183
10U_0805_10V6K
JFAN
VLDT_A0
VLDT_A1
VLDT_A2
VLDT_A3
+FAN1
1
2
3
HT LINK
D1
D2
D3
D4
VLDT=500mA
+FAN1
<32> EN_DFAN1
@
2
EN
VIN
VOUT
VSET
2
C9
1000P_0402_50V7K
D2
@
1
1SS355_SOD323-2
@
U6
1
2
3
4
GND
GND
GND
GND
8
7
6
5
C7
2 10U_0805_10V6K
4
5
1
2
3
GND
GND
ACES_85204-0300N
APL5607KI-TRG_SO8
C192
10U_0805_10V6K
R12
2
1
10K_0402_5%
+3VS
FAN_SPEED1 <32>
2
@
1
C8
0.01U_0402_25V7K
Compal Secret Data
2008/04/14
Issued Date
Title

AMD CPU S1G2 HT I/F
Custom
A
2009/04/14
Deciphered Date
Date:
Rev
0.2
LA-5381P
Sheet
E
of
46
Processor DDR2 Memory Interface
PLACE CLOSE TO PROCESSOR

WITHIN 1.5 INCH
JCPUC
<8> DDR_B_D[63..0]
MEM:DATA
DDR_A_CLK0
+1.8V
DDR_A_CLK#0
R1
1K_0402_1%
C10
1.5P_0402_50V9C
R2
1K_0402_1%
C13
1000P_0402_50V7K
C12
0.1U_0402_16V4Z
DDR_A_CLK1
+MCH_REF
1
DDR_A_CLK#1
C11
1.5P_0402_50V9C
DDR_B_CLK0
1
DDR_B_CLK#0
C14
1.5P_0402_50V9C
DDR_B_CLK1
1
DDR_B_CLK#1
C15
1.5P_0402_50V9C
+0.9V
+0.9V
JCPUB
Place them close to CPU within 1"
+1.8V
R4
1
1
R3
39.2_0402_1%
MEM_P
2
MEM_N
2
39.2_0402_1%
T2
<9> DDR_A_ODT0
<9> DDR_A_ODT1
<9> DDR_CS0_DIMMA#
<9> DDR_CS1_DIMMA#
<9> DDR_CKE0_DIMMA
<9> DDR_CKE1_DIMMA
<9> DDR_A_CLK0
<9> DDR_A_CLK#0
<9> DDR_A_CLK1
<9> DDR_A_CLK#1
3
<9> DDR_A_MA[15..0]
<9> DDR_A_BS#0
<9> DDR_A_BS#1
<9> DDR_A_BS#2
<9> DDR_A_RAS#
<9> DDR_A_CAS#
<9> DDR_A_WE#
PAD
DDR_A_ODT0
DDR_A_ODT1
DDR_CS0_DIMMA#
DDR_CS1_DIMMA#
DDR_CKE0_DIMMA
DDR_CKE1_DIMMA
DDR_A_CLK0
DDR_A_CLK#0
DDR_A_CLK1
DDR_A_CLK#1
D10
C10
B10
AD10
VTT1
VTT2
VTT3
VTT4
AF10
AE10
MEMZP
MEMZN
H16
T19
V22
U21
V19
T20
U19
U20
V20
J22
J20
N19
N20
E16
F16
Y16
AA16
P19
P20
DDR_A_MA0
DDR_A_MA1
DDR_A_MA2
DDR_A_MA3
DDR_A_MA4
DDR_A_MA5
DDR_A_MA6
DDR_A_MA7
DDR_A_MA8
DDR_A_MA9
DDR_A_MA10
DDR_A_MA11
DDR_A_MA12
DDR_A_MA13
DDR_A_MA14
DDR_A_MA15
N21
M20
N22
M19
M22
L20
M24
L21
L19
K22
R21
L22
K20
V24
K24
K19
DDR_A_BS#0
DDR_A_BS#1
DDR_A_BS#2
R20
R23
J21
DDR_A_RAS#
DDR_A_CAS#
DDR_A_WE#
R19
T22
T24
MEM:CMD/CTRL/CLK VTT5
VTT6
VTT7
VTT8
VTT9
RSVD_M1
MA0_ODT0
MA0_ODT1
MA1_ODT0
MA1_ODT1
MA0_CS_L0
MA0_CS_L1
MA1_CS_L0
MA1_CS_L1
MA_CKE0
MA_CKE1
VTT_SENSE
MEMVREF
RSVD_M2
MB0_ODT0
MB0_ODT1
MB1_ODT0
MB0_CS_L0
MB0_CS_L1
MB1_CS_L0
MB_CKE0
MB_CKE1
MA_CLK_H0
MA_CLK_L0
MA_CLK_H1
MA_CLK_L1
MA_CLK_H2
MA_CLK_L2
MA_CLK_H3
MA_CLK_L3
MB_CLK_H0
MB_CLK_L0
MB_CLK_H1
MB_CLK_L1
MB_CLK_H2
MB_CLK_L2
MB_CLK_H3
MB_CLK_L3
MA_ADD0
MA_ADD1
MA_ADD2
MA_ADD3
MA_ADD4
MA_ADD5
MA_ADD6
MA_ADD7
MA_ADD8
MA_ADD9
MA_ADD10
MA_ADD11
MA_ADD12
MA_ADD13
MA_ADD14
MA_ADD15
MB_ADD0
MB_ADD1
MB_ADD2
MB_ADD3
MB_ADD4
MB_ADD5
MB_ADD6
MB_ADD7
MB_ADD8
MB_ADD9
MB_ADD10
MB_ADD11
MB_ADD12
MB_ADD13
MB_ADD14
MB_ADD15
MA_BANK0
MA_BANK1
MA_BANK2
MB_BANK0
MB_BANK1
MB_BANK2
MA_RAS_L
MA_CAS_L
MA_WE_L
MB_RAS_L
MB_CAS_L
MB_WE_L
W10
AC10
AB10
AA10
A10
Y10
W17
VTT_SENSE
PAD
T1
PAD
T3
+MCH_REF
B18
W26
W23
Y26
DDR_B_ODT0
DDR_B_ODT1
V26
W25
U22
DDR_CS0_DIMMB#
DDR_CS1_DIMMB#
J25
H26
DDR_CKE0_DIMMB
DDR_CKE1_DIMMB
P22
R22
A17
A18
AF18
AF17
R26
R25
DDR_B_CLK0
DDR_B_CLK#0
DDR_B_CLK1
DDR_B_CLK#1
P24
N24
P26
N23
N26
L23
N25
L24
M26
K26
T26
L26
L25
W24
J23
J24
DDR_B_MA0
DDR_B_MA1
DDR_B_MA2
DDR_B_MA3
DDR_B_MA4
DDR_B_MA5
DDR_B_MA6
DDR_B_MA7
DDR_B_MA8
DDR_B_MA9
DDR_B_MA10
DDR_B_MA11
DDR_B_MA12
DDR_B_MA13
DDR_B_MA14
DDR_B_MA15
R24
U26
J26
DDR_B_BS#0
DDR_B_BS#1
DDR_B_BS#2
U25
U24
U23
DDR_B_RAS#
DDR_B_CAS#
DDR_B_WE#
DDR_B_ODT0 <8>
DDR_B_ODT1 <8>
DDR_CS0_DIMMB# <8>
DDR_CS1_DIMMB# <8>
DDR_CKE0_DIMMB <8>
DDR_CKE1_DIMMB <8>
DDR_B_CLK0 <8>
DDR_B_CLK#0 <8>
DDR_B_CLK1 <8>
DDR_B_CLK#1 <8>
<8> DDR_B_DM[7..0]
DDR_B_MA[15..0] <8>
DDR_B_BS#0 <8>
DDR_B_BS#1 <8>
DDR_B_BS#2 <8>
DDR_B_RAS# <8>
DDR_B_CAS# <8>
DDR_B_WE# <8>
<8>
<8>
<8>
<8>
<8>
<8>
<8>
<8>
<8>
<8>
<8>
<8>
<8>
<8>
<8>
<8>
DDR_B_DQS0
DDR_B_DQS#0
DDR_B_DQS1
DDR_B_DQS#1
DDR_B_DQS2
DDR_B_DQS#2
DDR_B_DQS3
DDR_B_DQS#3
DDR_B_DQS4
DDR_B_DQS#4
DDR_B_DQS5
DDR_B_DQS#5
DDR_B_DQS6
DDR_B_DQS#6
DDR_B_DQS7
DDR_B_DQS#7
DDR_B_D0
DDR_B_D1
DDR_B_D2
DDR_B_D3
DDR_B_D4
DDR_B_D5
DDR_B_D6
DDR_B_D7
DDR_B_D8
DDR_B_D9
DDR_B_D10
DDR_B_D11
DDR_B_D12
DDR_B_D13
DDR_B_D14
DDR_B_D15
DDR_B_D16
DDR_B_D17
DDR_B_D18
DDR_B_D19
DDR_B_D20
DDR_B_D21
DDR_B_D22
DDR_B_D23
DDR_B_D24
DDR_B_D25
DDR_B_D26
DDR_B_D27
DDR_B_D28
DDR_B_D29
DDR_B_D30
DDR_B_D31
DDR_B_D32
DDR_B_D33
DDR_B_D34
DDR_B_D35
DDR_B_D36
DDR_B_D37
DDR_B_D38
DDR_B_D39
DDR_B_D40
DDR_B_D41
DDR_B_D42
DDR_B_D43
DDR_B_D44
DDR_B_D45
DDR_B_D46
DDR_B_D47
DDR_B_D48
DDR_B_D49
DDR_B_D50
DDR_B_D51
DDR_B_D52
DDR_B_D53
DDR_B_D54
DDR_B_D55
DDR_B_D56
DDR_B_D57
DDR_B_D58
DDR_B_D59
DDR_B_D60
DDR_B_D61
DDR_B_D62
DDR_B_D63
C11
A11
A14
B14
G11
E11
D12
A13
A15
A16
A19
A20
C14
D14
C18
D18
D20
A21
D24
C25
B20
C20
B24
C24
E23
E24
G25
G26
C26
D26
G23
G24
AA24
AA23
AD24
AE24
AA26
AA25
AD26
AE25
AC22
AD22
AE20
AF20
AF24
AF23
AC20
AD20
AD18
AE18
AC14
AD14
AF19
AC18
AF16
AF15
AF13
AC12
AB11
Y11
AE14
AF14
AF11
AD11
MB_DATA0
MB_DATA1
MB_DATA2
MB_DATA3
MB_DATA4
MB_DATA5
MB_DATA6
MB_DATA7
MB_DATA8
MB_DATA9
MB_DATA10
MB_DATA11
MB_DATA12
MB_DATA13
MB_DATA14
MB_DATA15
MB_DATA16
MB_DATA17
MB_DATA18
MB_DATA19
MB_DATA20
MB_DATA21
MB_DATA22
MB_DATA23
MB_DATA24
MB_DATA25
MB_DATA26
MB_DATA27
MB_DATA28
MB_DATA29
MB_DATA30
MB_DATA31
MB_DATA32
MB_DATA33
MB_DATA34
MB_DATA35
MB_DATA36
MB_DATA37
MB_DATA38
MB_DATA39
MB_DATA40
MB_DATA41
MB_DATA42
MB_DATA43
MB_DATA44
MB_DATA45
MB_DATA46
MB_DATA47
MB_DATA48
MB_DATA49
MB_DATA50
MB_DATA51
MB_DATA52
MB_DATA53
MB_DATA54
MB_DATA55
MB_DATA56
MB_DATA57
MB_DATA58
MB_DATA59
MB_DATA60
MB_DATA61
MB_DATA62
MB_DATA63
DDR_B_DM0
DDR_B_DM1
DDR_B_DM2
DDR_B_DM3
DDR_B_DM4
DDR_B_DM5
DDR_B_DM6
DDR_B_DM7
A12
B16
A22
E25
AB26
AE22
AC16
AD12
MB_DM0
MB_DM1
MB_DM2
MB_DM3
MB_DM4
MB_DM5
MB_DM6
MB_DM7
DDR_B_DQS0
DDR_B_DQS#0
DDR_B_DQS1
DDR_B_DQS#1
DDR_B_DQS2
DDR_B_DQS#2
DDR_B_DQS3
DDR_B_DQS#3
DDR_B_DQS4
DDR_B_DQS#4
DDR_B_DQS5
DDR_B_DQS#5
DDR_B_DQS6
DDR_B_DQS#6
DDR_B_DQS7
DDR_B_DQS#7
C12
B12
D16
C16
A24
A23
F26
E26
AC25
AC26
AF21
AF22
AE16
AD16
AF12
AE12
MB_DQS_H0
MB_DQS_L0
MB_DQS_H1
MB_DQS_L1
MB_DQS_H2
MB_DQS_L2
MB_DQS_H3
MB_DQS_L3
MB_DQS_H4
MB_DQS_L4
MB_DQS_H5
MB_DQS_L5
MB_DQS_H6
MB_DQS_L6
MB_DQS_H7
MB_DQS_L7
G12
F12
H14
G14
H11
H12
C13
E13
H15
E15
E17
H17
E14
F14
C17
G17
G18
C19
D22
E20
E18
F18
B22
C23
F20
F22
H24
J19
E21
E22
H20
H22
Y24
AB24
AB22
AA21
W22
W21
Y22
AA22
Y20
AA20
AA18
AB18
AB21
AD21
AD19
Y18
AD17
W16
W14
Y14
Y17
AB17
AB15
AD15
AB13
AD13
Y12
W11
AB14
AA14
AB12
AA12
DDR_A_D0
DDR_A_D1
DDR_A_D2
DDR_A_D3
DDR_A_D4
DDR_A_D5
DDR_A_D6
DDR_A_D7
DDR_A_D8
DDR_A_D9
DDR_A_D10
DDR_A_D11
DDR_A_D12
DDR_A_D13
DDR_A_D14
DDR_A_D15
DDR_A_D16
DDR_A_D17
DDR_A_D18
DDR_A_D19
DDR_A_D20
DDR_A_D21
DDR_A_D22
DDR_A_D23
DDR_A_D24
DDR_A_D25
DDR_A_D26
DDR_A_D27
DDR_A_D28
DDR_A_D29
DDR_A_D30
DDR_A_D31
DDR_A_D32
DDR_A_D33
DDR_A_D34
DDR_A_D35
DDR_A_D36
DDR_A_D37
DDR_A_D38
DDR_A_D39
DDR_A_D40
DDR_A_D41
DDR_A_D42
DDR_A_D43
DDR_A_D44
DDR_A_D45
DDR_A_D46
DDR_A_D47
DDR_A_D48
DDR_A_D49
DDR_A_D50
DDR_A_D51
DDR_A_D52
DDR_A_D53
DDR_A_D54
DDR_A_D55
DDR_A_D56
DDR_A_D57
DDR_A_D58
DDR_A_D59
DDR_A_D60
DDR_A_D61
DDR_A_D62
DDR_A_D63
MA_DM0
MA_DM1
MA_DM2
MA_DM3
MA_DM4
MA_DM5
MA_DM6
MA_DM7
E12
C15
E19
F24
AC24
Y19
AB16
Y13
DDR_A_DM0
DDR_A_DM1
DDR_A_DM2
DDR_A_DM3
DDR_A_DM4
DDR_A_DM5
DDR_A_DM6
DDR_A_DM7
MA_DQS_H0
MA_DQS_L0
MA_DQS_H1
MA_DQS_L1
MA_DQS_H2
MA_DQS_L2
MA_DQS_H3
MA_DQS_L3
MA_DQS_H4
MA_DQS_L4
MA_DQS_H5
MA_DQS_L5
MA_DQS_H6
MA_DQS_L6
MA_DQS_H7
MA_DQS_L7
G13
H13
G16
G15
C22
C21
G22
G21
AD23
AC23
AB19
AB20
Y15
W15
W12
W13
DDR_A_DQS0
DDR_A_DQS#0
DDR_A_DQS1
DDR_A_DQS#1
DDR_A_DQS2
DDR_A_DQS#2
DDR_A_DQS3
DDR_A_DQS#3
DDR_A_DQS4
DDR_A_DQS#4
DDR_A_DQS5
DDR_A_DQS#5
DDR_A_DQS6
DDR_A_DQS#6
DDR_A_DQS7
DDR_A_DQS#7
6090022100G_B
DDR_A_D[63..0]
MA_DATA0
MA_DATA1
MA_DATA2
MA_DATA3
MA_DATA4
MA_DATA5
MA_DATA6
MA_DATA7
MA_DATA8
MA_DATA9
MA_DATA10
MA_DATA11
MA_DATA12
MA_DATA13
MA_DATA14
MA_DATA15
MA_DATA16
MA_DATA17
MA_DATA18
MA_DATA19
MA_DATA20
MA_DATA21
MA_DATA22
MA_DATA23
MA_DATA24
MA_DATA25
MA_DATA26
MA_DATA27
MA_DATA28
MA_DATA29
MA_DATA30
MA_DATA31
MA_DATA32
MA_DATA33
MA_DATA34
MA_DATA35
MA_DATA36
MA_DATA37
MA_DATA38
MA_DATA39
MA_DATA40
MA_DATA41
MA_DATA42
MA_DATA43
MA_DATA44
MA_DATA45
MA_DATA46
MA_DATA47
MA_DATA48
MA_DATA49
MA_DATA50
MA_DATA51
MA_DATA52
MA_DATA53
MA_DATA54
MA_DATA55
MA_DATA56
MA_DATA57
MA_DATA58
MA_DATA59
MA_DATA60
MA_DATA61
MA_DATA62
MA_DATA63
<9>
1
DDR_A_DM[7..0]
<9>
DDR_A_DQS0 <9>
DDR_A_DQS#0 <9>
DDR_A_DQS1 <9>
DDR_A_DQS#1 <9>
DDR_A_DQS2 <9>
DDR_A_DQS#2 <9>
DDR_A_DQS3 <9>
DDR_A_DQS#3 <9>
DDR_A_DQS4 <9>
DDR_A_DQS#4 <9>
DDR_A_DQS5 <9>
DDR_A_DQS#5 <9>
DDR_A_DQS6 <9>
DDR_A_DQS#6 <9>
DDR_A_DQS7 <9>
DDR_A_DQS#7 <9>
Compal Secret Data
2008/04/14
Issued Date
Title

AMD CPU S1G2 DDRII I/F
Custom
A
2009/04/14
Deciphered Date
Date:
Rev
0.2
LA-5381P
Sheet
E
of
46
R10
1
R5
VDDA=300mA
3300P_0402_50V7K
C18
2
CPU_THERMTRIP#_R
C19
0.22U_0603_16V4Z
Q3
1
ENTRIP2
<37,39>
CH751H-40PT_SOD323-2
C17
2
2
D16
1
E
4.7U_0805_10V4Z
1
B
D12
2
10K_0402_5%
2
300_0402_5%
2
1
2
1 FBM_L11_201209_300L_0805
C16
@
100U_B2_6.3VM_R45M
+1.8V
+2.5VDDA
L1
+2.5VS
H_THERMTRIP# <20>
MMBT3904_NL_SOT23-3
1
R9
+1.8V
JCPUD
2
300_0402_5%
R11 @
F8
F9
1
<15> CLK_CPU_BCLK
CPU_CLKIN_SC_P
CPU_CLKIN_SC_N
2 3900P_0402_50V7K
1
C20
LDT_RST#
H_PWRGD
LDT_STOP#
CPU_LDT_REQ#_R
R8
169_0402_1%
1
<15> CLK_CPU_BCLK#
C21
2
3900P_0402_50V7K
Place close to CPU wihtin 1.5"
+1.8VS
+1.2V_HT
R15
300_0402_5%
<19>
LDT_RST#
LDT_RST#
1
A9
A8
C22
0.01U_0402_25V7K
@
R13
R14
1
1
2 44.2_0402_1% CPU_HTREF0
2 44.2_0402_1% CPU_HTREF1
CPU_TEST23_TSTUPD
Close to CPU
T29 PAD
T30 PAD
+CPU_CORE_1
@R489
@
R489 10_0402_5%
1
2 CPU_VDD1_RUN_FB_H
1
2 CPU_VDD1_RUN_FB_L
CPU_TEST25_H_BYPASSCLK_H
CPU_TEST25_L_BYPASSCLK_L
CPU_TEST21_SCANEN
CPU_TEST20_SCANCLK2
CPU_TEST24_SCANCLK1
@R488
@
R488 10_0402_5%
H_PWRGD
<19,43> H_PWRGD
1
SIC
SID
ALERT_L
R6
P6
HT_REF0
HT_REF1
CPU_VDD1_RUN_FB_H Y6
CPU_VDD1_RUN_FB_L AB6
+1.8VS
R21
300_0402_5%
AF4
AF5
AE6
<43> CPU_VDD1_RUN_FB_H
<43> CPU_VDD1_RUN_FB_L
+CPU_CORE_0
R487 10_0402_5%
CPU_VDD0_RUN_FB_H
1
2
1
2 CPU_VDD0_RUN_FB_L
R486 10_0402_5%
C23
0.1U_0402_16V7K
R25
1
2
0_0402_5%
VDD0_FB_H
VDD0_FB_L
VDDIO_FB_H
VDDIO_FB_L
W9
Y9
VDD1_FB_H
VDD1_FB_L
VDDNB_FB_H
VDDNB_FB_L
H6
G6
AD7
TEST23
H10
G9
TEST18
TEST19
AB8
AF7
AE7
AE8
AC8
AF8
C2
AA6
DBREQ_L
E10
TDO
AE9
TEST28_H
TEST28_L
TEST25_H
TEST25_L
TEST21
TEST20
TEST24
TEST22
TEST12
TEST27
TEST17
TEST16
TEST15
TEST14
TEST7
TEST10
TEST8
TEST29_H
TEST29_L
TEST9
TEST6
RSVD10
RSVD9
RSVD8
RSVD7
RSVD6
2
0_0402_5%
H_PROCHOT# <19>
CPU_SVC <43>
CPU_SVD <43>
THERMDC_CPU
THERMDA_CPU
PAD
PAD
+VDDNB
T22
T21
CPU_VDDNB_RUN_FB_H
CPU_VDDNB_RUN_FB_L
R484 10_0402_5%
CPU_VDDNB_RUN_FB_H 1
2
CPU_VDDNB_RUN_FB_L 1
2
R485 10_0402_5%
CPU_VDDNB_RUN_FB_H <43>
CPU_VDDNB_RUN_FB_L <43>
CPU_DBREQ#
Close to CPU
PAD T20
J7
H8
CPU_TEST28_H_PLLCHRZ_P
CPU_TEST28_L_PLLCHRZ_N
D7
E7
F7
C7
CPU_TEST17_BP3
CPU_TEST16_BP2
C3
K8
PAD
PAD
route as differential
as short as possible
testpoint under package
T5
T6
T7
T8
PAD T27
PAD T28
+1.8VS
CPU_TEST10_ANALOGOUT
Add R32 at PVT
C4
C9
C8
PAD
PAD
R32
2
1
300_0402_5%
@
CPU_TEST29_H_FBCLKOUT_P
CPU_TEST29_L_FBCLKOUT_N
PAD
PAD
+1.2V_HT
T13
T14
CPU_SVC
R22
2 1K_0402_5%
CPU_SVD
R23
2 1K_0402_5%
CPU_TEST21_SCANEN
H18
H19
AA7
D5
C5
R26 1
2 300_0402_5%
CPU_TEST24_SCANCLK1 R28 2
1 300_0402_5%
CPU_TEST20_SCANCLK2 R31 1
2 300_0402_5%
CPU_TEST23_TSTUPD
1 300_0402_5%
R29 2
RSVD1
RSVD2
RSVD3
RSVD4
RSVD5
CPU_THERMTRIP#_R
CPU_PROCHOT#_1.8
2
1
+1.8V
@ R42
300_0402_5%
AF6
AC7
AA8
W7
W8
DBRDY
TMS
TCK
TRST_L
TDI
E9
E8
THERMTRIP_L
PROCHOT_L
MEMHOT_L
CPU_SVC
CPU_SVD
A6
A4
THERMDC
THERMDA
G10
AA9
AC9
AD9
AF9
A3
A5
B3
B5
C1
+1.8VS
+1.8VS
T31 PAD
T25 PAD
T26 PAD
SVC
SVD
RESET_L
PWROK
LDTSTOP_L
LDTREQ_L
CPU_VDD0_RUN_FB_H F6
CPU_VDD0_RUN_FB_L E6
PAD
PAD
PAD
PAD
PAD
KEY1
KEY2
CLKIN_H
CLKIN_L
B7
A7
F10
C6
T9
T10
T11
T12
T19
VDDA1
VDDA2
CPU_PROCHOT#_1.8
M11
W18
R36
300_0402_5%
6090022100G_B
R30
300_0402_5%
Un-Mount R27 For Caspian

<11,19> LDT_STOP#
LDT_STOP#
CPU_LDT_REQ#_R
C25
0.01U_0402_25V7K
@
R27
1
2
0_0402_5%
@
CPU_LDT_REQ# <11,19>
3
C24
0.01U_0402_25V7K
@
Add R497 and R498 at PVT
+1.8V
Thermal Sensor
0.1U_0402_16V4Z
+3VS
R497 @
1
2 CPU_TEST25_L_BYPASSCLK_L
510_0402_5%
R492
1
2
510_0402_5%
CPU_DBREQ#
C26
HDT Connector
JP3
@
R494 0_0402_5%
1
2
T23 PAD
2
U2
1
THERMDA_CPU 2
C27
1
R498 @
1
2
510_0402_5%
2
1
@ 220_0402_5% R37
2
1
@ 220_0402_5% R38
2
1
@ 220_0402_5% R39
2
1
@ 220_0402_5% R40
2
1
300_0402_5% R41
+1.8V
R493
1
2 CPU_TEST25_H_BYPASSCLK_H
510_0402_5%
THERMDC_CPU 3
2
2200P_0402_50V7K
4
VDD
SCLK
D+
SDATA
D-
ALERT#
THERM#
GND
EC_SMB_CK2 <32,33,34>
EC_SMB_DA2 <32,33,34>
T24 PAD
@
2
4
6
8
10
12
14
16
18
20
22
24
26
LDT_RST#
4
NOTE: HDT TERMINATION IS REQUIRED

FOR REV. Ax SILICON ONLY.
1
3
5
7
9
11
13
15
17
19
21
23
SAMTEC_ASP-68200-07
ADM1032ARM-1 ZREEL_MSOP8
Compal Secret Data
2008/04/14
Issued Date
Title

AMD CPU S1G2 CTRL
Custom
A
2009/04/14
Deciphered Date
Date:
Rev
0.2
LA-5381P
Sheet
E
of
46
JCPUF
VDD(+CPU_CORE) decoupling.
+VDDNB
G4
H2
J9
J11
J13
J15
K6
K10
K12
K14
L4
L7
L9
L11
L13
L15
M2
M6
M8
M10
N7
N9
N11
VDD0_1
VDD0_2
VDD0_3
VDD0_4
VDD0_5
VDD0_6
VDD0_7
VDD0_8
VDD0_9
VDD0_10
VDD0_11
VDD0_12
VDD0_13
VDD0_14
VDD0_15
VDD0_16
VDD0_17
VDD0_18
VDD0_19
VDD0_20
VDD0_21
VDD0_22
VDD0_23
+1.8V
K16
M16
P16
T16
V16
VDDNB_1
VDDNB_2
VDDNB_3
VDDNB_4
VDDNB_5
H25
J17
K18
K21
K23
K25
L17
M18
M21
M23
M25
N17
VDDIO1
VDDIO2
VDDIO3
VDDIO4
VDDIO5
VDDIO6
VDDIO7
VDDIO8
VDDIO9
VDDIO10
VDDIO11
VDDIO12
+CPU_CORE_1
C30
330U_X_2VM_R6M
C28
330U_X_2VM_R6M
1
C31
330U_X_2VM_R6M
C29
330U_X_2VM_R6M
Near CPU Socket
+CPU_CORE_0
+CPU_CORE_1
C32
22U_0805_6.3V6M
C33
22U_0805_6.3V6M
C34
22U_0805_6.3V6M
C35
22U_0805_6.3V6M
C36
22U_0805_6.3V6M
C37
22U_0805_6.3V6M
+CPU_CORE_0
C38
22U_0805_6.3V6M
C39
22U_0805_6.3V6M
+CPU_CORE_1
C40
0.22U_0603_16V4Z
C41
0.01U_0402_25V7K
JCPUE
+CPU_CORE_0
+CPU_CORE_0
C42
180P_0402_50V8J
C43
0.22U_0603_16V4Z
C44
0.01U_0402_25V7K
C45
180P_0402_50V8J
Under CPU Socket

2
AA4
AA11
AA13
AA15
AA17
AA19
AB2
AB7
AB9
AB23
AB25
AC11
AC13
AC15
AC17
AC19
AC21
AD6
AD8
AD25
AE11
AE13
AE15
AE17
AE19
AE21
AE23
B4
B6
B8
B9
B11
B13
B15
B17
B19
B21
B23
B25
D6
D8
D9
D11
D13
D15
D17
D19
D21
D23
D25
E4
F2
F11
F13
F15
F17
F19
F21
F23
F25
H7
H9
H21
H23
J4
+CPU_CORE_1
VDD1_1
VDD1_2
VDD1_3
VDD1_4
VDD1_5
VDD1_6
VDD1_7
VDD1_8
VDD1_9
VDD1_10
VDD1_11
VDD1_12
VDD1_13
VDD1_14
VDD1_15
VDD1_16
VDD1_17
VDD1_18
VDD1_19
VDD1_20
VDD1_21
VDD1_22
VDD1_23
VDD1_24
VDD1_25
VDD1_26
P8
P10
R4
R7
R9
R11
T2
T6
T8
T10
T12
T14
U7
U9
U11
U13
U15
V6
V8
V10
V12
V14
W4
Y2
AC4
AD2
VDDIO27
VDDIO26
VDDIO25
VDDIO24
VDDIO23
VDDIO22
VDDIO21
VDDIO20
VDDIO19
VDDIO18
VDDIO17
VDDIO16
VDDIO15
VDDIO14
VDDIO13
Y25
V25
V23
V21
V18
U17
T25
T23
T21
T18
R17
P25
P23
P21
P18
+1.8V
6090022100G_B
Athlon 64 S1
Processor Socket
VDDIO decoupling.
+CPU_CORE_NB
decoupling.
+1.8V
+VDDNB
1
C46
22U_0805_6.3V6M
C47
22U_0805_6.3V6M
C48
0.22U_0603_16V4Z
2
C49
0.22U_0603_16V4Z
2
C50
C51
180P_0402_50V8J 180P_0402_50V8J
2
2
C52
22U_0805_6.3V6M
C53
22U_0805_6.3V6M
C54
22U_0805_6.3V6M
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
J6
J8
J10
J12
J14
J16
J18
K2
K7
K9
K11
K13
K15
K17
L6
L8
L10
L12
L14
L16
L18
M7
M9
AC6
M17
N4
N8
N10
N16
N18
P2
P7
P9
P11
P17
R8
R10
R16
R18
T7
T9
T11
T13
T15
T17
U4
U6
U8
U10
U12
U14
U16
U18
V2
V7
V9
V11
V13
V15
V17
W6
Y21
Y23
N6
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98
VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
6090022100G_B
Under CPU Socket
Athlon 64 S1
Processor Socket
Between CPU Socket and DIMM

+1.8V
VTT decoupling.
C55
0.22U_0603_16V4Z
C56
0.22U_0603_16V4Z
C57
0.22U_0603_16V4Z
+1.8V
C60
0.01U_0402_25V7K
C61
0.01U_0402_25V7K
+ C59
220U_B2_4VM_R45M
C58
0.22U_0603_16V4Z
+0.9V
C62
180P_0402_50V8J
C63
180P_0402_50V8J
C64
180P_0402_50V8J
C65
180P_0402_50V8J
C66
4.7U_0805_10V4Z
C67
4.7U_0805_10V4Z
C68
0.22U_0603_16V4Z
C69
0.22U_0603_16V4Z
180PF Qt'y follow the distance between

CPU socket and DIMM0. <2.5inch>
+1.8V
+1.8V
+0.9V
C70
1000P_0402_50V7K
C71
1000P_0402_50V7K
C72
180P_0402_50V8J
C73
180P_0402_50V8J
Near CPU Socket Right side

+0.9V
1
1
1
C74
4.7U_0805_10V4Z
1
C75
4.7U_0805_10V4Z
1
C76
4.7U_0805_10V4Z
C77
4.7U_0805_10V4Z
+ C78
220U_B2_4VM_R45M
@
C79
4.7U_0805_10V4Z
C80
4.7U_0805_10V4Z
C81
0.22U_0603_16V4Z
C82
0.22U_0603_16V4Z
C83
1000P_0402_50V7K
C84
1000P_0402_50V7K
C85
180P_0402_50V8J
C86
180P_0402_50V8J
Near CPU Socket Left side
Compal Secret Data
2008/04/14
Issued Date
Title

AMD CPU S1G2 PWR & GND
Custom
A
2009/04/14
Deciphered Date
Date:
Rev
0.2
LA-5381P
Sheet
E
of
46
+1.8V
+1.8V
JDDRH
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
2
1
C104
1000P_0402_50V7K
<9> +V_DDR_MCH_REF
DDR_B_D0
DDR_B_D1
DDR_B_DQS#0
DDR_B_DQS0
DDR_B_D2
DDR_B_D3
DDR_B_D8
DDR_B_D9
DDR_B_DQS#1
DDR_B_DQS1
DDR_B_D10
DDR_B_D11
VREF
VSS
DQ0
DQ1
VSS
DQS0#
DQS0
VSS
DQ2
DQ3
VSS
DQ8
DQ9
VSS
DQS1#
DQS1
VSS
DQ10
DQ11
VSS
VSS
DQ4
DQ5
VSS
DM0
VSS
DQ6
DQ7
VSS
DQ12
DQ13
VSS
DM1
VSS
CK0
CK0#
VSS
DQ14
DQ15
VSS
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
DDR_B_D[0..63]
DDR_B_D4
DDR_B_D5
DDR_B_DM[0..7]
DDR_B_DM0
DDR_B_DQS[0..7]
DDR_B_D6
DDR_B_D7
DDR_B_MA[0..15]
DDR_B_DQS#[0..7]
DDR_B_D12
DDR_B_D13
DDR_B_D[0..63]
<5>
DDR_B_DM[0..7]
<5>
DDR_B_DQS[0..7]
<5>
DDR_B_MA[0..15] <5>
DDR_B_DQS#[0..7]
<5>
+1.8V
+0.9V
RP8
DDR_B_MA4
DDR_B_MA2
DDR_B_MA0
DDR_B_RAS#
1
2
3
4
DDR_B_DM1
8
7
6
5
2
C105
1
C106
1
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
2
C108
1
C107
1
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
2
C109
1
C110
1
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
2
C111
1
C112
1
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
2
C114
1
C113
1
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
2
C116
1
C115
1
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
2
C118
1
C117
1
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
47_0804_8P4R_5%
DDR_B_CLK0
DDR_B_CLK#0
DDR_B_CLK0 <5>
DDR_B_CLK#0 <5>
RP9
DDR_B_MA14
DDR_B_MA11
DDR_B_MA7
DDR_B_MA6
DDR_B_D14
DDR_B_D15
1
2
3
4
8
7
6
5
47_0804_8P4R_5%
DDR_B_D16
DDR_B_D17
DDR_B_DQS#2
DDR_B_DQS2
DDR_B_D18
DDR_B_D19
DDR_B_D24
DDR_B_D25
DDR_B_DM3
DDR_B_D26
DDR_B_D27
2
<5> DDR_CKE0_DIMMB
<5> DDR_B_BS#2
DDR_CKE0_DIMMB
DDR_B_BS#2
DDR_B_MA12
DDR_B_MA9
DDR_B_MA8
DDR_B_MA5
DDR_B_MA3
DDR_B_MA1
<5> DDR_B_BS#0
<5> DDR_B_WE#
<5> DDR_B_CAS#
<5> DDR_CS1_DIMMB#
<5> DDR_B_ODT1
DDR_B_MA10
DDR_B_BS#0
DDR_B_WE#
DDR_B_CAS#
DDR_CS1_DIMMB#
DDR_B_ODT1
DDR_B_D32
DDR_B_D33
DDR_B_DQS#4
DDR_B_DQS4
DDR_B_D34
DDR_B_D35
DDR_B_D40
DDR_B_D41
DDR_B_DM5
DDR_B_D42
DDR_B_D43
DDR_B_D48
DDR_B_D49
DDR_B_DQS#6
DDR_B_DQS6
DDR_B_D50
DDR_B_D51
DDR_B_D56
DDR_B_D57
DDR_B_DM7
DDR_B_D58
DDR_B_D59
<9,15,20,25> SMB_CK_DAT0
<9,15,20,25> SMB_CK_CLK0
SMB_CK_DAT0
SMB_CK_CLK0
+3VS
C119
0.1U_0402_16V4Z
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199
1
@
VSS
DQ16
DQ17
VSS
DQS2#
DQS2
VSS
DQ18
DQ19
VSS
DQ24
DQ25
VSS
DM3
NC
VSS
DQ26
DQ27
VSS
CKE0
VDD
NC
BA2
VDD
A12
A9
A8
VDD
A5
A3
A1
VDD
A10/AP
BA0
WE#
VDD
CAS#
NC/S1#
VDD
NC/ODT1
VSS
DQ32
DQ33
VSS
DQS4#
DQS4
VSS
DQ34
DQ35
VSS
DQ40
DQ41
VSS
DM5
VSS
DQ42
DQ43
VSS
DQ48
DQ49
VSS
NC,TEST
VSS
DQS6#
DQS6
VSS
DQ50
DQ51
VSS
DQ56
DQ57
VSS
DM7
VSS
DQ58
DQ59
VSS
SDA
SCL
VDDSPD
VSS
DQ20
DQ21
VSS
NC
DM2
VSS
DQ22
DQ23
VSS
DQ28
DQ29
VSS
DQS3#
DQS3
VSS
DQ30
DQ31
VSS
NC/CKE1
VDD
NC/A15
NC/A14
VDD
A11
A7
A6
VDD
A4
A2
A0
VDD
BA1
RAS#
S0#
VDD
ODT0
NC/A13
VDD
NC
VSS
DQ36
DQ37
VSS
DM4
VSS
DQ38
DQ39
VSS
DQ44
DQ45
VSS
DQS5#
DQS5
VSS
DQ46
DQ47
VSS
DQ52
DQ53
VSS
CK1
CK1#
VSS
DM6
VSS
DQ54
DQ55
VSS
DQ60
DQ61
VSS
DQS7#
DQS7
VSS
DQ62
DQ63
VSS
SAO
SA1
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
DDR_B_D20
DDR_B_D21
RP10
DDR_B_MA15
DDR_CKE0_DIMMB
DDR_B_BS#2
DDR_CKE1_DIMMB
DDR_B_DM2
DDR_B_D22
DDR_B_D23
8
7
6
5
1
2
3
4
47_0804_8P4R_5%
RP11
DDR_B_D28
DDR_B_D29
DDR_B_MA3
DDR_B_MA8
DDR_B_MA12
DDR_B_MA9
DDR_B_DQS#3
DDR_B_DQS3
8
7
6
5
1
2
3
4
47_0804_8P4R_5%
DDR_B_D30
DDR_B_D31
RP12
DDR_CKE1_DIMMB
DDR_B_BS#0
DDR_B_MA10
DDR_B_MA1
DDR_B_MA5
DDR_CKE1_DIMMB <5>
DDR_B_MA15
DDR_B_MA14
8
7
6
5
1
2
3
4
47_0804_8P4R_5%
DDR_B_MA11
DDR_B_MA7
DDR_B_MA6
RP13
DDR_B_ODT1
DDR_CS1_DIMMB#
DDR_B_CAS#
DDR_B_WE#
DDR_B_MA4
DDR_B_MA2
DDR_B_MA0
8
7
6
5
1
2
3
4
47_0804_8P4R_5%
DDR_B_BS#1
DDR_B_RAS#
DDR_CS0_DIMMB#
DDR_B_ODT0
DDR_B_MA13
DDR_B_BS#1 <5>
DDR_B_RAS# <5>
DDR_CS0_DIMMB# <5>
RP14
DDR_B_BS#1
DDR_CS0_DIMMB#
DDR_B_MA13
DDR_B_ODT0
DDR_B_ODT0 <5>
1
2
3
4
8
7
6
5
47_0804_8P4R_5%
DDR_B_D36
DDR_B_D37
DDR_B_DM4
DDR_B_D38
DDR_B_D39
DDR_B_D44
DDR_B_D45
3
DDR_B_DQS#5
DDR_B_DQS5
DDR_B_D46
DDR_B_D47
DDR_B_D52
DDR_B_D53
DDR_B_CLK1
DDR_B_CLK#1
DDR_B_CLK1 <5>
DDR_B_CLK#1 <5>
DDR_B_DM6
DDR_B_D54
DDR_B_D55
DDR_B_D60
DDR_B_D61
DDR_B_DQS#7
DDR_B_DQS7
DDR_B_D62
DDR_B_D63
+3VS
P-TWO_A5692B-A0G16-P
DIMM0 STD H:9.2mm (Bot)

Compal Secret Data
2008/04/14
Issued Date
Title

DDRII SO-DIMM 0
Custom
A
2009/04/14
Deciphered Date
Date:
Rev
0.2
LA-5381P
Sheet
E
of
46
+1.8V
+1.8V
JDDRL
+V_DDR_MCH_REF
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
DDR_A_D0
DDR_A_D1
DDR_A_DQS#0
DDR_A_DQS0
DDR_A_D2
DDR_A_D3
DDR_A_D8
DDR_A_D9
DDR_A_DQS#1
DDR_A_DQS1
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
DDR_A_D4
DDR_A_D5
DDR_A_D[0..63]
DDR_A_D[0..63]
DDR_A_DM[0..7]
DDR_A_DQS[0..7]
DDR_A_D6
DDR_A_D7
DDR_A_D12
DDR_A_D13
<5>
RP1
DDR_A_DM[0..7] <5>
DDR_A_DM0
DDR_A_DQS[0..7]
DDR_A_MA[0..15]
DDR_A_MA6
DDR_A_MA7
DDR_A_MA14
DDR_A_MA11
<5>
DDR_A_MA[0..15] <5>
DDR_A_DQS#[0..7]
DDR_A_DQS#[0..7]
DDR_A_CLK0
DDR_A_CLK#0
DDR_A_CLK0 <5>
DDR_A_CLK#0 <5>
DDR_A_D14
DDR_A_D15
+1.8V
DDR_A_BS#1
DDR_A_MA2
DDR_A_MA0
DDR_A_MA4
DDR_A_D24
DDR_A_D25
DDR_A_DM3
2
DDR_A_D26
DDR_A_D27
DDR_CKE0_DIMMA
<5> DDR_CKE0_DIMMA
DDR_A_BS#2
<5> DDR_A_BS#2
DDR_A_MA12
DDR_A_MA9
DDR_A_MA8
DDR_A_MA5
DDR_A_MA3
DDR_A_MA1
DDR_A_MA10
DDR_A_BS#0
DDR_A_WE#
<5> DDR_A_BS#0
<5> DDR_A_WE#
DDR_A_CAS#
DDR_CS1_DIMMA#
<5> DDR_A_CAS#
<5> DDR_CS1_DIMMA#
DDR_A_ODT1
<5> DDR_A_ODT1
DDR_A_D32
DDR_A_D33
DDR_A_DQS#4
DDR_A_DQS4
DDR_A_D34
DDR_A_D35
DDR_A_D40
DDR_A_D41
DDR_A_DM5
DDR_A_D42
DDR_A_D43
DDR_A_D48
DDR_A_D49
DDR_A_DQS#6
DDR_A_DQS6
DDR_A_D50
DDR_A_D51
DDR_A_D56
DDR_A_D57
DDR_A_DM7
DDR_A_D58
DDR_A_D59
SMB_CK_DAT0
SMB_CK_CLK0
<8,15,20,25> SMB_CK_DAT0
<8,15,20,25> SMB_CK_CLK0
+3VS
1
C103
0.1U_0402_16V4Z
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
DDR_A_DM2
DDR_A_D22
DDR_A_D23
DDR_A_D28
DDR_A_D29
DDR_A_DQS#3
DDR_A_DQS3
1
R44
1K_0402_1%
DDR_A_BS#0
DDR_A_MA10
DDR_A_MA3
DDR_A_MA1
DDR_A_D30
DDR_A_D31
DDR_CKE1_DIMMA
DDR_CKE1_DIMMA <5>
DDR_A_MA15
DDR_A_MA14
DDR_A_MA11
DDR_A_MA7
DDR_A_MA6
DDR_A_BS#1
DDR_A_RAS#
DDR_CS0_DIMMA#
DDR_A_ODT0
DDR_A_MA13
1
C90
1
C89
1
C91
1
C92
1
C93
1
C94
47_0804_8P4R_5%
RP5
8
1
7
2
6
3
5
4
2
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
C97
1
C100
1
C99
2
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
47_0804_8P4R_5%
RP7
1
8
2
7
3
6
4
5
1
C102
1
C101
2
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
C98
1
2
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
47_0804_8P4R_5%
RP6
DDR_A_ODT1
8
1
DDR_CS1_DIMMA#
7
2
DDR_A_CAS#
6
3
DDR_A_WE#
5
4
DDR_A_MA13
DDR_A_ODT0
DDR_A_RAS#
DDR_CS0_DIMMA#
2
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
DDR_A_MA4
DDR_A_MA2
DDR_A_MA0
47_0804_8P4R_5%
DDR_A_BS#1 <5>
DDR_A_RAS# <5>
DDR_CS0_DIMMA# <5>
DDR_A_ODT0 <5>
DDR_A_D36
DDR_A_D37
DDR_A_DM4
DDR_A_D38
DDR_A_D39
3
DDR_A_D44
DDR_A_D45
DDR_A_DQS#5
DDR_A_DQS5
DDR_A_D46
DDR_A_D47
DDR_A_D52
DDR_A_D53
DDR_A_CLK1
DDR_A_CLK#1
DDR_A_CLK1 <5>
DDR_A_CLK#1 <5>
DDR_A_DM6
DDR_A_D54
DDR_A_D55
DDR_A_D60
DDR_A_D61
DDR_A_DQS#7
DDR_A_DQS7
DDR_A_D62
DDR_A_D63
@ PTI_A5652D-A0G16-P
2
DIMM0 STD H:5.2mm (Bot)
Compal Secret Data
2008/04/14
Issued Date
2009/04/14
Deciphered Date
Title
Custom
A
+V_DDR_MCH_REF <8>
1
C88
47_0804_8P4R_5%
RP4
8
1
7
2
6
3
5
4
DDR_A_MA5
DDR_A_MA8
DDR_A_MA9
DDR_A_MA12
+V_DDR_MCH_REF
1
C87
47_0804_8P4R_5%
RP3
1
8
2
7
3
6
4
5
R43
1K_0402_1%
DDR_A_D20
DDR_A_D21
DDR_A_D18
DDR_A_D19
VSS
DQ20
DQ21
VSS
NC
DM2
VSS
DQ22
DQ23
VSS
DQ28
DQ29
VSS
DQS3#
DQS3
VSS
DQ30
DQ31
VSS
NC/CKE1
VDD
NC/A15
NC/A14
VDD
A11
A7
A6
VDD
A4
A2
A0
VDD
BA1
RAS#
S0#
VDD
ODT0
NC/A13
VDD
NC
VSS
DQ36
DQ37
VSS
DM4
VSS
DQ38
DQ39
VSS
DQ44
DQ45
VSS
DQS5#
DQS5
VSS
DQ46
DQ47
VSS
DQ52
DQ53
VSS
CK1
CK1#
VSS
DM6
VSS
DQ54
DQ55
VSS
DQ60
DQ61
VSS
DQS7#
DQS7
VSS
DQ62
DQ63
VSS
SAO
SA1
8
7
6
5
47_0804_8P4R_5%
RP2
8
1
7
2
6
3
5
4
DDR_CKE0_DIMMA
DDR_A_BS#2
DDR_CKE1_DIMMA
DDR_A_MA15
C96
0.1U_0402_16V4Z
DDR_A_DQS#2
DDR_A_DQS2
VSS
DQ16
DQ17
VSS
DQS2#
DQS2
VSS
DQ18
DQ19
VSS
DQ24
DQ25
VSS
DM3
NC
VSS
DQ26
DQ27
VSS
CKE0
VDD
NC
BA2
VDD
A12
A9
A8
VDD
A5
A3
A1
VDD
A10/AP
BA0
WE#
VDD
CAS#
NC/S1#
VDD
NC/ODT1
VSS
DQ32
DQ33
VSS
DQS4#
DQS4
VSS
DQ34
DQ35
VSS
DQ40
DQ41
VSS
DM5
VSS
DQ42
DQ43
VSS
DQ48
DQ49
VSS
NC,TEST
VSS
DQS6#
DQS6
VSS
DQ50
DQ51
VSS
DQ56
DQ57
VSS
DM7
VSS
DQ58
DQ59
VSS
SDA
SCL
VDDSPD
1
2
3
4
<5>
DDR_A_DM1
C95
1000P_0402_50V7K
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199
DDR_A_D16
DDR_A_D17
+1.8V
+0.9V
VSS
DQ4
DQ5
VSS
DM0
VSS
DQ6
DQ7
VSS
DQ12
DQ13
VSS
DM1
VSS
CK0
CK0#
VSS
DQ14
DQ15
VSS
DDR_A_D10
DDR_A_D11
VREF
VSS
DQ0
DQ1
VSS
DQS0#
DQS0
VSS
DQ2
DQ3
VSS
DQ8
DQ9
VSS
DQS1#
DQS1
VSS
DQ10
DQ11
VSS
Date:
DDRII SO-DIMM 1
Rev
0.2
LA-5381P
Sheet
E
of
46
U3B
<25>
<25>
<31>
<31>
<27>
<27>
<28>
<28>
<27>
<27>
<27>
<27>
AE3
AD4
AE2
AD3
AD1
AD2
V5
W6
U5
U6
U8
U7
PCIE_PTX_C_IRX_P0
PCIE_PTX_C_IRX_N0
PCIE_PTX_C_IRX_P1
PCIE_PTX_C_IRX_N1
PCIE_PTX_C_IRX_P2
PCIE_PTX_C_IRX_N2
PCIE_PTX_C_IRX_P3
PCIE_PTX_C_IRX_N3
PCIE_PTX_C_IRX_P4
PCIE_PTX_C_IRX_N4
PCIE_PTX_C_IRX_P5
PCIE_PTX_C_IRX_N5
<19>
<19>
<19>
<19>
<19>
<19>
<19>
<19>
AA8
Y8
AA7
Y7
AA5
AA6
W5
Y5
SB_RX0P
SB_RX0N
SB_RX1P
SB_RX1N
SB_RX2P
SB_RX2N
SB_RX3P
SB_RX3N
GPP_RX0P
GPP_RX0N
GPP_RX1P
GPP_RX1N
GPP_RX2P
GPP_RX2N
GPP_RX3P
GPP_RX3N
GPP_RX4P
GPP_RX4N
GPP_RX5P
GPP_RX5N
SB_RX0P
SB_RX0N
SB_RX1P
SB_RX1N
SB_RX2P
SB_RX2N
SB_RX3P
SB_RX3N
PART 2 OF 6
PCIE I/F GPP
PCIE I/F SB
GFX_TX0P
GFX_TX0N
GFX_TX1P
GFX_TX1N
GFX_TX2P
GFX_TX2N
GFX_TX3P
GFX_TX3N
GFX_TX4P
GFX_TX4N
GFX_TX5P
GFX_TX5N
GFX_TX6P
GFX_TX6N
GFX_TX7P
GFX_TX7N
GFX_TX8P
GFX_TX8N
GFX_TX9P
GFX_TX9N
GFX_TX10P
GFX_TX10N
GFX_TX11P
GFX_TX11N
GFX_TX12P
GFX_TX12N
GFX_TX13P
GFX_TX13N
GFX_TX14P
GFX_TX14N
GFX_TX15P
GFX_TX15N
GPP_TX0P
GPP_TX0N
GPP_TX1P
GPP_TX1N
GPP_TX2P
GPP_TX2N
GPP_TX3P
GPP_TX3N
GPP_TX4P
GPP_TX4N
GPP_TX5P
GPP_TX5N
SB_TX0P
SB_TX0N
SB_TX1P
SB_TX1N
SB_TX2P
SB_TX2N
SB_TX3P
SB_TX3N
PCE_CALRP(PCE_BCALRP)
PCE_CALRN(PCE_BCALRN)
RS880M_FCBGA528
<4> H_CADOP[0..15]
A5
B5
A4
B4
C3
B2
D1
D2
E2
E1
F4
F3
F1
F2
H4
H3
H1
H2
J2
J1
K4
K3
K1
K2
M4
M3
M1
M2
N2
N1
P1
P2
HDMI_TXD2+
HDMI_TXD2HDMI_TXD1+
HDMI_TXD1HDMI_TXD0+
HDMI_TXD0HDMI_CLK0+
HDMI_CLK0DP_L0+
DP_L0DP_L1+
DP_L1DP_L2+
DP_L2DP_L3+
DP_L3-
AC1
AC2
AB4
AB3
AA2
AA1
Y1
Y2
Y4
Y3
V1
V2
PCIE_ITX_PRX_P0
PCIE_ITX_PRX_N0
PCIE_ITX_PRX_P1
PCIE_ITX_PRX_N1
PCIE_ITX_PRX_P2
PCIE_ITX_PRX_N2
PCIE_ITX_PRX_P3
PCIE_ITX_PRX_N3
PCIE_ITX_PRX_P4
PCIE_ITX_PRX_N4
PCIE_ITX_PRX_P5
PCIE_ITX_PRX_N5
HDMI_TXD2+ <18>
HDMI_TXD2- <18>
HDMI_TXD1+ <18>
HDMI_TXD1- <18>
HDMI_TXD0+ <18>
HDMI_TXD0- <18>
HDMI_CLK0+ <18>
HDMI_CLK0- <18>
DP_L0+ <16>
DP_L0- <16>
DP_L1+ <16>
DP_L1- <16>
DP_L2+ <16>
DP_L2- <16>
DP_L3+ <16>
DP_L3- <16>
<4> H_CADON[0..15]
GFX_TX0,TX1,TX2 and TX3

DP0
AUX0 and HPD0
GFX_TX4,TX5,TX6 and TX7
DP1
AUX1 and HPD1
AD7
AE7
AE6
AD6
AB6
AC6
AD5
AE5
SB_TX0P_C
SB_TX0N_C
SB_TX1P_C
SB_TX1N_C
SB_TX2P_C
SB_TX2N_C
SB_TX3P_C
SB_TX3N_C
AC8
AB8
R55
R56
1
1
1
1
1
1
1
1
1
1
1
1
1
1
2
2
2
2
2
2
2
2
2
2
2
2
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
C162
C163
C164
C165
C166
C168
C169
C167
1
1
1
1
1
1
1
1
2
2
2
2
2
2
2
2
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
2
2
1.27K_0402_1%
2K_0402_1%
H_CADIP[0..15]
H_CADIN[0..15]
H_CADIP[0..15]
<4>
H_CADIN[0..15]
<4>
U3A
RS880M Display Port Support (muxed on GFX)
C152
C153
C154
C155
C156
C157
C158
C159
C199
C200
C160
C161
H_CADOP[0..15]
H_CADON[0..15]
PCIE_ITX_C_PRX_P0
PCIE_ITX_C_PRX_N0
PCIE_ITX_C_PRX_P1
PCIE_ITX_C_PRX_N1
PCIE_ITX_C_PRX_P2
PCIE_ITX_C_PRX_N2
PCIE_ITX_C_PRX_P3
PCIE_ITX_C_PRX_N3
PCIE_ITX_C_PRX_P4
PCIE_ITX_C_PRX_N4
PCIE_ITX_C_PRX_P5
PCIE_ITX_C_PRX_N5
SB_TX0P
SB_TX0N
SB_TX1P
SB_TX1N
SB_TX2P
SB_TX2N
SB_TX3P
SB_TX3N
<25>
<25>
<31>
<31>
<27>
<27>
<28>
<28>
<27>
<27>
<27>
<27>
New Card
Card Reader
WLAN
LAN
WUSB
3G/TV Tuner
<19>
<19>
<19>
<19>
<19>
<19>
<19>
<19>
<4>
<4>
<4>
<4>
H_CLKOP0
H_CLKON0
H_CLKOP1
H_CLKON1
<4>
<4>
<4>
<4>
H_CTLOP0
H_CTLON0
H_CTLOP1
H_CTLON1
R57
+1.1VS
H_CADOP0
H_CADON0
H_CADOP1
H_CADON1
H_CADOP2
H_CADON2
H_CADOP3
H_CADON3
H_CADOP4
H_CADON4
H_CADOP5
H_CADON5
H_CADOP6
H_CADON6
H_CADOP7
H_CADON7
Y25
Y24
V22
V23
V25
V24
U24
U25
T25
T24
P22
P23
P25
P24
N24
N25
H_CADOP8
H_CADON8
H_CADOP9
H_CADON9
H_CADOP10
H_CADON10
H_CADOP11
H_CADON11
H_CADOP12
H_CADON12
H_CADOP13
H_CADON13
H_CADOP14
H_CADON14
H_CADOP15
H_CADON15
AC24
AC25
AB25
AB24
AA24
AA25
Y22
Y23
W21
W20
V21
V20
U20
U21
U19
U18
H_CLKOP0
H_CLKON0
H_CLKOP1
H_CLKON1
T22
T23
AB23
AA22
H_CTLOP0
H_CTLON0
H_CTLOP1
H_CTLON1
M22
M23
R21
R20
2 301_0402_1% C23
A24
HT_RXCAD0P
HT_RXCAD0N
HT_RXCAD1P
HT_RXCAD1N
HT_RXCAD2P
HT_RXCAD2N
HT_RXCAD3P
HT_RXCAD3N
HT_RXCAD4P
HT_RXCAD4N
HT_RXCAD5P
HT_RXCAD5N
HT_RXCAD6P
HT_RXCAD6N
HT_RXCAD7P
HT_RXCAD7N
HT_TXCAD0P
HT_TXCAD0N
HT_TXCAD1P
HT_TXCAD1N
HT_TXCAD2P
HT_TXCAD2N
HT_TXCAD3P
HT_TXCAD3N
HT_TXCAD4P
HT_TXCAD4N
HT_TXCAD5P
HT_TXCAD5N
HT_TXCAD6P
HT_TXCAD6N
HT_TXCAD7P
HT_TXCAD7N
PART 1 OF 6
HT_RXCAD8P
HT_RXCAD8N
HT_RXCAD9P
HT_RXCAD9N
HT_RXCAD10P
HT_RXCAD10N
HT_RXCAD11P
HT_RXCAD11N
HT_RXCAD12P
HT_RXCAD12N
HT_RXCAD13P
HT_RXCAD13N
HT_RXCAD14P
HT_RXCAD14N
HT_RXCAD15P
HT_RXCAD15N
HT_RXCLK0P
HT_RXCLK0N
HT_RXCLK1P
HT_RXCLK1N
HYPER TRANSPORT CPU I/F
GFX_RX0P
GFX_RX0N
GFX_RX1P
GFX_RX1N
GFX_RX2P
GFX_RX2N
GFX_RX3P
GFX_RX3N
GFX_RX4P
GFX_RX4N
GFX_RX5P
GFX_RX5N
GFX_RX6P
GFX_RX6N
GFX_RX7P
GFX_RX7N
GFX_RX8P
GFX_RX8N
GFX_RX9P
GFX_RX9N
GFX_RX10P
GFX_RX10N
GFX_RX11P
GFX_RX11N
GFX_RX12P
GFX_RX12N
GFX_RX13P
GFX_RX13N
GFX_RX14P
GFX_RX14N
GFX_RX15P
GFX_RX15N
PCIE I/F GFX
D4
C4
A3
B3
C2
C1
E5
F5
G5
G6
H5
H6
J6
J5
J7
J8
L5
L6
M8
L8
P7
M7
P5
M5
R8
P8
R6
R5
P4
P3
T4
T3
HT_TXCAD8P
HT_TXCAD8N
HT_TXCAD9P
HT_TXCAD9N
HT_TXCAD10P
HT_TXCAD10N
HT_TXCAD11P
HT_TXCAD11N
HT_TXCAD12P
HT_TXCAD12N
HT_TXCAD13P
HT_TXCAD13N
HT_TXCAD14P
HT_TXCAD14N
HT_TXCAD15P
HT_TXCAD15N
HT_TXCLK0P
HT_TXCLK0N
HT_TXCLK1P
HT_TXCLK1N
HT_RXCTL0P
HT_RXCTL0N
HT_RXCTL1P
HT_RXCTL1N
HT_TXCTL0P
HT_TXCTL0N
HT_TXCTL1P
HT_TXCTL1N
HT_RXCALP
HT_RXCALN
HT_TXCALP
HT_TXCALN
RS880M_FCBGA528
RS780MN@
D24
D25
E24
E25
F24
F25
F23
F22
H23
H22
J25
J24
K24
K25
K23
K22
H_CADIP0
H_CADIN0
H_CADIP1
H_CADIN1
H_CADIP2
H_CADIN2
H_CADIP3
H_CADIN3
H_CADIP4
H_CADIN4
H_CADIP5
H_CADIN5
H_CADIP6
H_CADIN6
H_CADIP7
H_CADIN7
F21
G21
G20
H21
J20
J21
J18
K17
L19
J19
M19
L18
M21
P21
P18
M18
H_CADIP8
H_CADIN8
H_CADIP9
H_CADIN9
H_CADIP10
H_CADIN10
H_CADIP11
H_CADIN11
H_CADIP12
H_CADIN12
H_CADIP13
H_CADIN13
H_CADIP14
H_CADIN14
H_CADIP15
H_CADIN15
H24
H25
L21
L20
H_CLKIP0
H_CLKIN0
H_CLKIP1
H_CLKIN1
M24
M25
P19
R18
H_CTLIP0
H_CTLIN0
H_CTLIP1
H_CTLIN1
R58
B24
B25
RS780MN@
H_CLKIP0
H_CLKIN0
H_CLKIP1
H_CLKIN1
<4>
<4>
<4>
<4>
H_CTLIP0
H_CTLIN0
H_CTLIP1
H_CTLIN1
<4>
<4>
<4>
<4>
2 301_0402_1%
0718 Place within 1"

layout 1:2
0718 Place within 1"

layout 1:2
2008/04/14
Issued Date
2009/04/14
Deciphered Date
Title

RS780M&RX781-HT/PCIE
Custom
A
Compal Secret Data
Date:
Rev
0.2
LA-5381P
Sheet
E
10
of
46
L3
1
2
BLM18PG121SN1D_0603
+VDDLTP18
1
+1.8VS
C171
2 2.2U_0603_6.3V6K
+3VS
L2
+AVDD1
1
2
BLM18PG121SN1D_0603
1
C170
2.2U_0603_6.3V6K
L5
1
2
BLM18PG121SN1D_0603
+VDDLT18
1
C174
2 4.7U_0805_10V4Z
+1.8VS
2
C173
0.1U_0402_16V4Z
1
R62
1
R63
+1.8VS
1
L4
CRT_R
2
140_0402_1%
2
150_0402_1%
2
150_0402_1%
R64
CRT_G
CRT_B
+AVDD2
0_0603_5%
C172
2.2U_0603_6.3V6K
C198
0.1U_0402_16V4Z
+1.8VS
L6
1
2
BLM18PG121SN1D_0603
+AVDDQ
U3C
E17
F17
F15
C_Pr(DFT_GPIO5)
Y(DFT_GPIO2)
COMP_Pb(DFT_GPIO4)
G18
G17
E18
F18
E19
F19
RED(DFT_GPIO0)
REDb(NC)
GREEN(DFT_GPIO1)
GREENb(NC)
BLUE(DFT_GPIO3)
BLUEb(NC)
+1.1VS
L9
1
2
BLM18PG121SN1D_0603
C178
2.2U_0603_6.3V6K
+1.8VS
+NB_PLLVDD
<16> CRT_R
<16> CRT_G
<16> CRT_B
+NB_HTPVDD
L7
1
2
BLM18PG121SN1D_0603
C176
2.2U_0603_6.3V6K
R65
+1.8VS
C179
2.2U_0603_6.3V6K
A12
D14
B12
+VDDA18HTPLL
H17
PLT_RST#
+1.1VS
R67
D7
E7
0_0402_5%
<20> NB_PWRGD
<6,19> LDT_STOP#
<6,19> CPU_LDT_REQ#
<14,19,25,27,28,31,32,33>
2 715_0402_1% G14
+NB_PLLVDD
+NB_HTPVDD
+VDDA18PCIEPLL
+VDDA18HTPLL
L10
1
2
BLM18PG121SN1D_0603
A11
B11
UMA_CRT_CLK
F8
UMA_CRT_DATA E8
<14,16> CRT_HSYNC
<14,16> CRT_VSYNC
<16> UMA_CRT_CLK
<16> UMA_CRT_DATA
<15> CLK_NBHT
<15> CLK_NBHT#
R71
4.7K_0402_5%
1 1
+VDDA18PCIEPLL
1
2
BLM18PG121SN1D_0603
R72
4.7K_0402_5%
U1
U2
LCD_EDID_CLK
LCD_EDID_DATA
HDMIDAT_UMA
HDMICLK_UMA
DP_AUXP
DP_AUXN
<17> LCD_EDID_CLK
<17> LCD_EDID_DATA
<18> HDMIDAT_UMA
<18> HDMICLK_UMA
<16> DP_AUXP
<16> DP_AUXN
2 NB_PWRGD
300_0402_5%
T2
T1
CLK_SBLINK_BCLK V4
CLK_SBLINK_BCLK# V3
<15> CLK_SBLINK_BCLK
<15> CLK_SBLINK_BCLK#
+1.8VS
1
R371
C25
C24
C180
2.2U_0603_6.3V6K
CLK_NBHT
CLK_NBHT#
NBGFX_CLK
NBGFX_CLK#
<15> NBGFX_CLK
<15> NBGFX_CLK#
L11
D8
A10
C10
C12
NB_OSC_14.318ME11
F11
<15> NB_OSC_14.318M
+1.8VS
NB_RESET#
NB_PWRGD
LDT_STOP#
CPU_LDT_REQ#
+3VS
R88
B9
A9
B8
A8
B7
A7
1
B10
10K_0402_5%
G11
AUX_CAL
2 DP@
1
R104 150_0402_1%
C8
TXOUT_L0P(NC)
TXOUT_L0N(NC)
TXOUT_L1P(NC)
TXOUT_L1N(NC)
TXOUT_L2P(NC)
TXOUT_L2N(DBG_GPIO0)
TXOUT_L3P(NC)
TXOUT_L3N(DBG_GPIO2)
A22
B22
A21
B21
B20
A20
A19
B19
LCD_TXOUT0+ <17>
LCD_TXOUT0- <17>
LCD_TXOUT1+ <17>
LCD_TXOUT1- <17>
LCD_TXOUT2+ <17>
LCD_TXOUT2- <17>
TXOUT_U0P(NC)
TXOUT_U0N(NC)
TXOUT_U1P(PCIE_RESET_GPIO3)
TXOUT_U1N(PCIE_RESET_GPIO2)
TXOUT_U2P(NC)
TXOUT_U2N(NC)
TXOUT_U3P(PCIE_RESET_GPIO5)
TXOUT_U3N(NC)
B18
A18
A17
B17
D20
D21
D18
D19
LCD_TZOUT0+
LCD_TZOUT0LCD_TZOUT1+
LCD_TZOUT2-
B16
A16
D16
D17
LCD_TXCLK+
LCD_TXCLKLCD_TZCLK+
LCD_TZCLK-
PART 3 OF 6
CRT/TVOUT
+AVDDQ
2
AVDD1(NC)
AVDD2(NC)
AVDDDI(NC)
AVSSDI(NC)
AVDDQ(NC)
AVSSQ(NC)
DAC_HSYNC(PWM_GPIO4)
DAC_VSYNC(PWM_GPIO6)
DAC_SCL(PCE_RCALRN)
DAC_SDA(PCE_TCALRN)
TXCLK_LP(DBG_GPIO1)
TXCLK_LN(DBG_GPIO3)
TXCLK_UP(PCIE_RESET_GPIO4)
TXCLK_UN(PCIE_RESET_GPIO1)
DAC_RSET(PWM_GPIO1)
VDDLTP18(NC)
VSSLTP18(NC)
PLLVDD(NC)
PLLVDD18(NC)
PLLVSS(NC)
PLL PWR
LVTM
+AVDD2
F12
E12
F14
G15
H15
H14
VDDA18HTPLL
VDDA18PCIEPLL1
VDDA18PCIEPLL2
SYSRESETb
POWERGOOD
LDTSTOPb
ALLOW_LDTSTOP
VDDLT18_1(NC)
VDDLT18_2(NC)
VDDLT33_1(NC)
VDDLT33_2(NC)
VSSLT1(VSS)
VSSLT2(VSS)
VSSLT3(VSS)
VSSLT4(VSS)
VSSLT5(VSS)
VSSLT6(VSS)
VSSLT7(VSS)
PM
AVDD=100mA
+AVDD1
HT_REFCLKP
HT_REFCLKN
REFCLK_P/OSCIN(OSCIN)
REFCLK_N(PWM_GPIO3)
GFX_REFCLKP
GFX_REFCLKN
GPP_REFCLKP
GPP_REFCLKN
CLOCKs
C175
2.2U_0603_6.3V6K
LVDS_DIGON(PCE_TCALRP)
LVDS_BLON(PCE_RCALRP)
LVDS_ENA_BL(PWM_GPIO2)
A13
B13
+VDDLTP18
A15
B15
A14
B14
+VDDLT18
<17>
<17>
<17>
<17>
<17>
<17>
<17>
<17>
<17>
<17>
C14
D15
C16
C18
C20
E20
C22
UMA_ENVDD
UMA_ENBKL
E9
F7
G12
PAD
UMA_ENBKL
UMA_ENVDD <17>
UMA_ENBKL <32>
T4
2
R73
1
100K_0402_5%
GPPSB_REFCLKP(SB_REFCLKP)
GPPSB_REFCLKN(SB_REFCLKN)
I2C_CLK
I2C_DATA
DDC_DATA0/AUX0N(NC)
DDC_CLK0/AUX0P(NC)
DDC_CLK1/AUX1P(NC)
DDC_DATA1/AUX1N(NC)
MIS.
TMDS_HPD(NC)
HPD(NC)
SUS_STAT#(PWM_GPIO5)
THERMALDIODE_P
THERMALDIODE_N
STRP_DATA
RSVD
TESTMODE
D9
D10
HPD_NB
DP_HPD_R
2 0_0402_5%
2 0_0402_5%
HPD
<18,20>
DP_HPD <16>
SUS_STAT# <14,20>
Strap pin
AE8
AD8
D13
1 R78
1
SUS_STAT#
D12
1
R80
2
1.8K_0402_5%
AUX_CAL(NC)
RS780MN@
RS880M_FCBGA528
4
2008/04/14
Issued Date
2009/04/14
Deciphered Date
Title

RS780 VEDIO/CLK GEN
Custom
A
Compal Secret Data
Date:
Rev
0.2
LA-5381P
Sheet
E
11
of
46
220 ohm @ 100MHz,2A
U3D
+1.8VS
L24
2 0_0805_5%
1
SIDE@
2
SIDE@
C611
1U_0402_6.3V4Z
SIDE@
C610
1U_0402_6.3V4Z
SIDE@
C284
0.1U_0402_16V4Z
SIDE@
C213
0.1U_0402_16V4Z
SIDE@
C205
22U_0805_6.3V6M
PAR 4 OF 6
MEM_A0
MEM_A1
MEM_A2
MEM_A3
MEM_A4
MEM_A5
MEM_A6
MEM_A7
MEM_A8
MEM_A9
MEM_A10
MEM_A11
MEM_A12
AB12
AE16
V11
AE15
AA12
AB16
AB14
AD14
AD13
AD15
AC16
AE13
AC14
Y14
MEM_BA0
MEM_BA1
MEM_BA2
AD16
AE17
AD17
MEM_RAS#
MEM_CAS#
MEM_WE#
MEM_CS#
MEM_CKE
MEM_ODT
W12
Y12
AD18
AB13
AB18
V14
MEM_RASb(NC)
MEM_CASb(NC)
MEM_WEb(NC)
MEM_CSb(NC)
MEM_CKE(NC)
MEM_ODT(NC)
MEM_CLKP
MEM_CLKN
V15
W14
MEM_CKP(NC)
MEM_CKN(NC)
+1.8V_MEM_VDDQ
SIDE@
R98
1K_0402_1%
+MEM_VREF
SIDE@
C281
0.1U_0402_16V4Z
1
SIDE@
C282
0.1U_0402_16V4Z
SIDE@
R121
1K_0402_1%
SIDE@
2
+1.8V_MEM_VDDQ
R123
1 40.2_0402_1%
MEM_COMP_P
SIDE@
R120
1K_0402_1%
Y17
W18
AD20
AE21
MEM_DQS_P0
MEM_DQS_N0
MEM_DQS_P1
MEM_DQS_N1
MEM_DM0(NC)
MEM_DM1/DVO_D8(NC)
W17
AE19
MEM_DM0
MEM_DM1
IOPLLVDD18(NC)
IOPLLVDD(NC)
AE23
AE24
+1.8V_IOPLLVDD
+NB_IOPLLVDD
IOPLLVSS(NC)
AD23
MEM_VREF(NC)
AE18
MEM_DQS0P/DVO_IDCKP(NC)
MEM_DQS0N/DVO_IDCKN(NC)
MEM_DQS1P(NC)
MEM_DQS1N(NC)
MEM_COMPP(NC)
MEM_COMPN(NC)
L21
2 0_0603_5%
1
1
+1.8VS
SIDE@
C261
2.2U_0603_6.3V4Z
L13
1
1
+MEM_VREF1
2 0_0603_5%
+1.1VS
1
SIDE@
C277
0.1U_0402_16V4Z
2
SIDE@
C260
2.2U_0603_6.3V4Z
1 40.2_0402_1%
MEM_COMP_N
+MEM_VREF1
U61
SIDE@
R113
1K_0402_1%
MEM_BA0
MEM_BA1
L2
L3
BA0
BA1
MEM_A12
MEM_A11
MEM_A10
MEM_A9
MEM_A8
MEM_A7
MEM_A6
MEM_A5
MEM_A4
MEM_A3
MEM_A2
MEM_A1
MEM_A0
R2
P7
M2
P3
P8
P2
N7
N3
N8
N2
M7
M3
M8
A12
A11
A10/AP
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
MEM_CLKN
MEM_CLKP
K8
J8
MEM_CKE
K2
DQ15
DQ14
DQ13
DQ12
DQ11
DQ10
DQ9
DQ8
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0
B9
B1
D9
D1
D3
D7
C2
C8
F9
F1
H9
H1
H3
H7
G2
G8
MEM_DQ15
MEM_DQ11
MEM_DQ13
MEM_DQ12
MEM_DQ8
MEM_DQ10
MEM_DQ9
MEM_DQ14
MEM_DQ3
MEM_DQ7
MEM_DQ1
MEM_DQ6
MEM_DQ5
MEM_DQ0
MEM_DQ4
MEM_DQ2
SIDE@
C255
0.1U_0402_16V4Z
MEM_DQ0
MEM_DQ1
MEM_DQ2
MEM_DQ3
MEM_DQ4
MEM_DQ5
MEM_DQ6
MEM_DQ7
MEM_DQ8
MEM_DQ9
MEM_DQ10
MEM_DQ11
MEM_DQ12
MEM_DQ13
MEM_DQ14
MEM_DQ15
RS780MCR3@ RS880M_FCBGA528
AE12
AD12
R124
SIDE@
C280
0.1U_0402_16V4Z
1
MEM_BA0(NC)
MEM_BA1(NC)
MEM_BA2(NC)
AA18
AA20
AA19
Y19
V17
AA17
AA15
Y15
AC20
AD19
AE22
AC18
AB20
AD22
AC22
AD21
MEM_DQ0/DVO_VSYNC(NC)
MEM_DQ1/DVO_HSYNC(NC)
MEM_DQ2/DVO_DE(NC)
MEM_DQ3/DVO_D0(NC)
MEM_DQ4(NC)
MEM_DQ5/DVO_D1(NC)
MEM_DQ6/DVO_D2(NC)
MEM_DQ7/DVO_D4(NC)
MEM_DQ8/DVO_D3(NC)
MEM_DQ9/DVO_D5(NC)
MEM_DQ10/DVO_D6(NC)
MEM_DQ11/DVO_D7(NC)
MEM_DQ12(NC)
MEM_DQ13/DVO_D9(NC)
MEM_DQ14/DVO_D10(NC)
MEM_DQ15/DVO_D11(NC)
MEM_COMP_P and MEM_COMP_N trace

width >=10mils and 10mils spacing from
other Signals in X,Y,Z directions
+1.8V_MEM_VDDQ
SIDE@
2
MEM_A0(NC)
MEM_A1(NC)
MEM_A2(NC)
MEM_A3(NC)
MEM_A4(NC)
MEM_A5(NC)
MEM_A6(NC)
MEM_A7(NC)
MEM_A8(NC)
MEM_A9(NC)
MEM_A10(NC)
MEM_A11(NC)
MEM_A12(NC)
MEM_A13(NC)
SBD_MEM/DVO_I/F
+1.8V_MEM_VDDQ
R122
@
CK
CK
100_0402_1%
CKE
MEM_CS#
L8
CS
MEM_WE#
K3
WE
MEM_RAS#
K7
MEM_CAS#
L7
MEM_DM0
MEM_DM1
F3
B3
MEM_ODT
K9
MEM_DQS_P0
MEM_DQS_N0
F7
E8
MEM_DQS_P1
MEM_DQS_N1
B7
A8
+MEM_VREF
MEM_BA2
RAS
CAS
LDM
UDM
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDD
VDD
VDD
VDD
VDD
A9
C1
C3
C7
C9
E9
G1
G3
G7
G9
A1
E1
J9
M9
R1
VDDL
VSSDL
J1
J7
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
A7
B2
B8
D2
D8
E7
F2
F8
H2
H8
UDQS
UDQS
J2
VREF
A2
E2
L1
R3
R7
R8
NC
NC
NC
NC
NC
NC
VSS
VSS
VSS
VSS
VSS
A3
E3
J3
N1
P9
H5PS1G63EFR-20L_FBGA_84P
HYNSIDE@
SIDE@ Layout
C283
1U_0603_10V6K
Note: 50 mil for VSSDL
U61 SAMSIDE@
K4N1G164QE-HC20
SA00002UH00 : Hynix
SA000031O00 : Samsung
64M*16 DDR2 400MHZ
Compal Secret Data
Issued Date
+1.8V_MEM_VDDQ
ODT
LDQS
LDQS
+1.8V_MEM_VDDQ
2008/04/14
Deciphered Date
2009/04/14
Title

RS780M&RX781 SIDE PORT
Custom
Date:
Rev
0.2
LA-5381P
Sheet
12
of
46
U3F
F9
G9
AE11
AD11
+1.8VS
+1.8VS
C251
1U_0402_6.3V4Z
L89
0_0603_5%
VDD18_1
VDD18_2
VDD18_MEM1(NC)
VDD18_MEM2(NC)
RS880M_FCBGA528
SIDE@
C252
1U_0402_6.3V4Z
VDD_MEM1(NC)
VDD_MEM2(NC)
VDD_MEM3(NC)
VDD_MEM4(NC)
VDD_MEM5(NC)
VDD_MEM6(NC)
VDD33_1(NC)
VDD33_2(NC)
AE10
AA11
Y11
AD10
AB10
AC10
1
+
2
GROUND
RS880M_FCBGA528
+VDD_MEM
+3VS
1
0.1U_0402_16V4Z
1
0.1U_0402_16V4Z
NOSIDE@
2
C250
2
0_0402_5%
R625
C253
A2
B1
D3
D5
E4
G1
G2
G4
H7
J4
R7
L1
L2
L4
L7
M6
N4
P6
R1
R2
R4
V7
U4
V8
V6
W1
W2
W4
W7
W8
Y6
AA4
AB5
AB1
AB7
AC3
AC4
AE1
AE4
AB2
AE14
D11
G8
E14
E15
J15
J12
K14
M11
L15
RS780MN@
L82 SIDE@
2
H11
H12
RS780MN@
VSSAPCIE1
VSSAPCIE2
VSSAPCIE3
VSSAPCIE4
VSSAPCIE5
VSSAPCIE6
VSSAPCIE7
VSSAPCIE8
VSSAPCIE9
VSSAPCIE10
VSSAPCIE11
VSSAPCIE12
VSSAPCIE13
VSSAPCIE14
VSSAPCIE15
VSSAPCIE16
VSSAPCIE17
VSSAPCIE18
VSSAPCIE19
VSSAPCIE20
VSSAPCIE21
VSSAPCIE22
VSSAPCIE23
VSSAPCIE24
VSSAPCIE25
VSSAPCIE26
VSSAPCIE27
VSSAPCIE28
VSSAPCIE29
VSSAPCIE30
VSSAPCIE31
VSSAPCIE32
VSSAPCIE33
VSSAPCIE34
VSSAPCIE35
VSSAPCIE36
VSSAPCIE37
VSSAPCIE38
VSSAPCIE39
VSSAPCIE40
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
C599SIDE@
4.7U_0805_10V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C598SIDE@
0.1U_0402_16V4Z
C597SIDE@
1
C239
0.1U_0402_16V4Z
1
C238
C286SIDE@
1
C237
0.1U_0402_16V4Z
1
C236
C285SIDE@
1
C246
VDDA18PCIE_1
VDDA18PCIE_2
VDDA18PCIE_3
VDDA18PCIE_4
VDDA18PCIE_5
VDDA18PCIE_6
VDDA18PCIE_7
VDDA18PCIE_8
VDDA18PCIE_9
VDDA18PCIE_10
VDDA18PCIE_11
VDDA18PCIE_12
VDDA18PCIE_13
VDDA18PCIE_14
VDDA18PCIE_15
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
PART 6/6
1U_0402_6.3V4Z
1
C235
4.7U_0805_10V4Z
J10
P10
K10
M10
L10
W9
H9
T10
R10
Y9
AA9
AB9
AD9
AE9
U10
L12
M14
N13
P12
P15
R11
R14
T12
U14
U11
U15
V12
W11
W15
AC12
AA14
Y18
AB11
AB15
AB17
AB19
AE20
AB21
K11
+VDDA18PCIE
2A
C245
L22
1
0_0805_5%
330U_B2_2.5VM_R15M
C234
+1.8VS
VDD_CORE:GM=5A/PM=10A
C233
4.7U_0805_10V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
+NB_CORE
10U_0805_10V6K
2
PAD-OPEN 4x4m
C232
+1.1VS
10U_0805_10V6K
K12
J14
U16
J11
K15
M12
L14
L11
M13
M15
N12
N14
P11
P13
P14
R12
R15
T11
T15
U12
T14
J16
VDDC_1
VDDC_2
VDDC_3
VDDC_4
VDDC_5
VDDC_6
VDDC_7
VDDC_8
VDDC_9
VDDC_10
VDDC_11
VDDC_12
VDDC_13
VDDC_14
VDDC_15
VDDC_16
VDDC_17
VDDC_18
VDDC_19
VDDC_20
VDDC_21
VDDC_22
C244
1
C229
PJP3
0.1U_0402_16V4Z
1
C228
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C231
1
C227
2
2
2
2
1
1
0.1U_0402_16V4Z
1
C226
VDDHTTX_1
VDDHTTX_2
VDDHTTX_3
VDDHTTX_4
VDDHTTX_5
VDDHTTX_6
VDDHTTX_7
VDDHTTX_8
VDDHTTX_9
VDDHTTX_10
VDDHTTX_11
VDDHTTX_12
VDDHTTX_13
1
1
1
1
2
2
C230
1
C225
AE25
AD24
AC23
AB22
AA21
Y20
W19
V18
U17
T17
R17
P17
M17
C220
C219
C222
C221
C224
C223
0.1U_0402_16V4Z
+VDDHTTX
10U_0805_10V6K
C212
C243
0.1U_0402_16V4Z
2A
1
0_0805_5%
VDDHTRX_1
VDDHTRX_2
VDDHTRX_3
VDDHTRX_4
VDDHTRX_5
VDDHTRX_6
VDDHTRX_7
10U_0805_10V6K
C211
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
H18
G19
F20
E21
D22
B23
A23
PART 5/6
+VDDA11PCIE
C242
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
L19
2
1
C218
+1.1VS
2.5A
A6
B6
C6
D6
E6
F6
G7
H8
J9
K9
M9
L9
P9
R9
T9
V9
U9
VDDPCIE_1
VDDPCIE_2
VDDPCIE_3
VDDPCIE_4
VDDPCIE_5
VDDPCIE_6
VDDPCIE_7
VDDPCIE_8
VDDPCIE_9
VDDPCIE_10
VDDPCIE_11
VDDPCIE_12
VDDPCIE_13
VDDPCIE_14
VDDPCIE_15
VDDPCIE_16
VDDPCIE_17
0.1U_0402_16V4Z
2
10U_0805_10V6K
1
C217
VDDHT_1
VDDHT_2
VDDHT_3
VDDHT_4
VDDHT_5
VDDHT_6
VDDHT_7
C241
1
C216
J17
K16
L16
M16
P16
R16
T16
0.1U_0402_16V4Z
1
C214
L17
1
2
FBMA-L11-201209-221LMA30T_0805
U3E
4.7U_0805_10V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2A
+VDDHTRX
1
C215
+1.2V_HT
C240
2
0_0805_5%
1
C210
0.1U_0402_16V4Z
L18
1
C208
C247
1
C207
0.1U_0402_16V4Z
1
C206
0.1U_0402_16V4Z
1
C209
+VDDHT
VSSAHT1
VSSAHT2
VSSAHT3
VSSAHT4
VSSAHT5
VSSAHT6
VSSAHT7
VSSAHT8
VSSAHT9
VSSAHT10
VSSAHT11
VSSAHT12
VSSAHT13
VSSAHT14
VSSAHT15
VSSAHT16
VSSAHT17
VSSAHT18
VSSAHT19
VSSAHT20
VSSAHT21
VSSAHT22
VSSAHT23
VSSAHT24
VSSAHT25
VSSAHT26
VSSAHT27
1U_0402_6.3V4Z
2A
L16
2
1
0_0805_5%
+1.1VS
POWER
A25
D23
E22
G22
G24
G25
H19
J22
L17
L22
L24
L25
M20
N22
P20
R19
R22
R24
R25
H20
U22
V19
W22
W24
W25
Y21
AD25
+1.8VS
0_0603_5%
2008/04/14
Issued Date
2009/04/14
Deciphered Date
Title

RS780M&RX781 PWR/GND
Custom
A
Compal Secret Data
Date:
Rev
0.2
LA-5381P
Sheet
E
13
of
46
DFT_GPIO5:STRAP_DEBUG_BUS_GPIO_ENABLEb
RS780 DFT_GPIO5 mux at CRT_VSYNC pull High to 3K

SI2: Change to 3K pull high
<11,16> CRT_VSYNC
1
2
R101
@
2
R102
1
3K_0402_5%
1
3K_0402_5%
+3VS
Enables the Test Debug Bus using GPIO.

1 : Enable (RX780, RS780)
0 : Disable (RX780, RS780)
PIN: RS740-->RS780_AUX_CAL; RX780-->NB_TV_C; RS780--> VSYNC#
DFT_GPIO[4:2]: STRAP_PCIE_GPP_CFG[2:0]
These
000 :
001 :
010 :
011 :
100 :
101 :
111 :
RS780 use register to control PCI-E configure
pin straps are used to configure PCI-E GPP mode.

00001
00010
01011
00100
01010
01100
01011
DFT_GPIO1: LOAD_EEPROM_STRAPS
RS780 DFT_GPIO1 <11,20>
SUS_STAT#
D4 @
1
PLT_RST#
Selects Loading of STRAPS from EPROM

1 : Bypass the loading of EEPROM straps and use Hardware Default Values
0 : I2C Master can load strap values from EEPROM if connected, or use
<11,19,25,27,28,31,32,33>
default values if not connected
RS740/RX780: DFT_GPIO1 RS780:SUS_STAT
DFT_GPIO0: STRAP_DEBUG_BUS_PCIE_ENABLEb
RX780: Enables the Test Debug Bus using PCIE bus

1 : Disable ( Can still be enabled using nbcfg register access )
0 : Enable
RS780 use HSYNC to enable SIDE PORT (internal pull high)

@
<11,16> CRT_HSYNC
2
R125
1
3K_0402_5%
+3VS
RS780: Enables Side port memory ( RS780 use HSYNC#)

1. Disable (RS780)
0 : Enable (RS780)
SIDE@
2
1
R136
3K_0402_5%
2008/04/14
Issued Date
2009/04/14
Deciphered Date
Title

RS780M&RX781 STRAPS
Custom
A
Compal Secret Data
Date:
Rev
0.2
LA-5381P
Sheet
E
14
of
46
+VDDCLK_IO
+1.2V_HT
R168
1
2
0_0805_5%
0.1U_0402_16V4Z
1
C452
22U_0805_6.3V6M
+3VS_CLK
R167
1
2
0_0805_5%
+3VS
1
C453
2
0.1U_0402_16V4Z
1
C454
C455
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C456
C457
2
0.1U_0402_16V4Z
1
C444
22U_0805_6.3V6M
C445
0.1U_0402_16V4Z
C446
0.1U_0402_16V4Z
C447
0.1U_0402_16V4Z
C448
0.1U_0402_16V4Z
C449
0.1U_0402_16V4Z
C450
0.1U_0402_16V4Z
C451
1U_0402_6.3V4Z
+3VS_CLK
1
C458
0.1U_0402_16V4Z
C459
0.1U_0402_16V4Z
C460
0.1U_0402_16V4Z
C461
0.1U_0402_16V4Z
CLK_XTAL_OUT
CLK_48M_CRUSB
R170
2 33_0402_5%
CLK_XTAL_IN
NB_OSC_14.318M_R
R379
2 158_0402_1%
Y2
22P_0402_50V8J
2
22P_0402_50V8J
+3VS_CLK
GND
U10
73
C464
R180
8.2K_0402_5%
<8,9,20,25> SMB_CK_CLK0
<8,9,20,25> SMB_CK_DAT0
27M_SEL
1 *
configure as 27M and 27M_SS output
27M_SEL
configure as SRC_7 output
0
* default
+3VS_CLK
<27> CLK_PCIE_MCARD3#
CLK_PCIE_MCARD3
<11> CLK_SBLINK_BCLK#
LINK<11> CLK_SBLINK_BCLK
WUSB<27>
SB
+VDDCLK_IO
CLK_PCIE_MCARD1
<27> CLK_PCIE_MCARD2
3G/TV Tuner
<27>
WLAN
SCL
SDA
VDD_DOT
SRC_7#/27M
SRC_7/27M_SS
VSS_DOT
SRC_5#
SRC_5
SRC_4#
SRC_4
VSS_SRC
VDD_SRC_IO
SRC_3#
SRC_3
SRC_2#
SRC_2
VDD_SRC
VDD_SRC_IO
+3VS_CLK
+VDDCLK_IO
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
OSC_14M_NB
NB_OSC_14.318M <11>
1
R380
SB_14.318M <19>
RS780
1.1V 158R/90.9R
2
90.9_0402_1%
Use voltage divider resistor R379 & R380 to pull low
CLK_NBHT <11>
CLK_NBHT# <11>NB
1
2
+3VS_CLK
R174
8.2K_0402_5%
1
2
C629
1U_0402_6.3V4Z
CLK_CPU_R_BCLK
1
2
R946
0_0402_5%
CLK_CPU_R_BCLK# 1
2
R945
0_0402_5%
VSS_SRC
SRC_1#
SRC_1
SRC_0#
SRC_0
CLKREQ_0#
ATIGCLK_2#
ATIGCLK_2
VSS_ATIG
VDD_ATIG_IO
VDD_ATIG
ATIGCLK_1#
ATIGCLK_1
ATIGCLK_0#
ATIGCLK_0
SB_SRC_1#
SB_SRC_1
VSS_SB_SRC
+3VS_CLK
+VDDCLK_IO
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
33_0402_5%
CLK_CPU_BCLK <6>
configure as single-ended 66MHz output
NB_OSC_14.318M
2
0*
configure as differential 100MHz output
* default
R186
261_0402_1%
@
CPU
CLK_CPU_BCLK# <6>
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
configure as normal SRC(SRC_6) output

0 *
* default
1
14.31818MHZ_20P_6X1430004201
1
C465
VSS_48
48MHz_0
48MHz_1
VDD_48
XTAL_OUT
XTAL_IN
VSS_REF
REF_0/SEL_HTT66
REF_1/SEL_SATA
REF_2/SEL_27
VDD_REF
VDD_HTT
HTT_0/66M_0
HTT_0#/66M_1
VSS_HTT
PD#
CPU_K8_0
CPU_K8_0#
configure as SATA output
SEL_SATA
1
CLK_XTAL_OUT
CLK_XTAL_IN
2
R181
8.2K_0402_5%
SEL_SATA
R175
CLK_48M_USB <20>
+3VS_CLK
R179
8.2K_0402_5%
@
SEL_SATA
27M_SEL
+3VS_CLK
+3VS_CLK
+3VS_CLK
CLKREQ_NCARD#
CLKREQ_MCARD2#
VDD_CPU
VDD_CPU_I/O
VSS_CPU
CLKREQ_1#
CLKREQ_2#
VDD_A
VSS_A
VSS_SATA
SRC_6/SATA
SRC_6#/SATA#
VDD_SATA
CLKREQ_3#
CLKREQ_4#
SB_SRC_SLOW#
SB_SRC_0
SB_SRC_0#
VDD_SB_SRC
VDD_SB_SRC_IO
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
+3VS_CLK
+VDDCLK_IO
CLKREQ_MCARD1#
1
R324
1
R325
1
R326
2
8.2K_0402_5%
2
8.2K_0402_5%
2
8.2K_0402_5%
+3VS_CLK
CLKREQ_NCARD# <25>
CLKREQ_MCARD2# <27>
+3VS_CLK
CLK_SBSRC_BCLK <19>
CLK_SBSRC_BCLK# <19> SB
SRC
+3VS_CLK
CLKREQ_MCARD1# <27>
1
R372
2
10K_0402_5%
+3VS_CLK
+3VS_CLK
+VDDCLK_IO
3
SLG8SP626VTR_QFN72_10x10
NBGFX_CLK <11>
NBGFX_CLK# <11>
NB CLOCK INPUT TABLE
NB GFX
NB CLOCKS
RX780
RS780
HT_REFCLKP
100M DIFF
100M DIFF
100M DIFF
100M DIFF
REFCLK_N
14M SE (1.8V)
NC
14M SE (1.1V)
vref
GFX_REFCLK
100M DIFF
100M DIFF(IN/OUT)*
GPP_REFCLK
100M DIFF
NC or 100M DIFF OUTPUT
GPPSB_REFCLK
100M DIFF
100M DIFF
HT_REFCLKN
CLK_PCIE_MCARD0 <31>
CLK_PCIE_MCARD0# <31>Card
LAN
CLK_PCIE_NCARD <25>
CLK_PCIE_NCARD# <25>
New Card
Compal Secret Data

2008/04/14
2009/04/14
Deciphered Date
Title
Custom
A
CLK_PCIE_LAN <28>
CLK_PCIE_LAN# <28>
Issued Date
REFCLK_P
Reader
Date:
Clock Generator
Rev
0.2
LA-5381P
Sheet
E
15
of
46
+5VS
CRT CONNECTOR
D36 CRT@
2
1
5
1
G
CRT@
R100
6.8K_0402_5%
CRT@
R238
4.7K_0402_5%
4
VSYNC
1
C470
@
HSYNC
BLUE_L
+CRT_VCC
VSYNC
D_DDCCLK
1
C478
CRT@
220P_0402_50V7K
2
U13
SN74AHCT1G125GW_SOT353-5
CRT@
D_DDCCLK
6
2N7002DW-T/R7_SOT363-6
C857
CRT@
Q10A
@
470P_0402_50V8J
C856
@
2 470P_0402_50V8J
<10>
<10>
RV37
DP@
100K_0402_5%
+3VS
DP_L2+
DP_L2-
<10>
<10>
DP_L3+
DP_L3-
B+
DP@
DP@
Q160B
Q160A
2N7002DW-T/R7_SOT363-6
2N7002DW-T/R7_SOT363-6
DP_C_AUXP
3
4
1
6
DP_TXD0+
DP_TXD0-
1 DP@
1
1
4
2 R285
0_0402_5%
@
2 2
2 R154
0_0402_5%
@
2 2
1 DP@
DP_R_TXD0+
DP_R_TXD0-
1 DP@
DP_R_TXD1+
DP_R_TXD1-
DP_TXD2+
DP_TXD2-
1
4
2 R153
0_0402_5%
@
3 3
L15
3
DP_TXD3DP_TXD3+
WCM-2012-900T_0805
1
2 R286
DP@ 0_0402_5%
4
1
2 R149
0_0402_5%
@
2 2
L14
WCM-2012-900T_0805
1
2 R155
DP@ 0_0402_5%
21
22
23
24
DP_R_TXD2+
DP_R_TXD2-
LANE1_P
GND
LANE1_N
LANE2_P
GND
LANE2_N
3
LANE3_P
GND
LANE3_N
GND
GND
AUXCH_P
GND
AUXCH_N
HPD
RETURN
DP_PWR
@ MOLEX_SD-105019-001
WCM-2012-900T_0805
1
2 R150
DP@ 0_0402_5%
GND
LANE0_N
DP@
RV44
5.1M_0402_5%
PIN 14
PULLED UP (26K)
INSIDE DONGLE
DP_R_TXD3DP_R_TXD3+
WCM-2012-900T_0805
1
2 R283
DP@ 0_0402_5%
DP@
Q159A
2N7002DW-T/R7_SOT363-6
CAP_DET
2
DP@
1
2
0.1U_0402_16V7K
CV59
CV35
180P_0402_50V8J
DP@
LANE0_P
EN
L23
EN
2 MBK1608121YZF_0603
DP_TXD1+
DP_TXD1-
DP@
Q159B
2N7002DW-T/R7_SOT363-6
DP@
2
2
EN
5
DP@
5
DP_R_TXD3CAP_DET
L20
1 DP@
RV39
RV38
DP@
DP@
100K_0402_5%
100K_0402_5%
Q158B
Q158A
2N7002DW-T/R7_SOT363-6
2N7002DW-T/R7_SOT363-6
DP_C_AUXN
3
4
1
6
EN
DP@
RV45
1M_0402_5%
Compal Secret Data
Issued Date
2008/04/14
2009/04/14
Deciphered Date
Title

CRT/TV-OUT Connector
Custom
A
DP_TXD3+
DP_TXD3-
DP_C_AUXN
B+
2
DP_AUXN
DP_R_TXD2DP_R_TXD3+
DP@
100K_0402_5%
1 CV34
DP@
RV79
DP@
100P_0402_50V8J
UV12
2
74AHC1G125GW_SOT353-5
RV80
100K_0402_5%
DP_R_TXD1DP_R_TXD2+
DP_TXD2+
DP_TXD2-
LV13
1
2 1
1K_0402_5%
DP@
RV41
DP@
1
5
Y
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
DP_R_TXD0DP_R_TXD1+
DP_C_AUXP
2
1
100K_0402_5%
OE#
P
DP@
DP_HPD
DP_AUXP
<10>
<10>
DP_R_TXD0+
DP_TXD1+
DP_TXD1-
DP_C_AUXP
DP_C_AUXN
<11>
DP_L1+
DP_L1-
RV40
2
DP@
RV105
2.2K_0402_5%
<10>
<10>
DP_TXD0+
DP_TXD0-
DP_C_AUXN
+3VS_DP
DP_L0+
DP_L0-
DP@
1
2
0.1U_0402_16V7K
CV58
DP_AUXN
SUYIN_070546FR015S267ZR
@
GROUND
+3VS
DP_C_AUXP
DP@
DP@
1
2
0.1U_0402_16V7K
CV26
1
2
CV27
DP@ 0.1U_0402_16V7K
DP@
1
2
0.1U_0402_16V7K
CV28
1
2
DP@ 0.1U_0402_16V7K
CV29
DP@
1
2
0.1U_0402_16V7K
CV30
1
2
CV31
DP@ 0.1U_0402_16V7K
DP@
1
2
0.1U_0402_16V7K
CV32
1
2
0.1U_0402_16V7K
CV33
<11>
16
17
JDP
DP@
1
2
0.1U_0402_16V7K
CV57
DP_AUXP
G1
G2
+3VS_DP
Display Port
<11>
0.1U_0402_16V7K
@
C181
33P_0402_50V8K
FV3
KC FBM-L11-201209-221LMAT_0805
1A_6VDC_MINISMDC110
LV14
+3VS_DP_F
2
1 +3VS_DP_L 1
2
DP@
2
2
DP@
RB161M-20_SOD123-2
CV25
CV24
1
DP@
DP@
@
1
1
C288
1000P_0402_50V7K
2
1
0.1U_0402_16V7K
2
1
4 D_VSYNC
D_DDCDATA
GREEN_L
6
11
1
7
12
2
8
13
3
9
14
4
10
15
5
DP@
D21
+3VS
RED_L
D_DDCDATA
+3VS
<11> UMA_CRT_CLK
RS780 DAC_SCL & SDA is 5V tolerance
HSYNC
CRT@
R218
6.8K_0402_5%
3
2N7002DW-T/R7_SOT363-6
Q10B
CRT@
@
C177
33P_0402_50V8K
2
10_0402_5%
5
1
2
<11,14> CRT_VSYNC
<11> UMA_CRT_DATA
1
L84
1
CRT@
R237
4.7K_0402_5%
@
C279
D_HSYNC
C474
+3VS
1
1000P_0402_50V7K
1000P_0402_50V7K
@
C278
+CRT_VCC
+CRT_VCC
1
U14
CRT@
CRT@
1
2
L83
10_0402_5%
CRT@
1
2
C477
0.1U_0402_16V4Z
+3VS
@
C276
P
OE#
DAN217_SC59 DAN217_SC59 DAN217_SC59
<11,14> CRT_HSYNC
1
10P_0402_50V8J
@
C275
JCRT
6
11
1
7
12
2
8
13
3
9
14
4
10
15
5
CRT@
10P_0402_50V8J
C472
R540
CRT@
1
2
10K_0402_5%
CRT@
P
OE#
C476
1000P_0402_50V7K
CRT@
1000P_0402_50V7K
CRT@
C858
CRT@
C469
@ D35
CRT@
C859
@ D37
BLUE_L
@ D34
CRT@
C471
+3VS
6P_0402_50V8K
R217
CRT@
6P_0402_50V8K
R211
CRT@
6P_0402_50V8K
R214
CRT@
2
1
150_0402_1%
2
1
150_0402_1%
2
1
140_0402_1%
<11> CRT_B
+CRT_VCC
CRT@
1
2
C473
0.1U_0402_16V4Z
GREEN_L
+CRT_VCC
1
1.1A_6V_MINISMDC110F-2
C475
0.1U_0402_16V4Z
2 CRT@
RB491D_SOT23-3
6P_0402_50V8K
<11> CRT_G
+R_CRT_VCC
F2 CRT@
1
2
RED_L
6P_0402_50V8K
<11> CRT_R
6P_0402_50V8K
L47 CRT@
1
2
NBQ100505T-800Y_0402
L48 CRT@
1
2
NBQ100505T-800Y_0402
L49 CRT@
1
2
NBQ100505T-800Y_0402
Date:
Rev
0.2
LA-5381P
Sheet
E
16
of
46
LCD/PANEL BD. Conn.

+LCD_VDD
Change +3VALW to +3VS
+3VS
R142
150_0603_5%
+3VS
R143
100K_0402_5%
2
3
ENVDD
Q2
AO3413_SOT23
2
2
47K_0402_5%
Q1B
2N7002DW-T/R7_SOT363-6
C182
0.01U_0402_25V7K
+LCD_VDD
W= 60 mils
Add C182
for soft start
5
1
2
0_0402_5%
R140 2
1
1
R668
<11> UMA_ENVDD
Inrush current = 0A
1
Q1A
2N7002DW-T/R7_SOT363-6
6 2
W= 60 mils
C262
0.1U_0402_16V7K
R144
100K_0402_5%
C264
0.1U_0402_16V4Z
C263
@
4.7U_0805_10V4Z
C745
2
<11>
<11>
<11>
<11>
<11>
<11>
LCD_TZOUT0+
LCD_TZOUT2-
INT_MIC
LCD_TXOUT0+
LCD_TXOUT0LCD_TXOUT1+
LCD_TXOUT2LCD_TZOUT0+
LCD_TZOUT2BKOFF#
1
BKOFF#
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
GND
@
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
GND
1.5A
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
+LCDVDD_R
LCD_TXCLK+
LCD_TXCLKDAC_BRIG
INVT_PWM
LCD_TZCLK+
LCD_TZCLK-
DAC_BRIG <32>
INVT_PWM <32>
C266
4.7U_0805_10V4Z
+LCDVDD_R
+3VS
+LCD_INV
+3VS
ACES_88242-4001
LCD_EDID_CLK
LCD_EDID_DATA
C265
0.1U_0402_16V4Z
LCD_EDID_CLK <11>
LCD_EDID_DATA <11>
2
4.7K_0402_5%
2
4.7K_0402_5%
+LCD_VDD
1
LCD_TZCLK+ <11>
LCD_TZCLK- <11>
LCD_EDID_CLK
LCD_EDID_DATA
R156
10K_0402_5%
1
R68
1
R69
2 L8
1
0_0805_5%
LCD_TXCLK+ <11>
LCD_TXCLK- <11>
Add R156
@
C270
1
C267
2
@
C273
1000P_0402_50V7K
<11>
<11>
<11>
<11>
<30> INT_MIC
<11> LCD_TXOUT0+
<11> LCD_TXOUT0LCD_TXOUT1+
LCD_TXOUT2-
JLVDS
+5V_LVDS_CAM
USB20_P9_LVDS
USB20_N9_LVDS
1000P_0402_50V7K
R429
1
2
0_0603_5%
<26> USB20_P9_LVDS
@
<26> USB20_N9_LVDS
<32>
+3VS
0.1U_0402_16V4Z
0.1U_0402_16V4Z
+5VALW
R431
1
2
0_0603_5%
0.1U_0402_16V4Z
+5VS
@
C274
B+
L12
2
1
FBMA-L11-201209-221LMA30T_0805
@
C272
0.1U_0402_16V4Z
C268
1000P_0402_50V7K
68P_0402_50V8J
0.1U_0402_25V4K
Rated Current MAX:3000mA

+LCD_INV
@
C269
@
C271
Compal Secret Data
2008/04/14
Issued Date
Title
Custom
A
2009/04/14
Deciphered Date
Date:
LCD CONN.
Rev
0.2
LA-5381P
Sheet
E
17
of
46
R242
2.2K_0402_5%
HDMI@
P1_1/KI1#/AN9/CMP0_1
MODE
17
HDMI_CLK
18
HDMI_DATA
H@
C257
0.1U_0402_16V4Z
H@
C543
1U_0402_6.3V4Z
HDMI_DATA
P4_5/INT0#/RXD1
10
P3_3/TCIN/INT3#/SSI00/CMP1_0
P1_7/CNTR00/INT10#
P3_4/SCS#/SDA/CMP1_1
HDMI_CECOUT
HDMI_HPD_R
19
EC_SMB_DA1
20
VCC/AVCC
C256
1
0.1U_0402_16V4Z
H@
1
4.7K_0402_5%
H@
HDMI_CECIN
HDMI_CLK
7
2
R183
1 1
2
P4_2/VREF
XIN/P4_6
+3VL
15
16
2
G
R243
2.2K_0402_5%
HDMI@
R163
HDMI_CECOUT
HDMI_SCLK
1
Q33
BSH111_SOT23-3
HDMI@
2
G
27K_0402_5%
H@
P1_2/KI2#/AN10/CMP0_2
2CEC_XIN
47K_0402_5%
H@
R177
R583
27K_0402_5%
H@
HDMI_CEC
S
G
H@
Q149
2N7002_SOT23-3
R158
R159
10K_0402_5%
10K_0402_5%
HDMI@
HDMI@
CEC_FSHUPD (Pin13)
HDMI_CECIN
Low= Force to update flash.

VSS/AVSS
+HDMI_5V_OUT
R165
100K_0402_5%
H@
HDMI_SDATA
1
Q13
BSH111_SOT23-3
HDMI@
H@
Q150
2N7002_SOT23-3
XOUT/P4_7
D13
H@
P1_3/KI3#/AN11/TZOUT
14
+3VL
2
4.7K_0402_5%
13
+3VL
R157
10K_0402_5%
H@
P1_4/TXD0
+3VL
+3VL
CEC_INT# <32>
H@ C259
0.1U_0402_16V4Z
2
2
4.7K_0402_5%
2
R178
P1_5/RXD0/CNTR01/INT11#
RESET#
+3VL
H@
1
R169
H@
CEC_FSHUPD
1
R171
CEC_TEST
11
12
P3_7/CNTR0#/SSO/TXD1
1CEC_RST# 3
4.7K_0402_5%
H@
1CEC_XOUT 4
47K_0402_5%
H@
5
2
R182
P1_6/CLK0/SSI01
P3_5/SSCK/SCL/CMP1_2
+3VL
EC_SMB_CK1
<32,37> EC_SMB_CK1
H@
U8
HDMI CEC Controller
Update BSH111 Correct Library at PVT
EC_SMB_DA1 <32,37>
R5F211B4D33SP_LSSOP20
R589
+3VL
HDMI@
1
R588
2
D57
100K_0402_5%
HDMI_HPD_R
HDMI@
1
+3VS
2.2K_0402_5%
HPD
RB161M-20_SOD123-2
D53
2
1
+5VS
<11,20>
HDMI@
D17
1
F3 HDMI@
+5VS_HDMI
2
1
+HDMI_5V_OUT
1.1A_6V_MINISMDC110F-2
1
C287
HDMI@
0.1U_0402_16V4Z
2
RB161M-20_SOD123-2
HDMI@
+5VL
HDMI@
R958
100K_0402_5%
HDMI Connector
JHDMI
HDMI_HPD
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
+HDMI_5V_OUT
HDMI_SDATA
HDMI_SCLK
HDMI_CLK-
<10> HDMI_TXD0+
<10> HDMI_TXD0<10> HDMI_TXD1+
<10> HDMI_TXD1-
HDMI_R_CK-
2
R616
0_0402_5%
HDMI@
1
4
HDMI_CLK+
HDMI@
WCM-2012-900T_0805
1
2
R617
0_0402_5%
HDMI_R_CK+
HDMI_R_CK-
3
HDMI_R_CK+
1 HDMI@ 2
R307
715_0402_1%
1 HDMI@ 2
R315
715_0402_1%
<10>
<10>
<10>
<10>
L85
Q136A
2N7002DW-T/R7_SOT363-6
HDMI_TXD2+
HDMI_TXD2HDMI_CLK0+
HDMI_CLK0-
HDMI@
HDMI@
HDMI@
HDMI@
C189
C188
C190
C184
1
1
1
1
2
2
2
2
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
HDMI_TX0+
HDMI_TX0HDMI_TX1+
HDMI_TX1-
HDMI_CEC
HDMI_R_CK-
HDMI@
HDMI@
HDMI@
HDMI@
C187
C191
C185
C186
1
1
1
1
2
2
2
2
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
HDMI_TX2+
HDMI_TX2HDMI_CLK+
HDMI_CLK-
HDMI_R_D0+
HDMI_R_D1-
HDMI_R_CK+
HDMI_R_D0-
HDMI_R_D1+
HDMI_R_D2-
+5VS
HDMI_R_D2+
HP_DET
+5V
DDC/CEC_GND
SDA
SCL
Reserved
CEC
CKGND
CK_shield GND
CK+
GND
D0GND
D0_shield
D0+
D1D1_shield
D1+
D2D2_shield
D2+
20
21
22
23
@ TYCO_1939864-1_19P
0_0402_5%
2
3
WCM-2012-900T_0805
1
2
R619
0_0402_5%
HDMI_HPD
C851
0.1U_0402_16V4Z
HDMI@
+5VS
HDMI_R_D0+
2
HDMI@
R620
4
HDMI_TX1+
0_0402_5%
HDMI@
1 HDMI@ 2
R297
715_0402_1%
HDMI_R_D1+
1 HDMI@ 2
R173
715_0402_1%
+5VS
HDMI@
Q137B
2N7002DW-T/R7_SOT363-6
HDMI_R_D1+
1 HDMI@ 2
R141
715_0402_1%
HDMI_R_D21 HDMI@ 2
R139
715_0402_1%
R176
4.7K_0402_5%
HDMI@
R209
4.7K_0402_5%
HDMI@
<11> HDMIDAT_UMA
1 HDMI@ 2
R298
0_0402_5%
<11> HDMICLK_UMA
1 HDMI@ 2
R301
0_0402_5%
0_0402_5%
+5VS
HDMI_R_D2+
Compal Secret Data
2008/04/14
Issued Date
2009/04/14
Deciphered Date
HDMI_SCLK
Title
Custom
Date:
Update BSH111 Correct Library at PVT
HDMI_TX2+
WCM-2012-900T_0805
1
2
R624
0_0402_5%
HDMI_SDATA
1
Q34
BSH111_SOT23-3
HDMI@
Q15
BSH111_SOT23-3
HDMI@
1
HDMI@
L88
HDMI_R_D2-
2
R623
+3VS
+3VS
HDMI_R_D2+
HDMI_TX2-
2 C850
0.1U_0402_16V4Z
HDMI@
WCM-2012-900T_0805
1
2
R621
0_0402_5%
HDMI_R_D1-
L87
HDMI_R_D1-
U39
HDMI@
HDMI_HPD_R
HDMI_TX1-
Q137A
2N7002DW-T/R7_SOT363-6
R628
100K_0402_5%
HDMI@
+5VL
HDMI_TX0+
1 HDMI@ 2
R304
715_0402_1%
HDMI_R_D0+ 1 HDMI@ 2
R172
715_0402_1%
HDMI@
HDMI_R_D0L86
Q136B
2N7002DW-T/R7_SOT363-6
HDMI_R_D0-
2
R618
5
1
P
OE#
HDMI_TX0-
HDMI@
HDMI/CEC
Rev
0.2
LA-5381P
Sheet
E
18
of
46
U15A
SB_RX0P
SB_RX0N
SB_RX1P
SB_RX1N
SB_RX2P
SB_RX2N
SB_RX3P
SB_RX3N
<10>
<10>
<10>
<10>
<10>
<10>
<10>
<10>
SB_TX0P
SB_TX0N
SB_TX1P
SB_TX1N
SB_TX2P
SB_TX2N
SB_TX3P
SB_TX3N
C492
C493
C494
C495
C496
C497
C498
C499
1
1
1
1
1
1
1
1
2
2
2
2
2
2
2
2
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
R305
+1.2V_HT
+3VALW
C506
2.2U_0603_6.3V6K
PCIE_TX0P
PCIE_TX0N
PCIE_TX1P
PCIE_TX1N
PCIE_TX2P
PCIE_TX2N
PCIE_TX3P
PCIE_TX3N
U22
U21
U19
V19
R20
R21
R18
R17
PCIE_RX0P
PCIE_RX0N
PCIE_RX1P
PCIE_RX1N
PCIE_RX2P
PCIE_RX2N
PCIE_RX3P
PCIE_RX3N
T25
T24
PCIE_CALRP
PCIE_CALRN
P24
PCIE_PVDD
P25
PCIE_PVSS
1 562_0402_1%
1 2.05K_0402_1%
2
2
+SB_PCIEVDD
A_RST#
Part 1 of 5
NB_RST#_R
U16
Close to SB
PLT_RST#
PLT_RST# <11,14,25,27,28,31,32,33>
NC7SZ08P5X_NL_SC70-5
N25
N24
PCIE_RCLKP/NB_LNK_CLKP
PCIE_RCLKN/NB_LNK_CLKN
K23
K22
NB_DISP_CLKP
NB_DISP_CLKN
M24
M25
P17
M18
M23
M22
J19
J18
L20
L19
M19
M20
C643
SB_32KHI
18P_0402_50V8J
Y3
R389
20M_0603_5%
OUT
NC
IN
NC
<15> SB_14.318M
SB_14.318M
L18
J21
CPU_HT_CLKP
CPU_HT_CLKN
SLT_GFX_CLKP
SLT_GFX_CLKN
GPP_CLK0P
GPP_CLK0N
GPP_CLK1P
GPP_CLK1N
GPP_CLK2P
GPP_CLK2N
GPP_CLK3P
GPP_CLK3N
25M_48M_66M_OSC
25M_X1
32.768KHZ_12.5P_1TJS125BJ4A421P
C652
1
N22
P22
NB_HT_CLKP
NB_HT_CLKN
PCI INTERFACE
<15> CLK_SBSRC_BCLK
<15> CLK_SBSRC_BCLK#
1
0_0402_5%
CLOCK GENERATOR
2
R312 @
CLK_SBSRC_BCLK
CLK_SBSRC_BCLK#
SB_32KHO
J20
PCICLK0
PCICLK1
PCICLK2
PCICLK3
PCICLK4
PCICLK5/GPIO41
PCIRST#
0.1U_0402_16V4Z
2
V23
V22
V24
V25
U25
U24
T23
T22
SB_TX0P
SB_TX0N
SB_TX1P
SB_TX1N
SB_TX2P
SB_TX2N
SB_TX3P
SB_TX3N
R306
+PCIE_VDDR
L53
1
2
BLM18PG121SN1D_0603
1
C504
SB700
SB_RX0P_C
SB_RX0N_C
SB_RX1P_C
SB_RX1N_C
SB_RX2P_C
SB_RX2N_C
SB_RX3P_C
SB_RX3N_C
PCI CLKS
<10>
<10>
<10>
<10>
<10>
<10>
<10>
<10>
N2
PCI EXPRESS INTERFACE
NB_RST#_R
25M_X2
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
CBE0#
CBE1#
CBE2#
CBE3#
FRAME#
DEVSEL#
IRDY#
TRDY#
PAR
STOP#
PERR#
SERR#
REQ0#
REQ1#
REQ2#
REQ3#/GPIO70
REQ4#/GPIO71
GNT0#
GNT1#
GNT2#
GNT3#/GPIO72
GNT4#/GPIO73
CLKRUN#
LOCK#
INTE#/GPIO33
INTF#/GPIO34
INTG#/GPIO35
INTH#/GPIO36
P4
P3
P1
P2
T4
T3
PCI_CLK2
PCI_CLK3
PCI_CLK4
PCI_CLK5
PCI_CLK2
PCI_CLK3
PCI_CLK4
PCI_CLK5
<23>
<23>
<23>
<23>
N1
U2
P7
V4
T1
V3
U1
V1
V2
T2
W1
T9
R6
R7
R5
U8
U5
Y7
W8
V9
Y8
AA8
Y4
Y3
Y2
AA2
AB4
AA1
AB3
AB2
AC1
AC2
AD1
W2
U7
AA7
Y1
AA6
W5
AA5
Y5
U6
W6
W4
V7
AC3
AD4
AB7
AE6
AB6
AD2
AE4
AD5
AC6
AE5
AD6
V5
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PAD T17
PAD T18
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
<23>
<23>
<23>
<23>
<23>
<23>
PAD T15
@
CLK_PCI_EC
PAD T16
CLK_PCI_SIO2
@
1
R303
@
1
R369
C501 1
2
100_0402_5%
C503 1
2
100_0402_5%
2 100P_0402_50V8J
2 100P_0402_50V8J
AD3
AC4
AE2
AE3
18P_0402_50V8J
CPU_LDT_REQ#
H_PROCHOT#
H_PWRGD
LDT_STOP#
LDT_RST#
F23
F24
F22
G25
G24
ALLOW_LDTSTP
PROCHOT#
LDT_PG
LDT_STP#
LDT_RST#
RTCCLK
INTRUDER_ALERT#
VBAT
C3
C2
B2
RTC_CLK
R308
R310
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
2 22_0402_5%
2 22_0402_5%
1
1
<32,33>
<32,33>
<32,33>
<32,33>
R960 1
CLK_PCI_EC <23,32>
CLK_PCI_SIO2 <23,33>
2 0_0402_5%
D76
LPC_FRAME# <32,33>
FELICA_PWR
SERIRQ
FELICA_PWR <26>
SERIRQ <32,33>
R961
@
2
1
300_0402_5%
STRAP
+SB_VBAT
PIN+SB_VBAT
+RTCVCC
+RTCBATT
R316
120_0402_5%
1
2
SBR1@
218S7EALA11FG_BGA528_SB710
1
C509
0.1U_0402_16V4Z
W=20mils
C510
2
R317
120_0402_5%
1
2
D10
2
R184
2
1U_0402_6.3V4Z
J1
@ JUMP_43X39
2008/04/14
Title
Date:
3
1
4
2
BAS40-04_SOT23-3
+CHGRTC

SB700-PCIE/PCI/ACPI/LPC/RTC
Custom
A
2009/04/14
Deciphered Date
Compal Secret Data
1
1K_0402_5%
C297
Issued Date
+3VS
RTC_CLK <23>
0.1U_0402_16V4Z
<6,11> CPU_LDT_REQ#
<6> H_PROCHOT#
<6,43> H_PWRGD
<6,11> LDT_STOP#
<6>
LDT_RST#
CLK_PCI_EC1
CLK_PCI_SIOC
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
LPC_FRAME#_SB
H_PROCHOT#
1
10K_0402_5%
G22
E22
H24
H23
J25
J24
H25
H22
AB8
AD7
V15
2
R319
X2
RTC
+3VS
B3
LPCCLK0
LPCCLK1
LAD0
LAD1
LAD2
LAD3
LFRAME#
LDRQ0#
LDRQ1#/GNT5#/GPIO68
BMREQ#/REQ5#/GPIO65
SERIRQ
SB_32KHO
LPC
Close to SB
X1
CPU
A3
RTC XTAL
SB_32KHI
Rev
0.2
LA-5381P
Sheet
E
19
of
46
Reserve for EMI request

@
CLK_48M_USB
@
C617 1
2
100_0402_5%
1
R311
2 100P_0402_50V8J
U15D
1
R320 @
1
R321 @
1
R322 @
1
R561
<32>
<32>
<32>
<32>
SB_TEST2
2
2.2K_0402_5%
2
2.2K_0402_5%
2
2.2K_0402_5%
2
1K_0402_5%
SB_TEST1
GATEA20
KB_RST#
EC_SCI#
EC_SMI#
SB_TEST0
<25,32> EC_SWI#_R
<31> CR_CPPE#
<6> H_THERMTRIP#
<11> NB_PWRGD
EC_SWI#_R
EC_RSMRST#
<32> EC_RSMRST#
1 EC_RSMRST#
100K_0402_5%
CR_WAKE#
<31> CR_WAKE#
<27>
2
2 1.2K_0402_5%
SMB_CK_CLK0
SMB_CK_DAT0
<11,18>
+3VALW
R332
1
1
2 2.2K_0402_5%
2 2.2K_0402_5%
HDA_BITCLK_CODEC
HDA_BITCLK_MDC
HDA_SDOUT_MDC
HDA_SDOUT_CODEC
HDA_SDIN0
HDA_SDIN1
<29> HDA_RST#_CODEC
<26> HDA_RST#_MDC
EC_LID_OUT#
EXP_CPPE#
USB_OC#2
USB_OC#0
<32> EC_LID_OUT#
<25> EXP_CPPE#
<24,32> USB_OC#2
<26,32> USB_OC#0
SMB_CK_DAT1
<26> HDA_SYNC_MDC
<29> HDA_SYNC_CODEC
STRAP PIN
USB MISC
SMB_CK_CLK1
R333
R334
R335
R336
33_0402_5%
33_0402_5%
33_0402_5%
33_0402_5%
R337
R338
33_0402_5%
33_0402_5%
R339
R340
33_0402_5%
33_0402_5%
1
2
1 RJ11@ 2
1 RJ11@ 2
1
2
HDA_BITCLK
HDA_SDOUT
HDA_SDIN0
HDA_SDIN1
1 RJ11@ 2
1
2
HDA_SYNC
1
2
1 RJ11@ 2
HDARST#
B9
B8
A8
A9
E5
F8
E4
M1
M2
J7
J8
L8
M3
L6
M4
L5
USB_OC6#/IR_TX1/GEVENT6#
USB_OC5#/IR_TX0/GPM5#
USB_OC4#/IR_RX0/GPM4#
USB_OC3#/IR_RX1/GPM3#
USB_OC2#/GPM2#
USB_OC1#/GPM1#
USB_OC0#/GPM0#
AZ_BITCLK
AZ_SDOUT
AZ_SDIN0/GPIO42
AZ_SDIN1/GPIO43
AZ_SDIN2/GPIO44
AZ_SDIN3/GPIO46
AZ_SYNC
AZ_RST#
AZ_DOCK_RST#/GPM8#
H19
H20
H21
F25
D22
E24
E25
D23
IMC_GPIO0
IMC_GPIO1
SPI_CS2#/IMC_GPIO2
IDE_RST#/F_RST#/IMC_GPO3
IMC_GPIO4
IMC_GPIO5
IMC_GPIO6
IMC_GPIO7
USB_RCOMP 1
11.8K_0402_1%
E6
E7
USB20_P11
USB20_N11
USB_HSD10P
USB_HSD10N
USB20_P10
USB20_N10
USB_HSD9P
USB_HSD9N
A11
B11
USB20_P9
USB20_N9
USB_HSD8P
USB_HSD8N
C10
D10
USB20_P8
USB20_N8
USB_HSD7P
USB_HSD7N
G11
H12
USB20_P7
USB20_N7
USB_HSD6P
USB_HSD6N
E12
E14
USB20_P6
USB20_N6
USB_HSD5P
USB_HSD5N
C12
D12
USB20_P5
USB20_N5
USB_HSD4P
USB_HSD4N
B12
A12
USB20_P4
USB20_N4
USB_HSD3P
USB_HSD3N
G12
G14
USB20_P3
USB20_N3
H14
H15
USB20_P2
USB20_N2
A13
B13
USB20_P1
USB20_N1
B14
A14
USB20_P0
USB20_N0
IMC_GPIO26
IMC_GPIO27
IMC_GPIO28
IMC_GPIO29
IMC_GPIO30
IMC_GPIO31
IMC_GPIO32
IMC_GPIO33
IMC_GPIO34
IMC_GPIO35
IMC_GPIO36
IMC_GPIO37
IMC_GPIO38
IMC_GPIO39
IMC_GPIO40
IMC_GPIO41
2
R323
USB10_P12 <26>
USB10_N12 <26>
USB-13 Touch Screen

Swap USB port 5 and port 11
for TV tuner issue
E11
F11
IMC_GPIO18
IMC_GPIO19
IMC_GPIO20
IMC_GPIO21
IMC_GPIO22
IMC_GPIO23
IMC_GPIO24
IMC_GPIO25
CLK_48M_USB <15>
USB10_P12
USB10_N12
H11
J10
IMC_GPIO8
IMC_GPIO9
IMC_PWM0/IMC_GPIO10
SCL2/IMC_GPIO11
SDA2/IMC_GPIO12
SCL3_LV/IMC_GPIO13
SDA3_LV/IMC_GPIO14
IMC_PWM1/IMC_GPIO15
IMC_PWM2/IMC_GPO16
IMC_PWM3/IMC_GPO17
LAN_DSM#
<28> LAN_DSM#
G8
USB_HSD11P
USB_HSD11N
USB_HSD0P
USB_HSD0N
<23> HDARST#
CLK_48M_USB
USB_FSD12P
USB_FSD12N
USB_HSD2P
USB_HSD2N
R547 1 HDMI@ 2 0_0402_5%
HPD
C8
F7
E8
USB_HSD1P
USB_HSD1N
<29>
<26>
<26>
<29>
<29>
<26>
2
4.7K_0402_5%
INTEGRATED uC
R331
@
1
R400
+3VS
USB OC
2 1.2K_0402_5%
SATA_IS0#/GPIO10
CLK_REQ3#/SATA_IS1#/GPIO6
SMARTVOLT1/SATA_IS2#/GPIO4
CLK_REQ0#/SATA_IS3#/GPIO0
CLK_REQ1#/SATA_IS4#/FANOUT3/GPIO39
CLK_REQ2#/SATA_IS5#/FANIN3/GPIO40
SPKR/GPIO2
SCL0/GPOC0#
SDA0/GPOC1#
SCL1/GPOC2#
SDA1/GPOC3#
DDC1_SCL/GPIO9
DDC1_SDA/GPIO8
LLB#/GPIO66
SMARTVOLT2/SHUTDOWN#/GPIO5
DDR3_RST#/GEVENT7#
HD AUDIO
R329
SB_SPKR
SMB_CK_CLK0
SMB_CK_DAT0
SMB_CK_CLK1
SMB_CK_DAT1
<29> SB_SPKR
<8,9,15,25> SMB_CK_CLK0
<8,9,15,25> SMB_CK_DAT0
<27> SMB_CK_CLK1
<27> SMB_CK_DAT1
+3VS
R328
TV_DET
TV_DET
AE18
AD18
AA19
W17
V17
W20
W21
AA18
W18
K1
K2
AA20
Y18
C1
Y19
G5
USB_FSD13P
USB_FSD13N
RSMRST#
INTEGRATED uC
2
R327
D3
USB_RCOMP
USB 1.1
+3VALW
USBCLK/14M_25M_48M_OSC
USB 2.0
SUS_STAT#
2
4.7K_0402_5%
PM_SLP_S3#
PM_SLP_S5#
PBTN_OUT#
SB_PWRGD
SUS_STAT#
Part 4 of 5
SB700
PCI_PME#/GEVENT4#
RI#/EXTEVNT0#
SLP_S2/GPM9#
SLP_S3#
SLP_S5#
PWR_BTN#
PWR_GOOD
SUS_STAT#
TEST2
TEST1
TEST0
GA20IN/GEVENT0#
KBRST#/GEVENT1#
LPC_PME#/GEVENT3#
LPC_SMI#/EXTEVNT1#
S3_STATE/GEVENT5#
SYS_RESET#/GPM7#
WAKE#/GEVENT8#
BLINK/GPM6#
SMBALERT#/THRMTRIP#/GEVENT2#
NB_PWRGD
GPIO
1
R388
+3VS
<32>
<32>
<32>
<32,43>
<11,14>
E1
E2
H7
PM_SLP_S3#
F5
PM_SLP_S5#
G1
PBTN_OUT#
H2
SB_PWRGD
H1
SUS_STAT#
K3
SB_TEST2
H5
SB_TEST1
H4
SB_TEST0
H3
GATEA20
Y15
KB_RST#
W15
EC_SCI#
K4
EC_SMI#
K24
F1
J2
EC_SWI#_R
H6
CR_CPPE#
F2
H_THERMTRIP# J6
NB_PWRGD
W14
ACPI / WAKE UP EVENTS
A18
B18
F21
D21
F19
E20
E21
E19
D19
E18
USB20_P11 <27>
USB20_N11 <27>
USB-11 TV Tuner
USB20_P10 <27>
USB20_N10 <27>
USB-10 GPS
USB20_P9 <26>
USB20_N9 <26>
USB-9
Int Camera
USB20_P8 <27>
USB20_N8 <27>
USB-8
WiFi
USB20_P7 <26>
USB20_N7 <26>
USB-7
Finger Printer
USB20_P6 <26>
USB20_N6 <26>
USB-6
Bluetooth
USB20_P5 <25>
USB20_N5 <25>
USB-5
New Card
USB20_P4 <24>
USB20_N4 <24>
USB-4
Left side
USB20_P3 <26>
USB20_N3 <26>
USB-3
Felica
USB20_P2 <24>
USB20_N2 <24>
USB-2
eSATA
USB20_P1 <26>
USB20_N1 <26>
USB-1
Right side
USB20_P0 <26>
USB20_N0 <26>
USB-0
Right side
GPIO16 <23>
GPIO17 <23>
STRAP PIN
STRAP PIN
G20
G21
D25
D24
C25
C24
B25
C23
B24
B23
A23
C22
A22
B22
B21
A21
D20
C20
A20
B20
B19
A19
D18
C18
SBR1@
2008/04/14
Issued Date
2009/04/14
Deciphered Date
Title
Custom
A
Compal Secret Data
Date:
SB700 USB/AC97
Rev
0.2
LA-5381P
Sheet
E
20
of
46
U15B
<24> SATA_TX1+
<24> SATA_TX1<24> SATA_RX1<24> SATA_RX1+
<24> SATA_TX2+
<24> SATA_TX2-
eSATA
<24> SATA_RX2<24> SATA_RX2+

<24> SATA_TX3+
<24> SATA_TX3-
ODD
AB10
AC10
SATA_TX1+
SATA_TX1-
AE10
AD10
SATA_TX1P
SATA_TX1N
SATA_RX1SATA_RX1+
AD11
AE11
SATA_RX1N
SATA_RX1P
SATA_TX2+
SATA_TX2-
AB12
AC12
SATA_TX2P
SATA_TX2N
AE12
AD12
SATA_RX2N
SATA_RX2P
SATA_TX3+
SATA_TX3-
AD13
AE13
SATA_TX3P
SATA_TX3N
2
R342
+3VS
R343 1
SATA_CAL
1
1K_0402_1%
SATA_X1
2 10K_0402_5%
SATA_X2
L54
2
1
BLM18PG121SN1D_0603
+PLLVDD_SATA
SATA_TX4P
SATA_TX4N
AD15
AE15
SATA_RX4N
SATA_RX4P
AB16
AC16
SATA_TX5P
SATA_TX5N
AE16
AD16
SATA_RX5N
SATA_RX5P
Y12
AA12
AA11
W12
1 0.1U_0402_16V4Z
SATA_CAL
SATA_X1
PLLVDD_SATA
XTLVDD_SATA
L55
+3VS
+XTLVDD_SATA
2
1
BLM18PG121SN1D_0603
2 0.1U_0402_16V4Z
C524
IDE_D0/GPIO15
IDE_D1/GPIO16
IDE_D2/GPIO17
IDE_D3/GPIO18
IDE_D4/GPIO19
IDE_D5/GPIO20
IDE_D6/GPIO21
IDE_D7/GPIO22
IDE_D8/GPIO23
IDE_D9/GPIO24
IDE_D10/GPIO25
IDE_D11/GPIO26
IDE_D12/GPIO27
IDE_D13/GPIO28
IDE_D14/GPIO29
IDE_D15/GPIO30
AD24
AD23
AE22
AC22
AD21
AE20
AB20
AD19
AE19
AC20
AD20
AE21
AB22
AD22
AE23
AC23
SPI_DI/GPIO12
SPI_DO/GPIO11
SPI_CLK/GPIO47
SPI_HOLD#/GPIO31
SPI_CS1#/GPIO32
LAN_RST#/GPIO13
ROM_RST#/GPIO14
FANIN0/GPIO50
FANIN1/GPIO51
FANIN2/GPIO52
C625
1U_0402_6.3V4Z
AA24
AA25
Y22
AB23
Y23
AB24
AD25
AC25
AC24
Y25
Y24
FANOUT0/GPIO3
FANOUT1/GPIO48
FANOUT2/GPIO49
SATA_ACT#/GPIO67
C523
2.2U_0603_6.3V6K
IDE_IORDY
IDE_IRQ
IDE_A0
IDE_A1
IDE_A2
IDE_DACK#
IDE_DRQ
IDE_IOR#
IDE_IOW#
IDE_CS1#
IDE_CS3#
SATA_X2
HW MONITOR
C522
SATA_RX3N
SATA_RX3P
AE14
AD14
W11
<34> SATA_LED#
+1.2V_HT
AB14
AC14
V12
Part 2 of 5
SATA_RX0N
SATA_RX0P
SATA_RX2SATA_RX2+
SATA_RX3SATA_RX3+
SATA_TX0P
SATA_TX0N
ATA 66/100/133
HDD
AD9
AE9
SATA_RX0SATA_RX0+
SPI ROM
SB700
SATA_TX0+
SATA_TX0-
SERIAL ATA
<24> SATA_TX0+
<24> SATA_TX0-
SATA PWR
SSD
TEMP_COMM
TEMPIN0/GPIO61
TEMPIN1/GPIO62
TEMPIN2/GPIO63
TEMPIN3/TALERT#/GPIO64
VIN0/GPIO53
VIN1/GPIO54
VIN2/GPIO55
VIN3/GPIO56
VIN4/GPIO57
VIN5/GPIO58
VIN6/GPIO59
VIN7/GPIO60
ENABLE
DISABLE
SIDE PORT
MUXLESS
GPIO48,GPIO49 GOT INTERNAL PU 8.2K TO S0
+3VS
+3VS
R195
SIDE@
R196
2 10K_0402_5% SIDE_PORT_EN# 1
2 1K_0402_5%
R193
2 10K_0402_5% MUXLESS_EN#
R194
2 1K_0402_5%
G6
D2
D1
F4
F3
+3VS
CIR@
U15
J1
CIR_DET
M8
M5
M7
SIDE_PORT_EN#
MUXLESS_EN#
P5
P8
R8
FM_I2CCLK
FM_I2CDAT
FM_I2C_INT#
C6
B6
A6
A5
B5
2
R554
2
R557
1
1K_0402_5%
1
100K_0402_5%
FM_I2CCLK <26>
FM_I2CDAT <26>
FM_I2C_INT# <26>
+3VS
LAN_ISOLATE#
LAN_ISOLATE#
LAN_ISOLATE# <28>
SPK_SEL
EC_THERM#
SPK_SEL <29>
EC_THERM# <32>
A4
B4
C4
D4
D5
D6
A7
B7
ACIN_SB
BT_DET#
CIR_DET
SLP_CHG
SLP_CHG_M3
SLP_CHG_M4
LFB_ID0
LFB_ID1
F6
+SB_AVDD
1
2
100K_0402_5%
1
R570
D41
+3VALW
2
BT_DET# <26>
ACIN
1
2
R562
150K_0402_5%
SLP_CHG <24>
SLP_CHG_M3 <24>
SLP_CHG_M4 <24>
<32,34,36>
SLP_CHG
+3VALW
SLP_CHG_M3
SLP_CHG_M4
1
R571
1
R572
1
R582
2
100K_0402_5%
2
100K_0402_5%
2
100K_0402_5%
+3VALW
L56
AVDD
AVSS
G7
2
C525
0.1U_0402_16V4Z
SBR1@
0_0603_5%
C526
2.2U_0603_6.3V6K
LFB_ID1
SATA_X1
1
1 C516
1
10P_0402_50V8J 2
Y4
R341
LFB_ID0
Hynix
Samsung
10M_0402_5%
2
25MHZ_20P
10P_0402_50V8J 2
1 C517
SATA_X2
+3VALW
R189
2 10K_0402_5%
LFB_ID1
SIDE@
R192
2 10K_0402_5%
+3VALW
SAMSIDE@ R191
1
2 10K_0402_5%
LFB_ID0
HYNSIDE@ R190
1
2 10K_0402_5%
Compal Secret Data
2008/04/14
Issued Date
Title

SB700 SATA/IDE/SPI
Custom
A
2009/04/14
Deciphered Date
Date:
Rev
0.2
LA-5381P
Sheet
E
21
of
46
U15E
U15C
+3VS
VDD33_18_1
VDD33_18_2
VDD33_18_3
VDD33_18_4
+PCIE_VDDR
P18
P19
P20
P21
R22
R24
R25
PCIE_VDDR_1
PCIE_VDDR_2
PCIE_VDDR_3
PCIE_VDDR_4
PCIE_VDDR_5
PCIE_VDDR_6
PCIE_VDDR_7
AA14
AB18
AA15
AA17
AC18
AD17
AE17
AVDD_SATA_1
AVDD_SATA_4
AVDD_SATA_2
AVDD_SATA_3
AVDD_SATA_5
AVDD_SATA_6
AVDD_SATA_7
1
1
1
1
1
1
2
2
2
2
2
2
4.7U_0805_10V6K
1U_0402_6.3V4Z @
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
1
1
1
1
2
2
2
2
22U_0805_6.3V6M
1U_0402_6.3V4Z
1U_0402_6.3V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
SATA I/O
2
C566
C567
C568
C571
C572
L21
L22
L24
L25
1
R593
2
+1.2V_HT
0_0805_5%
2
C529
C532
1
C534
1
C538
1
C537
1
C527
1
C540
1
1
10U_0805_10V6K
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
+1.2V_HT
2
2
2
2
2
2
SB700
T10
U10
U11
U12
V11
V14
W9
Y9
Y11
Y14
Y17
AA9
AB9
AB11
AB13
AB15
AB17
AC8
AD8
AE8
+1.2V_HT
+3VALW
+1.2V_SATA
L63
2
1
0_0805_5%
+1.2V_HT
CKVDD_1.2V_1
CKVDD_1.2V_2
CKVDD_1.2V_3
CKVDD_1.2V_4
L15 +1.2V_HT_R
M12
M14
N13
P12
P14
R11
R15
T16
1
0_0805_5%
2
C552
C553
C555
C554
C558
C557
C560
VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9
AVSS_SATA_1
AVSS_SATA_2
AVSS_SATA_3
AVSS_SATA_4
AVSS_SATA_5
AVSS_SATA_6
AVSS_SATA_7
AVSS_SATA_8
AVSS_SATA_9
AVSS_SATA_10
AVSS_SATA_11
AVSS_SATA_12
AVSS_SATA_13
AVSS_SATA_14
AVSS_SATA_15
AVSS_SATA_16
AVSS_SATA_17
AVSS_SATA_18
AVSS_SATA_19
AVSS_SATA_20
POWER
L61
2
+1.2V_HT
CORE S0
Y20
AA21
AA22
AE25
CLKGEN I/O
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
2
2
2
2
2
2
2
S5_3.3V_1
S5_3.3V_2
S5_3.3V_3
S5_3.3V_4
S5_3.3V_5
S5_3.3V_6
S5_3.3V_7
3.3V_S5 I/O
@
@
@
@
@
@
@
@
S5_1.2V_1
S5_1.2V_2
CORE S5
1
1
1
1
1
1
1
1
Part 3 of 5
A-LINK I/O
C531
C530
C533
C536
C535
C539
C541
C542
VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VDDQ_6
VDDQ_7
VDDQ_8
VDDQ_9
VDDQ_10
VDDQ_11
VDDQ_12
PCI/GPIO I/O
C528 2 @ 1 22U_0805_6.3V6M
1
SB700
L9
M9
T15
U9
U16
U17
V8
W7
Y6
AA4
AB5
AB21
IDE/FLSH I/O
+3VS
A17
A24
B17
J4
J5
L1
L2
+S5_3V
G2
G4
+S5_1.2V
1
2
R564
0_0805_5%
1
2
22U_0805_6.3V6M
@ C556
2.2U_0603_6.3V6K 2
C559
1
2.2U_0603_6.3V6K 2
C561
1
1U_0402_6.3V4Z 2
C562
1
0.1U_0402_16V4Z 2
C563
1
0.1U_0402_16V4Z 2
C564
1
0.1U_0402_16V4Z 2
C565
1
+1.2VALW
+1.2_USB
USB_PHY_1.2V_1
USB_PHY_1.2V_2
+1.2VALW
L64
A10
B10
L65
0_0603_5%
1U_0402_6.3V4Z
1U_0402_6.3V4Z
2
2
1
1
C569
C570
0_0603_5%
1
10U_0805_10V6K
1U_0402_6.3V4Z 2
0.1U_0402_16V4Z 2
2
@ C573
C574
1
C575
1
A15
B15
C14
D8
D9
D11
D13
D14
D15
E15
F12
F14
G9
H9
H17
J9
J11
J12
J14
J15
K10
K12
K14
K15
AVSS_USB_1
AVSS_USB_2
AVSS_USB_3
AVSS_USB_4
AVSS_USB_5
AVSS_USB_6
AVSS_USB_7
AVSS_USB_8
AVSS_USB_9
AVSS_USB_10
AVSS_USB_11
AVSS_USB_12
AVSS_USB_13
AVSS_USB_14
AVSS_USB_15
AVSS_USB_16
AVSS_USB_17
AVSS_USB_18
AVSS_USB_19
AVSS_USB_20
AVSS_USB_21
AVSS_USB_22
AVSS_USB_23
AVSS_USB_24
+AVDD_USB
C576
C577
C580
C581
C583
C582
C584
3
1
1
1
1
1
1
1
L66
1
0_0805_5%
2
2
2
2
2
2
2
A16
B16
C16
D16
D17
E17
F15
F17
F18
G15
G17
G18
10U_0805_10V6K
10U_0805_10V6K
1U_0402_6.3V4Z
1U_0402_6.3V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
AVDDTX_0
AVDDTX_1
AVDDTX_2
AVDDTX_3
AVDDTX_4
AVDDTX_5
AVDDRX_0
AVDDRX_1
AVDDRX_2
AVDDRX_3
AVDDRX_4
AVDDRX_5
V5_VREF
AVDDCK_3.3V
PLL
USB I/O
+3VALW
AVDDCK_1.2V
AVDDC
AE7
+V5_VREF
J16
+AVDDCK_3.3V
K17
C578
+AVDDCK_1.2V 0.1U_0402_16V4Z
E9
+AVDDC
1K_0402_5% 2
2
C579
1U_0603_10V4Z
1
+3VALW
2
L67
1
0_0603_5%
2.2U_0603_6.3V6K
0.1U_0402_16V4Z
SBR1@
+AVDDCK_1.2V
C585
C586
L68
1
0_0603_5%
2.2U_0603_6.3V6K
0.1U_0402_16V4Z
+AVDDCK_3.3V
1 R346
+5VS
+3VS
D14
1
C855
@
0.1U_0402_16V7K
2
0.1U_0402_16V4Z
F9
PCIE_CK_VSS_1
PCIE_CK_VSS_2
PCIE_CK_VSS_3
PCIE_CK_VSS_4
PCIE_CK_VSS_5
PCIE_CK_VSS_6
PCIE_CK_VSS_7
PCIE_CK_VSS_8
AVSSC
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
PCIE_CK_VSS_9
PCIE_CK_VSS_10
PCIE_CK_VSS_11
PCIE_CK_VSS_12
PCIE_CK_VSS_13
PCIE_CK_VSS_14
PCIE_CK_VSS_15
PCIE_CK_VSS_16
PCIE_CK_VSS_17
PCIE_CK_VSS_18
PCIE_CK_VSS_19
PCIE_CK_VSS_20
PCIE_CK_VSS_21
Part 5 of 5
AVSSCK
A2
A25
B1
D7
F20
G19
H8
K9
K11
K16
L4
L7
L10
L11
L12
L14
L16
M6
M10
M11
M13
M15
N4
N12
N14
P6
P9
P10
P11
P13
P15
R1
R2
R4
R9
R10
R12
R14
T11
T12
T14
U4
U14
V6
Y21
AB1
AB19
AB25
AE1
AE24
P23
R16
R19
T17
U18
U20
V18
V20
V21
W19
W22
W24
W25
L17
SBR1@
+1.2V_HT
C587
C588
L69
1
0_0603_5%
2.2U_0603_6.3V6K
H18
J17
J22
K25
M16
M17
M21
P16
GROUND
+3VS
1 C589
1 C590
2008/04/14
Issued Date
2009/04/14
Deciphered Date
Title
Custom
A
Compal Secret Data
Date:
SB700 Power/GND
Rev
0.2
LA-5381P
Sheet
E
22
of
46
REQUIRED STRAPS
NOTE: SB700 HAS INTERNAL 15K PULL UP RESISTOR FOR RTC_CLK
PCI_CLK2
PCI_CLK3
PCI_CLK4
PCI_CLK5
LPC_CLK0
LPC_CLK1
RTC_CLK AZ_RST_CD#
BOOTFAIL
TIMER
ENABLED
USE
DEBUG
STRAPS
RESERVED
RESERVED
ENABLE PCI
MEM BOOT
CLKGEN
ENABLED
INTERNAL
RTC
EC
ENABLED
BOOTFAIL
TIMER
DISABLED
IGNORE
DEBUG
STRAPS
DISABLE PCI
MEM BOOT
DEFAULT
DEFAULT
DEFAULT
R354
10K_0402_5%
2
1
+3VALW
R353
10K_0402_5%
2
1
+3VALW
R352
10K_0402_5%
2
1
+3VALW
R351
10K_0402_5%
2
1
+3VALW
R350
10K_0402_5%
2
1
+3VS
DEFAULT
R349
10K_0402_5%
2
1
+3VS
EC
DISABLED
R348
10K_0402_5%
2
1
+3VS
DEFAULT
GP16
Internal pull up
H,H = Reserved
H,L = SPI ROM
EXT. RTC
(PD on X1,
apply
32KHz to
RTC_CLK)
R347
10K_0402_5%
2
1
+3VS
CLKGEN
DISABLED
GP17
DEFAULT
PULL
LOW
L,H = LPC ROM (Default)

L,L = FWH ROM
+3VALW
+3VALW
R356
2.2K_0402_5%
2
1
PULL
HIGH
R355
2.2K_0402_5%
2
1
<19> PCI_CLK2
<19> PCI_CLK3
<19> PCI_CLK4
<19> PCI_CLK5
<19,32> CLK_PCI_EC
<19,33> CLK_PCI_SIO2
<19> RTC_CLK
<20> HDARST#
<20> GPIO17
<20> GPIO16
DEBUG STRAPS
PCI_AD25
PCI_AD24
PCI_AD23
USE ACPI
BCLK
USE IDE
PLL
USE DEFAULT
PCIE STRAPS
RESERVED
DEFAULT
DEFAULT
DEFAULT
DEFAULT
DEFAULT
USE
SHORT
RESET
BYPASS
PCI PLL
BYPASS
ACPI
BCLK
BYPASS IDE
PLL
USE EEPROM
PCIE STRAPS
R366
2.2K_0402_5%
2
1
R378
2.2K_0402_5%
2
1
R377
2.2K_0402_5%
2
1
PCI_AD28
PCI_AD27
PCI_AD26
PCI_AD25
PCI_AD24
PCI_AD23
R373
2.2K_0402_5%
2
1
<19>
<19>
<19>
<19>
<19>
<19>
PCI_AD26
USE PCI
PLL
R376
2.2K_0402_5%
2
1
PULL
LOW
PCI_AD27
USE
LONG
RESET
R375
2.2K_0402_5%
2
1
Need to confirm if SB SPI ROM will mount
R374
2.2K_0402_5%
2
1
PULL
HIGH
R365
2.2K_0402_5%
2
1
SB700 HAS 15K INTERNAL PU FOR PCI_AD[28:23]
PCI_AD28
R364
10K_0402_5%
2
1
R363
2.2K_0402_5%
2
1
R362
10K_0402_5%
2
1
R360
10K_0402_5%
2
1
R361
10K_0402_5%
2
1
R359
10K_0402_5%
2
1
R358
10K_0402_5%
2
1
R357
10K_0402_5%
2
1
SI2: mount 2.2K
Compal Secret Data
2008/04/14
Issued Date
Title
Custom
A
2009/04/14
Deciphered Date
Date:
SB700 STRAPS
Rev
0.2
LA-5381P
Sheet
E
23
of
46
SATA HDD0 Conn.
SSD Conn.
+5VS
SATA ODD Conn

+5VS
+3VS
1.2A
1
SSD HDD need 400mA for 3V(PHISON)

+3VS rail reserve for SSD
Place closely JHDD0 SATA CONN.

1
C387
10U_0805_10V4Z
C388
0.1U_0402_16V4Z
C389
0.1U_0402_16V4Z
C390
0.1U_0402_16V4Z
C194
SSD@
10U_0805_10V4Z
C195
SSD@
0.1U_0402_16V4Z
C196
SSD@
0.1U_0402_16V4Z
1.1A
1
C197
SSD@
0.1U_0402_16V4Z
C414
10U_0805_10V4Z
C415
@
10U_0805_10V4Z
C416
@
1U_0402_6.3V4Z
1
C417
0.1U_0402_16V4Z
C418
0.1U_0402_16V4Z
Place component's closely ODD CONN.

SSD HDD need 400mA for 3V(PHISON)
+3VS
+3VS rail reserve for SSD

1
C336
10U_0805_10V4Z
2 @
C337
C338
C339
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
2
2
@
@
@
JSSD
JHDD0
1
2
3
4
5
6
7
V33
V33
V33
8
9
10
GND
GND
GND
V5
V5
V5
GND
LED
GND
V12
V12
V12
11
12
13
14
15
16
17
18
19
20
21
22
23
24
GND
GND
@
GND
A+
AGND
BB+
GND
SATA_C_TX1+ C512 1
SATA_C_TX1- C513 1
2 0.01U_0402_25V7K
2 0.01U_0402_25V7K
SATA_C_RX1- C410 1
SATA_C_RX1+ C412 1
2 0.01U_0402_25V7K
2 0.01U_0402_25V7K
GND
A+
AGND
BB+
GND
1
2
3
4
5
6
7
V33
V33
GND
GND
V5
V5
R
Rsv1
Rsv2
8
9
10
11
12
13
14
15
16
SATA_TX1+ <21>
SATA_TX1- <21>
SATA_RX1- <21>
SATA_RX1+ <21>
+3VS
17
18
+5VS
GND
GND
SATA_C_TX0+
SATA_C_TX0-
C514
C515
SATA_C_RX0SATA_C_RX0+
SSD@
SSD@
1
2 0.01U_0402_25V7K
1
2 0.01U_0402_25V7K
C411 1
C413 1
JODD
SATA_TX0+ <21>
SATA_TX0- <21>
2 0.01U_0402_25V7K
2 0.01U_0402_25V7K
SATA_RX0- <21>
SATA_RX0+ <21>
SSD@
SSD@
@
GND
A+
AGND
BB+
GND
1
2
3
4
5
6
7
DP
+5V
+5V
MD
GND
GND
8
9
10
11
12
13
SATA_C_TX3+ C518 1
SATA_C_TX3- C519 1
2 0.01U_0402_25V7K
2 0.01U_0402_25V7K
SATA_C_RX3- C424 1
SATA_C_RX3+ C425 1
20.01U_0402_25V7K
20.01U_0402_25V7K
SATA_TX3+ <21>
SATA_TX3- <21>
SATA_RX3- <21>
SATA_RX3+ <21>
+3VS
15
14
SANTA_285002-1_RV
GND
GND
+5VS
SANTA_206401-1_RV
SANTA_195601-1_RV
E-SATA/USB
+5VALW
U19
+USB_VCCB
0.1U_0402_16V4Z
2D+
D+
2D-
D-
<32> USB_CHG_EN#
GND
0.1U_0402_16V4Z
R949
75K_0402_1%
R952
43K_0402_1%
USB20_N2_R
USB20_P2_R
SLP_CHG <21>
C352
2
150U_B2_6.3VM_R45M
2
OUT
OUT
OUT
FLG
R584
1
2
1 0_0402_5%
C367
@
4.7U_0805_10V4Z
2
Share With USB
C351
2
+USB_VCCB
R950
51K_0402_1%
USB20_N2_R_S
USB20_P2_R_S
U53
14
+USB_VCCB
2
1A
2A
3A
4A
VCC
AO3413_SOT23
1B
2B
3B
4B
GND
USB20_P2_S_O
3
USB20_N2_S_O
6
+USB_VCCC
8 R111 1
2 100_0402_5%
11
2
5
9
12
Q6
USB20_P2_R_U
USB20_N2_R_U
<21> SATA_TX2+
<21> SATA_TX2-
1OE#
2OE#
3OE#
4OE#
C520
C521
1
1
2 0.01U_0402_25V7K SATA_C_TX2+
2 0.01U_0402_25V7K SATA_C_TX2-
C361
C357
2
2
1 0.01U_0402_25V7K SATA_C_RX21 0.01U_0402_25V7K SATA_C_RX2+
+USB_VCCB
VBUS
DD+
GND
5
6
7
8
9
10
11
GND
A+
AGND
BB+
GND
USB
C355
2
USB20_N4_R
USB20_P4_R
ACES_85202-0605L
@
SHIELD
SHIELD
SHIELD
SHIELD
12
13
14
15
R70
2 0_0402_5%
1
L52
@
<26,32> USB_EN#
R86
+5VALW
D15
2 100K_0402_5%
USB_EN#
USB20_P2_R_S
L46
@
VIN
IO1
IO2 GND
HIGH
LOW
Mode 4
LOW
HIGH
2 0_0402_5%
FUNCTION
LOW
D=1D
HIGH
D=2D
USB20_N2_R
USB20_P2_R_S
USB20_N2_R_S
USB20_P4
<20>
USB20_N4
R77
USB20_P4_R
USB20_N4_R
2008/04/14
2 0_0402_5%
2 0_0402_5%
Compal Secret Data
2009/04/14
Deciphered Date
Title
Custom
C
WCM-2012-900T_0805
Date:
WCM-2012-900T_0805
R89
Issued Date
<20>
CM1293A-02SR SOT143-4
SLP_CHG
USB20_P2_R
USB20_N2_R_S
Change at PVT
Mode 3
+USB_VCCB
R568 1
SLP_CHG_M4
1
2
3
4
5
6
ESATA
TYCO_1909574-1
@
Add pull high at DVT-2

4
1
2
3
4
1
2
3
4
5
6
SN74CBT3125PWRG4_TSSOP14
C354
0.1U_0402_16V4Z
SLP_CHG_M3
JESATA
2
G
<21> SLP_CHG_M4
JUSBB1
W=60mils
R951
51K_0402_1%
TS3USB221RSER_QFN10_2x1P5
1
4
10
13
+USB_VCCC
USB20_P2_S_O
USB20_N2_S_O
W=60mils
<21> SLP_CHG_M3
USB_OC#2 <20,32>
1000P_0402_50V7K
OE#
8
7
6
5
G528_SO8
LEFT USB
1.4A
GND
IN
IN
EN#
2200P_0402_50V7K
1
2
3
4
<20> USB20_N2
1D-
10
<20> USB20_P2
VCC
C350
USB20_N2_R_U 2
3
C353
1D+
U52
USB20_P2_R_U 1
+USB_VCCB
+USB_VCCB
+USB_VCCB
+3VALW
SATA HDD/ODD
Rev
0.2
LA-5381P
Sheet
E
24
of
46
B-CAS Circuit
+5VS
+5VALW
+5VS_L_BCAS
B_R_BCRST
B_BCRST
2
100_0402_5%
1
RB9
TV@
2
+5VS_BCAS
1
CB4
TV@
0.1U_0402_16V4Z 2
5
<27>
XBCLKM
XBCLKM
B_R_XBCCLK 1
RB11
BCIO
<27>
TV@
QB2
2N7002_SOT23-3
B_XBCCLK
2
100_0402_5%
NC7ST08P5X_NL _SC70
JBCAS1 @
+5VS_L_BCAS
TV@
LB1
TV@
CB3
4.7U_0603_6.3V6K
2
G
TV@
CPLGP1
CPLGP1
UB2 TV@
TV@
RB7
10K_0402_5%
<27>
+5VS_L_BCAS
BCPW ON
<27>
TV@
2
1
RB13
10K_0402_5%
10K_0402_5%
NC7ST08P5X_NL _SC70
RB1
1
+5VS_L_BCAS
+5VS_L_BCAS TV@
1
2
RB12
10K_0402_5%
E
QB4
2
B
2SB1197K_SOT23-3
C
TV@
1 TV@
2
RB14
1.5K_0402_5%
TV@
BCRSTM
UB1 TV@
BCRSTM
47K_0402_5%
1
TV@
D TV@
QB3
TV@
CB2
2
2
G
0.01U_0402_25V7K
S
2N7002_SOT23-3
@
RB8
2.2K_0402_5%
<27>
TV@
QB1
AO3413_SOT23-3
RB2
100K_0402_5%
TV@
RB5
2
1
1 TV@
CB1
4.7U_0603_6.3V6K
1 TV@
CB6
0.1U_0402_16V7K
S
Add CB6 for soft start
12
11
1
2
1 FBMA-L11-201209-221LMA30T_0805
GND
GND
10
9
8
7
6
5
4
3
2
1
CB5
TV@
2 1U_0402_6.3V4Z
10
9
8
7
6
5
4
3
2
1
B_XBCCLK
B_BCRST
BCCDET
2
1
RB10 TV@470_0402_5%
+5VS_BCAS
BCCDET
<27>
BCIO
C
ACES_85201-10051
New Card
+1.5VS_CARD
+3VS_CARD
Imax = 0.75A
+3VALW _CARD
Imax = 1.35A
Imax = 0.275A
CN5
10U_0805_10V6K
2
CN6
0.1U_0402_16V4Z
2
CN3
10U_0805_10V6K
2
CN4
0.1U_0402_16V4Z
2
CN1
CN2
10U_0805_10V6K 0.1U_0402_16V4Z
2
2
+3VALW
JEXP
1
RN1
1
RN2
2 CP_USB#
100K_0402_5%
<20> USB20_N5
<20> USB20_P5
2EXP_CPPE#
100K_0402_5%
UN1
12
14
+1.5VS
60mils
1.5Vout
1.5Vout
11
13
+1.5VS_CARD
<8,9,15,20> SMB_CK_CLK0
<8,9,15,20> SMB_CK_DAT0
+1.5VS_CARD
40mils
1
RN3
2
4
+3VS
2 PLT_RST#
100K_0402_5%
17
+3VALW
<11,14,19,27,28,31,32,33>
PLT_RST#
<32,35,41> SYSON
<29,32,35,38,40> SUSP#
+3VS
+3VS
UN2
G Vcc
CLKREQ#
SYSON
3.3Vin
3.3Vin
AUX_IN
SYSRST#
3.3Vout
3.3Vout
15
OC#
19
SHDN#
SUSP#
STBY#
NC
EXP_CPPE#
10
CPPE#
GND
RCLKEN
18
CPUSB#
+3VS_CARD
PERST#
Thermal_Pad
<20,32> EC_SW I#_R

+3VALW _CARD
40mils
AUX_OUT
20
CP_USB#
3
5
SMB_CK_CLK0
SMB_CK_DAT0
+3VALW _CARD
PERST#
PERST#
+3VS_CARD
<20> EXP_CPPE#
<15> CLK_PCIE_NCARD#
<15> CLK_PCIE_NCARD
16
7
CLKREQ#
EXP_CPPE#
<10> PCIE_PTX_C_IRX_N0
<10> PCIE_PTX_C_IRX_P0
21
<10> PCIE_ITX_C_PRX_N0
<10> PCIE_ITX_C_PRX_P0
RCLKEN
TPS2231MRGPR-2 QFN 20P
RN4
10K_0402_5%
@
RN5
10K_0402_5%
@
PLT_RST#
+3VS
2
4
CN7
0.1U_0402_16V4Z
@
CLKREQ_NCARD#
27
28
Change UN1 from SA000029E00

to SA00001SL20
CLKREQ_NCARD#
GND
USB_DUSB_D+
CPUSB#
RSV
RSV
SMB_CLK
SMB_DATA
+1.5V
+1.5V
WAKE#
+3.3VAUX
PERST#
+3.3V
+3.3V
CLKREQ#
CPPE#
REFCLKREFCLK+
GND
PERn0
PERp0
GND
PETn0
PETp0
GND
GND
GND
GND
GND
29
30
SANTA_130801-5_RT
@
<15>
@
RCLKEN
2
G
Q21
2N7002_SOT23-3
@
1.5Vin
1.5Vin
CP_USB#
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
S
CLKREQ#
1
RN6
2 CLKREQ_NCARD#
0_0402_5%
Compal Secret Data
2008/10/06
Issued Date
2009/10/06
5
Deciphered Date
Title

eSATA/NEW CARD
Size
Document Number
Rev
0.2
LA-5381P
Date:
Sheet
1
25
of
46
BlueTooth Interface
Right USB Board
R107
+3VS
R109
+3VS
3
2
<20>
USB20_P1
USB20_N1_R
USB20_P1_R
<20>
USB20_N0
<20>
USB20_P0
L50
USB20_N0_R
USB20_P0_R
WCM-2012-900T_0805
R108
JBT
<20> USB20_P6
<20> USB20_N6
<27> WLAN_BT_CLK
<21>
BT_DET#
1 BT@
2
R722
0_0402_5%
BT_RST#
Q25
BT@
AO3413_SOT23
BT@
C202
Inrush current
0.01U_0402_25V7K
1
+BT_VCC
Add C202 for soft start
<32>
USB20_N1
L51
WCM-2012-900T_0805
12
11
= 0A
10
9
8
7
6
5
4
3
2
1
BT@ 2
1
R437
0_0402_5%
<27> WLAN_BT_DATA
C754
0.1U_0402_16V4Z
@
1
R438 @
+3VS
2
4.7K_0402_5%
+BT_VCC
(MAX=200mA)
1
2 0_0402_5%
2 0_0402_5%
JUSBB2
10
9
8
7
6
5
4
3
2
1
+5VALW
+USB_VCCA
1.4A
1
2
3
4
<24,32> USB_EN#
GND
IN
IN
EN#
OUT
OUT
OUT
FLG
8
7
6
5
1
2
3
4
5
6
7
8
9
10
11
12
13
14
W=60mils
U25
W=60mils
1
2
0_0402_5%
1 R422
C438
@
4.7U_0805_10V4Z
2
G528_SO8
ACES_87213-1000G
R439
4.7K_0402_5%
BT@
C479
0.1U_0402_16V4Z
BT@
R110
USB20_N0_R
USB20_P0_R
USB_OC#0 <20,32>
USB20_N1_R
USB20_P1_R
1
2
3
4
5
6
7
8
9
10
11
12
GND
GND
E&T_6905-E12N-00R
@
C483
4.7U_0805_10V4Z
BT@
GND2
GND1
+USB_VCCA
BT_PWR#
<32>
C481
0.1U_0402_16V7K
BT@
R441 BT@
1
2
47K_0402_5%
C482
0.1U_0402_16V4Z
BT@
<20>
2 0_0402_5%
2 0_0402_5%
R432
100K_0402_5%
BT@
Finger printer
FM Tuner
+3VS
FP@
2
D18
FP@
2
+3VS 1 R119
0_0603_5%
C468
+3VS_FP
0.1U_0402_16V4Z
JFP
+3VS_FP
VIN
IO1
USB20_N7
IO2 GND
USB20_P7
<20>
<20>
USB20_N7
USB20_P7
PRTR5V0U2X_SOT143-4
JFM @
+3VS
<21> FM_I2CCLK
<21> FM_I2CDAT
R423 1
2
0_0402_5% @
<29> FM_OUTR
<29> FM_OUTL
1 1
USB20_N7
2 2
USB20_P7
3 3 GND 5
1
2
4 4 GND 6
R118
0_0603_5%
ACES_85201-04051
FP@
<21> FM_I2C_INT#
Add D18 for EMI at PVT
1
2
FM_I2CCLK 3
FM_I2CDAT 4
5
FM_OUTR 6
FM_OUTL
7
8
9
10
11
12
FM_I2CCLK
1 FM@
2
R725
4.7K_0402_5%
1 FM@
2
R726
4.7K_0402_5%
FM_I2C_INT#
1 @
2
R727
4.7K_0402_5%
1
2
3
4
5
6
7
8
9
10
GND
GND
FM_I2CDAT
ACES_85201-1005N
+3VALW
Felica
HDA_BITCLK_MDC <20>
USB20_N3 <20>
USB20_P3 <20>
Q28
FEL@
2
G
<19> FELICA_PWR
R131
0_0603_5%
FEL@
ACES_87151-06051
R391 FEL@
1
2
47K_0402_5%
FEL@
C204
0.01U_0402_25V7K
2N7002_SOT23-3
Inrush current = 0A
3
USB20_N3
USB20_P3
Q20
C403 FEL@
0.1U_0402_16V4Z
2
2
AO3413_SOT23-3
FEL@
<20> HDA_SYNC_MDC
<20> HDA_SDIN1
<20> HDA_RST#_MDC
GND1
RES0
IAC_SDATA_OUT
RES1
GND2
3.3V
IAC_SYNC
GND3
IAC_SDATA_IN
GND4
IAC_RESET#
IAC_BITCLK
2
4
6
8
10
12
C397
FEL@
0.1U_0402_16V7K
<20> HDA_SDOUT_MDC
+3VALW
R414
100K_0402_5%
FEL@
0.1U_0402_16V4Z
1
2
3
4
5
6
7
8
JMDC
1
3
5
7
1 RJ11@ 2
9
R495
33_0402_5%11
1
2
3
4
5
6
G1
G2
JFEL @
+5VS
+5VS
C400 FEL@
2
1
+FLICA_VCC
C780
4.7U_0805_10V4Z
RJ11@
0.1U_0402_16V4Z
RJ11@
2
1
C779
1
C778
RJ11@
2
1000P_0402_50V7K
MDC 1.5 Conn.
+FLICA_VCC
13
14
15
16
17
18
GND
GND
GND
GND
GND
GND

ACES_88018-124G
Connector for MDC Rev1.5
HDA_BITCLK_MDC
@ R496
2
@
1
10_0402_5%
Int. Camera
C777
1
2
10P_0402_50V8J
+5VS
R430
1
2
0_0603_5%
+5VALW
R428
1
2
0_0603_5%
@
+CAM_VDD
Mount R105 and R117

for LVDS with Camera
C744
1
2
R105
0.1U_0402_16V4Z
JCAM
Touch Screen
1
2
3
4
5
GND1
GND2
+3VS
4
JTS @
1
2
3
4
5
GND1
GND2
1
2
3
4
5
6
7
USB10_P12
USB10_N12
USB20_N9_R
USB20_P9_R
R103 1
L57
1 1
4
2 0_0402_5%
2008/04/14
USB20_N9 <20>
USB20_P9 <20>
WCM2012F2S-900T04_0805
1
2
R99
0_0402_5%
R117 1
2 0_0402_5%
2009/04/14
Deciphered Date
USB20_N9_LVDS <17>
2 0_0402_5%
@
2 2
Compal Secret Data
Issued Date
Title
USB20_P9_LVDS <17>

USB/BT/FingerPrint
Custom
A
1
2
3
4
5
6
7
ACES_88266-05001
@
USB10_P12 <20>
USB10_N12 <20>
ACES_88266-05001
W=20mils
Date:
Rev
0.2
LA-5381P
Sheet
E
26
of
46
+1.5VS
PCIe Mini Card-3G/GPS/TV Tuner (Slot 2)
1
CM4
+1.5VS +3VS
<25>
<25>
BCRSTM
BCPW ON
+3VS
<32> TV_THER2
53
GND1
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
GND2
54
+3VS
CM6
2
4.7U_0805_10V4Z
+UIM_PW R
UIM_DATA
UIM_CLK
UIM_RESET
COMMON
TV_DET
1
CM1
TV_DET
PLT_RST#
USB20_P11 <20>
USB20_N11 <20>
CM2
<20>
2
0.01U_0402_25V7K
3G_OFF# <32>
LED_W IMAX# <34>

CPLGP1 <25>
TV_THER1 <32>
COMMON R820 1 3G@
2 0_0402_5%UIM_VPP
COMMON R821 1 TV@
2 0_0402_5%
NC
BCIO
<25>
4
5
6
NC
DM4
DAN217_SC59
@
2
4.7U_0805_10V4Z
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
GND1
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
GND2
54
UW B_OFF# <32>
PLT_RST# <11,14,19,25,28,31,32,33>
FOX_AS0B226-S40N-7F
CM14
22P_0402_50V8J
2 @
DM3
DAN217_SC59
@
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
UIM_DATA
DM2
DAN217_SC59
@
+3VS
UIM_VPP
MOLEX_47273-0001~D
CM16
10P_0402_50V8J
2 3G@
RM1
4.7K_0402_5%
@
GND
VPP
I/O
CM12
+1.5VS +3VS
JNAND
VCC
RST
CLK
2
0.01U_0402_25V7K
2
4.7U_0805_10V4Z
1
1
CM15
10P_0402_50V8J
3G@ 2
1
1
2
4.7U_0805_10V4Z
CM11
CM3
1
2
3
1
2
0.1U_0402_16V4Z
1
1
CM10
+UIM_PW R
UIM_RESET
UIM_CLK
DM1
RLZ20A_LL34
3G@
CM9
J3GSIM
3G@
CM13
0.1U_0402_16V4Z
CM8
TV@
R185
47K_0402_5%
USB20_N10 <20>
USB20_P10 <20>
+UIM_PW R
+1.5VS
0.1U_0402_16V4Z
1
2
0.01U_0402_25V7K
0.1U_0402_16V4Z
1
FOX_AS0B226-S40N-7F
+UIM_PW R
1
CM7
+3VS
<25>
XBCLKM
<25>
BCCDET
<15> CLKREQ_MCARD1#
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
CM5
2
0.01U_0402_25V7K
JGPS
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
WUSB or Upconvert (Slot 3)
0.1U_0402_16V4Z
1
+UIM_PW R
PCIe Mini Card-WLAN/WiMax (Slot 1)
Kill SWITCH
+1.5VS
0.1U_0402_16V4Z
1
CM20
+3VS
R823 0_0402_5%
1
2
1
2
R824 0_0402_5%
GND2
54
2
4.7U_0805_10V4Z
+3VS
SW 1
+3VS
XMIT_OFF#
PLT_RST#
0.1U_0402_16V4Z
1
CM17
CM18
2
0.01U_0402_25V7K
5
4
3
2
1
3
2
1
CM19
G2
G1
2
4.7U_0805_10V4Z
DM5
DAN217_SC59
@
RM5
1
2
100K_0402_5%
+3VS
KILL_SW # <32>
1BS003-1210L_3P
+3VS
SMB_CK_CLK1 <20>
SMB_CK_DAT1 <20>
CM23 0.1U_0402_16V4Z
1
2
USB20_N8 <20>
USB20_P8 <20>
GND1
2
0.01U_0402_25V7K
53
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
+3VS
<32>
LED_W IMAX# <34>
W L_OFF#
KILL_SW #
LED_W IMAX#
W IMAX@
2
1
100K_0402_5%
XMIT_OFF#
1
@ R822
3G_OFF#
2
0_0402_5%
UM1
RM6
<32> E51_TXD
<32> E51_RXD
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
1
CM22
JW LAN
<26> W LAN_BT_DATA
<26> W LAN_BT_CLK
<15> CLKREQ_MCARD2#
CM21
+1.5VS +3VS
Compal Secret Data
ACES_88911-5204
Issued Date
2008/09/05
Deciphered Date
2009/09/05
Title

PCIe-WLAN/HDDVD/NAND/NEW
RM7
100K_0402_5%
Size
Document Number
Rev
0.2
LA-5381P
Date:
Sheet
27
of
46
UL1
CL1
2 0.1U_0402_16V7K PCIE_IRX_LANTX_P3 20
HSOP
CL2
2 0.1U_0402_16V7K PCIE_IRX_LANTX_N3 21
HSON
1
RL3
+3V_LAN
PCIE_ITX_C_PRX_P3
15
HSIP
PCIE_ITX_C_PRX_N3
16
HSIN
LAN_W AKE#_R
2
100K_0402_5%
<15> CLK_PCIE_LAN
<15> CLK_PCIE_LAN#
<11,14,19,25,27,31,32,33>
+3VS
PLT_RST#
33
34
35
32
LED0
38
LAN_ACTIVITY#
MDIP0
MDIN0
MDIP1
MDIN1
NC/MDIP2
NC/MDIN2
NC/MDIP3
NC/MDIN3
2
3
5
6
8
9
11
12
LAN_MDI0+
LAN_MDI0LAN_MDI1+
LAN_MDI1LAN_MDI2+
LAN_MDI2LAN_MDI3+
LAN_MDI3-
DVDD12
DVDD12
DVDD12
13
30
36
VDDTX/EVDD12
19
VDD33
VDD33
29
37
17
REFCLK_P
CLK_PCIE_LAN#
18
REFCLK_N
PLT_RST#
27
PERSTB
48
VCTRL12A/SROUT12
R398
1
1K_0402_1%
@
<21> LAN_ISOLATE#
+3V_LAN
RL4
43
0_0402_5% 8111DL@
46
1
2
RL5 2.49K_0402_1%
ISOLATEB
<32> LAN_W AKE#_R
RL7
15K_0402_5%
ISOLATEB
ISOLATEB
LAN_X1
41
CKTAL1
LAN_X2
42
CKTAL2
+LAN_CTRL12VDD 45
1LAN_X2
7
14
31
47
25MHz_20pF_6X25000017
1
1
CL25
27P_0402_50V8J
RSET
28
YL1
CL24
27P_0402_50V8J
2
NC/ENSWREG
LANWAKEB
LAN_X1 2
NC/FB12
26
DO
DI
SK
CS
+3V_LAN
+3V_LAN
Close to Pin1,29,37,40
GND
ORG
NC
VCC
5
6
7
8
CL3
@
1
RL2
1
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
1K_0402_5%
1
0.1U_0402_16V4Z
8103EL@
+LAN_DVDD12
44
AVDD33
NC/AVDD33
1
40
+3V_LAN
DVDD12/AVDD12
10
NC/AVDD12
39
NC/GPO
NC
23
24
EGND
22
+LAN_DVDD12
8103EL
NC
NC
NC
DVDD12
NC
NC
VDDTX
NC
LED3
LED2
LED1
NC
NC
NC
NC
VCTRL12D
VCTRL12A
1
0.1U_0402_16V4Z
1
1
CL9
0.1U_0402_16V4Z
1
0.1U_0402_16V4Z
+LAN_DVDD12
VCTRL12D/VDDSR
GND
GND
GND
GND
+LAN_EVDD12
DSM#
@
1
R399
0_0402_5%
LAN_DSM# <20>
CL17
1U_0402_6.3V4Z
Pin23 is GPO pin for 8111DL to

be used for DSM function
Close to Pin 44,45
1
2
LL2
0_0603_5%
8111DL@
+LAN_DVDD12
1
2
+3V_LAN
RL8
0_0603_5%
8103EL@
+LAN_CTRL12VDD
1
2
LL4 0_0603_5%
1
1
8111DL@
CL28
CL29
0.1U_0402_16V4Z
22U_0805_6.3V6M
2
2 8111DL@
CL18
1U_0402_6.3V4Z
Close to Pin19
+LAN_AVDD12
8111DL@
1
2
RL9
0_0603_5%
2
LAN_ACTIVITY#
UL3
1
2
3
LAN_MDI3LAN_MDI3+
4
5
6
LAN_MDI2LAN_MDI2+
7
8
9
LAN_MDI1LAN_MDI1+
10
11
12
CL33
0.01U_0402_25V7K
2
CL34 2
8111DL@
0.01U_0402_25V7K
1 RL10 150_0402_5%
TCT1
TD1+
TD1-
MCT1
MX1+
MX1-
24
23
22
TCT2
TD2+
TD2-
MCT2
MX2+
MX2-
21
20
19
TCT3
TD3+
TD3TCT4
TD4+
TD4-
MCT3
MX3+
MX3MCT4
MX4+
MX4-
18
17
16
15
14
13
8111DL@
8111DL@
1
2 1000P_0402_50V8-J
1
2
CL39
RL13
75_0402_1%
8111DL@
8111DL@
1
2 1000P_0402_50V8-J
1
2
CL40
RL12
75_0402_1%
1
CL41
2 1000P_0402_50V8-J
1
2
RL15
75_0402_1%
1
CL42
2 1000P_0402_50V8-J
1
2
RL16
75_0402_1%
RJ45_MIDI2RJ45_MIDI2+
2
CL44
0.1U_0402_16V4Z
LG-2446S-1
1
CL36
PR4+
PR2-
RJ45_MIDI2-
PR3-
RJ45_MIDI2+
PR3+
RJ45_MIDI1+
PR2+
RJ45_MIDI0-
PR1-
RJ45_MIDI0+
PR1+
2008/10/06
Deciphered Date
2009/10/06
4
14
SHLD1
13
Green LED-
LANGND
2 1000P_1808_3KV7K
1
Compal Secret Data
Issued Date
SHLD2
1 RL18 9
150_0402_5% Green LED+
SUYIN_100073FR012G101ZL
PR4-
RJ45_MIDI1-
RJ45_GND
10
Yellow LED+
RJ45_MIDI3+
1 RL14 150_0402_5%
2
2
+3V_LAN
RJ45_GND
2 CL35
0.01U_0402_25V7K
0.1U_0402_16V4Z
JLAN
12 Yellow LED-
1 RL17 11
150_0402_5%
RJ45_MIDI38
LAN_SK
LAN Conn.
CL43
+3V_LAN
8111DL@
Place these components

colsed to LAN chip
0.1U_0402_16V4Z
+LAN_AVDD12
LAN_MDI0LAN_MDI0+
0.1U_0402_16V4Z
8111DL@
RTL8111DL-GR_LQFP48_7X7
CL32
0.01U_0402_25V7K
8111DL@
2
CL19
2
CL20
2
CL21
2
CL22
2
CL23
0.1U_0402_16V4Z
1
Layout Note: LL1 must be
within 500mil to Pin1
CL8
CL8,CL9 must be within
22U_0805_6.3V6M
500mil to LL1
8111DL@2
+3V_LAN
NC/VDDSR
Close to Pin10,13,30,36,39
+LAN_AVDD12
LL1 8111DL@
+LAN_CTRL12A
1
2
4.7UH_1008HC-472EJFS-A_5%_1008
+LAN_EVDD12
+LAN_CTRL12VDD
RL11 8103EL@
2
0_0603_5%
pin assignments table for difference

8111DL
FB12
MDIP2
MDIN2
AVDD12
MDIP3
MDIN3
EVDD12
GPO
EEDO
EEDI
EESK
AVDD12
AVDD33
ENSR
VDDSR
VDDSR
SROUT12
8111DL@
+LAN_DVDD12
Pin
4
8
9
10
11
12
19
23
33
34
35
39
40
43
44
45
48
2
CL4
2
CL5
2
CL6
2
CL7
0.1U_0402_16V4Z
+3V_LAN
1
0.1U_0402_16V4Z
1
RL6
1K_0402_1%
4
3
2
1
2
3.6K_0402_5%
CAT93C46VI-GT3_SO8
CLK_PCIE_LAN
LAN_DO
LAN_DI
LAN_SK
LAN_CS
LED3/EEDO
LED2/EEDI
LED1/EESK
EECS
CLKREQB
+LAN_DVDD12
1
RL1
UL2
8111DL@
25
+LAN_CTRL12A
Title
CL37
0.1U_0402_16V4Z
CL38
4.7U_0603_6.3V6K

RTL8103EL/RTL8111DL
Size
Document Number
Rev
0.2
LA-5381P
Date:
Sheet
1
28
of
46
+3VS_DVDD
RA1
2
1
0_0603_5%
30mil
CA1
10U_0805_10V6K
1
CA2
+3VS
J2
2
+5VS
+AVDD
2
0.1U_0402_16V4Z
40mil
0.1U_0402_16V4Z
1
CA6
2
2
0.1U_0402_16V4Z
<30>
MIC2_L
<30>
MIC2_R
2
1
100P_0402_50V8J
CA44
2
1 FM@
100P_0402_50V8J
CA50
1
2
FM@ CA12
2.2U_0603_6.3V6K
1
2
FM@ CA13
2.2U_0603_6.3V6K
2
1
100P_0402_50V8J
CA49 FM@
2
1
100P_0402_50V8J
CA45
2
1
100P_0402_50V8J
CA46
MONO_IN
1
2
CA14
100P_0402_50V8J
<26> FM_OUTL
<26> FM_OUTR
Ext. Mic
<30> MIC1_C_L
<30> MIC1_C_R
<20> HDA_BITCLK_CODEC
<20> HDA_SDOUT_CODEC
2
RA7
<20> HDA_SDIN0
<20> HDA_RST#_CODEC
<20> HDA_SYNC_CODEC
<21>
<30>
RA2
1
DVDD
LOUT1_L
35
AMP_SPK_L
LINE2-R
LOUT1_R
36
AMP_SPK_R
16
MIC2_L
LOUT2_L
39
17
MIC2_R
LOUT2_R
41
23
LINE1_L
SPDIFO1
48
24
LINE1_R
SPDIFO2
45
21
MIC1_L
HPOUT_L
33
22
MIC1_R
HPOUT_R
32
12
BEEP_IN
MONO_OUT
37
BITCLK
DMIC_CLK1/2
46
HDA_SDOUT_CODEC
SDATA_OUT
DMIC_CLK3/4
44
SDATA_IN
LINE2_VREFO
20
RESET#
LINE1_VREFO
11
HDA_SYNC_CODEC
10
HIGH:HARMAN
LOW:NO-BRAND
MUTE#
DVDD_IO
38
LINE2-L
15
1 HDA_SDIN0_R
33_0402_5%
HDA_RST#_CODEC
SENSE_A
13
SENSE_B
34
0_0402_5%
47
43
4
7
SYNC
MIC1_VREFO
MIC2_VREFO
GPIO0/DMIC_DATA1/2
CPVREF
GPIO1/DMIC_DATA3/4
VREF
SENSE A
JDREF
SENSE B
CBN
EAPD
CBP
2
1
1
VIN
VOUT
GND
SHDN#
BP
CA11 @
2
1
@
CA10
1U_0402_6.3V4Z
1
RA5
1
RA6
2
63.4_0402_1%
2
63.4_0402_1%
AVSS1
AVSS2
HP_L
<30>
HP_R
<30>
EC Beep
<32>
EC_BEEP
<20>
SB_SPKR
RA8
1
2
47K_0402_5%
PCI Beep
CA15
1
2
RA9
1
2
47K_0402_5%
MONO_IN
0.1U_0402_16V4Z
1U_0402_6.3V4Z
10mil
10mil
40
AC_JDREF
RA11
10K_0402_5%
CA42
1
2
+MIC1_VREFO
+MIC2_VREFO
27
29
<30>
1
CA16
AC_VREF
30
SPDIF
CA39
1
2
19
31
2 @
33P_0402_50V8K
1
C193
18
28
AMP_SPK_L <30>
AMP_SPK_R <30>
LA2 1
2
MBK1608121YZF_0603
CA20
0.1U_0402_16V4Z
1U_0402_6.3V4Z
2
2.2U_0603_6.3V6K
1
2
CA17
2.2U_0603_6.3V6K
NC
DVSS
DVSS
0.22U_0603_16V4Z
APL5151-475BC-TRL_SOT23-5
14
GPIO0-->SPK_SEL
CA9
@
1U_0402_6.3V4Z
UA1
<25,32,35,38,40> SUSP#
HDA_BITCLK_CODEC
SPK_SEL
SPK_SEL
CA8
2
0.1U_0402_16V4Z
4.75V
RA10
CA18
CA19
CA48
2
2
20K_0402_1%
100P_0402_50V8J
2
Int. Mic
1
CA43
+VDDA
10U_0805_10V6K
1
2
100P_0402_50V8J
AVDD2
AVDD1
25
CA7
UA2
+5VALW
1
2
2
10U_0805_10V6K
0.1U_0402_16V4Z
10U_0805_10V6K
1
CA4
CA5
10U_0805_10V6K
RA3
2
1
0_0603_5%
CA3
+VDDA
1
JUMP_43X39
@
CA47
100P_0402_50V8J
place close to chip
26
42
<30>
NBA_PLUG
RA16
SENSE_B
2
5.1K_0402_1%
RA17 1
2 20K_0402_1%
RA18 1
SENSE_A
2 20K_0402_1%
RA19 1
2 10K_0402_1%
ALC272-GR_LQFP48_7X7
DGND
need to re-link ALC272
AGND
<30> MIC_SENSE
@
HDA_BITCLK_CODEC
@
1
R313
C618 1
2
100_0402_5%
2 100P_0402_50V8J
@
@
1
R318
+3VS
1
HDA_RST#_CODEC
2
100_0402_5%
C634 1
2 100P_0402_50V8J
CA38
0.1U_0402_16V4Z
@
Add CA38 for EMI
Change CA51~CA54 to 0 ohm

for PC-Beep noise issue
CA51
2 0_0402_5%
CA52
2 0_0402_5%
CA53
2 0_0402_5%
CA54
2 0_0402_5%
RA15 1
Sense Pin
Impedance
39.2K
SENSE A
SENSE B
PORT-A (PIN 39, 41)
20K
PORT-B (PIN 21, 22)
Ext. MIC
10K
PORT-C (PIN 23, 24)
FM tuner
5.1K
PORT-D (PIN 35, 36)
39.2K
PORT-E (PIN 14, 15)
20K
PORT-F (PIN 16, 17)
10K
PORT-H (PIN 37)
5.1K
PORT-I (PIN 32, 33)
Compal Secret Data
2008/04/14
Issued Date
2009/04/14
Deciphered Date
Title
Int. MIC
4
Headphone out

HD Audio ALC272 Codec
Custom
A
Function
2 0_0603_5%
Codec Signals
Date:
Rev
0.2
LA-5381P
Sheet
E
29
of
46
Ext. Mic
TPA6017 Medium Range Amplifier
Change CA21 and CA22 to 0603 Size
<29> MIC1_C_L
+5VS
Rin =70Kohm
<29> MIC1_C_R
4.7U_0603_6.3VK
CA21
1
4.7U_0603_6.3VK
RA21
2 RA20
1
1K_0402_5% 4.7K_0402_5%
2
1
CA23
1
CA24
10U_0805_10V6K
RA23 1
2
1
2
DA2
4.7K_0402_5%
1
0.1U_0402_16V4Z
2
4.7K_0402_5%
Int. Mic
RINROUT+
CA31
0.033U_0402_25V7K
ROUT-
CA32
0.033U_0402_25V7K
LINE_C_OUTL
2
1
1K_0402_5%
RA26
1
2
CA27
220P_0402_50V7K
LINLOUT-
MUTE#
18
SPKR+
14
SPKR-
SPKL+
SPKL-
@ RA29
100K_0402_5%
19
BYPASS
10
PSOT24C_SOT23
Left Connector
DA4
2
3
AMP_BYPASS
SHUTDOWN
21
20
13
11
1
ACES_85204-0200N
RA30
100K_0402_5%
Keep 10 mil width
12
CA33
0.47U_0603_10V7K
LA4
TPA6017A2_TSSOP20
JSPKL @
PACDN042Y3R_SOT23-3
1
2
LA3 1 FBMA-L11-160808-800LMT_0603
2
SPKL+
SPKL-
GND5
GND1
GND2
GND3
GND4
MUTE#
1 NC1
2 NC2
3
4
DA3
@
1
NC
<29>
INT_MIC <17>
1
CA28
1
2
LIN+
LOUT+
<29> AMP_SPK_L
JMIC
INT_MIC_R
GAIN0
1U_0402_6.3V4Z
R545 2
0_0402_5%
17
MIC2_L
MIC2_R
RA25
1K_0402_5%
2
1
LINE_C_OUTR
<29>
<29>
1U_0402_6.3V4Z
CA26
2
1
0.033U_0402_25V7K
RIN+
GAIN1
CA30
<29> AMP_SPK_R
+MIC2_VREFO
@ RA28
100K_0402_5%
0.033U_0402_25V7K
1
16
15
6
VDD
PVDD1
PVDD2
RA27
100K_0402_5%
1
RA24
R545 Just Reserved
+5VS
CA29
+MIC1_VREFO
CA25
0.1U_0402_16V4Z
10 dB
UA3
+MIC1_VREFO
MIC1_R
2
1
1K_0402_5%
RA22
CA22
1
2
DA1
MIC1_L
SPK_L1
SPK_L2
1
2
FBMA-L11-160808-800LMT_0603
Right Connector
3
4
1 NC1
2 NC2
ACES_85204-0200N
DA5
@
1
2
3
JSPKR @
PACDN042Y3R_SOT23-3
1
2
LA5 1 FBMA-L11-160808-800LMT_0603
2
SPKR+
SPKR-
LA6
GAIN0 GAIN1 Av(db) Rin(ohm)
SPK_R1
SPK_R2
1
2
FBMA-L11-160808-800LMT_0603
3
4
1 NC1
2 NC2
ACES_85204-0200N
90K
10
0 15.6
45K
1 21.6
25K
70K
HeadPhone/LINE Out JACK

1
CA35
JLINE
<29> NBA_PLUG
<29>
HP_R
<29>
L35 1
2 HP_R_L
KC FBM-L11-160808-121LMT 0603
L36 1
2 HP_L_L
KC FBM-L11-160808-121LMT 0603
HP_L
0.1U_0402_16V4Z
1
2
1
2
4
DA6
2
1
SPDIF_R
<29>
SPDIF
RA31 1
SPDIF_R
2
CA34
100P_0402_50V8J
10
CA37
DRIVE
IC
9
10
GND
GND
0_0603_5%
+5VS
PACDN042Y3R_SOT23-3
6
7
0.1U_0402_16V4Z SINGA_2SJ-A373-H01
Ext.MIC/LINE IN JACK
JEXMIC
5
<29> MIC_SENSE
MIC1_R
MIC1_L
CA36
0.1U_0402_16V4Z
LA9 1
2 MIC1_L_R
KC FBM-L11-160808-121LMT 0603
LA101
2 MIC1_L_L
KC FBM-L11-160808-121LMT 0603
4
3
6
2
1
SINGA_2SJ-S351-015
DA7
2
1
@
CA40
100P_0402_50V8J
@
CA41
100P_0402_50V8J
PACDN042Y3R_SOT23-3
2008/04/14
Issued Date
Compal Secret Data
2009/04/14
Deciphered Date
Title
Date:

AMP/Audio Jack/HP/SPEAKER/VR
Custom
B
Rev
0.2
LA-5381P
Sheet
E
30
of
46
+1.8VS_OUT
40mil
0.1U_0402_16V4Z
1
1
Power Circuit
CC1
UC1
PCIE_ITX_C_PRX_N1
PCIE_ITX_C_PRX_P1
1
3
4
CC7
CC8
1
1
9
8
2 0.1U_0402_16V7K
2 0.1U_0402_16V7K
PCIE_PTX_IRX_N1
PCIE_PTX_IRX_P1
2
8.2K_0402_5%
2
RC19
+3VS
11
12
7
1
RC1
38
39
1
10K_0402_5%
+3VS
30
1
2
CC12 0.1U_0402_16V4Z
+3VS
<11,14,19,25,27,28,32,33>
1
RC5
2XDCD0#_SDCD#
4.7K_0402_5%
1
RC7
2 XDCD1#_MSCD#
4.7K_0402_5%
PLT_RST#
PLT_RST#
1
2
APCLKN
APCLKP
APRXN
APRXP
APTXN
APTXP
TXIN
TXOUT
19
20
44
18
37
MDIO0
MDIO1
MDIO2
MDIO3
MDIO4
MDIO5
MDIO6
MDIO7
MDIO8
MDIO9
MDIO10
MDIO11
MDIO12
MDIO13
MDIO14
48
47
46
45
43
42
41
40
29
28
27
26
25
23
22
TPA1P
TPBIAS_1
TREXT
34
35
36
JMB380
TAV33
XRSTN
XTEST
13
14
SEEDAT
SEECLK
XDCD1#_MSCD#
XDCD0#_SDCD#
15
16
CR1_CD1N
CR1_CD0N
CR_LED
DV33
DV33
DV33
DV18
DV18
APREXT
CPPE#
TC2 PAD
+VCC_OUT
APVDD
APV18
5
10
17
CR1_PCTLN
21
CR1_LEDN
APGND
TCPS
TPB1N
TPB1P
TPA1N
24
31
32
33
GND
49
+3VS
1000P_0402_50V7K
1
1
CC3
2
2
10U_0805_10V6K
CC4
2
2
0.1U_0402_16V4Z
1
CC5
1
CC6
R129
10K_0402_5%
+1.8VS_OUT
<20>
1
XD_SD_MS_D0
XD_SD_MS_D1
XD_SD_MS_D2
XD_SD_MS_D3
SDCMD_MSBS_XDWE#
SDCLK_MSCLK_XDCE#
XDWP#_SDWP#
XD_CLE
XD_SD_D4
XD_SD_D5
XD_SD_D6
XD_SD_D7
XD_RE#
XD_RB#
XD_ALE
1
RC11
2
RC9
CC9
2
2
0.1U_0402_16V4Z
+VCC_OUT
0_0402_5%
1
2
R397
<20> CR_WAKE#
XDWP#_SDWP#
2
RC3
XD_RB#
2
RC4
SDCMD_MSBS_XDWE# 2
RC6
XDCD0#_SDCD#
1
10K_0402_5%
1
1K_0402_5%
1
10K_0402_5%
2
12K_0402_1%
Strapping setting
Description
1
10K_0402_1%
+3VS
XD_CLE
CR_LEDCON <34>
XD_ALE
1
RC8
1
RC10
1
RC12
Pin name
High
low
2
10K_0402_5%
200K_0402_5%
MDIO7
on-board
add-in card
MDIO12
+VCC_OUT
high active
+VCC_OUT
low active
CR_LED
high active
CR_LED
low active
MDIO14
10K_0402_5%
P.S CR1_PCTLN aslo can out 3V with 250mA for

5IN1 using.(MDIO12 can't be seted after MP IC)
CR_LED
2
2
G
CPPE#
0_0603_5%
CC10
0.1U_0402_16V4Z
2N7002_SOT23-3
R151
CR_CPPE#
XD_RE#
QC1
+3VALW
2
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
JMB380-QGAZ0A_QFN48_7X7
CR_LEDCON
CLK_PCIE_MCARD0#
CLK_PCIE_MCARD0
CC2
RC17
4.7K_0402_5%
Card Reader Connector
SDCLK_MSCLK_XDCE#
+VCC_OUT
JREAD
20 mils
3
1
3
CC17
10U_0805_10V6K
CC18
0.1U_0402_16V4Z
XDCD0#_SDCD#
32
10
9
8
7
6
5
4
SDCMD_MSBS_XDWE#34
XDWP#_SDWP#
33
XD_ALE
35
XD_CD#
40
XD_RB#
39
XD_RE#
38
XDCE#
37
XD_CLE
36
DC2
XDCD1#_MSCD#
XD_SD_MS_D0
XD_SD_MS_D1
XD_SD_MS_D2
XD_SD_MS_D3
XD_SD_D4
XD_SD_D5
XD_SD_D6
XD_SD_D7
XD_CD#
1
1
DAN202UT106_SC70-3
2
CC21
270P_0402_50V7K
31
11
41
42
XD-VCC
XD-D0
XD-D1
XD-D2
XD-D3
XD-D4
XD-D5
XD-D6
XD-D7
SD-VCC
MS-VCC
7 IN 1 CONN
XD-WE
XD-WP
XD-ALE
XD-CD
XD-R/B
XD-RE
XD-CE
XD-CLE
SD_CLK
SD-DAT0
SD-DAT1
SD-DAT2
SD-DAT3
SD-DAT4
SD-DAT5
SD-DAT6
SD-DAT7
SD-CD
SD-WP
SD-CMD
MS-SCLK
MS-DATA0
MS-DATA1
MS-DATA2
MS-DATA3
MS-INS
MS-BS
7IN1-GND
7IN1-GND
7IN1-GND
7IN1-GND
21
28
+VCC_OUT
20
14
12
30
29
27
23
18
16
1
2
25
SDCLK
XD_SD_MS_D0
XD_SD_MS_D1
XD_SD_MS_D2
XD_SD_MS_D3
XD_SD_D4
XD_SD_D5
XD_SD_D6
XD_SD_D7
XDCD0#_SDCD#
XDWP#_SDWP#
SDCMD_MSBS_XDWE#
26
17
15
19
24
22
13
MSCLK
XD_SD_MS_D0
XD_SD_MS_D1
XD_SD_MS_D2
XD_SD_MS_D3
XDCD1#_MSCD#
SDCMD_MSBS_XDWE#
2
22_0402_5% 2
22_0402_5% 2
22_0402_5%
1
1 RC13
1 RC14
RC15
SDCLK
MSCLK
XDCE#
For EMI
@
SDCLK
RC16
100_0402_5%
MSCLK
RC18
100_0402_5%
XDCE#
TAITW_R015-D10-LM_NR
@
CC14
100P_0402_50V8J
@
1
2
CC15
100P_0402_50V8J
CC19
1
2
RC24
100_0402_5%
@ 100P_0402_50V8J
Compal Secret Data
2008/10/06
Issued Date
Title
Size
A
2009/10/06
Deciphered Date
Date:

JMB380 card reader/1394
Document Number
Rev
0.2
LA-5381P
Sheet
E
31
of
46
+3VL_EC
KSI[0..7]
<33,34> KSI[0..7]
+3VL
KSO[0..17]
<33,34> KSO[0..17]
+3VL_EC
+EC_AVCC
C805
<19,23> CLK_PCI_EC
<11,14,19,25,27,28,31,33> PLT_RST#
<20> EC_SCI#
<34> WL_BT_LED#
R537
10K_0402_5%
2
10K_0402_5%
1 C811
0.1U_0402_16V4Z
2
+3VL
+3VS
R563 1
2 100K_0402_5%
CEC_INT#
R955 1
2 2.2K_0402_5%
EC_SMB_CK1
R956 1
2 2.2K_0402_5%
EC_SMB_DA1
R953 1
2 4.7K_0402_5%
R954 1
2 4.7K_0402_5%
EC_SMB_CK2
R512
2 100K_0402_5% ON/OFFBTN#
R947
2 47K_0402_5%
KSO1
R948
2 47K_0402_5%
KSO2
2 47K_0402_5%
CLK_PCI_EC
PLT_RST#
ECRST#
EC_SCI#
WL_BT_LED#
12
13
37
20
38
PCICLK
PCIRST#/GPIO05
ECRST#
SCI#/GPIO0E
CLKRUN#/GPIO1D
BATT_TEMP/AD0/GPIO38
BATT_OVP/AD1/GPIO39
ADP_I/AD2/GPIO3A
Input
AD3/GPIO3B
AD4/GPIO42
SELIO2#/AD5/GPIO43
63
64
65
66
75
76
BATT_TEMPA
TV_THER1
ADP_I
ADP_V
KILL_SW#
TV_THER2
DAC_BRIG/DA0/GPIO3C
EN_DFAN1/DA1/GPIO3D
IREF/DA2/GPIO3E
DA3/GPIO3F
68
70
71
72
DAC_BRIG
EN_DFAN1
IREF
CHGVADJ
PSCLK1/GPIO4A
PSDAT1/GPIO4B
PSCLK2/GPIO4C
PSDAT2/GPIO4D
TP_CLK/PSCLK3/GPIO4E
TP_DATA/PSDAT3/GPIO4F
83
84
85
86
87
88
USB_CHG_EN#
USB_EN#
CAP_INT#
CAP_RST#
TP_CLK
TP_DATA
PWM Output
MISC
AD
55
56
57
58
59
60
61
62
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
81
82
EC_SMB_CK1
EC_SMB_DA1
EC_SMB_CK2
EC_SMB_DA2
77
78
79
80
KSI0/GPIO30
KSI1/GPIO31
KSI2/GPIO32
KSI3/GPIO33
KSI4/GPIO34
KSI5/GPIO35
KSI6/GPIO36
KSI7/GPIO37
KSO0/GPIO20
KSO1/GPIO21
KSO2/GPIO22
KSO3/GPIO23
KSO4/GPIO24
KSO5/GPIO25 Int. K/B
KSO6/GPIO26 Matrix
KSO7/GPIO27
KSO8/GPIO28
KSO9/GPIO29
KSO10/GPIO2A
KSO11/GPIO2B
KSO12/GPIO2C
KSO13/GPIO2D
KSO14/GPIO2E
KSO15/GPIO2F
KSO16/GPIO48
KSO17/GPIO49
PS2 Interface
SDICS#/GPXOA00
SDICLK/GPXOA01
SDIDO/GPXOA02
SDIDI/GPXID0
ECRST#
CRY1
CRY2
SPI Flash ROM
EC_SI_SPI_SO
EC_SO_SPI_SI
SPI_CLK
SPI_CS#
73
74
89
90
91
92
93
95
121
127
CIR_IN
CEC_INT#
FSTCHG
BATT_FULL_LED#
CAPS_LED#
BATT_LOW_LED#
TP_LED
SYSON
VR_ON
ACIN_D
100
101
102
103
104
105
106
107
108
EC_RSMRST#
EC_LID_OUT#
EC_ON
EC_SWI#
SB_PWRGD
BKOFF#
WL_OFF#
HDPINT
LOGO_LED
110
112
114
115
116
117
118
HDPACT
ENBKL
HDPLOC
EC_THERM#
SUSP#
PBTN_OUT#
LAN_WAKE#
122
123
SM Bus
PM_SLP_S3#/GPIO04
PM_SLP_S5#/GPIO07
EC_SMI#/GPIO08
LID_SW#/GPIO0A
SUSP#/GPIO0B
PBTN_OUT#/GPIO0C
GPIO
EC_PME#/GPIO0D
EC_THERM#/GPIO11
FAN_SPEED1/FANFB1/GPIO14
FANFB2/GPIO15
EC_TX/GPIO16
EC_RX/GPIO17
ON_OFF/GPIO18
PWR_LED#/GPIO19
NUMLED#/GPIO1A
EC_RSMRST#/GPXO03
EC_LID_OUT#/GPXO04
EC_ON/GPXO05
EC_SWI#/GPXO06
ICH_PWROK/GPXO06
GPO
BKOFF#/GPXO08
WL_OFF#/GPXO09
GPXO10
GPXO11
2 10K_0402_5%
CIR_IN
R567
2 10K_0402_5%
CAP_INT#
R569
2 4.7K_0402_5%
Change CAP_INT# pull high to +3VL
+5VS
TP_CLK
R534
2 4.7K_0402_5%
TP_DATA
R535
2 4.7K_0402_5%
BT_RST# <26>
WOL_EN# <35>
USB_OC#2 <20,24>
VGATE <43>
C854
0.1U_0402_16V7K
GPI
V18R
EC_SI_SPI_SO <33>
EC_SO_SPI_SI <33>
SPI_CLK <33>
SPI_CS# <33>
+3VS
CEC_INT# <18>
FSTCHG <38>
BATT_FULL_LED# <34>
CAPS_LED# <33>
BATT_LOW_LED# <34>
TP_LED <34>
SYSON <25,35,41>
<43>
@ R962 0_0402_5%
LAN_WAKE# 1
2
C785
15P_0402_50V8J
1
IN
OUT
NC
NC
Y7
15P_0402_50V8J
EC_SWI#
EC_SWI#
EC_SWI#_R <20,25>
@ R964 0_0402_5%
1
2
EC_SWI#_R <20,25>
FUNCTION
124
SB_PWRGD <20,43>
BKOFF# <17>
WL_OFF# <27>
HDPINT <33>
LOGO_LED <34>
No Support
3
1
R560
2
150K_0402_5%
+3VL
D33
2
HDPACT <33>
ACIN
R965 0_0402_5%
2
<21,34,36>
HDPLOC <33>
EC_THERM# <21>
SUSP# <25,29,35,38,40>
PBTN_OUT# <20>
2
C326
ENBKL
2
C814
Support
HIGH
1
100P_0402_50V8J
2
0_0402_5%
R684
UMA_ENBKL <11>
4.7U_0805_10V4Z
KB926QFD3_LQFP128_14X14
+5VL
CIR
69
2 100K_0402_5%
R576
100_0805_5%
CIR@
+5VL_CIR
U31
CIR_IN
L81
1
C816
2
0.1U_0402_16V4Z
C628
4.7U_0805_10V4Z
CIR@
2
1
0_0603_5%
Vout
VCC
GND
GND
IRM-V536/TR1_3P
CIR@
3G_OFF# <27>
/
32.768KHZ_12.5P_1TJS125BJ4A421P
Compal Secret Data
2008/04/14
Issued Date
Change wake and reserve to 3G at DVT
2 100K_0402_5%
LOW
EC_RSMRST# <20>
EC_LID_OUT# <20>
EC_ON <34>
2
<28> LAN_WAKE#_R
R963 0_0402_5%
1
2
LED of KB
LAN_WAKE#_R <28>
20M_0603_5%
C784
L80
0_0603_5%
+EC_AVCC
R749 @
1
2 CRY2
R548
2
1
R541 10K_0402_5%
ECAGND
CRY1
R601 0_0402_5%
LAN_WAKE#
2
R546
Add at DVT for DIMM function

VR_ON
+3VL_EC
<20,26> USB_OC#0
ACIN_D
PM_SLP_S4#/GPXID1
ENBKL/GPXID2
GPXID3
GPXID4
GPXID5
GPXID6
GPXID7
XCLK1
XCLK0
LID_SW#
2 10K_0402_5%
1 TV@
+3VL
USB_CHG_EN# <24>
USB_EN# <24,26>
CAP_INT# <34>
CAP_RST# <34>
TP_CLK <34>
TP_DATA <34>
119
120
126
128
1 TV@
R539
+5VL
DAC_BRIG <17>
EN_DFAN1 <4>
IREF
<38>
CHGVADJ <38>
BT_RST#
WOL_EN#
USB_OC#2
VGATE
R542
TV_THER2
Change R539 and R542 to 10K
BATT_TEMPA <37>
TV_THER1 <27>
ADP_I <38>
ADP_V <38>
KILL_SW# <27>
TV_THER2 <27>
97
98
99
109
TV_THER1
KB_LED
11
24
35
94
113
2 100K_0402_5%
SPIDI/RD#
SPIDO/WR#
SPICLK/GPIO58
SPICS#
CIR_RX/GPIO40
CIR_RLC_TX/GPIO41
FSTCHG/SELIO#/GPIO50
BATT_CHGI_LED#/GPIO52
CAPS_LED#/GPIO53
BATT_LOW_LED#/GPIO54
SUSP_LED#/GPIO55
SYSON/GPIO56
VR_ON/XCLK32K/GPIO57
AC_IN/GPIO59
GND
GND
GND
GND
GND
+3VALW
R538
INVT_PWM <17>
EC_BEEP <29>
UWB_OFF# <27>
ACOFF <38>
0.01U_0402_25V7K
ECAGND
C812
1
2
SPI Device Interface
GPIO
SCL1/GPIO44
SDA1/GPIO45
SCL2/GPIO46
SDA2/GPIO47
C809
2
67
21
23
26
27
INVT_PWM/PWM1/GPIO0F
BEEP#/PWM2/GPIO10
FANPWM1/GPIO12
ACOFF/FANPWM2/GPIO13
DA Output
KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7
KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15
KSO16
KSO17
PM_SLP_S3#
6
PM_SLP_S5#
14
EC_SMI#
15
LID_SW#
16
ESB_CLK
17
ESB_DAT
18
BT_PWR#
19
KB_LED
25
FAN_SPEED1 28
VLDT_EN
29
E51_TXD
30
E51_RXD
31
ON/OFFBTN#
32
PWR_SUSP_LED34
NUM_LED#
36
<20> PM_SLP_S3#
<20> PM_SLP_S5#
<20> EC_SMI#
<33> LID_SW#
<34> ESB_CLK
<34> ESB_DAT
<26> BT_PWR#
<33> KB_LED
<4> FAN_SPEED1
<35> VLDT_EN
<27> E51_TXD
<27> E51_RXD
<34> ON/OFFBTN#
<34> PWR_SUSP_LED
<33> NUM_LED#
EC_SMB_CK1
EC_SMB_DA1
EC_SMB_CK2
EC_SMB_DA2
GA20/GPIO00
KBRST#/GPIO01
SERIRQ#
LFRAME#
LAD3
LAD2
LAD1
LAD0 LPC &
INVT_PWM
EC_BEEP
UWB_OFF#
ACOFF
EC_SMB_DA2
+3VL
R533
<18,37>
<18,37>
<6,33,34>
<6,33,34>
1
2
3
4
5
7
8
10
C808
AGND
R536
2
ECRST#
SYSON
GATEA20
KB_RST#
SERIRQ
LPC_FRAME#
LPC_AD3
LPC_AD2
LPC_AD1
LPC_AD0
C807
1000P_0402_50V7K
1
2
2
1000P_0402_50V7K
AVCC
VCC
VCC
VCC
VCC
VCC
VCC
U33
0.1U_0402_16V4Z
1
+3VS
9
22
33
96
111
125
<20> GATEA20
<20> KB_RST#
<19,33> SERIRQ
<19,33> LPC_FRAME#
<19,33> LPC_AD3
<19,33> LPC_AD2
<19,33> LPC_AD1
<19,33> LPC_AD0
C806
2
2
0.1U_0402_16V4Z
L25
2
1
0_0603_5%
SUSP#
0.1U_0402_16V4Z
1
1
2009/04/14
Deciphered Date
Title
Custom
Date:
ENE KB926C
Rev
0.2
LA-5381P
Sheet
E
32
of
46
SPI Flash (8Mb*1)
KSI[0..7]
Lid
KSI[0..7] <32,34>
KSO[0..17]
KSO[0..17] <32,34>
+3VL
+3VALW
1
<32>
SPI_CS#
SPI_CS#
SPI_CLK
<32> SPI_CLK
<32> EC_SO_SPI_SI
VCC
WP
HOLD
CS
VDD
SCLK
EC_SO_SPI_SI 5
SI
EC_SI_SPI_SO
SO
EC_SI_SPI_SO <32>
VOUT
LID_SW#
C647
10P_0402_50V8J
KB LED
(Please place the PAD under DDR DIMM)

+3VS
H1
+5VS_LED
Q32
AO3413_SOT23-3
@
5
4
<19,32> LPC_AD1
1
3
LPC_AD2
LPC_AD1
LPC_AD0
LPC_FRAME# 10
R587
10K_0402_5%
LPC_AD2 <19,32>
LPC_AD0 <19,32>
2
KSI1
R509
KSI6
KSI5
KSI0
KSI4
KSI3
KSI2
KSI7
KSO15
KSO12
KSO11
KSO10
KSO9
KSO8
KSO13
KSO7
KSO6
KSO14
KSO5
KSO3
KSO4
KSO0
KSO1
KSO2
1
300_0402_5%
CAPS_LED# <32>
+3VS
R634
22_0402_5%
<32>
KSO0
KSO3
KSO5
KSO14
KSO6
KSO7
KSO13
KSO8
KSO9
KSO10
KSO11
KSO12
KSO17
KSO15
KSO16
KSI7
2
R510
1
300_0402_5%
+3VS
KSI2
KSI3
KSI0
JBLG
1
2
3
4
GND
GND
Q51
2N7002_SOT23-3
2
G
KB_LED
3
@
KSO1
ACES_88170-3400
1
2
KSO2
KSO4
CLK_PCI_SIO2 <19,23>
DEBUG_PAD
C836
0.1U_0402_16V4Z
NUM_LED# <32>
CAPS_LED#
KSI4
<19,32> LPC_FRAME#
LPC_AD3
<19,32> LPC_AD3
PLT_RST# <11,14,19,25,27,28,31,32>
<19,32> SERIRQ
+5VS
PLT_RST#
6
2
7
0_0402_5%
1
R622
NUM_LED#
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
<32>
C645
0.1U_0402_16V4Z
1
C827
1
C810
1
C789
1
C790
1
C791
1
C792
1
C795
1
C796
1
C797
1
C798
1
C799
1
C800
1
C801
1
C802
1
C803
1
C804
1
C826
1
C823
1
C813
1
C825
1
C820
1
C821
1
C818
1
C819
1
C815
1
C817
1
C822
1
C824
JKB @
MX25L8005M2C-15G_SO8
LPC Debug Port
KSO16
KSO17
U34
APX9132ATI-TRL_SOT23-3
GND
GND
8
0.1U_0402_16V4Z
KEYBOARD CONN.
U46
C786
C639
1
2
3
4
5
6
+5VS_LED
1
@
KSI5
C860
0.1U_0402_16V4Z
KSI6
KSI1
CAPS_LED#
ACES_85201-0405N
@
22P_0402_50V8J
NUM_LED#
Change JBLG footprint to

ACES_85201-0405N_4P at PVT
SELF_TEST
3
4
6
8
3
5
7
Voutx
Vouty
Voutz
ST
PD
FS
+3VS_HDP
GSENSOR@
Vdd1
Vdd2
Rev
U9
GSENSOR@
VOUTX C636 1
0.033U_0402_16V7K
2
VOUTY C637 1GSENSOR@
0.033U_0402_16V7K
2
VOUTZ C635 1
0.033U_0402_16V7K
2
GSENSOR@
<6,32,34> EC_SMB_CK2
10
11
14
15
16
NC1
NC2
NC3
NC4
NC5
+3VS_HDP
1
13
GND1
GND2
TSH35TR_LGA16
+3VS
EC_SMB_CK2
SELF_TEST
P3_5/SSCK/SCL/CMP1_2
R689 @
2
1
GSENSOR@
R686 2
1 4.7K_0402_5%
GSENSOR@
R687 2
1 4.7K_0402_5%
P3_7/CNTR0#/SSO/TXD1
5
+3VS_HDP
GSENSOR@
R685 2
1 4.7K_0402_5%
0_0603_5%
+5VS
D38
2 GSENSOR@
+3VS_HDP
U55
2
1
1
2
+5VS
VOUT
GND
SHDN#
BP
2
C867 @
2
1
GSENSOR@
C866
1U_0402_6.3V4Z
<32>
HDPINT
HDPINT
+3VS_HDP
9
+3VS_HDP
SELF_TEST
A
7
10
13
0G-DET
SLEEP#
G-SELECT
ST
P1_3/KI3#/AN11/TZOUT
VSS/AVSS
P1_2/KI2#/AN10/CMP0_2
P4_2/VREF
P4_5/INT0#/RXD1
P1_7/CNTR00/INT10#
P3_3/TCIN/INT3#/SSI00/CMP1_0
P3_4/SCS#/SDA/CMP1_1
R5F211B4D34SP_LSSOP20
Reserve Freescale
@ C648 0.1U_0402_16V4Z
U66
2
1 VOUTX 2 XOUT
@ C642 0.1U_0402_16V4Z
2
1 VOUTY 3 YOUT
@ C641
0.1U_0402_16V4Z
2
1 VOUTZ 4 ZOUT
XOUT/P4_7
MODE
9
10
0.22U_0603_16V4Z
G9191-330T1U_SOT23-5
GSENSOR@
R692 2
1
1K_0402_5%
P1_4/TXD0
VCC/AVCC
GSENSOR@
VIN
P1_5/RXD0/CNTR01/INT11#
XIN/P4_6
7
GSENSOR@
R693 2
1 4.7K_0402_5%
C865
1U_0402_6.3V4Z
GSENSOR@
P1_6/CLK0/SSI01
RESET#
Change U55 to G9191-330T1U

1
11
HDPACT
<32>
U54
2
12
+3VS_HDP
C640
0.1U_0402_16V4Z
GSENSOR@ 2
R957
47K_0402_5%
GSENSOR@
12
13
G-Sensor
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
2
100P_0402_50V8J
14
HDPLOC
15
VOUTZ
1
R959
16
17
VOUTX
18
VOUTY
<32>
2
47K_0402_5%
GSENSOR@
+3VS_HDP
C631
0.1U_0402_16V4Z
GSENSOR@
19
20
EC_SMB_DA2
EC_SMB_DA2 <6,32,34>
GSENSOR@
C638
0.1U_0402_16V4Z
GSENSOR@
@
VDD
NC
NC
NC
NC
NC
1
8
11
12
14
VSS
Compal Secret Data
2008/04/14
Issued Date
2009/04/14
Deciphered Date
Title

SPI/LPC/PS2/MDC/FM/CIR
Custom
MMA7360LR2_LGA14
Date:
Rev
0.2
LA-5381P
Sheet
E
33
of
46
Power Button & PWR/B
Light Pipe Connector
Touch/B Connector
JLIGHT
JPOWER
+5VS
<32>
<32>
TP_CLK
TP_DATA
EC_SMB_CK2 <6,32,33>
EC_SMB_DA2 <6,32,33>
1
2
3
4
<32> TP_LED
ACES_85201-04051
@
ACES_85201-06051
@
TP_DATA
D20
4
ON/OFFBTN#
+5VS
VIN
@
ON/OFFBTN#
IO1
<32,33>
<32,33>
IO1
IO2 GND
TP_CLK
Caps Sensor Connector
CM1293A-02SR SOT143-4
Add ESD Diode for ESD 20090202

<32> CAP_INT#
<32> ESB_DAT
<32> ESB_CLK
<32> CAP_RST#
WL&BT LED
ON/OFFBTN# <32>
1
6
5
SMT1-05-A_4P
2
Vf=1.9V(typ),2.4V(max)
@
C646
0.1U_0402_16V4Z
Add ESD Diode for ESD 20090202

51_ON#
D74
<36>
2
300_0402_5%
R777
WL_BT_LED# <32>
R381
33_0402_5%
@
HT-110UD_1204
3
Q56B
TOP side
4
<32>
2N7002DW-T/R7_SOT363-6
EC_ON
C507
15P_0402_50V8J
@ 2
6
5
SMT1-05-A_4P
DC-IN LED
ACIN
<21,32,36>
R514
10K_0402_5%
1
For Debug
DC_IN
1
2
3
4
5
6
7
8
9
10
GND
GND
ACES_85201-1005N
R370
33_0402_5%
@
2
+5VS
SW6
1
L58 1
1
L59
JCS
1
2
3
4
5
6
2 FBMA-11-100505-301T_0402 7
2
8
FBMA-11-100505-301T_0402 9
10
11
12
+3VL
+5VALW
SW5
1
VIN
CM1293A-02SR SOT143-4
BOT side
1
2
3
4
G1
G2
ACES_85201-0405N
@
2N7002_SOT23-3
IO2 GND
KSI6
KSO0
Add at PVT
D19
Add Light Sensor at DVT

+3VS
Q57
2
G
1
2
3
4
5
6
L_LED#
ON/OFFBTN#
1
TP_CLK 2
TP_DATA 3
4
+5VS
JTOUCH
+3VS
POWER_ON_LED
1
2
3
4
5
6
7
8
1
2
3
4
5
6
GND
GND
C505
15P_0402_50V8J
@
1
Q56A
2N7002DW-T/R7_SOT363-6
WiMAX LED
+5VS
D75
1 WIMAX_LED_GND3
SUSPEND LED
Q156A
2N7002DW-T/R7_SOT363-6
WIMAX@
+3VALW
Q156B 2N7002DW-T/R7_SOT363-6
WIMAX@
HT-110NB5 1204 BLUE

WIMAX@
Change from +5VALW to +3VALW
WIMAX@
1
2
2
R778
300_0402_5%
LED_WIMAX# <27>
6
5
+5VS
LED/B Connector
WIMAX@
2 R819
1
10K_0402_5%
R506 @
WIMAX_LED_GND1
2
0_0402_5%
47K
Q29
JLED
<31> CR_LEDCON
<32> BATT_FULL_LED#
<32> BATT_LOW_LED#
SATA_LED# <21>
PWR_SUSP_LED <32>
DTA114YKAT146_SOT23-3
HDD LED
1
2
3
4
5
6
7
8
9
10
GND
GND
1
2
3
4
5
6
7
8
9
10
11
12
DC_IN
POWER_LED
SUSPEND_LED
HDD_LED
CR_LEDCON
BATT_FULL_LED#
BATT_LOW_LED#
10K
2 R779
1
10K_0402_5%
+5VS
HDD_LED
6
5
+5VALW
+5VS
Change WIMAX LED to Blue
SUSPEND_LED
1
300_0402_5%
2
R770
1
Q31A
2N7002DW-T/R7_SOT363-6
4
Q31B 2N7002DW-T/R7_SOT363-6
ACES_85201-1005N
@
POWER LED
Satellite LED
2
120_0402_5%
1
R780
2
120_0402_5%
1
R776
1
R516
2 POWER_ON_LED
120_0402_5%
1
R544
2 POWER_LED
120_0402_5%
2
G
+5VS
+5VS
Q24
2N7002_SOT23-3
HT-SV116BP_WHITE
D5
D6
H22
H23
H43
H42
H45
H44
H36
H38
H39
H41
H40
H18
H11
H16
@
H_2P7N
@
H_3P0
@
H_3P0
@
H_3P7
@
H26
H27
H_4P8X3P8
H_4P8X3P8
H_1P2
@
@
@
H34
H_1P2
@
H_3P0
@
H25
H_3P0
@
H24
H_3P0
@
H19
H_3P0
@
H15
H_3P0
@
H14
H_3P0
@
H13
H_3P0
@
H10
H_3P0
@
H7
H_3P0
@
H6
H_3P0
@
H5
2008/04/14
Issued Date
H_3P8
@
FD3
@
FD4
@
Compal Secret Data
H2
FD2
@
H_4P0X3P0N
@
H_3P0N
@
H_3P3
@
H_3P3
@
H_1P2
@
H_1P2
@
H_1P2
@
H9
H_1P2
@
H8
H_1P2
@
H_1P2
@
H_3P8
@
H4
H_1P2
@
H3
H_1P2
@
H_3P7
@
H_3P7
@
FD1
H20
LOGO_LED <32>
H21
HT-SV116BP_WHITE
2009/04/14
Deciphered Date
Title
Custom
Date:

LED/LID/PB/FB/SCREW HOLE
Rev
0.2
LA-5381P
Sheet
E
34
of
46
1000P_0402_50V7K
2 R152
1
750K_0402_1%
+VSB
+3VALW TO +3V_LAN
Q17A
2 SUSP
+3VALW
2N7002DW-T/R7_SOT363-6
1
Inrush current = 0A
For ESD
R17
100K_0402_5%
C201
0.1U_0402_16V7K
1
R19
1
<32> WOL_EN#
+1.2VALW TO +1.2V_HT
Q38
2
47K_0402_5%
Change R19 to 47K
1
+1.8V
+1.2V_HT
+1.8VS
+1.2VALW
Inrush current = 0A
1
Q4
8
7
6
5
1
2
3
Q11
C848
C862
C679
4.7U_0805_10V4Z
@
4.7U_0805_10V4Z
C680
1U_0402_6.3V4Z
4
2
C849
Q27A
SUSP
2 R233
1
330K_0402_5%
C837
+VSB
Q12A
2
Reserve for ESD
VLDT_EN#
+5VALW
2N7002DW-T/R7_SOT363-6
C879
2
+5VALW
1
C881
2
+5VS
+5VS
C882
2
C883
2
+5VS
1
C884
2
0.1U_0402_16V7K
2
+5VS
0.1U_0402_16V7K
2
+5VS
C878
+5VS
0.1U_0402_16V7K
C877
0.1U_0402_16V7K
C875
0.1U_0402_16V7K
C874
+5VALW
0.1U_0402_16V7K
C873
+3VS
0.1U_0402_16V7K
C870
+5VALW
0.1U_0402_16V7K
C869
+5VALW
0.1U_0402_16V7K
C868
+3VALW
0.1U_0402_16V7K
C863
+3VALW
0.1U_0402_16V7K
+3VALW
0.1U_0402_16V7K
+3VALW
2N7002DW-T/R7_SOT363-6
0.1U_0402_16V7K
R808
10M_0402_5%
IRF8113PBF_SO8
@
R367
1K_0402_5%
0.01U_0402_25V7K
+VSB
1
R809
10M_0402_5%
R138 2
1
750K_0402_1%
C847
0.1U_0402_16V7K
0.01U_0402_25V7K
1.8VS_ENABLE
4.7U_0805_10V4Z
IRF8113PBF_SO8
C842
4.7U_0805_10V4Z
1
2
3
1
1
1U_0402_6.3V4Z
1U_0402_6.3V4Z
C846
8
7
6
5
C841
10U_0805_10V6K
AO3413_SOT23
C203
0.01U_0402_25V7K
Inrush current = 0A
1
PJ29
JUMP_43X79
@
+3V_LAN
+1.8V TO +1.8VS
Vgs=-4.5V,Id=3A,Rds<97mohm
2
+3VALW
@ C876
@C876
C834
R556
10M_0402_5%
RUNON
C840
C864
1 C838
C844 4.7U_0805_10V4Z
4.7U_0805_10V4Z
RUNON
0.1U_0402_16V7K
0.1U_0402_16V7K
2
RUNON
SI4800BDY_SO8
1U_0402_6.3V4Z
SI4800BDY_SO8
1
C845
1U_0402_6.3V4Z
1
2
3
4
S
S
S
G
Inrush current = 0A
1
C839
D
D
D
D
0.01U_0402_25V7K
1
2
3
4
S
S
S
G
Q14
8
7
6
5
C880
4.7U_0805_10V4Z
D
D
D
D
+3VS
8
7
6
5
+3VALW
0.1U_0402_16V7K
1
+5VS
4.7U_0805_10V4Z
1
1
C833
C835
Q35
+3VALW TO +3VS
+5VALW TO +5VS
+5VALW
Discharge circuit
3
+5VL
+1.8VS
+1.2V_HT
+1.8V
+5VL
+5VL
SUSP
2
2
<42>
SUSP
VLDT_EN#
<25,32,41> SYSON
Q26A
2
<25,29,32,38,40> SUSP#
<32>
VLDT_EN
Q44
VLDT_EN 2
G
2N7002DW-T/R7_SOT363-6
2N7002DW-T/R7_SOT363-6
Q26B
2
G
Q41
S
2N7002_SOT23-3
2N7002_SOT23-3
Q12B
VLDT_EN#5
SYSON#
R597
100K_0402_5%
SYSON#
2N7002DW-T/R7_SOT363-6
Q27B
SUSP
R596
100K_0402_5%
2
G
Q46
S
2N7002_SOT23-3
SYSON#
R595
100K_0402_5%
2N7002DW-T/R7_SOT363-6
<42>
D
SUSP
2
1
R284
470_0805_5%
R280
470_0805_5%
R279
470_0805_5%
R239
470_0805_5%
+5VS
+0.9V
+3VS
2
R293
470_0805_5%
R294
470_0805_5%
2
G
Q52
S
2N7002_SOT23-3
Compal Secret Data
2008/04/14
Issued Date
2009/04/14
Deciphered Date
Title
Custom
A
SUSP
2
G
Q50
S
2N7002_SOT23-3
SUSP
2
G
Q49
S
2N7002_SOT23-3
SYSON#
1
2N7002DW-T/R7_SOT363-6
Q17B
SUSP
R292
470_0805_5%
3 1
+1.1VS
+1.5VS
R288
470_0805_5%
Date:
DC/DC Circuits
Rev
0.2
LA-5381P
Sheet
E
35
of
46
VIN
DC_IN_S2
PR1
1M_0402_1%
1
2
VIN
1
1
N1
PR2
5.6K_0402_5%
PACIN
<38>
LM393DG_SO8
PD1
GLZ4.3B_LL34-2
PR7
10K_0402_1%
VIN
1
PR8
10K_0402_1%
PC6
.1U_0402_16V7K
PACIN
1
1
1
1
2
PC5
0.068U_0402_10V6K
<21,32,34>
PU1A
@ SINGA_2DW -0005-B03
ACIN
PR5
22K_0402_1%
1
2
PR6
20K_0402_1%
PR4
10K_0402_1%
1
2
PR3
84.5K_0402_1%
PC4
100P_0402_50V8J
PC3
1000P_0402_50V7K
PC2
100P_0402_50V8J
PC1
1000P_0402_50V7K
10A_125V_451010MRL
2
2
PJP1
DC_IN_S1
VS
PL1
SMB3025500YA_2P
1
2
PF1
DC301001M80
RTCVREF
3.3V
PD2
RLS4148_LL34-2
Vin Detector
PR9
68_1206_5%
PQ1
TP0610K-T1-E3_SOT23-3
N1
VS
2
PR12
1K_1206_5%
VIN
2
PR15
22K_0402_1%
51_ON#
N3
RLS4148_LL34-2
3.3V
3
OUT
IN
N2
PBJ1
G920AT24U_SOT89-3
PU2
+RTCBATT
PR21
100K_0402_1%
1
2
+RTCBATT
VL
PR22
2.2M_0402_5%
2
1
PR18
499K_0402_1%
@ MAXEL_ML1220T10
+3VALW
+5VALW
+1.2VALW P
+NB_COREP
+VSB
2
+1.2VALW
+3VL
PR27
47K_0402_1%
2
2
1
G
PQ2
SSM3K7002FU_SC70-3
PACIN
@ JUMP_43X39
Precharge detector
15.97V/14.84V FOR
ADAPTOR
(100mA,40mils ,Via NO.= 2)
+NB_CORE
+5VALW P
PQ3
DTC115EUA_SC70-3
PJ11
4
+VDDNB
+2.5VSP
+2.5VS
@ JUMP_43X39
(0.5A,20mils ,Via NO.=1)

+1.5VSP
+0.9V
@ JUMP_43X79
(2A,80mils ,Via NO.= 4)
A
Compal Secret Data
PJ13
PJ12
PJ6
+3VLP
PC11
1000P_0402_50V7K
@ JUMP_43X118
@ JUMP_43X118
(7.0A,280mils ,Via NO.=14)

OCP(min)=8.45A
(3A,120mils ,Via NO.=6)
+0.9VP
PR24
499K_0402_1%
PR26
191K_0402_1%
PJ10
+5VL
PJ9

+VDDNBP
@ JUMP_43X118
@ JUMP_43X39
(5A,200mils ,Via NO.=10)

OCP(min)=8.51A
PJ8
RTCVREF
@ JUMP_43X118
PR23
10K_0402_1%
PJ7

OCP(min)=7.9A
+VSBP
@ JUMP_43X39

OCP(min)=8.87A
PJ5
PJ3
VL
@ JUMP_43X118

OCP(min)=7.7A
2
+1.8V
@ JUMP_43X118
+5VALW P
@ JUMP_43X118
PJ4
2
1 1
PJ1
+3VALW P
PJ2
+1.8VP
ACON
EN0
<38>
LM393DG_SO8
<39>
PU1B
SP093MX0000
PD5
RB715F_SOT323-3
1U_0805_25V4Z
PC13
1000P_0402_50V7K
PC10
PC12
1000P_0402_50V7K
GND
PC9
10U_0805_10V4Z
+CHGRTC
PR20
560_0603_5%
1
2
B+
PR16
1K_1206_5%
PR17
200_0603_5%
PR19
560_0603_5%
1
2
PR14
1K_1206_5%
RTC Battery
RTCVREF
PD4
2
<34>
1
PC8
0.1U_0603_25V7K
PC7
0.22U_1206_25V7K
PR13
100K_0402_1%
High 18.384 17.901 17.430

Low 17.728 17.257 16.976
PR10
68_1206_5%
PR11
200_0603_5%
CHGRTCP 1
2
PD3
RLS4148_LL34-2
1
1
BATT+
+1.5VS
@ JUMP_43X79
Issued Date
2008/10/13
Deciphered Date
2009/10/13
(2.0A,80mils ,Via NO.=4)

B
Title

DCIN/DECTOR
Size
Document Number
Rev
0.2
LA-5381P
Date:
Sheet

D
36
of
46
PH1 under CPU botten side :

CPU thermal protection at 96 degree C
Recovery at 60 degree C
VMB
VL
PL2
SMB3025500YA_2P
1
2
ENTRIP1
<39>
VL
1
3
1
ENTRIP2
<6,39>
PD7
RLS4148_LL34-2
LM393DG_SO8
VL
PQ5
SSM3K7002FU_SC70-3
PR38
100K_0402_1%
1
1
2
PR40
100K_0402_1%
2
PQ4
SSM3K7002FU_SC70-3
2
G
PR39
1K_0402_1%
PC18
1000P_0402_50V7K
1
2
PR37
13.7K_0402_1%
+3VLP
PC17
0.22U_0805_16V7K
PR36
6.49K_0402_1%
2
1
PU4A
TM_REF1
2
G
1
2
PR30
47K_0402_1%
PR32
47K_0402_1%
1
2
PR33
13.7K_0402_1%
1
2
PC16
0.1U_0603_25V7K
PR35
100_0402_1%
1
PR34
100_0402_1%
PH1
100K_0603_1%_TH11-4H104FT
2
@
PR31
1K_0402_1%
@ OCTEK_BTJ-09HA1G
PC14
1000P_0402_50V7K
PC15
0.01U_0402_25V7K
+3VLP
BATT+
2
PR29
47K_0402_1%
2
PR28
1K_0402_1%
1
EC_SMDA
EC_SMCA
GND
GND
GND
GND
BATT_S1
10
11
12
13
1
2
3
4
5
6
7
8
9
1
2
3
4
5
6
7
8
9
VL
PF2
15A_65V_451015MRL
1
2
PJP2
PC129
0.1U_0402_25V6
BATT_TEMPA <32>
EC_SMB_DA1 <18,32>
EC_SMB_CK1 <18,32>
PH2 near main Battery CONN :

BAT. thermal protection at 90 degree C
Recovery at 53 degree C
VL
1
2
1
O
-
4
PC21
0.22U_0805_16V7K
PU4B
LM393DG_SO8
PD8
RLS4148_LL34-2
PR46
16.9K_0402_1%
2
PR48
0_0402_5%
2
PQ7
SSM3K7002FU_SC70-3
2
G
PC22
.1U_0402_16V7K
1
POK
5
TM_REF1
2
2
1
2
PR44
13.7K_0402_1%
1
2
PR47
100K_0402_1%
<39,40>
PR42
47K_0402_1%
1
2
PR45
22K_0402_1%
1
2
PR41
47K_0402_1%
PH2
100K_0603_1%_TH11-4H104FT
PC20
0.1U_0603_25V7K
VL
PC19
0.22U_1206_25V7K
2
1
PR43
100K_0402_1%
+VSBP
B+
VL
2
PQ6
TP0610K-T1-E3_SOT23-3
Compal Secret Data
Issued Date
Deciphered Date
2009/10/13
Title
Size
A
2008/10/13
Date:

BATTERY CONN / OTP
Document Number
Rev
0.2
LA-5381P
Sheet
D
37
of
46
PQ10
AO4407A_SO8
B+
4
4
PC26
4.7U_1206_25V6K
2
1
2
1
ACOFF
PR56
200K_0402_1%
1
2
ICOMP
CSIN
20
VCOMP
CSIP
19
ICM
PHASE
18
LX_CHG
VREF
UGATE
17
DH_CHG
5
6
7
8
PC32
0.047U_0603_16V7K
1
2
PR61
20_0603_5%
2
1
PR62
20_0603_5%
PC36
0.1U_0603_25V7K
1
2
21
1SS355_SOD323-2
D
CSOP
PC31
0.1U_0603_25V7K
PQ18
AO4466_SO8
CSOP
CSON
CSON
CELLS
PR60
20_0603_5%
1
2
VIN
PD12
EN
2 PACIN
G
PQ17
SSM3K7002FU_SC70-3
PR64
2.2_0603_5%
PL3
PR66
10U_LF919AS-100M-P3_4.5A_20% 0.02_2512_1%
1
2CHG
1
4
BATT+
16
10
ACLIM
VDDP
15
11
VADJ
LGATE
14
GND
PGND
13
12
PQ20
AO4466_SO8
DL_CHG
26251VDD
PD13
RB751V-40TE17_SOD323-2
6251VDDP
PR73
4.7_0603_5%
PC43
4.7U_0805_6.3V6K
PC41
10U_1206_25V6M
2
1
BOOT
PC39
0.1U_0603_25V7K
BST_CHGA 2
1
PC40
10U_1206_25V6M
2
1
CHLIM
PR69
2.2_0603_5%
BST_CHG 1
2
5
6
7
8
3
2
1
PC28
2.2U_0603_6.3V6K
2
1
PR72
26.7K_0402_1%
2
6251aclim
PR70
8.25K_0402_1%
6251VREF
1
2
ISL6251AHAZ-T_QSOP24
PR74
15.4K_0402_1%
1
2
1
<32> CHGVADJ
1SS355_SOD323-2
PC128
PR170
680P_0603_50V7K 4.7_1206_5%
PR71
120K_0402_1%
6251VREF
ACOFF
23
22
ADP_I
VIN
PD9
PQ14
DTC115EUA_SC70-3
ACSET ACPRN
IREF
<32>
DCIN
PC30
0.1U_0603_25V7K
2
1
PC38
.1U_0402_16V7K
PR68
<32>
154K_0402_1%
PR65
47K_0402_1%
1
2
VDD
DCIN
24
1
2
@ PC37
100P_0402_50V8J
1
2
SUSP# <25,29,32,35,40>
0.01U_0402_25V7K
PU5
1
6.81K_0402_1%
2
PC42
0.01U_0402_25V7K
ACOFF
PR63
PR52
10K_0402_1%
RB715F_SOT323-3
6800P_0402_25V7K
2
2 1
PC35
1
2
8
7
6
5
PR51
47K_0402_1%
1
2
FSTCHG
6251_EN
1
2
3
PD10
PQ19
SSM3K7002FU_SC70-3
3
<32>
1
2
2
1
PR67
22K_0402_5%
1
2
PQ21
DTC115EUA_SC70-3
PR58
100K_0402_1%
1
3
ACON
2
1
1
PC34
1
PQ13
DTC115EUA_SC70-3
PR55
100K_0402_1%
2
1
@ PC33
680P_0402_50V7K
1
2
CSON
PACIN
PC29
.1U_0402_16V7K
2
G
@ PQ45
AO4407A_SO8
CSIN
JUMP_43X118
6251VDD
PR57
10K_0402_1%
2
1
PR59
150K_0402_1%
PQ16
SSM3K7002FU_SC70-3
DCIN
PR54
100K_0402_1%
2
G
CHG_B+
2
PC24
5600P_0402_25V7K
PD11
1SS355_SOD323-2
1
2
PQ15
DTC115EUA_SC70-3
PACIN
8
7
6
5
PJ14
2
1
2
P3
<32> FSTCHG
<36>
B+
PQ12 TP0610K-T1-E3_SOT23-3 PR173

10_0603_5%
3
1
1
2
PC27
0.1U_0603_25V7K
<36>
PR49
0.015_2512_1%
4
CSIP
PR50
200K_0402_1%
PQ11
DTA144EUA_SC70-3
PR53
47K_0402_1% 2
3
2
1
8
7
6
5
P3
1
2
3
PC25
4.7U_1206_25V6K
2
1
PQ9
AO4407A_SO8
1
2
3
PC23
4.7U_1206_25V6K
2
1
P2
8
7
6
5
PQ8
AO4407A_SO8
VIN
1
2
3
PR75
31.6K_0402_1%
VIN
CC=0.25A~3A
PR171
309K_0402_1%
CHGVADJ=(Vcell-4)/0.10627
Vcell
CHGVADJ
IREF=0.254V~3.048V
4V
VCHLIM need over 95mV
4.2V
1.882V
4.35V
3.2935V
PR175
10K_0402_1%
1
2
IREF=1.016*Icharge
PR172
47K_0402_1%
PC130
.1U_0402_16V7K
@ PD14
GLZ4.3B_LL34-2
ADP_V <32>
0V
Iada=0~3.947A(75W) CP= 92%*Iada; CP=3.65A
CP mode
Vaclim=2.39*(20K//152K/(20K//152K+24K//152K))=1.09986V
CELLS
Iinput=(1/0.02)((0.05*Vaclm)/2.39+0.05)
where Vaclm=1.09986V, Iinput=3.65A
CELL number
VDD
GND
Float
Issued Date
Compal Secret Data
90W Iadapter=0~4.74A PR49=0.015 ohm CP=4.357A PR70=53.6K PR72=20K
120W Iadapter=0~6.32A PR49=0.015

ohm CP=5.81A PR70=8.25K PR72=26.7K
2008/10/13
Deciphered Date
2009/10/13
Title
Custom
Date:
CHARGER
Rev
0.2
LA-5381P
Sheet

D
38
of
46
PC44
0.22U_0603_10V7K
2VREF_51125
B++
PR76
13K_0402_1%
1
2
PR77
30K_0402_1%
1
2
PR78
20K_0402_1%
1
2
PR79
19.1K_0402_1%
1
2
B++
21
UG_5V
20
LX_5V
LG_3V
12
19
LG_5V
5
6
7
8
@
2
B++
2VREF_51125
PC56
4.7U_0805_10V6K
@ PR88
0_0402_5%
VL
1
+
2
PC131
0.1U_0402_25V6
PC53
220U_6.3VM_R15
1
2
1
2
3
2
1
PR85
4.7_1206_5%
4
TPS51125RGER_QFN24_4X4
+5VALWP
PC55
680P_0603_50V7K
PQ25
AO4712_SO8
VCLK
18
VIN
VREG5
17
13
PR86
499K_0402_1%
1
2
16
EN0
DRVL1
GND
DRVL2
PL5
4.7UH_SIL1045R-4R7PF_6.3A_30%
1
2
5
6
7
8
LL1
PC48
10U_1206_25V6M
DRVH1
LL2
<6,37>
PQ27
SSM3K7002FU_SC70-3
2
G
VL
1
2
G
DRVH2
11
PQ26
SSM3K7002FU_SC70-3
10
LX_3V
PR87
100K_0402_1%
ENTRIP2
UG_3V
2
<37>
PC47
1000P_0402_50V7K
ENTRIP1
PR83
PC51
0_0603_1% .1U_0402_16V7K
BST_5V 1
2 1
2
2
1
PC57
0.1U_0603_25V7K
ENTRIP1
2
VFB1
VREF
22
B+
TONSEL
23
VBST1
EN0
PGOOD
VBST2
1
2
3
VREG3
<37,40>
15
8
7
6
5
<36>
POK
SKIPSEL
1
2
3
1
PC50
.1U_0402_16V7K
PQ24
AO4712_SO8
PC54
680P_0603_50V7K
2
1
PC52
220U_6.3VM_R15
Ipeak=5A
Imax=3.5A
F=305KHz
Total Capacitor 220uF,
ESR 15mohm
PR84
4.7_1206_5%
2
1
PL4
4.7UH_SIL1045R-4R7PF_6.3A_30%
1
2
24
BST_3V
14
PR82
2 1
2
0_0603_1%
VO1
PQ23
AO4466_SO8
3
2
1
VO2
PR81
150K_0402_1%
2
ENTRIP1
7
4
+3VALWP
P PAD
25
VFB2
PU6
PC49
4.7U_0805_10V6K
8
7
6
5
1
2
PQ22
AO4466_SO8
PR80
150K_0402_1%
1
2
ENTRIP2
+3VLP
1
PC46
10U_1206_25V6M
@ JUMP_43X118
PC45
1000P_0402_50V7K
B+
ENTRIP2
PJ15
Ipeak=5A
Imax=3.5A
F=245KHz
ESR 15mohm
PQ28
SSM3K7002FU_SC70-3
PR90
100K_0402_1%
2
G
PC58
0.01U_0402_16V7K
2
1
PR91
49.9K_0402_1%
VS
PR89
100K_0402_1%
Compal Secret Data
Issued Date
Deciphered Date
2009/10/13
Title
Size
A
2008/10/13
Date:

3VALW/5VALW
Document Number
Rev
0.2
LA-5381P
Sheet
D
39
of
46
PL14
HCB4532KF-800T90_1812
1
2
PR92
255K_0402_1%
1
2
PR97
15.4K_0402_1%
DL_1.1V
DRVL
PC60
4.7U_0805_25V6-K
TPS51117RGYR_QFN14_3.5x3.5
TP
PGND
PGOOD
@ PC67
47P_0402_50V8J
1
2
PC64
1U_0603_10V6K
PQ30
AO4712_SO8
PC63
330U_4V_M
10
9
V5DRV
GND
+5VALW
PR95
4.7_1206_5%
14
VFB
12
11
LX_1.1V
LL
TRIP
PC65
4.7U_0805_10V6K
PC66
680P_0603_50V7K
V5FILT
0.1U_0603_25V7K
5
6
7
8
VOUT
3
2
1
DRVH
DH_1.1V
13
TON
VBST
15
EN_PSV
2
PR96
422_0603_1%
1
2
PL6
1.8UH_1164AY-1R8N=P3_9.5A_30%
1
2
PC62
BST_1.1V
+5VALW
PU7
3
2
1
PR94
0_0603_1%
1
2
@PC61
@PC61
.1U_0402_16V7K
B+
PR93
0_0402_5%
1
2
1
<25,29,32,35,38> SUSP#
PQ29
AO4466_SO8
PC59
4.7U_0805_25V6-K
1
2
5
6
7
8
PC137
1000P_0402_50V7K
1.1V_B+
+1.1V
+NB_COREP
Ipeak=7A
Imax=4.9A
F=315KHz
ESR 7.5mohm
1
+
2
@
C
PR98
9.76K_0402_1%
1
2
PR100
255K_0402_1%
1
2
PR102
0_0603_1%
1
2
V5DRV
DRVL
DL_1.2V
+5VALW
PQ32
AO4712_SO8
10
2
PR105
15.4K_0402_1%
PC138
220U_25V_M
1
2
PC69
4.7U_0805_25V6-K
PC68
4.7U_0805_25V6-K
1000P_0402_50V7K
1
2
@
4
1
PGND
8
GND
@ PC76
47P_0402_50V8J
1
2
PC73
1U_0603_10V6K
PGOOD
PC72
330U_D2_2.5VY_R15M
VFB
LX_1.2V
12
11
TRIP
PR103
4.7_1206_5%
14
TP
LL
V5FILT
VOUT
0.1U_0603_25V7K
PC75
4.7U_0805_10V6K
DH_1.2V
13
5
6
7
8
DRVH
3
2
1
PR104
422_0603_1%
1
2
BST_1.2V
+5VALW
TON
PL7
1.8UH_1164AY-1R8N=P3_9.5A_30%
1
2
PC71
VBST
15
PU8
EN_PSV
PC70
@.1U_0402_16V7K
B+
1
+
2
PC74
680P_0603_50V7K
POK
PL15
HCB4532KF-800T90_1812
1
2
PR101
0_0402_5%
1
2
1
<37,39>
1.2V_B+
3
2
1
PC136
PQ31
AO4466_SO8
1000P_0402_50V7K
5
6
7
8
PC135
PR99
20.5K_0402_1%
1
+
2
Ipeak=5A
Imax=3.5A
F=315KHz
ESR 15mohm
PR106
12.4K_0402_1%
1
2
+1.2VALWP
PR107
20.5K_0402_1%
A
Compal Secret Data
2008/10/13
Issued Date
Title
Size
5
2009/10/13
Deciphered Date
Date:

NB_COREP/1.2VALWP
Document Number
Rev
0.2
LA-5381P
Sheet
1
40
of
46
PL16
HCB4532KF-800T90_1812
1
2
PR108
255K_0402_1%
1
2
PGOOD
14
DL_1.8VP
PQ34
AO4712_SO8
1
2
PC78
4.7U_0805_25V6-K
PC77
4.7U_0805_25V6-K
@
4
1
DRVL
TP
PGND
GND
2
@ PC84
47P_0402_50V8J
1
2
PC82
1U_0603_10V6K
+5VALW
V5DRV
10
2
PR113
15.4K_0402_1%
PR111
4.7_1206_5%
VFB
12
11
LX_1.8VP
LL
TRIP
V5FILT
0.1U_0603_25V7K
PC85
4.7U_0805_10V6K
PC83
680P_0603_50V7K
VOUT
5
6
7
8
DH_1.8VP
13
DRVH
+1.8VP
1
+
2
Ipeak=8A
Imax=5.6A
F=315KHz
ESR 15mohm
3
2
1
TON
VBST
15
EN_PSV
2
PR112
422_0603_1%
1
2
PL8
1.8UH_1164AY-1R8N=P3_9.5A_30%
1
2
PC80
BST_1.8VP
+5VALW
PU9
3
2
1
PR110
0_0603_1%
1
2
PC79
@.1U_0402_16V7K
B+
PR109
0_0402_5%
1
2
1
<25,32,35> SYSON
PQ33
AO4466_SO8
5
6
7
8
PC134
1000P_0402_50V7K
1.8V_B+
PC81
220U_6.3VM_R15
PR114
28.7K_0402_1%
1
2
PR115
20.5K_0402_1%
PU10
APL5508-25DC-TRL_SOT89-3
PJ19
1
@ JUMP_43X39
IN
OUT
1
2
PC86
1U_0603_10V6K
+2.5VSP
GND
1
+3VS
PC87
4.7U_0805_6.3V6K
Compal Secret Data
2008/10/13
Issued Date
Title
Size
5
2009/10/13
Deciphered Date
Date:

1.8VP/2.5VS
Document Number
Rev
0.2
LA-5381P
Sheet
1
41
of
46
+3VS
D
PJ20
@ JUMP_43X79
VIN
VCNTL
6
5
GND
NC
VREF
NC
VOUT
NC
TP
+5VALW
PU11
1
PC89
1U_0603_6.3V6M
PC88
4.7U_0805_6.3V6K
PR116
1.15K_0402_1%
APL5331KAC-TRL_SO8
+1.5VSP
PC90
PQ35
.1U_0402_16V7K
SSM3K7002FU_SC70-3
1
PC91
10U_0805_6.3V6M
@ PC92
@PC92
.1U_0402_16V7K
PR118
0_0402_5%
PR117
D 1K_0402_1%
2
G
1
1
SUSP
<35>
PJ21
@ JUMP_43X79
+1.8V
VIN
VCNTL
GND
NC
VREF
NC
VOUT
NC
6
5
+3VALW
7
2
PR119
1K_0402_1%
PC93
4.7U_0805_6.3V6K
PU12
1
TP
PC94
1U_0603_6.3V6M
8
9
+0.9VP
PC95
.1U_0402_16V7K
S PQ36
SSM3K7002FU_SC70-3
@ PC97
.1U_0402_16V7K
PR121
1K_0402_1%
PC96
10U_0805_6.3V6M
2
G
SYSON#
<35>
APL5331KAC-TRL_SO8
PR120
0_0402_5%
1
2
Compal Secret Data
2008/10/13
Issued Date
Title
Size
5
2009/10/13
Deciphered Date
Date:

0.9VP/1.5VSP
Document Number
Rev
0.2
LA-5381P
Sheet
1
42
of
46
PR123
2_0603_5%
1
2
UGATE_NB
COMP0
28
27
PHASE1
26
UGATE1
25
BOOT1
PC114
1U_0603_16V6K
PR162
1K_0402_5%
2
1
PR163
2
PC126
2
1
UGATE1
3
2
1
1
PC118
680P_0603_50V7K
PR156
3.65K_0402_1%
PC119
2
1
0.1U_0603_16V7K
2
PR159
47K_0402_1%
PC125
1000P_0402_50V7K
@
@ PR166
2
PR155
4.7_1206_5%
1 2
+CPU_CORE_1
@
2
1
1 2
3
2
1
@ PR167
6.81K_0402_1%
2
1
PC127 @
2
1
54.9K_0402_1% 1200P_0402_50V7K
1
1
@
PR168
36.5K_0402_1%
PR169
36.5K_0402_1%
Compal Secret Data
2008/10/13
2009/10/13
Deciphered Date
Title
Issued Date
Custom
A
VW1
COMP1
PR165
1K_0402_5%
2
1
54.9K_0402_1% 1200P_0402_50V7K
PR147
47K_0402_1%
PL12
0.36UH_PCMC104T-R36MN1R17_30A_20%
@ PQ43
PC113
2
1
PC117
0.22U_0603_10V7K
PR157
0_0402_5%
1 VSEN1
+CPU_CORE_0
2
1
@ PR174
10K_0402_5%
PC124
180P_0402_50V8J
0.1U_0603_16V7K
PC115
10U_1206_25V6M
2
1
49
PQ42
TPCA8023-H_SO8
PR151
0_0603_1%
BOOT1 1
2 1
DIFF_1
PR164
6.81K_0402_1%
2
1
PC110
10U_1206_25V6M
2
1
LGATE0
PC112
680P_0603_50V7K
PHASE1
PR161
PC123
255_0402_1% 4700P_0402_25V7K
FB_1
2
1 2
1
@
@
CPU_B+
1RTN1
PR152
0_0402_5%
PC122
1000P_0402_50V7K
ISN1
ISN0
LGATE1
29
LGATE1
PC121
180P_0402_50V8J
+CPU_CORE_1
PR143
3.65K_0402_1%
ISP0
30
3
2
1
LGATE0
31
2
1
10_0402_5%
@ PR158
ISP1
VW0
+5VS
PR141
4.7_1206_5%
PQ44
TPCA8028-H_SOP-ADVANCE8-5
DIFF_0
PR160
PC120
255_0402_1% 4700P_0402_25V7K
FB_0
2
1 2
1
PJ24
3
2
1
4
TP
ISN1
24
ISN1
ISP1
23
@ PQ40
3
2
1
+CPU_CORE_1
PC111
0.22U_0603_10V7K
PL11
0.36UH_PCMC104T-R36MN1R17_30A_20%
2
PR154
+1.8V
PR153
10_0402_5%
1
2
10_0402_5%
ISP1
22
VW1
COMP1
BOOT1
21
FB1
20
19
18
17
ISP0
13
VDIFF1
UGATE1
VSEN1
PHASE1
COMP0
RTN1
FB0
32
PR138
0_0603_1%
BOOT0 1
2 1
PQ41
PGND1
PR149
0_0402_5%
2
1 VSEN0
0_0402_5%
2 PR150 1 RTN0
PC109
10U_1206_25V6M
2
1
5
LGATE1
VDIFF0
ISP0
ISN0
3
2
1
PVCC
ISL6265HRTZ-T_QFN48_6X6
OCSET
@PR148
@
PR148
2
1
10_0402_5%
UGATE0
LGATE0
VW0
PQ39
TPCA8023-H_SO8
ENABLE
RBIAS
<6>
PGND0
12
1 2
3
2
1
SVC
PJ23
2
+CPU_CORE_0
2
PHASE0
1
UGATE0
33
11
37
34
PHASE0
10
UGATE_NB
39
UGATE0
SVD
38
PWROK
PHASE_NB
PGND_NB
LGATE_NB
40
41
42
RTN_NB
OCSET_NB
44
45
43
VSEN_NB
FSET_NB
BOOT0
+CPU_CORE_0
FB_NB
35
4
1
COMP_NB
46
47
VCC
VIN
36
BOOT0
PR144
0_0402_5%
PR146
4.02K_0402_1%
2
1
BOOT_NB
PGOOD
RTN0
VR_ON
PR145
113K_0402_1%
2
1
1
PR142
0_0402_5%2
OFS/VFIXEN
VSEN0
<32>
ISL6265_PWROK
2
@ JUMP_43X118
PHASE0
16
CPU_SVD
CPU_SVC
3
2
1
<6>
CPU_VDDNB_RUN_FB_L
BOOT_NB
15
<6>
<6>
2
1
2
48
PU13
ISN0
<20,32> SB_PWRGD
PJ22
PC106
220U_D2_4VM
@ JUMP_43X118
@ PR136
10_0402_5%
2
@ PR139 100K_0402_5%
2
PR140 100K_0402_5%
+
@PC107
@
PC107
680P_0603_50V7K
UGATE_NB
1
PR133
0_0402_5%
14
@ JUMP_43X118
2
VGATE
PQ38
AO4712_SO8
CPU_B+
1
2
<32>
<6,19> H_PWRGD
+VDDNBP
LGATE_NB
@ PR135
10K_0402_1%
@PR126
@
PR126
4.7_1206_5%
PHASE_NB
@ PR132
105K_0402_1%
@ PR137
105K_0402_1%
PC133
1000P_0402_50V7K
PHASE_NB
PR134
105K_0402_1%
PC132
1000P_0402_50V7K
PL10
4.7UH_SIL1045R-4R7PF_6.3A_30%
1
2
PC105
0.22U_0603_10V7K
4
LGATE_NB
CPU_VDDNB_RUN_FB_H
PR130
11.3K_0402_1%
2
1
PC108
0.1U_0603_25V7K
1
PR131
0_0402_5%
PR125
0_0603_1%
BOOT_NB 1
2 1
PR129
0_0402_5%
2
1
PR128
2_0603_5%
+3VS
+5VS
+
2
PQ37
AO4466_SO8
PHASE_NB
PR124
22K_0402_1%
2
1
@ PR127
10_0402_5%
1
2 +VDDNBP
CPU_B+
+
2
B+
PC103
1000P_0402_50V7K
2
1
PC104
0.1U_0603_16V7K
PC99
1000P_0402_50V7K
5
6
7
8
+5VS
5
6
7
8
PL9
HCB4532KF-800T90_1812
1
2
PC102
220U_25V_M
PR122
44.2K_0402_1%
PC101
220U_25V_M
PC100
10U_1206_25V6M
2
1
CPU_B+
PC98
33P_0402_50V8K
2
1
PC116
10U_1206_25V6M
2
1
Date:
+CPU_CORE
Rev
0.2
LA-5381P
Sheet
E
43
of
46
ZZZ
PCB
PCB LA-5381P REV0
U3
U3
RS880M
RS880MR1@
RS880MC
RS880MCR1@
North Bridge
U15
South Bridge
SB710
SB710R1@
UL1
B
LAN Controller
8103EL
8103EL@
UL3
LAN Transformer
10/100M transformer
8103EL@
Compal Secret Data
Issued Date
2008/04/14
Deciphered Date
2009/04/14
Title
Size
B
Date:

ISPD
Document Number
Rev
1.0
LA-5381P
Sheet
1
44
of
46
HW4 Product Improvement Record (P.I.R.)
NSKAE LA-5381P SCHEMATIC CHANGE LIST

REVISION CHANGE: 0.1 TO 0.2
GERBER-OUT DATE: 2009/04/06
NO
DATE
PAGE MODIFICATION LIST
PURPOSE
-------------------------------------------------------------------------------------------------------------1
3/10
17
Change R156 to 10K pull down
Special LCD issue
2
3/10
30
Change RA16 to 1% tolerence
Codec requirement
3
3/10
33
Add R962~R965
Reserve GPIO to EC
4
3/13
22
Add R193~R196
Strap pin for SW
5
3/23
16
Add R540
Common Design
6
3/24
30
Add CA49,CA50
GPS issue
7
3/24
30
Add CA51~CA54
Common design
8
3/24
27
Add R722 and C754
Common design
9
3/25
27
Add R423
Common design
10
3/25
28
Add RM7 for Wimax module
Wimax issue
11
3/25
28
Add R822
Customer Request
12
4/9
31
Change UC1 from JMB385 to JMB380
For ME height limit
13
4/9
35
Add C863 to C884
For EMI request
14
4/9
18
Delete Q161 and add D53
For customer request
15
4/9
16
Delete Q162 and add D21
For customer request
--------------------------------------------------------------------------------------------------------------
2007/5/18
Issued Date
5
Compal Secret Data
Deciphered Date
2008/5/18
Title
Size
Date:
PIR
Document Number
Rev
0.2
Sheet
1
45
of
46
Version Change List ( P. I. R. List ) for Power Circuit

Page#
44
39
41
41
41-42
40
41
41-42
41-42
EVT
EVT
EVT
EVT
DVT
DVT
DVT
DVT
DVT
39
40
39
41
44
DVT
DVT
DVT
DVT
PVT
Title
Date
2009/02/25
Change PR74
2009/03/16
Change PR93,PC61
2008/12/30
Add PC138
2009/02/10
Change PL6,PL7,PL8 to TOKO 2009/03/31
Change PR79 to 19.1K
2009/03/31
Change PC63,PC72 to 330uF 2009/03/31
Change PC138,PC77,PC78
2009/03/31
mount PR95,PC66,PR103,
2009/03/31
PC74,PR111,PC83
Add PL13,PL14,PL15,PL16
Change PR65 to 47K
2009/03/31
Change PL5=4.7u
2009/03/31
Change PR71,PL3
2009/03/31
Change PR106,PR107
2009/03/31
Change PQ39 and PQ42
2009/03/31
Request
Owner
Issue Description
Solution Description
POWER
POWER
HW
POWER
POWER
HW
POWER
POWER
POWER
NSKAE for Tigirs(UMA)

For CHGVADJ (memo)
meet AMD RS780 SPEC (memo)
Noise (memo)
Noise
For HDMI
Noise
Noise
For EMI
POWER
POWER
POWER
HW
POWER
For ADP_I
For common circuit
For 12 Cell charge 3.6A
Change to 12.1K and 19.6K
Change to common parts
No issue
Compal Secret Data
Issued Date
2008/10/13
Deciphered Date
2009/10/13
Title

Power PIR
Size
Document Number
Custom
Date:
Rev
0.2
LA-5381P
Sheet
46
of
46

Toshiba Satellite A500 Series Service Manual

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Toshiba Satellite A500 Series Service Manual

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A

NSKAE LA-5381P REV 0.2 Schematics Document

Compal Secret Data

Compal Electronics, Inc.

Friday, April 10, 2009

AMD S1G3 CPU

Model Name : NSKAE

File Name : LA-5381P

1.8V DDRII 667/800MHZ

Hyper Transport Link 2.6GHz

HDMI CEC Controller

Touch Pad BTN/B

DC/DC Interface CKT.

Touch Screen conn

MDC 1.5 Conn

Power On/Off CKT.

USB port 0,1

USB/B Right USB/B Left

Power Circuit DC/DC

Compal Electronics, Inc.

Friday, April 10, 2009

: means Analog Ground

@ : means just reserve , no build

BTO Option Table

S5 S4/ Battery only

S5 S4/AC & Battery

MINI PCI-E SLOT

Compal Electronics, Inc.

SMBUS Control Table

Friday, April 10, 2009

Near CPU Socket

FAN Control Circuit

Compal Secret Data

Compal Electronics, Inc.

Friday, April 10, 2009

Processor DDR2 Memory Interface

PLACE CLOSE TO PROCESSOR

Place them close to CPU within 1"

Compal Secret Data

Compal Electronics, Inc.

Friday, April 10, 2009

Place close to CPU wihtin 1.5"

Add R32 at PVT

Un-Mount R27 For Caspian

Add R497 and R498 at PVT

NOTE: HDT TERMINATION IS REQUIRED

Compal Secret Data

Compal Electronics, Inc.

Friday, April 10, 2009

Near CPU Socket

Under CPU Socket

Under CPU Socket

Between CPU Socket and DIMM

180PF Qt'y follow the distance between

Near CPU Socket Right side

Near CPU Socket Left side

Compal Secret Data

Compal Electronics, Inc.

Friday, April 10, 2009

DIMM0 STD H:9.2mm (Bot)

Compal Electronics, Inc.

Friday, April 10, 2009