1

1
2
3
4
5
6
7
8

:
:
:
:
:
:
:
:

01

ZQ2 SYSTEM DIAGRAM

PCB STACK UP
LAYER
LAYER
LAYER
LAYER
LAYER
LAYER
LAYER
LAYER

TOP
GND
IN1
IN2
VCC
IN3
GND
BOT

DDR3-SODIMM1

DDR3 channel A

DDR3-SODIMM2

CPU THERMAL
SENSOR

AMD Champlain

PAGE 5,6

35mm X 35mm
S1G4 Processor

PAGE 4

638P (PGA)45W/35W
PAGE 2,3,4

CPU_CLK

DDR3 channel B

PAGE 5,6

NBGFX_CLK

From SB
CLOCK GEN

NBGPP_CLK
SBLINK_CLK

HT3

IV@ -----> iGPU

SW@ -----> dGPU
SP@ -----> option notice
SIDE@ -----> sideport

Side port

X1

ATI
Park XT
128-bit M2 Pkg
29mm X 29mm
PAGE 16,17,18
19,20,21

PCI-Express 8X

PCI-E

sideport-L75,L76,R583,R392,C832,R455,R550,R502
NB A11-R105,R108
SB A12-R267,R271
JV/JM-CN16,R450,R456
EC-D8,D27
UMA-R461
VRAM-R358,R359,R360,R363,R365,R72

NORTH BRIDGE

X2

LAN
Atheros
PCIE-LAN
AR8151

Mini PCI-E
Card
(Wireless LAN)

PAGE 7

21mm X 21mm, 528pin BGA

(10/100/1000)

PAGE 25

DDR3 RAM

RS880
A12

PAGE 26

RJ45

PAGE 22

VGA Park
B

HDMI
CRT
LVDS

PAGE 7,8,9,10

800MHz
VRAM
DDR3
64MX16X4,64 bit
64MX16X8,128 bit

HDMI
CRT

PAGE 24
PAGE 23

LVDS

PAGE 23

ALINK X4

PAGE 25
SATA - HDD1

SATA0 150MB

SATA - CD-ROM
AMD CPU CORE (ISL6265)

PAGE 36

SATA1 150MB

PAGE 27

SB820
21mm X 21mm, 528pin BGA

CPU

NB_CORE (UP6111AQDD)

USB1.1

4.5W(Ext)

A11

PAGE 38

BT
PAGE 32

SOUTH BRIDGE

PAGE 27

4.3W(Int)

USB2.0

PAGE 12,13,14,15,16
NB

USB2.0 Ports
PAGE 30
X1

Webcam
PAGE 23

+VGPU_CORE (MAX8792ETD)

4
WLAN conn
PAGE 26

CardReader
AU6437

10,11,12

PAGE 29

PAGE 40

LPC

+1V/+1.5_GPU/+1.8_GPU

Winbond KBC

PAGE 41

Azalia

USB BOARD
USB2.0 Ports x3
PAGE 30

Codec
RTL ALC271X

NPCE781L
0.9V/DDR 1.5V(RT8207)

PAGE 33

PAGE 39

PAGE 28

Power BOARD
PAGE 30

SYSTEM 5V/3V (RT8206)

Switch BOARD
PAGE 35

PAGE 30
D

1.1V(UP6111AQDD)

PAGE 37

Keyboard
Touch Pad

PAGE 32
PAGE 32

CPU FAN

SPI

PAGE 32 PAGE 33

Digital MIC

AUDIO CONN

Speaker

(Phone/ MIC)

PAGE 28

PAGE 28

PROJECT : ZQ2
Quanta Computer Inc.

PAGE 28

Discharge /Thermal protec

Size

PAGE 42
1

Document Number

Rev
1A

Block Diagram
Date:
2

Wednesday, May 27, 2009

Sheet

1
8

of

46

+CPUVDDA

+2.5V

1.1V@1.5A

+1.1V

R194
R195

L35

2.5V@250mA

+1.1V_VLDT

CPU CLK

C385
LS0805-100M-N
4.7U/6.3V_6

C387
4.7U/6.3V_6

C379
0.22U/6.3V_4

C380
3300P/50V_4

*Short_6

C386
*10U/6.3V_8

CLK_CPU_BCLKP_PR
CLK_CPU_BCLKN_PR

11 CLK_CPU_BCLKP_PR
11 CLK_CPU_BCLKN_PR

Keep trace from resisor to CPU within 0.6"

keep trace from caps to CPU within 1.2"

*Short_6

+CPUVDDA

U24A
C596
C352
C354
C599

10U/6.3V_8
10U/6.3V_8
0.22U/6.3V_4
180P/50V_4

SI Change from AMD request

HT_CADINP[15..0]

7 HT_CADINP[15..0]

HT_CADINN[15..0]

7 HT_CADINN[15..0]

HT_CLKINP[1..0]

7 HT_CLKINP[1..0]

HT_CLKINN[1..0]

7 HT_CLKINN[1..0]

HT_CTLINP[1..0]

7 HT_CTLINP[1..0]

HT_CTLINN[1..0]

7 HT_CTLINN[1..0]

HT_CADOUTP[15..0]

7 HT_CADOUTP[15..0]

HT_CADOUTN[15..0]

7 HT_CADOUTN[15..0]

HT_CLKOUTP[1..0]

7 HT_CLKOUTP[1..0]

HT_CLKOUTN[1..0]

7 HT_CLKOUTN[1..0]
C

HT_CTLOUTP[1..0]

7 HT_CTLOUTP[1..0]

HT_CTLOUTN[1..0]

7 HT_CTLOUTN[1..0]

+1.1V_VLDT
+1.1V_VLDT
+1.1V_VLDT
+1.1V_VLDT

D1
D2
D3
D4

HT_CADINP0
HT_CADINN0
HT_CADINP1
HT_CADINN1
HT_CADINP2
HT_CADINN2
HT_CADINP3
HT_CADINN3
HT_CADINP4
HT_CADINN4
HT_CADINP5
HT_CADINN5
HT_CADINP6
HT_CADINN6
HT_CADINP7
HT_CADINN7
HT_CADINP8
HT_CADINN8
HT_CADINP9
HT_CADINN9
HT_CADINP10
HT_CADINN10
HT_CADINP11
HT_CADINN11
HT_CADINP12
HT_CADINN12
HT_CADINP13
HT_CADINN13
HT_CADINP14
HT_CADINN14
HT_CADINP15
HT_CADINN15

E3
E2
E1
F1
G3
G2
G1
H1
J1
K1
L3
L2
L1
M1
N3
N2
E5
F5
F3
F4
G5
H5
H3
H4
K3
K4
L5
M5
M3
M4
N5
P5

HT_CLKINP0
HT_CLKINN0
HT_CLKINP1
HT_CLKINN1

J3
J2
J5
K5

HT_CTLINP0
HT_CTLINN0
HT_CTLINP1
HT_CTLINN1

N1
P1
P3
P4

VLDT_A0
VLDT_A1
VLDT_A2
VLDT_A3

C578
+3V

R92

20K/F_4

VLDT_B0
VLDT_B1
VLDT_B2
VLDT_B3

L0_CADOUT_H0
L0_CADOUT_L0
L0_CADOUT_H1
L0_CADOUT_L1
L0_CADOUT_H2
L0_CADOUT_L2
L0_CADOUT_H3
L0_CADOUT_L3
L0_CADOUT_H4
L0_CADOUT_L4
L0_CADOUT_H5
L0_CADOUT_L5
L0_CADOUT_H6
L0_CADOUT_L6
L0_CADOUT_H7
L0_CADOUT_L7
L0_CADOUT_H8
L0_CADOUT_L8
L0_CADOUT_H9
L0_CADOUT_L9
L0_CADOUT_H10
L0_CADOUT_L10
L0_CADOUT_H11
L0_CADOUT_L11
L0_CADOUT_H12
L0_CADOUT_L12
L0_CADOUT_H13
L0_CADOUT_L13
L0_CADOUT_H14
L0_CADOUT_L14
L0_CADOUT_H15
L0_CADOUT_L15

L0_CLKIN_H0
L0_CLKIN_L0
L0_CLKIN_H1
L0_CLKIN_L1

L0_CLKOUT_H0
L0_CLKOUT_L0
L0_CLKOUT_H1
L0_CLKOUT_L1

L0_CTLIN_H0
L0_CTLIN_L0
L0_CTLIN_H1
L0_CTLIN_L1

L0_CTLOUT_H0
L0_CTLOUT_L0
L0_CTLOUT_H1
L0_CTLOUT_L1

AE2
AE3
AE4
AE5

+1.1V_VLDT 10U/6.3V_8
+1.1V_VLDT 0.22U/6.3V_4
+1.1V_VLDT 180P/50V_4
+1.1V_VLDT

AD1
AC1
AC2
AC3
AB1
AA1
AA2
AA3
W2
W3
V1
U1
U2
U3
T1
R1
AD4
AD3
AD5
AC5
AB4
AB3
AB5
AA5
Y5
W5
V4
V3
V5
U5
T4
T3

HT_CADOUTP0
HT_CADOUTN0
HT_CADOUTP1
HT_CADOUTN1
HT_CADOUTP2
HT_CADOUTN2
HT_CADOUTP3
HT_CADOUTN3
HT_CADOUTP4
HT_CADOUTN4
HT_CADOUTP5
HT_CADOUTN5
HT_CADOUTP6
HT_CADOUTN6
HT_CADOUTP7
HT_CADOUTN7
HT_CADOUTP8
HT_CADOUTN8
HT_CADOUTP9
HT_CADOUTN9
HT_CADOUTP10
HT_CADOUTN10
HT_CADOUTP11
HT_CADOUTN11
HT_CADOUTP12
HT_CADOUTN12
HT_CADOUTP13
HT_CADOUTN13
HT_CADOUTP14
HT_CADOUTN14
HT_CADOUTP15
HT_CADOUTN15

Y1
W1
Y4
Y3

HT_CLKOUTP0
HT_CLKOUTN0
HT_CLKOUTP1
HT_CLKOUTN1

R2
R3
T5
R5

HT_CTLOUTP0
HT_CTLOUTN0
HT_CTLOUTP1
HT_CTLOUTN1

CLK_CPU_BCLKP_C

R417

169/F_4

CLK_CPU_BCLKP_PR
CLK_CPU_BCLKN_PR

3900P/25V_4
3900P/25V_4

4
4
4

CPU_LDT_STOP#

300/F_4

R206

250mA

CLK_CPU_BCLKP_C
CLK_CPU_BCLKN_C

A9
A8

AF4
AF5
AE6

CPU_SIC
CPU_SID
CPU_ALERT
R162
R158

+1.1V_VLDT

44.2/F_4 CPU_HTREF0
44.2/F_4 CPU_HTREF1
place them to CPU within 1.5"

F6
E6

36 CPU_VDD1_FB_H
36 CPU_VDD1_FB_L

Y6
AB6

R205
R211

+1.5VSUS

R384

+1.5VSUS

+3V

R383

1K/F_4
*300/F_4

CPUTEST23

AD7

CPUTEST18
CPUTEST19

H10
G9

CPUTEST25H
510/F_4
E9
510/F_4
CPUTEST25L
E8
place them to CPU within 1.5"
CPUTEST21
AB8
CPUTEST20
AF7
CPUTEST24
AE7
CPUTEST22
AE8
CPUTEST12
AC8
CPUTEST27
AF8
R401

*Short_4

TEST9

CPU_LDT_REQ#_CPU

*BSS138_NL/SOT23
3

Q29
1

CPU_LDT_REQ#

*0_4

R368

CPU_LDT_RST_HTPA#
3
Q5
BSS138_NL/SOT23

D05
+1.5VSUS
+1.5V

G2
*SHORT_ PAD1

CPU_SVC_R
CPU_SVD_R
CPU_PWRGD

The RS880 family does not support CLMC architecture

The LDTREQ# connection from the CPU to ALLOW_LDTSTOP
of the Northbridge is no longer required.

R405
R406

+1.5VSUS
+1.5V

CPU_LDT_RST#

R409
R413

R411
R408
R414

RESET_L
PWROK
LDTSTOP_L
LDTREQ_L

+1.5VSUS

R90

*1K/F_4

S1g4 does not support MEMHOT#

2

+1.5VSUS

*10K/F_4

CPU_MEMHOT_L#

3
R152

C01

Q4
*MMBT3904
1
*0_4

+1.5VSUS

Q43

CPU_MEMHOT#

R373

1K_4

R428

2
+1.5VSUS
+1.5VSUS

CPU_THERMTRIP_L#
R378
1K/F_4
R113
R377

Q31
MMBT3904
3

*10K/F_4
300/F_4

B12

CPU_PROCHOT_L#

1
R104
5

+1.5VSUS

15,33,36 CPU_COREPG

Q8

3
*MMBT3904
0_4

R236

*0_4

R424

*Short_4

CPU_THERMTRIP#
SYS_SHDN#

CPU_DBREQ#
CPU_DBRDY
CPU_TCK
CPU_TMS
CPU_TDI
CPU_TRST#
CPU_TDO

12

4,35,42
+1.5VSUS

D11

C530

*0.1U/10V_4

CPU_SVC 36
CPU_SVD 36
CPU_PWRGD_SVID_REG

1
3
5
7
9
11
13
15
17
19
21
23
KEY

PM_THERM# 4,12,32
CPU_PROCHOT#

VDDIO_FB_H
VDDIO_FB_L

VDD1_FB_H
VDD1_FB_L

VDDNB_FB_H
VDDNB_FB_L

DBRDY
TMS
TCK
TRST_L
TDI
TEST23

DBREQ_L
TDO
TEST28_H
TEST28_L

TEST18
TEST19

TEST17
TEST16
TEST15
TEST14

TEST25_H
TEST25_L
TEST21
TEST20
TEST24
TEST22
TEST12
TEST27

TEST7
TEST10
TEST8
TEST29_H
TEST29_L

TEST9
TEST6
RSVD1
RSVD2
RSVD3
RSVD4
RSVD5

RSVD10
RSVD9
RSVD8
RSVD7
RSVD6

VFIX MODE
SVD

0
0
1
1

0
1
0
1

CPU_THERMTRIP_L#
CPU_PROCHOT_L#
CPU_MEMHOT_L#

W7
W8

H_THRMDC 4
H_THRMDA 4

VDDIO_FB_H
VDDIO_FB_L

W9
Y9
H6
G6

VDDIO_FB_H
VDDIO_FB_L

CPU_VDDNB_FB_H
CPU_VDDNB_FB_L

E10 CPU_DBREQ# R212

R204
AE9 CPU_TDO

*300/F_4
300/F_4

+1.5V
+1.5VSUS

PV stage:add
+1.5VSUS
option R204
for Caspian
CPU power
leakage issue

J7
H8
CPUTEST17
CPUTEST16
CPUTEST15
CPUTEST14

D7
E7
F7
C7

39
39

36
36

T32
T31
T38
T39

C3
K8
C4
CPUTEST29H

C9
C8

T40
R208
80.6/F_4

H18
H19
AA7
D5
C5

CPUTEST29L

T41

Voltage Output

36

CPUTEST24
CPUTEST23
CPUTEST20
CPUTEST22
CPUTEST12
CPUTEST15
CPUTEST14
CPUTEST19
CPUTEST18
CPUTEST21

2
4
6
8
10
12
14
16
18
20
22
24
25

R381
R379
R380
R382
R120
R209
R210
R183
R184
R121

1K/F_4
1K/F_4
1K/F_4
1K/F_4
1K/F_4
*300/F_4
*300/F_4
1K/F_4
1K/F_4
1K/F_4

S1G4

PROJECT : ZQ2
Quanta Computer Inc.

CPU_LDT_RST_HTPA#
Size

Document Number

Rev
1A

S1G4 HT,CTL I/F 1/3

Date:

AF6
AC7
AA8

1.1V
1.0V
0.9V
0.8V

*HDT CONN

CPU_SVC_R
CPU_SVD_R

VID Override Circuit

SVC

CN5

11

A6
A4

*220/J_4
*220/J_4
*220/J_4

100K_6

BSS138_NL/SOT23

THERMDC
THERMDA

VDD0_FB_H
VDD0_FB_L

*1K/F_4
1K/F_4

HDT Connector

5,11

THERMTRIP_L
PROCHOT_L
MEMHOT_L

M11
W18

HT_REF0
HT_REF1

1K/F_4
*1K/F_4

for debug only

R95

SVC
SVD

SIC
SID
ALERT_L

PV stage:add +1.5VSUS option

R540 R541 for Caspian CPU
power leakge issue

*Short_4
*Short_4
*Short_4
R410
R407
R418

VSS
RSVD11

CLKIN_H
CLKIN_L

CNTR_VREF

C2
AA6

VDDA1
VDDA2

SOCKET_638_PIN

SI Change from AMD request

R91
4.7K/J_4

G10
AA9
AC9
AD9
AF9

A3
A5
B3
B5
C1

Serial VID

34.8K/F_4

R6
P6

36 CPU_VDD0_FB_H
36 CPU_VDD0_FB_L

CPU_DBRDY
CPU_TMS
CPU_TCK
CPU_TRST#
CPU_TDI

02

+1.5V

U24D

F8
F9

CPU_LDT_RST#
B7
CPU_PWRGD
A7
CPU_LDT_STOP#
F10
CPU_LDT_REQ#_CPU C6

11 CPU_LDT_RST#
11 CPU_PWRGD
9,11 CPU_LDT_STOP#

SideBand Temp sense I2C

R416
R415
R412

W/S= 15 mil/20mil
+CPUVDDA
+CPUVDDA

CLK_CPU_BCLKN_C

C608
C609

300/F_4
300/F_4
*300/F_4

3..6,36,39,41 +1.5VSUS
7,10,26,39,42 +1.5V
7..10,14,37 +1.1V
42
+2.5V
4,5,9..15,19,23,24,26,28..33,35..42
+3V

0.1U/10V_4

R371

C353
C598
C597

CPU_LDT_RST#
CPU_PWRGD
CPU_LDT_REQ#_CPU

SOCKET_638_PIN

CNTR_VREF

HT LINK

L0_CADIN_H0
L0_CADIN_L0
L0_CADIN_H1
L0_CADIN_L1
L0_CADIN_H2
L0_CADIN_L2
L0_CADIN_H3
L0_CADIN_L3
L0_CADIN_H4
L0_CADIN_L4
L0_CADIN_H5
L0_CADIN_L5
L0_CADIN_H6
L0_CADIN_L6
L0_CADIN_H7
L0_CADIN_L7
L0_CADIN_H8
L0_CADIN_L8
L0_CADIN_H9
L0_CADIN_L9
L0_CADIN_H10
L0_CADIN_L10
L0_CADIN_H11
L0_CADIN_L11
L0_CADIN_H12
L0_CADIN_L12
L0_CADIN_H13
L0_CADIN_L13
L0_CADIN_H14
L0_CADIN_L14
L0_CADIN_H15
L0_CADIN_L15

FOX PZ63826-284R-41F
DG0^8000004 IC SOCKET SMD 638P S1(P1.27,H3.2)
MLX 47296-4131
DG0^8000003 IC SOCKET SMD 638P S1(P1.27,H3.2)
TYC 4-1903401-2
DG0^8000005 IC SOCKET SMD 638P S1(P1.27,H3.2)

W/S= 15 mil/20mil+CPUVDDA

BLM21PG221SN1D(220,100M,2A)_8

S1G4

Wednesday, May 27, 2009

1

Sheet

of

46

35W CPU support 0.9V

45W CPU support 1.05V

+1.5VSUS

CPU_VDDR

R374
0/J_4

R386
R385

C595
4.7U/6.3V_6

C536
4.7U/6.3V_6

EC-D

D10
C10
B10
AD10
39.2/F_4
39.2/F_4

M_ZP
M_ZN

M_A_RST#

H16

5
5

M_A_ODT0
M_A_ODT1

T19
V22
U21
V19

5
5

M_A_CS#0
M_A_CS#1

T20
U19
U20
V20

M_A_CLKP1
M_A_CLKN1

5
5

M_A_CLKP2
M_A_CLKN2
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15

M_A_A[0..15]
M_A_BANK0
M_A_BANK1
M_A_BANK2

R20
R23
J21

5
5
5

M_A_RAS#
M_A_CAS#
M_A_WE#

R19
T22
T24

MB_RESET_L
MB0_ODT0
MB0_ODT1
MB1_ODT0

MA0_CS_L0
MA0_CS_L1
MA1_CS_L0
MA1_CS_L1

MB0_CS_L0
MB0_CS_L1
MB1_CS_L0

MA_CKE0
MA_CKE1

N21
M20
N22
M19
M22
L20
M24
L21
L19
K22
R21
L22
K20
V24
K24
K19

5
5
5

MEMVREF

MA0_ODT0
MA0_ODT1
MA1_ODT0
MA1_ODT1

N19
N20
E16
F16
Y16
AA16
P19
P20

MA_RESET_L

J22
J20

M_A_CKE0
M_A_CKE1

5
5

VDDR1 MEM:CMD/CTRL/CLKVDDR5
VDDR2
VDDR6
VDDR3
VDDR7
VDDR4
VDDR8
VDDR9
MEMZP
MEMZN
VDDR_SENSE

AF10
AE10

5
5

VDDR=>1.75A

U24B

PLACE THEM CLOSE TO

CPU WITHIN 1"

MB_CKE0
MB_CKE1

MA_CLK_H5
MA_CLK_L5
MA_CLK_H1
MA_CLK_L1
MA_CLK_H7
MA_CLK_L7
MA_CLK_H4
MA_CLK_L4

MB_CLK_H5
MB_CLK_L5
MB_CLK_H1
MB_CLK_L1
MB_CLK_H7
MB_CLK_L7
MB_CLK_H4
MB_CLK_L4

MA_ADD0
MA_ADD1
MA_ADD2
MA_ADD3
MA_ADD4
MA_ADD5
MA_ADD6
MA_ADD7
MA_ADD8
MA_ADD9
MA_ADD10
MA_ADD11
MA_ADD12
MA_ADD13
MA_ADD14
MA_ADD15

MB_ADD0
MB_ADD1
MB_ADD2
MB_ADD3
MB_ADD4
MB_ADD5
MB_ADD6
MB_ADD7
MB_ADD8
MB_ADD9
MB_ADD10
MB_ADD11
MB_ADD12
MB_ADD13
MB_ADD14
MB_ADD15

MA_BANK0
MA_BANK1
MA_BANK2

MB_BANK0
MB_BANK1
MB_BANK2

MA_RAS_L
MA_CAS_L
MA_WE_L

MB_RAS_L
MB_CAS_L
MB_WE_L

D01

CPU_VDDR

CPU_VDDR

M_B_DQ[0..63]

U24C

Y10 CPU_VTT_SENSE

R479
*0/J_4

W17 MEMVREF_CPU
B18

M_B_RST# 5

W26
W23
Y26

M_B_ODT0 5
M_B_ODT1 5

V26
W25
U22

M_B_CS#0 5
M_B_CS#1 5

J25
H26

M_B_CKE0 5
M_B_CKE1 5

P22
R22
A17
A18
AF18
AF17
R26
R25

M_B_CLKP1 5
M_B_CLKN1 5

P24
N24
P26
N23
N26
L23
N25
L24
M26
K26
T26
L26
L25
W24
J23
J24

C210
4.7U/6.3V_6

C218
4.7U/6.3V_6

C370
4.7U/6.3V_6

C363
0.22U/6.3V_4

C227
0.1U/10V_4

C226
1000P/50V_4

M_B_CLKP2 5
M_B_CLKN2 5
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15

M_B_A[0..15]

R24
U26
J26

M_B_BANK0 5
M_B_BANK1 5
M_B_BANK2 5

U25
U24
U23

M_B_RAS# 5
M_B_CAS# 5
M_B_WE# 5

C364
0.22U/6.3V_4

C223
0.22U/6.3V_4

C224
0.22U/6.3V_4

M_B_DM[0..7]

CPU_VDDR

C362
1000P/50V_4

C365
1000P/50V_4

C282
1000P/50V_4

C230
1000P/50V_4

C367
180P/50V_4

C217
180P/50V_4

C360
180P/50V_4

+1.5VSUS

C229
180P/50V_4

5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5

Reserved for AMD suggest

R112

0/J_4

+3VPCU
C203

R103

1K/F_4

C207
*0.47U/10V_4

+
-

U6

*.1U/10V_4

R110
1

*10_4
2

MEMVREF_CPU

M_B_DQSP0
M_B_DQSN0
M_B_DQSP1
M_B_DQSN1
M_B_DQSP2
M_B_DQSN2
M_B_DQSP3
M_B_DQSN3
M_B_DQSP4
M_B_DQSN4
M_B_DQSP5
M_B_DQSN5
M_B_DQSP6
M_B_DQSN6
M_B_DQSP7
M_B_DQSN7

M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63

C11
A11
A14
B14
G11
E11
D12
A13
A15
A16
A19
A20
C14
D14
C18
D18
D20
A21
D24
C25
B20
C20
B24
C24
E23
E24
G25
G26
C26
D26
G23
G24
AA24
AA23
AD24
AE24
AA26
AA25
AD26
AE25
AC22
AD22
AE20
AF20
AF24
AF23
AC20
AD20
AD18
AE18
AC14
AD14
AF19
AC18
AF16
AF15
AF13
AC12
AB11
Y11
AE14
AF14
AF11
AD11

M_B_DM0
M_B_DM1
M_B_DM2
M_B_DM3
M_B_DM4
M_B_DM5
M_B_DM6
M_B_DM7

A12
B16
A22
E25
AB26
AE22
AC16
AD12
C12
B12
D16
C16
A24
A23
F26
E26
AC25
AC26
AF21
AF22
AE16
AD16
AF12
AE12

*OPA343NA/3K

1K/F_4

R100

M_A_DQ[0..63]

MEM:DATA
R124
*0/J_4

Place close to socket

C371
4.7U/6.3V_6

03

Processor Memory Interface

+SMDDR_VREF

W10
AC10
AB10
AA10
A10

SOCKET_638_PIN
CPU_VDDR

VDDR=> 0.9V support 1066 / 800 DDR

VDDR= >1.05V support 1333 / 1066 / 800 DDR

MB_DATA0
MB_DATA1
MB_DATA2
MB_DATA3
MB_DATA4
MB_DATA5
MB_DATA6
MB_DATA7
MB_DATA8
MB_DATA9
MB_DATA10
MB_DATA11
MB_DATA12
MB_DATA13
MB_DATA14
MB_DATA15
MB_DATA16
MB_DATA17
MB_DATA18
MB_DATA19
MB_DATA20
MB_DATA21
MB_DATA22
MB_DATA23
MB_DATA24
MB_DATA25
MB_DATA26
MB_DATA27
MB_DATA28
MB_DATA29
MB_DATA30
MB_DATA31
MB_DATA32
MB_DATA33
MB_DATA34
MB_DATA35
MB_DATA36
MB_DATA37
MB_DATA38
MB_DATA39
MB_DATA40
MB_DATA41
MB_DATA42
MB_DATA43
MB_DATA44
MB_DATA45
MB_DATA46
MB_DATA47
MB_DATA48
MB_DATA49
MB_DATA50
MB_DATA51
MB_DATA52
MB_DATA53
MB_DATA54
MB_DATA55
MB_DATA56
MB_DATA57
MB_DATA58
MB_DATA59
MB_DATA60
MB_DATA61
MB_DATA62
MB_DATA63
MB_DM0
MB_DM1
MB_DM2
MB_DM3
MB_DM4
MB_DM5
MB_DM6
MB_DM7
MB_DQS_H0
MB_DQS_L0
MB_DQS_H1
MB_DQS_L1
MB_DQS_H2
MB_DQS_L2
MB_DQS_H3
MB_DQS_L3
MB_DQS_H4
MB_DQS_L4
MB_DQS_H5
MB_DQS_L5
MB_DQS_H6
MB_DQS_L6
MB_DQS_H7
MB_DQS_L7

MA_DATA0
MA_DATA1
MA_DATA2
MA_DATA3
MA_DATA4
MA_DATA5
MA_DATA6
MA_DATA7
MA_DATA8
MA_DATA9
MA_DATA10
MA_DATA11
MA_DATA12
MA_DATA13
MA_DATA14
MA_DATA15
MA_DATA16
MA_DATA17
MA_DATA18
MA_DATA19
MA_DATA20
MA_DATA21
MA_DATA22
MA_DATA23
MA_DATA24
MA_DATA25
MA_DATA26
MA_DATA27
MA_DATA28
MA_DATA29
MA_DATA30
MA_DATA31
MA_DATA32
MA_DATA33
MA_DATA34
MA_DATA35
MA_DATA36
MA_DATA37
MA_DATA38
MA_DATA39
MA_DATA40
MA_DATA41
MA_DATA42
MA_DATA43
MA_DATA44
MA_DATA45
MA_DATA46
MA_DATA47
MA_DATA48
MA_DATA49
MA_DATA50
MA_DATA51
MA_DATA52
MA_DATA53
MA_DATA54
MA_DATA55
MA_DATA56
MA_DATA57
MA_DATA58
MA_DATA59
MA_DATA60
MA_DATA61
MA_DATA62
MA_DATA63
MA_DM0
MA_DM1
MA_DM2
MA_DM3
MA_DM4
MA_DM5
MA_DM6
MA_DM7
MA_DQS_H0
MA_DQS_L0
MA_DQS_H1
MA_DQS_L1
MA_DQS_H2
MA_DQS_L2
MA_DQS_H3
MA_DQS_L3
MA_DQS_H4
MA_DQS_L4
MA_DQS_H5
MA_DQS_L5
MA_DQS_H6
MA_DQS_L6
MA_DQS_H7
MA_DQS_L7

G12
F12
H14
G14
H11
H12
C13
E13
H15
E15
E17
H17
E14
F14
C17
G17
G18
C19
D22
E20
E18
F18
B22
C23
F20
F22
H24
J19
E21
E22
H20
H22
Y24
AB24
AB22
AA21
W22
W21
Y22
AA22
Y20
AA20
AA18
AB18
AB21
AD21
AD19
Y18
AD17
W16
W14
Y14
Y17
AB17
AB15
AD15
AB13
AD13
Y12
W11
AB14
AA14
AB12
AA12

M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63

E12
C15
E19
F24
AC24
Y19
AB16
Y13

M_A_DM0
M_A_DM1
M_A_DM2
M_A_DM3
M_A_DM4
M_A_DM5
M_A_DM6
M_A_DM7

M_A_DM[0..7]

G13
H13
G16
G15
C22
C21
G22
G21
AD23
AC23
AB19
AB20
Y15
W15
W12
W13

M_A_DQSP0
M_A_DQSN0
M_A_DQSP1
M_A_DQSN1
M_A_DQSP2
M_A_DQSN2
M_A_DQSP3
M_A_DQSN3
M_A_DQSP4
M_A_DQSN4
M_A_DQSP5
M_A_DQSN5
M_A_DQSP6
M_A_DQSN6
M_A_DQSP7
M_A_DQSN7

5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5

SOCKET_638_PIN

R111
*10K/F_4

R102

*0/J_4

R109

*0/J_4
5,39 +0.75V_DDR_VTT
5,39 +SMDDR_VREF
39 CPU_VDDR
2,4..6,36,39,41 +1.5VSUS
11,27,30..35,39,42 +3VPCU

PROJECT : ZQ2
Quanta Computer Inc.
Size

Document Number

Rev
1A

S1G4 DDRIII MEMORY I/F 2/3

Date:

Wednesday, May 27, 2009

E

Sheet

of

46

36
+VCORE
31,36 CPU_VDDNB_CORE
2,3,5,6,36,39,41 +1.5VSUS
2,5,9..15,19,23,24,26,28..33,35..42
+3V

U24E

+VCORE

G4
H2
J9
J11
J13
J15
K6
K10
K12
K14
L4
L7
L9
L11
L13
L15
M2
M6
M8
M10
N7
N9
N11

CPU_VDDNB_CORE

3A

K16
M16
P16
T16
V16

+1.5VSUS

VDDNB_1
VDDNB_2
VDDNB_3
VDDNB_4
VDDNB_5

H25
J17
K18
K21
K23
K25
L17
M18
M21
M23
M25
N17

VDD_24
VDD_25
VDD_26
VDD_27
VDD_28
VDD_29
VDD_30
VDD_31
VDD_32
VDD_33
VDD_34
VDD_35
VDD_36
VDD_37
VDD_38
VDD_39
VDD_40
VDD_41
VDD_42
VDD_43
VDD_44
VDD_45
VDD_46
VDD_47
VDD_48
VDD_49
VDDIO27
VDDIO26
VDDIO25
VDDIO24
VDDIO23
VDDIO22
VDDIO21
VDDIO20
VDDIO19
VDDIO18
VDDIO17
VDDIO16
VDDIO15
VDDIO14
VDDIO13

VDDIO1
VDDIO2
VDDIO3
VDDIO4
VDDIO5
VDDIO6
VDDIO7
VDDIO8
VDDIO9
VDDIO10
VDDIO11
VDDIO12

P8
P10
R4
R7
R9
R11
T2
T6
T8
T10
T12
T14
U7
U9
U11
U13
U15
V6
V8
V10
V12
V14
W4
Y2
AC4
AD2

+1.5VSUS

Y25
V25
V23
V21
V18
U17
T25
T23
T21
T18
R17
P25
P23
P21
P18

1.5V@2A

SOCKET_638_PIN
+1.5VSUS

R375
1K/F_4

R376
1K/F_4

2 CNTR_VREF

R369
1K/F_4

Q30
1

BSS138_NL/SOT23
CPU_SMBDATA

Q28
1

CPU_SID

VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65

J6
J8
J10
J12
J14
J16
J18
K2
K7
K9
K11
K13
K15
K17
L6
L8
L10
L12
L14
L16
L18
M7
M9
AC6
M17
N4
N8
N10
N16
N18
P2
P7
P9
P11
P17
R8
R10
R16
R18
T7
T9
T11
T13
T15
T17
U4
U6
U8
U10
U12
U14
U16
U18
V2
V7
V9
V11
V13
V15
V17
W6
Y21
Y23
N6

VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98
VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129

04

+VCORE

BOTTOM SIDE DECOUPLING

C284
10U/6.3V_8

C310
10U/6.3V_8

C299
10U/6.3V_8

C291
10U/6.3V_8

C286
0.22U/6.3V_4

C285
0.01u/16V_4

C321
180P/50V_4
D

+VCORE

C292
10U/6.3V_8

C311
10U/6.3V_8

C330
10U/6.3V_8

CPU_VDDNB_CORE

C300
10U/6.3V_8

C319
10U/6.3V_8

C331
0.22U/6.3V_4

C327
0.01u/16V_4

C332
180P/50V_4

C334
0.01u/16V_4

+1.5VSUS

C320
C312
10U/6.3V_8 10U/6.3V_8

C347
10U/6.3V_8

C348
10U/6.3V_8

C295
C322
0.22U/6.3V_4 0.22U/6.3V_4

C296
180P/50V_4

C318
180P/50V_4

DECOUPLING BETWEEN PROCESSOR AND DIMMs

PLACE CLOSE TO PROCESSOR AS POSSIBLE
+1.5VSUS

C302
4.7U/6.3V_6

C338
4.7U/6.3V_6

C304
4.7U/6.3V_6

C303
4.7U/6.3V_6

C283
0.22U/6.3V_4

C301
0.22U/6.3V_4

+1.5VSUS

C309
C290
C328
0.22U/6.3V_4 0.22U/6.3V_4 0.01u/16V_4

C349
0.01u/16V_4

C314
180P/50V_4

SOCKET_638_PIN

3
BSS138_NL/SOT23

CPU_SIC

CPU_SMBCLK

U24F

AA4
AA11
AA13
AA15
AA17
AA19
AB2
AB7
AB9
AB23
AB25
AC11
AC13
AC15
AC17
AC19
AC21
AD6
AD8
AD25
AE11
AE13
AE15
AE17
AE19
AE21
AE23
B4
B6
B8
B9
B11
B13
B15
B17
B19
B21
B23
B25
D6
D8
D9
D11
D13
D15
D17
D19
D21
D23
D25
E4
F2
F11
F13
F15
F17
F19
F21
F23
F25
H7
H9
H21
H23
J4

+VCORE

VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9
VDD_10
VDD_11
VDD_12
VDD_13
VDD_14
VDD_15
VDD_16
VDD_17
VDD_18
VDD_19
VDD_20
VDD_21
VDD_22
VDD_23

Q3
PM_THERM#

CPU_ALERT 2

PROCESSOR POWER AND GROUND

BSS138_NL/SOT23
+3V

D11
+3V

R403
*200/F_6
SYS_SHDN#_3904

C606
*0.1U/10V_4

*Short_4

2,35,42

SYS_SHDN#

D5
*CH500H

*10K/F_4

R185

reserve for
power shutdown
( if can )

R404

U25
CPU_SMBCLK

33 CPU_SMBDATA

CPU_SMBDATA

7
6

R432

*0_4

VCC

SDA

DXP

ALERT#

DXN

OVERT#

GND

H_THRMDA 2
C607
*1000P/50V_4

R191

H_THRMDC 2

*Short_4

Q16

D6
*MMBT3904
2 PWROK_EC_39042

1
*CH501H-40PT

PWROK_EC 15,33

2,12,32 PM_THERM#

SCLK

33 CPU_SMBCLK

MSOP

R187

*10K/F_4

+3V

SMBALERT#

*G786P8

Adress ID: 9A

R402
Q15

*10K/F_4

PROJECT : ZQ2
Quanta Computer Inc.

TEMP_FAIL 17

*2N7002E-G

ADD VGA TEMP_ FAIL function

M93 is active Hi

Size

Document Number

Rev
1A

S1G4 PWR & GND 3/3

Date:

Wednesday, May 27, 2009

1

Sheet

of

46

3
3

M_A_CKE0
M_A_CKE1

73
74

3
3
3
3
3

M_A_RAS#
M_A_CAS#
M_A_WE#
M_A_CS#0
M_A_CS#1

110
115
113
114
121

3
3

M_A_ODT0
M_A_ODT1

116
120
DIM1_SA0
DIM1_SA1

200
202

12,25,26 PDAT_SMB
12,25,26 PCLK_SMB

C225
0.1U/10V_4

+3V
3

197
201

199
30

M_A_RST#
MEMHOT_MA#

198
1

+0.75VSMVREF_SUSA

126

+VREF_CA_A

203
204

+0.75V_DDR_VTT
C205

C589

*10u/6.3V_6

C211

0.1U/10V_4 1000P/50V_4

+1.5VSUS
A

+SMDDR_VREF

CKE0
CKE1
RAS#
CAS#
WE#
S0#
S1#
ODT0
ODT1

NC1
NC2
TEST

0.1U/10V_4

C289

*Short_4

C293

C288

R160

0.1U/10V_4 2.2u/6.3V_6
*2K/F_4

3 M_B_BANK[0..2]

Standard
Connector

M_B_DM[0..7]
3
3
3
3
3
3
3
3

1
2
3
5

4
6

7
8

11
12
13
14
15
16
17

20
21
22
24

23
25

26

29
30
31
32
33

37
39

43
45
47
49

53
55
57

61
63
65
67

71
73

34

38
40

VSS51
VSS50
VSS49
VSS48
VSS47
VSS46
VSS45
VSS44
VSS43
VSS42
VSS41
VSS40
VSS39
VSS38
VSS37
VSS36
VSS35
VSS34
VSS33
VSS32
VSS31
VSS30
VSS29
VSS28
VSS27

RST#
EVENT#
VREF
VrefCA
VTT1
VTT2
VSS0
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11

196
195
190
189
185
184
179
178
173
172
168
167
162
161
156
155
151
150
145
144
139
138
134
133
128

11
28
46
63
136
153
170
187
12
29
47
64
137
154
171
188

M_B_DQSP0
M_B_DQSP1
M_B_DQSP2
M_B_DQSP3
M_B_DQSP4
M_B_DQSP5
M_B_DQSP6
M_B_DQSP7

DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7

48

3
3
3
3
3
3
3
3

62
64
66

70
72
74

78
80
82
84

88
89
90
91
92
93

10
27
45
62
135
152
169
186

96
97
98
99
100
101

105
106
107
108
109
110
111

114
115
116
117
118
120

123
124
125
126
127
128

131
132
133
134

M_B_DQSN0
M_B_DQSN1
M_B_DQSN2
M_B_DQSN3
M_B_DQSN4
M_B_DQSN5
M_B_DQSN6
M_B_DQSN7

135
136

DQS0#
DQS1#
DQS2#
DQS3#
DQS4#
DQS5#
DQS6#
DQS7#

137

141
142
143
144
145
146

149
150
151
152
153

101
103
102
104

154

158

3
3
3
3

159
160
161
162
163
164

167

199

168
169
170
171
172

176
177
178
179
180

200

181

184
185
186
187
188
189
190

193

194

195
196
197
198

M_B_CLKP1
M_B_CLKN1
M_B_CLKP2
M_B_CLKN2

199

MEM_MA_TEST

T29

3
3

M_B_CKE0
M_B_CKE1

73
74

3
3
3
3
3

M_B_RAS#
M_B_CAS#
M_B_WE#
M_B_CS#0
M_B_CS#1

110
115
113
114
121

3
3

M_B_ODT0
M_B_ODT1

R440
1K/F_4
+3V
3

116
120
DIM2_SA0
DIM2_SA1

197
201

PDAT_SMB
PCLK_SMB
C592
0.1U/10V_4

200
202

30

M_B_RST#
MEMHOT_MB#

C627

C631

126

+VREF_CA_B

R431
1K/F_4

198
1

+0.75VSMVREF_SUSB

0.1U/10V_4

199

203
204

+0.75V_DDR_VTT

2.2u/6.3V_6

C265
C251
0.1u/10V_4

C258
1000P/50V_4

2
3
8
9
13
14
19
20
25
26
31
32

*10u/6.3V_6

+1.5VSUS

R97

2.2K/J_4

+1.5VSUS

R94

2.2K/J_4

MEMHOT_MA#

Q6
MMBT3904
3

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63

BA0/BA1
BA1/BA0
BA2

46

58

85

+0.75VSMVREF_SUSA

VDDspd

M_B_DM0
M_B_DM1
M_B_DM2
M_B_DM3
M_B_DM4
M_B_DM5
M_B_DM6
M_B_DM7

52
54
56

75

79

119

109
108
79

44

81
83

M_B_BANK0
M_B_BANK1
M_B_BANK2

VDD0
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17

75
76
81
82
87
88
93
94
99
100
105
106
111
112
117
118
123
124
R153
*2K/F_4

R151

A0
A1
A2
A3/A4
A4/A3
A5/A6
A6/A5
A7/A8
A8/A7
A9
A10/AP
A11
A12_BC#
A13
A14
A15/BA3

CK0
CK0#
CK1
CK1#
CKE0
CKE1
RAS#
CAS#
WE#
S0#
S1#
ODT0
ODT1

DDR3_SO-DIMM_H=8_1.5V_Standard

05

CN19

5
7
15
17
4
6
16
18
21
23
33
35
22
24
34
36
39
41
51
53
40
42
50
52
57
59
67
69
56
58
68
70
129
131
141
143
130
132
140
142
147
149
157
159
146
148
158
160
163
165
175
177
164
166
174
176
181
183
191
193
180
182
192
194

M_B_DQ5
M_B_DQ4
M_B_DQ7
M_B_DQ6
M_B_DQ0
M_B_DQ1
M_B_DQ3
M_B_DQ2
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ20
M_B_DQ21
M_B_DQ23
M_B_DQ22
M_B_DQ17
M_B_DQ16
M_B_DQ19
M_B_DQ18
M_B_DQ24
M_B_DQ28
M_B_DQ30
M_B_DQ31
M_B_DQ29
M_B_DQ25
M_B_DQ27
M_B_DQ26
M_B_DQ33
M_B_DQ32
M_B_DQ34
M_B_DQ35
M_B_DQ37
M_B_DQ36
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ44
M_B_DQ41
M_B_DQ43
M_B_DQ42
M_B_DQ53
M_B_DQ52
M_B_DQ54
M_B_DQ50
M_B_DQ48
M_B_DQ49
M_B_DQ55
M_B_DQ51
M_B_DQ60
M_B_DQ61
M_B_DQ59
M_B_DQ58
M_B_DQ57
M_B_DQ56
M_B_DQ62
M_B_DQ63

Standard
Connector
1
1

4
6

7
8
9
10

13
14
15
16
17
18

21
22
24

23
25

26
27

28

31
32
33
35

39

41

45
47
49
51

55
57
59

63
65
67
69

73

34
36

40

42

46
48
50

54
56
58

62
64
66
68

72
74

75
76
77

80
81
82
83
85

84
86

89
90
91
92
93
94
95

98
99
100
101
103

102
104

107
108
109
110
111
112

115
116
117
118
120

119
121

122

125
126
127
128
129
130

133
134
135
136
137
139

138

142
143
144
145
146
147
148

151
152
153
154
155
157

156

160
161
162
163
164
165

199

200

168
169
170
171
172
173
175

174

178
179
180
181
182
183

186
187
188
189
190
191

195
196
197
198
199
200

+1.5VSUS

R234
1K/F_4

+0.75VSMVREF_SUSB

SA0
SA1

NC1
NC2
TEST

77
122
125

MEM_MB_TEST

T30

SDA
SCL

VDDspd
RST#
EVENT#
oVREF

VrefCA
VTT1
VTT2
VSS0
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11

VSS51
VSS50
VSS49
VSS48
VSS47
VSS46
VSS45
VSS44
VSS43
VSS42
VSS41
VSS40
VSS39
VSS38
VSS37
VSS36
VSS35
VSS34
VSS33
VSS32
VSS31
VSS30
VSS29
VSS28
VSS27

196
195
190
189
185
184
179
178
173
172
168
167
162
161
156
155
151
150
145
144
139
138
134
133
128

C395

C397

R232
1K/F_4

0.1U/10V_4
2.2u/6.3V_6

H=4

DDR3_SO-DIMM_H=4_1.5V_Standard

H=8

R165

2.2u/6.3V_6
*2K/F_4

77
122
125

SDA
SCL

+1.5VSUS

*Short_4
C294

+VREF_CA_B

+1.5VSUS

SA0
SA1

+VREF_CA_A
R161
*2K/F_4

R154

2
3
8
9
13
14
19
20
25
26
31
32

CK0
CK0#
CK1
CK1#

+SMDDR_VREF

98
97
96
95
92
91
90
86
89
85
107
84
83
119
80
78

DDR3 SO-DIMM
(Standard )

101
103
102
104

M_A_CLKP1
M_A_CLKN1
M_A_CLKP2
M_A_CLKN2

DQS0#
DQS1#
DQS2#
DQS3#
DQS4#
DQS5#
DQS6#
DQS7#

M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15

+1.5VSUS

R370
R372

10K/F_4
10K/F_4

+1.5VSUS

DIM1_SA0
DIM1_SA1

R99

2.2K/J_4

R98

2.2K/J_4

MEMHOT_MB#

3
3
3
3

DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7

M_B_DQ[0..63]

37
38
43
44
48
49
54
55
60
61
65
66
71
72
127

10
27
45
62
135
152
169
186

M_A_DQSN0
M_A_DQSN1
M_A_DQSN2
M_A_DQSN3
M_A_DQSN4
M_A_DQSN5
M_A_DQSN6
M_A_DQSN7

DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7

+1.5VSUS

3 M_B_A[0..15]

12
29
47
64
137
154
171
188

M_A_DQSP0
M_A_DQSP1
M_A_DQSP2
M_A_DQSP3
M_A_DQSP4
M_A_DQSP5
M_A_DQSP6
M_A_DQSP7

3
3
3
3
3
3
3
3

11
28
46
63
136
153
170
187

BA0/BA1
BA1/BA0
BA2

5
7
15
17
4
6
16
18
21
23
33
35
22
24
34
36
39
41
51
53
40
42
50
52
57
59
67
69
56
58
68
70
129
131
141
143
130
132
140
142
147
149
157
159
146
148
158
160
163
165
175
177
164
166
174
176
181
183
191
193
180
182
192
194

M_A_DQ1
M_A_DQ0
M_A_DQ7
M_A_DQ6
M_A_DQ5
M_A_DQ4
M_A_DQ2
M_A_DQ3
M_A_DQ9
M_A_DQ8
M_A_DQ15
M_A_DQ11
M_A_DQ13
M_A_DQ12
M_A_DQ14
M_A_DQ10
M_A_DQ16
M_A_DQ21
M_A_DQ18
M_A_DQ23
M_A_DQ17
M_A_DQ20
M_A_DQ22
M_A_DQ19
M_A_DQ25
M_A_DQ24
M_A_DQ30
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ31
M_A_DQ26
M_A_DQ37
M_A_DQ36
M_A_DQ35
M_A_DQ39
M_A_DQ38
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ40
M_A_DQ41
M_A_DQ46
M_A_DQ47
M_A_DQ44
M_A_DQ45
M_A_DQ42
M_A_DQ43
M_A_DQ52
M_A_DQ49
M_A_DQ54
M_A_DQ51
M_A_DQ53
M_A_DQ48
M_A_DQ50
M_A_DQ55
M_A_DQ61
M_A_DQ60
M_A_DQ59
M_A_DQ58
M_A_DQ57
M_A_DQ56
M_A_DQ62
M_A_DQ63

CON_SODIMM200_STD_V1

3
3
3
3
3
3
3
3

M_A_DM0
M_A_DM1
M_A_DM2
M_A_DM3
M_A_DM4
M_A_DM5
M_A_DM6
M_A_DM7

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63

DDR3 SO-DIMM
(Standard )

M_A_DM[0..7]

109
108
79

VDD0
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17

75
76
81
82
87
88
93
94
99
100
105
106
111
112
117
118
123
124
3 M_A_BANK[0..2]

M_A_BANK0
M_A_BANK1
M_A_BANK2

A0
A1
A2
A3/A4
A4/A3
A5/A6
A6/A5
A7/A8
A8/A7
A9
A10/AP
A11
A12_BC#
A13
A14
A15/BA3

CN18

VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26

98
97
96
95
92
91
90
86
89
85
107
84
83
119
80
78

37
38
43
44
48
49
54
55
60
61
65
66
71
72
127

M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15

M_A_DQ[0..63]

CON_SODIMM200_STD_V1

+1.5VSUS

VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26

3 M_A_A[0..15]

Q7
MMBT3904
3

SMbus address A0

DIM2_SA0
DIM2_SA1
CPU_MEMHOT#

2,11

R122
R119

10K/F_4
10K/F_4

3,39 +SMDDR_VREF
2..4,6,36,39,41 +1.5VSUS
2,4,9..15,19,23,24,26,28..33,35..42
+3V
39 +0.75V_DDR_VTT
4

+3V

PROJECT : ZQ2
Quanta Computer Inc.

SMbus address A2

Size

Document Number

Rev
1A

DDR2 SODIMMS: A/B CHANNEL

Date:

Wednesday, May 27, 2009

1

Sheet

of

46

07
D

Place these Caps near So-Dimm H=8.

+1.5VSUS
C326
10u/6.3V_6

C333
10u/6.3V_6

C344
10u/6.3V_6

C297
0.1U/10V_4

C317
0.1U/10V_4

C342
10u/6.3V_6
C313
10u/6.3V_6

C307
10u/6.3V_6

C337
*.1u/16V_4

C306
*.1u/16V_4

C345
*.1u/16V_4

Place these Caps near So-Dimm H=4.

+1.5VSUS

C340
10u/6.3V_6

C339
10u/6.3V_6

C341
10u/6.3V_6

C329
0.1U/10V_4

C325
0.1U/10V_4

C323
10u/6.3V_6
C315
10u/6.3V_6

C305
10u/6.3V_6

C324
*.1u/16V_4

C308
*.1u/16V_4

C346
*.1u/16V_4

PROJECT : ZQ2
Quanta Computer Inc.
Size

Document Number

Rev
1A

DDR3 SODIMMS TERMINATIONS

Date:
5

Wednesday, May 27, 2009

1

Sheet

of

46

+1.5V_MEM_VDDQ

+1.5V_MEM_VDDQ

R587
SIDE@1K/F_4

C821

R585
SIDE@1K/F_4

SIDE@0.1u/10V_4

SPM_VREFDQ

SPM_VREFCA

C824

R588
SIDE@1K/F_4

SIDE@0.1u/10V_4

C822
SIDE@0.1u/10V_4

R586
SIDE@1K/F_4

HT_RXCAD0P
HT_RXCAD0N
HT_RXCAD1P
HT_RXCAD1N
HT_RXCAD2P
HT_RXCAD2N
HT_RXCAD3P
HT_RXCAD3N
HT_RXCAD4P
HT_RXCAD4N
HT_RXCAD5P
HT_RXCAD5N
HT_RXCAD6P
HT_RXCAD6N
HT_RXCAD7P
HT_RXCAD7N

HT_CADOUTP8
HT_CADOUTN8
HT_CADOUTP9
HT_CADOUTN9
HT_CADOUTP10
HT_CADOUTN10
HT_CADOUTP11
HT_CADOUTN11
HT_CADOUTP12
HT_CADOUTN12
HT_CADOUTP13
HT_CADOUTN13
HT_CADOUTP14
HT_CADOUTN14
HT_CADOUTP15
HT_CADOUTN15

AC24
AC25
AB25
AB24
AA24
AA25
Y22
Y23
W21
W20
V21
V20
U20
U21
U19
U18

HT_RXCAD8P
HT_RXCAD8N
HT_RXCAD9P
HT_RXCAD9N
HT_RXCAD10P
HT_RXCAD10N
HT_RXCAD11P
HT_RXCAD11N
HT_RXCAD12P
HT_RXCAD12N
HT_RXCAD13P
HT_RXCAD13N
HT_RXCAD14P
HT_RXCAD14N
HT_RXCAD15P
HT_RXCAD15N

HT_CLKOUTP0
HT_CLKOUTN0
HT_CLKOUTP1
HT_CLKOUTN1

T22
T23
AB23
AA22

HT_RXCLK0P
HT_RXCLK0N
HT_RXCLK1P
HT_RXCLK1N

HT_CTLOUTP0
HT_CTLOUTN0
HT_CTLOUTP1
HT_CTLOUTN1

M22
M23
R21
R20

U39
SPM_VREFCA M9
SPM_VREFDQ H2
C

SPM_A0
SPM_A1
SPM_A2
SPM_A3
SPM_A4
SPM_A5
SPM_A6
SPM_A7
SPM_A8
SPM_A9
SPM_A10
SPM_A11
SPM_A12
SPM_A13

N4
P8
P4
N3
P9
P3
R9
R3
T9
R4
L8
R8
N8
T4
T8
M8

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC
A13
A14
A15

SPM_BA0
SPM_BA1
SPM_BA2

M3
N9
M4

BA0
BA1
BA2

SPM_CLKP
SPM_CLKN
SPM_CKE

*SIDE@100/F_4

+1.5V_MEM_VDDQ

R592

VREFCA
VREFDQ

J8
K8
K10

SPM_ODT
SPM_CS#
SPM_RAS#
SPM_CAS#
SPM_WE#

K2
L3
J4
K4
L4

SPM_DQS0P
SPM_DQS1P

F4
C8

SPM_DM0
SPM_DM1

E8
D4

SPM_DQS0N
SPM_DQS1N

G4
B8

CK
CK
CKE
ODT
CS
RAS
CAS
WE
DQSL
DQSU
DML
DMU
DQSL
DQSU

SIDE@10K/F_4

T3

12 SP_DDR3_RST#
VMA_ZQ2

L9

RESET
ZQ

R594
SIDE@240/F_4
A

J2
L2
J10
L10

NC#J2
NC#L2
NC#J10
NC#L10

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

E4
F8
F3
F9
H4
H9
G3
H8

SPM_DQ2
SPM_DQ1
SPM_DQ5
SPM_DQ3
SPM_DQ7
SPM_DQ0
SPM_DQ4
SPM_DQ6

D8
C4
C9
C3
A8
A3
B9
A4

SPM_DQ13
SPM_DQ8
SPM_DQ10
SPM_DQ12
SPM_DQ15
SPM_DQ11
SPM_DQ14
SPM_DQ9

Ra
R398

301/F_4

HT_RXCALP
HT_RXCALN

C23
A24

HT_TXCAD0P
HT_TXCAD0N
HT_TXCAD1P
HT_TXCAD1N
HT_TXCAD2P
HT_TXCAD2N
HT_TXCAD3P
HT_TXCAD3N
HT_TXCAD4P
HT_TXCAD4N
HT_TXCAD5P
HT_TXCAD5N
HT_TXCAD6P
HT_TXCAD6N
HT_TXCAD7P
HT_TXCAD7N

PART 1 OF 6

D24
D25
E24
E25
F24
F25
F23
F22
H23
H22
J25
J24
K24
K25
K23
K22

HT_CADINP8
HT_CADINN8
HT_CADINP9
HT_CADINN9
HT_CADINP10
HT_CADINN10
HT_CADINP11
HT_CADINN11
HT_CADINP12
HT_CADINN12
HT_CADINP13
HT_CADINN13
HT_CADINP14
HT_CADINN14
HT_CADINP15
HT_CADINN15

HT_TXCLK0P
HT_TXCLK0N
HT_TXCLK1P
HT_TXCLK1N

H24
H25
L21
L20

HT_CLKINP0
HT_CLKINN0
HT_CLKINP1
HT_CLKINN1

M24
M25
P19
R18

HT_CTLINP0
HT_CTLINN0
HT_CTLINP1
HT_CTLINN1

B24
B25

HT_TXCALP R399
HT_TXCALN

HT_RXCALP
HT_RXCALN

HT_TXCALP
HT_TXCALN

HT_CADOUTP[15..0]

HT_CADOUTN[15..0]

HT_CLKOUTP[1..0]

HT_CLKOUTN[1..0]

HT_CLKOUTN[1..0]

HT_CTLOUTP[1..0]

HT_CTLOUTP[1..0]

HT_CTLOUTN[1..0]

HT_CTLOUTN[1..0]

HT_CADINP[15..0]

HT_CADINP[15..0]

HT_CADINN[15..0]

HT_CLKINN[1..0]

HT_CTLINP[1..0]

HT_CTLINN[1..0]

HT_CTLINN[1..0]

RS880

signals

HT_CLKINP[1..0]

HT_CTLINP[1..0]

HT_CADINN[15..0]

HT_CLKINN[1..0]

07

RX880

HT_TXCALP
HT_TXCALN

Ra
301 ohm 1%

Ra
1.21k ohm 1%

Rb
301 ohm 1%

Rb
1.21k ohm 1%

HT_RXCALP
HT_RXCALN
Rb
301/F_4

RES CHIP 1.21K 1/16W +-1%(0402)

P/N : CS21212FB18

RS880/RX881

This block is for UMA only , Discrete can remove all component

+1.5V_MEM_VDDQ

VDD#B3
VDD#D10
VDD#G8
VDD#K3
VDD#K9
VDD#N2
VDD#N10
VDD#R2
VDD#R10
VDDQ#A2
VDDQ#A9
VDDQ#C2
VDDQ#C10
VDDQ#D3
VDDQ#E10
VDDQ#F2
VDDQ#H3
VDDQ#H10
VSS#A10
VSS#B4
VSS#E2
VSS#G9
VSS#J3
VSS#J9
VSS#M2
VSS#M10
VSS#P2
VSS#P10
VSS#T2
VSS#T10
VSSQ#B2
VSSQ#B10
VSSQ#D2
VSSQ#D9
VSSQ#E3
VSSQ#E9
VSSQ#F10
VSSQ#G2
VSSQ#G10

B3
D10
G8
K3
K9
N2
N10
R2
R10

+1.5V_MEM_VDDQ

U22D

+1.5V_MEM_VDDQ

A2
A9
C2
C10
D3
E10
F2
H3
H10
A10
B4
E2
G9
J3
J9
M2
M10
P2
P10
T2
T10

+1.5V_MEM_VDDQ

PAR 4 OF 6

SPM_A0
SPM_A1
SPM_A2
SPM_A3
SPM_A4
SPM_A5
SPM_A6
SPM_A7
SPM_A8
SPM_A9
SPM_A10
SPM_A11
SPM_A12
SPM_A13

AB12
AE16
V11
AE15
AA12
AB16
AB14
AD14
AD13
AD15
AC16
AE13
AC14
Y14

SPM_BA0
SPM_BA1
SPM_BA2

AD16
AE17
AD17

SPM_RAS#
SPM_CAS#
SPM_WE#
SPM_CS#
SPM_CKE
SPM_ODT

W12
Y12
AD18
AB13
AB18
V14

SPM_CLKP
SPM_CLKN

V15
W14

SIDE@40.2/F_4 SPM_COMPP
SIDE@40.2/F_4 SPM_COMPN

R590
R591

AE12
AD12

MEM_A0(NC)
MEM_A1(NC)
MEM_A2(NC)
MEM_A3(NC)
MEM_A4(NC)
MEM_A5(NC)
MEM_A6(NC)
MEM_A7(NC)
MEM_A8(NC)
MEM_A9(NC)
MEM_A10(NC)
MEM_A11(NC)
MEM_A12(NC)
MEM_A13(NC)
MEM_BA0(NC)
MEM_BA1(NC)
MEM_BA2(NC)

MEM_RASb(NC)
MEM_CASb(NC)
MEM_WEb(NC)
MEM_CSb(NC)
MEM_CKE(NC)
MEM_ODT(NC)

MEM_DQ0/DVO_VSYNC(NC)
MEM_DQ1/DVO_HSYNC(NC)
MEM_DQ2/DVO_DE(NC)
MEM_DQ3/DVO_D0(NC)
MEM_DQ4(NC)
MEM_DQ5/DVO_D1(NC)
MEM_DQ6/DVO_D2(NC)
MEM_DQ7/DVO_D4(NC)
MEM_DQ8/DVO_D3(NC)
MEM_DQ9/DVO_D5(NC)
MEM_DQ10/DVO_D6(NC)
MEM_DQ11/DVO_D7(NC)
MEM_DQ12(NC)
MEM_DQ13/DVO_D9(NC)
MEM_DQ14/DVO_D10(NC)
MEM_DQ15/DVO_D11(NC)

AA18
AA20
AA19
Y19
V17
AA17
AA15
Y15
AC20
AD19
AE22
AC18
AB20
AD22
AC22
AD21

SPM_DQ0
SPM_DQ1
SPM_DQ2
SPM_DQ3
SPM_DQ4
SPM_DQ5
SPM_DQ6
SPM_DQ7
SPM_DQ8
SPM_DQ9
SPM_DQ10
SPM_DQ11
SPM_DQ12
SPM_DQ13
SPM_DQ14
SPM_DQ15

MEM_DQS0P/DVO_IDCKP(NC)
MEM_DQS0N/DVO_IDCKN(NC)
MEM_DQS1P(NC)
MEM_DQS1N(NC)

Y17
W18
AD20
AE21

SPM_DQS0P
SPM_DQS0N
SPM_DQS1P
SPM_DQS1N

MEM_DM0(NC)
MEM_DM1/DVO_D8(NC)

W17
AE19

SPM_DM0
SPM_DM1

IOPLLVDD18(NC)
IOPLLVDD(NC)

MEM_CKP(NC)
MEM_CKN(NC)

IOPLLVSS(NC)
MEM_COMPP(NC)
MEM_COMPN(NC)

MEM_VREF(NC)

AE23
AE24

IOPLLVDD18_SIDE_PORT
IOPLLVDD_SIDE_PORT

C819

R584
SIDE@1K/F_4

SIDE@0.1u/10V_4

SPM_VREF1

C820

R583
SP@1K/F_4

SIDE@0.1u/10V_4

IOPLLVDD18 - memory PLL

not applicable to RX881
L75
L76

SP@BLM18PG221SN1D(220_1.4A)_6+1.8V
SP@BLM18PG221SN1D(220_1.4A)_6+1.1V

15mA
26mA

AD23
AE18

SPM_VREF1

C818
SIDE@2.2u/6.3V_6

C817
SIDE@2.2u/6.3V_6

RS880/RX881

B2
B10
D2
D9
E3
E9
F10
G2
G10

40 mil~50 mil

W/I SP

W/O SP

R583

1K

L75

Bead

L76

Bead

0
A

+1.5V_MEM_VDDQ
SIDE@0.1u/10V_4

+1.5V

SIDE@1u/6.3V_4
R589

C825

C826

C830

C829

C828

100-BALL
SDRAM DDR3
SIDE@H5TQ1G63AFR-14C

SIDE@0_8

C827

PROJECT : ZQ2
Quanta Computer Inc.

SIDE@10u/6.3V_6
SIDE@0.1u/10V_4

SIDE@10u/6.3V_6

SIDE@1u/6.3V_4
Size

Document Number

Rev
1A

RS880M-HT LINK I/F 1/4

9,10,15,31,36,41,42 +1.8V
2,8..10,14,37 +1.1V
5

HT_CADOUTN[15..0]

HT_CLKOUTP[1..0]

HT_CLKINP[1..0]

F21
G21
G20
H21
J20
J21
J18
K17
L19
J19
M19
L18
M21
P21
P18
M18

HT_TXCTL0P
HT_TXCTL0N
HT_TXCTL1P
HT_TXCTL1N

HT_CADOUTP[15..0]

HT_CADINP0
HT_CADINN0
HT_CADINP1
HT_CADINN1
HT_CADINP2
HT_CADINN2
HT_CADINP3
HT_CADINN3
HT_CADINP4
HT_CADINN4
HT_CADINP5
HT_CADINN5
HT_CADINP6
HT_CADINN6
HT_CADINP7
HT_CADINN7

HT_TXCAD8P
HT_TXCAD8N
HT_TXCAD9P
HT_TXCAD9N
HT_TXCAD10P
HT_TXCAD10N
HT_TXCAD11P
HT_TXCAD11N
HT_TXCAD12P
HT_TXCAD12N
HT_TXCAD13P
HT_TXCAD13N
HT_TXCAD14P
HT_TXCAD14N
HT_TXCAD15P
HT_TXCAD15N

HT_RXCTL0P
HT_RXCTL0N
HT_RXCTL1P
HT_RXCTL1N

SBD_MEM/DVO_I/F

C823
SIDE@0.1u/10V_4

Y25
Y24
V22
V23
V25
V24
U24
U25
T25
T24
P22
P23
P25
P24
N24
N25

HYPER TRANSPORT CPU I/F

HT_CADOUTP0
HT_CADOUTN0
HT_CADOUTP1
HT_CADOUTN1
HT_CADOUTP2
HT_CADOUTN2
HT_CADOUTP3
HT_CADOUTN3
HT_CADOUTP4
HT_CADOUTN4
HT_CADOUTP5
HT_CADOUTN5
HT_CADOUTP6
HT_CADOUTN6
HT_CADOUTP7
HT_CADOUTN7

11/4

R593

U22A

SIDE PORT

Date:
2

Wednesday, May 27, 2009

1

Sheet

of

46

U22B

PEG_RXP0
PEG_RXN0
PEG_RXP1
PEG_RXN1
PEG_RXP2
PEG_RXN2
PEG_RXP3
PEG_RXN3
PEG_RXP4
PEG_RXN4
PEG_RXP5
PEG_RXN5
PEG_RXP6
PEG_RXN6
PEG_RXP7
PEG_RXN7
25
25

PCIE_RX1+
PCIE_RX1-

26
26

PCIE_RXP2
PCIE_RXN2

11
11
11
11
11
11
11
11

A_RXP0
A_RXN0
A_RXP1
A_RXN1
A_RXP2
A_RXN2
A_RXP3
A_RXN3

GFX_RX0P
GFX_RX0N
GFX_RX1P
GFX_RX1N
GFX_RX2P
GFX_RX2N
GFX_RX3P
GFX_RX3N
GFX_RX4P
GFX_RX4N
GFX_RX5P
GFX_RX5N
GFX_RX6P
GFX_RX6N
GFX_RX7P
GFX_RX7N
GFX_RX8P
GFX_RX8N
GFX_RX9P
GFX_RX9N
GFX_RX10P
GFX_RX10N
GFX_RX11P
GFX_RX11N
GFX_RX12P
GFX_RX12N
GFX_RX13P
GFX_RX13N
GFX_RX14P
GFX_RX14N
GFX_RX15P
GFX_RX15N

AE3
AD4
AE2
AD3
AD1
AD2
V5
W6
U5
U6
U8
U7

GPP_RX0P
GPP_RX0N
GPP_RX1P
GPP_RX1N
GPP_RX2P
GPP_RX2N
GPP_RX3P
GPP_RX3N
GPP_RX4P
GPP_RX4N
GPP_RX5P
GPP_RX5N

AA8
Y8
AA7
Y7
AA5
AA6
W5
Y5

SB_RX0P
SB_RX0N
SB_RX1P
SB_RX1N
SB_RX2P
SB_RX2N
SB_RX3P
SB_RX3N

A5
B5
A4
B4
C3
B2
D1
D2
E2
E1
F4
F3
F1
F2
H4
H3
H1
H2
J2
J1
K4
K3
K1
K2
M4
M3
M1
M2
N2
N1
P1
P2

TX2_HDMI+_C
TX2_HDMI-_C
TX1_HDMI+_C
TX1_HDMI-_C
TX0_HDMI+_C
TX0_HDMI-_C
TXC_HDMI+_C
TXC_HDMI-_C

PEG_TXP0_C
PEG_TXN0_C
PEG_TXP1_C
PEG_TXN1_C
PEG_TXP2_C
PEG_TXN2_C
PEG_TXP3_C
PEG_TXN3_C
PEG_TXP4_C
PEG_TXN4_C
PEG_TXP5_C
PEG_TXN5_C
PEG_TXP6_C
PEG_TXN6_C
PEG_TXP7_C
PEG_TXN7_C

C552
C551
C554
C553
C556
C555
C560
C559
C562
C561
C564
C563
C566
C565
C568
C567

SW@0.1U/10V_4
SW@0.1U/10V_4
SW@0.1U/10V_4
SW@0.1U/10V_4
SW@0.1U/10V_4
SW@0.1U/10V_4
SW@0.1U/10V_4
SW@0.1U/10V_4
SW@0.1U/10V_4
SW@0.1U/10V_4
SW@0.1U/10V_4
SW@0.1U/10V_4
SW@0.1U/10V_4
SW@0.1U/10V_4
SW@0.1U/10V_4
SW@0.1U/10V_4

GPP_TX0P
GPP_TX0N
GPP_TX1P
GPP_TX1N
GPP_TX2P
GPP_TX2N
GPP_TX3P
GPP_TX3N
GPP_TX4P
GPP_TX4N
GPP_TX5P
GPP_TX5N

AC1
AC2
AB4
AB3
AA2
AA1
Y1
Y2
Y4
Y3
V1
V2

PCIE_TXP0_C
PCIE_TXN0_C

C570
C569

0.1U/10V_4
0.1U/10V_4

PCIE_TXP2_C
PCIE_TXN2_C

C557
C558

0.1U/10V_4
0.1U/10V_4

SB_TX0P
SB_TX0N
SB_TX1P
SB_TX1N
SB_TX2P
SB_TX2N
SB_TX3P
SB_TX3N

AD7
AE7
AE6
AD6
AB6
AC6
AD5
AE5

A_TXP0_C
A_TXN0_C
A_TXP1_C
A_TXN1_C
A_TXP2_C
A_TXN2_C
A_TXP3_C
A_TXN3_C

C594
C591
C585
C588
C579
C582
C572
C575

PCE_CALRP(PCE_BCALRP)
PCE_CALRN(PCE_BCALRN)

AC8
AB8

NB_PCIECALRP
NB_PCIECALRN

R388
R389

PART 2 OF 6

PCIE I/F GFX

D4
C4
A3
B3
C2
C1
E5
F5
G5
G6
H5
H6
J6
J5
J7
J8
L5
L6
M8
L8
P7
M7
P5
M5
R8
P8
R6
R5
P4
P3
T4
T3

PCIE I/F GPP

GFX_TX0P
GFX_TX0N
GFX_TX1P
GFX_TX1N
GFX_TX2P
GFX_TX2N
GFX_TX3P
GFX_TX3N
GFX_TX4P
GFX_TX4N
GFX_TX5P
GFX_TX5N
GFX_TX6P
GFX_TX6N
GFX_TX7P
GFX_TX7N
GFX_TX8P
GFX_TX8N
GFX_TX9P
GFX_TX9N
GFX_TX10P
GFX_TX10N
GFX_TX11P
GFX_TX11N
GFX_TX12P
GFX_TX12N
GFX_TX13P
GFX_TX13N
GFX_TX14P
GFX_TX14N
GFX_TX15P
GFX_TX15N

PCIE I/F SB

C593
C590
C587
C584
C583
C580
C574
C576

16 PEG_RXN[7:0]

0.1U/10V_4
0.1U/10V_4
0.1U/10V_4
0.1U/10V_4
0.1U/10V_4
0.1U/10V_4
0.1U/10V_4
0.1U/10V_4

TX2_HDMI+
TX2_HDMITX1_HDMI+
TX1_HDMITX0_HDMI+
TX0_HDMITXC_HDMI+
TXC_HDMI-

24
24
24
24
24
24
24
24

16 PEG_RXP[7:0]

PEG_RXN[7:0]

PEG_TXN[7:0]

PEG_RXP[7:0]

PEG_TXP[7:0]

08

PEG_TXN[7:0] 16
PEG_TXP[7:0] 16

Close to North Bridge

HDMI

PEG_TXP0
PEG_TXN0
PEG_TXP1
PEG_TXN1
PEG_TXP2
PEG_TXN2
PEG_TXP3
PEG_TXN3
PEG_TXP4
PEG_TXN4
PEG_TXP5
PEG_TXN5
PEG_TXP6
PEG_TXN6
PEG_TXP7
PEG_TXN7

GPU

PCIE_TX1+ 25
PCIE_TX1- 25

To LAN
TO WLAN-2

PCIE_TXP2 26
PCIE_TXN2 26

0.1U/10V_4
0.1U/10V_4
0.1U/10V_4
0.1U/10V_4
0.1U/10V_4
0.1U/10V_4
0.1U/10V_4
0.1U/10V_4

A_TXP0
A_TXN0
A_TXP1
A_TXN1
A_TXP2
A_TXN2
A_TXP3
A_TXN3

1.27K/F_4
2K/F_4

11
11
11
11
11
11
11
11

SB

+1.1V

RS880/RX881

RS880 Display Port Support (muxed on GFX)

GFX_TX0,TX1,TX2 and TX3
B

DP0
AUX0 and HPD0
GFX_TX4,TX5,TX6 and TX7
DP1
AUX1 and HPD1

PROJECT : ZQ2
Quanta Computer Inc.
Size

Document Number

Rev
1A

RS880M-PCIE I/F 2/4

2,7,9,10,14,37 +1.1V
5

Date:
2

Wednesday, May 27, 2009

1

Sheet

of

46

All RS880 variants do not support analog TV-out

functionality. As such, Y, C_Pr, and COMP_Pb

NB_PWRGD_IN
INT_EDIDDATA
INT_EDIDCLK
HDMI_DDC_DATA

+1.8V_AVDDQ_NB

E17
F17
F15
23 INT_CRT_RED
23 INT_CRT_GRE

23 INT_CRT_BLU

R394

140/F_4

R395

150/F_4

R396

150/F_4

G18
G17
E18
F18
E19
F19
INT_CRT_HSYNC
INT_CRT_VSYNC

23 INT_CRT_HSYNC
23 INT_CRT_VSYNC
23 INT_DDCDATA
23 INT_DDCCLK

VGA

R140

715/F_6

A12
D14
B12

PLLVDD(NC)
PLLVDD18(NC)
PLLVSS(NC)

H17

VDDA18HTPLL

120mA

+1.8V_VDDA18PCIEPLL

D7
E7
D8
A10
C10
C12

NB_LDT_STOP#
NB_ALLOW_LDTSTOP

CLK_NB_REF_CLKP
CLK_NB_REF_CLKN

4.7K_4
4.7K_4

For A11 version

B18

R108
R105

*SP@49.9/F_4
*SP@49.9/F_4

T73
T72

CLK_SBLINKP
CLK_SBLINKN

C25
C24

HT_REFCLKP
HT_REFCLKN

E11
F11

REFCLK_P/OSCIN(OSCIN)
REFCLK_N(PWM_GPIO3)

GPP_REFCLKP
GPP_REFCLKN

U1
U2

GPP_REFCLKP
GPP_REFCLKN

V4
V3

GPPSB_REFCLKP(SB_REFCLKP)
GPPSB_REFCLKN(SB_REFCLKN)

A9
B9
B8
A8
B7
A7

23 INT_EDIDDATA
23 INT_EDIDCLK

DDC_DATA & DDC_CLK Not applicable to RX881

+NB_CORE_ON

B10
G11

RS880_AUX_CAL

T74

SYSRESETb
POWERGOOD
LDTSTOPb
ALLOW_LDTSTOP

T2
T1

24 HDMI_DDC_DATA
24 HDMI_DDC_CLK

2,7,8,10,14,37
7,10,15,31,36,41,42
2,4,5,10..15,19,23,24,26,28..33,35..42

09

C8

+1.1V
+1.8V
+3V

GFX_REFCLKP
GFX_REFCLKN

23
23
23
23
23
23

B16
A16
D16
D17

DAC_RSET(PWM_GPIO1)

VDDA18PCIEPLL1
VDDA18PCIEPLL2

LA_DATAP0
LA_DATAN0
LA_DATAP1
LA_DATAN1
LA_DATAP2
LA_DATAN2

B18
A18
A17
B17
D20
D21
D18
D19

TXOUT_U0P(NC)
TXOUT_U0N(NC)
TXOUT_U1P(PCIE_RESET_GPIO3)
TXOUT_U1N(PCIE_RESET_GPIO2)
TXOUT_U2P(NC)
TXOUT_U2N(NC)
TXOUT_U3P(PCIE_RESET_GPIO5)
TXOUT_U3N(NC)
TXCLK_LP(DBG_GPIO1)
TXCLK_LN(DBG_GPIO3)
TXCLK_UP(PCIE_RESET_GPIO4)
TXCLK_UN(PCIE_RESET_GPIO1)

NBGFX_CLKP
NBGFX_CLKN

11 CLK_SBLINKP
11 CLK_SBLINKN

38 +NB_CORE_ON

DAC_HSYNC(PWM_GPIO4)
DAC_VSYNC(PWM_GPIO6)
DAC_SDA(PCE_TCALRN)
DAC_SCL(PCE_RCALRN)

G14

+1.8V_VDDA18HTPLL

11 CLK_NB_REF_CLKP
11 CLK_NB_REF_CLKN

RED(DFT_GPIO0)
REDb(NC)
GREEN(DFT_GPIO1)
GREENb(NC)
BLUE(DFT_GPIO3)
BLUEb(NC)

DAC_RSET_NB

11 CLK_NB_HTREFP_PR
11 CLK_NB_HTREFN_PR

R101
R96

A22
B22
A21
B21
B20
A20
A19
B19

TXOUT_L0P(NC)
TXOUT_L0N(NC)
TXOUT_L1P(NC)
TXOUT_L1N(NC)
TXOUT_L2P(NC)
TXOUT_L2N(DBG_GPIO0)
TXOUT_L3P(NC)
TXOUT_L3N(DBG_GPIO2)

PART 3 OF 6

C_Pr(DFT_GPIO5)
Y(DFT_GPIO2)
COMP_Pb(DFT_GPIO4)

+1.1V_PLLVDD
+1.8V_PLLVDD18

20mA

11,33 A_RST#_SB
12,15 NB_PWRGD_IN

A11
B11
E8
F8

AVDD1(NC)
AVDD2(NC)
AVDDDI(NC)
AVSSDI(NC)
AVDDQ(NC)
AVSSQ(NC)

CRT/TVOUT

+3V

*4.7K_4
*4.7K_4
*4.7K_4
*4.7K_4

PLL PWR
LVTM

F12
E12
F14
G15
H15
H14

+1.8V_AVDDDI_NB
R130
R115
R118
R107

LA_CLK 23
LA_CLK# 23

VDDLTP18(NC)
VSSLTP18(NC)

A13
B13

+1.8V_VDDLTP18_NB

15mA

VDDLT18_1(NC)
VDDLT18_2(NC)
VDDLT33_1(NC)
VDDLT33_2(NC)

A15
B15
A14
B14

+1.8V_VDDLT_18_NB

300mA

C14
D15
C16
C18
C20
E20
C22

VSSLT1(VSS)
VSSLT2(VSS)
VSSLT3(VSS)
VSSLT4(VSS)
VSSLT5(VSS)
VSSLT6(VSS)
VSSLT7(VSS)

PM

For Check list JTAG

+3V

U22C
+3V_AVDD_NB

CLOCKs

E9
F7
G12

LVDS_DIGON(PCE_TCALRP)
LVDS_BLON(PCE_RCALRP)
LVDS_ENA_BL(PWM_GPIO2)

INT_LVDS_DIGON
23
INT_DPST_PWM 23
INT_LVDS_BLON 23

I2C_DATA
I2C_CLK
DDC_DATA/AUX0N(NC)
DDC_CLK/AUX0P(NC)
AUX1P(NC)
AUX1N(NC)

MIS.

D9
D10

TMDS_HPD(NC)
HPD(NC)

D12

TVCLKIN(PWM_GPIO5)

AE8
AD8

THERMALDIODE_P
THERMALDIODE_N

STRP_DATA
RSVD

INT_HDMI_HPD
R79

SUS_STAT#_NB

D13

TESTMODE

*Short_4

SUS_STAT#

24

12

R80
*3K/J_4
TEST_EN
R137
1.8K/F_4

AUX_CAL(NC)

RS880/RX881

RS880M --- ADD

L19
BLM18PG221SN1D(220_1.4A)_6
C208
2.2U/6.3V_6

RS880M
1 Disable
0 Enable

R391

INT_CRT_VSYNC

3K_4

+3V_AVDD_NB
1

+3V

Enables the Test Debug Bus using GPIO.

STRAP_DEBUG_BUS_GPIO_ENABLEb

C539
1u/6.3V_4

L63
BLM18PG221SN1D(220_1.4A)_6

+1.1V

AVDD-DAC Analog
not applicable to RX780

C600
2.2U/6.3V_6

+1.1V_PLLVDD

PLLVDD - Graphics PLL

not applicable to
RX780

+1.8V

L25
BLM18PG221SN1D(220_1.4A)_6
C242
2.2U/6.3V_6

+3V
+1.8V

+1.8V_VDDLTP18_NB

VDDLTP18 - LVDS or DVI/HDMI PLL

not applicable to RX780
B

R148

*Short_6

+1.8V_AVDDDI_NB
BLM21PG221SN1D(220,100M,2A)_8

C278
0.1U/10V_4

+1.8V_VDDLT_18_NB

AVDDI-DAC Digital
not applicable to RX780

+1.8V

RS880M: Enables Side port memory

RS880M:INT_CRT_HSYNC

L18
BLM18PG221SN1D(220_1.4A)_6

Selects if Memory SIDE PORT is available or not

1 = Memory Side port Not available
0 = Memory Side port available
Register Readback of strap: NB_CLKCFG:CLK_TOP_SPARE_D[1]

C209
2.2U/6.3V_6

L30
C268
L27
BLM18PG221SN1D(220_1.4A)_6

+1.8V_PLLVDD18

C250
*10U/6.3V_8

C248
4.7U/6.3V_6

+1.8V_AVDDQ_NB

AVDDQ-DAC Bandgap Reference

not applicable to RX780

C266

4.7U/6.3V_6

0.1U/10V_4

PLLVDD18 - Graphics PLL

not applicable to RX780

VDDLT18 - LVDS or DVI/HDMI

digital
not applicable to RX780

for B
R392

*SP@3K_4 +3V

R393

SIDE@3K_4

+1.8V

VDDA18PCIEPLL -PCIE PLL

L23

+1.8V

20mils width

+1.8V

BLM18PG221SN1D _6
C228
2.2U/6.3V_6

RS780/RX780/RS880
VDDA18HTPLL -HT LINK PLL
R390

+NB_CORE_ON

2K/F_4
L28

RS880_AUX_CAL

R387

NB_LDT_STOP#

Drain

- 74LVC07

20mils width

R132

1K/F_4

+1.8V_VDDA18HTPLL
2 CPU_LDT_REQ#

BLM18PG221SN1D _6
C260
2.2U/6.3V_6

Display Port interface from PCIeGraphics (RS880/rs880M only)

11 ALLOW_LDTSTOP

R123

*0_4

+1.8V

NB_ALLOW_LDTSTOP

for B
R129

*Short_4

EC-E

The RS880 family does not support CLMC architecture

The LDTREQ# connection from the CPU to
ALLOW_LDTSTOP of the Northbridge is no longer
required.

*150/F_4

Check----> no need DP

DDR3 based CPU : Level shifted to 1.8 V on the

Northbridge side using an open-drain buffer and
pulled up to 1.8V_S0 through a 2.2k Ohm 5% resistor
on the Northbridge side.

+ U5

2 Open

2,11 CPU_LDT_STOP#

For extrnal EEPROM Debug only

9/16 need modify PN

R81
2.2K/J_4

+1.8V_VDDA18PCIEPLL
5

INT_CRT_HSYNC

PROJECT : ZQ2
Quanta Computer Inc.
Size

Document Number

Rev
1A

RS880M-SYSTEM I/F 3/4

Date:
5

Wednesday, May 27, 2009

1

Sheet

of

46

VSSAPCIE1
VSSAPCIE2
VSSAPCIE3
VSSAPCIE4
VSSAPCIE5
VSSAPCIE6
VSSAPCIE7
VSSAPCIE8
VSSAPCIE9
VSSAPCIE10
VSSAPCIE11
VSSAPCIE12
VSSAPCIE13
VSSAPCIE14
VSSAPCIE15
VSSAPCIE16
VSSAPCIE17
VSSAPCIE18
VSSAPCIE19
VSSAPCIE20
VSSAPCIE21
VSSAPCIE22
VSSAPCIE23
VSSAPCIE24
VSSAPCIE25
VSSAPCIE26
VSSAPCIE27
VSSAPCIE28
VSSAPCIE29
VSSAPCIE30
VSSAPCIE31
VSSAPCIE32
VSSAPCIE33
VSSAPCIE34
VSSAPCIE35
VSSAPCIE36
VSSAPCIE37
VSSAPCIE38
VSSAPCIE39
VSSAPCIE40

U22F

PART 6/6

AE14
D11
G8
E14
E15
J15
J12
K14
M11
L15

10

VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10

A2
B1
D3
D5
E4
G1
G2
G4
H7
J4
R7
L1
L2
L4
L7
M6
N4
P6
R1
R2
R4
V7
U4
V8
V6
W1
W2
W4
W7
W8
Y6
AA4
AB5
AB1
AB7
AC3
AC4
AE1
AE4
AB2

VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
L12
M14
N13
P12
P15
R11
R14
T12
U14
U11
U15
V12
W11
W15
AC12
AA14
Y18
AB11
AB15
AB17
AB19
AE20
AB21
K11

A25
D23
E22
G22
G24
G25
H19
J22
L17
L22
L24
L25
M20
N22
P20
R19
R22
R24
R25
H20
U22
V19
W22
W24
W25
Y21
AD25

VSSAHT1
VSSAHT2
VSSAHT3
VSSAHT4
VSSAHT5
VSSAHT6
VSSAHT7
VSSAHT8
VSSAHT9
VSSAHT10
VSSAHT11
VSSAHT12
VSSAHT13
VSSAHT14
VSSAHT15
VSSAHT16
VSSAHT17
VSSAHT18
VSSAHT19
VSSAHT20
VSSAHT21
VSSAHT22
VSSAHT23
VSSAHT24
VSSAHT25
VSSAHT26
VSSAHT27

GROUND

+1.1V

+1.1V 2A for RS880M

0.6A

L26

0.7A

L34

C252
4.7U/6.3V_6

C255
0.1U/10V_4

C256
0.1U/10V_4

C274
4.7U/6.3V_6

C270
0.1U/10V_4

C280
0.1U/10V_4

C259
0.1U/10V_4

+1.1V_VDDHTRX

*Short_8

C279
0.1U/10V_4

+1.1V 2A for RS880M

L32

+1.1V

0.4A

*Short_6
C264
4.7U/6.3V_6

C262
0.1U/10V_4

+1.1V_VDDHTTX

C269
0.1U/10V_4

C263
0.1U/10V_4

C272
0.1U/10V_4

+1.8V 1A for RS780M+SB700

+1.8V

0.7A

L24

+1.8V_VDDA18PCIE

BLM21PG221SN1D(220,100M,2A)_8
C240
4.7U/6.3V_6

+1.8V

R138

C239
4.7U/6.3V_6

*Short_6

C236
0.1U/10V_4

C238
0.1U/10V_4

25mA

C231
0.1U/10V_4

C241
0.1U/10V_4

+1.8V_VDDG18_NB

VDD18-RS880 I/O Transform

C234
1U/10V_4

+1.8V

R146

+1.8V_VDD18_MEM

SIDE@0_6

VDD18_MEM For UMA RS880 only

Not applicable to RX780
memory I/O transform

C831
SP@1U/10V_4

2.5A

U22E
+1.1V_VDDHT

*Short_8

J17
K16
L16
M16
P16
R16
T16

VDDHT_1
VDDHT_2
VDDHT_3
VDDHT_4
VDDHT_5
VDDHT_6
VDDHT_7

H18
G19
F20
E21
D22
B23
A23

VDDHTRX_1
VDDHTRX_2
VDDHTRX_3
VDDHTRX_4
VDDHTRX_5
VDDHTRX_6
VDDHTRX_7

AE25
AD24
AC23
AB22
AA21
Y20
W19
V18
U17
T17
R17
P17
M17
J10
P10
K10
M10
L10
W9
H9
T10
R10
Y9
AA9
AB9
AD9
AE9
U10
F9
G9
AE11
AD11

PART 5/6

VDDHTTX_1
VDDHTTX_2
VDDHTTX_3
VDDHTTX_4
VDDHTTX_5
VDDHTTX_6
VDDHTTX_7
VDDHTTX_8
VDDHTTX_9
VDDHTTX_10
VDDHTTX_11
VDDHTTX_12
VDDHTTX_13

POWER

VDDA18PCIE_1
VDDA18PCIE_2
VDDA18PCIE_3
VDDA18PCIE_4
VDDA18PCIE_5
VDDA18PCIE_6
VDDA18PCIE_7
VDDA18PCIE_8
VDDA18PCIE_9
VDDA18PCIE_10
VDDA18PCIE_11
VDDA18PCIE_12
VDDA18PCIE_13
VDDA18PCIE_14
VDDA18PCIE_15

VDDPCIE_1
VDDPCIE_2
VDDPCIE_3
VDDPCIE_4
VDDPCIE_5
VDDPCIE_6
VDDPCIE_7
VDDPCIE_8
VDDPCIE_9
VDDPCIE_10
VDDPCIE_11
VDDPCIE_12
VDDPCIE_13
VDDPCIE_14
VDDPCIE_15
VDDPCIE_16
VDDPCIE_17
VDDC_1
VDDC_2
VDDC_3
VDDC_4
VDDC_5
VDDC_6
VDDC_7
VDDC_8
VDDC_9
VDDC_10
VDDC_11
VDDC_12
VDDC_13
VDDC_14
VDDC_15
VDDC_16
VDDC_17
VDDC_18
VDDC_19
VDDC_20
VDDC_21
VDDC_22
VDD_MEM1(NC)
VDD_MEM2(NC)
VDD_MEM3(NC)
VDD_MEM4(NC)
VDD_MEM5(NC)
VDD_MEM6(NC)

VDDG18_1(VDD18_1)
VDDG18_2(VDD18_2)
VDD18_MEM1(NC)
VDD18_MEM2(NC)

VDDG33_1(NC)
VDDG33_2(NC)

A6
B6
C6
D6
E6
F6
G7
H8
J9
K9
M9
L9
P9
R9
T9
V9
U9

+1.1V_VDD_PCIE

C219
0.1U/10V_4

C237
1U/10V_4

C232
1U/10V_4

0.95~1.1V@10A

K12
J14
U16
J11
K15
M12
L14
L11
M13
M15
N12
N14
P11
P13
P14
R12
R15
T11
T15
U12
T14
J16
AE10
AA11
Y11
AD10
AB10
AC10

C235
0.1U/10V_4

VDDPCIE - PCIE-E Main power

R134

*Short_8

+1.1V

C233
4.7U/6.3V_6

VDDC - Core Logic power

NB_CORE

C249
0.1U/10V_4

C246
0.1U/10V_4

C247
0.1U/10V_4

C244
0.1U/10V_4

C257
10U/6.3V_8

C253
0.1U/10V_4

C245
0.1U/10V_4

W/I SP
C832

0.1U

C243
0.1U/10V_4

C254
10U/6.3V_8

W/O SP

B01

100mA

SIDE@0_8
L77

+1.5V

C832
C833
C835
C836
C834
SIDE@0.1U/10V_4
SIDE@0.1U/10V_4
SP@0.1U/10V_4
SIDE@0.1U/10V_4
SIDE@4.7U/6.3V_6

Ra

RS880

H11
H12

RS880/RX881

+3V_VDDG33
C216
0.1U/10V_4

R106
C215
0.1U/10V_4

*Short_4

DIS remove L77 ,

add Ra(C832) as ohm to GND

+3V

60mA 3.3V(0.03A)

VDD33 - 3.3V I/O

Not applicable to RX780

PROJECT : ZQ2
Quanta Computer Inc.
31,38
2,7..9,14,37
7,9,15,31,36,41,42
2,4,5,9,11..15,19,23,24,26,28..33,35..42
5

NB_CORE
+1.1V
+1.8V
+3V

Size

Document Number

Rev
1A

RS880M-POWER4/4
Date:
2

Wednesday, May 27, 2009

1

Sheet

10

of

46

C730

11

180P/50V_4
U29A

590/F_4
2K/F_4

PCIE_CALRP_SB
PCIE_CALRN_SB

AD29
AD28

PCIE_CALRP
PCIE_CALRN

AA28
AA29
Y29
Y28
Y26
Y27
W28
W29

GPP_TX0P
GPP_TX0N
GPP_TX1P
GPP_TX1N
GPP_TX2P
GPP_TX2N
GPP_TX3P
GPP_TX3N

AA22
Y21
AA25
AA24
W23
V24
W24
W25

GPP_RX0P
GPP_RX0N
GPP_RX1P
GPP_RX1N
GPP_RX2P
GPP_RX2N
GPP_RX3P
GPP_RX3N

9 CLK_SBLINKP
9 CLK_SBLINKN
9 CLK_NB_REF_CLKP
9 CLK_NB_REF_CLKN
9 CLK_NB_HTREFP_PR
9 CLK_NB_HTREFN_PR
2 CLK_CPU_BCLKP_PR
2 CLK_CPU_BCLKN_PR
RP4

16 CLK_PCIE_VGAP
16 CLK_PCIE_VGAN

UMA Don't stuff

4
2

INT

3 SW@0X2
1

CLK_SBLINKP
CLK_SBLINKN

M23
P23

PCIE_RCLKP/NB_LNK_CLKP
PCIE_RCLKN/NB_LNK_CLKN

CLK_NB_REF_CLKP
CLK_NB_REF_CLKN

U29
U28

NB_DISP_CLKP
NB_DISP_CLKN

CLK_NB_HTREFP_PR
CLK_NB_HTREFN_PR

T26
T27

NB_HT_CLKP
NB_HT_CLKN

CLK_CPU_BCLKP_PR
CLK_CPU_BCLKN_PR

V21
T21

CPU_HT_CLKP
CPU_HT_CLKN

SLT_GFX_CLKP
SLT_GFX_CLKN
CLK_PCIE_LOM
CLK_PCIE_LOM#

25 CLK_PCIE_LOM
25 CLK_PCIE_LOM#

V23
T23

SLT_GFX_CLKP
SLT_GFX_CLKN

L29
L28

GPP_CLK0P
GPP_CLK0N

N29
N28

CLK_PCIE_WLANP_2
CLK_PCIE_WLANN_2

26 CLK_PCIE_WLANP_2
26 CLK_PCIE_WLANN_2

M29
M28

GPP_CLK2P
GPP_CLK2N

T25
V25

GPP_CLK3P
GPP_CLK3N

L24
L23

GPP_CLK4P
GPP_CLK4N

P25
M25

GPP_CLK5P
GPP_CLK5N

P29
P28

GPP_CLK6P
GPP_CLK6N

N26
N27

16 CLK_14M_VGA

INTE#/GPIO32
INTF#/GPIO33
INTG#/GPIO34
INTH#/GPIO35

GPP_CLK1P
GPP_CLK1N

LPCCLK0
LPCCLK1
LAD0
LAD1
LAD2
LAD3
LFRAME#
LDRQ0#
LDRQ1#/CLK_REQ6#/GPIO49
SERIRQ/GPIO48

GPP_CLK7P
GPP_CLK7N

T29
T28

GPP_CLK8P
GPP_CLK8N

CLK_14M_VGA

L25

14M_25M_48M_OSC

25M_X1

L26

ALLOW_LDTSTP/DMA_ACTIVE#
PROCHOT#
LDT_PG
LDT_STP#
LDT_RST#

25M_X1

27P/50V_4

25M_X2

L27

25M_X2

RTCCLK
INTRUDER_ALERT#
VDDBT_RTC_G

SB_GPIO_PCIE_RST#

12

U14
TC7SH08FU
*0_4

+AVBAT
BOARD_ID0
BOARD_ID1
BOARD_ID2
BOARD_ID3
BOARD_ID4

BOARD_ID0
BOARD_ID1
BOARD_ID2
BOARD_ID3
BOARD_ID4

20MIL

13
13
13
13
13

For RTC
R441

499/F_4

20MIL

C636
R436
1U/10V_4

+3VRTC_1

10/J_4

20MIL

D19
RB500V-40

+3VRTC

T110

AD23

15

AD25
AD26
AD27

15
15
15

R438
AD24
R284

*Short_4

20MIL

+BAT

13

EC-E

SB820_MEMHOT#
+3V

+VCCRTC_2
1
1K/F_4

20MIL

15

VDDR_1.05_EN

+3VPCU

D18
RB500V-40

Change from 0ohm to 1K

for safty issue

BAT1

+3V

BAT_CONN
R538
*2.2K/J_4

R523
2.2K/J_4

Q34
RTC_X1

CPU_MEMHOT# 2,5

Y8

*MMBT3904

T109

4
+3V

*10K_4
T56

RTC_X2

1
32.768KHZ

PCH_ODD_EN

27
dGPU_VRON

CLKRUN#_R

R520

T66
R422

R274

*Short_4

*20M/J_6

19

CLKRUN# 33

R518

20M/J_6

C728
18P/50V_4

T65

C727
18P/50V_4

dGPU_PWROK 19
B

dGPU_RST_GPIO

16

For STRAPS
LPC_CLK0
LPC_CLK1

H24
H25
J27
J26
H29
H28
G28
J25
AA18
AB19

R478
R473

LPC_CLK0 15
LPC_CLK1 15
PCLK_DEBUG 26
CLK_PCI_775 33

22/J_4
22/J_4
LPC_LAD0 26,33
LPC_LAD1 26,33
LPC_LAD2 26,33
LPC_LAD3 26,33
LPC_LFRAME# 26,33

LDRQ0#_SB
LDRQ1#_SB

C667
C676
*22P/50V_4

*5.6P/50V_4

for EMI
suggestion

T49
T53
IRQ_SERIRQ 33

G21
H21
K19
G22
J24

*10K/F_4

ALLOW_LDTSTOP 9

R247

CPU_PROCHOT#

+3V_S5
2

CPU_PWRGD 2
CPU_LDT_STOP# 2,9
CPU_LDT_RST# 2

C1

RTC_X1

C2

RTC_X2

D2
B2
B1

INTRUDER_ALERT# Left not connected

(Southbridge has 50-kohm internal
pull-up to VBAT).

INTRUDER_ALERT#

RTC_CLK 33

*1M/F_4

+AVBAT
C726
0.1U/10V_4

PROJECT : ZQ2
Quanta Computer Inc.

G1
*SHORT_ PAD1

+AVBAT

R517

Size

12..15,25,30,31,35 +3V_S5
14 +1.1V_PCIE_VDDR
2,4,5,9,10,12..15,19,23,24,26,28..33,35..42
+3V
5

10p/50V_4
R308

AJ6
AG6
AG4
AJ4

IC CTRL(528P) SB710 A14(218-0660017)

P/N : AJ066000T01

27P/50V_4

A_RST#_SB

T111

SB800 A11
C421

2
4

C493

GPU
MINI-PCIE
Card reader

R240
1M/J_4

32K_X2

A_RST#_AND

16,25,26 A_RST#

AA1
AA4
AA3
AB1
AA5
AB2
AB6
AB5
AA6
AC2
AC3
AC4
AC1
AD1
AD2
AC6
AE2
AE1
AF8
AE3
AF1
AG1
AF2
AE9
AD9
AC11
AF6
AF4
AF3
AH2
AG2
AH3
AA8
AD5
AD8
AA10
AE8
AB9
AJ3
AE7
AC5
AF5
AE6
AE4
AE11
AH5
AH4
AC12
AD12
AJ5
AH6
AB12
AB11
AD7

For AMD RST

0.1u/10V_4

R310
33/J_4

V2

25MHz
Y5

RTC

32K_X1
C423

C492

A_RX0P
A_RX0N
A_RX1P
A_RX1N
A_RX2P
A_RX2N
A_RX3P
A_RX3N

15
15
15
15

AE24
AE23
AD25
AD24
AC24
AC25
AB25
AB24

AD0/GPIO0
AD1/GPIO1
AD2/GPIO2
AD3/GPIO3
AD4/GPIO4
AD5/GPIO5
AD6/GPIO6
AD7/GPIO7
AD8/GPIO8
AD9/GPIO9
AD10/GPIO10
AD11/GPIO11
AD12/GPIO12
AD13/GPIO13
AD14/GPIO14
AD15/GPIO15
AD16/GPIO16
AD17/GPIO17
AD18/GPIO18
AD19/GPIO19
AD20/GPIO20
AD21/GPIO21
AD22/GPIO22
AD23/GPIO23
AD24/GPIO24
AD25/GPIO25
AD26/GPIO26
AD27/GPIO27
AD28/GPIO28
AD29/GPIO29
AD30/GPIO30
AD31/GPIO31
CBE0#
CBE1#
CBE2#
CBE3#
FRAME#
DEVSEL#
IRDY#
TRDY#
PAR
STOP#
PERR#
SERR#
REQ0#
REQ1#/GPIO40
REQ2#/CLK_REQ8#/GPIO41
REQ3#/CLK_REQ5#/GPIO42
GNT0#
GNT1#/GPO44
GNT2#/GPO45
GNT3#/CLK_REQ7#/GPIO46
CLKRUN#
LOCK#

PCI_CLK1
PCI_CLK2
PCI_CLK3
PCI_CLK4

A_TXP0
A_TXN0
A_TXP1
A_TXN1
A_TXP2
A_TXN2
A_TXP3
A_TXN3

PCIRST#

+3V_S5

T107

A_TX0P
A_TX0N
A_TX1P
A_TX1N
A_TX2P
A_TX2N
A_TX3P
A_TX3N

PCI_CLK0
PCI_CLK1
PCI_CLK2
PCI_CLK3
PCI_CLK4

W2
W1
W3
W4
Y1

+1.1V_PCIE_VDDR

AD26
AD27
AC28
AC29
AB29
AB28
AB26
AB27

PCICLK0
PCICLK1/GPO36
PCICLK2/GPO37
PCICLK3/GPO38
PCICLK4/14M_OSC/GPO39

PCI INTERFACE

A_TXP0
A_TXN0
A_TXP1
A_TXN1
A_TXP2
A_TXN2
A_TXP3
A_TXN3
R458
R244

A_RX0P_C
A_RX0N_C
A_RX1P_C
A_RX1N_C
A_RX2P_C
A_RX2N_C
A_RX3P_C
A_RX3N_C

0.1U/10V_4
0.1U/10V_4
0.1U/10V_4
0.1U/10V_4
0.1U/10V_4
0.1U/10V_4
0.1U/10V_4
0.1U/10V_4

Part 1 of 5

LPC

8
8
8
8
8
8
8
8

PCIE_RST#
A_RST#

PCI CLKS

C651
C652
C641
C642
C645
C646
C653
C654

A_RXP0
A_RXN0
A_RXP1
A_RXN1
A_RXP2
A_RXN2
A_RXP3
A_RXN3

SB800

P1
L1

CPU

To RS880

PLACE CAPS
VERY CLOSE TO
BALL OF SB820

8
8
8
8
8
8
8
8

PCIE_RST#_SB
A_RST#_SB

33/J_4

PCI EXPRESS INTERFACES

R530

CLOCK GENERATOR

NB, EC

26,29 PCIE_RST#
9,33 A_RST#_SB

Document Number

Rev
1A

SB820-PCIE/PCI/CPU/LPC 1/4
Date:
3

Wednesday, May 27, 2009

1

Sheet

11

of

46

+3V_S5

NC only ,Can't be install

R514

*2.2K/J_4

SB_TEST0

R313

*2.2K/J_4

SB_TEST1

11,13..15,25,30,31,35
2,4,5,9..11,13..15,19,23,24,26,28..33,35..42

12

USBCLK/41M_25M_48M_OSC pin is CLK input

pin when EXT CLKGEN mode.
It is output CLK source when INT CLKGEN mode.

+3V_S5
+3V

U29D

is 3V tolerance
AMD datasheet define it
R249

2.2K/J_4

PCLK_SMB

R246

2.2K/J_4

PDAT_SMB

Clock gen/Robson/TV
tuner
/DDR2/DDR2
thermal/Accelerometer

SB_TEST0
SB_TEST1
SB_TEST2

33 SIO_A20GATE
33 SIO_RCIN#

SIO_RCIN#
LANLINK_STATE#

T105
33 SIO_EXT_SMI#
33 SIO_EXT_SCI#

SYS_RST#

T108
+3V_S5

R287
R306
+3V_S5

25,26 PCIE_WAKE#

SCL1/SDATA1 is 3V/S5 tolerance

AMD datasheet define it

SB_GPIO_PCIE_RST#
SB_GPIO59
PCLK_SMB
PDAT_SMB
SB_SMBCLK1
SB_SMBDATA1

+3V
C

R296

4.7K/J_4

IR_RX1
SB_THERMTRIP#

G1

11 SB_GPIO_PCIE_RST#
25 CLK_PCIE_LAN_REQ#
19 dGPU_PWR_EN
T51
28
SPKR
5,25,26 PCLK_SMB
5,25,26 PDAT_SMB

SB_SCLK2
SB_SDATA2

10K_4
10K_4

*Short_4

33 ICH_RSMRST#

SCL2/SDATA2 is 3V/S5 tolerance

AMD datasheet define it
R252
R248

T106
R295

2 CPU_THERMTRIP#
9,15 NB_PWRGD_IN

SB_SMBCLK1
SB_SMBDATA1

10K_4
10K_4

26 CLK_PCIE_2_REQ#
17 VGA_REQ#

SUS_STAT#

VGA_REQ#_GPIO61
*Short_4

R427

EC-E
7 SP_DDR3_RST#

11/04 need check

E_SB_OSC

T118
30
OC_7#
30
OC_6#
2,4,32 PM_THERM#
30
OC_4#

AD19
AA16
AB21
AC18
AF20
AE19
AF19
AD22
AE22
F5
F4
AH21
AB18
E1
AJ21
H4
D5
D7
G5
K3
AA20
H3
D1
E4
D4
E8
F7
E7
F8

SB_JTAG_TDO
SB_JTAG_TCK
SB_JTAG_TDI
SB_JTAG_RST#

PCI_PME#/GEVENT4#
RI#/GEVENT22#
SPI_CS3#/GBE_STAT1/GEVENT21#
SLP_S3#
SLP_S5#
PWR_BTN#
PWR_GOOD
SUS_STAT#
Part 4 of 5
TEST0
TEST1/TMS
TEST2
GA20IN/GEVENT0#
KBRST#/GEVENT1#
LPC_PME#/GEVENT3#
LPC_SMI#/GEVENT23#
GEVENT5#
SYS_RESET#/GEVENT19#
WAKE#/GEVENT8#
IR_RX1/GEVENT20#
THRMTRIP#/SMBALERT#/GEVENT2#
NB_PWRGD

SB800

USBCLK/14M_25M_48M_OSC
USB_RCOMP

USB 1.1 USB MISC

+3V SCL0/SDATA0

J2
K1
D3
F1
H1
F2
H5
G6
B3
C4
F6
AD21
AE21
K2
J29
H2
J1
H6
F3
J6
AC19

ACPI / WAKE UP EVENTS

SUSC#

USB_FSD0P/GPIO185
USB_FSD0N
USB_HSD13P
USB_HSD13N

BLINK/USB_OC7#/GEVENT18#
USB_OC6#/IR_TX1/GEVENT6#
USB_OC5#/IR_TX0/GEVENT17#
USB_OC4#/IR_RX0/GEVENT16#
USB_OC3#/AC_PRES/TDO/GEVENT15#
USB_OC2#/TCK/GEVENT14#
USB_OC1#/TDI/GEVENT13#
USB_OC0#/TRST#/GEVENT12#

G19

USB_RCOMP_SB

T83
R270

11.8K/F_6

J10
H11
H9
J8

USB_FDS12P
USB_FSD12N

B12
A12

T62
T58
USBP13+
USBP13-

23
23

CAMERA

USBP12+ 30
USBP12- 30

USBX3 board

USB_HSD11P
USB_HSD11N

E14
E12

USBP11+ 30
USBP11- 30

USBX3 board

USB_HSD10P
USB_HSD10N

J12
J14

USBP10+ 29
USBP10- 29

Card reader

USB_HSD9P
USB_HSD9N

A13
B13

USBP9+
USBP9-

30
30

BLUETOOTH

D13
C13

USBP8+
USBP8-

30
30

USBX3 board

USB_HSD8P
USB_HSD8N
USB_HSD7P
USB_HSD7N

G12
G14

USB_HSD6P
USB_HSD6N

G16
G18

USB_HSD5P
USB_HSD5N

D16
C16

USB_HSD4P
USB_HSD4N

B14
A14

USB_HSD3P
USB_HSD3N
USB_HSD2P
USB_HSD2N
USB_HSD1P
USB_HSD1N
USB_HSD0P
USB_HSD0N

R535
R294
R304
R292

*10K_4
*10K_4
*10K_4
*10K_4

10K_4
10K_4

GBE_COL
GBE_CRS

10K_4

GBE_MDIO

10K_4

GBE_RXERR

10K_4

GBE_PHY_INTR

CLK_PCIE_LAN_REQ#
CLK_PCIE_2_REQ#
+3V_S5
R301
R291
R293

D03
R300

To Azalia
ACZ_SDOUT

R532

33/J_4
C732

ACZ_SYNC

R531

33/J_4
C731

ACZ_BCLK

R534

33/J_4

ACZ_RST#

R529

33/J_4

C733

ACZ_SDIN0

ACZ_SDOUT_AUDIO

R290

28

*10P/50V_4

ACZ_SYNC_AUDIO

T50
28

*10P/50V_4

ACZ_BITCLK_AUDIO

28

*10P/50V_4

ACZ_RST#_AUDIO
ACZ_SDIN0 28

28

ADP_PRES0

E23
E24
F21
G29

C485
10P/50V_4

D27
F28
F29
E27

+3V_S5
CN12

1
2
3
4
5
6
7
8
*S/W JTAG DEBUG

T1
T4
L6
L5
T9
U1
U3
T2
U2
T5
V5
P5
M5
P9
T7
P7
M7
P4
M9
V7

SB_JTAG_TCK
SB_JTAG_TDO
SB_JTAG_TDI
SB_TEST1

GBE_COL
GBE_CRS
GBE_MDCK
GBE_MDIO
GBE_RXCLK
GBE_RXD3
GBE_RXD2
GBE_RXD1
GBE_RXD0
GBE_RXCTL/RXDV
GBE_RXERR
GBE_TXCLK
GBE_TXD3
GBE_TXD2
GBE_TXD1
GBE_TXD0
GBE_TXCTL/TXEN
GBE_PHY_PD
GBE_PHY_RST#
GBE_PHY_INTR

PS2_DAT/SDA4/GPIO187
PS2_CLK/SCL4/GPIO188
SPI_CS2#/GBE_STAT2/GPIO166
FC_RST#/GPO160
PS2KB_DAT/GPIO189
PS2KB_CLK/GPIO190
PS2M_DAT/GPIO191
PS2M_CLK/GPIO192

KSI_0/GPIO201
KSI_1/GPIO202
KSI_2/GPIO203
KSI_3/GPIO204
KSI_4/GPIO205
KSI_5/GPIO206
KSI_6/GPIO207
KSI_7/GPIO208

EMBEDDED CTRL

8.2K_4
8.2K_4

USBP4+
USBP4-

26
26

WLAN Min-Card

30
30

On Board USB Connector

E18
E16
J16
J18
B17
A17

T55
T54

A16
B16

USBP0+
USBP0-

KSO_0/GPIO209
KSO_1/GPIO210
KSO_2/GPIO211
KSO_3/GPIO212
KSO_4/GPIO213
KSO_5/GPIO214
KSO_6/GPIO215
KSO_7/GPIO216
KSO_8/GPIO217
KSO_9/GPIO218
KSO_10/GPIO219
KSO_11/GPIO220
KSO_12/GPIO221
KSO_13/GPIO222
KSO_14/GPIO223
KSO_15/GPIO224
KSO_16/GPIO225
KSO_17/GPIO226

D25
F23
B26
E26
F25
E22
F22
E21

SB_SCLK2
SB_SDATA2
SB_GPIO195
SB_GPIO196
T122
GPIO199
GPIO200

15
15

G24
G25
E28
E29
D29
D28
C29
C28
B28
A27
B27
D26
A26
C26
A24
B25
A25
D24
B24
C24
B23
A23
D22
C22
A22
B22

Check list
SB_GPIO195

R245

10K/F_4

SB_GPIO196

R243

10K/F_4
A

PROJECT : ZQ2
Quanta Computer Inc.

SB800 A11
SB_JTAG_RST#

Size

JTAG DEBUG

Document Number

Rev
1A

SB820-ACPI/GPIO/USB 2/4
Date:

EC-C

Only USB Port0 can be

configured as debug port.
SCL2/GPIO193
SDA2/GPIO194
SCL3_LV/GPIO195
SDA3_LV/GPIO196
EC_PWM0/EC_TIMER0/GPIO197
EC_PWM1/EC_TIMER1/GPIO198
EC_PWM2/EC_TIMER2/GPIO199
EC_PWM3/EC_TIMER3/GPIO200

EMBEDDED CTRL

R501
R551

AZ_BITCLK
AZ_SDOUT
AZ_SDIN0/GPIO167
AZ_SDIN1/GPIO168
AZ_SDIN2/GPIO169
AZ_SDIN3/GPIO170
AZ_SYNC
AZ_RST#

HD AUDIO

ACZ_SDOUT

B05

M3
N1
L2
M2
M1
M4
N2
P2

GBE LAN

15
+3V

ACZ_BCLK
ACZ_SDOUT
ACZ_SDIN0
ACZ_SDIN1
ACZ_SDIN2
ACZ_SDIN3
ACZ_SYNC
ACZ_RST#

*10K_4

EC-C

EC-C

HD audio interface is +3VS5 voltage

R533

EC-C

F11
E11

USB_HSD12P
USB_HSD12N

RSMRST#
CLK_REQ4#/SATA_IS0#/GPIO64
CLK_REQ3#/SATA_IS1#/GPIO63
SMARTVOLT1/SATA_IS2#/GPIO50
CLK_REQ0#/SATA_IS3#/GPIO60
SATA_IS4#/FANOUT3/GPIO55
SATA_IS5#/FANIN3/GPIO59
SPKR/GPIO66
SCL0/GPIO43
SDA0/GPIO47
SCL1/GPIO227
SDA1/GPIO228
CLK_REQ2#/FANIN4/GPIO62
CLK_REQ1#/FANOUT4/GPIO61
IR_LED#/LLB#/GPIO184
SMARTVOLT2/SHUTDOWN#/GPIO51
DDR3_RST#/GEVENT7#
GBE_LED0/GPIO183
GBE_LED1/GEVENT9#
GBE_LED2/GEVENT10#
GBE_STAT0/GEVENT11#
CLK_REQG#/GPIO65/OSCIN

A10

USB_FSD1P/GPIO186
USB_FSD1N

USB 2.0

33
SUSB#
33
SUSC#
33
DNBSWON#
15 SB_PWRGD_IN
9
SUS_STAT#

GPIO

T69

SB_TEST2

*2.2K/J_4

USB OC

R305

USB_14_48M

Wednesday, May 27, 2009

1

Sheet

12

of

46

SATA PORT 0,1,2,3

can support AHCI
mode

SATA ODD

27
27

SATA_TX0+
SATA_TX0-

27
27

SATA_RX0SATA_RX0+

27
27

SATA_TX1+
SATA_TX1-

27
27

SATA_RX1SATA_RX1+

C708
C707

SATA_TX0+_C
SATA_TX0-_C

0.01u/16V_4
0.01u/16V_4

C712
C704

SATA_TX1+_C
SATA_TX1-_C

0.01u/16V_4
0.01u/16V_4

AH9
AJ9

SATA_RX0N
SATA_RX0P

AH10
AJ10

SATA_TX1P
SATA_TX1N

AG10
AF10

AJ12
AH12

Signal Name

AH14
AJ14

Explanation
SB800 A11: 800-? 1% resistor to GND.

AG14
AF14

SB800 A12: TBD-? 1% resistor to GND. (1K ohm)

AG17
AF17

SB800 A11: 931-? 1% resistor to VDDAN_11_SATA.

SATA_CALRN

SB800 A12: TBD-? 1% resistor to VDDAN_11_SATA.

AJ17
AH17
AJ18
AH18

E-SATA

AH19
AJ19

FC_CLK
FC_FBCLKOUT
FC_FBCLKIN

Part 2 of 5

FC_OE#/GPIOD145
FC_AVD#/GPIOD146
FC_WE#/GPIOD148
FC_CE1#/GPIOD149
FC_CE2#/GPIOD150
FC_INT1/GPIOD144
FC_INT2/GPIOD147

SATA_RX1N
SATA_RX1P
SATA_TX2P
SATA_TX2N
SATA_RX2N
SATA_RX2P
SATA_TX3P
SATA_TX3N
SATA_RX3N
SATA_RX3P
SATA_TX4P
SATA_TX4N
SATA_RX4N
SATA_RX4P
SATA_TX5P
SATA_TX5N
SATA_RX5N
SATA_RX5P

FC_ADQ0/GPIOD128
FC_ADQ1/GPIOD129
FC_ADQ2/GPIOD130
FC_ADQ3/GPIOD131
FC_ADQ4/GPIOD132
FC_ADQ5/GPIOD133
FC_ADQ6/GPIOD134
FC_ADQ7/GPIOD135
FC_ADQ8/GPIOD136
FC_ADQ9/GPIOD137
FC_ADQ10/GPIOD138
FC_ADQ11/GPIOD139
FC_ADQ12/GPIOD140
FC_ADQ13/GPIOD141
FC_ADQ14/GPIOD142
FC_ADQ15/GPIOD143

FANOUT0/GPIO52
FANOUT1/GPIO53
FANOUT2/GPIO54
FANIN0/GPIO56
FANIN1/GPIO57
FANIN2/GPIO58

+1.1V_AVDD_SATA
R271
R267

30

SATA_CALRP
SATA_CALRN

SP@1K/F_4
SP@931/F_4

SATA_ACT#
+3V

SATA_CALRP
SATA_CALRN

AD11

SATA_ACT#/GPIO67

AD16

SATA_X1

AC16

SATA_X2

TEMPIN0/GPIO171
TEMPIN1/GPIO172
TEMPIN2/GPIO173
TEMPIN3/TALERT#/GPIO174
TEMP_COMM

10K/F_4
SATA_X1

*27P/50V_4

C694

R277

AB14
AA14

HW MONITOR

SATA_TX0P
SATA_TX0N

AJ8
AH8

AG12
AF12

SATA_CALRP

13

Check list
SB800

FLASH

U29B

SERIAL ATA

SATA HDD

*25MHz R483
Y6
*1M/J_4

PLACE SATA_CAL
RES VERY CLOSE
TO BALL OF SB820

SATA_X2

T84
T79
T80

AF28
AG29
AG26
AF27
AE29
AF29
AH27

T81
T75
T82
T77
T78
T76
T85

AJ27
AJ26
AH25
AH24
AG23
AH23
AJ22
AG21
AF21
AH22
AJ23
AF23
AJ24
AJ25
AG25
AH26

T86
T87
T89
T88
T90
T91
T94
T101
T97
T93
T92
T95
T114
T115
T116
T117

W5
W6
Y9

BT_OFF#

W7
V9
W8

WWAN_DET#
CPPE_NC1#
CRD_REQ1#

B6
A6
A5
B5
C7

TEMPIN0
TEMPIN1
MB_THRMDA_SB
SB_GPIO174
TEMP_COMM

A3
B4
A4
C5
A7
B7
B8
A8

SB_GPIO175
SB_GPIO176
SIDE_PORT_ID0
SIDE_PORT_ID1
MEM_1V5

T61
T64
T68
T57
T70

SB_GPIO164
SB_GPIO163
SB_GPIO162
SB_GPIO165
SB_GPIO161

J5
E2
K4
K9
G2

SPI_DI/GPIO164
SPI_DO/GPIO163
SPI_CLK/GPIO162
SPI_CS1#/GPIO165
ROM_RST#/GPIO161

R491

10K/F_4

TEMPIN1

R492

10K/F_4

MB_THRMDA_SB

R496

10K/F_4

SB_GPIO174

R500

10K/F_4

SB_GPIO175

R511

10K/F_4

R512

10K/F_4

SB_GPIO176

T60
T67
T59
T63

R276

*Short_4

BOM check

B16

R452

*10K/F_4

BOARD_ID0

R459

10K/F_4

ID0

15"

14"

R460

SW@10K/F_4 BOARD_ID1

R461

*SP@10K/F_4

ID1

DIS

UMA

R449

SIDE@10K/F_4BOARD_ID2

R455

*SP@10K/F_4

ID2

Sideport
W/I
W/O

R450

*SP@10K/F_4 BOARD_ID3

R456

SP@10K/F_4

ID3

JM
ZQ2B

R451

*10K/F_4

BOARD_ID4

R457

10K/F_4

ID4

G27
Y2

NC1
NC2

SB800 A11

IF THERE IS NO IDE, TEST

POINTS FOR DEBUG BUS
IS MANDATORY

+3V

*27P/50V_4

SPI ROM

C682

VIN0/GPIO175
VIN1/GPIO176
VIN2/GPIO177
VIN3/GPIO178
VIN4/GPIO179
VIN5/GPIO180
VIN6/GBE_STAT3/GPIO181
VIN7/GBE_LED3/GPIO182

AH28
AG28
AF26

TEMPIN0

11
11
11
11
11

11,12,14,15,25,30,31,35 +3V_S5
14 +1.1V_AVDD_SATA
2,4,5,9..12,14,15,19,23,24,26,28..33,35..42
+3V

SAM

HYX

JV
ZQ2
B

BOARD_ID0
BOARD_ID1
BOARD_ID2
BOARD_ID3
BOARD_ID4

BOARD_ID0
BOARD_ID1
BOARD_ID2
BOARD_ID3
BOARD_ID4

+3V

ID0
+3V_S5

R550

SP@10K/F_4

SIDE_PORT_ID0

R502

*SP@10K/F_4

R471

*SP@10K/F_4

SIDE_PORT_ID1

R504

SP@10K/F_4

ID1
ATI

PC69
0.1U/10V_4

DDR3 Sideport Memory Device

MEM_1V5

U13
TC7SH08FU

2
4

STN B/S P/N

BOARD_ID2
GPIO12

SIDE_PORT_ID1
GPIO178

SIDE_PORT_ID0
GPIO177

0
(WO/Sideport)

AKD5LGGT506
Samsung K4W1G1646E-HC12 (64M*16)

1
(W/Sideport)

AKD5LGGT700
(64M*16)

1
(W/Sideport)

Hynix

Vendor P/N

ATI

AKD5LZGTW04
H5TQ1G63BFR-12C (64M*16)

23EY2387MA12-SZ

11 VDDR_1.05_EN

VDDR_1.05_EN:
1 : VDDR =1.05V
0 : VDDR = 0.9V (Default)

PR123

VDDR_OPT 39

Vendor

*0_4

PROJECT : ZQ2
Quanta Computer Inc.
Size

Document Number

Rev
1A

SB820-SATA/IDE/SPI 3/4
Date:
5

Wednesday, May 27, 2009

1

Sheet

13

of

46

PLACE ALL THE DECOUPLING CAPS ON

THIS SHEET CLOSE TO SB AS POSSIBLE.
VDDQ--3.3V I/O power

1
C459
1U/10V_4

A18
A19
A20
B18
B19
B20
C18
C20
D18
D19
D20
E19

+3.3V_VDDAN_USB

1
C456

C454

C452

C681

For support USB

wakeup-->3V_S5

L71
BLM18PG221SN1D(220_1.4A)_6

658mA

10U/6.3V_8 10U/6.3V_8 1U/10V_4

1U/10V_4

VDDAN_33_USB_S_1
VDDAN_33_USB_S_2
VDDAN_33_USB_S_3
VDDAN_33_USB_S_4
VDDAN_33_USB_S_5
VDDAN_33_USB_S_6
VDDAN_33_USB_S_7
VDDAN_33_USB_S_8
VDDAN_33_USB_S_9
VDDAN_33_USB_S_10
VDDAN_33_USB_S_11
VDDAN_33_USB_S_12

USB I/O

*10U/6.3V_810U/6.3V_8 0.1U/10V_4 0.1U/10V_4 1U/10V_4

+3V_S5

CORE S5

1
C458

C464

C457

1
2

C446

xx mA

+1.1V_VDDAN_USB
+1.1V_S5 L50
BLM18PG221SN1D(220_1.4A)_6

VDDAN_11_USB_S_1
VDDAN_11_USB_S_2

1
2

1
2

M6
P8

VDDIO_AZ_S

VDDCR_11_USB_S_1
VDDCR_11_USB_S_2
VDDPL_33_SYS
VDDPL_11_SYS_S
VDDPL_33_USB_S
VDDAN_33_HWM_S

113mA

M8
A11
B11

C441
C450
2.2U/6.3V_6 2.2U/6.3V_6

+1.1V_VDDCR_11

R241
C437
1U/10V_4

+VDDIO_AZ

197mA

*Short_6 +3V_S5

R256

C443
*0.1U/10V_4

F26
G26

+3V_VDDIO

VDDCR_11_S_1
VDDCR_11_S_2

32mA

A21
D21
B21
K10
L10
J9
T6
T8

*Short_6

+1.1V_S5

A9
B10
K11
B9
D10
D12
D14
D17
E9
F9
F12
F14
F16
C9
G11
F18
D9
H12
H14
H16
H18
J11
J19
K12
K14
K16
K18
H19

C431
1U/10V_4

Y4
D8

+1.1V_USB_PHY_R

M19
M21

47mA

+3V_VDDPL

L22

+1.1V_VDDPL

62mA

F19

VDDPL_33_USB_S

17mA

D6

+3V_HWM_VDDAN

5mA

L20

P21
P20
M22
M24
M26
P22
P24
P26
T20
T22
T24
V20
J23

L48
+3V_S5
BLM18PG221SN1D(220_1.4A)_6

C453
*0.1U/10V_4

SB800 A11

VSSIO_USB_1
VSSIO_USB_2
VSSIO_USB_3
VSSIO_USB_4
VSSIO_USB_5
VSSIO_USB_6
VSSIO_USB_7
VSSIO_USB_8
VSSIO_USB_9
VSSIO_USB_10
VSSIO_USB_11
VSSIO_USB_12
VSSIO_USB_13
VSSIO_USB_14
VSSIO_USB_15
VSSIO_USB_16
VSSIO_USB_17
VSSIO_USB_18
VSSIO_USB_19
VSSIO_USB_20
VSSIO_USB_21
VSSIO_USB_22
VSSIO_USB_23
VSSIO_USB_24
VSSIO_USB_25
VSSIO_USB_26
VSSIO_USB_27
VSSIO_USB_28

VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
VSS_51
VSS_52

GROUND

1
2

1
2

1
2

1
1
2

L7
L9

C467

2.2U/6.3V_6 0.1U/10V_4

1
2
1

M10

VDDIO_33_S_1
VDDIO_33_S_2
VDDIO_33_S_3
VDDIO_33_S_4
VDDIO_33_S_5
VDDIO_33_S_6
VDDIO_33_S_7
VDDIO_33_S_8

VDDXL_33_S

C473

V1

If the VDDIO_AZ_S
power rail
is configured for
1.5V_S5
then AZ_SDIN[3:0]
can not be
connected to 3.3-V
devices.

C11
D11

C427
C426
10U/6.3V_8 10U/6.3V_8

SB800
VSSIO_SATA_1
VSSIO_SATA_2
VSSIO_SATA_3
VSSIO_SATA_4
VSSIO_SATA_5
VSSIO_SATA_6
VSSIO_SATA_7
VSSIO_SATA_8
VSSIO_SATA_9
VSSIO_SATA_10
VSSIO_SATA_11
VSSIO_SATA_12
VSSIO_SATA_13
VSSIO_SATA_14
VSSIO_SATA_15
VSSIO_SATA_16
VSSIO_SATA_17
VSSIO_SATA_18
VSSIO_SATA_19

567mA
C445

800A50T _8
+1.1V

C425
1U/10V_4

Y14
Y16
AB16
AC14
AE12
AE14
AF9
AF11
AF13
AF16
AG8
AH7
AH11
AH13
AH16
AJ7
AJ11
AJ13
AJ16

EFUSE

800A50T _8

+1.1V

VDDAN_11_SATA_1
VDDAN_11_SATA_4
VDDAN_11_SATA_2
VDDAN_11_SATA_3
VDDAN_11_SATA_5
VDDAN_11_SATA_6
VDDAN_11_SATA_7

U29E

C455
10U/6.3V_8

+1.1V_VDDAN_CLK

C449
C447
C436
0.1U/10V_4 0.1U/10V_4 1U/10V_4

2.2U/6.3V_6 *0.1U/10V_4

+1.1V_AVDD_SATA
L42

VDDPL_33_SATA

AJ20
AF18
AH20
AG19
AE18
AD18
AE16

C466

*Short_6 +1.1V

L41

4000 mA

C469

AD14

C470
1U/10V_4

93mA

C471
C472
C468
0.1U/10V_4 0.1u/10V_4 1U/10V_4

0.1U/10V_4 0.1U/10V_4 0.1U/10V_4

+3V_VDDPL_SATA
+3V L51
BLM18PG221SN1D(220_1.4A)_6

VDDCR_11_GBE_S_1
VDDCR_11_GBE_S_2
VDDIO_GBE_S_1
VDDIO_GBE_S_2

PLL

10U/6.3V_8 10U/6.3V_8 1U/10V_4

C428

C438

C448

C444

C430

1
C429

VDDAN_11_PCIE_1
VDDAN_11_PCIE_2
VDDAN_11_PCIE_3
VDDAN_11_PCIE_4
VDDAN_11_PCIE_5
VDDAN_11_PCIE_6
VDDAN_11_PCIE_7
VDDAN_11_PCIE_8

R269

SB820 without GBE: Connected to GND plane.

3.3V_S5 I/O

600mA

GBE LAN

U26
V22
V26
V27
V28
V29
W22
W26

+1.1V

VDDPL_33_PCIE

PCI EXPRESS

800A50T _8

AE28

C433
*0.1U/10V_4

VDDIO_33_GBE_S

SERIAL ATA

C432
2.2U/6.3V_6

+1.1V_PCIE_VDDR
L43

14

+1.1V_VDDCR

CORE S0

PCI/GPIO I/O

VDDRF_GBE_S

POWER
43mA

+3V L45
BLM18PG221SN1D(220_1.4A)_6

K28
K29
J28
K26
J21
J20
K21
J22

510mA

VDDIO_18_FC_1
VDDIO_18_FC_2
VDDIO_18_FC_3
VDDIO_18_FC_4

N13
R15
N17
U13
U17
V12
V18
W12
W18

C451
2.2U/6.3V_6

AF22
AE25
AF24
AC22

R250
*Short_4

VDDCR_11_1
VDDCR_11_2
VDDCR_11_3
VDDCR_11_4
VDDCR_11_5
VDDCR_11_6
VDDCR_11_7
VDDCR_11_8
VDDCR_11_9
VDDAN_11_CLK_1
VDDAN_11_CLK_2
VDDAN_11_CLK_3
VDDAN_11_CLK_4
VDDAN_11_CLK_5
VDDAN_11_CLK_6
VDDAN_11_CLK_7
VDDAN_11_CLK_8

CLKGEN I/O

C476

0.1U/10V_4 0.1U/10V_4 0.1U/10V_4

VDDIO_33_PCIGP_1
VDDIO_33_PCIGP_2
VDDIO_33_PCIGP_3
VDDIO_33_PCIGP_4
VDDIO_33_PCIGP_5
VDDIO_33_PCIGP_6
VDDIO_33_PCIGP_7
VDDIO_33_PCIGP_8
VDDIO_33_PCIGP_9
VDDIO_33_PCIGP_10
VDDIO_33_PCIGP_11
VDDIO_33_PCIGP_12

FLASH I/O

1
C484

C474

10U/6.3V_8

Part 3 of 5

SB800

AH1
V6
Y19
AE5
AC21
AA2
AB4
AC8
AA7
AA9
AF7
AA19

1
C480

C487
10U/6.3V_8

131mA

+3V_VDDIO_PCIGP

*Short_6

VDD-- S/B CORE power

U29C

R297

+3V

AJ2
A28
A2
E5
D23
E25
E6
F24
N15
R13
R17
T10
P10
V11
U15
M18
V19
M11
L12
L18
J7
P3
V4
AD6
AD4
AB7
AC9
V8
W9
W10
AJ28
B29
U4
Y18
Y10
Y12
Y11
AA11
AA12
G4
J4
G8
G9
M12
AF25
H7
AH29
V10
P6
N4
L4
L8

VSSAN_HWM
VSSXL

VSSPL_SYS

VSSIO_PCIECLK_1
VSSIO_PCIECLK_2
VSSIO_PCIECLK_3
VSSIO_PCIECLK_4
VSSIO_PCIECLK_5
VSSIO_PCIECLK_6
VSSIO_PCIECLK_7
VSSIO_PCIECLK_8
VSSIO_PCIECLK_9
VSSIO_PCIECLK_10
VSSIO_PCIECLK_11
VSSIO_PCIECLK_12
VSSIO_PCIECLK_13

VSSIO_PCIECLK_14
VSSIO_PCIECLK_15
VSSIO_PCIECLK_16
VSSIO_PCIECLK_17
VSSIO_PCIECLK_18
VSSIO_PCIECLK_19
VSSIO_PCIECLK_20
VSSIO_PCIECLK_21
VSSIO_PCIECLK_22
VSSIO_PCIECLK_23
VSSIO_PCIECLK_24
VSSIO_PCIECLK_25
VSSIO_PCIECLK_26
VSSIO_PCIECLK_27

M20
H23
H26
AA21
AA23
AB23
AD23
AA26
AC26
Y20
W21
W20
AE26
L21
K20

Part 5 of 5

+3V_VDDPL
+3V
+VDDIO_AZ

+1.1V_S5

+1.1V_USB_PHY_R

SB800 A11

2
+3V_S5

D04

+1.1V_S5
+3V_S5

+3V_HWM_VDDAN

R430

C482
*2.2U/6.3V_6

C424
*0.1U/10V_4

1
2

L40
BLM18PG221SN1D(220_1.4A)_6

1
2

C479
*0.1U/10V_4

C435
2.2U/6.3V_6

VDDPL_33_USB_S

+1.1V_VDDPL

L53
BLM18PG221SN1D(220_1.4A)_6

C440
*0.1U/10V_4

C463
C460
0.1U/10V_4
10U/6.3V_8

C462
0.1U/10V_4

C478
2.2U/6.3V_6

*Short_6

L49

*Short_6

R279

L44
BLM18PG221SN1D(220_1.4A)_6
+3V_S5

0_4

C626
0.1u/10V_4

C434
2.2U/6.3V_6

C538
2.2u/6.3V_6

PROJECT : ZQ2
Quanta Computer Inc.

37
+1.1V_S5
11..13,15,25,30,31,35 +3V_S5
2,7..10,37 +1.1V
2,4,5,9..13,15,19,23,24,26,28..33,35..42
+3V
5

Size

Document Number

Rev
1A

SB820-PWR/DECOUPLING 4/4
Date:

Wednesday, May 27, 2009

1

Sheet

14

of

46

15

OVERLAP COMMON PADS WHERE

POSSIBLE FOR DUAL-OP RESISTORS.

REQUIRED STRAPS
SB820M is
supported Gen1
mode only.

For internal clock GEN.

+3V_S5

+3V_S5

+3V

R302
*10K/F_4

+3V

+3V

R540
*10K/F_4

+3V_S5

+3V_S5

+3V

R525
*10K/F_4

R541
*10K/F_4

R539
10K/F_4

R255
*10K/F_4

R472

11..14,25,30,31,35 +3V_S5
7,9,10,31,36,41,42 +1.8V
2,4,5,9..14,19,23,24,26,28..33,35..42
+3V

R262
10K/F_4

GPIO199
GPIO200
LPC_CLK1
LPC_CLK0
PCI_CLK4
PCI_CLK3
PCI_CLK2
PCI_CLK1
ACZ_SDOUT

D02
C

AZ_SDOUT

R528
10K/F_4

R526
10K/F_4

R527
*10K/F_4

R259
2.2K/J_4

R477
10K/F_4

PCI_CLK1

PCI_CLK2

PCI_CLK3

PCI_CLK4

ALLOW
PCIE Gen2

Watchdog
Timer Enable

USE
DEBUG
STRAPS

non_Fusion
EC
CLOCK MODE ENABLED

CLKGEN
ENABLED

DEFAULT

DEFAULT

PERFORMANCE FORCE
MODE
PCIE Gen1

Watchdog
Timer Disable

IGNORE
DEBUG
STRAPS

Fusion
EC
CLOCK MODE DISABLED

CLKGEN
DISABLED

PULL This is required as

HIGH the low power mode
is not supported on
the SB8xx

PULL
LOW

R542
10K/F_4

DEFAULT

DEFAULT

DEFAULT

DEFAULT

LPC_CLK0

LPC_CLK1

R253
*2.2K/J_4

R303
10K/F_4

12
12
11
11
11
11
11
11
12

10K/F_4

GPIO200 GPIO199
C

H, H=Reserved
H, L=SPI ROM

L, H=LPC ROM DEFAULT

L, L=FWH ROM

DEFAULT
internal have
pull Hi 10K

DEBUG STRAPS
SB800 HAS 15K INTERNAL PU FOR PCI_AD[27:23]
AD23
AD24
AD25
AD26
AD27

NB_PWRGD_IN:
RS880/RX881 = 1.8V;
Do NOT share it with SB_PWRGD when use Internal Clk Gen (Need SB PLL initialize firstly)

R272
*2.2K/J_4

R285
*2.2K/J_4

R283
*2.2K/J_4

R522
*2.2K/J_4

R524
*2.2K/J_4

11
11
11
11
11

+3V_S5

R309

10K/F_4

R307

SB_PWRGD_IN

*Short_4

C491
*2.2U/6.3V_6
+1.8V

SB_PWRGD_IN 12

NB/SB POWER GOOD CIRCUIT

+1.8V
D23

PCI_AD27

PCI_AD26

PCI_AD25

PCI_AD24

PCI_AD23

USE PCI
PLL

DISABLE ILA
AUTORUN

USE FC
PLL

USE DEFAULT
PCIE STRAPS

DISABLE PCI
MEM BOOT

DEFAULT

DEFAULT

DEFAULT

DEFAULT

DEFAULT

BYPASS
PCI PLL

ENABLE ILA
AUTORUN

BYPASS FC
PLL

USE EEPROM
PCIE STRAPS

ENABLE PCI
MEM BOOT

*BAS316

U15

2,33,36,38 CPU_COREPG

PULL
HIGH

PULL
LOW

D29

BAS316

4,33 PWROK_EC

NC VCC

C494

*0.1U/10V_4
R317
300/J_4

A
GND

R312

NB_PWRGD_IN

*33/J_4

NB_PWRGD_IN

9,12

*NL17SZ17DFT2G
SOT-353
AL17SZ17000

IC(5P) NL17SZ17DFT2G(SOT-353)

SOT-353

ALUC1G17000

IC OTHER(5P) SN74AUC1G17DBVR(SOT23-5)

SOT23-5

PROJECT : ZQ2
Quanta Computer Inc.
Size

Document Number

Rev
1A

SB820-STRAPS
Date:
5

Wednesday, May 27, 2009

1

Sheet

15

of

46

16

U17A
8 PEG_TXP[7:0]
8 PEG_TXN[7:0]
8 PEG_RXP[7:0]
D

8 PEG_RXN[7:0]

PEG_TXP[7:0]
PEG_TXN[7:0]
PEG_RXP[7:0]
PEG_RXN[7:0]

8
8

PEG_TXP7
PEG_TXN7

8
8

PEG_TXP6
PEG_TXN6
PEG_TXP5
PEG_TXN5

8
8

PEG_TXP4
PEG_TXN4

8
8

PEG_TXP3
PEG_TXN3

8
8
8
8

8
8

PEG_TXP2
PEG_TXN2
PEG_TXP1
PEG_TXN1
PEG_TXP0
PEG_TXN0

AA38
Y37

PEG_TXP6
PEG_TXN6

Y35
W36

PEG_TXP5
PEG_TXN5

W38
V37

PEG_TXP4
PEG_TXN4

V35
U36

PEG_TXP3
PEG_TXN3

U38
T37

PEG_TXP2
PEG_TXN2

T35
R36

PEG_TXP1
PEG_TXN1

R38
P37

PEG_TXP0
PEG_TXN0

P35
N36
N38
M37
M35
L36
L38
K37

PCIE_RX0P
PCIE_RX0N

PCIE_TX0P
PCIE_TX0N

PCIE_RX1P
PCIE_RX1N

PCIE_TX1P
PCIE_TX1N

PCIE_RX2P
PCIE_RX2N

PCIE_TX2P
PCIE_TX2N

PCIE_RX3P
PCIE_RX3N

PCIE_TX3P
PCIE_TX3N

PCIE_RX4P
PCIE_RX4N

PCIE_TX4P
PCIE_TX4N

PCIE_RX5P
PCIE_RX5N
PCIE_RX6P
PCIE_RX6N
PCIE_RX7P
PCIE_RX7N
PCIE_RX8P
PCIE_RX8N
PCIE_RX9P
PCIE_RX9N
PCIE_RX10P
PCIE_RX10N

+3V_D
K35
J36

PCIE_RX11P
PCIE_RX11N

R42
J38
H37

SW@10K/F_4

D2
PCIE_RST_VGA#

A_RST#
D3

PCIE_RX12P
PCIE_RX12N

SW@BAS316
H35
G36

11,25,26

SW@BAS316
dGPU_RST_GPIO

11

G38
F37
F35
E37

PCI EXPRESS INTERFACE

8
8

PEG_TXP7
PEG_TXN7

PCIE_TX5P
PCIE_TX5N
PCIE_TX6P
PCIE_TX6N
PCIE_TX7P
PCIE_TX7N
PCIE_TX8P
PCIE_TX8N
PCIE_TX9P
PCIE_TX9N

PCIE_TX10P
PCIE_TX10N
PCIE_TX11P
PCIE_TX11N
PCIE_TX12P
PCIE_TX12N

PCIE_RX13P
PCIE_RX13N

PCIE_TX13P
PCIE_TX13N

PCIE_RX14P
PCIE_RX14N

PCIE_TX14P
PCIE_TX14N

PCIE_RX15P
PCIE_RX15N

PCIE_TX15P
PCIE_TX15N

Y33
Y32

PEG_RXP7_C
PEG_RXN7_C

C125
C114

SW@0.1u/10V_4_X7R
SW@0.1u/10V_4_X7R

W33
W32

PEG_RXP6_C
PEG_RXN6_C

C86
C77

SW@0.1u/10V_4_X7R
SW@0.1u/10V_4_X7R

U33
U32

PEG_RXP5_C
PEG_RXN5_C

C70
C58

SW@0.1u/10V_4_X7R
SW@0.1u/10V_4_X7R

U30
U29

PEG_RXP4_C
PEG_RXN4_C

C111
C112

SW@0.1u/10V_4_X7R
SW@0.1u/10V_4_X7R

T33
T32

PEG_RXP3_C
PEG_RXN3_C

C44
C36

SW@0.1u/10V_4_X7R
SW@0.1u/10V_4_X7R

T30
T29

PEG_RXP2_C
PEG_RXN2_C

C43
C53

SW@0.1u/10V_4_X7R
SW@0.1u/10V_4_X7R

P33
P32

PEG_RXP1_C
PEG_RXN1_C

C30
C23

SW@0.1u/10V_4_X7R
SW@0.1u/10V_4_X7R

P30
P29

PEG_RXP0_C
PEG_RXN0_C

C33
C26

SW@0.1u/10V_4_X7R
SW@0.1u/10V_4_X7R

PEG_RXP7 8
PEG_RXN7 8

PEG_RXP5 8
PEG_RXN5 8
PEG_RXP4 8
PEG_RXN4 8
PEG_RXP3 8
PEG_RXN3 8
PEG_RXP2 8
PEG_RXN2 8
PEG_RXP1 8
PEG_RXN1 8

For Madison and Park

the PWRGOOD ball must
be conneccted to ground

PEG_RXP0 8
PEG_RXN0 8

N33
N32
N30
N29

17 GPIO24_TRSTB
17 GPIO27_TMS

L33
L32

17 GPIO26_TCK
18 TESTEN

L30
L29

R82

*SW@10K/F_4

R84

*SW@10K/F_4

R71

*SW@0_4

R43

*SW@10K/F_4

CLK_14M_VGA

11

for B

+3V_D

K33
K32

SIGNALS

NORMAL MODE

JTAG MODE (DEBUG)

J33
J32

TESTEN

"1" (PU)

"1" (PU)

K30
K29

GPIO24_TRSTB

"0" (PD)

"1" (PU)

H33
H32

GPIO26_TCK

CLK

"1" (PU)

GPIO27_TMS

"1" (PU)

"1" (PU)

PCIE_REFCLKP
PCIE_REFCLKN
CALIBRATION

R35

SW@10K_4

PCIE_RST_VGA#

AJ21
AK21
AH16
AA30

NC#1
NC#2
PWRGOOD

PCIE_CALRP
PCIE_CALRN

Y30

R29

SW@1.27K/F_4

Y29

R28

SW@2K/F_4

+1V

+1.0V

For Madison and Park PCIE_VDDC is 1.0V

PROJECT : ZQ2
Quanta Computer Inc.

PERSTB
SW@Park_M2
Size

Document Number

Rev
1A

Madison/Park-PCIE 1/6

17,19,20,41
+1V
17..19,21
+3V_D
5

+3V_D

JTAG SIGNAL STUFF OPTION FOR OPTION2

CLOCK
AB35
AA36

11 CLK_PCIE_VGAP
11 CLK_PCIE_VGAN

PEG_RXP6 8
PEG_RXN6 8

Date:
2

Sheet

Wednesday, May 27, 2009

1

16

of

46

17

U17B

U17G

MUTI GFX
DPA

For Park-M2 NC
pin
DVPDATA_17 +3V_D
DVPDATA_23

TX3P_DPB2P
TX3M_DPB2N

DPB

DPC

+3V_D

EV_LVDS_BLON

R51
SW@10K/F_4

R56
SW@10K/F_4

*SW@10K/F_4

R362

I2C

AK26
AJ26

IO_VID1
IO_VID0
EV_LVDS_BLON

T121
T120
21
21
21
21
21
21
+3V_D

3.3V GPIO

SOUT_GPIO8
SIN_GPIO9
SCLK_GPIO10
GPU_GPIO11
GPU_GPIO12
GPU_GPIO13

40

T21

GPU_VID1

GPU_VID3
T17

21 ALT#_GPIO17
R350
*SW@10K/F_4

4
40

T25

TEMP_FAIL
GPU_VID2

T10

21 SCS#_GPIO22
12

VGA_REQ#

GPIO24_TRSTB
GPIO25_TDI
GPIO26_TCK
GPIO27_TMS
GPIO28_TDO

16 GPIO24_TRSTB
R349
*SW@10K/F_4

16 GPIO26_TCK
16 GPIO27_TMS

JTAG DEBUG PORT

+3V_D
R83

*SW@10K/F_4 GPIO27_TMS
*SW@10K/F_4 GPIO25_TDI

R68

*SW@10K/F_4 GPIO28_TDO

R70

*SW@10K/F_4 GPIO26_TCK

AH20
AH18
AN16
AH23
AJ23
AH17
AJ17
AK17
AJ13
AH15
AJ16
AK16
AL16
AM16
AM14
AM13
AK14
AG30
AN14
AM17
AL13
AJ14
AK13
AN13
AM23
AN23
AK23
AL24
AM24
AJ19
AK19
AJ20
AK20
AJ24
AH26
AH24

AG38
AH37

TXOUT_U3P
TXOUT_U3N

AF35
AG36

TXCCP_DPC3P
TXCCM_DPC3N

AU14
AV13
AT15
AR14

TXCLK_LP_DPE3P
TXCLK_LN_DPE3N

AP34
AR34

TX1P_DPC1P
TX1M_DPC1N

AU16
AV15

TXOUT_L0P_DPE2P
TXOUT_L0N_DPE2N

AW37
AU35

TX2P_DPC0P
TX2M_DPC0N

AT17
AR16

TXOUT_L1P_DPE1P
TXOUT_L1N_DPE1N

AR37
AU39

VREFG

AU20
AT19
AT21
AR20

TX4P_DPD1P
TX4M_DPD1N

AU22
AV21

TXOUT_L2P_DPE0P
TXOUT_L2N_DPE0N
TXOUT_L3P
TXOUT_L3N

TX5P_DPD0P
TX5M_DPD0N

AT23
AR22

R
RB

AD39
AD37

EXT_CRT_RED

G
GB

AP35
AR35
AN36
AP37

SW@Park_M2
C

AE36
AD35

EXT_CRT_GRE

B
BB

AF37
AE38

EXT_CRT_BLU

HSYNC
VSYNC

AC36
AC38

RSET

EXT_HSYNC
EXT_VSYNC
R30

21
21

SW@499/F_4

AVDD
AVSSQ

AD34
AE34

AVDD

AC33
AC34

VDD1DI

+1.8V_GPU

(1.8V@70mA AVDD)
AVDD
SW@0.1u/10V_4_X7R

R2
R2B

AC30
AC31

G2
G2B

AD30
AD31

B2
B2B

AF30
AF31

C
Y
COMP

AC32
AD32
AF32

C526

120 ohm/300mA
L57
SW@SBY100505T-121Y-N/0.3A/120ohm_4
SW@10u/6.3V_6

C525
C522
SW@1u/6.3V_4

(1.8V@100mA VDD1DI)
VDD1DI

L5

120 ohm/300mA
SW@SBY100505T-121Y-N/0.3A/120ohm_4

SW@0.1u/10V_4_X7R
SW@10u/6.3V_6
C149
C150
C151
SW@1u/6.3V_4

H2SYNC
V2SYNC

HPD1

A2VDDQ

AH13

AB34

VDD1DI
VSS1DI

VDD2DI
VSS2DI

SW@499/F_4

LVTMDP

TX0P_DPC2P
TX0M_DPC2N

TX3P_DPD2P
TX3M_DPD2N

AH35
AJ36

TXOUT_U2P_DPF0P
TXOUT_U2N_DPF0N

A2VDD
R78

TXOUT_U1P_DPF1P
TXOUT_U1N_DPF1N

*SW@10K_4
*SW@10K_4

AJ38
AK37

AT33
AU32

GPIO_0
GPIO_1
GPIO_2
GPIO_3_SMBDATA
GPIO_4_SMBCLK
GPIO_5_AC_BATT
DAC1
GPIO_6
GPIO_7_BLON
GPIO_8_ROMSO
GPIO_9_ROMSI
GPIO_10_ROMSCK
GPIO_11
GPIO_12
GPIO_13
GPIO_14_HPD2
GPIO_15_PWRCNTL_0
GPIO_16_SSIN
GPIO_17_THERMAL_INT
GPIO_18_HPD3
GPIO_19_CTF
GPIO_20_PWRCNTL_1
GPIO_21_BB_EN
GPIO_22_ROMCSB
GPIO_23_CLKREQB
JTAG_TRSTB
JTAG_TDI
JTAG_TCK
JTAG_TMS
JTAG_TDO
GENERICA
GENERICB
GENERICC
GENERICD
GENERICE_HPD4
DAC2
GENERICF
GENERICG

T19

+1.8V_GPU

AV31
AU30

R57
R53

SCL
SDA

EXT_HDMI_HPD AK24
R69

AK35
AL36

TX5P_DPB0P
TX5M_DPB0N

*SW@10K/F_4 GPIO24_TRSTB

R85

TXCLK_UP_DPF3P
TXCLK_UN_DPF3N
TXOUT_U0P_DPF2P
TXOUT_U0N_DPF2N

AR32
AT31

GENERAL PURPOSE I/O

21 GPU_GPIO0
21 GPU_GPIO1
21 GPU_GPIO2
21 GPIO3_SMBDAT
21 GPIO4_SMBCLK

AR30
AT29

AK27
AJ27

TX4P_DPB1P
TX4M_DPB1N

TXCDP_DPD3P
TXCDM_DPD3N

DPD
*SW@10K/F_4

R357

AT27
AR26

VARY_BL
DIGON

R337

1.8V GPIO

TX2P_DPA0P
TX2M_DPA0N
TXCBP_DPB3P
TXCBM_DPB3N

LVDS CONTROL

R338

T27

AU26
AV25

*SW@150/F_4

21 RAM_STRAP0
21 RAM_STRAP1
21 RAM_STRAP2

1 => +3V_D
2 => +VGPU_CORE
3 => +1V
4 => +1.5V_GPU
5 => +1.8V_GPU
6 => dGPU_PWROK

DVPCNTL_MVP_0
DVPCNTL_MVP_1
DVPCNTL_0
DVPCNTL_1
DVPCNTL_2
DVPCLK
DVPDATA_0
DVPDATA_1
DVPDATA_2
DVPDATA_3
DVPDATA_4
DVPDATA_5
DVPDATA_6
DVPDATA_7
DVPDATA_8
DVPDATA_9
DVPDATA_10
DVPDATA_11
DVPDATA_12
DVPDATA_13
DVPDATA_14
DVPDATA_15
DVPDATA_16
DVPDATA_17
DVPDATA_18
DVPDATA_19
DVPDATA_20
DVPDATA_21
DVPDATA_22
DVPDATA_23

AT25
AR24

TX1P_DPA1P
TX1M_DPA1N

R339

GPU Power-on sequence

AR8
AU8
AP8
AW8
AR3
AR1
AU1
AU3
AW3
AP6
AW5
AU5
AR6
AW6
AU6
AT7
AV7
AN7
AV9
AT9
AR10
AW10
AU10
AP10
AV11
AT11
AR12
AW12
AU12
AP12

TX0P_DPA2P
TX0M_DPA2N

*SW@150/F_4

AU24
AV23

*SW@150/F_4

For Park-M2
NC pin

TXCAP_DPA3P
TXCAM_DPA3N

VREFG
A2VSSQ

R75
C195
SW@249/F_4
SW@0.1u/10V_4_X7R

R2SET

T5

AD29
AC29
AG31
AG32

V2SYNC
VDD1DI

AG33
AD33

+3V_D

(3.3V@130mA A2VDD)

A2VDDQ
C131
SW@0.1u/10V_4_X7R

AF33
AA29

21

R31

SW@715/F_4

+1.8V(75mA)

+1.8V_GPU

120 ohm/300mA
L11
SW@SBY100505T-121Y-N/0.3A/120ohm_4

DDC/AUX

DPLL_PVDD
PLL/CLOCK

C178

C176

C172

DPLL_PVDD

AM32
AN32

DPLL_VDDC

AN31

XTALI_27M
XTALO_27M

AV33
AU34

SW@10u/6.3V_6
SW@1u/6.3V_4
SW@0.1u/10V_4_X7R

C533

C179

C175

DPLL_VDDC

Y3
R345
SW@1M_4
SW@27MHZ

C171

SW@10u/6.3V_6
SW@1u/6.3V_4
SW@0.1u/10V_4_X7R

C532

21
21

+1.8V(5mA)

+1.8V_GPU

120 ohm/300mA
SW@SBY100505T-121Y-N/0.3A/120ohm_4

AUX1P
AUX1N

DPLL_VDDC

DDC2CLK
DDC2DATA

XTALIN
XTALOUT

AUX2P
AUX2N
DDCCLK_AUX3P
DDCDATA_AUX3N

SW@27p/50V_4

L6

DPLL_PVDD
DPLL_PVSS

+1V

SW@27p/50V_4

+1.0V(125mA)

120 ohm/300mA
L12
SW@SBY100505T-121Y-N/0.3A/120ohm_4

TS_VDD

AF29
AG29

GPU_D+
GPU_DT14
TS_VDD

C163

C161

SW@10u/6.3V_6

SW@0.1u/10V_4_X7R

DDC1CLK
DDC1DATA

AK32
AJ32
AJ33

DPLUS
DMINUS

THERMAL

DDCCLK_AUX4P
DDCDATA_AUX4N
DDCCLK_AUX5P
DDCDATA_AUX5N

TS_FDO
TSVDD
TSVSS

AM26
AN26
AM27
AL27
AM19
AL19
AN20
AM20
AL30
AM30
AL29
AM29

T52
T119
T24
T20

+1.8V_GPU

(1.8V@2mA A2VDDQ)

T18
T15

A2VDDQ

120 ohm/300mA
L56
SW@SBY100505T-121Y-N/0.3A/120ohm_4

SW@1u/6.3V_4
C524
C523
SW@0.1u/10V_4_X7R

T22
T13
T12
T16
T23
T26

AN21
AM21

DDC6CLK
DDC6DATA

AJ30
AJ31

NC_DDCCLK_AUX7P
NC_DDCDATA_AUX7N

AK30
AK29

T9
T11

PROJECT : ZQ2
Quanta Computer Inc.

SW@Park_M2
Size

19..21,41 +1.8V_GPU
16,19,20,41
+1V
16,18,19,21 +3V_D
5

Document Number

Rev
1A

Madison/Park-HOST 2/6
Date:
3

Wednesday, May 27, 2009

1

Sheet

17

of

46

18

R17
R23
R55

SW@240/F_4 M12
*SW@240/F_4 M27
*SW@240/F_4 AH12

ADBIA0/ODTA0
ADBIA1/ODTA1

J21
G19
H27
G27

CLKA1
CLKA1B

J14
H14

CASA0B
CASA1B

K20
K17
K24
K27

AL31

R21
SW@40.2/F_4

VMB_MA[13..0]

VMB_BA0
VMB_BA1
VMB_BA2

CSA1B_0
CSA1B_1

M13
K16

MVREFDA
MVREFSA

CKEA0
CKEA1

K21
J20

MEM_CALRN0
MEM_CALRN1
MEM_CALRN2

WEA0B
WEA1B

K26
L15

MAA0_8
MAA1_8

H23
J19

+1.5V_GPU

R5
SW@40.2/F_4

+1.5V_GPU
TP1

VMB_WDQS[7..0]

K23
K19

CSA0B_0
CSA0B_1

MEM_CALRP1
MEM_CALRP0
MEM_CALRP2

U17D
DDR2
GDDR3/GDDR5
DDR3

VMB_RDQS[7..0]

C34
D29
D25
E20
E16
E12
J10
D7

CLKA0
CLKA0B

RASA0B
RASA1B

VMB_DM[7..0]

RSVD

SW@Park_M2

+3V_D

R39

R33

R4
SW@40.2/F_4

VMB_DQ0
VMB_DQ1
VMB_DQ2
VMB_DQ3
VMB_DQ4
VMB_DQ5
VMB_DQ6
VMB_DQ7
VMB_DQ8
VMB_DQ9
VMB_DQ10
VMB_DQ11
VMB_DQ12
VMB_DQ13
VMB_DQ14
VMB_DQ15
VMB_DQ16
VMB_DQ17
VMB_DQ18
VMB_DQ19
VMB_DQ20
VMB_DQ21
VMB_DQ22
VMB_DQ23
VMB_DQ24
VMB_DQ25
VMB_DQ26
VMB_DQ27
VMB_DQ28
VMB_DQ29
VMB_DQ30
VMB_DQ31
VMB_DQ32
VMB_DQ33
VMB_DQ34
VMB_DQ35
VMB_DQ36
VMB_DQ37
VMB_DQ38
VMB_DQ39
VMB_DQ40
VMB_DQ41
VMB_DQ42
VMB_DQ43
VMB_DQ44
VMB_DQ45
VMB_DQ46
VMB_DQ47
VMB_DQ48
VMB_DQ49
VMB_DQ50
VMB_DQ51
VMB_DQ52
VMB_DQ53
VMB_DQ54
VMB_DQ55
VMB_DQ56
VMB_DQ57
VMB_DQ58
VMB_DQ59
VMB_DQ60
VMB_DQ61
VMB_DQ62
VMB_DQ63

C5
C3
E3
E1
F1
F3
F5
G4
H5
H6
J4
K6
K5
L4
M6
M1
M3
M5
N4
P6
P5
R4
T6
T1
U4
V6
V1
V3
Y6
Y1
Y3
Y5
AA4
AB6
AB1
AB3
AD6
AD1
AD3
AD5
AF1
AF3
AF6
AG4
AH5
AH6
AJ4
AK3
AF8
AF9
AG8
AG7
AK9
AL7
AM8
AM7
AK1
AL4
AM6
AM1
AN4
AP3
AP1
AP5

MVREFDB
MVREFSB

Y12
AA12

DDR2
GDDR5/GDDR3
DDR3

DQB0_0/DQB_0
DQB0_1/DQB_1
DQB0_2/DQB_2
DQB0_3/DQB_3
DQB0_4/DQB_4
DQB0_5/DQB_5
DQB0_6/DQB_6
DQB0_7/DQB_7
DQB0_8/DQB_8
DQB0_9/DQB_9
DQB0_10/DQB_10
DQB0_11/DQB_11
DQB0_12/DQB_12
DQB0_13/DQB_13
DQB0_14/DQB_14
DQB0_15/DQB_15
DQB0_16/DQB_16
DQB0_17/DQB_17
DQB0_18/DQB_18
DQB0_19/DQB_19
DQB0_20/DQB_20
DQB0_21/DQB_21
DQB0_22/DQB_22
DQB0_23/DQB_23
DQB0_24/DQB_24
DQB0_25/DQB_25
DQB0_26/DQB_26
DQB0_27/DQB_27
DQB0_28/DQB_28
DQB0_29/DQB_29
DQB0_30/DQB_30
DQB0_31/DQB_31
DQB1_0/DQB_32
DQB1_1/DQB_33
DQB1_2/DQB_34
DQB1_3/DQB_35
DQB1_4/DQB_36
DQB1_5/DQB_37
DQB1_6/DQB_38
DQB1_7/DQB_39
DQB1_8/DQB_40
DQB1_9/DQB_41
DQB1_10/DQB_42
DQB1_11/DQB_43
DQB1_12/DQB_44
DQB1_13/DQB_45
DQB1_14/DQB_46
DQB1_15/DQB_47
DQB1_16/DQB_48
DQB1_17/DQB_49
DQB1_18/DQB_50
DQB1_19/DQB_51
DQB1_20/DQB_52
DQB1_21/DQB_53
DQB1_22/DQB_54
DQB1_23/DQB_55
DQB1_24/DQB_56
DQB1_25/DQB_57
DQB1_26/DQB_58
DQB1_27/DQB_59
DQB1_28/DQB_60
DQB1_29/DQB_61
DQB1_30/DQB_62
DQB1_31/DQB_63

MAB0_0/MAB_0
MAB0_1/MAB_1
MAB0_2/MAB_2
MAB0_3/MAB_3
MAB0_4/MAB_4
MAB0_5/MAB_5
MAB0_6/MAB_6
MAB0_7/MAB_7
MAB1_0/MAB_8
MAB1_1/MAB_9
MAB1_2/MAB_10
MAB1_3/MAB_11
MAB1_4/MAB_12
MAB1_5/BA2
MAB1_6/BA0
MAB1_7/BA1

P8
T9
P9
N7
N8
N9
U9
U8
Y9
W9
AC8
AC9
AA7
AA8
Y8
AA9

VMB_MA0
VMB_MA1
VMB_MA2
VMB_MA3
VMB_MA4
VMB_MA5
VMB_MA6
VMB_MA7
VMB_MA8
VMB_MA9
VMB_MA10
VMB_MA11
VMB_MA12
VMB_BA2
VMB_BA0
VMB_BA1

WCKB0_0/DQMB_0
WCKB0B_0/DQMB_1
WCKB0_1/DQMB_2
WCKB0B_1/DQMB_3
WCKB1_0/DQMB_4
WCKB1B_0/DQMB_5
WCKB1_1/DQMB_6
WCKB1B_1/DQMB_7
GDDR5/DDR2/GDDR3
EDCB0_0/QSB_0/RDQSB_0
EDCB0_1/QSB_1/RDQSB_1
EDCB0_2/QSB_2/RDQSB_2
EDCB0_3/QSB_3/RDQSB_3
EDCB1_0/QSB_4/RDQSB_4
EDCB1_1/QSB_5/RDQSB_5
EDCB1_2/QSB_6/RDQSB_6
EDCB1_3/QSB_7/RDQSB_7

H3
H1
T3
T5
AE4
AF5
AK6
AK5

VMB_DM0
VMB_DM1
VMB_DM2
VMB_DM3
VMB_DM4
VMB_DM5
VMB_DM6
VMB_DM7

F6
K3
P3
V5
AB5
AH1
AJ9
AM5

VMB_RDQS0
VMB_RDQS1
VMB_RDQS2
VMB_RDQS3
VMB_RDQS4
VMB_RDQS5
VMB_RDQS6
VMB_RDQS7

QSB[7..0]

DDBIB0_0/QSB_0B/WDQSB_0
DDBIB0_1/QSB_1B/WDQSB_1
DDBIB0_2/QSB_2B/WDQSB_2
DDBIB0_3/QSB_3B/WDQSB_3
DDBIB1_0/QSB_4B/WDQSB_4
DDBIB1_1/QSB_5B/WDQSB_5
DDBIB1_2/QSB_6B/WDQSB_6
DDBIB1_3/QSB_7B/WDQSB_7

G7
K1
P1
W4
AC4
AH3
AJ8
AM3

VMB_WDQS0
VMB_WDQS1
VMB_WDQS2
VMB_WDQS3
VMB_WDQS4
VMB_WDQS5
VMB_WDQS6
VMB_WDQS7

QSB#[7..0]

ADBIB0/ODTB0
ADBIB1/ODTB1

MVREFDB
MVREFSB

SW@10K_4 TESTEN

AD28

TESTEN

AK10
AL10

CLKTESTA
CLKTESTB

R347
R88

VMB_CLKP0
VMB_CLKN0

CLKB1
CLKB1B

AD8
AD7

VMB_CLKP1
VMB_CLKN1

T10
Y10

VMB_RAS0#
VMB_RAS1#

W10
AA10

VMB_CAS0#
VMB_CAS1#

CSB0B_0
CSB0B_1

P10
L10

VMB_CS0#

CSB1B_0
CSB1B_1

AD10
AC10

VMB_CS1#

CKEB0
CKEB1

U10
AA11

VMB_CKE0
VMB_CKE1

N10
AB11

VMB_WE0#
VMB_WE1#

T8
W8

VMB_MA13

WEB0B
WEB1B

*SW@10K_4

MAB0_8
MAB1_8

DRAM_RST

VMB_ODT0 22
VMB_ODT1 22

L9
L8

CASB0B
CASB1B

T7
W7

CLKB0
CLKB0B

RASB0B
RASB1B

GDDR5

*SW@240/F_4 L27
SW@240/F_4 N12
*SW@240/F_4 AG12

A34
E30
E26
C20
C16
C12
J11
F8

VMB_BA0
VMB_BA1
VMB_BA2

C8

R22
R26
R38

DDBIA0_0/QSA_0B/WDQSA_0
DDBIA0_1/QSA_1B/WDQSA_1
DDBIA0_2/QSA_2B/WDQSA_2
DDBIA0_3/QSA_3B/WDQSA_3
DDBIA1_0/QSA_4B/WDQSA_4
DDBIA1_1/QSA_5B/WDQSA_5
DDBIA1_2/QSA_6B/WDQSA_6
DDBIA1_3/QSA_7B/WDQSA_7

22
22
22

VMB_DQ[63..0]

*SW@0_4

+1.5V_GPU

L18
L20

A32
C32
D23
E22
C14
A14
E10
D9

22 VMB_MA[13..0]

SW@0.1u/10V_4_X7R

C19

+1.5V_GPU

SW@0.1u/10V_4_X7R

R14
B

SW@100/F_4

MVREFDA
MVREFSA

WCKA0_0/DQMA_0
WCKA0B_0/DQMA_1
WCKA0_1/DQMA_2
WCKA0B_1/DQMA_3
WCKA1_0/DQMA_4
WCKA1B_0/DQMA_5
WCKA1_1/DQMA_6
WCKA1B_1/DQMA_7
GDDR5/DDR2/GDDR3
EDCA0_0/QSA_0/RDQSA_0
EDCA0_1/QSA_1/RDQSA_1
EDCA0_2/QSA_2/RDQSA_2
EDCA0_3/QSA_3/RDQSA_3
EDCA1_0/QSA_4/RDQSA_4
EDCA1_1/QSA_5/RDQSA_5
EDCA1_2/QSA_6/RDQSA_6
EDCA1_3/QSA_7/RDQSA_7

22 VMB_WDQS[7..0]

R10

R13
SW@40.2/F_4

G24
J23
H24
J24
H26
J26
H21
G21
H19
H20
L13
G16
J16
H16
J17
H17

SW@100/F_4

+1.5V_GPU

MAA0_0/MAA_0
MAA0_1/MAA_1
MAA0_2/MAA_2
MAA0_3/MAA_3
MAA0_4/MAA_4
MAA0_5/MAA_5
MAA0_6/MAA_6
MAA0_7/MAA_7
MAA1_0/MAA_8
MAA1_1/MAA_9
MAA1_2/MAA_10
MAA1_3/MAA_11
MAA1_4/MAA_12
MAA1_5/MAA_13_BA2
MAA1_6/MAA_14_BA0
MAA1_7/MAA_A15_BA1

GDDR5

DQA0_0/DQA_0
DQA0_1/DQA_1
DQA0_2/DQA_2
DQA0_3/DQA_3
DQA0_4/DQA_4
DQA0_5/DQA_5
DQA0_6/DQA_6
DQA0_7/DQA_7
DQA0_8/DQA_8
DQA0_9/DQA_9
DQA0_10/DQA_10
DQA0_11/DQA_11
DQA0_12/DQA_12
DQA0_13/DQA_13
DQA0_14/DQA_14
DQA0_15/DQA_15
DQA0_16/DQA_16
DQA0_17/DQA_17
DQA0_18/DQA_18
DQA0_19/DQA_19
DQA0_20/DQA_20
DQA0_21/DQA_21
DQA0_22/DQA_22
DQA0_23/DQA_23
DQA0_24/DQA_24
DQA0_25/DQA_25
DQA0_26/DQA_26
DQA0_27/DQA_27
DQA0_28/DQA_28
DQA0_29/DQA_29
DQA0_30/DQA_30
DQA0_31/DQA_31
DQA1_0/DQA_32
DQA1_1/DQA_33
DQA1_2/DQA_34
DQA1_3/DQA_35
DQA1_4/DQA_36
DQA1_5/DQA_37
DQA1_6/DQA_38
DQA1_7/DQA_39
DQA1_8/DQA_40
DQA1_9/DQA_41
DQA1_10/DQA_42
DQA1_11/DQA_43
DQA1_12/DQA_44
DQA1_13/DQA_45
DQA1_14/DQA_46
DQA1_15/DQA_47
DQA1_16/DQA_48
DQA1_17/DQA_49
DQA1_18/DQA_50
DQA1_19/DQA_51
DQA1_20/DQA_52
DQA1_21/DQA_53
DQA1_22/DQA_54
DQA1_23/DQA_55
DQA1_24/DQA_56
DQA1_25/DQA_57
DQA1_26/DQA_58
DQA1_27/DQA_59
DQA1_28/DQA_60
DQA1_29/DQA_61
DQA1_30/DQA_62
DQA1_31/DQA_63

MEMORY INTERFACE A

C37
C35
A35
E34
G32
D33
F32
E32
D31
F30
C30
A30
F28
C28
A28
E28
D27
F26
C26
A26
F24
C24
A24
E24
C22
A22
F22
D21
A20
F20
D19
E18
C18
A18
F18
D17
A16
F16
D15
E14
F14
D13
F12
A12
D11
F10
A10
C10
G13
H13
J13
H11
G10
G8
K9
K10
G9
A8
C8
E8
A6
C6
E6
A5

22 VMB_RDQS[7..0]

MEMORY INTERFACE B

22 VMB_DM[7..0]
DDR2
GDDR5/GDDR3
DDR3

AH11

R86

VMB_CLKP0 22
VMB_CLKN0 22
VMB_CLKP1 22
VMB_CLKN1 22
VMB_RAS0# 22
VMB_RAS1# 22
VMB_CAS0# 22
VMB_CAS1# 22
VMB_CS0# 22

VMB_CS1# 22

VMB_CKE0 22
VMB_CKE1 22
VMB_WE0# 22
VMB_WE1# 22
R25

*SW@4.7K_4

SW@51_4

+1.5V_GPU

MEM_RST# 22
B

*SW@0_4

22 VMB_DQ[63..0]
U17C
DDR2
GDDR3/GDDR5
DDR3

C55
SW@68p/50V_4

R87

SW@Park_M2

SW@10K_4

C10

stuff

MEM_CALRNP2

SW@0.1u/10V_4_X7R

R7

MEM_CALRNP1

SW@100/F_4

C27

MEM_CALRNP0

SW@0.1u/10V_4_X7R

R20

SW@100/F_4

For PARK

16

TESTEN

TESTEN

DDR3/GDDR3 Memory Stuff Option

Designator

GDDR5

GDDR3

DDR3

1.5V

1.8V/1.5V

1.5V

Ra

40.2R

40.2R

40.2R

Rb

100R

100R

100R

+1.5V_VGA
A

For M97-M2

For Mannhatton

Ra

10K

Rb

0R/Short

680R

Rc

DNI

DNI

Ca

2.2nF

68pF

10K

PROJECT : ZQ2
Quanta Computer Inc.
Size

Document Number

Rev
1A

Madison/Park-MEM 3/6
19,22,41 +1.5V_GPU
5

Date:
3

Wednesday, May 27, 2009

1

Sheet

18

of

46

18,22,41 +1.5V_GPU
17,20,21,41 +1.8V_GPU
16,17,20,41 +1V
2,4,5,9..15,23,24,26,28..33,35..42
+3V
31,40 +VGPU_CORE
16..18,21 +3V_D

19

U17F

U17E
MEM I/O
PCIE

AC7
AD11
AF7
AG10
AJ7
AK8
AL9
G11
G14
G17
G20
G23
G26
G29
H10
J7
J9
K11
K13
K8
L12
L16
L21
L23
L26
L7
M11
N11
P7
R11
U11
U7
Y11
Y7

C42

C16
C502
C54
C500
SW@10u/6.3V_6
SW@10u/6.3V_6
SW@10u/6.3V_6
SW@10u/6.3V_6
SW@10u/6.3V_6

C115

C51
C22
C89
C85
C18
SW@1u/6.3V_4
SW@1u/6.3V_4
SW@1u/6.3V_4
SW@1u/6.3V_4
SW@1u/6.3V_4
SW@1u/6.3V_4

C144

C138
C28
C63
C29
C132
SW@1u/6.3V_4
SW@1u/6.3V_4
SW@1u/6.3V_4
SW@1u/6.3V_4
SW@1u/6.3V_4
SW@1u/6.3V_4

C143

C41
C17
C15
C147
SW@0.1u/10V_4_X7R
SW@0.1u/10V_4_X7R
SW@1u/6.3V_4
SW@0.1u/10V_4_X7R
SW@0.1u/10V_4_X7R

SW@SBY100505T-121Y-N/0.3A/120ohm_4

VDDC_CT

AF26
AF27
AG26
AG27

C141

C134
C126
SW@1u/6.3V_4
SW@10u/6.3V_6
SW@0.1u/10V_4_X7R

I/O

AF23
AF24
AG23
AG24

C190

C135
C127
C129
SW@1u/6.3V_4
SW@1u/6.3V_4
SW@10u/6.3V_6
SW@1u/6.3V_4

C187

C183
SW@0.1u/10V_4_X7R
SW@1u/6.3V_4

+1.8V_GPU

120 ohm/300mA
(1.8V@40mA PCIE_PVDD)
L55
SW@SBY100505T-121Y-N/0.3A/120ohm_4

T1
T2

M20
M21

T4
T3

V12
U12

VDDR4#1
VDDR4#2
VDDR4#3
VDDR4#6

NC_VDDRHA
NC_VSSRHA
NC_VDDRHB
NC_VSSRHB

PLL
PCIE_PVDD

AB37

MPV18

H7
H8

SPV18

AM10

SPV10

AN9

C515
C516
SW@1u/6.3V_4
SW@10u/6.3V_6
SW@0.1u/10V_4_X7R

L1

VDDR4#4
VDDR4#5
VDDR4#7
VDDR4#8

AD12
AF11
AF12
AG11

C513

+1.8V_GPU

VDDR3#1
VDDR3#2
VDDR3#3
VDDR3#4

AF13
AF15
AG13
AG15

120 ohm/300mA
L13
SW@SBY100505T-121Y-N/0.3A/120ohm_4
VDDR4

120 ohm/300mA
(1.8V@150mA MPV18)
SW@SBY100505T-121Y-N/0.3A/120ohm_4

PCIE_PVDD
MPV18#1
MPV18#2

AN10

L7

VDDCI#1
VDDCI#2
VDDCI#3
VDDCI#4
VDDCI#5
VDDCI#6
VDDCI#7
VDDCI#8
VDDCI#9
VDDCI#10
VDDCI#11
VDDCI#12
VDDCI#13
VDDCI#14
ISOLATED VDDCI#15
CORE I/O VDDCI#16
VDDCI#17
VDDCI#18
VDDCI#19
VDDCI#20
VDDCI#21
VDDCI#22

SPV10
SPVSS

C14
C20
SW@1u/6.3V_4
SW@10u/6.3V_6
SW@0.1u/10V_4_X7R

+1.8V_GPU

VOLTAGE
SENESE

120 ohm/300mA
(1.8V@75mA SPV18)
SW@SBY100505T-121Y-N/0.3A/120ohm_4

C154
SW@0.1u/10V_4_X7R
SW@10u/6.3V_6

T7

AF28

T6

AG28

T8

AH29

FB_VDDC

C159

+1V

L8

FB_VDDCI
FB_GND

120 ohm/300mA
(1.0V@120mA SPV10)
SW@SBY100505T-121Y-N/0.3A/120ohm_4

C153
SW@0.1u/10V_4_X7R
SW@10u/6.3V_6

VDDC#1
VDDC#2
VDDC#3
VDDC#4
VDDC#5
VDDC#6
VDDC#7
VDDC#8
VDDC#9
VDDC#10
VDDC#11
VDDC#12
VDDC#13
VDDC#14
VDDC#15
VDDC#16
VDDC#17
VDDC#18
VDDC#19
VDDC#20
VDDC#21
VDDC#22
VDDC#23
VDDC#24
VDDC#25
VDDC#26
VDDC#27
VDDC#28
VDDC#29
VDDC#30
VDDC#31
VDDC#32
VDDC#33
VDDC#34
VDDC#35
VDDC#36
VDDC#37
VDDC#38
VDDC#39
VDDC#40
VDDC#41
VDDC#42
VDDC#43
VDDC#44
VDDC#45
VDDC#46
VDDC#47
VDDC#48
VDDC#49
VDDC#50
VDDC#51
VDDC#52
VDDC#53
VDDC#54
VDDC#55
VDDC#56
VDDC#57
VDDC#58

SPV18

C11

PCIE_VDDR

AA31
AA32
AA33
AA34
V28
W29
W30
Y31

(1.8V@400mA PCIE_VDDR)

+1.8V_GPU
180 ohm/1.5A
SW@HCB1608KF-181T15/180ohm/1.5A_6

L3

C88

C104
C91
C102
C139
C103
C87
C140
SW@0.1u/10V_4_X7R
SW@1u/6.3V_4
SW@1u/6.3V_4
SW@10u/6.3V_6
SW@0.1u/10V_4_X7R
SW@1u/6.3V_4
SW@1u/6.3V_4
SW@1u/6.3V_4

+1V

G30
G31
H29
H30
J29
J30
L28
M28
N28
R28
T28
U28

(1.0V@1.1A PCIE_VDDC)

C38

C32
C39
C62
C50
C48
C72
C24
SW@1u/6.3V_4
SW@1u/6.3V_4
SW@1u/6.3V_4
SW@10u/6.3V_6
SW@1u/6.3V_4
SW@1u/6.3V_4
SW@1u/6.3V_4
SW@1u/6.3V_4

+VGPU_CORE

(30A or more)
CORE

VDD_CT#1
VDD_CT#2
VDD_CT#3
VDD_CT#4

(3.3V@60mA))
+3V_D

+1.8V_GPU

PCIE_VDDC#1
PCIE_VDDC#2
PCIE_VDDC#3
PCIE_VDDC#4
PCIE_VDDC#5
PCIE_VDDC#6
PCIE_VDDC#7
PCIE_VDDC#8
PCIE_VDDC#9
PCIE_VDDC#10
PCIE_VDDC#11
PCIE_VDDC#12

LEVEL
TRANSLATION

(1.8V@110mA VDD_CT)

L17

PCIE_VDDR#1
PCIE_VDDR#2
PCIE_VDDR#3
PCIE_VDDR#4
PCIE_VDDR#5
PCIE_VDDR#6
PCIE_VDDR#7
PCIE_VDDR#8

POWER

+1.8V_GPU

VDDR1#1
VDDR1#2
VDDR1#3
VDDR1#4
VDDR1#5
VDDR1#6
VDDR1#7
VDDR1#8
VDDR1#9
VDDR1#10
VDDR1#11
VDDR1#12
VDDR1#13
VDDR1#14
VDDR1#15
VDDR1#16
VDDR1#17
VDDR1#18
VDDR1#19
VDDR1#20
VDDR1#21
VDDR1#22
VDDR1#23
VDDR1#24
VDDR1#25
VDDR1#26
VDDR1#27
VDDR1#28
VDDR1#29
VDDR1#30
VDDR1#31
VDDR1#32
VDDR1#33
VDDR1#34

C160

AA15
AA17
AA20
AA22
AA24
AA27
AB16
AB18
AB21
AB23
AB26
AB28
AC17
AC20
AC22
AC24
AC27
AD18
AD21
AD23
AD26
AF17
AF20
AF22
AG16
AG18
AG21
AH22
AH27
AH28
M26
N24
N27
R18
R21
R23
R26
T17
T20
T22
T24
T27
U16
U18
U21
U23
U26
V17
V20
V22
V24
V27
Y16
Y18
Y21
Y23
Y26
Y28

C73

C90
C56
C99
C67
C107
C109
C59
C81
C75
SW@1u/6.3V_4
SW@1u/6.3V_4
SW@1u/6.3V_4
SW@1u/6.3V_4
SW@1u/6.3V_4
SW@1u/6.3V_4
SW@1u/6.3V_4
SW@1u/6.3V_4
SW@1u/6.3V_4
SW@1u/6.3V_4

C108
C118
C84
C68
C40
C82
C60
C76
C66
SW@1u/6.3V_4
SW@1u/6.3V_4
SW@1u/6.3V_4
SW@1u/6.3V_4
SW@1u/6.3V_4
SW@1u/6.3V_4
SW@1u/6.3V_4
SW@1u/6.3V_4
SW@1u/6.3V_4
SW@1u/6.3V_4

C119

C57
C120
C74
C97
C64
C100
C83
C128
C110
SW@1u/6.3V_4
SW@1u/6.3V_4
SW@1u/6.3V_4
SW@1u/6.3V_4
SW@1u/6.3V_4
SW@1u/6.3V_4
SW@1u/6.3V_4
SW@1u/6.3V_4
SW@1u/6.3V_4
SW@1u/6.3V_4

C117

C92
C52
C79
C95
C93
SW@10u/6.3V_6
SW@10u/6.3V_6
SW@10u/6.3V_6
SW@10u/6.3V_6
SW@10u/6.3V_6
SW@10u/6.3V_6

AA13
AB13
AC12
AC15
AD13
AD16
M15
M16
M18
M23
N13
N15
N17
N20
N22
R12
R13
R16
T12
T15
V15
Y13

C37

C106
C121
C71
C65
SW@1u/6.3V_4
SW@1u/6.3V_4
SW@1u/6.3V_4
SW@1u/6.3V_4
SW@1u/6.3V_4
+VGPU_CORE

VDDCI

L64
UPB201212T-121Y-N(120,100M,5A)_8

C122
C105
C47
C45
C46
SW@1u/6.3V_4
SW@1u/6.3V_4
SW@1u/6.3V_4
SW@1u/6.3V_4
SW@1u/6.3V_4

+3V

(DDR3 1.12V@4A VDDCI) or more

R125

2
*SW@0_6
C35

C94
C49
SW@10u/6.3V_6
SW@10u/6.3V_6
SW@10u/6.3V_6

Q35 SW@AO3413

1A
+3V_D_EXT

SW@Park_M2

C612

C611

C613

SW@1u/6.3V_4
SW@10u/6.3V_6
SW@0.1u/10V_4_X7R
+3V

GPU all PWROK

+3V

GPU +3V_D power

+3V

EC-C

R76
SW@10K_4

Change from 100K to 4.7K

R549
SW@4.7K_4

>1mS delay is required between all MXM power rail stable

and MXM_PWREN(enables the module internal power)

dGPU_PWREN

Q2
SW@2N7002K

40,41

dGPU_PWREN

R366
SW@0_4

EC-C

+1.8V_GPU

R367
*SW@0_4

SW@0_4

PowerXpress control signal for Park only

If not used, can be disconnected.
PX_EN = LOW, turn on
PX_EN = HIGH, turn off
PX_EN is used to turn ON/OFF some
regulators for PowerXpress mode. An
output high 3.3V will turn the regulators
OFF. An output low 0V will turn the
regulators ON. PX_EN outputs low (0V)
by default.
If this signal is unused, it can be NC (not
connected) or connected to ground.

1A

PROJECT : ZQ2
Quanta Computer Inc.

+3V_D
C185

C180

C174

SW@1u/6.3V_4
SW@10u/6.3V_6
SW@0.1u/10V_4_X7R

Size

Document Number

Rev
1A

Madison/Park (PWR/GND)4/6
Date:

R62

*SW@0_6

Q26 SW@AO3413
SW@DTC144EUA
Q27

C573
SW@1u/6.3V_4

Q25
SW@PDTC143TT

*SW@10K_4

*SW@0_6

2
+1.5V_GPU

C734
SW@0.1u/10V_4

R65

D26

EC-D

D25

*SW@BAS316

SW@BAS316

11 dGPU_VRON

+3V

R73

12 dGPU_PWR_EN

A39
AW1
AW39

+3V

R361
SW@4.7K_4

11

R355
SW@10K_4

VSS_MECH#1
VSS_MECH#2
VSS_MECH#3

R131

dGPU_PWROK

2ms

GND
GND#100
GND#101
GND#102
GND#103
GND#104
GND#105
GND#106
GND#107
GND#108
GND#109
GND#110
GND#111
GND#112
GND#113
GND#114
GND#115
GND#116
GND#117
GND#118
GND#119
GND#120
GND#121
GND#122
GND#123
GND#124
GND#125
GND#126
GND#127
GND#128
GND#129
GND#130
GND#131
GND#132
GND#133
GND#134
GND#135
GND#136
GND#137
GND#138
GND#139
GND#140
GND#141
GND#142
GND#143
GND#144
GND#145
GND#146
GND#147
GND#148
GND#149
GND#150
GND#151
GND#153
GND#154
GND#155
GND#156
GND#157
GND#158
GND#159
GND#160
GND#161
GND#163
GND#164
GND#165
GND#166
GND#167
GND#168
GND#169
GND#170
GND#171
GND#172
GND#173
GND#174
GND#175
GND#152
GND#162

A3
A37
AA16
AA18
AA2
AA21
AA23
AA26
AA28
AA6
AB12
AB15
AB17
AB20
AB22
AB24
AB27
AC11
AC13
AC16
AC18
AC2
AC21
AC23
AC26
AC28
AC6
AD15
AD17
AD20
AD22
AD24
AD27
AD9
AE2
AE6
AF10
AF16
AF18
AF21
AG17
AG2
AG20
AG22
AG6
AG9
AH21
AJ10
AJ11
AJ2
AJ28
AJ6
AK11
AK31
AK7
AL11
AL14
AL17
AL2
AL20
AL21
AL23
AL26
AL32
AL6
AL8
AM11
AM31
AM9
AN11
AN2
AN30
AN6
AN8
AP11
AP7
AP9
AR5
AW34
B11
B13
B15
B17
B19
B21
B23
B25
B27
B29
B31
B33
B7
B9
C1
C39
E35
E5
F11
F13

Fine-tune Power-on sequence

dGPU_VRON
dGPU_PWREN

F15
F17
F19
F21
F23
F25
F27
F29
F31
F33
F7
F9
G2
G6
H9
J2
J27
J6
J8
K14
K7
L11
L17
L2
L22
L24
L6
M17
M22
M24
N16
N18
N2
N21
N23
N26
N6
R15
R17
R2
R20
R22
R24
R27
R6
T11
T13
T16
T18
T21
T23
T26
U15
U17
U2
U20
U22
U24
U27
U6
V11
V16
V18
V21
V23
V26
W2
W6
Y15
Y17
Y20
Y22
Y24
Y27
U13
V13

GND#1
GND#2
GND#3
GND#4
GND#5
GND#6
GND#7
GND#8
GND#9
GND#10
GND#11
GND#12
GND#13
GND#14
GND#15
GND#16
GND#17
GND#18
GND#19
GND#20
GND#21
GND#22
GND#23
GND#24
GND#25
GND#26
GND#27
GND#28
GND#29
GND#30
GND#31
GND#32
GND#33
GND#34
GND#35
GND#36
GND#37
GND#38
GND#39
GND#40
GND#41
GND#42
GND#43
GND#44
GND#45
GND#46
GND#47
GND#48
GND#49
GND#50
GND#51
GND#52
GND#53
GND#54
GND#55
GND#56
GND#57
GND#58
GND#59
GND#60
GND#61
GND#62
GND#63
GND#64
GND#65
GND#66
GND#67
GND#68
GND#69
GND#70
GND#71
GND#72
GND#73
GND#74
GND#75
GND#76
GND#77
GND#78
GND#79
GND#80
GND#81
GND#82
GND#83
GND#84
GND#85
GND#86
GND#87
GND#88
GND#89
GND#90
GND#91
GND#92
GND#93
GND#94
GND#95
GND#96
GND#97
GND#98
GND#99

SW@Park_M2

GPU power enable

PCIE_VSS#1
PCIE_VSS#2
PCIE_VSS#3
PCIE_VSS#4
PCIE_VSS#5
PCIE_VSS#6
PCIE_VSS#7
PCIE_VSS#8
PCIE_VSS#9
PCIE_VSS#10
PCIE_VSS#11
PCIE_VSS#12
PCIE_VSS#13
PCIE_VSS#14
PCIE_VSS#15
PCIE_VSS#16
PCIE_VSS#17
PCIE_VSS#18
PCIE_VSS#19
PCIE_VSS#20
PCIE_VSS#21
PCIE_VSS#22
PCIE_VSS#23
PCIE_VSS#24
PCIE_VSS#25
PCIE_VSS#26
PCIE_VSS#27
PCIE_VSS#28
PCIE_VSS#29
PCIE_VSS#30
PCIE_VSS#31
PCIE_VSS#32
PCIE_VSS#33
PCIE_VSS#34
PCIE_VSS#35

C98

For DDR3, MVDDQ = 1.5V (7.5A)

+1.5V_GPU

AB39
E39
F34
F39
G33
G34
H31
H34
H39
J31
J34
K31
K34
K39
L31
L34
M34
M39
N31
N34
P31
P34
P39
R34
T31
T34
T39
U31
U34
V34
V39
W31
W34
Y34
Y39

Wednesday, May 27, 2009

1

Sheet

19

of

46

+1.8V_GPU

20

+1V
U17H

(1.8V@130mA DPA_VDD18)

120 ohm/300mA
L14
SW@0_4

DPA_VDD10
DP C/D POWER

DPA_VDD18
DPA_VDD18

AP20
AP21

DPA_VDD10

AP13
AT13

C182
C192
C188
*SW@1u/6.3V_4
*SW@10u/6.3V_6
*SW@0.1u/10V_4_X7R

(1.0V@110mA DPA_VDD10)

L10

120 ohm/300mA
SW@0_4

DP A/B POWER

DPC_VDD18#1
DPC_VDD18#2

DPA_VDD18#1
DPA_VDD18#2

DPC_VDD10#1
DPC_VDD10#2

DPA_VDD10#1
DPA_VDD10#2

DPC_VSSR#1
DPC_VSSR#2
DPC_VSSR#3
DPC_VSSR#4
DPC_VSSR#5

DPA_VSSR#1
DPA_VSSR#2
DPA_VSSR#3
DPA_VSSR#4
DPA_VSSR#5

DPD_VDD18#1
DPD_VDD18#2

DPB_VDD18#1
DPB_VDD18#2

DPD_VDD10#1
DPD_VDD10#2

DPB_VDD10#1
DPB_VDD10#2

DPD_VSSR#1
DPD_VSSR#2
DPD_VSSR#3
DPD_VSSR#4
DPD_VSSR#5

DPB_VSSR#1
DPB_VSSR#2
DPB_VSSR#3
DPB_VSSR#4
DPB_VSSR#5

AN24
AP24

DPA_VDD18

AP31
AP32

DPA_VDD10

C170

C165
C157
*SW@1u/6.3V_4
*SW@10u/6.3V_6
*SW@0.1u/10V_4_X7R
D

AN17
AP16
AP17
AW14
AW16

DPA_VDD18

AP22
AP23

DPA_VDD10

AP14
AP15

AN19
AP18
AP19
AW20
AW22

R348

SW@150/F_4
DPCD_CALR

AW18

DPCD_CALR

DPAB_CALR

AN27
AP27
AP28
AW24
AW26

AP25
AP26

DPA_VDD18

AN33
AP33

DPA_VDD10

AN29
AP29
AP30
AW30
AW32

AW28

DPAB_CALR R346

SW@150/F_4
+1.8V_GPU

AH34
AJ34

DPA_VDD10

AL33
AM33

DP PLL POWER
DPA_PVDD
DPA_PVSS

AU28
AV27

DPA_PVDD

(1.8V@?mA DPA_PVDD)

DPE_VSSR#1
DPE_VSSR#2
DPE_VSSR#3
DPE_VSSR#4
DPE_VSSR#5

DPC_PVDD
DPC_PVSS

DPD_PVDD
DPD_PVSS
DPA_VDD18

AF34
AG34

DPA_VDD10

AK33
AK34

DPF_VDD18#1
DPF_VDD18#2
DPE_PVDD
DPE_PVSS
DPF_VDD10#1
DPF_VDD10#2
NC_DPF_PVDD
NC_DPF_PVSS

AF39
AH39
AK39
AL34
AM34

R343

SW@150/F_4DPEF_CALR AM39

AV29
AR28

AU18
AV17

C534
*SW@1u/6.3V_4

AN34
AP39
AR39
AU37
AW35

DPB_PVDD
DPB_PVSS

*SW@10u/6.3V_6

C544
DPE_VDD10#1
DPE_VDD10#2

L62

120 ohm/300mA
SW@0_4

C537
*SW@0.1u/10V_4_X7R

DPA_VDD18

DP E/F POWER
DPE_VDD18#1
DPE_VDD18#2

AV19
AR18

AM37
AN38

AL38
AM35

DPF_VSSR#1
DPF_VSSR#2
DPF_VSSR#3
DPF_VSSR#4
DPF_VSSR#5

DPEF_CALR

PROJECT : ZQ2
Quanta Computer Inc.

SW@Park_M2

Size

Document Number

Rev
1A

Madison/Park (DP_PWR/GND)5/6

17,19,21,41 +1.8V_GPU
16,17,19,41 +1V

Date:
2

Sheet

Wednesday, May 27, 2009

1

20

of

46

GPU_GPIO13

17

GPU_GPIO12

17

GPU_GPIO11

17

GPU_GPIO0

17

GPU_GPIO1

R66

*SW@10K/F_4

R67

*SW@10K/F_4

R64

SW@10K/F_4

R49

*SW@10K/F_4

R48

*SW@10K/F_4

000

128MB

001

256MB

010

17 GPIO4_SMBCLK

R44

*SW@10K/F_4

R41

*SW@10K/F_4

SCS#_GPIO22

R74

*SW@10K/F_4

R63

*SW@10K/F_4

EXT_HSYNC

17

EXT_HSYNC

17

EXT_VSYNC
SIN_GPIO9

17

V2SYNC

R336

*SW@10K/F_4

R335

*SW@10K/F_4

R45

*SW@10K/F_4

R32

*SW@10K/F_4

EXT_VSYNC

Discription
Any one by dectec

TX_DEEMPH_EN

GPIO1

PCIE TRANSMITTER DE-EMPHASIS ENABLED

0 = TX DE-EMPHASIS DISABLED
1 = TX DE-EMPHASIS ENABLED
ENABLE EXTERNAL BIOS ROM
0 = DISABLE
1 = ENABLE

GPIO_22_ROMCSB

ROMIDCFG(2:0)

GPIO[13:11]

BIF_GEN2_EN_A

GPIO2

GPIO_8_ROMSO
H2SYNC
GPIO_21_BB_EN

GPIO8
H2SYNC
GPIO21

AUD[1]

HSYNC

AUD[0]

VSYNC

Reserved Only

AUD[1:0]
00: NO AUDIO FUNCTION.
01: AUDIO FOR DISPLAYPORT AND HDMI IF
ADAPTER IS DETECTED.
10: AUDIO FOR DISPLAYPORT ONLY.

Both DP & HDMI

GPIO_9_ROMSI

17 SCLK_GPIO10
SCS#_GPIO22

17 SCS#_GPIO22

*SW@10K_4

SOUT_GPIO8

SOUT_GPIO8

17

Vendor

7
R356

Hynix

8
4
VCC
VSS
R364
*SW@10K_4
*SW@M25P10-AVMN6P
C548
*SW@0.1u/10V_4

STN B/S P/N

H5TQ1G63BFR-12C

AKD5LZGTW 04
(64M*16)

H5TQ1G63BFR-12C

AKD5LZGTW 04
(64M*16)

D09

Thermal Sensor

Samsung

Vendor

DDR3 Memory Aperture size

Vendor P/N

HOLD

+3V_D_EXT

0 = DRIVER would ignore the value sample on VHAD_0 during RESET.

GPU

+3V_D_EXT

See Audio table

11

0 = VGA controller capacity enable

GPIO9

V2SYNC

DDR3 Memory Aperture size

5

See ROM table

000

0 = PCIE DEVICE AS 2.5GT/S CAPABLE

1 = PCIE DEVICE AS 5GT/S CAPABLE

U20
SIN_GPIO9

11: AUDIO FOR BOTH DISPLAYPORT AND HDMI.

EEPROM
SIN_GPIO9

REMARK

SERIAL ROM TYPE OR MEMORY APERTURE SIZE SELECT

NUMONYX M25P10A : 101

DP only

VIP_DEVICE_STRAP_ENA

17

DEFAULT

0 = 50% TX OUTPUT SWING

1 = FULL TX OUTPUT SWING

No Audio

0
1
0
1

0
0
1
1

DESCRIPTION OF DEFAULT SETTINGS

GPIO0

32MB

ROM Table

GPU_GPIO2

PIN

TX_PWRS_ENB

BIOS_ROM_EN

17 GPIO3_SMBDAT

17

STRAPS

64MB

011

21

CONFIGURATION STRAPS

+3V_D
17

ALLOW FOR PULLUP PADS FOR THESE STRAPS AND IF THESE GPIOS ARE USED,
THEY MUST NOT CONFLICT DURING RESET

GPIO[13:11] Size

Memory Aperture size

PIN STRAPS

K4W 1G1646E-HC12

AKD5LGGT506
(64M*16)

K4W 1G1646E-HC12

AKD5LGGT506
(64M*16)

K4W 2G1646B-HC12

AKD5MGGT500

23EY2387MA12-SZ

AKD5LGGT700

23EY2387MA12-SZ

AKD5LGGT700

Park
Madison

RAM_STRAP2

RAM_STRAP1

RAM_STRAP0

DVPDATA_2

DVPDATA_1

DVPDATA_0

2Gb

Park

Madison

2Gb

Park

P/N

WINDBOND

AL83L771K01

GMT

AL000780000

USD0.16

AMD

Madison

+3V_D_EXT
R344
SW@10K_4

R637
*SW@10K_4
C540

SW@0.1u/10V_4_X7R

+1.8V_GPU

Samsung-1GB

U19
A

33 MXM_SMCLK12

33 MXM_SMDATA12

7
6

17 ALT#_GPIO17
33

VGA_THERM#

SCLK

VCC

SDA

DXP

ALERT#

DXN

OVERT#

GND

17 RAM_STRAP2

GPU_D+

C531

SW@2200p/50V_4
GPU_D-

17

17

17 RAM_STRAP1

R358

*SP@10K/F_4

R365

SP@10K/F_4

R363

SP@10K/F_4

R360

*SP@10K/F_4

R359

*SP@10K/F_4

R72

SP@10K/F_4

RAM_STRAP2 SET DDR3 Vendor

RAM_STRAP[1:0] SET SIZE.
PROJECT : ZQ2
Quanta Computer Inc.

SW@G780-1P81U(MSOP)

Address ID: 98H

17 RAM_STRAP0

Size

Document Number

Rev
1A

Medison/Park Strip/Thermal 6/6

Date:

Wednesday, May 27, 2009

1

Sheet

21

of

46

18 VMB_WDQS[7..0]

VMB_RDQS[7..0]

QSA[7..0]

VMB_WDQS[7..0]

QSA#[7..0]

18
18
18
18
18
18
18
18
18
18
18
18
18
18

VMB_MA0
VMB_MA1
VMB_MA2
VMB_MA3
VMB_MA4
VMB_MA5
VMB_MA6
VMB_MA7
VMB_MA8
VMB_MA9
VMB_MA10
VMB_MA11
VMB_MA12
VMB_MA13

18
18
18

VMB_BA0
VMB_BA1
VMB_BA2

18
18
18

VMB_CLKP0
VMB_CLKN0
VMB_CKE0

18
18
18
18
18

22

VMB_ODT0
VMB_CS0#
VMB_RAS0#
VMB_CAS0#
VMB_WE0#

U18
U2

VREFC_VMB1
VREFD_VMB1

M8
H1

VREFCA
VREFDQ

VMB_MA0
VMB_MA1
VMB_MA2
VMB_MA3
VMB_MA4
VMB_MA5
VMB_MA6
VMB_MA7
VMB_MA8
VMB_MA9
VMB_MA10
VMB_MA11
VMB_MA12
VMB_MA13

N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC
A13
A14
A15

VMB_BA0
VMB_BA1
VMB_BA2

M2
N8
M3

BA0
BA1
BA2

VMB_CLKP0
VMB_CLKN0
VMB_CKE0

J7
K7
K9
K1
L2
J3
K3
L3

ODT
CS
RAS
CAS
WE

VMB_RDQS0
VMB_RDQS3

F3
C7

DQSL
DQSU

E7
D3

MEM_RST#

CK
CK
CKE

VMB_ODT0
VMB_CS0#
VMB_RAS0#
VMB_CAS0#
VMB_WE0#

VMB_DM0
VMB_DM3

18

CHANNEL B: 512MB DDR3 (64M*16*4pcs)

VMB_DM[7..0]

18 VMB_DM[7..0]
18 VMB_RDQS[7..0]

VMB_DQ[63..0]

18 VMB_DQ[63..0]

DML
DMU

VMB_WDQS0
VMB_WDQS3

G3
B7

DQSL
DQSU

MEM_RST#

T2

RESET

VMB_ZQ1

L8

ZQ

J1
L1
J9
L9

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

E3
F7
F2
F8
H3
H8
G2
H7

VMB_DQ6
VMB_DQ3
VMB_DQ5
VMB_DQ1
VMB_DQ7
VMB_DQ0
VMB_DQ4
VMB_DQ2

D7
C3
C8
C2
A7
A2
B8
A3

VMB_DQ24
VMB_DQ31
VMB_DQ28
VMB_DQ30
VMB_DQ26
VMB_DQ27
VMB_DQ25
VMB_DQ29

0
3

VREFC_VMB2
VREFD_VMB2

M8
H1

VREFCA
VREFDQ

VMB_MA0
VMB_MA1
VMB_MA2
VMB_MA3
VMB_MA4
VMB_MA5
VMB_MA6
VMB_MA7
VMB_MA8
VMB_MA9
VMB_MA10
VMB_MA11
VMB_MA12
VMB_MA13

N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC
A13
A14
A15

VMB_BA0
VMB_BA1
VMB_BA2

M2
N8
M3

BA0
BA1
BA2

VMB_CLKP0
VMB_CLKN0
VMB_CKE0

J7
K7
K9

+1.5V_GPU

VDD#B2
VDD#D9
VDD#G7
VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9
VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9
VSS#A9
VSS#B3
VSS#E1
VSS#G8
VSS#J2
VSS#J8
VSS#M1
VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9
VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9

R15
SW@240/F_4

U3

U16

NC#J1
NC#L1
NC#J9
NC#L9
100-BALL
SDRAM DDR3
SW@VRAM _DDR3

B2
D9
G7
K2
K8
N1
N9
R1
R9
+1.5V_GPU

A1
A8
C1
C9
D2
E9
F1
H2
H9

VMB_ODT0
VMB_CS0#
VMB_RAS0#
VMB_CAS0#
VMB_WE0#

K1
L2
J3
K3
L3

ODT
CS
RAS
CAS
WE

VMB_RDQS2
VMB_RDQS1

F3
C7

DQSL
DQSU

VMB_DM2
VMB_DM1

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

E7
D3

DML
DMU

VMB_WDQS2
VMB_WDQS1

G3
B7

DQSL
DQSU

MEM_RST#

T2

RESET

VMB_ZQ2

B1
B9
D1
D8
E2
E8
F9
G1
G9

CK
CK
CKE

L8

ZQ

BOT Down

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

E3
F7
F2
F8
H3
H8
G2
H7

VMB_DQ17
VMB_DQ23
VMB_DQ18
VMB_DQ16
VMB_DQ20
VMB_DQ22
VMB_DQ19
VMB_DQ21

D7
C3
C8
C2
A7
A2
B8
A3

VMB_DQ15
VMB_DQ10
VMB_DQ14
VMB_DQ11
VMB_DQ12
VMB_DQ9
VMB_DQ13
VMB_DQ8

2
1

M8
H1

VREFCA
VREFDQ

VMB_MA0
VMB_MA1
VMB_MA2
VMB_MA3
VMB_MA4
VMB_MA5
VMB_MA6
VMB_MA7
VMB_MA8
VMB_MA9
VMB_MA10
VMB_MA11
VMB_MA12
VMB_MA13

N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC
A13
A14
A15

VMB_BA0
VMB_BA1
VMB_BA2

M2
N8
M3

BA0
BA1
BA2

VMB_CLKP1
VMB_CLKN1
VMB_CKE1

J7
K7
K9

CK
CK
CKE

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

E3
F7
F2
F8
H3
H8
G2
H7

VMB_DQ36
VMB_DQ39
VMB_DQ33
VMB_DQ34
VMB_DQ37
VMB_DQ32
VMB_DQ38
VMB_DQ35

VREFC_VMB4
VREFD_VMB4

M8
H1

VREFCA
VREFDQ

VMB_MA0
VMB_MA1
VMB_MA2
VMB_MA3
VMB_MA4
VMB_MA5
VMB_MA6
VMB_MA7
VMB_MA8
VMB_MA9
VMB_MA10
VMB_MA11
VMB_MA12
VMB_MA13

N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC
A13
A14
A15

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

D7
C3
C8
C2
A7
A2
B8
A3

VMB_DQ62
VMB_DQ56
VMB_DQ63
VMB_DQ58
VMB_DQ61
VMB_DQ57
VMB_DQ60
VMB_DQ59

VDD#B2
VDD#D9
VDD#G7
VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9

B2
D9
G7
K2
K8
N1
N9
R1
R9

VMB_BA0
VMB_BA1
VMB_BA2

M2
N8
M3

BA0
BA1
BA2

VMB_CLKP1
VMB_CLKN1
VMB_CKE1

VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9

J7
K7
K9

CK
CK
CKE

A1
A8
C1
C9
D2
E9
F1
H2
H9

VMB_ODT1
VMB_CS1#
VMB_RAS1#
VMB_CAS1#
VMB_WE1#

K1
L2
J3
K3
L3

ODT
CS
RAS
CAS
WE

VMB_RDQS6
VMB_RDQS5

F3
C7

DQSL
DQSU

VSS#A9
VSS#B3
VSS#E1
VSS#G8
VSS#J2
VSS#J8
VSS#M1
VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

VMB_DM6
VMB_DM5

E7
D3

DML
DMU

VMB_WDQS6
VMB_WDQS5

G3
B7

DQSL
DQSU

MEM_RST#

T2

RESET

L8

ZQ

VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9

B1
B9
D1
D8
E2
E8
F9
G1
G9

4
7

+1.5V_GPU

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

E3
F7
F2
F8
H3
H8
G2
H7

VMB_DQ54
VMB_DQ51
VMB_DQ53
VMB_DQ50
VMB_DQ52
VMB_DQ48
VMB_DQ55
VMB_DQ49

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

D7
C3
C8
C2
A7
A2
B8
A3

VMB_DQ41
VMB_DQ46
VMB_DQ40
VMB_DQ42
VMB_DQ44
VMB_DQ45
VMB_DQ43
VMB_DQ47

VDD#B2
VDD#D9
VDD#G7
VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9

B2
D9
G7
K2
K8
N1
N9
R1
R9

VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9

A1
A8
C1
C9
D2
E9
F1
H2
H9

VSS#A9
VSS#B3
VSS#E1
VSS#G8
VSS#J2
VSS#J8
VSS#M1
VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9

B1
B9
D1
D8
E2
E8
F9
G1
G9

6
D

+1.5V_GPU

+1.5V_GPU

VDD#B2
VDD#D9
VDD#G7
VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9
VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9
VSS#A9
VSS#B3
VSS#E1
VSS#G8
VSS#J2
VSS#J8
VSS#M1
VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9
VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9

R332
SW@240/F_4

J1
L1
J9
L9

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

VREFC_VMB3
VREFD_VMB3

NC#J1
NC#L1
NC#J9
NC#L9
100-BALL
SDRAM DDR3
SW@VRAM _DDR3

B2
D9
G7
K2
K8
N1
N9
R1
R9

18
18
18

VMB_CLKP1
VMB_CLKN1
VMB_CKE1

18
18
18
18
18

VMB_ODT1
VMB_CS1#
VMB_RAS1#
VMB_CAS1#
VMB_WE1#

+1.5V_GPU

+1.5V_GPU

+1.5V_GPU

A1
A8
C1
C9
D2
E9
F1
H2
H9
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

VMB_ODT1
VMB_CS1#
VMB_RAS1#
VMB_CAS1#
VMB_WE1#

K1
L2
J3
K3
L3

VMB_RDQS4
VMB_RDQS7

F3
C7

DQSL
DQSU

VMB_DM4
VMB_DM7

E7
D3

DML
DMU

VMB_WDQS4
VMB_WDQS7

G3
B7

DQSL
DQSU

MEM_RST#

T2

RESET

L8

ZQ

VMB_ZQ3

B1
B9
D1
D8
E2
E8
F9
G1
G9

ODT
CS
RAS
CAS
WE

R342
SW@240/F_4

J1
L1
J9
L9

NC#J1
NC#L1
NC#J9
NC#L9
100-BALL
SDRAM DDR3
SW@VRAM _DDR3

VMB_ZQ4

R52
SW@240/F_4

J1
L1
J9
L9

TOP Up

TOP Down

Group-B0 VREF

NC#J1
NC#L1
NC#J9
NC#L9
100-BALL
SDRAM DDR3
SW@VRAM _DDR3

BOT Up

Group-B1 VREF
+1.5V_GPU

+1.5V_GPU

R16
SW@4.99K/F_4

R8
SW@4.99K/F_4

VREFC_VMB1

R24

+1.5V_GPU

R334
SW@4.99K/F_4

VREFD_VMB1

C31
SW@0.1u/10V_4_X7R
SW@4.99K/F_4

+1.5V_GPU

VREFC_VMB2

R12

C13
SW@0.1u/10V_4_X7R
SW@4.99K/F_4

R333

C503
SW@0.1u/10V_4_X7R
SW@4.99K/F_4

+1.5V_GPU

R331
SW@4.99K/F_4

VREFD_VMB2

C498
SW@0.1u/10V_4_X7R
SW@4.99K/F_4

R46

C142
SW@0.1u/10V_4_X7R
SW@4.99K/F_4

+1.5V_GPU

R341
SW@4.99K/F_4

VREFC_VMB3

R330

Group-B0 decoupling CAP

MEM_B0 CLK

+1.5V_GPU

R36
SW@4.99K/F_4

VREFD_VMB3

R340

C521
SW@0.1u/10V_4_X7R
SW@4.99K/F_4

Group-B1 decoupling CAP

+1.5V_GPU

+1.5V_GPU

R37
SW@4.99K/F_4

R61
SW@4.99K/F_4

VREFC_VMB4

VREFD_VMB4

R47

C137
SW@0.1u/10V_4_X7R
SW@4.99K/F_4

R60

C155
SW@0.1u/10V_4_X7R
SW@4.99K/F_4

MEM_B1 CLK

+1.5V_GPU
VMB_CLKP1

VMB_CLKP0

VMB_CLKN1
C499

C507
C496
C501
C497
C9
C113
SW@1u/6.3V_4
SW@1u/6.3V_4
SW@1u/6.3V_4
SW@1u/6.3V_4
SW@1u/6.3V_4
SW@1u/6.3V_4
SW@1u/6.3V_4

VMB_CLKN0

R11

R9
SW@56.2/F_4

C145

C162
C166
C96
C519
C148
C152
C520
SW@1u/6.3V_4
SW@1u/6.3V_4
SW@1u/6.3V_4
SW@1u/6.3V_4
SW@1u/6.3V_4
SW@1u/6.3V_4
SW@1u/6.3V_4
SW@1u/6.3V_4

R58

R59
SW@56.2/F_4

SW@56.2/F_4
+1.5V_GPU

+1.5V_GPU

SW@56.2/F_4

C146
SW@0.01u/25V_4

C506
C12
SW@0.01u/25V_4

C123
C4
C7
C25
C505
C6
C101
SW@1u/6.3V_4
SW@1u/6.3V_4
SW@1u/6.3V_4
SW@1u/6.3V_4
SW@1u/6.3V_4
SW@1u/6.3V_4
SW@1u/6.3V_4
SW@1u/6.3V_4

+1.5V_GPU

C21
SW@10u/6.3V_6

C511

C177
C78
C158
C510
C512
C518
SW@1u/6.3V_4
SW@1u/6.3V_4
SW@1u/6.3V_4
SW@1u/6.3V_4
SW@1u/6.3V_4
SW@1u/6.3V_4
SW@1u/6.3V_4

+1.5V_GPU

C1
C509
C508
C504
SW@10u/6.3V_6
SW@10u/6.3V_6
SW@10u/6.3V_6
SW@10u/6.3V_6

C173
SW@10u/6.3V_6

PROJECT : ZQ2
Quanta Computer Inc.

C34
C514
C69
C517
SW@10u/6.3V_6
SW@10u/6.3V_6
SW@10u/6.3V_6
SW@10u/6.3V_6
Size

Document Number

Rev
1A

MEMORY 2 channel B
Date:
5

Wednesday, May 27, 2009

1

Sheet

22

of

46

CRT
*.1u_4

C202

*10p/50V_4 CRTVSYNC

C204

*10p/50V_4 CRTHSYNC

C545

10p/50V_4

DDCCLK_1

C546

10p/50V_4

DDCDAT_1

23

CRTVDD5

EC-C
C581

1A/30V
F1 2

+5V

D12
9

C541
*4.7U/6.3V_6
C206
0.1u/10V_4

INT_CRT_GRE

INT_CRT_BLU

INT_CRT_RED

L22

BLM18BA470SN1_6

CRT_R1

INT_CRT_GRE

L21

BLM18BA470SN1_6

CRT_G1

INT_CRT_BLU

L20

BLM18BA470SN1_6

CRT_B1

.22u/25V_6 CRT_BYP

VCC_SYNC SYNC_OUT2
SYNC_OUT1
VCC_DDC
BYP
SYNC_IN2
VCC_VIDEO SYNC_IN1

7
8
2

+3V

CRT_VSYNC1
CRT_HSYNC1

16
14

R89
R93

15
13

INT_CRT_VSYNC
INT_CRT_HSYNC

10
11

INT_DDCCLK
INT_DDCDATA

9
12

DDCCLK_1
DDCDAT_1

*Short_4
*Short_4

CRTVSYNC
CRTHSYNC

INT_CRT_VSYNC
INT_CRT_HSYNC

R128

R127

R126

140/F_4

150/F_4

150/F_4

C222
10P/50V_4

D08

C221
10P/50V_4

C220
10P/50V_4

C212
10P/50V_4

C213
10P/50V_4

CN15
CRT

6
1
7
2
8
3
9
4
10
5

C214
10P/50V_4

11

CRT_11

12

DDCDAT_1

13

CRTHSYNC

14

CRTVSYNC

15

DDCCLK_1

T28

17

C577

INT_CRT_RED

U21

CRTVDD5

1
RSX101M-30

CRTVDD5

+3V

0.22u/6.3V_4

D17

1 SMD1206P100TF

16

C571

9
9

EC-C

EC-C

C586
0.1u/10V_4

CRT_R1
CRT_G1
CRT_B1

3
4
5

VIDEO_1
VIDEO_2
VIDEO_3

DDC_IN1
DDC_IN2
DDC_OUT1
DDC_OUT2

GND

R351
R354

2.7K_4
2.7K_4

CRTVDD5

CM2009-02QR
INT_DDCDATA
INT_DDCCLK

9 INT_DDCDATA
9 INT_DDCCLK

R353
R352

2.7K_4
2.7K_4

+3V

LCD PW(LDS)

+3V

R117
R114

4.7K_4
4.7K_4

INT_EDIDCLK
INT_EDIDDATA

9
9

LA_DATAN0
LA_DATAP0

9
9

LA_DATAN1
LA_DATAP1

9
9

LA_DATAN2
LA_DATAP2

Ra- for DIS

Rb- for UMA
33
CONTRAST
9 INT_DPST_PWM

Ra
Rb

+3V

33

VIN

LA_CLK#
LA_CLK

B02 C02
R54
R50

VIN

C2

C167

0.1u/50V_6

1000p/50V_4

*0_4
0_4
BL_ON

LVDS_BRIGHT

DCR_EN

0.8A
C116

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30

INT_EDIDCLK
INT_EDIDDATA

9 INT_EDIDCLK
9 INT_EDIDDATA

9
9

LCDVCC

R40
R34

*Short_8
*Short_8 INVCC0

C133

4.7u/25V_8

+3V

U4

G_1

C168
1U/10V_4

6
4
3

9 INT_LVDS_DIGON

IN

OUT

IN

GND

ON/OFF

GND

R421

*Short_6

LCDVCC

2
C198

C197

C196

C199

5
1U/10V_4 *.1u_4

0.01u/16V_4
22u_8

IC(5P) G5243T11U
R77
100K_4

G_2

Backlight Control(LDS)

+3V

G_4
G_3

CN4

+3V

G_0

LVDS(LDS)

R311

LVDS-A30SFYG+

1000p/50V_4

10K_4
BL_ON

D16

1 BAS316

R320

BL#

28
28

R481
R484

DMIC_CLK
DMIC_DAT
C699

+3V

C409

0.1u/50V_6

1000p/50V_4

33_6 DMIC_CLK_R
33_6 DMIC_DAT_R

C695

1
2
3
4
5
6
7
8

9 INT_LVDS_BLON

EC_FPBACK#

33

Q21
DTC144EUA

2
Q22
2N7002K
R318

9
10

100K_4

CCD&MIC

*22P/50V_4

*22P/50V_4
C610

DMIC_POWER
R116*Short_6
R6 *Short_6
CCD_POWER
USBP13USBP13+

+3V

USBP13+
USBP13-

USBP13+
USBP13-

2
Q20
2N7002K

CN3

EC-C

EC-C
EC-C
12
12

30,33

CAMERA Module(CCD)

LID591#

10K_4

EC-C

PROJECT : ZQ2
Quanta Computer Inc.

C527
1000p/50V_6
11/19
Size

Document Number

Rev
1A

CRT/LVDS/LID
Date:
1

Wednesday, May 27, 2009

Sheet

23
8

of

46

HDMI HPD SENSE

(HDM)

R145

TX2_HDMI+

R171

715/F_4

TX2_HDMI-

R169

715/F_4

TX1_HDMI+

R163

715/F_4

TX1_HDMI-

R176

715/F_4

TX0_HDMI+

R173

715/F_4

TX0_HDMI-

R135
10K/F_4
D

Q11
2N7002E
2

715/F_4

+3V

R159

715/F_4

TXC_HDMI+

R157

715/F_4

TXC_HDMI-

Q10
2N7002E
2 HDMI_DET_R

R143
HDMI_DET

10K/F_4
R141

100K/F_4

R142

*Short_4
3

9 INT_HDMI_HPD

R144
200K/F_4

200K/F_4
1

+5V
D

R172

24

+3V

Close to HDMI Connector

Q9
2N7002E
2

R136

*Short_4

HDMI_HPD_EC#

33

USE RS880M to display the HDMI

Stuff 715 ohm P/N--> CS17152FB17

HDMI PORT
CN17

EMI reserve for HDMI(HDM)

Close connector

ESD Protect

8 TX2_HDMI+

close to HDMI connector

8 TX2_HDMI8 TX1_HDMI+

HDMI_DDC_CLK
HDMI_DDC_DATA
R174
100/F_4

TX2_HDMI-

HDMI_DET

1
2
3
4
5

TX1_HDMI+

10
9
7
6

10
9
7
6

HDMI_DDC_CLK
HDMI_DDC_DATA

TX1_HDMITX0_HDMI+
TX0_HDMITXC_HDMI+

8 TX0_HDMI8 TXC_HDMI+

HDMI_DET

TXC_HDMI-

8 TXC_HDMI-

*RClamp0524P
R170
100/F_4

1
2
GND_3/8
4
5

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19

TX2_HDMITX1_HDMI+

8 TX1_HDMI8 TX0_HDMI+

U7
TX2_HDMI+

TX2_HDMI+

TX1_HDMITX0_HDMI+

U8
TX1_HDMI+
TX1_HDMITXC_HDMI+
TXC_HDMI-

1
2
3
4
5

R177
100/F_4

1
2
GND_3/8
4
5

10
9
7
6

10
9

TX1_HDMI+
TX1_HDMI-

7
6

TXC_HDMI+
TXC_HDMI-

+5V

HDMI_DDC_CLK
HDMI_DDC_DATA

9 HDMI_DDC_CLK
9 HDMI_DDC_DATA

F2
SMD1206P100TF
2
1

D4 2
RSX101M-30

+5V_HDMI
HDMI_DET

EC-C

SHELL1
D2+SHELL3
D2 Shield
D2D1+
D1 Shield
D1D0+
D0 Shield
D0CK+
CK Shield
CKCE Remote
NC
DDC CLK
DDC DATA
GND
+5V
HP DET
SHELL4
SHELL2

20
22

23
21

QJ1119C-NK01-8F

C277

*RClamp0524P

TX0_HDMI-

0.22u/6.3V_4
U9

TXC_HDMI+

TX0_HDMI+
TX0_HDMIR164
100/F_4

TXC_HDMI-

TX2_HDMI+
TX2_HDMI-

1
2
3
4
5

1
2
GND_3/8
4
5

10
9
7
6

10
9

TX0_HDMI+
TX0_HDMI-

7
6

TX2_HDMI+
TX2_HDMI-

+5V

HDMI_DDC_CLK
HDMI_DDC_DATA

*RClamp0524P

R156
R155

4.7K_4
4.7K_4

+5V
+3V

PROJECT : ZQ2
Quanta Computer Inc.

23,27,28,32,35,42
2,4,5,9..15,19,23,26,28..33,35..42

Size

Document Number

Rev
1A

HDMI
Date:
5

Sheet

Wednesday, May 27, 2009

1

24

of

46

25

Giga-LAN AR8151
+3V_S5

close Pin1

R238

*Short_6

+3V_LAN

+3V_LAN
C415
10u/6.3V_8

C416

C414

C413

C412

10u/6.3V_8

1u/6.3V_4

0.1u/10V_4

*1000p/50V_4
9/16

U12

12,26 PCIE_WAKE#
R235

12 CLK_PCIE_LAN_REQ#

C633

*Short_4 8151_CLKREQ#
0.1u/10V_4

C406

1u/6.3V_4

AVDDL

C408

0.1u/10V_4

XTLO

C393

1u/6.3V_4

C394

0.1u/10V_4

R426

2.37K/F_4

Wake# and CLKREQ# PU at PCH side already

C622

C623
33p/50V_4

0.1u/10V_4

0.1u/10V_4

1
33p/50V_4

Y2
25MHz
C624

C396

AVDDH

RBIAS

10

TX0P

11

TX0N

12

AVDDL

13

TX1P

14

TX1N

15

AVDDH

16

TX2P

17

TX2N

18

AVDDL

19

TX3P

20

TX3N

21

XTLO

1.2H
C

+VDDCT

XTLI

C399

1
2

11,16,26 A_RST#

0.1u/10V_4

XTLI

VDD33

AVDDH

PERSTn

CLKREQn/LED2

WAKEn

DVDDL

CLKREQn

AR8151
5X5mm

VDDCT

40-Pin QFN

AVDDL_REG
XTLO

SMCLK
SMDATA
TESTMODE
TEST_RST

XTLI

TX_N

AVDDH_REG

TX_P

RBIAS

AVDDL

TRXP0

REFCLK_N

TRXN0

REFCLK_P

NC/AVDDL

AVDDL

TRXP1

RX_P

TRXN1

RX_N

NC/AVDDH

DVDDL_REG

NC/TRXP2

LED0

NC/TRXN2

LED1

NC/AVDDL

LX

NC/TRXP3

GND

22

AVDDH

C398

0.1u/10V_4

T47

23
24

DVDDL

C401

25

SMCLK_8151

R435

*0_4

26

SMDATA_8151 R439

0.1u/10V_4

*0_4

PDAT_SMB 5,12,26

SMBus PU at PCH side already

27
28

R648

29

PCIE_RXN6_C C407

*0_4 AVDDH

30

PCIE_RXP6_C

C410

31

AVDDL

C419

0.1u/10V_4

AVDDL

C420

0.1u/10V_4

0.1u/10V_4

AR8151

PCIE_RX1- 8

0.1u/10V_4

PCIE_RX1+ 8

32
33
34
35

CLK_PCIE_LOM#

11

CLK_PCIE_LOM

11

PCIE_TX1+ 8

36

PCIE_TX1- 8

37

DVDDL

38

LAN_ACTLED

39

LAN_LINKLED#

40

LX

R239

C417
C418
5.1K_4

L67

1u/6.3V_4
0.1u/10V_4

4.7uH/1A_2X2

41

Layout :
need isolate GND

NC/TRXN3

PCLK_SMB 5,12,26

+VDDCT
C648

C647

C650

*1000p/50V_4

0.1u/10V_4

10u/6.3V_8

RJ45(LAN)

TRANSFORMER(LAN)

CN20
R400

9
10

220_8

TX1N

TX1P

TX0N

TX0P

LAN_ACTLED

R220

R219

49.9/F_4

49.9/F_4

49.9/F_4

1
2
3
4
5
6
7
8

LAN_LINKLED#
LAN_LNK_LED_PWR

11
12

reverse 1000p*4 for EMI

Close Transformer U28
AVDD_CEN

LAN_N2

R221

49.9/F_4
LAN_N1

R222

X-TX0P
X-TX0N
X-TX1P
X-TX2P
X-TX2N
X-TX1N
X-TX3P
X-TX3N

L36
PBY160808T-181Y-N/2A/180ohm_6
C381

reverse 1000p*4 for EMI

+VDDCT

0.1U/10V_4

0.1U/10V_4

TX3N

TX2N

TX3P

C377

TX2P

C378

R223

220_8

EC-D
C356

0.1u/10V_4

C359

0.1u/10V_4

C366

0.1u/10V_4

C372

TX1P
TX1N

4
5
6

TX2P
TX2N

7
8
9

TX3P
TX3N

10
11
12

0.1u/10V_4

R215

R216

R217

R218

TX0P
TX0N

1
2
3

TCT1
TD1+
TD1-

GND2
GND1

0+
01+
2+
213+
3-

14
13

+3V_LAN

1U/10V_4

U26
B

YELLOW_N
YELLOW_P

GREEN_N
GREEN_P
RJ45

MCT1
MX1+
MX1-

TCT2
TD2+
TD2-

MCT2
MX2+
MX2-

TCT3
TD3+
TD3-

MCT3
MX3+
MX3-

TCT4
TD4+
TD4-

MCT4
MX4+
MX4-

24
23
22

X-TX0P
X-TX0N

21
20
19

X-TX1P
X-TX1N

18
17
16

X-TX2P
X-TX2N

15
14
13

X-TX3P
X-TX3N

LAN_ACTLED
LAN_LINKLED#

TRANSFORMER
C605

LAN_N4

LAN_N3

49.9/F_4

49.9/F_4

49.9/F_4

49.9/F_4

Delta
LFE9276C-R (DB0ZR1LAN00)
FCE
NS892407 (DB0LL1LAN00)
Bothhand GST5009B (DB0Z06LAN00)

C376

C375

0.1U/10V_4

0.1u/10V_4

R197
75/F_8

R200
75/F_8

R207
75/F_8

R213
75/F_8

*0.1u//50V_8

C619
*0.1u//50V_8

C391
1500p/3KV_18

PROJECT : ZQ2
Quanta Computer Inc.
Size

Document Number

Rev
1A

LAN (AR8151)
Date:
5

Wednesday, May 27, 2009

1

Sheet

25

of

46

26

MINI-CARD WLAN(MPC)
+3V

*Short_4
*Short_4

PCIRST#_R_2
PCLK_DEBUG_R_2
+WL_VDD

8
8

PCIE_TXP2
PCIE_TXN2

8
8

PCIE_RXP2
PCIE_RXN2

11 CLK_PCIE_WLANP_2
11 CLK_PCIE_WLANN_2
12 CLK_PCIE_2_REQ#
Q33
12,25 PCIE_WAKE#

WLAN_WAKE#_2

15
13
11
9
7
5
3
1

Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
GND
PETp0
PETn0
GND
GND
PERp0
PERn0
GND
UIM_C4
UIM_C8
GND
REFCLK+
REFCLKGND
CLKREQ#
Reserved
Reserved
WAKE#

53

*2N7002E

+WL_VDD

+3.3V
GND
+1.5V
LED_WPAN#
LED_WLAN#
LED_WWAN#
GND
USB_D+
USB_DGND
SMB_DATA
SMB_CLK
+1.5V
GND
+3.3Vaux
PERST#
W_DISABLE#
GND

GND

R465
R466

11,29 PCIE_RST#
11 PCLK_DEBUG

H=5.6mm

GND

CN23
51
49
47
45
43
41
39
37
35
33
31
29
27
25
23
21
19
17

54

+3.3V: 1000mA
+3.3Vaux:330mA
+1.5V:500mA

UIM_VPP
UIM_RST
UIM_CLK
UIM_DATA
UIM_PWR
+1.5V
GND
+3.3V

R454
52
50
48
46
44
42
40
38
36
34
32
30
28
26
24
22
20
18
16
14
12
10
8
6
4
2

+WL_VDD
+WL_VDD
+1.5V_WL
R467
R468

R469

*10K_4

*Short_8

+WL_VDD
C655

C663
0.1u/10V_4

C677
*0.1u/10V_4

C711
*0.1u/10V_4

10U/6.3V_8
*Short_4
*Short_4

RF_LED# 31,33
D

USBP4+ 12
USBP4- 12
R470
R475

*0_4
*0_4

PDAT_SMB 5,12,25
PCLK_SMB 5,12,25

+1.5V_WL
+1.5V

+WL_VDD
A_RST# 11,16,25
RF_EN 33
A_LFRAME#_R_2
A_LAD3_R_2
A_LAD2_R_2
A_LAD1_R_2
A_LAD0_R_2

EC-C
R485
R487
R489
R490
R493

*Short_4
*Short_4
*Short_4
*Short_4
*Short_4

LPC_LFRAME#
LPC_LAD3
LPC_LAD2
LPC_LAD1
LPC_LAD0

+1.5V_WL
LPC_LFRAME# 11,33
LPC_LAD3 11,33
LPC_LAD2 11,33
LPC_LAD1 11,33
LPC_LAD0 11,33

C702
1000p/50V_4

C674
0.1u/10V_4

R27

*Short_6

C659
10u/6.3V_8

+1.5V_WL
+WL_VDD

MINI-CARD 5.6H

8/28 modify
R519

*10K_4

PROJECT : ZQ2
Quanta Computer Inc.
Size

Document Number

Rev
1A

Mini-Card/WL
Date:
5

Wednesday, May 27, 2009

1

Sheet

26

of

46

SATA HDD(HDD)

27

SATA ODD (ODD)

CN22
GND23

GND1
RXP
RXN
GND2
TXN
TXP
GND3

GND24
SATA_HDD

GND14

SATA_TX0+ 13
SATA_TX0- 13
SATA_RX0-_C
SATA_RX0+_C

8
9
10
11
12
13
14
15
16
17
18
19
20
21
22

C672
C666

0.01u/16V_4
0.01u/16V_4

GND
A+
AGND
BB+
GND

SATA_RX0- 13
SATA_RX0+ 13

DP
5V
5V
MD
GND
GND

+5V_HDD

GND15

1
2
3
4
5
6
7

SATA_TX1+ 13
SATA_TX1- 13
SATA_RX1-_C
SATA_RX1+_C

C604
C603

0.01u/16V_4
0.01u/16V_4

SATA_RX1- 13
SATA_RX1+ 13
+5V_ODD

SATA_DP

8
9
10
11
12
13

R397

1K_4

B03

1.8A (MAX.)

C275

C273

C261

C271

C602

0.01u/16V_4

0.01u/16V_4

*0.1u/10V_4

*0.1u/10V_4

*10u/6.3V_6

C601
100u/6.3V_3528

15

SP@SATA_ODD
+5V_HDD
R425

24

14

1A (MAX.)
+

CN16
1
2
3
4
5
6
7

3.3V
3.3V
3.3V
GND
GND
GND
5V
5V
5V
GND
RSVD
GND
12V
12V
12V

23

C630
C625
100u/6.3V_3528 10u/6.3V_6

C632

C634

C639

C637

0.1u/10V_4

*0.1u/10V_4

0.01u/16V_4

0.01u/16V_4

*Short_8

+5V

JV-12.7mm(H=5.5mm)-ZQ2
Main

DFHS13FR017

Second

DFHS13FR006,

JM-9.5mm(H=2.4mm)-ZQ2B
Main

DFHS13FR005

Second

DFHS13FR078,

DFHS13FR077

DFHS13FR075

B03

+5V

ODD POWER(ODD)

1.8A (MAX.)

Q37
AO6402A

+5V_ODD_R

+5V_ODD

+3VPCU

1
R278
100K

100K

*Short_8
C

R225
+15V

R429

MOD_EN_5V

6
5
2
1

*0_4

Q38
DMN601K-7
1

R420

ODD_EN

R133
*100K

C614
0.1u/25V_6

Q39
DMN601K-7
1

EC_ODD_EN

0_4

33

11 PCH_ODD_EN

R419

PROJECT : ZQ2
Quanta Computer Inc.
Size

Document Number

Rev
1A

SATA-HDD/ODD/HOLE
Date:
1

Wednesday, May 27, 2009

4

Sheet

27

of

46

HPR

Codec(ADO)

LINE-OUT/SPDIFO(AMP)

HPL

28

+3V_SPD

reverse R441
*0_4

R495

0_4

ADOGND

MIC1-VREFO-R

C692

R280

EC-C

MIC1-VREFO-L

*0_4

C715
0.22u/6.3V_4

ADOGND
HP_JD

C705

10u/6.3V_6

HPL
HPR

R286
R289

HPL-1
HPR-1

68_4
68_4

L52
L54

C710

ADOGND

C713

+5VA

3
4
5

ADOGND

R298

R282

C489

C477

*1K_4

*1K_4

2200p/50V_4

2200p/50V_4

C690

HPL_SYS
HPR_SYS

BK1608LL121/150mA/120ohm_6
BK1608LL121/150mA/120ohm_6

CN25

1
2

68ohm ohm

ADOGND

Place next to pin 27

2.2u/6.3V_6

3
Q32
BSS84

LINEOUT_JD:
HP not insert->H
HP insert->L

reverse R429

MIC1-VREFO-L-R

ADOGND

+3V
MIC1-VREFO-L

R275

7
8
6

SPDIF_OUT

LED

Drive
IC

10u/6.3V_6 0.1u/10V_4

+5VA

SPDIF_BLACK
2.2u/6.3V_6

Normal OPEN Jack

PN: AL000271000

49

PGND

Place next to pin 46

R423

*Short_6

ADOGND

2N7002K

2
Q18

R507

19

20K/F_4

ADOGND

2N7002K

ADOGND

18
17

Placement near

Audio Codec

ADOGND

16
15
14
SENSEA

13

R509

39.2K/F_4

LINEOUT_JD

R508

20K/F_4

MIC1_JD

C07
HPL_SYS

ANALOG
EAPD_HP

ALC271X

Q46
*MMBT3904

PCBEEP dont coupling any signals if possible

8/17 separate PCBEEP to Digital from Realtek suggestion
1.6Vrms

+AZA_VDD
PCBEEP
C691

Near CN25

*VPORT_6

Q19

22K_4
HP_JD

20

DIGITAL
+3V

R516

MIC1_L1

21

25

26

27

28

VREF

AVSS1

LDO-CAP

30

31

32

33

34

35

29
MIC2-VREFO

MIC1-VREFO-L

MIC1-VREFO-R

HP-OUT-L

AVDD1

MIC1_R1

0.1u/10V_4

LINE2-L
Sense A

LINE_JD#

22

D24

10K_4

10u/6.3V_6

LINE2-R

SPDIFO

+5VA

Place next to pin 25

23

C720

1u/10V_6 BEEP_1

C689

R515

C725

R510
4.7K_4

47K_4

SPKR

ADOGND
HPR_SYS

12

If either HDA device io power use +1.5V,

all device IO power change to +1.5V

100p/50V_4

Q47
*MMBT3904

2
1

0.1u/10V_4 10u/6.3V_6

10u/6.3V_6 0.1u/10V_4

PVDD2

SPDIFO2/EAPD

LINEOUT_JD

ADOGND

24

PCBEEP

SPDIF_OUT_R 48

12

47

Spilt by DGND

RESET#

46
C684

SYNC

C680

MIC2-L

DVDD-IO

*Short_6 +5VPVDD2

C671

MIC2-R

SPK-R+

R258

EAPD#
C670

Sense-B

SPK-R-

11

Spilt by PGND
+5V

JDREF

PVSS2

10

45

MONO-OUT

(Vista Premium Version)

SDATA-IN

44

R_SPK+

PVSS1

R_SPK-

MIC1-L

SPK-L-

DVSS2

43

Place next to pin 39

LINE1-L

SPK-L+

BIT-CLK

42

41

40

L_SPK-

HP-OUT-R

CBP

L_SPK+

GND_EARTH

SDATA-OUT

0.1u/10V_4

C685

10u/6.3V_6

HP_JD

10u/6.3V_6
R513

LINE1-R

MIC1-R

PD#

C679

+5VA

C719
0.1u/10V_4

PVDD1

C668

10u/6.3V_6 0.1u/10V_4

39

GPIO1/DMIC-CLK

C669

+5VPVDD1

*Short_6

AVDD2

GPIO0/DMIC-DATA

R265

AVSS2

DVDD1

37
38

+5V

CBN

ADOGND

ANALOG
Spilt by AGND

ADOGND

Place next to pin 38

CPVEE

36

C721
U31

C688
0.1u/10V_4

C683
10u/6.3V_6

ADOGND

Place next to pin 1

R497
23
23

DMIC_DAT
DMIC_CLK

DMIC_DAT
DMIC_CLK

ACZ_RST#_AUDIO
C698
*22P/50V_4

ACZ_RST#_AUDIO

PD#

C696

12

ACZ_SYNC_AUDIO

*22P/50V_4
ACZ_SDIN0_R

R494

22_4

ACZ_SDIN0

0V : Power down Class D SPK amplifer

3.3V : Power up Class D SPK amplifer
C475

C706

C709

0.1u/10V_4

10u/6.3V_6

*Short_6 +AZA_VDD

ADOGND
apply for codec suggestion

12
MIC1-VREFO-R
MIC1-VREFO-L

MIC(AMP)

12

ACZ_SDOUT_AUDIO

12

ACZ_BITCLK_AUDIO

12

Place next to pin 9

R264
4.7K/F_4

R261
4.7K/F_4

PINK

*22p/50V_4
MIC1_L1

C461

4.7u/6.3V_6

MIC1_L2

R268

1K/F_4

MIC1_L3

MIC1_R1

C442

4.7u/6.3V_6

MIC1_R2

R257

1K/F_4

MIC1_R3

Reserve for EMI

L47
BK1608LL121/150mA/120ohm_6
L46
BK1608LL121/150mA/120ohm_6

1 CN24
2
6
3
4

MIC1_L
MIC1_R
MIC1_JD

8
5
SPDIF_OUT

L70

SPDIF_OUT_R

BLM15BD121SN1/300mA/120ohm_4

JAS7331-P30H9-7F
C439
470p/50V_4

GND_EARTH don't coupling AGND and SPK signals

R242

*0_6

R537

*0_6

R536

0_6

R281
R521
R251
R273

*0_6
*0_6
*0_6
*0_6

GND_EARTH

R260

Normal OPEN Jack

Max. 100mVrms input for Mic-IN

0_6
ADOGND

R266
R263

ADOGND

MIC1_JD

*0_6
*0_6

C675
*33p/50V_4

C465
470p/50V_4

C481
C723

L69 Place close to Codec

Demodulation Filter

D14

Power (ADO)

*VPORT_6

Near CN28

Tied at one point only under the

ALC269 or near the ALC269

*1000p/50V_4
*1000p/50V_4

ADOGND
+5VA

DIGITAL

ADOGND

ANALOG

L69

BLM21PG221SN1D(220,100M,2A)_8

+5V
U28

IN

OUT

SHDN

SET

R474

*G923-330T1UF

C07

*29.4K/F_4
C678

R476
*10K/F_4
C656

Internal Speaker(AMP)

Mute(ADO)

GND

+5VA

ramp change to +5V

C673
+3V

+5V

D10

CN13
R_SPK+
R_SPKL_SPKL_SPK+

R654
R254

*0_4

R498

R568
*10K_4

*10K_4

0.1u/10V_4 10U/6.3V_8
PD#

R288
R299
R186
R189

*Short_6
*Short_6
*Short_6
*Short_6

R_SPK+_1
R_SPK-_1
L_SPK-_1
L_SPK+_1

Speak CN1
CN8

1K_4
BAS316

ACZ_RST#_AUDIO

D22

EAPD_HP

ADOGND

2
1

C3C

10U/6.3V_8 0.1u/10V_4

C662

ADOGND

ramp reserve R568 for codec

*BAS316

D20

BAS316

D21

EAPD#

1
2

C486
C488
C343
C350
*0.22u/25V_6 *0.22u/25V_6 *0.22u/25V_6 *0.22u/25V_6

Q45
*2N7002K

Speak CN2

C656, C662 close U28 pin3 and L69

AMP_MUTE# 33

PROJECT : ZQ2
Quanta Computer Inc.

ADOGND

Vset =1.25V
Size

Vout =Vset[1+AR(1,2)/AR(2,GND)]

apply for codec suggestion

Document Number

Rev
1A

ALC271X / AMP / SPK

Date:

Wednesday, May 27, 2009

1

Sheet

28

of

46

29

4 IN 1 CARD READER (MMC)

CN10

Main

XD_RDY
XD_RE#
XD_CE#
XD_CLE
XD_ALE
XD_WE#
XD_WP#
XD_D0
XD_D1
SD_DAT2
SD_DAT3
SD_CMD

??

Second

??

VCC_XD

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19

MS_SCLK
MS_DATA3
MS_INS#
MS_DATA2
MS_DATA0

XD-R/B
XD-RE
XD-CE
XD-CLE
XD-ALE
XD-WE
XD-WP
XD-D0
XD-D1
SD-DAT2
SD-DAT3
SD-CMD
4IN1-GND1
MS-VCC
MS-SCLK
MS-DATA3
MS-INS
MS-DATA2
MS-DATA0

MS-DATA1
MS-BS
4IN1-GND2
SD-VCC
SD-CLK
SD-DAT0
XD-D2
XD-D3
XD-D4
SD-DAT1
XD-D5
XD-D6
XD-D7
XD-VCC
XD-CD-SW
SD-WP-SW
SD-CD-SW

20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36

MS_DATA1
MS_BS
VCC_XD

VCC_XD

SD_CLK
SD_DAT0
XD_D2
XD_D3
DATA4
SD_DAT1
DATA5
DATA6
DATA7

XD_CD#
SD_WP
SD_CD#
VCC_XD

SHIELD1-GND
SHIELD2-GND
SHIELD3-GND
SHIELD4-GND

37
38
41
42

R464
*5.1K_4

C658
4.7u/10V_6

C657
0.1u/10V_4

CONN_CARDREADER

Close to CN10 pin 14 & pin23

4.7u CAP close to pin23

+1.8V_VDD

B04

+3V_VDD
R488

*Short_4

T104 T103

XTALSEL

C700

C703

0.1u/10V_4

0.1u/10V_4
XTALSEL
CRMD_N
NBMD
CTRL1
CTRL3
DATA1
DATA0
DATA7
DATA6

DATA0

48
47
46
45
44
43
42
41
40
39
38
37

SD_DAT0
+3V_VDD

Clock input selection

'1' for 48MHz input [Default]
'0' for 12MHz input

DATA1

C740

EC-D

XD_D0

0.1u/10V_4

SD_DAT1

R503

PCIE_RST#

C716

*0.47u/6.3V_4

*Short_4

+3V_VDD

R499
+3V

R486

*Short_6

330_4

+3V_VDD

C701

12
12

USBP10+
USBP10-

4.7u/10V_6

C724
*5p/50V_4

XI
XO

C722
*5p/50V_4

+1.8V_VDD

1
2
3
4
5
6
7
8
9
10
11
12

GPON7
EXT48IN
RSTN
REXT
VD33P
DP
DM
VS33P
XI
XO
VDD
VDD

CTRL0
DATA5
CTRL2
GPI4
DATA4
DATA3
DATA2
XDWPN
GPI2
XDCEN
EEPDATA
GPI1

AU6437-GBL

XD_D1

36
35
34
33
32
31
30
29
28
27
26
25

CTRL0
DATA5
CTRL2
GPI4
DATA4
DATA3
DATA2
XD_WP#
GPI2
XD_CE#
EEPDATA
GPI1

SD_DAT2
DATA2

MS_DATA2
XD_D2

T100

SD_DAT3
DATA3

MS_DATA3
XD_D3

T99
T96
T98

Close to connector
PN?

R462

*Short_4

SD_CLK
2

CTRL0

XD_ALE

13
14
15
16
17
18
19
20
21
22
23
24

MS_DATA1

CTRL0, CRTL 1 trace length shorter ,

and surround with GND.

V18
CF_V33
VCC33
AGND5V
V33
VDDHM
GND
VDD
CTRL4
XDCDN
SDWPEN
EEPCLK

11,26

*100K_4

VDDHM
GND
VDD
XTALSEL
TRIST
NBMD
CTRL1
CTRL3
DATA1
DATA0
DATA7
DATA6

U30

B04
R506

MS_DATA0

C660
*10p/50V_4

MS_BS

crystal trace width needs at least 10 mils.

EEPCLK

pin13 output 20mils

SD_WP

T102

C714
C718

18p/50V_4

XI

CAP close PIN11,12

CTRL1

XD_CLE

4.7u/10V_6
R463

C717

18p/50V_4

R505
270K_4

*Short_4

MS_SCLK
SD_CMD

XO
pin14 output 15mils

*0_4

VCC_XD

Y7
12MHz

XD_CD#
CTRL4
+1.8V_VDD
+3V_VDD

+3V_VDD
C697

C693

4.7u/10V_6

0.1u/10V_4

R482
CTRL2

SD write protect
1:decided by SDWP[Default]
0:letting SD always
write-able

C661
*10p/50V_4

XD_RDY
SD_CD#

CTRL3

XD_WE#
MS_INS#

CTRL4

XD_RE#

PROJECT : ZQ2
Quanta Computer Inc.
Size

Document Number

Rev
1A

AU6437 CardReader
Date:
A

Wednesday, May 27, 2009

Sheet
E

29

of

46

USB PORT(USB/MB)

EC-C
USBPWR1

L73

+5V_S5
C629

12
12

2
3

USBP11USBP11+

330u/6.3V_6.3X5.8

IN1
IN2

4
1

USBON#

OUT3
OUT2
OUT1

EN#
GND

8
7
6

USBPWR1

OC#

OC_6#

1
2
3
4

USBP0USBP0+

12

RV1

1
2
3
4

8
7
6
5

1
4

USBP11USBP11+

C483
2.2u/6.3V_6

+3VPCU
23,33

12
12

RV2
2

4.7pF_4

12
12

EC-C

OC_7#
OC_4#

USBON#

L72

APL3510BXI-TRG

2
3

USBP12USBP12+

2
3

1
4

USBP12USBP12+

1
4

USBP11USBP11+
USBP12USBP12+

*DLW21HN900SQ2L/330mA/90ohm
4.7pF_4

USBP8USBP8+

EC-C
12
12

20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1

LID591#
+5V_S5

8
7
6
5

USB_MB

2
3

33

1
4

CN21
U11

1u/10V_6

USBP04
3
4
USBP0+
1
2
1
L68
*DLW21HN900SQ2L/330mA/90ohm

3
2

USBP0USBP0+

EC-C
EC-C
12
12

L74
2
3

USBP8USBP8+

30

CN11

2
3

*DLW21HN900SQ2L/330mA/90ohm

C405
D

USB BOARD CONN(USB/SB)

+5V_S5

USB_CONN

2
3

1
4

USBP8USBP8+

1
4

*DLW21HN900SQ2L/330mA/90ohm

+3V_S5

31,33

+3V_S5
2

SATA_LED#_R

R3

SATA_ACT#

13

ACPRN

C05

33

Q12
*BSS84

R2
*10K/F_4 1

R175
*100K_4

SB side have pull-up

+3VPCU

+3V

U1
*TC7SH08FU

BLUETOOTH CONN(BTM)

PWRLED#

SUSLED#

Q13
*BSS84

B07
33

0_4

NBSWON#

33
33

NUMLED#
CAPSLED#

D1

Q14
BSS84
R659
100_4

+3V
CN1

SUS_LED
PIPE_LED

BAS316
R660
R661
R662

SATA_LED#_R

453/F_4
453/F_4
453/F_4

+3V_S5

1
2
3
4
5
6
7
8
9
10
11
12

30mil

BT_POWER

3
Q17

C392
.33u/10V_6

R227
47K_4

31,33

POWER BOARD CONN(UIF)

+ C400

C404

AO3413
2.2u/6.3V_6

13
14

1000p/50V_4

33 BT_POWERON#

R231

4.7K_4

POWER/B

LED BOARD CONNECTOR(UIF)

Q36
3

12
12

USBP9+
USBP9-

*0.1u/10V_4
3

ODD_EJ

R643
100K_4

CN9

BT_POWER
*DLW21HN900SQ2L/330mA/90ohm
USBP9+
3
4
3
4
USBP92
1
2
1
T48
BT_LED
L39

5
4
3
2
1

7
6

BT_CONN
C422
*0.01u/16V_4

33

C3

+3V

33 P_SAVE_LED#

EC-C

+3V

P_SAVE_LED

+3V

BSS84
1

Q41
BSS84

R651
100K_4

B06
+3V

C05

+3V
R663

R644
100K_4

33 POWER_SAVE

Q42
BSS84

2.2K_4
ODD_EJ_CON
POWER_SAVE_CON

R652
100K_4

CN2
1
2
3
4
5
6

1
2
3
4
5
6

7
8

PROJECT : ZQ2
Quanta Computer Inc.

7
8

SW/LED
Size

Document Number

Rev
1A

USB/BT/TP
Date:
5

Wednesday, May 27, 2009

Sheet
1

30

of

46

EE RETURN-PATH CAPACITORS(EMC)

+1.8V

VIN

C528

1000p/50V_4

+3V

VIN

C529

1000p/50V_4

CPU_VDDNB_CORE

LED(UIF)
LED1

C535

VIN

1000p/50V_4

CPU_VDDNB_CORE

30,33

11/19
D

31

+3V_S5

Amber

EC3

For fix HyperTransport nets

across plane splits

SUSLED#

30,33 PWRLED#

*0.1U/10V_4

R314

806/F_4

R315

56_4

2
1

LED_A/B
EC2

+VGPU_CORE

EC1

C543

1000p/50V_4

C549

33p/50V_4

EC-C

+1.8V
+5V_S5

*0.01U/25V_4

C729

*0.01u/50V_6

C495

*0.01u/50V_6

C665

*0.01u/50V_6

C374

*0.01u/50V_6

VIN

C490

0.1u/16V_6

C411

*0.01u/50V_6

C664

*0.01u/50V_6

C547

*0.01u/50V_6

Blue

+3V

R319

*1M_4

R323

*1M_4

+3VPCU

+3VPCU

Amber
LED2

33

BATLED1#

33

BATLED0#

R316

806/F_4

R322

56_4

EC-C

1
LED_A/B

34

+3V

EC-C

BAT-V

BAT-V

VIN

*0.1u/10V_4

+5V_S5

*0.01u/50V_6

C316

*0.01u/50V_6

VIN
NB_CORE

+3V

+5V_S5

C403

*0.1u/10V_4

C402

*0.01u/16V_4

0.1u/10V_4

C737

0.1u/10V_4

C194

*0.01u/50V_6

Blue
RF_LED_EN#

VIN
C5

C738

VIN

+3V

C735

*0.1u/10V_4

C736

*0.1u/10V_4

C687

*0.1u/10V_4

C686

*0.01u/16V_4

+3V C739

+3V

33

RF_LED_EN#

26,33 RF_LED#

HOLE3
*HG-C315D118P2
7
6
8
5
9
4

Amber
R321

806/F_4

R653

MiniCard
HOLE12
H-C197D122P2

HOLE17
H-C217D122P2

VGA

HOLE20
H-C197D51P2

CPU
HOLE10
H-C236D142P2

HOLE5
H-C197D122P2

HOLE11
H-C236D142P2

HOLE8
H-C197D122P2

HOLE23
*HG-C315D118P2
7
6
8
5
9
4

HOLE1
*H-C236D118P2

HOLE18
*H-C236D118P2

EC-C

HOLE15
H-C236D142P2

HOLE27
H-C197D122P2
1

DEL Hole26

1
2
3

1
2
3

1
2
3

HOLE24
*HG-C315D118P2
7
6
8
5
9
4

1
2
3

1
2
3

1
2
3

HOLE14
H-C236D142P2

HOLE6
HG-C276D142P2
7
6
8
5
9
4

0_4

LED

HOLE21
H-C217D142P2

0_4

LED3

NB
HOLE4
*HG-C315D118P2
7
6
8
5
9
4

*0_4

R649

+3V
Q40
*BSS84
1

AMBER LED (HKC)

HOLE(OTH)
HOLE7
*HG-C315D87P2
7
6
8
5
9
4

R647

+5VPCU

*0.01U/25V_4

HOLE22
*HG-C315D118P2
7
6
8
5
9
4

HOLE19
H-C177D79P2

HOLE2
*H-C94D94N
HOLE31
HOLE32
HOLE33
HOLE34
HOLE35
HOLE36
*ss-fm_cmp *ss-fm_cmp *ss-fm_cmp *ss-fm_cmp *ss-fm_cmp *ss-fm_cmp
HOLE28
*SPAD-ZQ2-2

HOLE29
*SPAD-ZQ2-3

HOLE30
*SPAD-ZQ2-4

HOLE16
*HG-C315D118P2
7
6
8
5
9
4

PROJECT : ZQ2
Quanta Computer Inc.

11/19

1
2
3

HOLE9
*HG-C276D118P2
7
6
8
5
9
4
1
2
3

1
2
3

HOLE25
*HG-C315D118P2
7
6
8
5
9
4
1
2
3

1
2
3

HOLE13
*HG-C315D110P2
7
6
8
5
9
4

Size

Document Number

Rev
1A

POWER/USB/BT/TP/MDC
Date:
5

Sheet

Wednesday, May 27, 2009

1

31

of

46

K/B(KBC)

32

CN6
33
33
33
33
33
33
33
33
33
33
33
33
33
33
33
33
33
33
33
33
33
33
33
33
33
33

EC-C

Del CAP

MY0
MY1
MY2
MY3
MY4
MY5
MY6
MY7
MY8
MY9
MY10
MY11
MY12
MY13
MY14
MY15
MY16
MY17
MX7
MX6
MX5
MX4
MX3
MX2
MX1
MX0

MY0
MY1
MY2
MY3
MY4
MY5
MY6
MY7
MY8
MY9
MY10
MY11
MY12
MY13
MY14
MY15
MY16
MY17
MX7
MX6
MX5
MX4
MX3
MX2
MX1
MX0

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26

+3VPCU

MX7
MX6
MX5
MX4

RP1
10
9
8
7
6

10K_10P8R
1 MX1
2 MX0
3 MX2
4 MX3
5

27
28
KB

TOUCHPAD BOARD CONN(TPD)

+5V

+5V

50mil
L33

R147
10K_4

R139
10K_4

33
33

L31
L29

TPDATA
TPCLK

+TPVDD

BK1608HS220/1A/22ohm_6

C287

C281

*0.1u/10V_4

0.1u/10V_4

CN7
TPDATA_R
TPCLK_R

LZA10-2ACB104MT/100mA_6
LZA10-2ACB104MT/100mA_6
C276

C267

RIGHT#

*0.01u/16V_4
*0.01u/16V_4
LEFT#

12
11
10
9
8
7
6
5
4
3
2
1

14
13

+3V

CPU FAN(THM)

+5V

+3V

R326

R329

R328

10K_4

10K_4

10K_4

R325
R324
*10K_4

SW1

FAN_PWM_E

2,4,12 PM_THERM#

Q23
MMBT3904

SW2
RIGHT#

1
3

SWITCH_1.5

CN14

FANSIG

+5V_FAN

33

C542
1000p/50V_4

SWITCH_1.5

2
4
5
6

1
3

R327
*Short_6

10K_4

TP/B
LEFT#

+5V

+3V

33

2
4
5
6

FAN_PWM_CN

3
Q24
MMBT3904

1
2
3
4
FAN CONN

30mil

CPUFAN#
A

PROJECT : ZQ2
Quanta Computer Inc.
Size

Document Number

Rev
1A

KB/FAN/EE RETURN CAP

Date:
5

Wednesday, May 27, 2009

Sheet
1

32

of

46

EC(KBC)

L37

BK1608HS220/1A/22ohm_6

+3V

30mil
+3VPCU

C383

C389

0.1u/10V_4

4.7u/10V_6

I/O ADDRESS SETTING(KBC)

+A3VPCU

33

E775AGND

R228

2.2_6

D7

0.03A(30mils)

+3VPCU_EC

0.1u/10V_4

U10

4.7u/10V_6

0.1u/10V_4

Take care of power side

C335

*0.1u/10V_4

C361

VDD

C357

0.1u/10V_4

102

C368

*0.1u/10V_4

AVCC

C382

0.1u/10V_4

VCC1
VCC2
VCC3
VCC4
VCC5

C351

4.7u/10V_6

19
46
76
88
115

BAS316
C390

C369

E775AGND

C388

*0.01u/50V_6

C384

121
122

SIO_RCIN#

29

12 SIO_EXT_SCI#
C373
*10p/50V_4

EC_FPBACK#

23 EC_FPBACK#
T71
9,11
30
11

NOCIR#

124

USBON#

123

IRQ_SERIRQ

125

A_RST#_SB
USBON#
IRQ_SERIRQ

12 SIO_EXT_SMI#

32
32
32
32
32
32
32
32

MX0
MX1
MX2
MX3
MX4
MX5
MX6
MX7

32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32

MY0
MY1
MY2
MY3
MY4
MY5
MY6
MY7
MY8
MY9
MY10
MY11
MY12
MY13
MY14
MY15
MY16
MY17

MX0
MX1
MX2
MX3
MX4
MX5
MX6
MX7
MY0
MY1
MY2
MY3
MY4
MY5
MY6
MY7
MY8
MY9
MY10
MY11
MY12
MY13
MY14
MY15
MY16
MY17

SM Bus 2 for CPU

TPCLK
TPDATA
1.2V_ON

32
TPCLK
32
TPDATA
37
1.2V_ON
30 BT_POWERON#
39,42 MAINON

for 781
R196

11 RTC_CLK

R198

*775@20M_6

70
69
67
68
72
71
10
11
12
13

T35

781@0_4

for 775

53
52
51
50
49
48
47
43
42
41
40
39
38
37
36
35
34
33

MBCLK
MBDATA
CPU_SMBCLK
CPU_SMBDATA

34
MBCLK
34
MBDATA
4
CPU_SMBCLK
4 CPU_SMBDATA

SM Bus 1 for BATT

54
55
56
57
58
59
60
61

E775_32KX1

77

E775_32KX2

79

R199
*775@33K/F_4

GPIO85/GA20

GPIO94/DA0
GPI95/DA1
GPI96/DA2
GPI97

D/A

KBRST/GPIO86

LPC

ECSCI/GPIO54
GPIO24/LDRQ
GPIO10/LPCPD
LREST
GPIO67/PWUREQ
SERIRQ
GPIO65/SMI

GPIO

KBSIN0
KBSIN1
KBSIN2
KBSIN3
KBSIN4
KBSIN5
KBSIN6
KBSIN7
KBSOUT0/JENK
KBSOUT1/TCK
KBSOUT2/TMS
KBSOUT3/TDI
KB
KBSOUT4/JEN0
KBSOUT5/TDO
KBSOUT6/RDY
KBSOUT7
KBSOUT8
KBSOUT9/SDP_VIS
KBSOUT10/P80_CLK
KBSOUT11/P80_DAT
KBSOUT12/GPIO64
KBSOUT13/GPIO63
KBSOUT14/GPIO62
KBSOUT15/GPIO61/XOR_OUT
GPIO60/KBSOUT16
GPIO57/KBSOUT17

TIMER

GPIO37/PSCLK1
GPIO35/PSDAT1
GPIO26/PSCLK2
GPIO27PSDAT2
GPIO25/PSCLK3
GPIO12/PSDAT3

PS/2

GPIO72/IRRX1/SIN2
GPIO70/IRRX2_IRSL0
GPIO71/IRTX/SOUT2
GPIO87/CIRRXM/SIN_CR
GPIO34/CIRRXL
GPIO16/CIRTX
GPO83/SOUT_CR/XORTR
F_SDI
F_SDO
F_CS0
F_SCK

FIU

GPIO00/32KCLKIN

GPIO55/CLKOUT/IOX_DIN

Y1
*775@32.768KHz
C355
*775@15P/50V_4

GPIO15/A_PWM
GPIO21/B_PWM
GPIO13/C_PWM
GPIO66/G_PWM
GPIO77/SPI_DI
GPO76/SPI_DO/SHBM
GPIO75/SPI_SCK

SPI

SMB IR

NPCE781

L38
BK1608HS220/1A/22ohm_6
C358
*775@15P/50V_4

97
98
99
100
108
96
101
105
106
107
64
95
93
94
119
109
120
65
66
15
16
17
20
21
22
23
24
25
26
27
28
91
110
112
80

SHBM=0: Enable shared memory with host BIOS

R645

ICMNT 34
NB_CORE_ON 38
VGA_THERM# 21

*0_4

T43
T44
T45

ACIN
34
NBSWON# 30
LID591# 23,30
SUSB# 12
MXM_SMCLK12 21
ACPRN 30
MXM_SMDATA12 21
BATLED0# 31
BATLED1# 31
VRON 36,39
SUSLED# 30,31

VGA_ON_EC

SM Bus 3 for VGA

Palm Rest Thermal Sensor(THM)

R178
R179
R224
R230

MBCLK
MBDATA
MXM_SMCLK12
MXM_SMDATA12

T112
AMP_MUTE# 28
VR2.5_ON 42
CPUFAN# 32

R229
47K_6

VIN_ON 34
D/C#
34
S5_ON 35,37,42
HDMI_HPD_EC# 24
EC_ODD_EN 27
DNBSWON# 12

ReservedEC

VCC_POR
VREF

31
117
63

NBSWON#
RT1
100K/F/NTC_4

1
3

RF_LED_EN# 31
DCR_EN 23

*Short_4

10K_4
10K_4
10K_4
10K_4
10K_4

ODDLED

T33
SUSON 39
FANSIG 32

32
118
62
81

CONTRAST 23
NUMLED# 30
PWRLED# 30,31
CAPSLED# 30

84
83
82

ODD_EJ
SHBM_R

75
73
74
113
14
114
111

RSMRST#_uR

R192

1/28
*Short_4

PWROK_EC_uR
RF_EN
CIRR_X2
HWPG
P_SAVE_LED#

R188

*Short_4

86
87
90
92

SPI_SDI_uR
SPI_SDO_uR_R
SPI_CS0#_uR
SPI_SCK_uR_R

30

ECDB_CLOCK

T34

85

VCC_POR#

R203

104

VREF_uR

SPI FLASH(KBC)
+3VPCU
U23

ODD_EJ 30

SPI_SDI_uR R167

RF_LED# 26,31

R166

ICH_RSMRST# 12
SUSC# 12
PWROK_EC 4,15
RF_EN 26

22_4 SPI_SDI_uR_R

100K_4

+3VPCU

R168

10K_4

SPI_SDO_uR

SPI_SCK_uR

SPI_CS0#_uR

22_4

SPI_SDO_uR

R150

22_4

SPI_SCK_uR

47K/F_4

R226

*Short_4

SI

VDD
HOLD

SCK

WP

CE

VSS

8
7

C298

0.1u/10V_4

At 11/24 add

P_SAVE_LED# 30

R149

SO

A25L080M

Winbond W25X16AVSSIG
AKE38ZP0N01
1/13 Comfirm by vendor mail :
MXIC
MX25L1605AM2C-15G
AKE37FP0Z13
If the Southbridge enables 'Long Wait Abort' by
EON
EN25F16-100HIP
AKE38ZA0Q00
default, the flash device should be 50MHz (or faster)AMIC A25L016
AKE38ZN0800

+3V

HWPG(KBC)

+3VPCU

+A3VPCU
R233
10K_4

1/28

SM BUS ARRANGEMENT TABLE

SM Bus 1

Battery

SM Bus 2

CPU

SM Bus 3

VGA

39

HWPG_1.5V

38

HWPG_0.95V

36,39,42 HWPG_2.5V
35

SYS_HWPG

37

HWPG_1.1V

INTERNAL KEYBOARD STRIP SET(KBC)

D12

BAS316

D11

BAS316

D27

*SP@BAS316

D10

BAS316

D9

37,42 HWPG_1.8V
HWPG_0.9V
CPU_COREPG

HWPG

BAS316

D8

*SP@BAS316

D13

BAS316

D28

*SP@BAS316

D27 for VRON enable +Vcore/0.9V

D8 for 1.2V_ON enable +1.1V

+3VPCU
MY0

2
4
5
6

R182

10K_4

PROJECT : ZQ2
Quanta Computer Inc.
Size

E775AGND

Document Number

Rev
1A

WPCE775C_0DG & FLASH

Date:

T36

D15
*VPORT_6

+3V_D_EXT

R181
R180
R190
R201
R193

CPU_SMBCLK
CPU_SMBDATA
EC_ODD_EN
1.2V_ON
VR2.5_ON

T46
R646

DCR_EN_R

SW3
*SWITCH_1.5

TPD_TRIP

+3VPCU

T123

2,15,36,38

POWER-ON Switch(KBC)

Near TP on TOP side

and only for AMD
platform Palm Rest use.

2.2K_4
2.2K_4
SW@2.2K_4
SW@2.2K_4
+3V

E775AGND

+3V

10K_4

SM BUS PU(KBC)

39

R202

1/13 Comfirm by vendor mail :

Disabled ('1') if using FWH device on LPC.
Enabled ('0') if using SPI flash for both system BIOS and EC firmware

POWER_SAVE 30

DISP_IN
TP_LED#
TP_SW#

SHBM_R

SHBM

1u/6.3V_4

775@ Value use for WPCE775 only

781@ Value use for NPC781 only

T42

C336

E775AGND

ICMNT

0.01u/16V_4
TEMP_MBAT 34

WL_SW
TPD_TRIP

1/28

GPIO56/TA1
GPIO20/TA2/IOX_DIN
GPIO14/TB1

GPIO17/SCL1
GPIO22/SDA1
GPIO73/SCL2
GPIO74/SDA2

GPIO02

GPIO01/TB2
GPIO03
GPIO06/IOX_DOUT
GPIO07
GPIO23/SCL3
GPIO30/CIRTX2
GPIO31/SDA3
GPIO32/D_PWM
GPIO33/H_PWM
GPIO36
GPIO40/F_PWM
GPIO42/TCK
GPIO43/TMS
GPIO44/TDI
GPIO45/E_PWM
GPIO46/CIRRXM/TRST
GPO47/SCL4
GPIO50/TDO
GPIO51
GPIO52/CIRTX2/RDY
GPIO53/SDA4
GPIO81
GPO82/TEST
GPO84/TRIST
GPIO41

VCORF

12 SIO_A20GATE
12

AGND

*22_4

A/D

GPIO11/CLKRUN

103

GPIO90/AD0
GPIO91/AD1
GPIO92/AD2
GPIO93/AD3
GPIO05
GPIO04

VCORF_uR 44

R214

CLK_PCI_775

CLKRUN#

11

LFRAME
LAD0
LAD1
LAD2
LAD3
LCLK

GND1
GND2
GND3
GND4
GND5
GND6

CLK_PCI_775

3
126
127
128
1
2

5
18
45
78
89
116

11,26 LPC_LFRAME#
11,26 LPC_LAD0
11,26 LPC_LAD1
11,26 LPC_LAD2
11,26 LPC_LAD3
11 CLK_PCI_775

Wednesday, May 27, 2009

1

Sheet

33

of

46

EC-D
VA1

For EMI

PD2
SBR1045SP5-13
1

PL2
HI0805R800R-00_8

POWER_JACK

VA2

PQ38
FDD6685

VIN_SRC

PQ45
FDD6685

VA

4
3
2
1

PC40

PC74

PC75
PL1
HI0805R800R-00_8

PC38
0.1u/50V_6

PR47
220K/F_6

PR187
0.01/F_7520

PJ2

PC36
0.1u/50V_6

PC39

PC102
0.1u/50V_6

VIN_SRC

PC31
2200p/50V_6

2
PR22
33K_6

CSIP_1

22u/25V_1206
22u/25V_1206

PD1
SW1010CPT

PD3
SMAJ20A

1
PR45
220K/F_6

D/C#

PR24
10K_6

33

PR46
*Short_6

2200p/50V_6

0.1u/50V_6

PQ9
IMD2AT108
VIN_SRC

2
PQ6
DMN601K-7

EC-D

PR42
10/F_6

PC105

PC30
0.1u/50V_6

PR38
4.7_6

27 CSIN

PC21
1u/16V_6

21

5
6
7
8

ISL88731_VDDP
PD7
*RB500V-40

MBCLK

33

10
13

ACIN
PR186
49.9/F_6

UGATE

SCL

PHASE

ACOK

LGATE

PC22
0.1u/50V_6

PGND

DCIN

22

88731ACSET

PC2
100p/50V_6

PR40
22K/F_6

PL3
HI0805R800R-00_8

ICOMP

PL4
HI0805R800R-00_8
PR7
100_4

ISL88731_PHASE

20

ISL88731_LGATE

PQ41
AO4710

18 CSOP

PC10
10u/25V_1206
PC6
10u/25V_1206

17 CSON

VBF

15

BAT-V
BAT-V

VIN_SRC

PR33
10/F_6

VIN
PQ8
AOL1413

PR35
*Short_4

GND

29

BAT-V

BAT-V

PR34
100_4

1
2
3

31

PC201
1U/25V_6

PR18
150K_6

VIN

12

ICM

NC
14

NC
PR41
2.21K/F_6

PC11
2200p/50V_6

PC98
*680p/50V_6

CSOP_1

CSOP_1

NC

VCOMP

TEMP_MBAT 33

PR184
*4.7_6

19

16

GND

+3VPCU

23

NC

TEMP_MBAT_C

0.01_3720
PR153

PL7
6.8uH

PC23
0.1u/50V_6

VREF
CSON

4
BAT-V

PJ1
10 1
2
3
4
5
6
7
9 8

CSOP

PQ42
AO4468

PR32
10/F_6
PU4
ISL88731A

ACIN

PC73

ISL88731_UGATE

DCIN

MBAT+

24

PC72

PC26
0.1u/50V_8
88731B_1
3
2
1

BOOT

SDA

PR39
82.5K_6
PC1
0.1u/50V_6
2
1

VCC

VDDSMB

PC9

PR37
2.7_6
25 88731B_2

PC14

2200p/50V_6
*10u/25V_1206
*10u/25V_1206
10u/25V_1206
*10u/25V_1206
*10u/25V_1206

3
2
1

11
MBDATA

PR36
100K/F_6

VDDP

NC
GND
GND
GND
GND
CSSP

PC29
0.1u/50V_6

+3VPCU

CSSN

+3VPCU

PC18

5
6
7
8

26

1
33
32
31
30
28 CSIP

VIN_SRC

For EMI

PC28
1u/16V_6
PR43
10/F_6

CSIP_1

PR8
100K/F_6
PC4
47p/50V_6

PC3
47p/50V_6

PC37
0.01u/50V_6
ICMNT

PR5
100_4

PR4
100_4

PC32
*1u/16V_6
MBCLK

33

MBDATA

33

PC33
0.01u/50V_6

PR15
39K

ISL88731 thermal pad

tie to Pin12

PR6
*Short_6

33

Batt_Conn

PC34
*0.01u/50V_6

33

VIN_ON

PQ5
DMN601K-7
A

PU1
CM1293A-04SO
1
2
TEMP_MBAT_C

CH1
VN
CH2

CH4
VP
CH3

6
5
4

PROJECT : ZQ2
Quanta Computer Inc.

MBDATA
+3VPCU
MBCLK
Size
Date:

Document Number

Rev
1A

CHARGER (ISL88731)

Add ESD diode base on EC FAE suggestion

4

Wednesday, May 27, 2009

1

Sheet

34

of

46

MAIND

MAIND

42

VL
2,4,42 SYS_SHDN#
PR249
*Short_4
VIN_SRC
PR250
39K/F_4

D06

PC196
0.01u/16V_4

1
2
3

5V_LX

1
PR122
220K/F_6

8
7
6
5

+5VPCU

PR234
*4.7_6

PC186
0.1u/50V_6

PC162
*680p/50V_6

PC167
*10u/25V_1206

5V_DL

PD4
SX34

PAD
PAD
PAD

PR251
*0_4
PC163
0.1u/50V_6

PQ64
AO4710

1
2
3

PR252
0_4

BYP
OUT1
FB1
ILIM1
PGOOD1
EN1
DH1
LX1
PAD
PAD

35
34
33

+
PC172
330u/6.3V_6X5.7

9
10
11
12
DDPWRGD_R 13
5V_EN 14
15
16
37
36

PR248
1/F_6
2

PD10
1PS302

3
2
1
3V_LX

SKIP
DDPWRGD_R
3V_EN

PC70
*680p/50V_6

PR258
1/F_6
2

REF

PR240
22_8

RT8206B_PIN20

L(ripple current)
=(19-3.3)*3.3/(2.2u*0.5M*19)
~2.48A

PR238
*200K/F_4

+3VPCU

MAIND

+3V_S5

3
2
1

S5D

PQ28
AO4468

PQ29
AO3404

+3V_S5

1.3A

3
2
1

PQ32
DMN601K-7
PQ33
DMN601K-7

PQ31
DMN601K-7

PQ30
DTC144EU

PR117
1M_6

33,37,42 S5_ON

PQ26
AO4468

PQ27
AO4468

MAIND 4

S5D

SYS_HWPG 33
PR121
*Short_4

PR119
*1M_6

PR118
1M_6

5
6
7
8

PR126
22_8

DDPWRGD_R

+3VPCU

+5VPCU

3
2
1

PR125
22_8

VIN_SRC

5
6
7
8

PR116
1M_6

+15V

+5V_S5

10/08

Iocp=8-(2.48/2)=6.67A
Vth=6.67A*15mOhm=94.714mV
R(Ilim)=(94.714mV*10)/5uA
~191K

PR237
*39K/F_4

PC174
0.1u/50V_6

PR120
*100K/F_4

5
6
7
8

+3V_S5

+3VPCU

OCP:8A
PC176
0.1u/50V_6

+5VPCU
VIN_SRC

PR136
*0_6

PR130
*0_6

+15V_ALWP

Iocp=10-(4.18/2)=7.91A
Vth=7.91A*14.2mOhm=112.322mV
R(Ilim)=(112.322mV*10)/5uA
~220K

2
*0_4
2
0_4

PR131
*Short_6

1
+15V

1
PR135
1
PR138

+3VPCU_OUT

PR257
*Short_6

PD9
1PS302

L(ripple current)
=(19-5)*5/(2.2u*0.4M*19)
~4.18A

PC193
0.1u/50V_6

3V_DL
SKIP

OCP:10A
B

PR139
0_6

PQ68
AO4710

1
PC182
0.1u/50V_6

PC185
*2.2n/50V_4

+5V_S5

3~4A

+5V_S5

+5V

+3V

3.2~4.3A

3.2A

+5V

PROJECT : ZQ2
Quanta Computer Inc.
Size

+3V

Document Number

Rev
1A

SYSTEM 5V/3V (RT8206)

Date:

PR128
*Short_6

PC195
1u/16V_6

PC183
330u/6.3V_6X5.7

PR134
*4.7_6

PD12
SX34

VL

PC177
0.1u/50V_6

REFIN2
1

32
31
30
29
28
27
26
25

PR259
191K/F_6
2

PC199
0.1u/50V_6

PR256
*0_6

+5VPCU_FB

PU14
RT8206B

PL16
2R2uH-5.8mR
+3VPCU

REFIN2
ILIM2
OUT2
SKIP#
PGOOD2
EN2
DH2
LX2

17
18
19
20
21
22
23
24

+5VPCU

PQ67
AO4468

5
6
7
8

5V_DH

PQ63
AO4468

+3VPCU

PR129
*0_6

8
7
6
5
4
3
2
1

PL15
2R2uH-5.8mR

5.03A

3
2
1

8
7
6
5

PR127
150K_4

+5VPCU

OCP : 8A

3V_DH

LDOREFIN
LDO
VIN
NC
ONLDO
VCC
TON
REF

+5VPCU

PC178
4.7u/25V_0805
PC181
2.2n/50V_4

EC-E

BST1
DL1
PVCC
NC
GND
PGND
DL2
BST2

6.15A

+3VPCU
PR137
*0_4

PC198
0.1u/50V_6
REF

8206_ONLDO

OCP: 10A

PC197
1u/16V_6

PC194
0.1u/50V_6

EC-E

5
6
7
8

PR124
390K_4

PC170
*4.7u/25V_0805

PR132
*Short_4

PR133
*Short_4

PC171
*4.7u/25V_0805

5V_EN

PC169
2.2n/50V_6

PR261
*Short_4
3V_EN

PR260
*Short_4

EC-E

EC-E

EC-E

EC-E

PC188
4.7u/10V_8

3V5V_EN
PC168
100u/25V_6X5.8

EC-E

VIN_SRC

VL

VIN_SRC

VIN_SRC

0805

0805
D

Wednesday, May 27, 2009

1

Sheet

35

of

46

PR92

*0_4

2
PR140

1
0_4

6265_EN

PR99
19.6K/F_4

PR90
97.6K/F_4

LGATE_0

RBIAS

PVCC

VDIFF_0

2
1

2
1

PHASE_0

LGATE_0

30

6265_PVCC

LGATE_1

PC51
330u/2V_7343

ISN_0

31

29

PC52
330u/2V_7343

ISP_0

32

+5VPCU

PGND_1

28

FB_0

PHASE_1

27

PHASE_1

11

COMP_0

UGATE_1

26

UGATE_1

0805
VIN

PC56
2.2u/10V_8

LGATE_1

10

PQ56
AOL1448

UGATE_1

PC117
PC119
PC114
*4.7u/25V_0805 *4.7u/25V_0805 0.1u/50V_6

PC124
100u/25V_6X5.8

20A

PL10
0.36uH/25A

ISN_1

PR77
1/F_6

PC57
0.1u/50V_6

PQ57
AOL1718

PR203
*2.2/F_4

4
1
2
3

LGATE_1

PR215
3.92K/F_4

PR208
6.81K/F_4

EC-E

EC-E

PR202
*Short_6

PR201
*Short_6

PC49
*330u/2V_7343

PC53
330u/2V_7343

2 CPU_VDD0_FB_L

PC60
0.1u/50V_6

PR79
3.92K/F_4
ISP_1

2 CPU_VDD0_FB_H

ISN_0

Parallel

PC113
*2200p/50V_4

ISN_1
PC137
0.1u/50V_6

PR214
18.2K/F_4

Close to
CPU socket

ISP_0

+VCORE

2
4

25

24

ISP_1

VW_1

BOOT_1

23

21

VDIFF_1

VSEN_1

FB_1
20

19

18

RTN_1
17

13

PC141
1000p/50V_6

VSEN_0

ISP_0

PR220
6.81K/F_4
2
1

VW_0

COMP_1

+VCORE

12

PC142
180p/50V_4

PR88
10/F_6

37
UGATE_NB

38

40

41

39

PHASE_NB

LGATE_NB

PGND_NB

RTN_NB

OCSET_NB

42

43

45

46

44

VSEN_NB

VCC

FB_NB

VIN

PU11
ISL6265A

ENABLE

ISN_0

PC145
2 1200p/50V_4

33

PGND_0

OCSET

6265_EN

PR91
100K/F_6

PHASE_0

SVC

PC144
4700p/25V_4

PR216
1K/F_4

SVD

PC54
*2200p/50V_4

+VCORE

PR206
*Short_6

EC-E

*Short_4

PR207
*Short_6

PC58
0.1u/50V_6

UGATE_0

EC-E

*Short_4

PR93

34

PQ58
AOL1718

VRON

PR94

CPU_SVC

7
2

PR67
*2.2/F_4

CPU_SVD

33,42 HWPG_2.5V

PR217
54.9K/F_4

BOOT_0

Pin 49 is GND Pin

+VCORE

33,39

*Short_4

PR221
255/F_4

PR75
1/F_6

35

UGATE_0

PWROK

15

PR100
*10K/F_6

PR101

PGOOD

20A

PL11
0.36uH/25A

PC126
100u/25V_6X5.8

36

PR95 *Short_4

+3V

14

2 CPU_PWRGD_SVID_REG

47

1
2

PC127
PC128
PC129
*4.7u/25V_0805 *4.7u/25V_0805 0.1u/50V_6
UGATE_0

PR76
1/F_6

BOOT_NB

*10K/F_4

2,15,33,38 CPU_COREPG

PC59
0.1u/50V_6

PR96

OFS/VFIXEN

FSET_NB

PR218
*Short_4

48

49
*0_4

GND

PR97

+3V

PQ19
*DTC144EU

UGATE_NB
PR98
*Short_4

PR147
10K_4

+1.8V

EC-E
+5VPCU

EC-E

PQ59
AOL1448

EC-C
+3V

0.8

PHASE_NB

VIN
+

PR213
44.2K/F_4

1.0

LGATE_NB

0805
PR78
11.3K/F_4

PR219
10/F_6
PC140
0.1u/50V_6

1
2
3

1.2

1
2
3

1.4

Output

SVD

VIN

SVC

PC132
1000p/50V_6

PC135
33p/50V_4
PC136
1200p/50V_4

VFIXEN VID Codes

PR210
22.1K/F_4

PR222
*Short_8

COMP_NB

0.8

RTN_0

0.9

UGATE_NB

16

PC139
330u_2V_7343

PC202
100u/25V_6X5.8

1
2
3

1.0

0
1

PC138
1u/25V_8

PC147
PC146
PC61
*4.7u/25V_0805 *4.7u/25V_0805 0.1u/50V_6

+5VPCU

1.1

PQ60
AO4932

PR85
10/F_6

Output

PC143
*10u/25V_1206

G1

SVD

4
2

S1/D2

PR89
10/F_6

Metal VID Codes

SVC

PR84
10/F_6

G2

D1

S2

+5V

VIN

D1

+3.3V

2 CPU_VDDNB_FB_L

0805
LGATE_NB

2 CPU_VDDNB_FB_H

VFIX

SVI

22

GND

PL12
2.2uH

CPU_VDDNB_CORE

Offset &
Droop
O

OFS/VFIXEN

3A

CPU_VDDNB_CORE

4,31 CPU_VDDNB_CORE

PC130
1000p/50V_6

PR80
18.2K/F_4

ISN_1

+1.5VSUS
PR83
1K/F_4

2 CPU_VDD1_FB_L

PR212
1K/F_4

CPU_VDDNB_CORE

PC133
180p/50V_4

PC71
330u/2V_7343

4700p/25V_4

2 CPU_VDD1_FB_H

PC134

+VCORE

PC131
1200p/50V_4

PR82
*0_4

PR81
10/F_6

Close to
CPU socket

PR86
10/F_6

PC200

*330u_2V_7343

PR211
255/F_4

+VCORE

PR87
10/F_6

PR209
54.9K/F_4

PROJECT : ZQ2
Quanta Computer Inc.
Size

Document Number

Rev
1A

CPU_CORE
Date:
A

Wednesday, May 27, 2009

E

Sheet

36

of

46

VIN

VIN

+5VPCU

+1.1V_S5
5
6
7
8

PR247
10/F_6
PD11
RB500V-40

PR253
1M_6

PR241
2.2/F_6

PC187
4.7u/6.3V_6

16
1

PR244
*10K/F_6

2
PC190
*0.1u/50V_6

3
4

33 HWPG_1.1V

6
5
14

PC179
1u/16V_6

BOOT

TON

UGATE

VOUT

PHASE

VDD

OC

FB

VDDP

PGOOD

LGATE

GND

PGND

NC

TPAD

PC191
0.1u/50V_6

13

3
2
1

EN/DEM

12

UGATE-1.1V

11

PHASE-1.1V

10

PR243
7.15K/F_6

PL14
1R0uH-3mR
+1.1V_S5

PC173
1u/16V_6

PC192
10u/25V_1206

5
6
7
8

+3V

PC180
2.2n/50V_4

PR239
*4.7_6
LGATE-1.1V

7
PC175
*680p/50V_6

17
PQ65
AO4710

NC

3
2
1

15

33,35,42 S5_ON

+1.1V_S5

PQ66
AO4468

PR255
*Short_6

PU13
UP6111AQDD

PR254
*Short_6

OCP: 10A
6A

PC189
*1000p/50V_6

PC161
560u/2.5V_6X5.7

PC158
*10u/10V_8

PC157
0.1u/50V_6

Rds*OCP=RILIM*20uA
R1

PR246
5.1K/F_6

PC184
*33p/50V_6

1.1V_FB

TON=3.85p*RTON*Vout/(Vin-0.5)
B

VOUT=(1+R1/R2)*0.75

AO4710 Rdson=11.7~14.2mOhm
L(ripple current)
=(19-1.1)*1.1/(1u*272k*19)
~3.81A

Frequency=Vout/(Vin*TON)
TON=3.85p*1M*1/(Vin-0.5)

R2

PR245
10K/F_6
PR242
*Short_6
B

14.2m*10=RILIM*20uA
RILIM=7.1K--- 7.15K

Frequency=1/(0.0036767)=272K

+1.1V
39 HWPG1.8V_D
+1.1V

PR111
1M_6

33,42 HWPG_1.8V

1
0_4

PR105
1M_6

PQ22
AO4468

PQ20
DMN601K-7

PQ21
PR104
100K/F_6

2
PQ23
DMN601K-7

3
2
1

2
PR108

HWPG1.8V_D 4

1
*0_4

2
PR107

PR110
1M_6

1.2V_ON

PR102
22_8

DMN601K-7

33

+1.1V_S5

+15V

5
6
7
8

VIN_SRC

PC63
*2200p/50V_4

PROJECT : ZQ2
Quanta Computer Inc.

+1.1V

7.5A

Size

Document Number

Rev
1A

VCCP 1.1V(UP6111A)
Date:
5

Wednesday, May 27, 2009

Sheet
1

37

of

46

VIN

VIN

+5V_S5

5
6
7
8

PR172
10/F_6
PD6
RB500V-40

EC-C
PR180
1M_6

PR185
2.2/F_6

PC101
4.7u/6.3V_6

PR144
100K/F_6
PR27
*Short_6

15

15,33,36 CPU_COREPG
UP6111AQDD_PIN16

16
1

PR178
*10K/F_6

UP6111AQDD_PIN2
PC97
*0.1u/50V_6

2
3
4

33 HWPG_0.95V

5
14
PC93
1u/16V_6

EN/DEM
TON
VOUT
VDD
FB
PGOOD

BOOT
UGATE
PHASE
OC
VDDP
LGATE

GND

PGND

NC

TPAD

PC100
0.1u/50V_6

13
12

UGATE-NB

11

PHASE-NB

PL8
1R0uH-3mR

PC99
1u/16V_6

PR44
*4.7_6
LGATE-NB

PC35
*680p/50V_6

17
PQ44
AO4710

NC

PC94
*1000p/50V_6

PC108
560u/2.5V_6X5.7

R1

PR175
2.74K/F_4

NB_CORE_FB

PC92
*33p/50V_6

+5VPCU

PR164
13.3K/F_4

PR181
*Short_6

R2

PR16
100_4

PR25
*0_4

14.2m*10=RILIM*20uA
RILIM=7.1K--- 7.15K

+NB_CORE_ON

PR26
*100K_4

Frequency=1/(0.0036767)=272K

PQ7
DMN601K-7

TON=3.85p*1M*1/(Vin-0.5)

HI --- 0.95V
LOW ---1.1V

PC15
0.01u/25V_4

PR17
10K/F_4

PR176
10K/F_6
PQ40
DMN601K-7

AO4710 Rdson=11.7~14.2mOhm
L(ripple current)
=(19-1.05)*1.05/(1u*272k*19)
~3.646A

PC106
0.1u/50V_6

NB_CORE_FB

Frequency=Vout/(Vin*TON)

PC107
*10u/10V_8

Rds*OCP=RILIM*20uA

VOUT=(1+R1/R2)*0.75

TON=3.85p*RTON*Vout/(Vin-0.5)

PC103
10u/25V_1206

NB_CORE

PR183
7.15K/F_6

10

PC104
2.2n/50V_4

+3V

NB_CORE

PQ43
AO4468

PR182
*Short_6

PU8
UP6111AQDD

3
2
1

33 NB_CORE_ON

OCP: 10A
7.5A

5
6
7
8

PR143
*0_6

3
2
1

PROJECT : ZQ2
Quanta Computer Inc.
Size

Document Number

Rev
1A

NB_CORE(UP6111A)
Date:
5

Wednesday, May 27, 2009

Sheet
1

38

of

46

[PWM]
PC159
10u/10V_8

PR230
*Short_6

PC155
0.1u/50V_6

8207A_VBST

+0.75V_DDR_VTT

100u/25V_6X5.8

0805
VIN

VIN

PC166
10u/10V_8

PC165
10u/10V_8

8207A_DH

1.71A

8207A_LX

+1.5VSUS

8207A_DL

PC151

2
NC

PR225
5.1/F_6

PC154
1u/6.3V_4

PR223
*100K/F_6

12

S5

S3

11

FOR DDR III

13

PGOOD

10

VDDQSET

COMP
NC

+5V_S5

HW PG_1.5V

S5_1.8V

PR233
*0_6

VDDIO_FB_H

PC68
*680p/50V_6

PC150
1u/6.3V_4

PC156
PC149
560u/2.5V_6X5.7

PR226
620K/F_4

VIN

PR227
0_6

SUSON

33

MAINON

33,42

(For RT8207A

PC148
10u/10V_8

33

400KHZ )

PR229
*0_6

D07

+5V_S5

*0_4

PR232
10K/F_4

Vout = (PR150/PR149) X 0.75 + 0.75

AO1718 Rdson=3.8~4.3mOhm
L(ripple current)
=(9-1.5)*1.5/(0.56u*400k*9)
~5.58A
Vtrip= (22-2.79)(*4.3mohm/2)=0.0413V
RILIM=Vtrip/10uA~4.13K

8207A_SET
PR228
0_6
PR231
10K/F_4

S5_1.8V

S3_1.8V

+1.5VSUS

PR235

5
6
7
8

VDDIO_FB_L

PR236

PC160
*33p/50V_6

PQ24
AOL1718

EC-E
S3_1.8V

PR114
*4.7_6

+3VPCU

PR115
*Short_6

5
PQ61
AOL1718

14

V5FILT
VDDQSNS

PC164
0.033u/50V_6

0.75A

+5V_S5

1
2
3

LL

DRVH

VBST

DRVL

15

V5IN

VTTREF

PR224
4.02K/F_6

16

CS

MODE

+SMDDR_VREF

RT8207A
PU12

GND

+1.5VSUS

17

CS_GND

1
2
3

+1.5VSUS

18

PGND

VTTSNS

OCP 22A
18A

PC153
PC203
*10u/25V_0805

PL13
0.56uH

*560u/2.5V_6X5.7

3
+1.5VSUS

VTTGND

PC152
2200p/50V_6 *10u/25V_0805

PQ62
AOL1448

VLDOIN

VTT

GND

1
2
3

19

20

21

22

23

24

25

*0_4

37 HW PG1.8V_D

HW PG1.8V_D

PQ25
AO4468

VRON

*0_4

PR49
*100K/F_4

+5VPCU

PR200

PC44
0.1u/50V_6

4
33,42 HW PG_2.5V

PR48

0_4

2
3
8
9

PC41
0.1u/50V_6

VEN
VIN
GND
GND

VO

NC

33

CPU_VDDR

R1

R2

0.75A

PR53
4.02K/F_6
PC46
10u/10V_8

PR52
30.1K/F_6

PR56
22.1K/F_4

PQ55

33_4

HW PG_0.9V

1.2VADJ0.9V

PC42
*0.1u/50V_6

DMN601K-7
PR204

0.8V

13 VDDR_OPT

+1.5V

3.62A

VPP PGOOD

+1.5VSUS

PC43
10u/10V_8

CPU_VDDR (0.9V)

PU5
RT9025-25PSP

ADJ

33,36

3
2
1

+3V

VO=0.8(1+R1/R2)
=0.9V
VO=(0.8(R1+R2)/R2)
R2<120Kohm

PROJECT : ZQ2
Quanta Computer Inc.

PC118
220P/50V_4

Size

Document Number

Rev
1A

DDR 1.5V(TPS51116)
Date:
5

W ednesday, May 27, 2009

1

Sheet

39

of

46

+VGPU_CORE
0805
+5V_S5

VIN

VIN
A

OCP=33A

8792VCC

SW@1u/10V_6

13
14

41 PG_GPUIO_EN
8792_EN

19,41 dGPU_PWREN

PR145
*SW@0_4

8792SKIP# 12
PC82
SW@0.1u/10V_4

+3V_D_EXT

PR11

*SW@0_4
8792REFIN 10

PR146
SW@0_4

VDD

TON
DH

7
5

8792DH

2
5

+VGPU_CORE

8792BST

PQ37
SW@AOL1448

PC76
PC79
PC78
PC80
SW@2200p/50V_4
*SW@4.7u/25V_0805
SW@100u/25V_6X5.8
*SW@4.7u/25V_0805
PL6
*SW@4.7u/25V_0805
SW@0.36uH
+VGPU_CORE

VCC
BST

PR162
SW@1_6

PGOOD
EN

4
LX
PU7
SW@MAX8792ETD+T
SKIP#
3
DL
REFIN
FB

PC88
SW@0.22u/25V_6

8792LX
8792DL

PR9
SW@1_6

8
4

REF-2V

PR150
SW@100K_4

8792REF

REF

ILIM

8792ILIM

15

PR158

R1

PC90
SW@330u/2V
PC8
SW@1000p/50V_4

EP

11

PR157
SW@120K/F_4

SW@39.2K/F_4

PR141
SW@0_6

R3

PC204

8792TON

1
2
3

PC77

SW@1u/10V_6

1
2
3

C03

PR151
SW@10K_4

PR149
*SW@10K_4

PR165
SW@200K/F_4
PC83

+3V_D_EXT

22.5A

1
2
3

+3V

PR12
*SW@0_4

PC7
*SW@4700P/25V_4

PQ1
SW@AOL1718

PQ35
SW@AOL1718

PC95
SW@0.1u/50V_6

PC12
*SW@330u/2V

PC13
SW@330u/2V

Place near GND pin15

PR14
SW@332K/F_4

PC84
SW@1000P/50V_4
PR159
SW@100K_4

17 GPU_VID1

PQ4
SW@DMN601K-7
PR161

R2

PR154
SW@100K_4

PC89
SW@0.01u/16V_4
SW@49.9K/F_4

R4

VIN_SRC

Frequency(PR220=200K)

PR2
SW@1M_6

300K

PR3
*SW@22_8

PQ3
SW@DMN601K-7

AMD Madison VID Table

8792_EN

2
2

+VGPU_CORE

1.05V

1.0V

0.95V

0.9V

PC81
SW@0.01u/16V_4

GPU_VID2 (GPIO20)

PR142
*SW@100K_4

PQ34
SW@DTC144EU

PR1
SW@1M_6

PQ2
DMN601K-7

GPU_VID1 (GPIO15)

PR155
SW@100K_4

17 GPU_VID2

+VGPU_CORE

PR13
SW@130K/F_4

Park -XT
GPU_VID1 (GPIO15)

GPU_VID2 (GPIO20)

+VGPU_CORE

1.12V

1.05V

0.95V

0.9V

R3

R4

R1

R2

VREF

332K
130K
39.2K
49.9K
R1 change to 39.2K/F_4 (CS33922FB15)

PROJECT : ZQ2
Quanta Computer Inc.

2V

R3 change to 332K/F_4 (CS43322FB15)

Size
Date:

Document Number

Rev
1A

GPU CORE(MAX8792)

R4 change to 130K/F_4 (CS41302FB00)

1

Wednesday, May 27, 2009

5

Sheet

40

of

46

+3V

+1V

1
+5VPCU

PR29
SW@10K_4

3
8
9

+1.5VSUS

VIN
GND
GND

VO

PG_1.5V_EN

1
6

+1V

1.5A
NC

PR28
SW@9.1K/F_6

PC20

VEN

PC24

SW@0.1u/50V_6

PC25

SW@0.1u/50V_6

SW@10u/10V_8

PR31
SW@100K_4

VPP PGOOD

40 PG_GPUIO_EN

PU3
SW@RT9018A
4

ADJ

PC27
SW@0.1u/50V_6

1V_ADJ

PC19
SW@22u/10V_1206

0.8V
PR30
SW@34K/F_6

Vout =0.8(1+R1/R2)
=1V
C

+1.5V_GPU
+1.5V_GPU

SW@0_6

PR74

*SW@0_6

PR68
SW@1M/F_6

DGPU_1.5V_ON_R

19,40 dGPU_PWREN

PR73

PR69
SW@22_8

PG_1.5V_EN

PR72
SW@1M/F_6

PQ54
SW@AO4468

2
2

2
3
2
1
1

PQ18
SW@DMN601K-7

PQ17
SW@DMN601K-7

+1.8V_GPU

PR194
SW@22_8

PR188
SW@1M/F_6

+1.8V_GPU

SW@0_6
3

PR195
*SW@0_4

2
2
PQ49
SW@DMN601K-7

PQ53
SW@DMN601K-7
1

PC112
*SW@1U/10V_4

PQ50
SW@AO3404

PR197
SW@1M/F_6

PQ46
SW@DMN601K-7
1

+1.5V_GPU

5.63A

+1.8V

+15V

PR193
SW@1M/F_6
PR148

PC55
*SW@2.2n/50V_4

VIN_SRC

PG_1.5V_EN

+1.5V_GPU

PR71
SW@1M/F_6

PQ16
SW@DMN601K-7

PR70
SW@100K_4

+1.5VSUS

+15V

5
6
7
8

VIN_SRC

PC109
*SW@2.2n/50V_4

+1.8V_GPU

PROJECT : ZQ2
Quanta Computer Inc.

0.96A
Size

Document Number

Rev
1A

+1V/+1.5_GPU/+1.8_GPU
Date:
5

Sheet

Wednesday, May 27, 2009

1

41

of

46

+3VPCU

1.95A

+1.8V

PC123
0.1u/25V_4
PU10

HPA00835RTER

VIN

PH

VIN

PH

VIN

PH

16

1
PR60
*Short_4
33,39

2
15

MAINON

PC122
1000p/50V_4

54418-1.8_VFB

COMP_PIN7

EN

PWRGD

COMP

GND

RT/CLK

SS

PR57
182K/F_4

GND
AGND

PH10_11_12

10

+1.8V

PC48
*100P/50V_4

PL9
1uH_7X7X3

11
12
*Short_6
PR205

13

PC121
0.1u/50V_6

14
3

R1

4
HW PG_1.8V

33,37

PR59
10K_4

PR65
100K/F_4

+3V

22
21
20
19
18
17

PR58
15K/F_4

BOOT

VSNS

PAD
PAD
PAD
PAD
PAD
PAD

PC125
10u/10V_8

PC120
0.01u/25V_4

PC116
0.1u/25V_4

PC115
10u/10V_8

PC45
10u/10V_8

54418-1.8_VFB

PC50

VIN_SRC

1200p/50V_4

V0=0.8*(R1+R2)/R2

PR61
78.7K/F_4

R2

PD8
SW 1010CPT

PU6
RT9025-25PSP

*0_4

3
8
9

VPP PGOOD
VEN

VO

NC

HW PG_2.5V
+2.5V

R1

S5_ON

0.2A

2
PQ47
DTC144EU

PR103
73.2K/F_4

VL

PR190
*Short_6

VL

PC64
*0.1u/50V_6

R2

PR106
34K/F_6

LM393_PIN8
PR196
1.2K/F_4

2.469V

LM393_PIN2

PR62
1M_6

PR50
22_8

+1.5V

+1.8V

PR51
22_8

PR66
22_8

PR54
1M_6
S5_ON
MAIND

PQ51
DMN601K-7

PQ12
DMN601K-7

PQ13
DMN601K-7

PQ48
DMN601K-7

PU9B
LM393

PQ15
DMN601K-7

PC111
0.1u/50V_6

PC47
*2200p/50V_4

For EC control thermal protection (output 3.3V)

PQ11
DMN601K-7

1
PU9A
LM393

PR199
200K/F_4

1
2

PQ10
DMN601K-7

PR64
*100K/F_6

35

PQ14
DTC144EU

MAINON

MAIND

MAINON_ON_G

PR63
1M_6

+15V

PR55
22_8

+5V

+3V

2,4,35

PR191
200K_6
PC110
0.1u/50V_6

PR192
THERMISTOR_10K_6(NTC)

VIN_SRC

SYS_SHDN#

PR198
200K/F_4

Vout =0.8(1+R1/R2)
=2.5V

Thermal protection

PC62
10u/10V_8

0.8V
PC65
PC67
10u/10V_8 0.1u/50V_6

33,36,39
33,35,37 S5_ON

VIN
GND
GND

PR113
+3VPCU

VR2.5_ON

33

4
1

1
0_4

+3V

2
PR112

PQ52
AO3409

+5VPCU

ADJ

MAINON

PC66
1u/16V_6

PR189
1M_6

+2.5V

PR109
10K_4

EC-C

PROJECT : ZQ2
Quanta Computer Inc.
Size

Document Number

Rev
1A

Discharge /Thermal protection

Date:
5

W ednesday, May 27, 2009

1

Sheet

42

of

46

ZQ2 Power tree

+5VPCU

(6.15A)

<S5_ON--->S5D>
<S5D>

<Alway ON>
AO4468
PQ27

+5V_S5

USB/M*1
USB/S*3

(3~4A)

Page32

Page37

<MAINON--->MAIND>
<MAIND>

AO4468
PQ26

+5V

HDD
ODD
FAN
ALC271

(3.2~4.3A)

Page37

ADAPTER

Smart
Charger
ISL88731A
PU4

65W/90W

BATTERY

+3VPCU

(5.03A)

<Alway ON>

RT8206B

BT

PU0001

<S5_ON--->S5D>
<S5D>

Page36

AO3404
PQ29

+3V_S5

(1.3A)

LAN

Page37
Page37

VIN_SRC

<MAINON--->MAIND>
<MAIND>

AO4468
PQ28

(3.2A)

+3V

Page37

--<EC>-*<VR2.5_ON>
<+3V>

--<EC>-<MAINON>

--<EC>-<dGPU_VRON>

RT9025
PU6

SW@AO3413

+2.5V

+3V_D

(1A)

Q26
Page20

*<+1.5V_GPU>
(0.2A)

+CPUVDDA

Page44

HPA00835RTER
PU10

+1.8V

(1.95A)

Page44

SW@AO3404
Q50
<+1.5V_GPU>

<PG_1V_EN--->PG_1.5V_EN>
<PG_1.5V_EN>
--<EC>-<VIN_ON>

AO1413
PQ8

+1.5VSUS

SW@AO3404
PQ54

+1.5V_GPU

(0.96A)

(10.7A)

Page41

(18.71A)

Page36

+1.8V_GPU

Page45

+1.5VSUS

SW@G9018A
PU3

<PG_GPUIO_EN-->PG_1V_EN>
<PG_1V_EN>

+1V

(1.5A)

Page44

RT8207A

--<EC>-<SUSON>

RT9025
PU5

<VR2.5_ON-->HWPG_2.5V>
<HWPG_2.5V>
--<EC>-*<VRON>

Page41

VIN

*<MAINON>

PU12

CPU_VDDR

(0.75A)

Page45

AO4468
PQ25

--<EC>-<MAINON>

+1.5V

(7.87A)

Page41

+0.75V_DDR_VTT
+SMDDR_VREF (0.75V)

--<EC>-<S5_ON>

UP6111A
PU13

+1.1V_S5

(1.71A)

(0.75A)

(6A)

Page39

<VRON-->CPU_COREPG>
<CPU_COREPG>

UP6111A
PU8

<dGPU_VRON-->PG_GPUIO_EN>
<PG_GPUIO_EN>

(5.5~7.8A)

+1.1V

Page39

+VGPU_CORE

(22.5A)

PU7
Page42

SW@ISL62872
PU2

+VGPU_IO

(4A)

Page43

+VCORE

--<EC>-<VRON>

AO4468
PQ22

Page40

SW@MAX8792

--<EC>-<dGPU_VRON>

<MAINON--->HWPG_1.8V>
<HWPG_1.8V>
--<EC>-*<1.2V_ON>
NB_CORE (7.5A)

ISL6265A
PU11
Page38

CPU_VDDNB_CORE

(20A)

(3A)

PROJECT : ZQ2
Quanta Computer Inc.
Size

Document Number

Rev
1A

Power Tree
Date:
5

Wednesday, May 27, 2009

Sheet

43

of

46

47

Power on Sequence required:

SB800:
1, +3.3VDUAL ramp before +1.1VDUAL
2, +3.3V ramp before +1.8v
CPU_LDT_RST#
(SB TO CPU)
3, +1.8V ramp before +1.1v
4, +3.3v ramp before +1.1v
5, +3.3VALW_R ramping down time > 300us
6, 50uS <= All power rails except +3.3VALW_R <= 40mS
7, 100uS <= +3.3VALW_R <= 40mS
CPU_PW ROK
>1 mS

(SB TO CPU)

RS880:
1, 0 <(+3.3V) - (+1.8v) < 2.1
2, +1.8V ramp before +1.1v
3. +1.1V ramp before VCC_NB

CPU_CLKP/N

Req.
running
A

>1 mS Req.
running
>1 mS Req.

SB OUTPUT

NB_PW RGD
NB_PW RGD_IN

SB INPUT

SB_PW RGD_IN

NB_CORE(all NB power) valid before NB_PW RGD_IN

SLP_S3#
1V1DUAL_PW RGD
SYS_RST# 1V5_PW RGD/DNI
+1.2V_PW RGD KBC_GPIO77/DNI

HW PG_0.95V
RC=~22ms

NB_CORE should not ramp before +1.1v

NB_CORE

GROUP B

RC=~4.7ms
VLDT
VRM_PW RGD AND HW PG_1.8V (modify at B)
+1.1V
CPU_COREPG
RC=0
CPU_VDDR
RC=0
+VCC_CORE
RC=0
CPU_VDDNB_CORE
B

GROUP A

HW PG_2.5V
+2.5V
(CPU_VDDA_2.5_RUN)
+1.5V
HW PG_1.8V
RC=0
+1.8V
+5V/+3.3V
MAIN_ON
to S3
SUSB#
VDRAM_PW RGD

CPU MEM CTL &

DDR3 SODIMM PWRS

+0.75V_DDR_VTT
+SMDDR_VREF

+0.75V_DDR_VTT only will be shut down in S3 mode, and +0.75V_DDR_VTT for DDR3 SODIMM only.

+1.5V_SUS

SUSC#
C

Power button from EC to SB

DNBSW ON#

CPU_THM/SB/SB_SCL1/2
SB_KB/SPI/LPC ROM PWRS

20mS
delay

RSMRST#

HW PG_1.1V
+5V_S5/+3.3_S5/+1.1_S5
W hen IMC, always on at all time( always PW R)

S5 RAILS
SUSD
S5_ON

Power button pressed

NBSW ON#

KBC is ready
AC not present scenario = LOW AC present= high
ACIN
(ACIN detect)

KBC is powered by
+3.3VPCU

+5VPCU/+3.3VPCU
LDO:5.4V
(from DCIN)
Battery inserted/AC IN
VIN_SRC
+AVBAT

PROJECT : ZQ2
Quanta Computer Inc.
Size

Document Number

Rev
1A

Power squence
Date:
1

Wednesday, May 27, 2009

Sheet
8

44

of

46

47

Group-A

+3VPCU

HWPG_1.1V
+3.3V_S5

EC
SMSC

PWRGD

PWRGD
S5_ON

RT8206B

Power on Sequence required:

+1.1VEN

+5V_S5

UP6111A

+1.1V_S5

HWPG_1.8V
+1.8V

DNBSWON#

+1.5V

+1.5V_SUS
SWITCH
(OPTION)

HPA00835RTER

+1.8VEN

+1.5V_SUS

SB820

SUSON
MAIN_ON

+0.75V_DDR_VTT
MAIN_ON

+5V_S5

+1.2V_ON

+1.1V

SWITCH

+5V

+3.3V_S5

+1.1V_S5

PWRGD

5 MAX8207A
5

SB800:
1, +3.3V_S5 ramp before +1.1_S5
2, +3.3V ramp before +1.8v
3, +1.8V ramp before +1.1v
4, +3.3v ramp before +1.1v
5, +3.3VALW_R ramping down time > 300us
6, 50uS <= All power rails except +3.3VALW_R <=
40mS
7, 100uS <= +3.3VALW_R <= 40mS

SWITCH
6

+3.3V

+2.5V_ON

+2.5V
RT9025

RT9025
LDO

9
9

CPU_VDDR

RS880:
1, 0 <(+3.3V) - (+1.8v) < 2.1
2, +1.8V ramp before +1.1v
3. +1.1V ramp before VCC_NB

+VCORE

EN

HWPG_2.5V

ISL6265A

CPU_VDDNB_CORE

CPU_COREPG

PWRGD

NB_CORE

10
UP6111A

POWER RAILS Sequencing

SB820 Sequencing

RS880 Sequencing

S5_ON

13

+1.8V

+3.3V_S5

+3.3V

+3.3V_S5

14

HWPG_1.8V

ICH_RSMRST#

+5V_S5

15

+1.5V

S0 POWER

ATX PS_PWRGD

+1.1V_S5

16

+2.5V

PCIE_RCLKP/N

NB INPUT CLOCKS

HWPG_1.1V

17

HWPG_2.5V

PCICLK[4:0]

CPUCLK

NB POWER RAILS

EC Sequencing
1

3VPCU

NBSWON#

VIN_ON

S5_ON

ICH_RSMRST#

DNBSWON#

18

CPU_VDDNB_CORE

SB_PWRGD_IN

NB_PWRGD

-DNBSWON#

SUSON

19

+VCC_CORE

NB_PWRGD_IN

SB_PWRGD

SUSB#/SUSC#

+1.5V_SUS

20

CPU_VDDR

LDT_PG

SUSON/USB_ON#

+SMDDR_VTERM

21

CPU_COREPG

KBRST#

PCIRST#,NB_RST#

MAIN_ON/HWPG

LDT_RST#

10

VRON

11

PWROK

10

MAIN_ON

22

+1.1V

10

A_RST#

10

11

+5V

23

NB_CORE

11

PCIRST#

11

+3.3V

24

12

LDT_RST#

12

LDT_PG/CPU_PWRGD

12

PROJECT : ZQ2
Quanta Computer Inc.
Size

12

Document Number

Rev
1A

Hole, Nuts
Date:

W ednesday, May 27, 2009

Sheet

45
8

of

46

MODEL

Model

CHANGE LIST

REV
1A

ZQ2 MB

ZQ2
FROM

1.A01 del Ext-CLK Gen component

2.A02 del Power VGPU-IO
3.A03 page 7,9,10 add side-port
4.A04 page9 R123 no stuff ,R129 stuff for A-test boot issue
5.A05 page9 U22.D8 change to A_RST#_SB
6.A06 page11 move dGPU_PWROK from U29.AA4 to U29.AJ6
7.A07 page11 move BOARD_ID[0:5] to U29.AC3
8.A08 page12,17 add VGA_REQ# for VGA_CLK request
9.A09 page13 move MEM_1V5 to U29.A7
10.A10 page13 update Board_ID table
11.A11 page13 add sideport table
12.A12 page 15 del R471 for just only use int-clkgen
13.A13 page 11,16 add CLK_14M_VGA for Park boot
14.A14 page 17 modify GPU_VID gpio relation
15.A15 page18 modify R86 from 680 to 51
16.A16 page19 add +3V_D_EXT for leakage issue
17.A17 page20 del don't use port for cost down

2A

3A

2A

1A

2A

1A

2A

1A

2A

1A

2A

1A

2A

1A

2A

1A

2A

1A

2A

1A

2A

1A

2A

1A

2A

1A

2A

1A

2A

1A

2A

1A

2A

1A

2A

1A

2A

1A

2A

1A

2A

1A

2A

1A

2A

Page10

modify L77 footprint

1A

2A

Page23

modify R54 stuff for Discrete,R50 for UMA

1A

2A

B03

Page27

modify ODD power connection

1A

2A

B04

Page

change 0-ohm R185,R89,R93,R136,R142,R485,R487,R488,R489,R490,R493,R503 to short pad

2A

3A

B05

Page12

add CLK request pull up R501,R551

2A

3A

B06

Page30

add Q41,Q42,R651,R652,R633 from LED board

2A

3A

B07

Page

add R659,R660,R661,R662 from power board

2A

3A

B08

Page

modify R314,R315,R316,R322 follow ZQ1

2A

3A

B09

Page

add Q40,and RF_LED_EN# with RF_LED# to EC

2A

3A

B10

Page

change U26,CN10,U12 footprint

2A

3A

B11

Page

C534C537C154C147C144C129C14C20C18C17C15C32C39
C50C62C72C88C87C103C102C29 from CC0402-C to CC0402.
L8 R48 R41 R30 L1 L14 from RC0402-C to RC0402.

2A

3A

2A

3A

2A

3A

2A

3A

2A

3A

2A

3A

2A

3A

2A

3A

2A

3A

2A

3A

2A

3A

2A

3A

B12

Page

R377 stuff ,R247 no stuff follow AMD sch.

B13

Page

change D2,D3,D23,D25,D26,D29 to BAS316

B14

Page

reserve R152,R423,L4 (USBP2)option for CCD issue

B15

Page

change U26,CN10,U12 footprint

B16

Page13

Change board ID power rail from +3V_S5 to +3V.

B17

Page10

W/O Sideport ,R146 no-stuff, C831 connect to GND

B18

Page9

no-stuff R108,R105

B19

Page28

del D20,D21,D22 &R498 from 10K->1K & add Q43,Q44,Q45

B01

C01

Page02

Add H/W shutdown function and add CPU_COREPG shutdown design(add Q43,R152)

2A

3A

C02

Page23

Option brightness switch control just only by NB R50

2A

3A

C03

Page40

Change PG_GPUIO_EN pull high power rail from +3V to +3V_D_EXT. For Park GPU SG mode hang up issue.

2A

3A

C04

Page42

Change PR60 from 10k to 0ohm.

2A

3A

C05

Page30

chang LED R R660,R661,R662,R663,R314,R316,R321

2A

3A

C06

PageX

change R 0ohm to short pad

2A

3A

C07

PageX

audio for codec suggestion

2A

3A

C08

PageX

X.

2A

3A

C09

PageX

2A

3A

C10

PageX

X.

2A

3A

C11

PageX

X.

2A

3A

C12

PageX

X.

2A

3A

2A

3A

3A

3B

3A

3B

3A

3B

3A

3B

3A

3B

3A

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D01

Page03

Change CPU VDDR_SENSE pull high power rail to CPU_VDDR and remove trace connect to controller IC.

D02

Page15

Modify text note.

D03

Page12

Change "GBE_COL" ,"GBE_CRS" ,"GBE_RXERR" to GND follow SCL V1.04 version.

D04

Page14

Change USB PLL power rail source to separate VDDPL_33_USB_S follow SCL V1.04 version.

D05

Page04

R409 no stuff, R413 stuff

D06

Page09

del PD5, PR124-390k for panasonic battery low power protect issue.

D07

Page36

PR229 no stuff

D08

Page23

C212,C213,C214,C220,C221,C222 from 33p to 10p

D09

Page21

modify DDR3 Memory table

D10

Page28

R568 stuff and R498 no stuff for Audio issue

D11

Page2/4

Q3 pin 3 change to PM_THERM#,Q3 pin 8 add PM_THERM#

D12

Page23

reserve C541 for monitor test issue

3C

PROJECT MODEL :

ZQ2

APPROVED BY:

DATE:

DRAWING BY:

REVISON:
3

Document Number

Rev
1A

Change list

1A
Date:

PROJECT : ZQ2
Quanta Computer Inc.

2009/08/13
Size

PART NUMBER:
5

1A

1A

B02

DOC NO.

1A

B01

4A

To

Wednesday, May 27, 2009

Sheet
1

46

of

46