TRNG I HC BCH KHOA H NI

VIN IN T - VIN THNG

----------

BO CO THC TP K THUT

THIT K H THNG NHNG

TR CHI FLAPPY BIRD
TRN KIT DE1 ALTERA
TI PHNG NGHIN CU H THNG NHNG
V TNH TON KH TRNH VIN TVT - BKHN
Sinh vin thc hin: TNG THIN V
Lp: KSTN TVT K55
SHSV: 20102788

H Ni, 8 /2014

Nhn xt ca n v thc tp:

MC LC
MC LC ........................................................................................................... 3
DANH MC HNH V ....................................................................................... 4
A. LI NI U .............................................................................................. 5
B. NI DUNG .................................................................................................. 6
Chng 1. Trung tm nghin cu v pht trin in t - Vin thng ................ 6
1.1

Chc nng, nhim v. ....................................................................... 6

1.2 Phng th nghim H thng nhng v Tnh ton kh cu trnh

(ESRC Lab). ......................................................................................................... 8
Chng 2. Ni dung thc tp............................................................................ 9
2.1

Cc khi nim c bn ........................................................................ 9

2.1.1 H thng nhng ............................................................................. 9

2.1.2 Cng ngh FPGA ........................................................................ 10
2.1.3 Phn cng c kh nng cu hnh .................................................. 10
2.1.4 H thng nhng trn cc KIT pht trin ca Alteral. .................... 11
2.2

Thit k h thng nhng Tr chi Flappy Bird ........................... 14

2.2.1 Tng quan h thng ..................................................................... 14

2.2.2 Phn tch ...................................................................................... 18
2.2.3 Thit k ....................................................................................... 19
2.2.3.1 Khi iu khin VGA............................................................. 19
2.2.3.2 Thut ton di chuyn, tnh ton va chm, tnh im ngi
chi.. ............................................................................................. 21
2.2.3.3 X l Audio, giao tip SD Card ............................................. 27
2.2.3.4. Khi bn phm PS2 .............................................................. 29
2.2.4. Kim th h thng ...................................................................... 30
Chng 3. Nhn xt xut ........................................................................... 31
3.1.

u im ........................................................................................... 31

3.2.

Nhc im ...................................................................................... 31

3.3.

xut............................................................................................. 31

C. KT LUN ................................................................................................ 32
D. TI LIU THAM KHO .......................................................................... 33

DANH MC HNH V
Hnh 2.1.4.1. Giao din lm vic ca phn mm Quartus ................................... 11
Hnh 2.1.4.2 Giao din lm vic ca Tool SOPC ................................................ 12
Hnh 2.1.4.3 Giao din lm vic ca NIOS II IDE .............................................. 13
Hnh 2.2.1.1 Mn hnh chi ................................................................................ 14
Hnh 2.2.1.2 Cng giao tip VGA ...................................................................... 15
Hnh 2.2.1.3 Cng giao tip PS2......................................................................... 16
Hnh 2.2.1.4 Cc thnh phn trong h thng ....................................................... 17
Hnh 2.2.2.1 S khi h thng ....................................................................... 19
Hnh 2.2.3.1 S khi VGA Controller ........................................................... 20
Hnh 2.2.3.2 Cc thng s trn mn hnh chi .................................................... 21
Hnh 2.2.3.3 S thut ton va chm v tnh im ........................................... 24
Hnh 2.2.3.4 Lu tr mt k t trong ROM ......................................................... 25
Hnh 2.2.3.5 Khi character controller. ............................................................... 26
Hnh 2.2.3.6 Khi SD card v x l m thanh ..................................................... 27
Hnh 2.2.3.7 Cu trc khi audio ........................................................................ 28
Hnh 2.2.3.8 Khi audio config trong SOPC ....................................................... 28
Hnh 2.2.3.9 Module Ps2 trong SOPC ................................................................ 29

A.

LI NI U

Nm trong chng trnh hc c bn ca sinh vin ngnh k thut, thc tp k

thut l mt mn hc quan trng. Sinh vin c trc tip tham gia hc tp v lm
vic trc tip ti mt c quan, mt t chc. y l c hi thc s tt cho sinh vin
tip xc trc tip vi mi trng lm vic thc t, c p dng nhng kin thc
hc c trn gh nh trng vo nhng lnh vc khc nhau, qua rt ra c
nhiu kinh nghim cho bn thn, gip sinh vin c nh hng tt hn trong trong
vic chun b cho con ng pha trc.
Trong qung thi gian h nm 2014, hc k 20133, em c hc tp v
nghin cu ti Phng th nghim v H thng nhng v Tnh ton kh cu trnh
(Embedded System and Reconfigurable Compute Labroratory) thuc Trung tm
Nghin cu v Pht trin, Vin in t Vin Thng, i hc Bch Khoa H Ni.
Ti phng th nghim, em cng cc bn trong nhm c tm hiu thm v
phng php thit k h thng nhng, trc tip thc hnh trn cc KIT pht trin
c trang b trn phng lab. Qua nng cao c kh nng xy dng h thng,
kh nng s dng cc ngn ng m t phn cng nh VHDL, Verilog HDL cng
nh cc ngn ng lp trnh nh C/C++.
Kt qu nghin cu sau t thc tp k thut, ngoi tr nng cao c cc
kh nng v xy dng h thng, em v cc bn khc trong nhm xy dng c
mt h thng nhng hot ng n nh. H thng c xy dng v pht trin da
trn tng tr chi trn Android (Flappy Bird) nhng c thc hin hon ton
trn KIT DE1 ca Alteral.
c c nhng kt qu kh quan trong t thc tp h ny, em v cc
bn trong nhm nhn c s gip ca cc anh ch trong phng th nghim
cng cc bn gip . Xin chn thnh cm n thy Phm Ngc Nam to iu
kin v vt cht cng nh trang thit b cho nhm c hc tp v nghin cu.
Qua y, em cng xin gi li cm n n Ban lnh o Vin in t Vin
thng to iu kin cho em c tham gia t thc tp k thut ln ny.
H ni, 8/2014
Sinh vin
Tng Thin V

B.

NI DUNG

Chng 1. Trung tm nghin cu v pht trin in t - Vin thng

1.1

Chc nng, nhim v.

Trung tm nghin cu v pht trin in t- Vin thng

a ch: Phng 618, Th vin T Quang Bu, i hc Bch khoa H Ni, s 1

i C Vit, Hai B Trng, H Ni.
Trung tm nghin cu v pht trin in t Vin thng c nhim v trin khai
cc hot ng nghin cu khoa hc, t vn v chuyn giao cng ngh trong lnh vc
T-VT, c t chc theo c ch m, hnh thnh cc nhm nghin cu v cc nhm
nghin cu mnh thc hin cc ti, d n nghin cu, vi s tham gia ca cn b
thuc cc b mn, trung tm ca Vin, cn b thuc cc n v trong Trng HBK
H Ni, cn b v nh khoa hc ca cc trng i hc, cc c s nghin cu trong
nc v ngoi nc. Hin ti trung tm c 8 phng nghin cu chnh:

PTN Thit k vi mch (IC Design Lab)

PTN Thng tin v tuyn (Wireless Communications Lab)
PTN Mng th h mi (Future Networking Lab)
PTN Quang dn v siu cao tn (Microwaves and Photonics Lab)
PTN H thng nhng v tnh ton kh cu hnh
(Embedded Systems and Reconfigurable Computing Lab)
PTN X l tn hiu v thng tin
(Signal and Information Processing Laboratory)
PTN a phng tin (Multimedia Lab)
PTN K thut in t Y sinh (Bio-medical Electronics Lab)

Trung tm l ni cho php pht huy ht th mnh v mt NCKH v CGCN ca

Vin T-VT. Ngoi ra, y cng c th c xem l iu kin tin quyt Vin c
th tp trung tim lc KHCN nhm thc hin cc nhim v ln mang tnh trng im
quc gia, l ni thc y HTQT trong cc hot ng NCKH v CGCN vi cc nc
pht trin.

Cc lnh vc nghin cu chnh:

Thng tin v tuyn: Cc hng nghin cu lin quan n thit b di ng thng
minh; Cc k thut x l tn hiu tin tin trong thng tin di ng nh
OFDM/OFDMA, MIMO-OFDM, CDMA; Thit k v m phng mng thng tin di
ng dng m hnh; Nghin cu v thit k h thng thng tin di nc
Mng th h mi v d ch v : tp trung vo cc ch nghin cu lin quan n
mng c nh v di ng th h mi, mng Internet v cc dch v mng nh: Cng
ngh o ha, qun l ti nguyn mng, mng tit kim nng lng, m bo cht
lng dch v v cht lng tri nghim trong mng; Mng cm bin v tuyn v
ng dng ca mng cm bin trong mi trng, xy dng, giao thng vn ti; H
thng thng tin khng dy a chng phc v cc hot ng hin trng v tnh
hung khn cp; Mng ng ng v mng xp chng; Cc cng ngh s dng
trong mng di ng: ti u ha ti nguyn mng, qun l di ng, iu khin
chuyn giao, m bo cht lng dch v v cht lng tri nghim di ng; Cng
ngh theo nh hng dch v gi tr gia tng v mi trng thng minh
Quang dn v siu cao tn: tp trung vo cc ch nghin cu lin quan n
cng ngh quang v siu cao tn nh: Nghin cu, tnh ton v thit k cc mch
quang hc c kch thc nano: p dng cho cc h thng thng tin quang, cc phn
t tch cc, v c bit l cc thit b truyn dn nng lng quang hc kch thc
nano; Phn tch, thit k v ch to cc loi antenna th h mi: nghin cu cc loi
antenna a bng, bng rng, kch thc nh, hiu sut bc x cao ng dng trong
cc h thng thng tin v tuyn, cc h thng v tuyn cm bin mi trng; Phn
tch v thit k ng truyn sng v tuyn: phn tch v thit k ng truyn,
phng thc truyn sng thch hp cho cc h thng thng tin
H thng nhng v tnh ton kh cu hnh: tp trung vo cc ch nghin cu
lin quan n thit k cc h thng vi mch kh trnh v ng dng; Cc ng dng
ca h thng nhng trong vin thng; Xy dng v ng k s hu tr tu cc b
th vin phn cng phc v cho vic thit k cc thit b di ng nh cng ngh
CDMA, OFDM, .v.v.; Thit k cc vi mch m ha, gii m video (MPEG4,
H.264), m ha, gii m nh (JPEG) v gii m, m ha m thanh (MP3, AAC);
Cc ng dng ca h thng nhng trong cc h iu khin v in t ng dng.
X l t n hiu tp trung vo cc ch nghin cu lin quan n x l tn hiu
trong vin thng, trong a phng tin, trong y sinh nh: L thuyt x l tn hiu
phi tuyn v cc ng dng trong vin thng, bo mt; Thng tin hn lon, laser hn
lon, mch hn lon v m ha biu tng; Mng thn kinh t bo v cc ng dng;
X l nh v ng dng ca x l nh trong y t, giao thng vn ti, bo mt, .v.v.
Thit vi ch thit k cc IC s v tng t, pht trin cc cng c kim tra vi
mch (verification), IC cao tn (RFIC) v RFID.

1.2

Phng th nghim H thng nhng v Tnh ton kh cu trnh (ESRC

Lab).
n v thuc trung tm nghin cu v pht trin vin in t Vin thng, i
hc Bch Khoa H Ni.
a ch: Phng 618, th vin T Quang Bu, HBKHN, s 1 i C Vit, Hai
B Trng H ni.
C cu t chc:
Ch nhim phng Lab: PGS - TS. Phm Ngc Nam - Ph Vin
trng Vin in t, Ph trng b mn in t v K thut my tnh Vin thng, trng i hc Bch khoa H Ni.
Nghin cu sinh nghin cu: 3.
S lng sinh vin nghin cu v hc tp: 50
Hng nghin cu:
Thit k h thng nhng.
Tnh ton cu hnh li.
Thc hin v ti u cc thut ton x l tn hiu trn FPGA.
Cc ti ang thc hin:
Broadcom
HTTP streaming
Network on Chip
Open flow
Camera giao thng

Chng 2. Ni dung thc tp

2.1

Cc khi nim c bn

2.1.1 H thng nhng

H thng nhng (Embedded system) l mt thut ng ch mt h thng c
kh nng t tr c nhng vo trong mt mi trng hay mt h thng m. l cc
h thng tch hp c phn cng v phn mm phc v cc bi ton chuyn dng trong
nhiu lnh vc cng nghip, t ng ho iu khin, quan trc v truyn tin. c im
ca cc h thng nhng l hot ng n nh v c tnh nng t ng ho cao.
Cn theo nh ngha ca IEEE th h thng nhng l mt h tnh ton nm trong
sn phm, to thnh mt phn ca h thng ln hn v thc hin mt s chc nng ca
h thng.
Ni mt cch n gin khi mt h tnh ton (c th l PC, IPC, PLC, vi x l, vi
h thng, DSP vv) c nhng vo trong mt sn phm hay mt h thng mt cch
hu c v thc hin mt s chc nng c th ca h thng th ta gi l mt h thng
nhng. V d quanh ta c rt nhiu sn phm nhng nh l vi sng, ni cm in, iu
ho, in thoi di ng, t, my bay, tu thu, cc u o c cu chp hnh thng
minh vv. Ta c th thy hin nay h thng nhng c mt mi lc mi ni trong cuc
sng ca chng ta.
H thng nhng thng c mt s c im chung nh sau:

Cc h thng nhng c thit k thc hin mt s nhim v chuyn

dng ch khng phi ng vai tr l cc h thng my tnh a chc nng. Mt s h
thng i hi rng buc v tnh hot ng thi gian thc m bo an ton v tnh
ng dng; mt s h thng khng i hi hoc rng buc cht ch, cho php n gin
ha h thng phn cng gim thiu chi ph sn xut.

Mt h thng nhng thng khng phi l mt khi ring bit m l mt

h thng phc tp nm trong thit b m n iu khin.

Phn mm c vit cho cc h thng nhng c gi l firmware v

c lu tr trong cc chip b nh ROM hoc b nh flash ch khng phi l trong
mt a. Phn mm thng chy vi s ti nguyn phn cng hn ch: khng c bn
phm, mn hnh hoc c nhng vi kch thc nh, dung lng b nh thp Sau y, ta
s i su, xem xt c th c im ca cc thnh phn ca h thng nhng.
H thng nhng giao tip vi bn ngoi thng qua cc thit b ngoi vi, v d
nh:

Serial Communication Interfaces (SCI): RS-232, RS-422, RS-485...

Synchronous Serial Communication Interface: I2C, JTAG, SPI, SSC v

ESSI

Universal Serial Bus (USB)

Networks: Controller Area Network, LonWorks...

B nh thi: PLL(s), Capture/Compare v Time Processing Units

Discrete IO: General Purpose Input/Output (GPIO)

2.1.2 Cng ngh FPGA

Field-programmable gate array (FPGA) l vi mch dng cu trc mng phn t
logic m ngi dng c th lp trnh c. Vi mch FPGA c cu thnh t cc b
phn:

Cc khi logic c bn lp trnh c (logic block)

H thng mch lin kt lp trnh c
Khi vo/ra (IO Pads)
Phn t thit k sn khc nh DSP slide, RAM, ROM, nhn vi x l...

FPGA c th ti cu trc li khi ang s dng, cng on thit k n

gin do vy chi ph gim, rt ngn thi gian a sn phm vo s dng.
Kin trc ca FPGA cho php n c kh nng cha khi lng ln cng logic
so vi cc vi mch bn dn lp trnh c c trc n v pht huy ti a kh nng lp
trnh ca cc phn t logic v h thng mch kt ni.
Ngoi kh nng ti cu trc vi mch ton cc, mt s FPGA hin i cn h tr
ti cu trc cc b, tc l kh nng ti cu trc mt b phn ring l trong khi vn m
bo hot ng bnh thng cho cc b phn khc.
Thit k hay lp trnh cho FPGA c thc hin ch yu bng cc ngn ng m
t phn cng HDL nh VHDL, Veriloga, AHDL. Cc hng sn xut FPGA ln nh
Xilinx, Altera thng cung cp cc gi phn mm v thit b ph tr cho qu trnh thit
k.
2.1.3 Phn cng c kh nng cu hnh
Phn cng cu hnh c l nhm cc mch tch hp c bit n vi ci tn
mng cc cng lp trnh c FPGA. Cc linh kin ny cho php ngi thit k cu
hnh n ch trong vi giy, v mi FPGA c th thit k thc hin cc chc nng
hon ton khc nhau.
S ln cu hnh li ca FPGA cng l khng gii hn, do c th nghin cu,
pht trin v ng dng h thng ngay trn chnh chip . Linh kin FPGA cho php
cu hnh li thay i chc nng logic trong khi vn ang nm trong h thng. Kh
nng cho php cu hnh li chc nng logic c th ng dng trong nhiu kiu h thng
ci t h thng t khc phc li, to h thng c th c cu hnh cho nhiu mi
trng hot ng, hoc ci t thnh phn cng a mc ch cho cc ng dng khc
nhau.
S dng FPGA lm cho d thit k v kim tra phn cng cng nh kh nng
nhanh chng tung sn phm ra th trng. Bn cnh thi gian thit k v pht trin

ngn hn, linh kin FPGA cn cho php kh nng ch to cc bng mch mu cng
nh cc gii php gi r.
2.1.4 H thng nhng trn cc KIT pht trin ca Alteral.
Altera cung cp mt b cng c gip ngi dng c th xy dng c mt h
thng nhng hon chnh.
Phn mm Quartus: tng hp cc thit k phn cng (di dng cc file
dng ngn ng phn cng m t) thnh cc bit stream. Phn mm c
chc nng load file bit stream ny xung, cu hnh ln cc dng chip trn
KIT pht trin.

Hnh 2.1.4.1. Giao din l

vic ca phn

Quartus

Quartus II l cng c phn mm pht trin ca hng Altera, cung cp

mi trng thit k ton din cho cc thit k SOPC (h thng trn 1 chip
kh trnh - system on a programmable chip). y l phn mm ng gi
tch hp y phc v cho thit k logic vi cc linh kin logic kh trnh
PLD ca Altera, gm cc dng APEX, Cyclone, FLEX, MAX, Stratix...
Quartus II cho php lm vic vi nhiu file cng thi im, son
tho file thit k trong khi vn c th bin dch hay chy m phng cc d n
khc. Cng c bin dch Quartus II nm trung tm h thng, cung cp quy
trnh thit k mnh cho php ty bin t c thit k ti u trong d
n. Cng c nh v li t ng v cc bn tin cnh bo khin vic pht hin
v sa li tr nn n gin hn.

 Cng c SOPC Building (c tch hp trn Quartus): Gip ngi dng

c th xy dng c mt h thng hon chnh. Bao gm vi x l Nios II,
cc khi giao tip ngoi vi.
V giao din ca phn mm:

Hnh 2.1.4.2 Giao din l

vic ca Tool SOPC

s dng c cng c, ta c th thc hin cc bc sau:

- M chng trnh QUATUS II File>New Project Wizard t tn
ng dn, tn project. Sau nhn Next.
- Thm cc file cn thit vo project (nu c), sau nhn Next.
- Chn la thit b FPGA cn thit. trong trng hp l kit DE1 th m
hiu l EP2C20F484C7 (nu dng KIT DE2 th m hiu ca FPGA l
EP2C35F672C6), sau bm next.
Khi giao din hin ra, ngi s dng c th xy dng h thng theo
mun. Cc nhm module khc nhau c hin th pha tri mn hnh.
Ngoi ra, cn c th thm cc module theo t xy dng ca ngi dng.

 Cng c Nios II Software Building: Sau khi s dng SOPC Building, ta

c mt h thng phn cng hon chnh, NIOS II gip ngi dng c
th vit ng dng cho nn tng phn cng c xy dng v np n
ln b vi x l Nios II c cu hnh. NIOS 2 IDE (NIOS 2 Integrated
development environment) cung cp mi trng pht trin ng dng cho
cc h thng s dng nhn vi x l NIOS 2. Vi mt my tnh chy NIOS
2 EDS, mt con chip FPGA ca Altera, cp kt ni JTAG, ta c th pht
trin phn mm bt k c th np xung v chy trn con chip NIOS 2
c cu hnh trn chip FPGA .
Giao din lm vic ca phn mm tng i n gin:

Hnh 2.1.4.3 Giao din l

vic ca NIOS II IDE

Cc bc thit k mt h thng nhng trn KIT DE ca Altera:

S dng Quartus xy dng mt Project mi.
Xy dng mt h thng hon chnh gm cc b x l trung tm,
cc khi giao tip vi thit b ngoi vi bng cng c SOPC Builder.
To ra cc file m t phn cng bng SOPC Builder, tng hp
chng li bng Quartus
Xy dng phn mm cho h thng (s dng b cng c NIOS II
IDE), build phn mm ny v np xung processor c to.
Nh vy, chng ta c mt h thng hon chnh.

2.2

Thit k h thng nhng Tr chi Flappy Bird

2.2.1 Tng quan h thng

L mt tr chi c pht trin trn nn tng h iu hnh Android, ngi
chi iu khin i tng trn mn hnh bng cch s dng cm ng ca smart
phone.

Hnh 2.2.1.1 M n hnh chi

Trn mn hnh chi xut hin 2 i tng, bird di chuyn theo hnh parbol khi
c iu khin di chuyn. Trong khi cc ng nc (pipe) di chuyn theo chiu
ngang vi mt tc nht nh. Ngi chi s ghi im nu vt qua mt ng nc,
im c hin th ln mn hnh chi. Nu va chm vi ng nc hoc chim (bird)
ri xung mt t, tr chi dng li v hin th im ca ngi chi.
Nguyn mu ca tr chi chy trn h iu hnh Android, em cng nhm
(nhm 3 ngi) chuyn qua thit k tr chi trn nn tng mt h thng nhng, s
dng cc ngn ng m t phn cng nh Verilog, v ngn ng lp trnh phn mm nh
C x l c bi ton. H thng bao gm b iu khin trung tm v cc thit b
ngoi vi, chi tit cc thnh phn trong h thng nh sau:


KIT DE1 ca Alteral: y l b x l trung tm ca h thng, cc thit
k v phn cng cng nh phn mm s c thc hin trn KIT ny.
DE1 l KIT pht trin c cung cp bi hang Altera. DE1 c dng cho vic
hc tp, nghin cu v pht trin cc sn phm lien quan n FPGA. Cc thng s c
bn ca kit DE1 nh sau:
o B nh:
8MB SDRAM
512KB SRAM
4MB Flash
o m thanh: H tr b codec 24 bit
o Giao din tng tc
nt bm (KEY)
10 Led v 8 Led xanh
led by thanh
10 cng tc chuyn mch (SWITCH)
o Kt ni ngoi vi:
VGA, RS-232, PS2
2 cng m rng 40 chn
SD/MMC
o Ngun: t cp USB hoc thng qua cp ngun ring

Mn hnh VGA (VGA Screen): l mn hnh c chn giao tip VGA

RGB, hin th ton b mn hnh chi, giao din ngi chi. Mn hnh s l ni hin ra
cc i tng ca tr chi: con chim, ng nc, hnh nn, im, thi gian chi.

Hnh 2.2.1.2 Cng giao tip VGA


Bn phm PS2 (PS2 Keyboard): bn phm vi giao tip PS2 nhn tn
hiu iu khin ca ngi chi.

Hnh 2.2.1.3 Cng giao tip PS2

Loa (Speaker): m thanh cho tr chi.

Hnh 2.2.1.4 Cc th nh phn trong h thng

2.2.2 Phn tch

Nh vy, t nhn nh tng quan v cc yu cu ca h thng, cc thit
b ngoi vi c s dng. Nhm phn tch v a ra cc phng n kh thi v ti
u nht thc hin h thng.
V cc thit b ngoi vi, mn hnh s trc tip s dng k thut qut, khi
VGA
Controller s m nhn nhim v ny. Cc tn hiu qut ngang, qut dc
(vertical and horizontal) cng nh tn hiu mu RGB s c khi ny trc tip kt
ni vi mn hnh, iu khin hin th mn hnh. Khi VGA Controller s nhn tn
hiu iu khin t SOPC Sytems (Ni c phn nhng mm thc hin cc chc
nng ca h thng).
Nhn thy vic s dng phn mm tnh ton cc ta ca cc vt th c
hin th trn mn hnh s linh hot hn rt nhiu so vi vic s dng thun ty phn
cng tnh ton, nhm i n quyt nh tt c cc vt c hin th trn mn hnh s
c tnh ton bng chng trnh C c nhng xung NIOS II Processor.
Bn phm PS2 s c giao tip thng qua mt khi PS2 Controller trong
SOPC System. Khi ny s bt s kin, nhn din phm c bm v gi tn hiu
nhn c n b iu khin trung tm.
V phn m thanh ca h thng, to thm phn sinh ng v hp dn
cho tr chi, nhm quyt nh i xy dng thm cc khi phc v pht m thanh
ca tr chi qua loa (speaker). Trn KIT DE1 c tch hp chip wolfson WM 8731
x l m thanh. Cc file m thanh c dung lng kh ln (so vi dung lng b nh
trong ca KIT) nn cn tm ra mt gii php thch hp cho vic lu tr cc file m
thanh. Nhm i n quyt nh s dng SD Card lu tr cc file m thanh di
dng .wav. SD Card linh hot trong vic ghi cc file m thanh.
Nh vy, h thng s c cc khi m nhn cc chc nng khc nhau, b
x l trung tm, b giao tip vi cc thit b ngoi vi. S khi ca h thng s
gip chng ta hnh dung r hn v h thng c thit k.

Hnh 2.2.2.1 S hi h thng

H thng vi b iu khin v x l trung tm l Nios II Processor, nhn tn hiu
t cc khi khc v thc hin tnh ton, gi tn hiu iu khin phn hi. S linh hot
gia phn cng v phn mm c th hin trong h thng.
2.2.3 Thit k
2.2.3.1 Khi iu khin VGA.
hnh bn di, s khi ca khi iu khin giao tip VGA. Khi VGA
Synchronous c chc nng to ra cc tn hiu qut ngang (horizontal scan) v qut dc
(virtical scan) ra mn hnh VGA, ng thi to ra tn hiu pixel_x, pixel_y th hin
c ta ca pixel ang c qut trn mn hnh. Tn hiu ny quan trng cho vic
v mt hnh ln mn hnh. Tn s qut ca khi ny l 60Hz, vi mn hnh phn gii
640*480 pixel.
Khi Image Processing l khi c chc nng x l hnh nh v a hnh nh ra
mn hnh. Khi ny nhn tn hiu ta pixel ang c qut t khi VGA
Synchronous, tng ng vi mi ta mt b tn hiu mu RGB (12 bit, 4 bit cho
mi mu) s c a ra mn hnh. Nh vy, tng ng vi mi pixel s c mt mu
c v ln, ty thuc vo khi ny a ra mu g th hnh v s tng ng vi mu
c hin ln.
c th c d liu mu cho khi IP hin th ra mn hnh, nhiu hnh phc tp
cn c lu tr d liu trc trong ROM. D liu ny l 12 bit mu tng ng vi
12bit mu c nhc n phn trn, khi IP s c 12 bit mu ny v a ra mn
hnh.

Nh vy, vn v c mt hnh ln mn hnh VGA c th hiu n gin nh

l khi IP nhn d liu l ta ca cc vt th, tnh ton v ng b vi tn hiu
pixel_x, pixel_y c th hin th ln mn hnh.
Khi IP c chc nng nhn thng tin iu khin t phn mm x l, bao gm
cc tn hiu sau:

V tr ca 4 cp cc chng ngi vt

V tr ca chim

Gi tr im hin ti
Sau s khi IP s c cc bit d liu nh c lu trong ROM ca h thng
a hnh nh ra mn hnh hin th.

Hnh 2.2.3.1 S hi VGA Controller

Hnh nh c lu trong ROM trn kit DE1 di dng nh bitmap (BMP). Mi

im nh c m ha bi 12 bit mu: 4 bit R (red), 4 bit G (Green) v 4 bit B (Blue).
c lu tr di dng cc t 12 bit cch nhau bng mt du cch. C th nhn c
file ny bng cch s dng cc phn mm phn tch nh. nh c phn tch thnh
mt tp hp cc bit mu
C 2 phng n thit k khi GPU, phng n th nht l s dng cc
module c sn trong SOPC Tool v vit phn mm iu khin cho module ny.
Phng n th 2 l module hon ton c xy dng trn phn cng bng ngn ng
verilog hoc VHDL. Trong h thng ca nhm em, do gii hn tc ca Kit DE1 nn
khi GPU c thit k th cng v hon ton bng Verilog ti u phn cng.

2.2.3.2Thut ton di chuyn, tnh ton va chm, tnh im ngi chi.

Hnh 2.2.3.2 Cc thng s trn

n hnh chi

a. Thut ton di chuyn:

Chuyn ng trn mn hnh chi c th c chia lm 2 phn chnh:

Chuyn ng theo chiu ngang ca ng nc (pipe) vi mt vn tc

c inh.

Chuyn ng ln xung ca Con chim (bird) vi vn tc thay i theo

mt hm bc hai.
Nh vy, khi kt hp 2 chuyn ng ny li vi nhau, gn h quy chiu vi ng
nc (cc ng nc chuyn ng cng mt vn tc) th ta c c chuyn ng theo
hnh parabol ca Con chim (to cm gic con chim ang nhy qua cc ng nc).
Phng trnh chuyn ng theo hai chiu x v y c dng:

X = a1 + b1*t;
Y = a2 + b2*t + c2*t^2;

Trc tin ta xt n chuyn ng ca ng nc, v tr v hnh dng ca ng

nc c quyt nh bi hai gi tr pipe_pixel_x, pipe_pixel_y. Chuyn ng ca ng
nc l chuyn ng u, theo chiu t phi sang tri theo trc x, nh vy khi thay i
gi tr pipe_pixel_x s lm ng nc chuyn ng. c iu khin bi mt hm ngt
30Hz, nh vy c 1/30 giy, ng nc s c di chuyn sang bn tri 1 pixel. Tc l
ta ca ng nc c gim i mt n v mi khi gi hm ngt.

void timer0_ISR (unsigned int id)

{

Pipe1_pixel_x --;

V hnh dng ca ng nc ( cao), gi tr pipe_pixel_y s quyt nh iu

ny. H s ny c lu vo mt mng c nh, v c ly ra khi cn thit. Nh vy,
chuyn ng ca ng nc c thc hin mt cch n gin bng cch li thay i
ta mt cc hp l, hiu ng chuyn ng u s c hin th ln mn hnh.
Chuyn ng ca Con chim l mt chuyn ng phc tp hn. Khi nhn c
mt tn hiu iu khin t bn phm, Con chim s thc hin mt chuyn ng c
dng hm bc hai theo chiu y (ta chiu x c gi c nh, khc vi ng nc,
chim s ch chuyn ng theo hng trc y).
Trc tin, mt mng jump[40] cha cc gi tr ca mt hm bc hai c to
v lu c nh, y chnh l ta y cho Con chim trong qu trnh chuyn ng.
for(t=0; t<JUMP_SIZE; t++)
{
jump[t] = 0 + 20 *(t/5.0) - 2.5 *t*t/(25.0);
}

Lc ny ta ca Con chim s c tnh theo cng thc sau:

bird_y =jump_y - jump[t];

trong jump_y l ta hin ti ca Con chim Ta ny s c cp nht

khi c tn hiu t bn phm.
Nh vy, v c bn, ta ca cc thnh phn trn mn hnh c tnh ra.
B ta ny s c cp nht sang b VGA Controller x l v a ra mn hnh.
Cc tn hiu v ta ca chim, ta ca ng nc cng nh tn hiu im v
thi gian s c a xung phn cng thng qua cc thanh ghi bng cc cu lnh.
IOWR(BIRD_Y_BASE, 0, bird_y);
IOWR(PIPE_1_X_BASE, 0, pipe_1_x);
IOWR(PIPE_2_X_BASE, 0, pipe_2_x);
IOWR(PIPE_3_X_BASE, 0, pipe_3_x);
IOWR(PIPE_4_X_BASE, 0, pipe_4_x);
IOWR(PIPE_1_Y_BASE, 0, pipe_1_y);
IOWR(PIPE_2_Y_BASE, 0, pipe_2_y);
IOWR(PIPE_3_Y_BASE, 0, pipe_3_y);
IOWR(PIPE_4_Y_BASE, 0, pipe_4_y);
(IOWR() Input output writing l mt macro c bn trong th vin ca NIOS
II dng giao tip vi phn cng, ghi d liu lnh mt vng nh c a ch nht nh,
ngoi ra c thm macro IORD() c d liu t mt vng nh nht nh)
Tn hiu ny s c a n khi x l nh (qua cc input output ca NIOS II
processor) nh c nhc n phn trc.

b. Tnh ton va cham v tnh im.

Vn di chuyn ca Con chim v ng nc c tnh ton, hai i
tng di chuyn c c lp vi nhau. c th chi c, cn tnh ton c va
chm ca con chim vi ng nc, nu va chm th chuyn sang mn hnh game over,
khi con chim bay qua c mt ng nc, im s c ghi cho ngi chi.
Va chm v tnh im hon ton c xy dng trong phn mm ca h nhng.

Hnh 2.2.3.3 S thut ton va ch

v t nh i

Flow chart din t thut ton tnh ton va chm v tnh im cho ngi chi.
(Di chuyn ca hai vt th trn thc t phc tp hn, nhng din t mt
cch d hiu nn em chon phng n n gin nht)

c. Khi x l hin th k t ln mn hnh VGA:

hin th c text ln mn hnh VGA, c 2 k thut c bn:

S dng hnh nh (image) c sn.

Mi k t s c xem nh l mt nh, mi khi cn hin th mt cm t ln mn
hnh, hnh nh ca cc k t s c c trong b nh v a ln mn hnh.
u im ca phng php ny l k t p, nhn bt mt hn cc phng php
khc (do mi k t l mt nh nn d nhn hn).
Nhc im, chnh do vn mi mt k t c i din bi mt nh nn cng
nhiu k t khc nhau th cng cn n nhiu nh khc nhau, vn ny nh hng ln
n dung lng b nh c sn trn KIT.

S dng mt b ROM c sn c lu trong b nh KIT:

V d nh k t H s c lu thnh mt dng bit c dng nh
01100110
01100110
01100110
01111110
01100110
01100110
01100110
Hnh 2.2.3.4 Lu tr

t trong ROM

M bit tng ng ca mt k t s c c ra mn hnh v hin th.

u im ca phng php ny l tit kim b nh, linh ng trong vic s dng
k t (file Rom cha tt c cc k t trong bng m ASCII), tit kim b nh trong ca
KIT.
Nhc im ca phng php ny l k t c hin th ra mn hnh th, trong
nhiu trng hp lm gim s hp dn ca game ang thit k.

Do dung lng ca KIT DE1 l c hn nn em chn phng n th 2 c

th hin th c k t trn mn hnh. Trong ti ny, k t s c s dng hin
th im v thi gian chi ca ngi chi. c th thc hin c phng n ny,
cn phi thit k mt khi Character Controller, khi ny c nhim v nhn tn hiu t
SOPC System v iu khin k t hin ra trn mn hnh.

Hnh 2.2.3.5 Khi character controller.

Khi character generator s nhn tn hiu t h thng SOPC nh tn hiu im,
tn hiu thi gian chi. X l tn hiu ny v a ra cc tn hiu a ch ly ra gi tr
ca cc k t trong khi Character Rom.
Sau khi x l cc tn hiu c khi Character Controller x l, tn hiu char_on
v char_out c a n khi VGA Controller x l v hin th ra mn hnh.
Xt mt cch tng quan, khi Character ny c th c xem l mt module con
ca khi x l nh c nhc n trong phn trc. Nhn tn hiu im t CPU v
tnh hiu pixel_x, pixel_y t khi Vga Sync ng b vi vic qut mn hnh (ta
ca k t c xt da trn ta ca im nh ang c qut n).
Mt k thut lin quan n kch thc ca k t trn mn hnh, tuy l phng ch
ging nhau, nhng khi thay i cch chon a ch (da vo pixel ang c qut) ta s
c cc kch thc ch khc nhau (thay v l 8*8)

2.2.3.3 X l Audio, giao tip SD Card

Hai module audio v SD Card c s dng to m thanh cho h thng:
SD card l ni cha cc file m thanh (ting nhy, ting c im, ting khi chim
cht). khi c tn hiu kch hot, khi x l Nios 2 s c d liu m thanh t SD
card, a d liu vo FIFO ca khi audio. Khi audio s a d liu vo chip
m thanh wolfson WM 8731 trn kit DE1 v pht ra m thanh. S khi h thng
nh sau:

SD Card
Wav_data

Audio and
video config

I2C_config

Audio_clk

NIOS 2

data

data
Fifo_avail

Audio

WM
8731
chip

To speaker

config

Hnh 2.2.3.6 Khi SD card v x l

thanh

File m thanh c lu trong SD card di nh dang wav. y l 1 nh

dng lu tr ni dung m thanh s khng nn, c s dng kh ph bin, c bit
l trong lnh vc bin tp m thanh. Mt tp tin WAV cha 44 byte u l header
mang thng tin cu hnh ca file, cc byte sau l byte d liu.
Cn lu rng d kiu trong file wav c lu theo kiu little edian, trong
khi d liu x l a vo FIFO ca audio l big-edian. Ngoi ra, d liu trong file
wav l d liu 2 knh (stereo), 16 bit u l cho knh tri (left - channel), 16 bit sau
l cho knh phi (right-channel).
Khi audio thc cht l khi to v iu khin fifo cha d liu i vo v ra
chip m thanh WM 8731. Nu s dng chc nng ADC, khi s ly d liu vo t
chip m thanh. Nu s dng chc nng DAC, khi y d liu ra chip m thanh. H
thng ca nhm em ch s dng chc nng DAC.

Hnh 2.2.3.7 Cu trc hi audio

khi audio c th hot ng c th ta cn phi thit lp cc thng s
chun (tn s, bitrate, rng d liu..), y l chc nng ca khi audio config.
Ngoi ra, ta cn phi cung cp tn s cho chip WM 8731, tn s s dng l
12.5Mhz c to ra bi mt vng kha pha PLL.

Hnh 2.2.3.8 Khi audio config trong SOPC

C 2 khi audio v audio config u c to ra trong khi SOPC, c
iu khin trn phn mm thng qua cc hm HAL.

2.2.3.4. Khi bn phm PS2

Khi keyboard trong h thng c thit k nh mt thnh phn trong SOPC module PS2, l mt thnh phn c nhm b sung thm vo c th s dng c
c th vin iu khin vic nhn gi tn hiu qua giao tip PS2.

Hnh 2.2.3.9 Module Ps2 trong SOPC

Vi khi ny, trn phn mm ta c mt b th vin bao gm:

altera_up_avalon_ps2.h : h tr kt ni PS2
altera_up_ps2_keyboard.h : cha cc hm x l bn phm
altera_up_ps2_mouse.h : cha cc hm x l chut

Hai th vin u tin c s dng x l tn hiu t keyboard. Khi c tn hiu

t keyboard n, mt ngt (interrupt) s c thc hin, trong cha tn hiu di
chuyn ca chim (mi ln nhn keyboard l chim nhy ln).
s dng ngt bn phm, ta cn kch hot ngt h thng (global) v gn mc
u tin ngt bn phm vo . Vic ny c thc hin bi 2 hm alt_irq_register() v
lt_up_ps2_enable_read_interrupt(). Tin trnh x l ngt c thc hin trong
PS2_ISR.

2.2.4. Kim th h thng

Sau khi hon thin thit k v i vo thc hin h thng, em v cc bn trong
nhm trc tip kim th h thng.

Hnh 2.2.4.1M n hnh chi

Hnh 2.2.4.2 To n b h thng

Chng 3. Nhn xt xut

3.1. u im
V phng nghin cu:

C y cc thit b (KIT thc hnh, cc thit b ngoi vi, cc

thit b phc v cho vic bo co..) h tr sinh vin trong thi gian thc tp
v lm vic ti y.

Khng gian lm vic tng i yn tnh v chuyn nghip

Nhn c s gip ca cc anh ch l nghin cu sinh, cc anh

ch l sinh vin kha trc ang lm vic ti lab.

c tham gia cc bui trainning khc nhau, ni dung trainning

phong ph v rt hu ch. Cc vn lin quan n trainning c chun b rt
y v chu o

Mi trng lm vic chuyn nghip

V c nhn sinh vin:

Hon thnh y cc nhim v c giao.

Tham gia y cc hot ng ca phng nghin cu

Tch cc tm hiu ti liu

Chp hnh tt ni quy, ln lab sinh hot y v ng thi gian

quy nh

Hng tun c bo co tin cng vic cng nh cng vic

hon thnh v k hoch tun ti.
3.2. Nhc im
V phng nghin cu:

S lng KIT cn c hn, nh hng n cc nhm khi cn mt

s lng KIT ln.

Khng gian ca phng nghin cu cn hn hp, cha p ng

c khng gian nghin cu v lm vic ca s lng ln sinh vin.
V c nhn:

tp trung trong cng vic nhiu lc cha cao, nh hng n

tin lm vic ca nhm.

Kh nng s dng Ting Anh cn hn ch.

3.3. xut
Em rt mong cc cn b ca Vin quan tm v xem xt h tr kinh ph cho
phng nghin cu, gii quyt thm v vn khng gian lm vic ca phng.

C.

KT LUN

Sau mt thng thc tp hc tp nghin cu ti phng nghin cu, em v cc bn

trong nhm xy dng c mt h thng nhng hon chnh. Tr chi ca nhm
thit k m bo cc yu cu thc t (c th chi c), c kim th.
Qua vic thit k mt h thng nh vy, em hc c nhiu k nng nng
cao nng lc bn thn. Bit phn tch mt bi ton thc t, a ra cc gii php khc
nhau cho h thng v chn gii php ti u, bt tay vo thit k mt h thng thc.
Nng cao c cc k nng v s dng cc ngn ng m t phn cng, ngn ng lp
trnh phn mm, thnh tho cc giao tip vi cc thit b ngoi vi khc nhau.
Em xin chn thnh cm n Ban lnh o vin to iu kin cho em c
tham gia t thc tp thc t ny. Chn thnh cm n thy Phm Ngc Nam nhn
v hng dn em trong cc cng vic c giao. Cm n cc anh ch v cc bn trong
phng nghin cu tn tnh gip .
Xin chn thnh cm n!

D.

TI LIU THAM KHO

[1] Pong P. Chu , Embedded SoPC Design with Nios II Processor and
Verilog Examples, 2012
[2] Hamblen J. and M. Furman, Rapid prototyping of Digital Systems,
Boston: Kluwer Academic Publisher, 2nd Edition, 2001.
[3] Pong P. Chu, FPGA Prototyping VHDL Examples,1959.
[4] Volnei A. Pedroni, Circuit design with VHDL, 2009.
[5] http://www.cs.columbia.edu/~sedwards/classes/2011/4840/
[6] http://www.youtube.com/user/LBEbooks?feature=watch
[7] http://www.eewiki.net/pages/viewpage.action?pageId=15925278