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What is Wire Load Model (WLM)?

WLM is an estimation of delay, based on area and fanout. It is obsolete technology and after
physical synthesis theres no use of it.
Prior to Routing stage, net parasitics and delays cannot be accurately determined. So, to
predict delay we need to know the parasitics associated with interconnect/net:
1. Net Capacitance
2. Net Resistance
But at the pre-routing stage, we know only the fanout of net and the size of the block that the
net belongs to. We cant predict the resistance of the various pieces of the interconnect path,
since we dont know the shape of interconnect for a net.
However, we can estimate the total length of the interconnect and thus estimate the total
capacitance. We estimate interconnect length by collecting statistics from previously routed
chips and analyzing the results. From these statistics we create tables that predict the
interconnect capacitance as a function of net fanout and block size.
WLM can come from your library or from a floor planning tool. It is the method to initially
estimate your delays and is usually overly pessimistic.
WLM analysis has three modes:
1. Top: use the WLM for the top module to calculate delays for all modules.
2. Enclosed: use the WLM of the module which completely encloses the net to compute delay
for that net.
3. Segmented: if a net goes across several WLM, use the WLM that corresponds to that
portion of the net which it encloses only.
So, we can say, wireload model is basically a set of tables of
1. Net fanout vs Load
2. Net fanout vs Resistance
3. Net fanout vs Area
And it is required for compile to estimate interconnect wiring delays .In this all attributes like
area, resistance, capacitance, slope and fan-out are given per unit length.
Example:

How are net resistance and capacitance calculated with Wireload Models?

Simple Table Lookup is performed

Some Important facts about WLM:


1. There are no standards for the wire load tables themselves, but there are some
standards for their use and for presenting the extracted loads.
2. Wire load tables often present loads in terms of a standard load that is usually the
input capacitance of a two input NAND gate with a 1X (default) drive strength

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