Register Number

SATHYABAMA UNIVERSITY
(Established under section 3 of UGC Act,1956)

Course & Branch :M.E - EMBED/VLSI/W-VLSI

Title of the Paper :VLSI Design
Max. Marks :80
Sub. Code :782103-SECX5018
Time : 3 Hours
Date :27/05/2011
Session :AN
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1.

PART - A
(6 x 5 = 30)
Answer ALL the Questions
Compare CMOS and Bipolar technologies.

2.

Write the design rules for NMOS logic.

3.

What do you mean by steering logic design?

4.

What is clocked CMOS logic?

5.

What is true single phase clock (TSPC) latches and flip flops?

6.

Write about barrel shifter.

7.
8.

PART B
(5 x 10 = 50)
Answer ALL the Questions
Derive the expression for threshold voltage and drain current for
MOS transistor.
(or)
What are the secondary effects of an MOS transistor? Explain in
detail about threshold voltage-body effect and channel length
modulation.

9.

Explain with neat diagram the various CMOS inverter logic

levels.
(or)
10. Explain a combinational logic design implementation using
CMOS and NMOS inverters with suitable example.
11. Explain about Programmable logic arrays with the AND/OR and
AND/NOR representations.
(or)
12. With the neat diagram explain about dynamic MOS storage
circuits.
13. Explain in detail about traditional domino circuits and skew
tolerant domino circuits.
(or)
14. Explain in detail the design standards and advantages of NORA
CMOS.
15. Explain the booth algorithm and how it is implemented in
multiplication.
(or)
16. Write the different standards used to perform addition operation
and explain about 4 bit Manchester adder.