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This document describes a basic logic probe circuit using a NE-555 timer chip. The circuit uses three LEDs to indicate logic 1, 0, and pulses. The yellow pulse LED will briefly light when the circuit is turned on and will stay lit for approximately 190 milliseconds after detecting a pulse to indicate its presence. The circuit is designed to work with TTL logic levels but could be modified to be compatible with CMOS logic levels as well. It can detect and display both positive and negative pulses using the different LED combinations.
This document describes a basic logic probe circuit using a NE-555 timer chip. The circuit uses three LEDs to indicate logic 1, 0, and pulses. The yellow pulse LED will briefly light when the circuit is turned on and will stay lit for approximately 190 milliseconds after detecting a pulse to indicate its presence. The circuit is designed to work with TTL logic levels but could be modified to be compatible with CMOS logic levels as well. It can detect and display both positive and negative pulses using the different LED combinations.
This document describes a basic logic probe circuit using a NE-555 timer chip. The circuit uses three LEDs to indicate logic 1, 0, and pulses. The yellow pulse LED will briefly light when the circuit is turned on and will stay lit for approximately 190 milliseconds after detecting a pulse to indicate its presence. The circuit is designed to work with TTL logic levels but could be modified to be compatible with CMOS logic levels as well. It can detect and display both positive and negative pulses using the different LED combinations.
Basic NE-555 based Logic Probe: Figure 19A (above)
This logic Probe provides you with three visible indicators:- " Logic 1 " (+, RED LED), " Logic 0 " (-, GREEN LED), and " Pulse " (YELLOW LED). Please note, at initial turn-on, the yellow "pulse" LED will pulse on / off very briefly. In the design, the 74LS00N was chosen as it was cheap and it had four two input NAND gates which made it ideal as there were plenty of "spare gates" to go around and, as a bonus, to employ a NE-555 to use as a "pulse indicator", a sort of "hold and display" chip. The basic circuit as it is shown above is very good for TTL but not CMOS due to voltages in excess of 5.5 Volts. It will fry above 5.5V. We may include the CMOS version at a later stage if requested. This will require a re-design of this circuit to comply with CMOS. The yellow or 'pulse' LED comes on for approximately 190 milli Seconds to indicate a pulse without any regard to its pulse width.
This feature enables one to observe a short-duration pulse that would
otherwise not be seen on the logic 1 and 0 LED's. A small sub-miniature slider switch SW-2 across the R8 22K resistor with a 100 ohm R7 to limit the current to pins 6 and 7 can be used to keep this "pulse" LED feature on permanent enough after a "pulse" occurs to confirm the existence of the pulse. In operation, for a logic ' 0 ' input signal, both the ' 0 ' LED and the pulse LED will come 'ON', but the 'pulse' LED will go off after about 190 mSec. The logic levels are detected via resistor R1 (1K), then amplified by Q1 a NPN, Silicon transistor Q1 set as a pre-amplifier and driver and selected by the 7400 IC for what they are. Diode D1 is a small signal diode to protect the 74LS7400 and the LEDs from excessive "inverse voltages" during capacitor discharge. For a logic ' 1 ' input, only the logic ' 1 ' (red) LED will be 'ON'. With the switch SW-2 closed, the circuit will indicate whether a negative-going or positive-going pulse has occurred. If the pulse is positivegoing, both the ' 0 ' and 'pulse' LED's will be on. If the pulse is negative-going, the ' 1 ' and 'pulse' LED's will be on.