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You are on page 1of 11

Formal Report

Matthew Clucas and Jacob Moyer

Section: A

Submission Date: 4/25/2014

EE 230 Lab

Formal Report

Circuit Photo

Labeled Circuit:

1: Ground pins

2: Vref input

3: Op Amp Positive Voltage Supply

4: Op Amp Negative Voltage Supply (wired to ground)

5: Vref voltage divider (adjusts voltage to what is needed for LEDs)

6: Green LED comparator

7: Orange LED comparator

8: Red LED comparator

EE 230 Lab

Formal Report

Active Circuit:

EE 230 Lab

Formal Report

Circuit Description

Our stereo amplifier circuit has three main parts: a unity gain buffer, an active high pass

filter, and an active low pass filter.

The unity gain buffer deals with volume control and is meant to provide a voltage to the

filters without disrupting the gain or corner frequency due to changing resistance from

the potentiometer. This part of the circuit begins with a connection to our input voltage

and connects to a 100k potentiometer which is used for volume control. The

potentiometer is connected to the ground and the unity gain buffer circuit. As we adjust

the potentiometer, the voltage going to the unity gain buffer changes and thus changes

our overall output. This allows us to adjust the volume of our stereo amplifier. The unity

gain buffer is there to buffer the voltage we get from the potentiometer without affecting

the resistance of the high pass filter which would change both the gain and the high

pass corner frequency of our circuit.

The high pass filter has 4 resistors r1-r4. The combination of R1 and R2 gave us a

value of 1592.5. The combination of R3 and R4 gave us a value of 25.597 k ohm. We

also had a capacitor in the high pass filter which has a value of 1 microFarad. To filter

any frequency that is not above 100Hz, we made the corner frequency equal to 100 with

the formula:

We also intended for the entire gain for the circuit, which is 20, to be in the high pass

but adjusted the value slightly as this made it easier as a whole for the circuit to be built.

This is because the gain in the low pass later on in the circuit, does not equal 1 exactly.

The gain for this part of the circuit equals:

EE 230 Lab

Formal Report

The low pass filter has 3 resistors r5-r7. R5 has a value of .99k ohms. The combination

of r6 and r7 has a value of 1.041k ohms. There is also a capacitor in parallel with the

combination of r6 and r7, which has a value of 10 nanoFarads. To filter any frequency

that is above 15kHz, we made the corner frequency equal to 15Khz with the formula:

Which came out to be 1.052. Therefore the total gain of the circuit is equal to the gain of

the low pass * the gain of the high pass: 18.59 * 1.052 = 19.93.

Frequency Response

At maximum volume with an input voltage of .3Vpp, this was the graph of our measured

frequency response, with the corresponding data shown below.

EE 230 Lab

Formal Report

Frequency

Output voltage Frequency

Output voltage

10

0.437422

413.20124

4.101198

17073.52648

2.729071

10.974988

0.479511

453.487851

4.119326

18738.17423

2.58077

12.045035

0.52943

497.702356

4.134641

20565.12308

2.429574

EE 230 Lab

13.219411

14.508288

15.922828

17.475284

19.179103

21.049041

23.101297

25.353645

27.825594

30.538555

33.516027

36.783798

40.370173

44.306215

48.626016

53.366992

58.570208

64.280731

70.548023

77.426368

84.975344

93.260335

102.3531

112.3324

123.28467

135.30478

148.49683

162.97508

178.86495

196.30407

215.44347

236.44894

259.50242

284.80359

312.57159

343.04693

376.49358

Formal Report

0.579418

0.6347

0.694613

0.759777

0.830573

0.907454

0.990718

1.080499

1.177283

1.281211

1.392199

1.510039

1.635189

1.766398

1.903587

2.045596

2.191614

2.340165

2.489592

2.638335

2.784853

2.926954

3.063484

3.192974

3.313818

3.426064

3.528216

3.620517

3.703306

3.776477

3.840859

3.897222

3.945849

3.987658

4.023105

4.053571

4.079398

546.227722

599.48425

657.933225

722.080902

792.482898

869.749003

954.548457

1047.615753

1149.756995

1261.856883

1384.886371

1519.911083

1668.100537

1830.73828

2009.233003

2205.13074

2420.128265

2656.087783

2915.053063

3199.267138

3511.191734

3853.528594

4229.242874

4641.588834

5094.138015

5590.810183

6135.907273

6734.150658

7390.722034

8111.308308

8902.150854

9770.099573

10722.67222

11768.11952

12915.49665

14174.74163

15556.76144

4.147197

4.157387

4.165762

4.172439

4.177602

4.181595

4.184189

4.186085

4.186429

4.185609

4.184244

4.181858

4.177718

4.172869

4.166517

4.15871

4.149335

4.137237

4.122958

4.105947

4.085836

4.062052

4.034268

4.001315

3.963169

3.91868

3.867213

3.808316

3.741278

3.66529

3.579747

3.484744

3.380109

3.265805

3.142677

3.011259

2.873223

22570.1972

24770.76356

27185.88243

29836.4724

32745.49163

35938.13664

39442.06059

43287.61281

47508.10162

52140.08288

57223.67659

62802.91442

68926.12104

75646.33276

83021.75681

91116.27561

100000

2.276868

2.124153

1.972836

1.824162

1.679144

1.538341

1.402288

1.271496

1.146129

1.026331

0.912267

0.804322

0.703161

0.609383

0.523976

0.447391

0.379898

Now we need to check if our corner frequency and gain meets the requirements.

To calculate the corner frequency we multiply the maximum output by (2^(.5))/2

or just .7071. The maximum output on the graph occurs at 1149 Hz and is 4.186429

Volts rms, so the corner frequencies will be when the output voltage is .7071 *

7

EE 230 Lab

Formal Report

4.186Vrms = 2.960Vrms. On the low end of the graph, the two frequencies that have

outputs closest to 2.96Vrms are 93.3 Hz and 102.4 Hz. We were required to achieve an

actual corner frequency of 100 Hz (~ 5%) for the high pass frequency meaning that the

actual corner frequency would have to be between 95 and 105 Hz. Our frequencies are

quite close to 100Hz and do meet the required 5% goal. On the high end of the graph,

the two frequencies that have outputs closest to 2.96Vrms are 14,174 Hz and 15,556

Hz. We were required to achieve an actual corner frequency of 15 kHz (~ 5%) for the

low pass frequency meaning that the actual corner frequency would have to be between

14,250 and 15,750 Hz. Assuming that our actual corner frequency is close the middle

point between our two closest frequencies, which is 14,865 Hz, then our corner

frequency is well within 5% and meets the requirements.

To calculate our gain we need to divide our output by the input. We already know

our maximum output to be 4.186Vrms and we measured our input, after the

potentiometer so it is what the actual circuit input is instead of the full input that is

modified by our potentiometer for volume control, to be .2146Vrms. So our gain turns

out to be 4.186/.2146 = 19.506. Our required gain was to be 20 +-1 meaning that our

gain had to be between 19 and 21, which 19.506 is, so our gain met the requirements.

Now we need to verify that this still works for a lower volume setting, otherwise it would

not really be a volume controlled stereo amplifier. On the next page is a graph of the

frequency response with the potentiometer that we use to control the volume at close to

half resistance.

EE 230 Lab

Formal Report

EE 230 Lab

Formal Report

This graph closely matches the shape of the previous graph except that the maximum

output is just under 2 or about half of what our output at max volume, which is what we

expected and wanted. This shows that our volume control works and would lower the

volume without distorting the sound.

Comments

We faced a few issues when we were building our circuit. The first and most

problematic issue we faced was that the initial equation we used for the active high pass

filters corner frequency was wrong. The equation we used, which we obtained from the

online notes:

This caused us to have troubles with the active high pass filter, but because the two

filters corner frequencies are independent of each other, the active low pass filters

corner frequency remained constant. After many different trial and error attempts to

correct our corner frequency, we discovered that the corner frequency equation was

wrong and that it actually depended on R1. We then corrected the problem and had

both corner frequencies within 5% of their desired values.

Another issue we faced was measuring the correct gain for our circuit. At first, we

would follow the equations and get a value that seemed very far off from what it should

be and eventually we discovered that we had been using different units for our gain

calculations. We had been measuring the input as Vpp and our output with Vrms. Once

we realized this we quickly changed how we measured the input and our gain was

correct.

10

EE 230 Lab

Formal Report

Conclusion

In lab we decided to build a stereo amplifier circuit. To do so, we connected a unity gain

buffer, an active high-pass filter, and an active low-pass filter. This method gave us an

actual gain of 19.506 and corner frequencies within 5% of 100 Hz and 15 kHz. The

overall design used two circuits, and one LMC660 chip for each circuit.

We also gained some experience with debugging circuits. We found one of the

equations we were using for the corner frequency was incorrect, and that the function

generator outputs Vpp while the multi-meter defaults to reading Vrms.

After fixing our bugs we saw that the circuit worked as intended. We also found that the

circuit itself was fairly straight forward and not too difficult to design, and that the biggest

problems we faced were simply debugging issues.

11

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