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11/14/2014

Design of 8 : 1 Multiplexer Using When-Else Statement (VHDL Code). ~ VHDL Programming

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Design of 8 : 1 Multiplexer Using When-Else


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Output Waveform : 8 : 1 Multiplexer

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VHDL Code-

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--------------------------------------------------------------------------------- Title
: multiplexer8_1
-- Design
: vhdl_test
-- Author
: Naresh Singh Dobal
-- Company : nsd
---------------------------------------------------------------------------------- File
: 8 : 1 multiplexer using when else.vhd

library IEEE;
use IEEE.STD_LOGIC_1164.all;
entity multiplexer8_1 is
port(
din : in STD_LOGIC_VECTOR(7 downto 0);
sel : in STD_LOGIC_VECTOR(2 downto 0);
dout : out STD_LOGIC
);
end multiplexer8_1;
architecture multiplexer8_1_arc of multiplexer8_1 is

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Design of 8 : 1 Multiplexer Using When-Else Statement (VHDL Code). ~ VHDL Programming

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dout <= din(7) when (sel="000") else


din(6) when (sel="001") else
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din(4) when (sel="011") else
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din(3) when (sel="100") else
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