.

STM32

1.
1.1. Cortex
1.2. STM32
1.2.1.
1.2.2.
1.2.3.
1.2.4.
1.2.5. Performance Line Access Line
2. Cortex
2.1. ARM
2.2. Cortex Cortex
2.3. Cortex
2.3.1.
2.3.2.
2.3.2.1. XPSR
2.3.3.
2.3.4. Thumb-2
2.3.5.
2.3.6.
2.3.7. "Bit Banding"
2.4. Cortex
2.4.1.
2.4.2.
2.4.3.
2.4.4.
2.4.5.
2.4.5.1.
2.4.5.2.
2.4.5.2.1.
2.4.5.2.2.

2.4.5.2.3.
2.4.5.3.
2.4.5.3.1.
2.5. ,
2.5.1.
2.5.2. CoreSight
3.
3.1.
3.2.
3.3.
3.3.1.
3.4.
3.4.1.

3.4.2.
3.4.3.
3.4.4.

3.4.5.
3.4.6.
4. STM32
4.1
4.2.
4.2.1. (PLL)
4.2.1.1.
4.2.2. Flash
4.2.3.
5. -
5.1.
5.1.1. -
5.1.1.
5.1.2.
5.1.2.
5.1.3.
5.1.3.1.
5.1.3.2.
5.1.3.3.
5.1.3.4.
5.1.3.4.1.

5.1.3.5.
/
5.1.3.6.

5.1.3.7.
5.1.3.8.

5.1.3.9.

5.1.4.
5.1.4.1.
5.1.4.1.1. /
5.1.4.1.2.
5.1.4.1.3. -
5.1.4.1.4.
5.1.4.1.5.
5.1.4.1.6. -
5.1.4.1.7.
5.1.4.2.
5.1.4.2.1.
5.1.4.2.2.
5.1.4.3.
5.1.5.
5.1.6.
5.2.

5.2.1. SPI
5.2.2. I2C
5.2.3.
5.3. AN USB
5.3.1. CAN-
5.3.2. USB
6.
6.1. RUN
6.1.1.
6.2.
6.2.1. SLEEP
6.2.2. STOP
6.3. STANDBY
6.4.
6.5.
7.
7.1.
7.2.
7.3.
7.4.
7.4.1.
7.4.2.
7.5.
7.5.1.
7.5.2.
7.5.3.
8. Flash
8.1. Flash
8.2.
8.3.
8.3.1.
8.3.2.
8.3.3.
9.
9.1.
9.2.
9.3.

1.
-
ARM7 ARM9
. ,
240 ARM-.
ST Microelectronics, STM32 ,

, ARM Cortex-M3.
.
,
.

1.1. Cortex
ARM Cortex - ,
.
ARM, Cortex
, .
Cortex : A
, R - M
.
STM32 Cortex-M3,
, , ,
. ,
8 16- . ARM7
ARM9 ,
(SoC).
, ..

. Cortex-M3
, ,
( .. , SysTick,
). 4 Cortex-M3
, ,
- . ARM7, Cortex-M3
, , ,
. Cortex
(unaligned data),
ARM.
. Cortex
1
bit banding.
, ,
.

 STM32 Cortex-M3.
, 32- , ,
, .

Cortex-M3
().
Cortex- .
240 ,

 .
.

12 .
, .
,

6 . ,
,
.
Cortex-M3 .

.

.
, Cortex-M3 ,
32- , , :
(Thread) (Handler),
. ,

(). Cortex 24-
,
. ARM7 ARM9
(32- ARM 16- Thumb), Cortex
ARM Thumb-2. 16- 32 , 32-
ARM , 16- Thumb.
Thumb-2 - , C/
C++. , Cortex-
.

1.2. STM32
STM32 ST
4 ARM7 ARM9,
STM32
. STM32,
,
8- .
STM32 14 , :
Performance Line,
72 , Access Line ( 36 ).
.
Flash 128 , - 20 .
STM32
Flash ,
.

 STM32 . Performance Line

72 , Access Line 36

1.2.1.
, .. , ,
I2C, SPI, CAN, USB (),
. ,
, . , 12-
,
.
, ,
, , ,
. (advanced timer)
. 6

- ,
-
. SPI CRC 8 16 ,
Flash SD MMC.
, STM32 7-
().
8/16
32- .
, .

. ,
,
.
STM32
.
2- 72 , ,
, , 36
. Cortex ,
2 STANDBY.

RC- 8 .
.
.

1.2.2.
,
, ,
. STM32.
, , ..
,
. (windowed
watchdog).
. ,
. .
,
. ,

RC- 8 .

1.2.3.


. , Flash STM32
.
- Flash ,
.
Flash . STM32
,
.
.

.

1.2.4.
, ARM-,

Thumb-2 Cortex. ,
, . ST
, USB-,
ANSI C ,
STR7 STR9.
. Cortex
,
(TCP/IP, ..).
Cortex-M3
CoreSight. CoreSight Debug Access
Port (DAP ), ,
JTAG 2- . CoreSight,
,
(data watchpoint)
(instrumentation trace).
.

.

1.2.5. Performance Line Access Line

STM32 : Performance Line Access Line.
Performance Line
72 . , Access Line
32 . ,

. ,
.

2. Cortex
, Cortex
ARM. ,
ARM,
( Cortex )
"" .
, Cortex .
Cortex. :
Cortex-A - ()
. ARM, Thumb
Thumb-2.
Cortex-R - .
ARM, Thumb Thumb-2.
Cortex-M - ,
.
Thumb-2.
, Cortex,
, 1 , 8 -
.
- . STM32
Cortex-M3.

2.1. ARM
ARM ,
. ( : ARMV6, ARMV7 ..).
Cortex M3 - ARMV7M.

 Cortex-M3 ARMV7
Thumb-2

, Cortex-M3
Cortex-M3 ARMV7M.
ARM .

2.2. Cortex Cortex

Cortex
RISC , Cortex
Cortex, .
Cortex, Cortex.

2.3. Cortex
Cortex 32- RISC .
ARM7/9, , ,
,

 - .

2.3.1.
Cortex .
ARM7 ARM9, .

Cortex-M3, ARM7/ARM9, .
Cortex-M3

, - , . , ,
, , ,
. ARM7 ARM9
.
, Cortex
. ,
, ,

. , ..

.
, - ,
Cortex -
.

2.3.2.
Cortex RISC-, /
.
,

 , ,
.

Cortex-M3 /. ,
, .
,
. 32- .
R0-R12 - ,
. R13-R15 Cortex.
R13 . ,
Cortex ,
.
(),
"" . Cortex
: .
R14 .
. , Cortex
. ,
R14 . R15 -
; ,
.

 Cortex-M3 , 16 32- .
ARM7/9 R13 . R14 - ,
R15 - . R13 , Cortex-M3
:

2.3.2.1. XPSR
, ,
. ,
. xPSR
, Cortex.

, .
: ,

xPSR ,
. ( )
. N, Z, C, V

( (N) (Z) , (C)

(V))
. Q
()
. 32-
ARM, Thumb-2

. ,
NOP ( ).
. Cortex
,
268 xPSR. : "If then" (IT),
Thumb.
Thumb-2
'if then'. , IT
.
- ,
NOP. :
If (r0 ==0)
CMP r0,#0 r0
ITTEE EQ ,
Then r0 = *r1 +2;
LDR r0,[r1] r0
ADDr0,#2 2
, Thumb-2 ,
(, /)
. Cortex ,
.

,
. , ,
/ .
Thumb
ARM. , ARM
Thumb. Cortex-M3 . ,
.

2.3.3.
, Cortex ,
,
. Cortex

: Thread ( ) Handler ( ).
Thread ,
Handler .
, Cortex
. ,
,
(, MRS MSR, xPSR
).
Cortex.
. (R13) Thread
Handler. , Handler
( R13).

Cortex-M3 ('flat'),
. Handler
Thread ( )
Cortex

(Thread)

( )

(
- )

Handler
-

Thread
-

Cortex 'flat'.
, Thread Handler, ,
.. - .
Thread Handler .
, ,
- . ,
,
: Handler (
)
Thread

. ,
, , .

2.3.4. Thumb-2
ARM7 ARM9 : 32- ARM 16 Thumb. ,

: 32- , , 16, . Cortex
Thumb-2, 16- 32- . thumb-2
26% 32- ARM
25% 16- Thumb.
Thumb-2 ,
, , 2..7 .

Cortex 1.2 DMIPS/

, 1.2

16 16

32

32 16

32

32 32

32

32 32

64

37*

Thumb-2
, .. ; if/
then ;
. RISC-, Cortex
, . Cortex-M3
ANSI ANSI ,
,
.

2.3.5.
Cortex-M3 ,
, .
, 4 .
1
.
I-Code. , Dcode. ,
, ,
.
,
, Flash , .
0.5 - .
.
1 .
bit banding. , , ,
, . 2
. 0.5
Cortex
Cortex. Cortex
Cortex-. ,
STM32 Cortex-
.
Cortex-M3 4 ,
,
, -, ,

Cortex. Cortex-

2.3.6.
ARM7 ARM9
, . ,

, 8- 16- .
ARM ,
.

. (
25%.)

Cortex-M3 ,

Cortex , ,
. ,

. , Cortex bit banding
,
.

2.3.7. "Bit Banding"

ARM7 ARM9
AND OR.
- - .


.

bit banding
Cortex-M3

 ,

, . ,
, bit banding,
, -
. Cortex :
( 1 )
, 32 .

. ,

.

Bit Banding ( 1 ),
STM32

, , , ,

Cortex . ,
,
.
:
=
+ ,
=
0x20 + 4
, .
.
- () -.

 - 0x40010C0C. ,
8 .
:
= 0x40010C0C
= 0x40000000
= 0x42000000

= 0x40010C0C - 0x40000000 = 10C0C
= (0x100 x 0x20) +(8x4) =
0x2181A0
= 0x42000000 + 0x2181A0 = 0x422181A0
-:
#define PortBbit8 (*((volatile unsigned long *) 0x422181A0 ))
, :
PB8 = 1; //
:
MOVS r0,#0x01
LDR r1,[pc,#104]
STR r0,[r1,#0x00]
:
PB8 = 0; //
:
MOVS r0,#0x00
LDR r1,[pc,#88]
STR r0,[r1,#0x00]
, 16-
. STM32, 72 ,
80 . ,
"" ""
:
GPIOB->ODR |= 0x00000100; //
LDR r0,[pc,#68]
ADDS r0,r0,#0x08

LDR r0,[r0,#0x00]
ORR r0,r0,#0x100
LDR r1,[pc,#64]
STR r0,[r1,#0xC0C]
GPIOB->ODR &=!0x00000100; //
LDR r0,[pc,#40]
ADDS r0,r0,#0x08
LDR r0,[r0,#0x00]
MOVS r0,#0x00
LDR r1,[pc,#40]
STR r0,[r1,#0xC0C]
, / 16 32- , 14
180 . , ,
/ ,
, bit banding
, , .

2.4. Cortex
2.4.1.
Cortex-M3 ,
. Dcode
Icode, .
0x00000000 - 0x1FFFFFFF.
,
0x20000000-0xDFFFFFFF 0xE0100000-0xFFFFFFFF.
Cortex ,
(Private Peripheral Bus, PPB).

2.4.2.

, .
Cortex
, , , .
(, Cortex )
, ,
, , .
, Cortex,
.
.

2.4.3.
Cortex 24-
. SysTick
Cortex-.
SysTick
.
SysTick,
Cortex-M3,
. CLKSOURCE, SysTick
. ,
, 1/8 .

SysTick - 24- - ,
Cortex-M3.

SysTick .
.
ENABLE,
, TICKINT, .
Cortex
SysTick
STM32.

2.4.4.
Cortex
ARM
. ARM7 ARM9 :
.
.
, ,

 .
ARM7 ARM9 . -,
, .. ,
. ,
,
. -, ARM7 ARM9

. , ,
Cortex,
,
.

2.4.5.
()
Cortex. , Cortex-
, .
,
, ,
. ,
.
: , Thumb-2,
, , /
, .
, .
, , ,
STM32 16 .

- , ANSI, .

STM32 ,
240

, Cortex,

 ,
, .
240 ,
. Cortex 15
,
Cortex.
STM32 43.

2.4.5.1.
, Cortex
. Cortex ,
. ,
.
.
,
12 .

12 .
,

,
. , ,
Cortex CPU. , R0 - R3.
, ,

. - R12.
. ,
, ,
R12.

 :
, , ,
, 12
.

2.4.5.2.
,
,
.
,

.

2.4.5.2.1.
,
. ,
, 12
.
,
.

2.4.5.2.2.

, ,
, Cortex
,
.

, 12

 . ,
, Cortex
. ,
. ,
6 .

. , 12
.
,
,
6 . ,
7-18 .

,
, 7-18

2.4.5.2.3.
,

. ,

. 6
,
.

 ,
, ,

6 .

2.4.5.3.
.
.
.
, , .

2.4.5.3.1.
Cortex .
, 0x00000004, ..
.
,
,

Reset

-3 ()

NMI

-2

Hard Fault

-1

MemManageFault

BusFault

AHB

UsageFault

7-10

Reserved

N.A.

N.A.

11

SVCall

12

DebugMonitor

,
,

13

Reserved

N.A.

N.A.

14

PendSV

15

SYSTICK

16

.......

................................

....................

................................

256

240

247

240

4
. 15 -
, Cortex.
, , ,
SysTick.
Thumb-2 ,
. 16 ,
. .

:
AREA RESET, DATA, READONLY
EXPORT __Vectors
__Vectors DCD __initial_sp
;
DCD Reset_Handler
;
DCD NMI_Handler
;

DCD HardFault_Handler ; HardFault

DCD MemManage_Handler ;
DCD BusFault_Handler ; BusFault
DCD UsageFault_Handler ; UsageFault
DCD 0
;
DCD 0
;
DCD 0
;
DCD 0
;
DCD SVC_Handler
; -

DCD DebugMon_Handler ;

DCD 0
;
DCD PendSV_Handler
; PendSV
DCD SysTick_Handler
; SysTick
, SysTick,
:
void SysTick_Handler (void) { }
,
, SysTick.
, : ,
.
.

Cortex-M3

Cortex
,
- IRQ. SysTick

 Cortex , ,
.
. , ,
tSysTick, ,
. SysTick

:
SysTickCurrent = 0x9000;
SysTickReload = 0x9000;
SysTickControl = 0x07;

// SysTick
//
//

Cortex
. Reset, NMI hard
fault . ,
.
,
. STM32 16 , ,
4 . ,
.
IRQ.
.
32- .
.
,
.

 , , . STM32
16

16 .
8- .
. STM32 , ..
16 . ,
.
16 , 0 - , 15
- .
. ,
PRIGROUP
.

PRIGROUP .

PRIGR
OUP (3
)

(.)

011

4.0

16

100

3.1

101

2.2

110

1.3

111

0.4

16

PRIGROUP 4-
. , PRIGROUP 3
4 . ,
.
, .. , ,
. ,

.
Cortex.
,
:
DCD
ADC_IRQHandler ;
void ADC_Handler void { }

:
ADC1->CR2
= ADC_CR2;

ADC1->SQR1
= sequence1;
ADC1->SQR2
= sequence2;
ADC1->SQR3
= sequence3;
ADC1->CR2
|= ADC_CR2;
ADC1->CR1
= ADC_CR1;

GPIOB->CRH
= 0x33333333;
NVIC->Enable[0] = 0x00040000;

//
//
//
//
// ,
//
//

NVIC->Enable[1] = 0x00000000;

2.5. ,
STM32
. , Cortex,
. Cortex SLEEP,
Cortex .
,
Cortex STM32 .

2.5.1.
Cortex SLEEP WFI
( ) WFE ( ).
WFI, Cortex
.
.
. ,
SLEEPON EXIT , Cortex
SLEEP.

,
, , -
, SLEEP.
WFE Cortex ,
SLEEP.
. -
, .
, Cortex
, .
WFI WFE ,
Thumb-2 ,
, -:
__WFI
__WFE
SLEEPNOW SLEEPONEXIT, Cortex
SLEEPDEEP .

 SLEEP Cortex. STM32

,
Cortex DeepSleep

,
, STM32
.

2.5.2. CoreSight
ARM . ARM7
ARM9, , JTAG,
, Flash
. JTAG
( , .)
. ,
(ETM), ARM7
ARM9 .
, ,
. ARM , JTAG
,
. ,
. - ARM7 ARM9
,
( ).
, - ,
ETM. ,
. Cortex
, CoreSight.

 CoreSight JTAG Serial Wire.

.
, STM32
. JTAG

CoreSight DAP-,
JTAG .

5- JTAG 2- Serial Wire.
JTAG , CoreSight
Data Watch ETM.
Flash (FLASH patch). STM32
CoreSight,
ETM. , STM32
CoreSight, JTAG ,
- . CoreSight

 STM32 8 ,
Cortex ,
. CoreSight
, Cortex .
.
, STM32
CoreSight . ,

Cortex. CoreSight
STM32
ARM7 ARM9 , ,
.

3.
STM32 .
STM32 RC- , ,
.
,
.

3.1.
Access line
Performance line . ,

. STM32 LQFP 48
144.

3.2.
STM32
2.03.6. Cortex 1.8
. STM32
.
,

(deep power down). ,
VBAT VDD.

 STM32 2.03.6. ,
, ,
( 144- )

.
, VDD 2.43.6.
100-
() , VREF+ VREF-. VREF- VDDA,
VREF+ 2.4 VDDA.
.
, .

3.3.
STM32 ,
, VDD 2.0 ( 40 ).

(POR) (PDR)
.

3.3.1.

 , STM32,
nRST
. nRST JTAG.
. STM32
,
( ,
).

3.4.
STM32 RC-,
. ,
72 . , ,
, ,

3.4.1.

STM32. (HSE-).
/
.
, , , ,
50%-, 25.

/ ,
4..16 .
72 , ,
. ,
HSE- .

3.4.2.
STM32 ,
(LSE-).
. HSE-, LSE
- , ,
50%. LSE-
32,768 , .

, ,
LSE-.

3.4.3.
- , (MCO).
, MCO
.
.

3.4.4.

. BOOT0 BOOT1.
,
. Flash ,
. ,
STM32
, Flash
.

3.4.5.
BOOT0 GND.
,
.

,
2 . Flash ,
2 .

.
1, ,
, - RS232.

3.4.6.
.
STM32. Cortex CoreSight
: 5- JTAG 2-
Cortex. -
. Cortex
, .
, -,

. 5- JTAG 20- IDC
JTAG-
. A_13
_14 .

4. STM32
STM32 Cortex, Flash
. Cortex
AHB.
AHB, .
APB.
AHB . AHB
, Cortex. , AHB
, ,
. , APB2
72 ,
APB1 36 . ,
Cortex, . ,

, APB1 APB2. ,
,
2/3 1/3 Cortex.

 Cortex

4.1
, STM32 ,
4 .
STM32 Cortex,
. 0x00000000.
0x20000000.
. ,
0x40000000, .
, Cortex ,
0xE0000000.

STM32 Cortex. 2
Flash , ,

 Flash . - Flash
- 0x0000000. ,
. Flash
4 ,
. , 0x1FFFF800,
. ,
STM32.
USART1
Flash .
STM32 , BOOT0 BOOT1
, .
, 0x00000000.
, STM32, Flash
, .
Flash
,
ST. DLL-,

.
0x00000000 Flash
.
,
.
, Flash
.

4.2.
, STM32 RC-.
Cortex
, 8 .
- 32,768 .

.

 STM32
, .

Cortex
.

. , STM32 72
.
8 .

. ,
Cortex 72 ,
. ,
( RCC).

4.2.1. (PLL)
HSI-.
.
STM32 HSE-
.

STM32 .

RCC->CR |= 0x10000; // HSE

// HSE-
while(!(RCC->CR &0x00020000)) { };
RCC_Control.
. ,
, .

, RCC_PLL_configuration.
8 ,
72 9.
,
.
,

 Cortex.

HSE- .

// HSE- 9
RCC->CFGR = 0x001D0000; //
RCC->CR |= 0x01000000;
while(!(RCC->CR & 0x02000000))
{
; }
//
RCC->CR |= 0x00000001;
//
RCC->CFGR |= 0x005D0402;

4.2.1.1.
Cortex
72 .
, AHB APB.

// AHB,APB1 APB2
RCC->AHBENR = 0x00000014;
RCC->APB2ENR = 0x00005E7D;
RCC->APB1ENR = 0x1AE64807;
// APB1 APB2
RCC->APB2RSTR= 0x00000000
RCC->APB1RSTR= 0x00000000;

4.2.2. Flash
STM32, ,
Cortex-M3 Flash
I-Bus. , , ,
(72 ).
, Cortex ,
Flash 1.3 .
STM32 8, ,
Flash .
Flash
(35 ), Cortex
. 72
, Flash ,
64- . 64 Flash 16- 32-
Cortex.
Thumb-2 Cortex.
, -
Flash .
, Flash
.

 Flash . ,
,
8 Flash .
:
0< SYSCLK
24< SYSCLK
48< SYSCLK

<24 0
<48 1
<72 2

Flash Cortex.
, , ,
.

4.2.3.
,
Cortex,
. STM32
, ,
, . -
- .
,
. ,
.
FIFO,

. STM32
,
.

- . 5 ,
- 1

, , :
, , .
, , 1 . (
, ) 3
. Cortex ,
, .. .
,

 .
.
.
,
.

.
.

,
.
,
,
. ,
, . ,
.

. -
, 60% ,
. , ,
Cortex I-code

-
, ,
5 .
,

- ,

 Cortex. ,
40%
. - -
.
AHB ,
APB 2
2 AHB.
. ,
SPI SPI,
. ,
SPI . = SPI (APB) + .
(AHB) + (AHB) = (2 APB + 2 AHB) +
2 AHB + 1 AHB = 2 APB + 5 AHB
, , ..
Cortex I-Bus.

, , ,
.
.
AHB .
RCC->AHBENR |= 0x00000001; //
.
. (
). " ",
- .


: ,

: "
", "", "" "".
. , 32-
(3 ) , 8-
( 35 64, 8 .)
. , ,
.
, - - ,
, . 14
- . ,
, ,
. , , .
- :
DMA_Channel1->CCR = 0x00007AC0;
// -
DMA_Channel1->CPAR = (unsigned int)src_arry; //
DMA_Channel1->CMAR = (unsigned int)arry_dest;
DMA_Channel1->CNDTR = 0x000A;
//
TIM2->CR1 = 0x00000001;
//
DMA_Channel1->CCR |= 0x00000001;
// -
while(!(DMA->ISR & 0x0000001))
//
{;}
TIM2->CR1 = 0;
//
TIM2->CNT = 0;
//
TIM2->CR1 = 1;
//
for(index = 0;index <0xA;index++)
// ,

{
arry_dest[index] = arry_src[index]; }
TIM2->CR1 = 0; // }

 -.

10
: ,
Cortex. ,
.
220 , - 536.

, , .
, -. ,
-

, -
, ,

. ,
. ,
. ,
. ,
10-
. ,
.
,
-,
.

STM32 - .
.
,

,
, .
, ,
.
, , ,
, .
, ,
, , .
.
, ,
. , SPI
.

5. -
(),
STM32. :
. STM32
.
,
. ,

 , .

5.1.
STM32 -
() , , -
, ,
( )
.

5.1.1. -
STM32 80 -.
- 5 16 - .

- -
.
16

A..E 5.
-
, , I2C. , 16
-.

 , ,
.

32- .
64- . 64 4-
, -.
, 4- 2- 2-
. ,
: ,
:
,
;
, , ,
. :
2, 10 50 .

CNF1

CNF0

MOD1

00

( )

MOD0

00:
01: 10
10: 2
11: 50

, .
.
.
.
, 16
1, 0, 1. .
,
. 0, 1
. -
.
Cortex "bit banding"
,
. / - 32- . 16
. 1
-. , 1
16 -.
- . 16-.
1 -.
, "bit banding"
-
STM32
-.

5.1.1.
-
.
, -
.

, -

STM32
. (,CAN, , I2C SPI)
- ,
. ,
.
JTAG-. , JTAG
. JTAG
,
- .

5.1.2.
Cortex ,

,
. ,
STM32.
SEV Thumb-2.
, .
. -,
.

5.1.2.
19 ,
. 16
,
. ,
USB
.
(EXTI) 0-4, , USB.
EXTI , 5-9 10-15,
.
STM32.
, ,
, STOP,
. EXTI , Wait
, Wait .

 STM32 16 ,
-

16 EXTI -
. .
, EXTI.
EXTI ,
, EXTI0 0 A, B, C, D E.
.
EXTI ,
.
//
AFIO->EXTICR[0]
= 0x00000000;
//
EXTI->IMR
= 0x00000001;
//
EXTI->EMR
= 0x00000000;
//
EXTI->FTSR
= 0x00000001;
//
EXTI->RTSR
= 0x00000000;
//
NVIC->Enable[0]
= 0x00000040;
NVIC->Enable[1]
= 0x00000000;

 STM32 16 , . ,
/

EXTI,
.
EXTI
.

5.1.3.
, STM32
- . ,
2.43.6.
()
, . 12-
1. 18
, 16
.
.

 STM32 12- 1

5.1.3.1.

. 8
1.5 239.5 .

.
, .
( 16 ).
, ,
.

1- (EXTI 1). ,
. ,
,

.

() ,

, ,

. 12- 16-
.

12- 16-

1 ,
.

.
,
,
, ,
-
, .

 ,
.

.
,
.
, ,
,
.
,
.
, ,
.

16- ,
.
- ,
. ,

5.1.3.2.
,
,
(
, ).

, .
,
.

5.1.3.3.

: ,
,
.
.

ADC1->CR2
= 0x005E7003;

ADC1->SQR1
= 0x0000;
1
ADC1->SQR2
= 0x0000;
ADC1->SQR3
= 0x0001;
ADC1->CR2
|= 0x005E7003;
ADC1->CR1
= 0x000100;
,

//
//
// 0
//
//

//
NVIC->Enable[0] = 0x00040000; //
NVIC->Enable[1] = 0x00000000;

-.
void ADC_IRQHandler (void) {
GPIOB->ODR = ADC1->DR<<5; //
}
,
.
DMA_Channel1->CCR

= 0x00003A28;

// ,

//

// -
DMA_Channel1->CPAR
= (unsigned int) 0x4001244C;
//
DMA_Channel1->CMAR
= (unsigned int) 0x40010C0C;
DMA_Channel1->CNDTR = 0x1;

DMA_Channel1->CCR |= 0x00000001;

//
//

.
ADC1->CR2 |= 0x0100;

5.1.3.4.
STM32, ,
.
, ..
,
. ,
STM32 ,
.

2 1,
.

5.1.3.4.1.

.
, ,
.

5.1.3.5.
/

 ,
, .

5.1.3.6.

 ,
, 1
.

2.
14
.
.

5.1.3.7.

1
1, -
2.

5.1.3.8.


. ,
, - .

5.1.3.9.

, - .

5.1.4.
STM32 . 1 - ,
.
. ,
.
,
.

5.1.4.1.
16- ,
16- .
. ,
( , ).
.

 : ,
;
, /.

STM32 16- , 16-

4- /.
,

,
/. ,
, .
.

5.1.4.1.1. /
/ .
, . ,
,
-,
. , ,
-, .

5.1.4.1.2.
4 ,
. ,
16- /.
, . ,
-.

.
-

5.1.4.1.3. -

-, ..
.

-
-
M3->CR1
TIM3->PSC
TIM3->ARR
TIM3->CCMR1
TIM3->CCER
TIM3->CCMR1
TIM3->CCER
TIM3->SMCR

TIM3->CCER
TIM3->CR1

= 0x00000000;
= 0x000000FF;
= 0x00000FFF;
= 0x00000001;
|= 0x00000000;
|= 0x00000200;
|= 0x00000020;
= 0x00000054;

|= 0x00000011;
= 0x00000001;

//
// . .
// . .
// IC1 TI1
//IC1
// IC2 TI1
//IC2
// TI1FP1 ,
//
//
//

-
.
( -) .
- ,
.


-.

5.1.4.1.4.

,
.

. .
.
.

5.1.4.1.5.
STM32 4 .
,
16- , /.

/ , , -.

 ,
CAP/COM

5.1.4.1.6. -
,
-.
.
/ . ,
-. ,
, 16 -.

-
. ,
. /

-. ,
, , -
. /
, .

TIM2->CR1
TIM2->PSC
TIM2->ARR
TIM2->CCMR1
TIM2->CCR1
TIM2->CCER
TIM2->DIER
TIM2->EGR
TIM2->CR1

=
=
=
=
=
=
=
=
=

0x00000000;
0x000000FF;
0x00000FFF;
0x00000068;
0x000000FF;
0x00000101;
0x00000000;
0x00000001;
0x00000001;

//
// . .
// . .
//
//
// 1
//
//
//

5.1.4.1.7.
,
. , ,

. , , ,
- (
) .
.

5.1.4.2.
1.
, .
.

 , 6- -.
,

. ,
.

, .
.

,
.

5.1.4.2.1.
-

.
,
. ,

-
STM32 .

5.1.4.2.2.

, .. ,
,
.
1 " ". ,
,
.
, . ,
, ,
.

5.1.4.3.
,
.
,
-
.

 , ,
/

,
. , 1 2 (TI1FP1
TI2FP2) .
.
.

, - .
,
. ,
. ,
.

5.1.5.
STM32 : ,
. 16-
, .
- 10 ,
, STM32
.

, ,
STM32 .
STM32 32-
, 32.768 .
,
,
.

(128).
.
: ,
. ,
,
.

,
VBAT, , ,
17- . ,
STM32 . .
, ,
Cortex
STM32. ,

, , ,
.

5.1.6.
16- ,

 .
.
.
( ) .

,
. ,
.

5.2.
16- ,
.
.
.
( ) .

,
. ,
.

5.2.1. SPI
STM32
SPI,
18. , SPI
APB2, 72.
APB1,
36 . SPI

(8 16 ,
). , SPI
, ,
SPI.

 SPI 18.

SPI
:
.
.
SPI, SPI STM32
CRC. CRC , - .
CRC8 CRC16.
SPI
MMC/SD.

SPI CRC, Flash

MMC SD

5.2.2. I2C
STM32
- I2C. I2C
, .
I2C :

 100 400 .
I2C 7- 10- .

. I2C :

. , ,
. ,

.

I2C , SMBus
PMBus.

, I2C
.
, I2C.
I2C STM32
( PEC). , PEC CRC-
.

.
PEC
.
.
PEC

 .
I2C STM32
: SMBus PMBus. SMBus Intel 1995
. SMBus
, .. PEC
BIOS .
SMBus, I2C, PEC,
SMBus. SMN,
host- SMBALERT. PMBus
SMBus .
PMBus ,
.

5.2.3.
,
,
.
.
STM32 3 ,
,
.
4.5 /. , ..
(8 9 ), -,
. APB2,
72 . 36-
APB1.

,
LIN, IrDA -


. ,

. ,
.
, .
,
Tx. ,
,
CTS RTS.

LIN.

.
/ (SIR).
IrDA 115200
/ NRZ-
1.42.2.
-,
ISO 7618-3.

 - IrDA

,
.
, SPI- , 3- .
, SPI
. ,
SPI .

SPI

5.3. AN USB
STM32 - CAN USB.
, , ,

CAN USB. , USB CAN,

, , STM32
512 ,
CAN USB.
. ,
. , CAN USB .
,
.

5.3.1. CAN-
STM32 CAN- CAN-,
CAB 2.0A 2.0B
1 /. CAN-

CAN- TTCAN.
TTCAN
CAN-
.
CAN-
.

CAN CAN 2.0B TTCAN

CAN- - bxCAN, bx
. CAN
, CAN
. bxCAN
CAN.
.
FIFO .

CAN
TTCAN

CAN- - .
CAN ,
. CAN-
.
CAN- CAN-. ,
CAN- ,
. CAN- STM32 14
, CAN-,
.

14 ,

32-
.
.
, ,
. .
3-
11- 29- , RTR

IDE 16- .

, 32-
, - .
, '' ''. ,
.
, FIFO
.

.
CAN- :

. , STM32
SLEEP. bxCAN ,
. bxCAN
CAN.
. ,
. - SILENT.
CAN- ,
.
CAN- . - LOOPBACK.
, .

. .
.

5.3.2. USB
USB, STM32,

 (12 /) USB, , .
, ..
. USB-
,
. USB,
USB
. ST USB .
USB
USB-, .. HID, MASS STORAGE, AUDIO LEGACY
COMMUNICATIONS PORT.

.

USB USB- 2.0

USB 8 ,
, , .

512 , CAN-.
USB,
.

,
.
, . ,
,
- . , ,
, . ,
, .
- ,
, .
512- .
,
.

 ,
.

6.
STM32, ,
RUN
. SLEEP, STOP STANDBY
.
STM32 :
. Cortex ,

. Cortex ,

SLEEPDEEP.
WFI WFE.
, .

.

6.1. RUN
RUN STM32 , ,
.

. ,
. ,
,
, ,
.
, Cortex STM32
72 . ,
30 .
.
.


(RCC).

. ,

 STM32
HSE-.
HSE- HSI-. , HSE-, HSI-
- .
LSI-,
.

6.1.1.
HSE- 8,
Flash
. , ,
, RUN.

34 , 8 (9.6 DMIPS) 1
APB1

APB2

WFI

25
[]

DIV4

DIV2

72

HSE

33.15

DIV8

DIV8

72

HSE

27.75

DIV8

DIV8

72

HSE

23.65

DIV4

DIV2

HSE

8.65

DIV4

DIV2

HSE

8.48

DIV4

DIV2

HSE

1.68

DIV4

DIV2

HSI

0.9

6.2.
RUN,
8.5 . , -
, STM32.

6.2.1. SLEEP
- SLEEP. ,

 Cortex WFE WFI,

. SLEEP,
STM32 . SLEEP ,
. STM32 HSE-
72 , SLEEP
14.4. ,
STM32 ,
, , Cortex,
HSI- (
1 ),
0.5 .
SLEEP 0.14 :

fHCLK

APB

.
.

HSE,

AHB

72

14.4

5.5

48

9.9

3.9

36

7.6

3.1

24

5.3

2.3

16

3.8

1.8

2.1

1.2

1.6

1.1

1.3

1.11

0.98

500

1.04

0.96

125

0.98

0.95

64

12.3

4.4

48

9.3

3.3

36

2.5

24

4.8

1.8

16

3.2

1.2

1.6

0.6

RC (HSI),

AHB

0.5

0.72

0.47

0.56

0.44

500

0.49

0.42

125

0.43

0.41

, ,
SLEEP , .
,
STM32
.
, Cortex, HSI RC, .

6.2.2. STOP
STOP.
SLEEPDEEP
Cortex Power Down Deep Sleep (PDDS)
STM32.

STOP, WFI WFE

Cortex HSI- HSE-. , , , STM32
. SLEEP, STOP
. STOP
, . ,
STOP -.

 , , ,
,
.
(LSI LSE),
STM32 STOP.
STM32 STOP
, RUN, 24 .

. LPDS
STM32. STOP
, 14 .
, 1.4 .

VDD/VBAT=2.4

VDD/VBAT=3.3

..

Run,

RC ,

(
)

NA

24

,

RC ,

(
)

NA

14

.
.

tWUSTOP

STOP
(
RUN)

HSI
RC

3.52

STOP
(
RUN + WFI)

5.42

STOP (
+
WFE)

5.32

STOP (
+ WFI)

7.21

 STOP 5.5
, , 7.3 ,
.

6.3. STANDBY
STM32 STANDBY,
SLEEPDEEP Cortex
Power Down Deep Sleep STM32. ,
WFI WFE STM32
. STANDBY STM32
. HSE- HSI. STM32 2 .
STANDBY 2 ,
50

VDD/VBAT=2.4

VDD/VBAT=3.3

..

NA

1.08

1.4

tWUSTDBY

STANDBY

HSI
RC-

50

STANDBY
( ) STOP.
, STM32
. STANDBY
0 . ,
WKUP EWUP
. STANDBY ,
:
50 . STANDBY
, Cortex STM32 .
STANDBY .

6.4.
.
.
3.3 1.4 .

6.5.
,
, . ,

. ,
. , STM32
HSI-
CoreSight .
STM32 DBG_MCU.

7.
STM32 ,

.
, STM32 ,
, VDD . ,
, .
,
.
HSE-.
, HSI-.

. - ,
. - ,
,
. , Flash
30 85,
.

, -
( ,
, ,
). , STM32
,
,

 . ,

.

7.1.
STM32, , .
STM32 ,
, /
.
RCC, ..
, .

. 1 .

 STM32 .
RCC

7.2.

 STM32
. ( PVD). PVD

2.2 2.9 0.1.
.

,
,

PVD 16- .
,
, PVD
.

7.3.
STM32
Cortex STM32 ,
HSE-.
CSS, .
,
8 .

 , CSS
RC-

CSS
RCC.

CSS
RCC

CSS ,
1,
Cortex.
- -
.

 , Cortex -,
.
.

7.4.
STM32 .
STM32.

(LSI). STM32
.
/
.

STM32 ,

7.4.1.


. ,

0x40 0x3F, .. T6.

,
.
,
, . ,

,

 .
6- ,
PCLK1 12- (
PCLK1 4096). 2 ,
1, 2, 4 8.
6 7 .
,
:
Twwdg = Tpclk1 x 4096 x 2^(WDGTB) x ( + 1)
Pclk1 36 ,
910 , - 58.25 .
,
. ,
-
.

7.4.2.
,
STM32, ,
STM32.
VDD, STOP STANDBY.

12- ,
.
8-

. LSI- 32.768 ,
3060 .
, ,
LSI-, 4256, 2
, .
0.1, 26 .
.

- .
. , Stop
Standby

Flash ,
.
0xCCCC . ,
0xFFF.
0xAAAA.
.
,
. ,
. ,
, . ,
. ,
,
. STM32 MCUDBG

Cortex-M3, CoreSight.
,
.

7.5.

 ,
STM32. ,
, :

7.5.1.
-
. ,
.
. .

7.5.2.
,
.

7.5.3.

.
, -
.

8. Flash
STM32 Flash . Flash , .
64-.
.
Flash 4 . .
10 30-
85C. Flash
25C. , STM32
Flash . ,
:
. 2 Flash
,

1. .
STM32
.

8.1. Flash
Flash
, JTAG
,
Flash (FPEC-). FPEC-
.

FPEC- Flash .

8.2.
, FPEC- .
,
. 0x45670123, 0xCDEF89AB
FPEC-. , FPEC-
.
FPEC-, Flash .
Flash
4 . .
. BSY
, Flash
0xFFFF. .
Flash
,
. -, BSY ,
. Flash
.
, .
Flash , FPEC .

8.3.

.
Flash . ,
,
. .
- Flash ,
. ,
FPEC- . ,
.

Flash .
OPTER , STRT.
BSY.
, OPTPG
Flash .
.
, - .
FPEC-
.

8.3.1.
Flash
.
Flash .
.

8.3.2.
, Flash
.
, ,
.
,
Flash .
.
Flash .
. Flash
,
0xFF. , 0xFA
, .

8.3.3.

 .
STM32 STANDBY STOP.
.
- ,
STM32. ,
RC-.

. : ,
, ,
.

9.
ARM7 ARM9
.
ARM
, .. GCC, Greenhills, Keil, IAR Tasking.
Cortex
Thumb-2. , ARM,
STM32 .

.
, ARM-,

. ,
, .
"GCC" "GNU".
, ,
. GCC,
,
. , GCC
, ,
, . ,
,
, .
ARM RealView, ARM
. RealView
ARM RealView.
. ,
2006 RealView
Keil (MDK-ARM). MDK-ARM ,

 ARM-.
MDK ( 4
) -
.
GCC
, .

. ,
ARM-,

.
. , , ,
GCC . ,
, .. ,
.

9.1.

.
. - ST
.
STM32 Performance Stick Hitex.
50 , Performance Stick
STM32. USB-

HiTOP GCC Tasking.
STM32, Performance Stick
STR750.
STM32 .
.
STM32
,
, , .

Performance Stick Hitex - STM32.

Performance Stick HiTOP GCC ,

, - .
,
JTAG-
Tantino Hitex

9.2.
, ST
STM32,
-.
. ,
, .
STM32
USB-.
USB-, ST USB. , -
ST. USB- USB-
HID, Mass Storage, Audio Device Field
Upgrade.

STM32,
(MAC- Ethernet, TFT- .).
.
,
, , TCP/IP,
, .. ,
. ,
.

9.3.
8- 16- , ,
, . , Cortex-M3


. ,
, STM32
.
,
, .
. ,

. ARM Cortex,
.
,
"FreeRTOS".

www.freertos.org. FreeRTOS "SafeRTOS".

IEC 61508
.