Current Mirror and Current

Reference

Outline
Introduction
Characteristic of Ideal Current Mirror
Different Current Mirror Topologies
Simple Current Mirror (SCM)
Cascode Current Mirror (CCM)
Wide Swing Cascode Current Mirror (WSCCM)
Self-Biased Wide Swing Cascode Current Mirror (SBWSCCM)
Wilson Current Mirror (WCM)
Regulated Cascode Current Mirror (RCCM)

Current Reference
Bootstrapped Current Reference
Supply Dependency
Start-up Issue
Stability
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Introduction
Current source defined by a resistive divider
Iout

W
R2
K n
V VTHn
L R1 + R 2 DD

Iout is significantly dependent on

supply voltage, process and temperature

A better approach is to copy current from a reference current !

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Characteristics of Current Mirror

A current mirror is basically nothing more than a current amplifier.
The ideal characteristics of a current mirror are:
Output current is linearly related to the input current (iout = Ai iin ).
Input resistance (R in ) is zero
Output resistance (R out ) is infinite.
In addition, we have the characteristic VMIN which applies not only to the output but
also the input.

Vmin

Vmin

in
out

is the range of input voltage over which the input resistance is not small.
is the range of the output voltage over which the output resistance is not large

Graphically:

Input characteristic

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Transfer characteristic

Output characteristic

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Simple Current Mirror (SCM)

R in =

1
g m1

VOV + VTH

VOV

Ideal Situation

IREF = K n

W1
L1

VGS1 VTHn

Influence of Channel-length Modulation

=
IREF = K n

=
VDS1 = VGS1 = VGS2

Iout = K n

Vout = VDS2 VGS2 VTHn

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W1
L1

W2
L2

VGS1 VTHn

VGS2 VTHn

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(1 + VGS1 )
2

(1 + Vout )

Small-signal Analysis of SCM

Calculation of Rin
vgs1 = Vtest

rds1 g m1 vgs1 itest = Vtest

Vtest
g m1 Vtest itest =
rds1

1
1
R in =
=

+ 1
1
1
1
Calculation of Rout
vgs1 = vgs2 = 0
rds2 itest = Vtest
Vtest
R out =
= rds2
itest

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Mismatch in SCM

+
( + )

VDS1 VDS2 leads t1o poor current gain accuracy

How can we reduce the

mismatch?
Large channel device
Matching layout

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Cascode Current Mirror (CCM)

Large channel length (L) increases channel width (W) Output capacitance
of the current source increases
Solution: Use cascode transistor to increase output resistance (Rout) !

4 4
M4 shields node
Y from any
perturbation at
node P !

(VGS3 + VX )
is chosen such that VY = Vb VGS4 = VX
Vb = VX + VGS4
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CCMcontinued
R in

R out g m ro2

gm

2VOV + VTH
2VOV + 2VTH

Headroom = 2 Overdrives + 1 Thresholds

VOV + VTH

VOV

If

W
L 4
W
L 3

W
L 2
W
L 1

, then VGS3 = VGS4 and VX = VY

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CCMcontinued
M4 enters into saturation

Output characteristic
M2 enters into saturation

VDS1 = VDS2 leads accurate mirrored current

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Small-signal Analysis of CCM

Calculation of Rin
( = , )

vgs1 = iin g m1 Vgs1 rds1

iin rds1
vgs1 =
1 + g m1 rds1
Similarly,
vgs3

iin rds3
=
1 + g m3 rds3

rds1
rds3
vin = vgs1 + vgs3 = iin
+
1 + g m1 rds1 1 + g m3 rds3
vin
1
1
1
1
R in =
=
rds1 +
rds3
+
iin g m1
g m3
g m1 g m3

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Small-signal Analysis of CCM

Calculation of Rout
( = , )
vout = rds4 iout g m4 vgs4
+rds2 (iout g m2 vgs2 )
But, iin = 0, vgs1 = vgs3 = 0
vgs2 = 0; &
vgs4 = vs4 = iout rds2
vout = iout rds2 + rds4 + g m4 rds4 rds2 iout

R out

vout
=
= rds2 + rds4 + g m4 rds4 rds2 g m4 rds4 rds2
iout

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Wide-Swing Cascode CM (WSCCM)

R in

1
g m1

R out g m4 rds4 rds2

VOV1 + VTH
2VOV
Headroom = 2 Overdrives
VOV5 + VTH

Matched pairs

Condition: VOV5 VOV1 + VTH

M5 is weaker than M1

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Small-signal Analysis of WSCCM

Calculation of Rin
( = , )
vgs1 = vin
vin = (iin g m3 vgs3 )rds3 + vs3
but, vgs3 = 0 vs3 = vs3
vin = rds3 iin + (1 + g m3 rds3 )vs3
but, vs3 = rds1 (iin g m1 vgs1 ) = rds1 (iin g m1 vin )
vin = rds3 iin + (1 + g m3 rds3 )rds1 iin
g m1 rds1 1 + g m3 rds3 vin
R in =

vin
rds3 + 1 + g m3 rds3 rds1
1
=

iin 1 + g m1 rds1 1 + g m3 rds3

g m1

Calculation of Rout

Same as that of CCM

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CCM

WSCCM

CCM vs. WSCCM

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Self-Biased Wide-Swing Cascode CM (SBWSCCM)

R in R +

1
g m1
R out g m4 rds4 rds2
2VOV
Headroom = 2 Overdrives

VGS1 + IREF R
VGS1

Matched pairs

Condition: VOV3 IREF R VTH

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Small-signal Analysis of SBWSCCM

Calculation of Rin
( = , )
vin = iin R + rds3 iin g m3 vgs3
+rds1 iin g m1 vgs1
vgs1 = vin iin R and
vgs3 = vin rds1 iin g m1 vgs1

= vin rds1 iin + g m1 rds1 (vin iin R)

vin = iin R + rds3 iin g m3 rds3 vin rds1 iin + g m1 rds1 vin iin R
+rds1 [iin g m1 (vin + iin R)]
R + rds1 + rds3 + g m3 rds3 rds1
vin 1 + g m3 rds3 + g m1 rds1 g m3 rds3 + g m1 rds1 = iin
+g m1 rds1 g m3 rds3 R
vin R + rds1 + rds3 + g m3 rds3 rds1 + g m1 rds1 g m3 rds3 R
1
R in =
=
R+
iin
1 + g m3 rds3 + g m1 g m3 rds3 + g m1 rds1
g m1
Calculation of Rout

Same as that of CCM

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Wilson Current Mirror (WCM)

R out
R in

Vout

g m2 + g m3

g m1 g m3

1 1 3 3

+
2(VOV + VTH )

ID2

2VOV + VTH

WCM employs current-series

negative feedback

( + )

[ + + ]

VDS1 VDS2 leads t1o poor current gain accuracy

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Regulated Cascode Current Mirror (RCCM)

3
R out g 2m rds

R in

1
g m4

Iout
VX

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VY

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Comparison

SCM

poor

VOV

VOV + VTH

ro

CCM

excellent

2VOV + VTH

2 VOV + VTH

g m ro2

WSCCM

excellent

2VOV

VOV + VTH

g m ro2

SBWSCCM

excellent

2VOV

VOV + VTH

g m ro2

WCM

poor

2VOV + VTH

2VOV + VTH

g m ro2

RCCM

good

2VOV + VTH

VOV + VTH

g 2m ro3

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1
gm
2
gm
1
gm
R+

1
gm

1
gm
1
gm

20

Current Reference
Considering, VDS1 = VDS2 V1 = V2
VDD = VSG4 + VGS1
Current Source
VGS1 = Vth +

2I1

K n

W1
(1 + V1 )
L1

Current Sink
VSG3 = Vthp +

2KI1

K p

W4
1 + VDD V2
L4

I1 = VDD

1:K

Problems:

V1

V2

1:K

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Supply dependency

The current is not well-defined. The

circuit can support any arbitrary current
(at least, theoretically) as I2 = KI1 is
the only design equation

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Boot-strapped Current Reference

2IREF

VGS1 = Vth1 +

W
K n 1 (1
L1

IREF R =

+ VDS1 )

= Vth2 +

2
K n

W1
(1 + VDS1 )
L1

2IREF
K n

W
K 1 (1 + VDS2 )
L1

+ IREF R

1 1 + VDS1
K 1 + VDS2
2

K>1

aka -Multiplier Circuit

IREF =

1
2
1
1

1 + (VDS1 VDS2 )
2 K W1 (1 + V )
K
DS1
n L
1

VDS1 has less supply dependency

VDS2 = VDD VSG4 ; VSG4 changes when VDD
changes.
But this change would be negligible if is less
Use long channel device
Cascode
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Supply Dependency
VG

VX

VY

Increasing the output resistance of shortchannel MOSFETs using feedback. The

result is better power supply sensitivity

VG
VX

VY

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A practical way of implementing

the error amplifier

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Degenerated Bias Point & Start-up Circuit

Degenerated
bias point
Start-up Problem: The circuit can
latch to the degenerated bias point

Boot-strapped Current Reference

with Start-up Ckt.
This start-up circuit works for both
zero and non-zero currents

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Stability of Boot-strapped Current Reference

What type of feedback exists in the circuit?
It is a positive feedback !!!
V3
Will the loop be stable?

V4

V2

Yes, because the loop-gain (LG) is less than one.

V1

V2 V4
L. G. =

=
V1 V2

g m2 g

1
m4

1 + g m2 R

g m3

g m1

. . =
< because, g m2 < g m1
( + )

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Mismatch due to Body-bias Effect

Threshold
increases due
to body-bias

Alternative implementation eliminating

body effect (possible in n-well process)

VGS1 = Vth1 +

2IREF

W
K n 1 (1
L1

+ VDS1 )

= Vth2 +

2IREF
K n

W
K 1 (1 + VDS2 )
L1

+ IREF R

Vth1 Vth2
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Practical Applications
PMOS Current Mirror

NMOS Current Mirror

Current Reference

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References
1. B. Razavi, Design of Analog CMOS Integrated Circuits.
2. R. J. Baker, H. W. Li, and D. E. Boyce, CMOS Circuit Design, Layout, and Simulation.
3. P. E. Allen, and D. R. Holberg, CMOS Analog Circuit Design.

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