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$transistor models

.include "/home/cad/kits/IBM_CMRF8SF-LM013/IBM_PDK/cmrf8sf/V1.2.0.0LM/HSPICE/mod
els/model013.lib_inc"
$.include "/home/cad/kits/IBM_CMRF8SF-LM013/IBM_PDK/cmrf8sf/V1.2.1.2LM/Spectre/m
odels/allModels.scs"
$--------------------------------------------------------------nand 3 definition
begins------------------------------------------------.GLOBAL gnd! vdd!
*
.SUBCKT Euler_imp x_bar y_bar z_bar P
*
*
* caps2d version: 10
*
*
*
TRANSISTOR CARDS
*
*
MT6
gnd!
y_bar net26 gnd!
nfet
L=0.12U W=0.56U
+ AD=0.1792P
AS=0.1008P
PD=1.76U
PS=0.92U
+ wt=5.6e-07 rf=0 nrs=0.427184 nrd=0.427184 ngcon=1 nf=1 mSwitch=0 m=1 blockPara
siticsBetween="PC sub" PWORIENT=1 PLORIENT=1
MT7
net26 z_bar gnd!
gnd!
nfet
L=0.12U W=0.56U
+ AD=0.1008P
AS=0.1008P
PD=0.92U
PS=0.92U
+ wt=5.6e-07 rf=0 nrs=0.427184 nrd=0.427184 ngcon=1 nf=1 mSwitch=0 m=1 blockPara
siticsBetween="PC sub" PWORIENT=1 PLORIENT=1
MT9
gnd!
z_bar net14 gnd!
nfet
L=0.12U W=0.56U
+ AD=0.1008P
AS=0.1008P
PD=0.92U
PS=0.92U
+ wt=5.6e-07 rf=0 nrs=0.427184 nrd=0.427184 ngcon=1 nf=1 mSwitch=0 m=1 blockPara
siticsBetween="PC sub" PWORIENT=1 PLORIENT=1
MT8
net14 y_bar P
gnd!
nfet
L=0.12U W=0.56U
+ AD=0.1008P
AS=0.1008P
PD=0.92U
PS=0.92U
+ wt=5.6e-07 rf=0 nrs=0.427184 nrd=0.427184 ngcon=1 nf=1 mSwitch=0 m=1 blockPara
siticsBetween="PC sub" PWORIENT=1 PLORIENT=1
MT5
P
x_bar net26 gnd!
nfet
L=0.12U W=0.56U
+ AD=0.1008P
AS=0.1792P
PD=0.92U
PS=1.76U
+ wt=5.6e-07 rf=0 nrs=0.427184 nrd=0.427184 ngcon=1 nf=1 mSwitch=0 m=1 blockPara
siticsBetween="PC sub" PWORIENT=1 PLORIENT=1
MT4
vdd!
y_bar net41 vdd!
pfet
L=0.12U W=4.48U
+ AD=1.4336P
AS=0.8064P
PD=9.6U PS=4.84U
+ wt=4.48e-06 rf=0 nrs=0.0496054 nrd=0.0496054 ngcon=1 nf=1 mSwitch=0 m=1 blockP
arasiticsBetween="PC sub" PWORIENT=1 PLORIENT=1
MT3
net41 z_bar net49 vdd!
pfet
L=0.12U W=4.48U
+ AD=0.8064P
AS=0.8064P
PD=4.84U
PS=4.84U
+ wt=4.48e-06 rf=0 nrs=0.0496054 nrd=0.0496054 ngcon=1 nf=1 mSwitch=0 m=1 blockP
arasiticsBetween="PC sub" PWORIENT=1 PLORIENT=1
MT2
net49 z_bar P
vdd!
pfet
L=0.12U W=4.48U
+ AD=0.8064P
AS=0.8064P
PD=4.84U
PS=4.84U
+ wt=4.48e-06 rf=0 nrs=0.0496054 nrd=0.0496054 ngcon=1 nf=1 mSwitch=0 m=1 blockP
arasiticsBetween="PC sub" PWORIENT=1 PLORIENT=1
MT1
P
y_bar net49 vdd!
pfet
L=0.12U W=4.48U
+ AD=0.8064P
AS=0.8064P
PD=4.84U
PS=4.84U
+ wt=4.48e-06 rf=0 nrs=0.0496054 nrd=0.0496054 ngcon=1 nf=1 mSwitch=0 m=1 blockP
arasiticsBetween="PC sub" PWORIENT=1 PLORIENT=1
MT0
net49 x_bar vdd!
vdd!
pfet
L=0.12U W=4.48U
+ AD=0.8064P
AS=1.4336P
PD=4.84U
PS=9.6U
+ wt=4.48e-06 rf=0 nrs=0.0496054 nrd=0.0496054 ngcon=1 nf=1 mSwitch=0 m=1 blockP
arasiticsBetween="PC sub" PWORIENT=1 PLORIENT=1

*
*
*
CAPACITOR CARDS
*
*
C1
vdd!
gnd!
5.60324E-16
C2
x_bar gnd!
4.32996E-16
C3
y_bar gnd!
7.34745E-16
C4
z_bar gnd!
5.3375E-16
C5
P
gnd!
4.81387E-16
C6
net49 gnd!
8.88329E-17
C7
net26 gnd!
4.16926E-16
*
*
.ENDS Euler_imp
*
$-------------------------------------------------------------nand 3 definition
ends------------------------------------------------$--------------------------------------------------------------load definition b
egins------------------------------------------------.GLOBAL gnd! vdd!
*
.SUBCKT load in_load out_load
*
*
* caps2d version: 10
*
*
*
TRANSISTOR CARDS
*
*
MI1/T1 out_load
net4
gnd!
gnd!
nfet
L=0.12U W=0.28U
+ AD=0.0896P
AS=0.0896P
PD=1.2U PS=1.2U
MI0/T1 net4
in_load gnd!
gnd!
nfet
L=0.12U W=0.28U
+ AD=0.0896P
AS=0.0896P
PD=1.2U PS=1.2U
MI1/T0 out_load
net4
vdd!
vdd!
pfet
L=0.12U W=1.12U
+ AD=0.3584P
AS=0.3584P
PD=2.88U
PS=2.88U
MI0/T0 net4
in_load vdd!
vdd!
pfet
L=0.12U W=1.12U
+ AD=0.3584P
AS=0.3584P
PD=2.88U
PS=2.88U
*
*
*
CAPACITOR CARDS
*
*
C1
vdd!
gnd!
3.29142E-16
C2
in_load gnd!
4.42967E-16
C3
out_load
gnd!
2.04411E-16
C4
net4
gnd!
5.06322E-16
*
*
.ENDS load
*
$--------------------------------------------------------------load definition e
nds------------------------------------------------$--------------------------------------------------------------driver definition
begins------------------------------------------------.GLOBAL gnd! vdd!
*

.SUBCKT driver in_drv out_drv


*
*
* caps2d version: 10
*
*
*
TRANSISTOR CARDS
*
*
MI1/T1 out_drv net14 gnd!
+ AD=0.0504P
AS=0.0896P
MI1/T1@1
gnd!
net14
+ W=0.28U
+ AD=0.0504P
AS=0.0504P
MI1/T1@2
out_drv net14
+ W=0.28U
+ AD=0.0504P
AS=0.0504P
MI1/T1@3
gnd!
net14
+ W=0.28U
+ AD=0.0896P
AS=0.0504P
MI0/T1 net14 in_drv gnd!
+ AD=0.0896P
AS=0.0896P
MI1/T0 out_drv net14 vdd!
+ AD=0.2016P
AS=0.3584P
MI1/T0@1
vdd!
net14
+ W=1.12U
+ AD=0.2016P
AS=0.2016P
MI1/T0@2
out_drv net14
+ W=1.12U
+ AD=0.2016P
AS=0.2016P
MI1/T0@3
vdd!
net14
+ W=1.12U
+ AD=0.3584P
AS=0.2016P
MI0/T0 net14 in_drv vdd!
+ AD=0.3584P
AS=0.3584P
*

gnd!
nfet
PD=0.64U
out_drv gnd!

L=0.12U W=0.28U
PS=1.2U
nfet
L=0.12U

PD=0.64U
gnd!
gnd!

PS=0.64U
nfet
L=0.12U

PD=0.64U
out_drv gnd!

PS=0.64U
nfet
L=0.12U

PD=1.2U PS=0.64U
gnd!
nfet
L=0.12U W=0.28U
PD=1.2U PS=1.2U
vdd!
pfet
L=0.12U W=1.12U
PD=1.48U
PS=2.88U
out_drv vdd!
pfet
L=0.12U
PD=1.48U
vdd!
vdd!

PS=1.48U
pfet
L=0.12U

PD=1.48U
out_drv vdd!

PS=1.48U
pfet
L=0.12U

PD=2.88U
vdd!
pfet
PD=2.88U

PS=1.48U
L=0.12U W=1.12U
PS=2.88U

*
CAPACITOR CARDS
*
*
C1
vdd!
gnd!
4.94851E-16
C2
in_drv gnd!
4.44035E-16
C3
out_drv gnd!
4.71481E-16
C4
net14 gnd!
9.83793E-16
*
*
.ENDS driver
*
$--------------------------------------------------------------driver definition
ends-------------------------------------------------

$--------------------------------------------------------------simulation code b
egins------------------------------------------------$----------fanout 4 NAND------.option post runlvl=5 $runlvl=5 increases the accuracy
x1
x2
x3
x4
X5
X6
X7
X8

drvx in_x driver


drvy in_y driver
drvz in_z driver
in_x in_y in_z cut_out Euler_imp
Cut_out ldout1 load
Cut_out ldout2 load
Cut_out ldout3 load
Cut_out ldout4 load

vdd vdd! gnd! 1.2V


$Supply voltage for load and driver cells
$vdd1 vdd_CUT! gnd! 1.2V $ supply for CUT
$Vx drvx gnd! $pulse(0V 1.2V 1600ps 30ps 30ps 1600ps 3200ps) $in voltage source
$Vy drvy gnd! $pulse(0V 1.2V 800ps 30ps 30ps 800ps 1600ps) $in voltage source
$Vz drvz gnd! $pulse(0V 1.2V 400ps 30ps 30ps 400ps 800ps) $in voltage source
$.vec new.vec
.vec euler_inp.vec
.tr 100ps 10ns
$measuring prop delay
.measure TPlh trig v(in_x) val=0.6 rise=2 targ v(CUT_out) val=0.6V rise=5
.measure TPhl trig v(in_y) val=0.6 fall=1 targ v(CUT_out) val=0.6V fall=2
$.measure tran AvgPower avg p(vdd1)

.end
$--------------------------------------------------------------Simulation code e
nds-------------------------------------------------