SIMULATION OF THE SIX-PULSE BRIDGE ‘CONVERTER WITH INPUT FILTER Stabrodl, Member, IEEE Teverpower Controls Lid, 158 Harrington Coot Darlington, Ontaria, Canada LTN 3P3 ABSTRACT ‘This paper preseots the details of a method for the simulation of the tacpulte bridge converter with inpot élter. ‘The input biter bas a general form including any number of harmonic traps. In addition, the characteristics of the con- verter gating circuit are also sinulated, The tet of equations erived fa tbis paper ate valid for all modes of operation of the bridge converter including single and double commuta- ‘ica periods, freewheeling period, and operation vader faulty cooditions. The method is used for the steady state Uansieat and fault studies, Several examples illustrating the applications of the simulation method are included. The experiments! rerulte ate ted to verify the accuracy of the Simulation method 1. ENTRODUCTION ‘The six-pulte bridge converter is widely wied ia dc. power supplies, de drives, and HVDC transmission lines. le ‘id to bigh power applications, input Slters are added to the bridge converter in order to limit the live eurreat distortion, Fig. 1 shows « typical input Slter where R and L include the line aed transformer resistance and leaksge inductance, The preteuce of the flter cavres the voltages at the bridge input to become distorted and phase shifted with The sixpulse bridge converter with input iter ‘The Siter consists of K shust branches as shows. and L are the line and transformer resistance and inductance or are deliberately added. Fig S.. Dewan, Fellow, IEEE Departaeat of Eleetrleal Eaglaeering Unlversty of Toronto Toronto, Ontario, Canada MSS 14 respect to the lise voltages. Ta general, the operation of the converter during steady state, transient and fault conditions an only be accurately studied by simulating che circuit ynamic equations. Whea the synchronizing voltages for the firing cireuit are taken from the converter side, the 2er0- crossing references for the 6riog pulses become » function of the circuit variables and the converter gating cizcuit must alto be vimulated, Although there have beea teveral works in the litera: ture (1-5) related to the simulation of the circuit of Fig. 1, the above-mentioned factors bave not bees fully considered! ‘The purpose of this paper is to present the detals of sinu- latioa method for the circuit of Fig. 1 40 that it can be readily implemented for particular purposes. Several illur ive examples are alto included to show the effectiveness ‘of the method in dealing with the problems associated with the circuit of Fig. 1. In the following section, the simulation method is ais- ccunted, Iti followed by the description of various operating ‘modes. Applications and illustrative examples are prescated ia Section 3. 2. SIMULATION METHOD In this section the dynamic equations of the circuit of Fig. 1 are derived in a general form applicable to all operat lg conditions as Adwax+ a where x and y are tbe state and ioput vectors respectively. ‘The auaber of state variables is wicimized by relecting foaly the linearly independent state variables, Referring to Fig. 4, the following relationships hold: aes eo no oo Pees a F424 = 4% 33 iy en riEqualities (2<) and (2.4) are valid based on the super- position principle and the assumption that all the phase iter branches are individually Balaoced. The only other assumptions are: 1. The three phase source voltages are balanced, 2. The converter elements are idea! evitcher ‘The state variables are chosen for the simplicity of the circuit equations and are dened as (refer to Fig.) nAatnk Ga) able oxy Bt cr) sy ble Ga aay kle ee sardine cy saben Gs) su sm Ate ony ysmaden e) Fas M ee 5) Fas lat oy where J = 2 And fg 104 Uae B76 (WO fctioue state vari= ables whick ‘appear aly duriog commutation and irregular conduction periods described ia section 21. The state vector z= (eytyarta ita sate es)” bas the dimension N which, dependiag on the switching state fof the converter, is between (4k +1) and (4k +2). The input vector is deGned 2 reer)! = (rarinne Mo where va = VVisino Based on the above equationt and KVL and KCL rela: tionships, the general form of dynamic equations is obtained Ly deft ~L dy fe = RL 2 y-Ry + By LyRy My ey EZ sapealty thes © tec eee eG cae “HB tyen ally thay o i Le [dt + bydesfdr = bom Ryaytr (6) Lee fat thy dey dt Bey Ryzyx4 ory tey, (1) Lssfér hydra let Rey Ryryaseneyertin Cede ety — Bory ay Cidea yy = Bae (ny Cy dey lth =) (103) Cyde yan alt ay (108) were pene u3m, ay Ry PW D FAW BCG = PCH (BD Hiss thotbreatben (as) HAW, = sotthreatbran as) wm shri + shay 05) ro thyestelees an ‘The coefficients +1) 00 453 are a function of ewitehing state of the converter whote Valuer are determined in the next section. Upon replacing the constaats #5 €0 rn, the ‘equatioos (4) to (10) are readily a the form of equatioa (1) to be solved by aumerieal integration. The dynamic equations (4) to (10) are valid for all ‘operating conditions of the eiteuit of Fig. 3 provided that proper values for the switebiag constants #5 (0 433 are rub> ‘ituted. The switebiog eonstents ere found from equations (14) t0 (16) a8 thowa below. Regular Operation: Regular operation is referred to the ‘mode in which the thyritors of circuit of Fig. 1 are Ged consecutively by the order of thyrittor aumbers (103.06) in 3 intervals. During this made of opera tion, at any time, either no thyristor conducts (discontinuous current) of two or three thyristors are conducting. Thevalues of switebing coastants for this mode of operation are Hited in Table I for the thirteen differeat intervals, Table 1 The values of ewitebiag coastants for the six-pulte bridge converter of Fig. 1 during regular eitei sequences. ‘As an example, Fig. 2 shows the state of bridge ciruit at two eliffereat iatervals, Whea only two of the thyristors are conducting (Fig. 22), it it eeen that aE Nd mi ane During the commutation periods such as shown in Fig. 2b, a new variable i introduced which represcats the cutreat ia the oa-goiog leg. This varlable is referred to a5 fous and appears only duriog the commutation period, it i+ toro otherwite, At the statt of commutation fey increases from 2e10 vatll it equals (, and the commutation interval is ended. At this point {4 is eliminated. The switching coo- Hats #3, aad #2 dutlog commutation periods are readily obtained by writing 1%, and 1 in terms of fy a0d ica FOr instance, in Fig. 2b, one gets : EAU = Die Hagen oy AB eo Braet Since the emergeace of ica) adés one more variable t0 the cumber of uaknowar, an additional dyaamic equation is alto required. This equations comes from the short clzcult condition between two liner during commutation at Shyla, [dread farms Reytlgeg tly yt) ‘The switching constants +4 and 243 are listed in Table 1 for the sx differeot commutztion periods dusing regular operation of the converter. devices during: 4) regular conduction of two thyristors, b) commutation of Qs by Oz, ©) commutation of Q by 5 leading 19 freewbeeling, 4) commutation of Qs and Q¢ by Qy and Q2 respectively (double commutation). Freewbeeling and Irregular Operation: For regenerative loads, the average output voltage is acgative during which period freewheeling operation is possible. The freewbecling period can be part of a regular Gring scheme to reduce reac: tive power and improve the line condition (6). Fig. 2¢ hows the sate of switching devices at the beginoiag of a freewheeling period. Ia this 6gure, initially Q, commutates 0) and iggey increases from 2er0 to iy. However, a8 4008 6s finws exceeds iy, Q; turas off and the load cloves itself through Q and Qy. The freewhecliag operation canbe ended by 6ting an eppropriate thyristor as showa io Fig. 3. Fig.3 A umber of irregular switching patterns (double lines indieate double commut Fig. 4 shows the waveform of the converter output vol tage dutiog a0 irregular switchiog pattern, Irregular eviteh- Ing patterns ean occur at 4 result of: 1) deliberate control schemes (o improve line conditions (6), 2) rddeo ebanges of the firing angle, 3) closed-loop coatrol action, and 4) emer- ‘ency twitching sequences after a fault (7). The requence of ‘conducting thytistors, ia general, it cumerous. Fig. 3 sbows several possible gating sequences. The derivation of switch- ing constants for all the possible cases is similar aad only two specific examples corresponding to freewhecliog sad Fig. (The output voltage during an irvegular gating sequence. and during freewheeling period i, = iy =r mw Fig. 24 shows the start of & double commutation period. For this cate, two new varitbler igany D4 hey teprescat the current ia the on-going thyristors Q) and. sespectively. The additional uakeowar fay 300 hana require two extra dynamic equatioas, These equations come Irom the short circuit condition between the three lines Lbs fdr = Lazyfdt = Rey + uy Rey $y (93) (098) The switebiog constants for Fig. 24 are given in Table 2. Avis seea ia this Ggure BPH lett Phen a 420, = High sod the switching constants are foued accordingly. 4 jem OF eaes Ox6004 ly. Qs OF Oy aze commuteted Operation Under Faults: The simulation method is equally applicable duriag faults provided that proper rwitching coo stants afe replaced. Ia. case of thyristor isbriog the situation is the same as irregular gating. If thyristor buras fot, it cannot be commutated and conducts veo in the reverse direction. The general algorithm of the simulation. method is capable of simulating faults aveb as thyristor ‘oisGring, thyristor bura-out, load thort circuit and commu tation failure. 22 Slmolation of Firing Clrcatt The thyristors are fred after 4 delay angle following the sero-crossing of the corresponding synchronizing vole tages. The delay angle is either directly specified of it a fuaction of the cizcult variables in closed loop systems. The zero-crossing points of the syachronizing voltages are tho « Table 2 The values of switebiog coostants for the sixpulte bridge converter during freewhecliag and double commutation periods ia Fig. 2c and 24. function of circuit variables if they are taken from the coo- verter side. Thus, the general algorithm Keeps track of both the firing angle and zero-erotting sefereaces in every integer tion step. 23 Model of Switching Devices ‘An {deal switch model it assumed which bes » 2210 spedance in the conducting state and inGaite impedance ia the blocking state. Due to this simplified model, the coadi- tion of slauttaneous conduction of of 6 thyristors cannot be simulated. However, simulation of the reverse recovery is ponsible by allowing the commutatiog currents Jom 424 fangs 10 exceed iy by the amount of reverte recovery current Before turning off the out-golag thyristors. 24 General Compoter Algorithas ‘The cocificieat ceatrices of equation (1) are evaluated sod wored for all the desised switching states, The dynamic equations are numerically integrated. At etch integration time step, the ov/olf states of the vitching devices are Setermined based on which the appropriate coefficient et ate relected. For a switebing device to turn oa, the ‘mutating voltage is checked. Similarly, the device le turned off whes its current is reduced to 2et0 and ite fring signals ae iobibited. ‘Whea the syachroaizing voltages for the fring cireut ae taken from the converter side, at each integration time step the zero-crossing references for the gatiog pulses are found. The corresponding gating pulses are applied alter delay following the zero-crouing references, “The delay, in ‘ura, is a function of circuit variables such a3 output voltage and current in closed loop systems or caa be fixed for open loop coco. 3. APPLICATIONS AND ILLUSTRATIVE EXAMPLES ‘The simulation method pretented in this paper ix gem eral modelling technique applicable to the circuit of Fig. 1 Under all operating conditions, This method is uted for the analysis of the clicuit variables when there are no explicit solutions to the problem. Ip general, theze is no explicit solution for the variables of the circuit of Fig. 1. The possi: ble applications of the method are described ta the following sections io tevera illustrative examples. 3.4 Steady State Analysts and Design of Inpot Fllcer ‘The input voltages of the converter of Fig. 1 are vari= able and a fonction of the converter loxd, Due to ths, the barmosie contents of the circuit variables cannot be obtained in a closed form. Direct calculation of the ba monic conteat is only possible when the commutation ove lap angle is negligible (8). In all other eases, the timulation results must be used. For example, in the citcuit of Fig. 5, the commutation overlap angle it not negligible due to the Presence of the inductance L*. Therefore, the accurate ‘design of ioput Biter requires simulation rest Fig. 6 shows the input and output voltages of the con- verter of Fig. 5 obtained by the timulation method, Table 3 rummarizes the Blter design data ax compared with the experimental dats, These results verify the accuracy of thejlte bridge cooverter uted in the ilustrae tive examples. Tuo veutnce em | Vy Hi WAVY Fig.6 The steady state foput and output voltages of the converter of Fig. 5 obtained from the timulation, method for vse in harmonic ann! ix and Glter design appli- 32 Stability Stody Whea the synchroniziog voltages for the Griog cf are takea from the coavertet side in Fig, 5, there is posti= bility of instability (9) #8 shown ia Fig. Ta. The rimslation results shows ia Fig. 70 match the experimental refulis, ‘This was made possibie by considering the variations of the zerovcrossing references at well as the delay angle at each integration time step, Table 3 Comparison of iter design date obtained by experiment and simulation. ‘The experimental results, (a) show the instability ia the form of limit eyeles when the tyachroaizing tig- tals for the gating circuit are taken from the con verter side, The simulation results, (b) verify this phenomenon. The input filter is. of LC-type with L = 03pa.,andC = 017 pa. 33 Fealt Stadler The variation of the circuit variables duriog a fault condition can be studied by the simulation method. Fig. & shows the output current and the thyristor currents follow- ing a thyristor bura-out in the circuit of Fig. 5. Due to the failure of commutation, a lie to line short circult condition persist. At is seca in Fig. 8 the current ia the ougoiog as well as the faulyy thyristors (the commutation current, 3) composes of two components: 1) a component atthe line fre 2) the ringing component established by 1” and C. ICL is suffcteaty amall, the ringing component of the fault ccorrent dominates as showa in Fig. 8b. This ruggets the possibility of fuscless protection by which the on-going Ihyristor Is shut off after the fault curreat is detected and the gating pulses are removed (9). The direction of the frequency ringing currect reverses and thus turos off the ‘on-going thyristor after the inhibition of Gring signals. 3.4 Stody of Swlichlag Translate Defermiaation of maximum ratings of thyristors requires the examination of eiteuit variables dutiog wor case overatiog conditions wuch as ewitehing treasieats, Fi.Soy, Se [WVmeoawownnwe : ~~ 3 hg Ailes te liens or _ : ® econ ® i comin Fig. The sectier input and output voltages alter the start op. (2) Correspoads to an LC-lter wi ae Chroaiziog voltages taken {fom the lie tide, In (8) : 4 large inductor is placed fa parallel to the sbuat Copseitor and the syocbroaizidg voltages are taken {rom the rete tide ‘taps and load characteristics. The dyaamics of the Sriog citeuit were also simulated. This oethod fads application ix : the design of fopet Biter, sibility, and fault rudies, Several te aie lilustrative examples presented the usefulness and securacy @) ‘The ousput (de) and thyristors curreots duriog a line to line short cizeuit es a result of a thyristor bura-out leading to comamutation failure ia recity- ing mode of operation for the circult of Fig. 5. The value of the inductance Li 10 ties emaller in (8) thao ia (2). Fig. 8 9a shows the circuit variables of Fig. 5 (L’ = 0) following the couverter-tarvup. The emergence of overvaltage of more thao 200% can clearly be seen in Fig. 9a. Ie is soea ia Fig. 99 that the transiect voltages ean be suppressed by placing 8 large inductor in parallel to the 6lter shunt taking the syachroaizing volt however results ia the emergence of limit cycles ax described in section 32. 4 CONCLUSIONS A several input Slter was prescated ia t tnethod is applicable regardles of the sumber of baraonie Of the method ia the eases where there are ao explicit solu tioa to the problem. With minor modigestions, the rimula: sion metbod can alto be used for the study snd detign of four quadrant de drives and osturally comautated cyclocon- verter systems, REFERENCES LD] 5. Wiliams, IR. Smith, "Fast Digital Computation of ‘Phase Thyristor Bridge Circuits, Proc. IEE, Vol. 120, No. 7, pp. 791-795, July 1973. AM, ElSeraf, S.A. Sbebata, ‘Digital Simulation of a5 ACIDC System ia Direct Phate Quantitles", IEEE. Trans. on PAS, Vol. PAS-95, No. 2, pp. 731742, MareB/April 176, 2 [) 8. Delfino, et al, ‘Digital Simulation of DC Motor Drives FED from Thyristor Converters: Harmonic Diwtortion Effects on AC Supply*, LAS Annual Conference Records, pp. 760-765, Oct. 1983. (4). Geza Joos, E.D. Goodman, "Modelling the Discontiou- ‘ous Conduction Mode in Converter-Fed Drives", IAS ‘Anoual Conference Records, pp. 766-770, Oct. 1983.(6) 0} (8) (9 B.T. Ooi, et al., * Fast Steady-State Solution for HVDC Analysis’, IEEE Trans. on PAS, Vol. PAS-99, No. 6, pp. 2453-9, Nov-Dec. 1980. S.B. Dewan, W.G. Dunford, "Improved Power Factor Operation of A Three Phase Rectifier Bridge Through Modified Gating”, IEEE PESC Records, pp. 830-837, Atlanta, US.A,, June 1980. J. Arrillaga, G. Galanos, "Fault Development Control in AC/DC Converters’, Proc. IEE, Vol. 116, No. 7, pp. 1201-1208, July 1969. E.B. Shabrodi, S.B. Dewan, “Steady State Characteris- tics of the Six-Pulse Bridge Rectifier with Input Filter’, IAS Annual Conference Records, pp. 840-846, Chicago, Ill., Oct. 1984. E.B. Shabrodi, *Six-Pulse Bridge AC/DC Converters with Input Filter", PhD. Thesis, University of Toronto, Toronto, Canada, 1983.