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CHANNEL CONCEPT

ACCESS BURST
FRAME1(4.615ms)

FRAME2

0.577ms
8
Tail
Bits

41 bits
Synchronisation
Sequence

36 bits

Encrypted Tail
Bits
Bits

68.25 bits
Guard
Period

Carries RACH.
Has a bigger guard period since it is used during initial access and
the MS does not know how far it is actually from the BTS.

CHANNEL CONCEPT
NEED FOR TIMESLOT OFFSET

BSS Downlink

MS Uplink

0 1

If Uplink and Downlink are aligned exactly, then MS will have to


transmit and receive at the same time. To overcome this problem a
offset of 3 timeslots is provided between downlink and uplink

CHANNEL CONCEPT
NEED FOR TIMESLOT OFFSET
BSS Downlink

MS Uplink

5 6

3 timeslot
offset

As seen the MS does not have to transmit and receive at the same
time. This simplifies the MS design which can now use only one
synthesizer.

CHANNEL CONCEPT
26 FRAME MULTIFRAME STRUCTURE
4.615 msec

00 11 22 33 44 55 66 77 00 11 22 33 44 55 66 77 00 11 22 33 44 55 66 77

T T T T T T T T T T T T S T T T T T T T T T T T T I
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25
120 msec

MS on dedicated mode on a TCH uses a 26-frame multiframe


structure.
Frame 0-11 and 13-24 used to carry traffic.
Frame 12 used as SACCH to carry control information from and to MS
to BTS.
Frame 25 is idle and is used by mobile to decode the BSIC of neighbor
cells.

BCCH/CCCH NON-COMBINED MULTIFRAME


50

Downlink
CCCH

BCCH
CCCH

40

IDLE
CCCH BLOCK
BCCH BLOCK
SCH BLOCK
FCCH BLOCK
RACH BLOCK

50

Uplink

40

CCCH

BCCH
CCCH

30

30
CCCH

BCCH
CCCH

20

20
CCCH

CCCH

10

10
CCCH

BCCH

BCCH/CCCH COMBINED MULTIFRAME


Uplink

Downlink
50

101
SACCH
CCCH

SACCH
CCCH

SACCH
BCCH

SACCH
BCCH

SDCCH
CCCH

SDCCH
CCCH

SDCCH

SDCCH

SDCCH
CCCH

SDCCH
CCCH

SDCCH
BCCH
CCCH

SDCCH
BCCH
CCCH

CCCH

CCCH

CCCH

CCCH

40

30

50

40

SDCCH
CCCH

101

SDCCH
CCCH

SDCCH
CCCH

SDCCH
CCCH

SDCCH
CCCH

SDCCH
CCCH

SACCH
CCCH

SACCH
CCCH

SACCH
CCCH

SACCH
CCCH

SDCCH
CCCH
BCCH

SDCCH
CCCH
BCCH

30

20

20

10

10

IDLE
CCCH BLOCK
BCCH BLOCK
SCH BLOCK
FCCH BLOCK
RACH BLOCK
SDCCH/4
SACCH/4

CCCH

CCCH

BCCH

BCCH

51

51

DCCH/8 MULTIFRAME
Uplink

Downlink
50

101
CCCH
A3

CCCH
A7

BCCH
A2

BCCH
A6

40

30

50

40
CCCH
A1

CCCH
A5

BCCH
A0

BCCH
A4

CCCH
D7

CCCH
D7

CCCH
D6

CCCH
D6

CCCH
D5

CCCH
D5

20

10

IDLE
SDCCH/8
SACCH/C8

30

20

BCCH
A0

101

BCCH
A4

CCCH
D7

CCCH
D7

CCCH
D6

CCCH
D6

CCCH
D5

CCCH
D5

CCCH
D4

CCCH
D4

CCCH
D3

CCCH
D3

CCCH
D2

CCCH
D2

CCCH
D1

CCCH
D1

CCCH
D0

CCCH
D0

CCCH
A7

CCCH
A3

CCCH
D4

CCCH
D4

CCCH
D3

CCCH
D3

CCCH
D2

CCCH
D2

CCCH
D1

CCCH
D1

BCCH
A6

BCCH
A2

CCCH
D0

CCCH
D0

CCCH
A5

CCCH
A1

51

10

51

CHANNEL CONCEPT
HYPERFRAME AND SUPERFRAME STRUCTURE
3h 28min 53s 760ms
00

11
6.12s
11

0
00

1 Hyperframe = 2048 superframes = 2,715,648 TDMA frames


22

2045
2045

33

47

11

11

2047
2047

1 Superframe = 1326 TDMAframes = 51(26 fr) 0r 26(51 fr) multiframes

22

48

49

24
24

120ms
00

2046
2046

50
25
25

235.38ms
23
23

24
24

25
25

00

11

Traffic 26 - Frame Multiframe

22

48
48

49
49

50
50

Control 51 - Frame Multiframe


4.615ms
00 11 22 33 44 55 66 77

TDMA Frame

CODING, INTERLEAVING CIPHERING


SPEECH
CODING

SPEECH
DECODING

CHANNEL
CODING

CHANNEL
DECODING

INTERLEAVING

DEINTERLEAVING

BURST
ASSEMBLING

BURST
DISASSEMBLING

CIPHERING

DECIPHERING

MODULATION

Transmission

DEMODULATION

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