Quiz-2

Name:____________________________________

Date: ____________________________

Roll Number: _____________________________

1.

Answer the following questions

(10)
i.

One of the greatest advantage of FPGA over gate array ASIC is that
a) FPGAs occupy less area than gate array ASIC
b) FPGAs consume less power than gate array ASIC
c) FPGAs have shorter time-to-market over gate array ASIC
d) FPGAs have less propagation delay as compared to gate array ASIC
e) All of the above
f)
None of the above

ii.

A circuit developed using which device technology has the least possible area
a) FPGA
b) Standard-cell ASIC
c) Gate Array ASIC
d) Full-Custom ASIC
e) CPLDs

iii.

The basic difference between Verilog and VHDL is that

a) VHDL is a sequential language, Verilog is a combinational language.
b) VHDL creates better FPGA designs, whereas Verilog creates better ASICs.
c) VHDL generates better hardware implementations than Verilog.
d) All of the above
e) None of the above.

iv.

The A in the acronym FPGA stands for

a) And
b) Arbitrary
c) Array
d) Always
e) Abstract

v.

HDL synthesizers are used to convert

a) Structural to behavioral view
b) Lower to higher abstraction level
c) Both a & b
d) Higher to lower abstraction level
e) Behavioral to structural view
f)
Both d & e
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g)

vi.

None of the above

Unit production cost of an IC can be computed through the following formula.

Cost_per_unit = Cost_per_part + Cost_NRE/units produced.
If we decrease the number of units produced, the cost_per_unit of an ASIC will
a) Increase
b) Decrease
c) None of the above

vii.

The P in the acronym FPGA stands for

a) Program
b) Programming
c) Programmed
d) Programmable
e) None of the above

viii.

Expand the abbreviation ASIC.

ix.

Expand the abbreviation EDA.

x.

What is the purpose of a high-level hardware description language when humans are capable of
designing hardware at gate-level or even at transistor-level? (Answer must not exceed 3 lines).

xi.

Explain the term design for test. (Answer must not exceed 3 lines).

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