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Selected Examples from Basic Engineering Circuit Analysis (Irwin,

Nelms)
PSPICE
Stephen M Haddock

Table of Contents
Chapter 2 Examples ......................................................................................................5
Example 2.24 ............................................................................................................................................ 6
Example 2.25 .......................................................................................................................................... 10
Example 2.28 .......................................................................................................................................... 14

Chapter 3 Examples ....................................................................................................16


Example 3.2 ............................................................................................................................................ 17
Example 3.4 ............................................................................................................................................ 18
Example 3.7 ............................................................................................................................................ 19
Example 3.9 ............................................................................................................................................ 20
Example 3.10 .......................................................................................................................................... 22
Example 3.11 .......................................................................................................................................... 24
Example 3.16 .......................................................................................................................................... 25
Example 3.18 .......................................................................................................................................... 26
Example 3.19 .......................................................................................................................................... 27

Chapter 5 Examples ....................................................................................................29


Example 5.6 ............................................................................................................................................ 30
Example 5.9 ............................................................................................................................................ 33
Example 5.10 .......................................................................................................................................... 34
Example 5.11 .......................................................................................................................................... 35
Example 5.12 .......................................................................................................................................... 37
Example 5.14 .......................................................................................................................................... 39
Example 5.16 .......................................................................................................................................... 41
Example 5.17 .......................................................................................................................................... 44
Example 5.18 .......................................................................................................................................... 47

Chapter 6 Examples ....................................................................................................50


Example 6.2 ............................................................................................................................................ 51
Example 6.3 ............................................................................................................................................ 53
Example 6.6 ............................................................................................................................................ 55
Example 6.7 ............................................................................................................................................ 57
Example 6.10 .......................................................................................................................................... 59
Example 6.11 .......................................................................................................................................... 61

Chapter 7 Examples ....................................................................................................64


Example 7.1 ............................................................................................................................................ 65
Example 7.2 ............................................................................................................................................ 67
1

Example 7.3 ............................................................................................................................................ 69


Example 7.4 ............................................................................................................................................ 71

Chapter 8 Examples ....................................................................................................73


Example 8.14 .......................................................................................................................................... 74
Example 8.15 .......................................................................................................................................... 77
Example 8.16 .......................................................................................................................................... 80
Example 8.18 .......................................................................................................................................... 83
Example 8.20 .......................................................................................................................................... 85
Example 8.21 .......................................................................................................................................... 88
Example 8.22 .......................................................................................................................................... 90

Chapter 9 Examples ....................................................................................................92


Example 9.1 ............................................................................................................................................ 93

Chapter 10 Examples ..................................................................................................96


Example 10.4 .......................................................................................................................................... 97

Chapter 11 Examples ..................................................................................................99


Example 11.4 ........................................................................................................................................ 100

Chapter 12 Examples ............................................................................................... 102


Example 12.1 ........................................................................................................................................ 103

Supplemental Examples ........................................................................................... 105


Supplemental 1...................................................................................................................................... 106
Supplemental 2...................................................................................................................................... 108
Supplemental 3...................................................................................................................................... 109
Supplemental 4...................................................................................................................................... 111
Supplemental 5...................................................................................................................................... 113
Supplemental 6...................................................................................................................................... 114
Supplemental 7...................................................................................................................................... 116
Supplemental 8...................................................................................................................................... 117

PSPICETechniques
Topic
Analysis,displayvoltages/currentsonschematic
Analysis,displaybranchcurrentdirection(redarrow)
Cursor,Enable
Cursor,FindMax
Cursor,Reading
Cursor,SearchCommands,xvalue()
Markers,CurrentintoPin
Markers,DifferentialVoltage
Markers,NodeVoltage
Nodes,Naming
Outputfile,opening
Parts,attributesmenu
Parts,BUBBLEsforcontrollingcurrent
Parts,naming
Parts,placement
Parts,setvalue
PROBE,AddPlottoWindow
PROBE,AddTrace
PROBE,AddTraceofManipulatedValues(arithmetic)
PROBE,AddTraceofPhase
PROBE,AddYaxis
PROBE,ChangeAxisDataRange
PROBE,newwindow
Simulations,ACSweep
Simulations,BiasPointDetail
Simulations,DCSweep(voltagesource)
Simulations,DCSweep(resister)
Simulations,Parametric
Simulations,Transient
Tricks,Dummyresistortoreadopencircuitvoltage
Tricks,DummyDCvoltagesourcetoreadcurrent

CoveredIn
2.24
3.7
2.25
5.16
2.25
8.20
7.1
3.10
9.1
2.28
8.14
2.28
2.28
2.24
2.24
2.24
12.1
5.16
5.18
12.1
6.2
6.2
8.20
8.14
2.24
2.25
5.16
6.10
6.2
5.6
3.19

PSPICEParts
Part
Sources,DCVoltageSource
Sources,VPiecewiseLinear
Sources,sinusoidalvoltagefrequencydomain
Sources,sinusoidalvoltagetimedomain
Sources,DCCurrentSource
Sources,IPiecewiseLinear
DependantSources,VCVS
DependantSources,CCVS
DependantSources,VCCS
DependantSources,CCCS
Markers,Branchcurrent
Markers,Nodevoltage
Passive,resistor
Passive,capacitor
Passive,inductor
Special,BUBBLE
Special,PARAM
Switch,timedclosingswitch
Switch,timedopeningswitch
Reference,earthground

Model
VDC
VPWL
VAC
VSIN
IDC
IPWL
E
H
G
F
iprint
vprint1
R
C
L
BUBBLE
PARAM
Sw_tClose
Sw_tOpen
EGND

FirstAppearance
2.24
6.10
8.14
9.1
2.28
6.11
3.9
5.17
2.30
2.28
8.14
8.14
2.24
6.2
6.6
2.28
5.16
7.1
7.1
2.24

Chapter2Examples

Example2.24
This example is simple and will serve as a nice introduction to basic PSPICE analysis. The
circuit will be constructed from parts in the PSPICE library, these parts are then given the proper values,
and lastly, the circuit is simulated with a Bias Point Detail.
Necessary Parts: VDC, R, EGND
Schematic Setup:
1) Open Schematics
2) To begin placing parts go to Draw/Get New Part This will bring up the part browser shown
in Figure 2.24.1.
3) In the box labeled Part Name: type VDC. This is the DC voltage source part in PSPICE, so click
the button labeled Place and Close.
4) The cursor should now be carrying a voltage source. Place the part by left-clicking when it is
in the desired location.

Figure 2.24.1

5) Open the part browser again and type R into the Part Name: box. Click Place and Close.
6) Place the resistors in locations that match the circuit diagram from the example. Do not worry
about connecting them with wires yet, see Figure 2.24.2.
7) Now that the source and resistors have been placed it is time to begin wiring. Enable the wiring
tool by going to Draw/Wire. This will turn the cursor into a pencil graphic. Left-click on the top
pin of the voltage source and drag the cursor over to the resistor it connects to, left click on this
pin. This is the wiring process.
6

8) Wire the circuit as it appears in the example.

Figure 2.24.2

9) Open the part browser once more and find the part EGND. This part labels a reference node,
which is required for PSPICE simulation. Place this part on the bottom wire of the circuit,
underneath the voltage source will be fine.
10) Now the values of these parts must be set to match those in the example. All the placed parts will
have default values, 0V for the voltage source and 1k for the resistors. Double-click on the 0V
beside the voltage source, this opens a dialog box for setting the sources voltage. Replace the 0V
with 12V and click OK. Follow this same process to set the correct values for the resistors.
11) Each of these parts also has a name, a reference designator in PSPICE terms. This is usually a
letter and a number, such as V1 for the first voltage source and R3 for the third resistor. It is often
helpful to give these descriptive names. Through this guide, an attempt is made to name parts as
they are named in the examples from the book. So V1 is then named Vs. Renaming is
accomplished in the same manner as setting the part values.
12) The final schematic should appear as the one in Figure 2.24.3.

Figure 2.24.3

Simulation Setup:
1) Before simulating a circuit, the schematic must be saved. It can be helpful to put the schematic in
its own directory because the simulation will create numerous other files.
2) To run a Bias Point Detail, open the Analysis Setup menu by going to the Analysis/Setup
menu. This menu can be seen in Figure 2.24.4.
3) Make sure there is a check in the box beside Bias Point Detail. Close the Analysis Setup menu.
4) Run the simulation by clicking on Analysis/Simulate.

Figure 2.24.4

Analysis:
Another window will open; this is the PROBE window. There will not be much to note about it
for now, but what is noteworthy is the simulation summary in the bottom left of the PROBE window.
This summary box will display any error messages that arise. It is desired that it say Simulation
complete, which indicates a successful simulation. Go back to the schematic window once the circuit
successfully simulates.
Select Analysis/Display Results on Schematic/Enable Voltage Display to display the voltages
measured from the reference location designated by the EGND part. All the desired currents can be
displayed by selecting Analysis/Display Results on Schematic/Enable Current Display. Figure 2.24.5
shows how these values will be displayed on the schematic.
The answers should appear as follows on the schematic:
Va =
Vb =
Vc =
I1 =
I2 =
I3 =
I4 =

3.000 V
1.500 V
375.00 mV
1.000 mA
500.00 A
500.00 A
375.00 A
8

I5 = 125.00 A

Figure 2.24.5

Example2.25
In order to find the unknown voltage source in this example, a DC Sweep analysis will be used to
have PSPICE simulate the circuit with a large number of incremental values for Vo. A plot of the current
I4 will be generated, and the location where I4 = 0.5mA will correspond to the value of Vo.
Necessary Parts: VDC, R, EGND
Schematic Setup:
13) Build the circuit shown in the example and set all the values of the resistors. The VALUE of
VDC can be left at 0V because the DC Sweep will be used to give it values.
14) The EGND part (or another reference part) must be placed in all circuits, so put it in the bottom
right corner of the circuit.
15) Double-check the all connections and component values with Figure 2.25.1. The arrow above R5
will be explained shortly, so do not be concerned with it yet.

Figure 2.25.1

Simulation Setup:
5) Go to the Analysis setup menu, Analysis/Setup and check the box beside DC Sweep.
6) Now click on the button labeled DC Sweep. This will bring up the menu for the DC Sweep
simulation.
7) Select the VoltageSourceand Linear options, and then input this information for the remaining
boxes.

10

Name:Vo

StartValue:0

EndValue:100

Increment:0.5

Note that Name refers to the Reference Designator given to the voltage source in the schematic.
The source was renamed from V1 to Vo to match the example. Figure 2.25.2 shows the menu
filled out correctly.
8) Now a current marker will have to be placed to monitor the current I4. To place this marker go to
Markers/Mark Current Into Pin. Place this marker on the top pin of the R that I4 travels
through, this location is shown in Figure 2.25.3.
9) Save the schematic and run the simulation.

Figure 2.25.2

Analysis:
After the circuit finishes simulating, a plot of the current I4 versus the input voltage Vo will be
displayed. It can be seen in Figure 2.25.4. Now use the Cursor to find the location which corresponds to
0.5mA. Enable and use the cursor by following these steps:

11

Figure 2.25.3

1. Select Trace/Cursor/Display from the menus. The Probe Cursor window will appear, and it
can also be seen in Figure 2.25.5.
2. Now left-click on the plot at the point which most closely corresponds to 0.5 mA.
3. Fine tune this location by dragging the cursor by holding the left mouse button down or by using
the left/right arrow keys on the keyboard.
4. The Probe Cursor window will display the value the cursor reads in an A1=XValue,YValue
order.
Since the Vo is measured on the X-axis, the simulation gives a result of,
Vo 36 V
1.5mA
C
u
r
r
e
n
t 1.0mA

Current through R5 as a Function of Vo

0.5mA

0A
0V

50V

100V

-I(R5)
V_Vo
Figure 2.25.4

12

Figure 2.25.5

13

Example2.28
This example requires a current-controlled current source (CCCS). The BUBBLE part is also
introduced in this example to clean up the wiring of dependant sources in PSPICE.
Necessary Parts: IDC, F, R, BUBBLE, EGND
Schematic Setup:
1) Build the schematic shown in the example minus the CCCS and set all the values. Dont forget
the EGND part; place it on the reference side of Vo.
2) Now get the CCCS, which is part F. This part does not look like the one in the example from the
book. Notice that it has four pins on it; two are used for the supplied current and two are used for
the controlling current. The side with the current source picture is the supply side. Connect the
supply side of F into the circuit.
3) BUBBLE parts will be used to connect the controlling current to F. The BUBBLE part acts as a
go to here part, and they must be used in groups of two or more. When PSPICE simulates a
schematic it will connect BUBBLE parts that have the same name. For this circuit, four
BUBBLE parts will be necessary. Connect them as shown in Figure 2.28.1. Notice that
connecting a current with BUBBLE parts requires that the circuit be broken.
4) Now give the BUBBLE parts names to connect the appropriate ones together. Descriptive names
are best. In Figure 2.28.1 the names Io+ and Io are used because they also identify the direction
the current is flowing.

Figure 2.28.1

5) Left-click on F to highlight it in red. Now open its attributes menu by going to


Edit/Attributes Figure 2.28.2 shows this menu.
6) F must be given a gain that matches the CCCS in the example problem. Double click the line in
the menu that says GAIN and set it equal to 4. Click the button that says SaveAttr and the number
in the listing for GAIN should now change to 4.

14

Figure 2.28.2

7) Now label the positive side of Vo as Vo. Select the piece of wire in this location and open its
attributes menu (or just double-click it). Type in Vo for the name. Naming important locations in
schematics is often helpful.
8) Figure 2.28.3 shows what the final PSPICE schematic will look like.
Simulation Setup:
Run a Bias Point Detail on this schematic.
Analysis:
Display the voltages on the schematic (Analysis/Display Results on the Schematic/Enable
Voltage Display).
Vo = 8 V

Figure 2.28.3

15

Chapter3Examples

16

Example3.2
This example is looking for all the node voltages in the circuit. PSPICE will do this rapidly with
the Bias Point Detail.
Necessary Parts: IDC, R, EGND
Schematic Setup:
1) Build the circuit shown in the example and set all the parts values.
2) For nodal analysis problems, it is important to place EGND where the reference is designated in
the problem. Be mindful of when the example schematic dictates this.
3) The schematic should appear as it does in Figure 3.2.1.
Simulation Setup:
Run a Bias Point Detail.
Analysis:
Display the voltages on the schematic. The Bias Point Detail analysis finds the node voltages, so
the displayed voltages are the node voltages for which the example asks. These voltages can also be seen
in Figure 3.2.1.

Figure 3.2.1

17

Example3.4
This example asks for the node voltages of the circuit, and there is a voltage controlled current
source present in the circuit. A Bias Point Detail makes quick work of this circuit.
Parts required: IDC, G, R, BUBBLE, EGND
Schematic Setup:
1) Construct the circuit shown in Figure 3.4.1.
2) Note how the BUBBLE part is used. For a controlling voltage the BUBBLE parts are simply
attached across the desired voltage.
Simulation Setup:
Simulate this circuit with a Bias Point Detail analysis.
Analysis:
Enable the display of voltages on the schematic (Analysis menu). Figure 3.4.1 also shows the
schematic with node voltages displayed.

Figure 3.4.1

18

Example3.7
The value of Io is easily found with a Bias Point Detail.
Necessary Parts: VDC, R, EGND
Schematic Setup:
1) Be careful when placing the 6 V VDC while constructing the circuit, its orientation is
opposite the other two.
2) The finished schematic is shown in Figure 3.7.1.
Simulation Setup:
Run a Bias Point Detail.
Analysis:
Display currents on the schematic, and locate the one that corresponds to Io. This is only a
magnitude of Io, and the current could be flowing either way through this branch. To determine the
direction of Io, click on the magnitude of the current. This will display a red arrow, see Figure 3.7.1. This
arrow gives the direction in which the current is flowing. Since this is opposite that of the given direction
of Io, the answer will be negative.
Io = 428.57 A

Figure 3.7.1

19

Example3.9
This example asks for the current Io. A Bias Point Detail is used to find this value.
Necessary Parts: VDC, E, R, EGND
Schematic Setup:
1) The PSPICE schematic for this example can be seen in Figure 3.9.1.
2) Use BUBBLE parts to connect the controlling voltage into E.
3) In E, set GAIN=2
Simulation Setup:
Run a Bias Point Detail.
Analysis:
Display currents on the schematic to see the magnitude of the Io. Its direction needs to be
checked though, so left-click on magnitude. This will display a red arrow in the direction of current flow
on the branch Io is flowing through. Since this arrow and the given direction of Io are pointing in the same
direction, the magnitude of Io is positive.
Io = 375.00 A =

mA

20

Figure 3.9.1

21

Example3.10
Bear in mind that the only voltage of interest in this example is Vo. Since the node voltages
measured from the designated reference node are not necessarily important to solving for Vo, EGND can
be placed elsewhere for easier PSPICE analysis. A Bias Point Detail then provides the solution.
Necessary Parts: VDC, IDC, E, R, EGND
Schematic Setup:
1) Ignore the reference placement (EGND) given in the example schematic. Build the circuit as
shown otherwise, and use BUBBLE parts to connect the controlling voltage to E.
2) Now place EGND on the node from which Vo is referenced (the node with Vos minus sign, see
Figure 3.10.1). Note that while doing this simplifies this examples PSPICE solution, it will also
give different node voltages compared to those shown in the textbooks hand solution.
3) Set the GAIN on E. GAIN = 2.
4) Figure 3.10.2 shows the simulation schematic.

Figure 3.10.1

Simulation Setup:
Due to the placement of EGND, a Bias Point Detail will be all that is required by this example.
Analysis:
Simply locate the voltage associated with Vo. The placement of EGND means that this will be
the voltage given to the node on top of the circuit. Figure 3.10.2 shows Vo displayed on the schematic.
Vo = 1 V

22

Figure 3.10.2

23

Example3.11
A supernode technique is not required in PSPICE! A Bias Point Detail will solve this quickly.
Necessary Parts: VDC, E, F, R, EGND, BUBBLE
Schematic Setup:
1) Take care when placing the 6 V VDC due to its orientation.
2) Remember to break the circuit when using the BUBBLE parts to connect Ix into F.
3) Figure 3.11.1 shows the final schematic.
Simulation Setup:
Simulate the circuit with a Bias Point Detail.
Analysis:
Display the currents on the schematic. Doing so shows the magnitude of Io, but the sign still
needs to be determined. Click on the magnitude shown on the schematic, this displays a red arrow
showing the direction of the current, see Figure 3.11.1. The answer is then,
Io = 48 mA

Figure 3.11.1

24

Example3.16
Supermesh approaches are not required in PSPICE, the Bias Point Detail will do all that is
required.
Necessary Parts: VDC, IDC, R, EGND
Schematic Setup:
1) Even though there is no reference labeled in the examples schematic diagram, PSPICE
requires that one be designated. So dont forget the EGND.
2) The simulation schematic can be seen in Figure 3.16.1.
Simulation Setup:
A Bias Point Detail will yield the requisite information.
Analysis:
Display the current on the schematic, and check its direction by clicking on the magnitude. The
answer is then found to be,
Io = 1.333 mA

Figure 3.16.1

25

Example3.18
This example requests the voltage Vo, measured across the 6 k resistor.
Necessary Parts: VDC, IDC, G, R, BUBBLE
Schematic Setup:
1) Draw the circuit, using BUBBLE parts to connect Vx into the voltage-controlled current source
(G).
2) Set the dependant sources GAIN at 0.5m.
3) Place the ground part, EGND, on the node that Vo is measured from. This will be the bottom
node. This location can be seen in Figure 3.18.1.
Simulation Setup:
Save the circuit and run a Bias Point Detail.
Analysis:
Display the node voltages on the schematic to find,
Vo = 8.25 V
This voltage is shown on the schematic in Figure 3.18.1.

Figure 3.18.1

26

Example3.19
This example asks for the loop currents of a circuit containing numerous sources. Since PSPICE
will only calculate branch currents, only the currents that are in a single loop are reliable. Loop current I2
presents an issue because PSPICE does not label the current through a VCCS. I2 can still be displayed by
tricking PSPICE with a dummy voltage source.
Necessary Parts: IDC, VDC, H, G, R, EGND, BUBBLE
Schematic Setup:
1) Use the BUBBLE parts to connect the dependant sources controlling current and voltage. Do
not forget to break the circuit at Ix.
2) On the I2 loop, add a dummy voltage source with VALUE = 0, see Figure 3.19.1.
3) Place EGND as seen in Figure 3.19.2.

Figure 3.19.1

Simulation Setup:
A Bias Point Detail is all that is required to simulate this circuit.
Analysis:
Display the currents on the schematic and locate the values which only flow through a single
loop. For this circuit, the correct currents are those that flow through the sources. Figure 3.19.2 shows
the final display of the circuit with the correct currents displayed. Notice the direction of each current,
which is given by the red arrows; this arrow will determine the sign of the current.
I1 = 4 mA
-6 mA
I3 =
I1 = -2 mA
27

I3 =

-10 mA

Figure 3.19.2

28

Chapter5Examples

29


Example5.6
This examples instructions are to use Thvenins and Nortons equivalent circuits to find Vo.
PSPICE is able to generate Vo without any special techniques, but it can also be made to find the relevant
information for the equivalent circuits. VTh is found by using a dummy resistor, and then a dummy DC
voltage source is used to find IN.
The voltages and current will be found by a Bias Point Detail. The equivalent resistances will be
found using a Transfer Function simulation. Each solution requires its own schematic, and each will be
described.
Necessary Parts: VDC, IDC, R, EGND
Schematic Setup:
Direct Solution:
16) Sketch the schematic given in the book.
17) Place EGND as seen in Figure 5.6.2.
Thvenins Equivalent:
1) Sketch the circuit shown in Figure 5.6.3.
Nortons Equivalent:
1) Sketch the circuit shown in Figure 5.6.4.
Simulation Setup:
Direct Solution:
A Bias Point Detail is all that is necessary for the direct solution.
Thvenins Equivalent:
1) Open the Analysis Setup menu and check the boxes for Bias Point Detail and Transfer
Function.
2) Click on the Transfer Function button and fill out the menu as seen in Figure 5.6.1.
3) Run the simulation.

30

Figure 5.6.1

Nortons Equivalent:
1) Open the Analysis Setup menu and check the boxes for Bias Point Detail and Transfer
Function.
2) Click on the Transfer Function button and fill it out as follows:

Output Variable: I(Vdummy)

Input Source: I1

Analysis:
Direct Solution:
Display the voltages on the schematic and find Vo. The final circuit can be seen Figure 5.6.2.
Vo = 6 V
Thvenins Equivalent:
Display the voltages on the schematic to find Voc, see Figure 5.6.3. RTh is found in the output file
and is labeled OUTPUT RESISTANCE AT V(Vo).
VTh = Voc

= 9V

RTh = 3 k
Nortons Equivalent:
Display the currents on the schematic to find ISC, see Figure 5.6.4. RN is found in the output file
and is labeled OUTPUT RESISTANCE AT I(Vdummy).
VTh = ISC

= 3 mA

RN = 3 k
31

Figure 5.6.2

Figure
5.6.3

Figure 5.6.4

32

Example5.9
This example is looking for the Thvenin equivalent circuit at the terminals A and B. To
accomplish this goal, a 1 V source, Vo, is connected and the current Io is found by a Bias Point Detail.
Then the equivalent resistance is computed using a Transfer Function analysis.
Necessary Parts: VDC, E, R, EGND, BUBBLE
Schematic Setup:
18) In the attributes menu of the VCVS, E, set GAIN = 2
19) The BUBBLE parts are used to connect the controlling voltage to the dependant source, see
Figure 5.9.1.
Simulation Setup:
10) Instruct PSPICE to do a Bias Point Detail and a Transfer Function simulation.
11) Setup the Transfer Function analysis as follows:
Output Variable: V(V1)
Input Source:
V1
Analysis:
Display the currents on the schematic to find Io. RTh is found in the output file and is labeled
INPUT RESISTANCE AT V_V1
Io = 1.071 mA
RTh = 9.333E+2 = 0.933 k

33

Figure 5.9.1

Example5.10
This example asks for the Thvenin equivalent resistance RTh. A current source is added to the
circuit to allow the simulation to work, and a Transfer Function simulation is used to find RTh.
Necessary Parts: IDC, H, R, EGND, BUBBLE
Schematic Setup:
20) In the attributes menu of H, set GAIN = 2000.
21) Do not forget to break the circuit at Ix with the BUBBLE parts to connect the controlling current
to the dependant source.
22) See Figure 5.10.1 for the PSPICE schematic.
Simulation Setup:
12) Enable a Transfer Function simulation and set the menu items as follows:

Output Variable: V(Vo)


Input Source:
I1
13) Run the simulation.
Analysis:
Open the output file, RTh will be labeled as INPUT RESISTANCE AT I_I1.

34

RTh

= 1.429 k

Figure 5.10.1

Example5.11
PSPICE will be used in this example to calculate the output voltage, Vo, directly. It will also be
used to calculate the values necessary for constructing the Thvenin equivalent circuit.
For the direct solution, only a Bias Point Detail will be necessary. The Thvenin equivalent
values will require the use of both a Bias Point Detail and a Transfer Function simulation. A dummy
resistor is used to convince PSPICE to determine the voltage VOC.
Necessary Parts: VDC, H, R, EGND, BUBBLE
Schematic Setup:
Direct Solution:
23) Construct the circuit as seen in Figure 5.11.1.
24) In the attributes menu of H, set GAIN=2000. Also, be mindful of the polarity of this part.
Thvenin Solution:
1) Construct the circuit seen in Figure 5.11.2.
2) In the attributes menu of H, set GAIN=2000. Also, be mindful of the polarity of this part.

35

Figure 5.11.1

Figure 5.11.2

Simulation Setup:
Direct Solution:
A Bias Point Detail is all that is necessary to determine Vo.
Thvenin Solution:
In the Analysis Setup menu, enable both a Bias Point Detail and a Transfer Function
simulation. Setup the Transfer Function simulation as follows:
OutputVariable:
V(Voc)
InputSource:
V1
Analysis:
Direct Solution:
Figure 5.11.1 shows the results of the Bias Point Detail.

36

Vo= 2.571V
Thvenin Solution:
Figure 5.11.2 shows the results of the Bias Point Detail for the Thvenin solution. The value for
RTh can be found in the output file and is labeled OUTPUTRESISTANCEATV(Voc). An excerpt of the
output file can be seen in Figure 5.11.3.

VTh= VOC=6.00V
RTh= 0.3333k

Figure 5.11.3

Example5.12
PSPICE will be used to directly simulate the output voltage and also generate the Thvenin
equivalent values. Both the output voltage and the Thevenin equivalent voltage will be acquired via a
Bias Point Detail, and a Transfer Function simulation will yield the Thvenin equivalent resistance.
Necessary Parts: VDC, IDC, G, R, EGND, BUBBLE
Schematic Setup:
Direct Solution:
25) Construct the circuit shown in Figure 5.12.1
26) In the Attributes menu for G, set GAIN = 500u
Thvenin Solution:
37

1) Construct the circuit shown in Figure 5.12.2


2) In the Attributes menu for G, set GAIN = 500u
Simulation Setup:
Direct Solution:
A Bias Point Detail is all that will be necessary for the direct solution.
Thvenin Solution:
1) Enable both a Bias Point Detail and a Transfer Function simulation.
2) In the Transfer Function menu, input the following:
Output Variable: V(Voc)
Input Source: V1

Figure 5.12.1

38

Figure 5.12.2

Figure 5.12.3

Example5.14
This example asks the reader to perform source transformations to find the voltage Vo. PSPICE
will find this solution immediately, and therefore can be a welcome sanity check after working such
problems by hand.
Necessary Parts: VDC, IDC, R, EGND
Schematic Setup:
1) Sketch the circuit in schematics and set all the component values.
2) Do not forget to place the EGND part to label the reference node. Place this part on the bottom
node, the node connecting to the minus side of Vo. Figure 5.14.1 shows the finished schematic.
Analysis Setup:

39

3) Simulate the circuit using a Bias Point Detail.


4) Enable PSPICE to display the node voltages on the schematic.
Analysis:
Enable PSPICE to display the node voltages on the schematic. Inspecting these node voltages
will verify that,
Vo = 8 V

Figure 5.14.1

40

Example5.16
This example is looking for the value of RL that will result in maximum power transfer. PSPICE
accomplishes this through use of the part PARAM, and a DC Sweep analysis.
Necessary Parts: VDC, IDC, R, EGND, PARAM
Schematic Setup:
1) Sketch the circuit and do not forget the EGND. Set all component values except for RL.
2) For RL, set VALUE to {RVal}. Note that the name RVal is only used because it is distinctive, any
name can be used in the place of RVal. The curly braces, however, are mandatory.
3) Find and place the part PARAM. This part does not wire into the schematic, so it can be placed
anywhere that is convenient. Figure 5.16.1
4) Open the attributes menu for PARAM. Set the following:
NAME1= RVal
VALUE1= 1k
5) NAME1 must match VALUE from RL, but no curly braces here. VALUE1 is the default for VALUE
and is used during a Bias Point Detail.

Figure 5.16.1

6) Figure 5.16.2 shows the finished schematic.


Simulation Setup:
1) A DC Sweep analysis will be used to find the value of RL that results in maximum power
transfer. Go to Analysis/Setup to configure the sweep.
2) Figure 5.16.3 displays the necessary settings for the DC Sweep. Set the following:
SweptVar.Type:
Name:
StartValue:
EndValue:
Increment:

GlobalParameter
RVal
500
20k
0.1k

41

These settings will result in the simulation incrementing through all resistance values from 500
to 20k by increments of 100.

Figure 5.16.2

Figure 5.16.3

42

3) Run the simulation.


Analysis:
The results for this simulation will at first appear disappointing. There will be nothing plotted on
the simulation output! To find the value of RL that results in maximum power transfer:
1) Add a trace by going to Trace/Add Trace This will bring up a two-columned menu.
2) In the left-hand column find and select W(RL). Click OK. This will add the curve shown in
Figure 5.16.4.
P
o
w
e
r

5.0mW
Power Transferred to RL

2.5mW

0W
0

5K

10K

15K

20K

W(RL)
RVal
Figure 5.16. 4

3) Now enable the cursor, Trace/Cursor/Display.


4) Though the peak is easily seen, eyeballing the location of the maximum is imprecise. So get
PSPICE to find it by selecting Trace/Cursor/Max.
The cursor returns a result that maximum power transfer will occur when,
RL = 6 k

43

Example5.17
In this example the desired answers are a value for RL that produces maximum power transfer and
also the value of power transferred when this RL is used. A DC Sweep in conjunction with making the
value of RL a parameter will produce a solution with PSPICE.
Necessary Parts: IDC, H, R, EGND, BUBBLE, PARAM
Schematic Setup:
27) Do not forget to break the circuit when using the BUBBLE parts to connect the controlling
current to H.
28) Set GAIN=2000 in the attributes menu for H.
29) Label the resistor RL, RL and set VALUE={RVal}
30) Place the PARAM part and open its attributes menu. Set the following:
NAME1= RVal
VALUE1= 1kohm
31) The complete schematic is shown in Figure 5.17.1.

Figure 5.17.1

44

Simulation Setup:
14) In the DC Sweep menu, select GlobalParameter and Linear, and set the following:
Name:
StartValue:
EndValue:
Increment:

RVal
10
20k
10

15) Run the simulation.


Analysis:
Add the trace of W(RL) to the plot, it can be seen in Figure 5.17.2. Now enable the cursor and
have it locate the maximum of this trace. This produces the results,

RL = 6 k
PL = 2.6667 mW
The cursor results can be seen in Figure 5.17.3. Cursor B1 was used when finding the maximum
of the power trace.
P
o
w
e
r

3.0mW
Power Transferred to RL

2.0mW

1.0mW

0W
0

5K

10K

15K

20K

W(RL)
RVal
Figure 5.17.2

45

Figure 5.17.3

46

Example5.18
In this example, outputs are measured against the ratio of resistors. The same information can be
achieved in PSPICE by plotting these outputs against an array of values for R2.
Necessary Parts: VDC, R, EGND
Schematic Setup:
32) Place and wire the circuit. Figure 5.18.1 shows the completed schematic.
33) In R2, set VALUE={RVal}
34) Setup the PARAM part as follows:
NAME1= RVal
VALUE1= 1
Simulation Setup:
16) Configure a DC Sweep analysis as done in Example 5.16 to increment the resistor R2.
17) For the range of values for RVal, use:
StartValue: 0.1
EndValue: 20
Increment: 0.1

Figure 5.18.1

47

Analysis:
Add these traces to create Figure 5.18.1:

8.0
P
a
r
a
m
e
t
e
r
s 4.0

Pout

W(R2)

Vout

V(R2:1)

Current

I(R2)

Pout / Pin

W(R2)/W(Vin)

Max Power Transfer Parameters

Vout

Pout
Current
Pout/Pin
0
0
W(R2)

5
V(R2:1)

10
15
- W(R2)/ W(Vin)
RVal
Figure 5.18.2

20

I(R2)

Because current direction and voltage on a part depend on how the part is oriented in the circuit,
some of these curves may turn out negative. Tinker with the parts to make sure the pins are oriented in
the necessary way to achieve the desired plots.
There will not be a listing in the left column of the Trace/Add Trace... menu for efficiency. So
to create this plot, the expression for efficiency must be manually entered into the bar at the bottom of the
Add Trace menu. Efficiency is calculated by:
W(R2)/W(Vin)
The negative sign is present because W(Vin) is providing power to the circuit and W(R2) is consuming the
power provided by W(Vin). The values are therefore oppositely directed. Efficiency is only concerned

48

with one magnitude compared with the other however, and so the negative multiplier is used to give a
positively valued result.

49

Chapter6Examples

50

Example6.2
This example dictates that a specific voltage waveform be applied to a capacitor. This waveform
is comprised of linear segments, so a piecewise linear voltage source will be used. This example also
requires that the output be monitored over time, so a Transient analysis will be used.
Necessary Parts: VPWL, C, EGND
Schematic Setup:
35) Use VPWL as the voltage source to construct the circuit shown in Figure 6.2.1.
36) In the attributes menu for C, set VALUE=5uF

Figure 6.2.1

37) Now open the attributes menu for the VPWL source. There will be a list of T attributes and V
attributes. T standing for time; V standing for voltage. There will be a number associated with all
of these, e.g. T1 and V1,T2andV2,etc. These will create a piecewise linear voltage output
connecting the points created by the T and V attributes. Set these attributes as follows to create
the correct input waveform for this example:
T1
V1
T2
V2
T3
V3

=
=
=
=
=
=

0s
0V
6ms
24V
8ms
0V

Simulation Setup:
18) Open the Analysis Setup menu and check the box beside Transient Analysis. Open the
Transient Analysis menu.
19) Leave all the boxes blank except the following:
PrintStep: 0ns
FinalValue: 10ms

51

20) Run the simulation.


Analysis:
Notice that when the plot window opens that the X axis is referenced to time. Add a trace for
V(v_t:+), this should look like the given waveform from the example.
The magnitude of the current is going to be much less than that of the voltage, so add an
additional Y axis to the plot so another scale can be used. Add a Y axis by clicking Plot/Add Y Axis.
Now add the trace of I(C) to the plot. The plot should now look similar to the one in Figure 6.2.2.
30V
V
o
l
t
a
g
e 20V

10V

0V

C
u
r
r
e
n
t

40mA

0A

-40mA

>>
-80mA
0s
1

V(v_t:+)

5ms
I(C)
Time
Figure 6.2.2

10ms

52

Example6.3
This example continues the work accomplished in Example 6.2. The energy at a specific time is
now of interest and finding it will be accomplished with the use of search functions.
The setup and simulation aspects of this example are the same as Example 6.2, so the analysis is
all that is of interest in this solution.
Analysis:
Clear the plots accomplished in Example 6.2. Add the trace of energy by typing this expression
into the text box at the bottom of the Add Trace menu:
0.5*5u*PWR(V(v1),2)
This is the expression for the capacitors energy in the syntax of PSPICE. The PWR(A,B) raises the value
A to the power B. Note that use of V(v1) requires that the node in the schematic be labeled as is shown in
Figure 6.2.1. The resulting plot is shown in Figure 6.3.1.
Now enable the cursor. Dragging the cursor is simple, but will be difficult to place just right at
times. Instruct PSPICE to find the value at 6ms by selecting Trace/Cursor/Search Commands Type
the following command into the dialog box that appears:
searchforwardxvalue(6ms)
This will tell the cursor to find the point where X = 6ms. The cursor gives the result:
Energy = 1.4400m
E
n
e 1.5m
r
g
y

Energy Stored in Capacitor's E-Field

1.0m

0.5m

0
0s

2ms
4ms
0.5*5u*PWR(V(v1),2)

6ms

8ms

10ms

Time

53

Figure 6.3.1

54

Example6.6
This example applies a piecewise linear current to an inductor and asks for the voltage waveform
across the inductor. This simulation will need to be conducted in the time-domain so a Transient
analysis will be performed.
Necessary Parts: IPWL, L, EGND
Schematic Setup:
38) Create the schematic seen in Figure 6.6.1. Be mindful of the orientation of i_t (IPWL), the +
terminal is on the bottom of the part.
39) The following information is to be entered into the attributes menu for i_t:
T1
I1
T2
I2
T3
I3

=
=
=
=
=
=

0s
0A
2ms
20mA
4ms
0A

Figure 6.6.1

Simulation Setup:
1) Setup a Transient Analysis to run as follows:
PrintStep: 0ns
FinalTime: 5ms

2) Run the simulation.

55


Analysis:
Add a trace for V(v1), then add a new Y axis before adding the trace I(L).
V
o
l
t
a
g
e

100mV

C
u 20mA
r
r
e
n
t

Induced Voltage on Inductor

Current

Voltage
0V

-100mV

10mA

>>
0A
0s
1

V(v1)

2.0ms
I(L)

4.0ms

6.0ms

Time
Figure 6.6.2

56

Example6.7
Solving for the voltage and energy on a current-fed inductor is simple in PSPICE. Since a timevarying source is used, this circuit must be analyzed in the time domain. This means using a Transient
Analysis.
Necessary Parts: ISIN, L, EGND
Schematic Setup:
40) Create the circuit shown in Figure 6.7.1.
41) Set the following attributes of ISIN
IOFF
IAMPL
FREQ

=
=
=

0
2A
60Hz

Figure 6.7.1

Simulation Setup:
21) To set up the Transient Analysis, go to the analysis setup menu. Click the checkbox beside
Transient Analysis and then click the Transient Analysis button to configure the simulation.
22) This is where the length of time analyzed is set. Enough time needs to be allocated to cover full
periods of the source waveform. Set the following:
PrintStep: 0
FinalTime: 35ms
23) Run the simulation.
Analysis:

57

Display the trace of V(L:1). Notice that this waveform is sinusoidal. Now enable the cursor and
find the maximum; this gives the amplitude:
|VL| = 1.5096 V
To plot the energy in the inductor requires this expression to be typed into the Trace Expression
box at the bottom of the Add Trace window,
0.5*2m*PWR(I(L),2)
It is then seen that the energy is also a sinusoid, and having the cursor find the maximum results in,
|EnergyL| = 3.9702 mJ
The waveforms for this example can be seen in Figure 6.7.2.
V
o
l
t
a
g
e

2.0V

4.50m
E
n
e
r 3.75m
g
y

Voltage and Energy in Inductor

2.50m
0V

1.25m

>>
-2.0V

0
0s
1

V(L:1)

10ms
2

20ms
0.5*2m*PWR(I(L),2)
Time
Figure 6.7.2

30ms

40ms

58

Example6.10
To create the voltage waveform in this example requires a piecewise linear voltage source. A
Parametric analysis is then used in conjunction with a Transient analysis to generate the plots of
currents in the capacitor.
Necessary Parts: VPWL, C, PARAM, EGND
Schematic Setup:
42) Sketch the given circuit diagram using VPWL for the voltage source.
43) Open the attributes menu for VPWL by double-clicking the parts symbol. Input the following
attributes:
T1
V1
T2
V2
T3
V3
T4
V4
T5
V5
T6
V6

=
=
=
=
=
=
=
=
=
=
=
=

0s
0V
1s
3V
2s
3V
3s
3V
4s
3V
5s
0V

VPWL fills the space between time instances with a linear segment that connects the two voltage
levels.
44) Set the VALUE of C to {CVal}. Be sure to include the curly braces.
45) Place and setup PARAM with:
NAME1
VALUE1

=
=

CVal
100nF

Figure 6.10.1 shows the completed circuit for this example.

59

Figure 6.10.1

Simulation Setup:
24) First configure a Transient analysis to run for 7 seconds.
25) Now open the menu for a Parametric analysis. It should look quite similar to the menu for a DC
Sweep, and will be setup in much the same way.
26) Select GlobalParameter, and since there are only two values of capacitance that are of interest
select ValueList. Now enter the following for the options:
Name: CVal
Values: 80nF120nF
Notice that there is no delimiter between the two values. Put only a whitespace.
27) Simulate the circuit.
Analysis:
Once the circuit is simulated a dialog box will appear entitled AvailableSections. It lists the two
simulations that resulted from Parametric analysis. Select all of them and click OK.
Add the trace V(vt:+) to the graph. Now go to Plot/Add Y Axis to add a second Y-axis to the
graph. This has to be done for scale purposes, the currents are measured in mA compared to the voltage
being measured in V. Now add the trace for I(C) to the plot. It should add two traces, one for each value
of capacitance in the ValueList. The final graph should look like Figure 6.10.2.

60

V
o
l
t
a
g
e

4.0V

0V

C
u
r
r
e
n
t

800nA
Max and Min Currents for 20% Tolerance Cap.

500nA

0A

-500nA
>>
-4.0V

-800nA
0s
1

2.0s
V(vt:+) 2

4.0s
I(C)
Time

6.0s

8.0s

Figure 6.10.2

Example6.11
This example demonstrates the effects of a 10% tolerance on inductor value by examining the
voltage across it. A piecewise linear current source drives current through the inductor, and the circuit is
simulated with Transient and Parametric analyses.
Necessary Parts: IPWL, L, EGND, PARAM
Schematic Setup:
46) Build the circuit shown in the example using IPWL for the current source. This current source is
labeled with + and polarity indicators. Remember that current flows from + to when orienting
this source. Figure 6.11.1 shows the completed schematic.
47) Use the given current waveform to determine the times and currents to configure IPWL.
48) On the L, set VALUE to {LVal}, and create an entry in the PARAM part for this parameter.
49) Use the minus side of v(t) as the reference node, and name the other node v_t.

61

Figure 6.11.1

Simulation Setup:
28) Configure a Transient analysis to run from 0s to 60us.
29) Set the Parametric analysis to use a GlobalParameter and ValueList. Fill the in the boxes with
the following:
Name: LVal
Values: 90uH110uH
Note that there is no delimiter between the values in Values, only whitespace.
30) Simulate the circuit.

62

Analysis:
Add the trace of the source current to the plot. Since the order of magnitude of the current and
that of the voltages is different, a second Y-axis will be necessary. Once the second Y-axis is present, add
the trace of V(v_t).
The final graph should appear as it does in Figure 6.11.2.

C
u
r
r
e
n
t

150mA

100mA

V
o
l
t
a
g
e

2.0V
Max and Min Voltages for 10% Tolerance Ind.

0V

0A

-2.0V

-100mA
>>
-150mA

-4.0V
0s
1

I(i_t)

20us
2

40us

60us

V(v_t)
Time

Figure 6.11.2

63

Chapter7Examples

64

Example7.1
This example asks for the current flowing from a charged capacitor through a resistor. PSPICE
will require two switches to mimic the action of the switch in the example, and a Transient simulation
will be used to acquire the current i(t) when t > 0.
Necessary Parts: VDC, R, C, EGND, Sw_tClose, Sw_tOpen
Schematic Setup:
50) Construct the circuit shown in Figure 7.1.1
51) U1 is the Sw_tOpen part because this part of the circuit opens at t = 0s. U2 is the Sw_tClose
part because this branch of the circuit is connected at t = 0s.
52) Place a current marker on R2 (as seen in Figure 7.1.1) by going to Markers/Mark Current into
Pin.
Simulation Setup:
31) Enable a Transient simulation in the Analysis Setup menu.
32) Open the Transient simulation menu by clicking on the Transient button in the Analysis
Setup menu. Input this information.
Print Step: 0s
Final Time: 2s
33) Run the simulation.

Figure 7.1.1

Analysis:

65

The PROBE program will appear after the simulation finishes and on it will show the current
through the resistor R2, seen in Figure 7.1.2. This current is i(t), and since the switches open/close at t =
0s, the current trace if for t > 0. If the current marker had not been placed, the plot window would
originally be empty; the current trace could then have been added by manually adding the trace to the
plot.
Enable the cursor (Trace/Cursor/Display) and check the value of i(t) at t = 0s, this should be the
initial position of the cursor. Figure 7.1.3 shows the Cursor output window when reading i(t) at t = 0s
i(0)

= 1.333 mA

1.5mA
C
u
r
r
e
n 1.0mA
t
i(t) for t > 0
0.5mA

0A
0s

0.5s

1.0s

1.5s

2.0s

I(R2)
Time
Figure 7.1.2

Figure 7.1.3

66

Example7.2
This example asks for the voltage vo(t) for t > 0s. A Transient simulation will be used to find the
output voltage.
Necessary Parts: VDC, R, EGND, Sw_tOpen
Schematic Setup:
1) Figure 7.2.1 shows the necessary schematic for this simulation.
2) Be careful with the polarity of the voltage source Vs2.
3) Switch U1 is a Sw_tOpen that has tOpen = 0s
4) Place a voltage marker on the node between L and R3, this is the voltage vo(t). Placing this
marker will plot the waveform immediately when PROBE opens.

Figure 7.2.1

Simulation Setup:
Enable a Transient Analysis with the following settings:

67

Print Step: 0s
Final Step: 3s
Analysis:
PROBE will appear after running the simulation and display vo(t); this plot can be seen in Figure
7.2.2. Use the cursor to check the initial value of this plot. After finding the initial value, use the cursor
to find the max value.
vo(0) = 2.6777 V
vo max(t) = 5.9918 V
V
o
l
t
a
g
e

6.0V

Vo(t) for t > 0


4.0V

2.0V
0s

1.0s

2.0s

3.0s

V(L:2)
Time
Figure 7.2.2

68

Example7.3
Using PSPICE to find the current i(t) for t > 0 is simple. All that is required is to construct the
circuit and run a Transient simulation.
Necessary Parts: VDC, R, C, EGND, Sw_tClose
Schematic Setup:
1) The schematic used for this simulation is shown in Figure 7.3.1.
2) The selection of which pin on which the current marker is placed will determine the sign of the
output current. If PROBE displays the negative of the desired trace, swap the current marker to
the other pin of R2.
Simulation Setup:
Enable a Transient simulation, and input these values into the Transient menu:
Print Step: 0s
Final Time: 0.4s
Run the simulation.

Figure 7.3.1

Analysis:
PROBE will appear and display the trace of the current i(t) for t > 0s, it should look similar to
Figure 7.3.2. Use the cursor to check the accuracy of the plot against the answer given in the example.
PSPICE will not allow a traces data points to make significant jumps between values. Therefore, the
PROBE plot will have a slope when t = 0, instead of the instant value leap seen in the examples solution.
Use the cursor to find the initial value, maximum value, and then use the mouse to drag the cursor to the
far right of the plot to get an estimate of the traces final value. These values are given below:
i(t = 0) = 2.0067 mA
69

imax = 5.3311 mA
i(t = 0.4) = 4.5577 mA
C
u
r
r
e
n
t

6.0mA

i(t) for t > 0

4.0mA

2.0mA
0s

100ms

200ms

300ms

400ms

I(R2)
Time
Figure 7.3.2

70

Example7.4
This example features another RL circuit. A Transient simulation will provide a trace for the
desired voltage v(t) for t > 0.
Necessary Parts: VDC, R, L, EGND, Sw_tClose
Schematic Setup:
1) Figure 7.4.1 shows the schematic used for this simulation.
2) The markers placed are Differential Voltage markers. Find them under Markers/Mark Voltage
Differential. When placing them, the first left-click will place the + marker, the second left-click
will place the marker.
Simulation Setup:
A Transient simulation is to be used for this example. Enter the following information in the
Transient simulation menu:

Print Step: 0s
Final Time: 5s
Run the simulation.

Figure 7.4.1

Analysis:
PROBE will appear with the voltage trace plotted, see Figure 7.4.2. Use the cursor to validate the
points given on the example solutions waveform.
71

v(t = 0s) = 16 V
v(t = 5s) = 23.403 V
The examples solution says that this waveform approaches 24 V as t , yet the value at t = 5s
is only 23.403 V. The Transient simulation can be performed again for a longer period of time to
validate the solutions claim.
V
o
l
t
a
g
e

24V

v(t) for t > 0

20V

16V
0s

2.5s

5.0s

V(V1:+,R1:2)
Time
Figure 7.4.2

72

Chapter8Examples

73


Example8.14
This example wants all the node voltages and the branch currents in the circuit. The voltage
source is of an AC nature however, so all of the outputs will be in phasor form. PSPICE will calculate
phasor values with print parts that are placed on the schematic. These values are then placed in the output
file after the simulation finishes. An AC Sweep simulation will be used in this example.
Necessary Parts: VAC, R, L, C, EGND, IPRINT, VPRINT1
Schematic Setup:
53) Use the part VAC for the voltage source, and set its magnitude and phase with these attributes:

ACMAG = 24V
ACPHASE = 60deg
54) Label the node above the inductor N1 and the node above the capacitor N2.
55) Place the print parts (IPRINT and VPRINT1) as seen in the final simulation schematic in Figure
8.14.1. The IPRINT parts must be placed in series with the current they measure. Place the
VPRINT1 parts on N1 and N2 to print these two voltages in the output file.
56) Open the attributes menu for the IPRINT part measuring I1, and set these attributes:
AC =
MAG =
PHASE =
PKGREF =

y
y
y
i1

57) Set the attributes of the other two IPRINT parts in the same way, but increase the number on
PKGREF to 2 and 3 for the respective location.
58) Open the attributes menu for the VPRINT1 parts, and set these attributes:
AC = y
MAG = y
PHASE = y

74

Figure 8.14.1

Simulation Setup:
34) An AC Sweep simulation will be used to obtain the phasor voltages and currents. Open the
Analysis Setup menu and check the box beside AC Sweep.
35) Open the AC Sweep menu and fill it out as seen in Figure 8.14.2.
36) Run the simulation.

Figure 8.14.2

Analysis:
After the simulation finishes, open the output file (Analysis/Examine Output). Scan through the
file to find the values of the phasor voltages and currents. Figure 8.14.3 shows an edited version of the
output file. The output information is preserved, but much of the filling material is removed to make it
more concise.
|I1| = 2.713 A

Phase I1 = 29.02 deg

|I2| = 1.818 A

Phase I2 = -11.54 deg


75

|I3| = 2.501 A

Phase I3 = 105.0 deg

|V1| = 16.26 V

Phase V1 = 78.46 deg

|V2| = 7.274 V

Phase V2 = 15.03 deg

Figure 8.14.3

76

Example8.15
This example will be solved here with a PSPICE AC Sweep simulation. Before the simulation
can be run, however, the impedances must be converted to component values.
Necessary Parts: VAC, IAC, R, L, C, EGND, IPRINT
Schematic Setup:
1) Be sure to orient the sources correctly. Remember that current flows from the positive terminal
to the negative terminal on IAC.
2) The values of the inductor and capacitor in this example are given in impedance, but PSPICE
requires that they be entered in Henrys and Farads respectively. Assume that the circuit operates
at 60Hz, then
L = 2.653 mH
C = 2.653 mF
3) Place the IPRINT part as shown in Figure 8.15.1. It is desired that the current Io be given in
rectangular form, so set these values in its attributes menu to display the real and imaginary
portions separately:
REAL = y
IMAG = y
PKGREF = io
The final attribute, PKGREF, will make the output file easier to read by labeling this current
something distinctive.

77

Figure 8.15.1

Simulation Setup:
Enable an AC Sweep simulation. For AC Sweep Type, select Linear. Now configure PSPICE to
run the simulation at 60Hz by entering the following information:
Total Pts: 1
Start Freq: 60
End Freq: 60
Now run the simulation.
Analysis:
Open the output file and locate the portion near the bottom labeled AC ANALYSIS. This is
where the current information for Io will be located, and it should resemble Figure 8.15.2. From this it
can be seen that,
Io = 2.500 j1.500

78

Figure 8.15.2

79

Example8.16
This example desires the voltage Vo from a circuit containing two independent sources as well as
a dependant source. Since PSPICE is being used, the capacitor and inductor impedances must be
converted to units of capacitance and inductance. Finally an AC Sweep simulation will calculate Vo in
phasor form and place it in the output file.
Necessary Parts: VAC, IAC, F, R, L, C, EGND, BUBBLE, VPRINT1
Schematic Setup:
1) For the CCCSs controlling current, use the BUBBLE parts and break the circuit at Ix. This can
be seen in Figure 8.16.1.
2) In the attributes menu for F, set GAIN = 2.
3) Since no frequency information is given, assume that the sources are operating at 60Hz. Based
upon this calculate the values for the inductor and capacitor. These values are:
L = 2.653 mH
C = 2.653 mF
4) Label the node corresponding to Vo, as Vo
5) Place VPRINT1 at Vo and set its attributes to display AC values and the magnitude and phase of
the voltage by setting these attributes:
AC = y
MAG = y
PHASE = y

80

Figure 8.16.1

Simulation Setup:
Enable an AC Sweep analysis. Select the AC Sweep Type to be Linear and fill this in for the
Sweep Parameters:
Total Pts: 1
Start Freq: 60Hz
End Freq: 60Hz
Run the simulation.
Analysis:
Open the output file and scroll down to near the bottom where it is labeled AC ANALYSIS. This
information will be the magnitude and phase of the output voltage. Figure 8.16.2 shows an excerpt from
the output file.
|Vo| = 4.000 V

Phase Vo = 143.1 deg

81

Figure 8.16.2

82

Example8.18
Finding the node voltages by hand on this five-node circuit can be tedious because of the
bookkeeping. PSPICE assures a quick, simple solution by using an AC Analysis.
Necessary Parts: VAC, IAC, R, L, C, EGND, VPRINT1
Schematic Setup:
1) Name all the nodes as they are labeled in the example problem. This will help identify the values
of the voltages in the output file.
2) The inductors and capacitors are given impedance values in the example schematic, so these will
need to be converted into values of inductance and capacitance. Assume 60Hz and these values
will be,
Capacitors:
Z = j1

C = 2.653 mF

Z=

L = 5.305 mH

Inductor:
j2

3) Place a VPRINT1 part on each node. The final schematic can be seen in Figure 8.18.1.
4) In the attributes menu of each VPRINT1 part, set AC, REAL, and IMAG equal to y. This will
enable them. REAL and IMAG are used instead of MAG and PHASE for consistency with the
examples answers.

Figure 8.18.1

83

Simulation Setup:
Enable an AC Analysis that uses a Linear Sweep Type and has these Sweep Parameters:

Total Pts: 1
Start Freq: 60 Hz
End Freq: 60 Hz
Run the simulation.
Analysis:
View the output file (Analysis/Examine Output), and scroll down to around the second half of
the file. Here is where the AC Analysis portion begins. See Figure 8.18.2 for an abridged version of the
output file that shows the AC portion.
V1 =
V2 =
V3 =
V4 =
V5 =

10.39
7.076
1.404
3.765
3.414

+ j6.000 V
+ j2.158 V
+ j2.556 V
j2.962 V
j3.677 V

Figure 8.18.2

84

Example8.20
This example desires plots of the magnitude and phase of I and Vout as a function of frequency.
These plots are created with an AC Sweep analysis, which will test the circuit across a wide range of
frequencies.
The magnitude plot for I is then examined to find the frequency associated with maximum |I|.
This frequency is then used with cursor search commands to find the remaining values of I and Vout at
this frequency.
Necessary Parts: IAC, R, L, C, EGND, VPRINT1, IPRINT
Simulation 1:
Schematic Setup:
1) Construct the circuit shown in Figure 8.20.1.
2) Be sure to label the v_o node. This makes it easier to add this trace in PROBE.
Simulation Setup:
Set up an AC Sweep simulation with an ACSweep Type of Decade. Then give it these Sweep
Parameters:
Pts/Decade: 101
StartFreq: 1
EndFreq: 100Meg

Figure 8.20.1

85

Analysis:
PROBE will be blank when it first appears. Add the trace V(v_o). Next add another y-axis and
type P(V(v_o))into the Trace Expression bar at the bottom of the Add Trace menu. The P()command
tells PROBE that the phase of the enclosed trace is desired. Add a new window (Window/New
Window) and repeat this process for the trace I(L).
Figures 8.20.3 and 8.20.4 show the magnitude and phase plots of Vout and I respectively. On the
current plot, use the cursor to find the maximum of the magnitude trace. Enable the cursor, and left-click
on the symbol beside the I(L)at the bottom of the plot window. Find the maximum of this trace. It is
determined that maximum |I| occurs when,
freq=31.264kHz
Now use the second cursor to examine the phase plot by right-clicking on the symbol beside
P(I(L)). Find the value corresponding to 31.264 kHz by using the search command,
sfxv(31.264k)
The sf stands for search forward and the xv means x value. Make sure that the cursortomove
is 2 and click OK. Figure 8.20.2 shows how the search window should appear for this search.

Figure 8.20.2

Now all that remains is to swap over to the plot of Vout and use the cursor and search commands
to find the value of magnitude and phase that correspond to 31.264 kHz. The answer should be as
follows:
|Vout| = 300.968 V
Phase |Vout| = 68.067 deg
|I| = 5.9427 A
Phase |I| = 16.119 deg

86

M
a
g
n
i
t
u
d
e

2.0KV

P
h
a
s
e

100d
Magnitude

Phase
0d

1.0KV

-100d

>>
-200d
1.0Hz
1

0V

V(v_o)

10KHz
P(V(v_o))
Frequency

100MHz

Figure 8.20.3

6.0A
M
a
g
n
i
t
u
d 4.0A
e

2.0A

>>
0A

P
h
a
s
e

40d

Phase

0d
Magnitude

-40d

-80d
1.0Hz
1

I(L)

1.0KHz
1.0MHz
P(I(L))
Frequency

1.0GHz

Figure 8.20.4

87


Example8.21
PSPICE needs to calculate the node voltage Vo in this example. An AC Sweep at 60Hz makes
quick work of this example.
Necessary Parts: VAC, IAC, R, L, C, EGND, VPRINT1
Schematic Setup:
1) Sketch the schematic seen in Figure 8.21.1.
2) Use the Attributes menu for VPRINT1 to enable AC, REAL, and IMAG.
3) Assume that the circuit operates at 60Hz. Calculate the values of inductance and capacitance that
correspond to this frequency given the known impedances. These values are:
L = 2.653 mH
C = 1.326 mF
Simulation Setup:
Enable a Linear AC Sweep Type with the following Sweep Parameters:
Total Pts: 1
Start Freq: 60Hz
End Freq: 60Hz

88

Figure 8.21.1

Analysis:
Examine the output file (Analysis/Examine Output). Scroll down to nearly the bottom of the
file to find the AC analysis portion. Figure 8.21.2 shows an abridged output file with the desired
information. The voltage Vo is,
Vo = 7.399 j4.684 V

Figure 8.21.2

89

Example8.22
This five node circuit would be tedious to solve by hand. Once drawn correctly with the
impedances converted to Henrys and Farads, PSPICE solves it quickly with an AC Analysis.
Necessary Parts: VAC, IAC, E, F, R, L, C, EGND, IPRINT, BUBBLE
Schematic Setup:
1) Sketch the schematic in Figure 8.22.1.
2) Use the BUBBLE parts to connect the controlling voltage and current to their respective
dependant source.
3) In both dependant sources Attributes menu, set GAIN=2.
4) Assume 60Hz and convert the impedances to inductance and capacitance. The values are:
L= 2.653mH
C= 2.653mF
5) In the Attributes menu for IPRINT, enable AC, REAL, and IMAG by setting them equal to y.

Figure 8.22.1

90

Simulation Setup:
Use an AC Sweep with a LinearACSweepType and SweepParameters to simulate 1point at
60Hz.
Analysis:
Open the output file and find the AC Analysis portion, see an abridged version in Figure 8.22.2.
This should show,
Io = 13 j12 A

Figure 8.22.2

91

Chapter9Examples

92

Example9.1
This example deals with finding waveforms of voltage, current, and instantaneous power on the
circuit shown in Figure 9.1.1. Components are derived from the given impedance, and then a Transient
analysis is used for generating the waveforms.
Necessary Parts: VSIN, R, L, EGND
Schematic Setup:
1) Convert the given impedance into rectangular form. It becomes

Z = 1.732 + j1
2) This impedance is represented most easily with a resistor and an inductor with the following
values at 60 Hz:
R = 1.732
L = 2.653 mH
3) The part VSIN is a time-varying voltage source based off a sine wave. Since the voltage in the
example is given as a cosine wave, a phase shift of +90 must be introduced along with the given
phase angle. Input the following into the Attributes menu of VSIN:
VOFF=
VAMPL=
FREQ=
PHASE=

0V
4V
60Hz
150deg

4) Place a current marker on R1 (Markers/Mark Current Into Pin) and a voltage marker at node1
(Markers/Mark Voltage or Level). See Figure 9.1.1 for locations.

93

Figure 9.1.1

94

Simulation Setup:
Use a Transient analysis with the following settings:
PrintStep: 0s
FinalTime: 30ms
Run the simulation.
Analysis:
When PROBE appears, the voltage and current traces will already be plotted. The instantaneous
power trace will need to be calculated by PROBE. Enter the following in the Trace Description box of
the Add Trace menu:
V(node1)*I(L1)
Click OKand the power trace will now be plotted as well. Figure 9.1.2 shows the final plot
window.
8.0
p(t)

4.0

0
i(t)

v(t)
-4.0
0s
V(node1)

10ms
20ms
I(R1)
V(node1)*I(L1)
Time

30ms

Figure 9.1.2

95

Chapter10Examples

96


Example10.4
This example is concerned with mutual inductance. PSPICE uses the K_LINEAR part to
simulate mutual inductance. An AC Analysis will be used in this example.
Necessary Parts: VAC, R, L, C, EGND, K_LINEAR, VPRINT1
Schematic Setup:
1) Assume that this circuit operates at 60Hz, then the values of the inductance and capacitance are as
follows:
Capacitor:
C = 1.326 mF
Inductors:
L1 = 10.61 mH
L2 = 15.92 mH
2) The K_LINEAR part describes the mutual inductance between inductors with the attribute
COUPLING, which is the coupling coefficient, k. The value for k is given by the equation,

Where M is the mutual inductance and L1 and L2 are the inductances of the coupled inductors.
The impedances can also be used in calculating k, but all the units must be the same. For this
example,
k = 0.4082
3) In the Attributes menu for K_LINEAR, set the following:
L1= L1
L2= L2
COUPLING= 0.4082
4) Place VPRINT1 as seen in Figure 10.4.1, and set its attributes to enable AC, MAG, and PHASE
(set them equal to y).
5) Also, do not forget that the L1 and L2 loop both require a reference node for PSPICE to simulate.
This can be accomplished as seen in Figure 10.4.1.

97

Figure 10.4.1

Simulation Setup:
Set up an AC Sweep analysis with a LinearACSweepType and 1point at 60Hz.
Analysis:
Open the output file and find the AC ANALYSIS portion. This will indicate that,
|Vo| = 5.365 V

Phase Vo = 3.425

An excerpt of the output file can be seen in Figure 10.4.2.

Figure 10.4.2

98

Chapter11Examples

99


Example11.4
This example contains a wye-connected three-phase source and delta-connected load. From this
circuit the and line currents are desired to be known. An AC Analysis is used in this circuit.
Necessary Parts: VAC, R, L, EGND, IPRINT
Schematic Setup:
1) The schematic for this simulation can be seen in Figure 11.4.1, sketch it.
2) The ACMAG and ACPHASE attributes must be set for all the sources. The settings are as follows:
Source
Va
Vb
Vc

ACMAG
120V
120V
120V

ACPHASE
30deg
90deg
150deg

3) Be careful when placing the IPRINT parts because they are directional. Place them as they
appear in the figure.

Figure 11.4.1

100

4) Naming the IPRINT parts will be exceedingly helpful in reading the output file later. The
number refers to the large number beside each IPRINT. Change the PKGREF attribute of these
parts as follows:
Number
1
2
3
4
5
6

PKGREF
Sva
Svb
Svc
Lab
Lbc
Lca

Simulation Setup:
Configure an AC Analysis to run at 60Hz, Linear ACSweepType, 1point.
Analysis:
Examine the output file to find the values of the currents. Figure 11.4.2 shows an abridged output
file with the pertinent values.
|Ia| = 28.75 A rms

Phase |Ia| = 7.016

|Ib| = 28.75 A rms

Phase |Ib| = 127.0

|Ic| = 28.75 A rms

Phase |Ic| =

113.0

|ILab| = 16.60 A rms

Phase |ILab| =

22.98

|ILbc| = 16.60 A rms

Phase |ILbc| = 97.02

|ILca| = 16.60 A rms

Phase |ILca| =

143.0

101

Figure 11.4.2

Chapter12Examples

102


Example12.1
This example wants to demonstrate the effect of frequency on output voltage. An AC Analysis
solves for the magnitude and phase of Vo quickly and easily.
Necessary Parts: VAC, R, L, C, EGND
Schematic Setup:
Construct the necessary circuit, see Figure 12.1.1. Be sure to name the v_o node
Simulation Setup:
Configure an AC Sweep as follows:
ACSweepType: Decade
Pts/Decade: 101
StartFreq: 1Hz
EndFreq: 1.00kHz

Figure 12.1.1

Analysis:
After PROBE appears add another plot to the window by clicking on Plot/Add Plot to Window.
Now select the upper plot by left-clicking on it anywhere. Add the Trace V(v_o). Now select the bottom
plot and add the trace P(V(v_o)), it will need to be typed into the Trace Expression box. The P()command
will plot the phase of the enclosed value. The plot window should now look similar to Figure 12.1.2.

103

These plots are noticeably different from the plots given in the example solution however. Notice
that the PSPICE plots just created are given for frequency measured in Hertz, while the examples
solution has frequency measured in radians. Using the conversion,

it is seen that the two plots are in face equal.


M
a
g
n
i
t
u
d
e

10V

5V

0V
V(v_o)
P
h
a
s
e

100d

0d

SEL>>
-100d
1.0Hz
P(V(v_o))

10Hz

100Hz

1.0KHz

Frequency
Figure 12.1.2

104

SupplementalExamples

105


Supplemental1
This example serves as another demonstration of PSPICEs ability to solve for circuit currents. A
Bias Point Detail will be enough.
Necessary Parts: IDC, R, EGND
Schematic Setup:
No special adjustments need to be made since voltages V1 and V2 are known. These will just be
calculated again in this simulation. The completed circuit can be seen in Figure S1.1.
Simulation Setup:
Simulate the circuit with a Bias Point Detail.
Analysis:
Display current information on the schematic (Analysis menu). Locate the currents that
correspond to I1, I2, and I3. Click each magnitude to check the direction for comparison with the given
directions. The currents values are as follows:
I1

2A

I2

4A

I3

4 A

The value of I3 is negative because the actual direction is opposite of the given direction. These
values can also be seen in Figure S1.1.

106

Figure S1.1

107

Supplemental2
This example will serve as another demonstration of PSPICEs ability to solve for node voltages
and branch currents with a Bias Point Detail.
Necessary Parts: IDC, R, EGND
Schematic Setup:
The completed schematic can be seen in Figure S2.1.
Simulation Setup:
Simulate the circuit with a Bias Point Detail.
Analysis:
The values for the voltages and currents are as follows:
V1

2.667 V

V2

3.333 V

V3

2.667 V

I1

2.667 A

I2

1.333 A

I3

3.333 A

I4

0.66667 A

I1 and I2 are negative because their actual direction, given by the red arrow, is opposite of that
defined in the problem.

108

Figure S2.1

Supplemental3
This example demonstrates PSPICEs ability to solve a network containing voltage sources for its
node voltages and branch currents. This example calls for a Bias Point Detail.
Necessary Parts: VDC, R, EGND
Schematic Setup:
The completed schematic can be seen in Figure S3.1.
Simulation Setup:
Run a Bias Point Detail on this schematic.
Analysis:
Display the voltage and current values on the schematic. The results will look similar to Figure
S3.1. These values are as follows:
V1

12.00 V

V2

5.000 V

V3

4.000 V

I1

7.000 A

109

I2

2.500 A

I3

4.500 A

Figure S3.1

110

Supplemental4
This example will again show the ease with which PSPICE finds the node voltages and branch
currents of a circuit with a Bias Point Detail.
Necessary Parts: VDC, R, EGND
Schematic Setup:
A completed schematic for this example can be seen in Figure S4.1.
Simulation Setup:
Use a Bias Point Detail to simulate this circuit.
Analysis:
Display the voltages and currents on the schematic and examine the results. Click on the
magnitude of the currents to show their direction with a red arrow. The results can be seen in Figure
S4.1, and the values are as follows:
V1

12.00 V

V2

5.000 V

V3

11.00 V

I1

1.000 A

I2

7.000 A

I3

2.500 A

I4

5.500 A

111

Figure S4.1

112

Supplemental5
This example will further show how to find node voltages with a PSPICE Bias Point Detail
Necessary Parts: VDC, R, EGND
Schematic Setup:
The completed schematic for this example can be seen in Figure S5.1.
Simulation Setup:
Run a Bias Point Detail on this circuit.
Analysis:
Display the voltages on the schematic. The values sought after are:
V1

7.000 V

V2

9.000 V

V3

4.000 V

Figure S5.1

113

Supplemental6
This example demonstrates the process of finding the node voltages and mesh currents of circuit
with PSPICEs Bias Point Detail.
Necessary Parts: VDC, R, EGND
Schematic Setup:
The completed PSPICE schematic for this example can be seen in Figure S6.1.
Simulation Setup:
Simulate this circuit with a Bias Point Detail.
Analysis:
Display the currents and voltages on the schematic. Finding the mesh currents requires a closer
look. PSPICE will display all of the branch currents, but the mesh currents are those branch currents that
are not shared by loops. Only the mesh currents are shown below. The node voltages and mesh currents
are:
V1

12.00 V

V2

5.00 V

V3

11.00 V

I1

1.000 A

I2

8.000 A

I3

5.500 A

114

Figure S6.1

115

Supplemental7
This example will again demonstrate PSPICEs ability to solve for node voltages and mesh
currents via a Bias Point Detail.
Necessary Parts: VDC, IDC, R, EGND
Schematic Setup:
The completed schematic can be seen in Figure S7.1.
Simulation Setup:
Simulate this circuit with a Bias Point Detail.
Analysis:
Display the voltages and currents on the schematic. I3 and I4 are given by the current sources, so
all is left is to identify the branch currents corresponding to I1 and I2. These are shown in the Figure S7.1.
The desired values are as follows:
V1

10.18 V

V2

4.182 V

V3

6.000 V

V4

8.727 V

I1

4.909 A

I2

0.72727 A

I3

4.000 A

I4

2.000 A

116

Figure S7.1

Supplemental8
This example will demonstrate further PSPICEs ability to solve AC circuits for phasor values.
The circuit is assumed to operate at 60Hz and an AC Sweep will be used for the simulation.
Necessary Parts: VAC, IAC, R, L, C, EGND, VPRINT1, IPRINT
Schematic Setup:
1) Create the circuit shown in Figure S8.1
2) The IPRINT parts for I3 and I4 must be rotated until they are upside down to orient them to read
the current correctly.
3) In the attributes menu for all the VPRINT1 and IPRINT parts, set the following:
AC
MAG
PHASE

=
=
=

y
y
y

4) Label the nodes for V1, V2, V3, V4.


5) Note that PSPICE will not allow two things to have the same name, so the voltage sources and
current sources must be renamed to use the labeling from the example.

117

Figure S8.1

118

Simulation Setup:
Setup an AC Sweep with to have a LinearACSweepType and these SweepParameters:
TotalPts: 1
StartFreq: 60Hz
EndFreq: 60Hz
Analysis:
The output file must be examined to find the phasor values from the circuit. Open the output file
by using Analysis/Examine Output. An abridged version of the output file can be seen in Figure S8.2.
|V1|

11.93 V

Phase |V1|

4.219

|V2|

3.813 V

Phase |V2|

16.35

|V3|

9.718 V

Phase |V3|

6.340

|V4|

12.00 V

Phase |V4|

0.000

|I1|

2.000 A

Phase |I1|

5.0891014

|I2|

0.8835 A

Phase |I2|

6.344

|I3|

3.813 A

Phase |I3|

163.7

|I4|

1.126 A

Phase |I4|

72.35

119

Figure S8.2

120

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