Acer ZQTA ZQSA Free Laptop Schematic

http://hobi-elektronika.
net
BOM
=47$=46$&596<67(0%/2&.',$*5$0
IV@ : iGPU
EV@ : dGPU
OP@ : Optimus
DO@ : Discrete only
SP@ : Special
SNP@: N13PGS/GL
IV@: UMA
GL@: N13PGL
GS@: N13P/MGS
DIS._eDP
INT._eDP
eDP Con.
Dual Channel DDR III

1066/1333/1600 MHZ
DDRIII-SODIMM1
DDRIII-SODIMM2
eDP
eDP
P22
IVY Bridge
rPGA 989
IMC
N13P-GS
N13P-GL
N13M-GS
PEG
TX/RX
P20,P21
DIS._HDMI
DIS._CRT
Display
P3, 4, 5, 6
FDI
DIS._LVDS
P15~P19
DMI
Int. MIC
USB-8
DMI(x4)
FDI
INT_CRT
CRT Con. P22
Display
SATA 0
P25
SATA
SATA - ODD
INT_HDMI
SATA 1
USB3.0/2.0
P25
HDMI Con.
USB3-2/USB2-1
USB Charger
USB3 Port
MB side
P29
Panther Point
PCH
USB2-1,3
P31
USB2-4
USB2.0
P24
PCIE-8
USB-10
MINI CARD
WLAN
P25
PCIE-3
RTL8411
10/100/1G
X'TAL
32.768KHz
P31
USB2-8
CCD(Camera)
X'TAL 25MHz
P22
P8
BATTERY
RTC
SPI
IHDA
ALC271X-VB6
AUDIO CODEC
P28
Cardreader
CONN.
P29
P28
CLK
LPC
Int. MIC
RJ45
Cardreader
SPI ROM
P8
Azalia
P29
MINI-SSD
USB-9
P7, 8, 9, 10, 11, 12

PCI-E x1
Bluetooth Con.
P23
SATA5
SATA
Small Board
CONNECTOR
LVDS/CCD/MIC
Con.
P22
INT_LVDS
DMI
CLK
SATA - HDD
Optimus : IV@ + EV@ + OP@

Discrete only : EV@ + DO@
VRAM
GPU
GFX
P13, 14
EC
P26
NPCE885L
BQ24707A
P32
TPS51216
Batery Charger
P33
+1.5V_SUS
P33
VCCSA
P35
VGPU Core
P37
Discharger
Thermal Protection
P41
RT8223P
RT8241A
3V/5V
MIC JACK
P27
ISL95836
HP
TPS51728
CPU core/VAXG
Speaker
P27
P27
K/B Con.
P31
EM-6781-T3
HALL SENSOR
P22
Touch Pad
Board Con.
P31
Fan Driver
(PWM Type)
P31
P38
TPS51219
P39
MDV1660URH
+1.05V_PCH / +1.05V_VTT
P36
+1.5V_GFX/1.05V_GFX/3V_GFX
P40
Quanta Computer Inc.

PROJECT : ZQTA/ZQSA
Size
Document Number
Rev
1A
Block Diagram
Date:
5
Friday, November 11, 2011

1
Sheet
of
44
http://hobi-elektronika.net
3
VGA power up sequence
+3V
EC
MOSFET
+3V_GFX
dGPU_RWR_EN
VIN
+VGACORE
+1.05V
PWM
dGPU_VRON
VGA_PG
MOSFET
MOSFET
+1.5V_GFX
MOSFET
+1.8V_GFX
DGPU_PWROK
+1.05V_GFX
+1.5VSUS
VGA_VID
VGA_PG
+1.8V
Power States
DESCRIPTION
CONTROL
SIGNAL
ACTIVE IN
+10V~+19V
MAIN POWER
ALWAYS
ALWAYS
+3V~+3.3V
RTC POWER
ALWAYS
ALWAYS
+3VPCU
+3.3V
EC POWER
ALWAYS
ALWAYS
+5VPCU
+5V
CHARGE POWER
ALWAYS
ALWAYS
+15V
+15V
CHARGE PUMP POWER
ALWAYS
ALWAYS
+3V_S5
+3.3V
LAN/BT/CIR POWER
S5_ON
S0-S5
+5V_S5
+5V
USB POWER
S5_ON
S0-S5
+5V
+5V
HDD/ODD/Codec/TP/CRT/HDMI POWER
MAINON
S0
+3V
+3.3V
PCH/GPU/Peripheral component POWER
MAINON
S0
+1.5VSUS
+1.5V
CPU/SODIMM CORE POWER
SUSON
S0-S3
+0.75V_DDR_VTT
+0.75V
SODIMM Termination POWER
MAINON
S0
+VGFX_AXG
variation
Internal GPU POWER
VRON
S0
+1.8V
+1.8V
CPU/PCH/Braidwood POWER
MAINON
S0
+1.5V
+1.5V
MINI CARD/NEW CARD POWER
MAINON
S0
+1.05V
+1.05V
PCH CORE POWER/IVY/SNB bridge VCCIO
MAINON
S0
POWER PLANE
VOLTAGE
VIN
+3V_RTC
+VCCSA
+0.9V
CPU POWER
HWPG_VTT
S0
+VCC_CORE
variation
CPU CORE POWER
VRON
S0
LCDVCC
+3.3V
LCD POWER
LVDS_VDDEN
S0
MAINON
S0
Thermal Follow Chart
NTC
Thermal
Protection
CPU
CORE PWR
H_PROCHOT#
H/W Throttling
CPU
PM_THRMTRIP#
SYS_SHDN#
WIRE-AND
3V/5 V
SYS PWR
SML1ALERT#
FAN Driver
PCH
FAN
SM-Bus
EC
CPUFAN#

PROJECT : ZQTA/ZQSA
Size
Document Number
Date:
PWR Status & GPU PWR CRL & THRM

1
Sheet
2
8
of
44
Rev
1A
4
For Sandy Bridge processor only implementation:

PROC_SELECT can be left NC.
FDI_TXN0
FDI_TXN1
FDI_TXN2
FDI_TXN3
FDI_TXN4
FDI_TXN5
FDI_TXN6
FDI_TXN7
A21
H19
E19
F18
B21
C20
D18
E17
[7]
[7]
[7]
[7]
[7]
[7]
[7]
[7]
FDI_TXP0
FDI_TXP1
FDI_TXP2
FDI_TXP3
FDI_TXP4
FDI_TXP5
FDI_TXP6
FDI_TXP7
A22
G19
E20
G18
B20
C19
D19
F17
FDI_FSYNC0
FDI_FSYNC1
J18
J17
[7]
FDI_INT
H20
[7]
[7]
FDI_LSYNC0
FDI_LSYNC1
J19
H17
[7]
[7]
eDP_COMP
[22] INT_eDP_HPD_Q
[22]
EDP-ML0+
C17
F16
C16
G15
TP58
FDI_INT
FDI0_LSYNC
FDI1_LSYNC
eDP_AUX
eDP_AUX#
C15
D15
EDP-ML0-
FDI0_FSYNC
FDI1_FSYNC
eDP_COMPIO
eDP_ICOMPO
eDP_HPD
EDP-AUX+
EDP-AUX-
[22]
FDI0_TX[0]
FDI0_TX[1]
FDI0_TX[2]
FDI0_TX[3]
FDI1_TX[0]
FDI1_TX[1]
FDI1_TX[2]
FDI1_TX[3]
A18
A17
B16
[22]
[22]
TP59
FDI0_TX#[0]
FDI0_TX#[1]
FDI0_TX#[2]
FDI0_TX#[3]
FDI1_TX#[0]
FDI1_TX#[1]
FDI1_TX#[2]
FDI1_TX#[3]
C18
E16
D16
F15
eDP_TX[0]
eDP_TX[1]
eDP_TX[2]
eDP_TX[3]
PEG_RX[0]
PEG_RX[1]
PEG_RX[2]
PEG_RX[3]
PEG_RX[4]
PEG_RX[5]
PEG_RX[6]
PEG_RX[7]
PEG_RX[8]
PEG_RX[9]
PEG_RX[10]
PEG_RX[11]
PEG_RX[12]
PEG_RX[13]
PEG_RX[14]
PEG_RX[15]
PEG_TX#[0]
PEG_TX#[1]
PEG_TX#[2]
PEG_TX#[3]
PEG_TX#[4]
PEG_TX#[5]
PEG_TX#[6]
PEG_TX#[7]
PEG_TX#[8]
PEG_TX#[9]
PEG_TX#[10]
PEG_TX#[11]
PEG_TX#[12]
PEG_TX#[13]
PEG_TX#[14]
PEG_TX#[15]
PEG_TX[0]
PEG_TX[1]
PEG_TX[2]
PEG_TX[3]
PEG_TX[4]
PEG_TX[5]
PEG_TX[6]
PEG_TX[7]
PEG_TX[8]
PEG_TX[9]
PEG_TX[10]
PEG_TX[11]
PEG_TX[12]
PEG_TX[13]
PEG_TX[14]
PEG_TX[15]
eDP_TX#[0]
eDP_TX#[1]
eDP_TX#[2]
eDP_TX#[3]
J33
L35
K34
H35
H32
G34
G31
F33
F30
E35
E33
F32
D34
E31
C33
B32
PEG_RX0 [15]
PEG_RX1 [15]
PEG_RX2 [15]
PEG_RX3 [15]
PEG_RX4 [15]
PEG_RX5 [15]
PEG_RX6 [15]
PEG_RX7 [15]
PEG_RX8 [15]
PEG_RX9 [15]
PEG_RX10 [15]
PEG_RX11 [15]
PEG_RX12 [15]
PEG_RX13 [15]
PEG_RX14 [15]
PEG_RX15 [15]
H_SNB_IVB#
H_SNB_IVB#
TP45
SKTOCC#
AL33
R124
H_PROCHOT#_R
56_4
PM_THRMTRIP#
[10] PM_THRMTRIP#
[7]
C165
AL32
PROCHOT#
AN32
SM_DRAMRST#
R_PEG_TX#0
R_PEG_TX#1
R_PEG_TX#2
R_PEG_TX#3
R_PEG_TX#4
R_PEG_TX#5
R_PEG_TX#6
R_PEG_TX#7
R_PEG_TX#8
R_PEG_TX#9
R_PEG_TX#10
R_PEG_TX#11
R_PEG_TX#12
R_PEG_TX#13
R_PEG_TX#14
R_PEG_TX#15
C395
C400
C402
C405
C407
C413
C414
C418
C421
C424
C425
C430
C431
C434
C439
C440
EV@0.22u/6.3V_4
EV@0.22u/6.3V_4
EV@0.22u/6.3V_4
EV@0.22u/6.3V_4
EV@0.22u/6.3V_4
EV@0.22u/6.3V_4
EV@0.22u/6.3V_4
EV@0.22u/6.3V_4
EV@0.22u/6.3V_4
EV@0.22u/6.3V_4
EV@0.22u/6.3V_4
EV@0.22u/6.3V_4
EV@0.22u/6.3V_4
EV@0.22u/6.3V_4
EV@0.22u/6.3V_4
EV@0.22u/6.3V_4
PEG_TX#0 [15]
PEG_TX#1 [15]
PEG_TX#2 [15]
PEG_TX#3 [15]
PEG_TX#4 [15]
PEG_TX#5 [15]
PEG_TX#6 [15]
PEG_TX#7 [15]
PEG_TX#8 [15]
PEG_TX#9 [15]
PEG_TX#10 [15]
PEG_TX#11 [15]
PEG_TX#12 [15]
PEG_TX#13 [15]
PEG_TX#14 [15]
PEG_TX#15 [15]
M28
M33
M30
L31
L28
K30
K27
J29
J27
H28
G28
E28
F28
D27
E26
D25
R_PEG_TX0
R_PEG_TX1
R_PEG_TX2
R_PEG_TX3
R_PEG_TX4
R_PEG_TX5
R_PEG_TX6
R_PEG_TX7
R_PEG_TX8
R_PEG_TX9
R_PEG_TX10
R_PEG_TX11
R_PEG_TX12
R_PEG_TX13
R_PEG_TX14
R_PEG_TX15
C398
C401
C404
C406
C408
C409
C417
C419
C420
C422
C427
C428
C433
C436
C437
C444
EV@0.22u/6.3V_4
EV@0.22u/6.3V_4
EV@0.22u/6.3V_4
EV@0.22u/6.3V_4
EV@0.22u/6.3V_4
EV@0.22u/6.3V_4
EV@0.22u/6.3V_4
EV@0.22u/6.3V_4
EV@0.22u/6.3V_4
EV@0.22u/6.3V_4
EV@0.22u/6.3V_4
EV@0.22u/6.3V_4
EV@0.22u/6.3V_4
EV@0.22u/6.3V_4
EV@0.22u/6.3V_4
EV@0.22u/6.3V_4
PEG_TX0 [15]
PEG_TX1 [15]
PEG_TX2 [15]
PEG_TX3 [15]
PEG_TX4 [15]
PEG_TX5 [15]
PEG_TX6 [15]
PEG_TX7 [15]
PEG_TX8 [15]
PEG_TX9 [15]
PEG_TX10 [15]
PEG_TX11 [15]
PEG_TX12 [15]
PEG_TX13 [15]
PEG_TX14 [15]
PEG_TX15 [15]
AM34
H_PWRGOOD
R116
PM_SYNC
AP33
UNCOREPWRGOOD
10K_4
PM_DRAM_PWRGD_R
V8
SM_DRAMPWROK
+1.05V
R107
75_4
R113
43_4
CPU_PLTRST#_R AR33
RESET#
CPU_PLTRST#
R115
R442
R438
DO@1K_4
DO@1K_4
R173
R458
R460
140/F_4
25.5./F_4
200/F_4
EV
UMA/OPT.
Ra
NA
0 ohm
Rb
1K
NA
Rc
1K
NA
CRB 1.0 : SM_RCOMP[2..0] W:20mils, S:15mils, L 500mils
R114
[9] PCI_PLTRST#
TCK
TMS
TRST#
TDI
TDO
DBR#
BPM#[0]
BPM#[1]
BPM#[2]
BPM#[3]
BPM#[4]
BPM#[5]
BPM#[6]
BPM#[7]
AP29
AP27
XDP_PRDY#
XDP_PREQ#
AR26
AR27
AP30
XDP_TCLK
PCH_JTAG_TMS
XDP_TRST#
AR28
AP26
PCH_JTAG_TDI
PCH_JTAG_TDO
TP53
TP18
TP20
TP19
TP12
TP56
AL35
AT28
AR29
AR30
AT30
AP32
AR31
AT31
AR32
XDP_DBRST# [7]
XDP_BPM0
XDP_BPM1
XDP_BPM2
XDP_BPM3
XDP_BPM4
XDP_BPM5
XDP_BPM6
XDP_BPM7
TP54
TP55
TP51
TP52
TP49
TP47
TP50
TP46
For XDP
*1.5K/F_4
+3V
C167
0.1u/10V_4
U3
1
2
NC VCC
CRB 1.0 : change to +3V(S0)
5
+3V_S5
IN
GND OUT
CPU_PLTRST#
+1.5V_CPU
74LVC1G07GW
C516
0.1u/10V_4
DG 1.0 :
The recommended AC cap value is changed to 220nF for compatibility with
PCIe Gen3 on future platforms.
For Gen2 only designs, it is acceptable to continue to use the 100nF capacitor.
[7] SYS_PWROK
[7] PM_DRAM_PWRGD
R461
200/F_4
U18
PM_DRAM_PWRGD_Q
R459
PM_DRAM_PWRGD_R
130/F_4
74AHC1G09
R462
*39_4
3
Q30
1
*2N7002K
MAINON_ON_G
FDI Disabling (Discrete Only)
CLK_DPLL_SSCLKP [9]
CLK_DPLL_SSCLKN [9]
+1.05V
CPU_DRAMRST# [4]
SM_RCOMP_0
SM_RCOMP_1
SM_RCOMP_2
AK1
A5
A4
4
2
IV@0_4P2R
Ivy Bridge_rPGA_2DPC_Rev0p61
HPD disable
This signal can be left as no
connect if entire eDP interface
is disabled.
SM_RCOMP[0]
SM_RCOMP[1]
SM_RCOMP[2]
*750/F_4
3
1
R440
CPU_DRAMRST#
R8
[9]
[9]
Ra
A16 CLK_DPLL_SSCLKP_R
A15 CLK_DPLL_SSCLKN_R
THERMTRIP#
0.1u/10V_4
[10] H_PWRGOOD
M29
M32
M31
L32
L29
K31
K28
J30
J28
H29
G27
E29
F27
D28
F26
E25
CLK_CPU_BCLKP
CLK_CPU_BCLKN
Rb
PRDY#
PREQ#
PM_SYNC
PM_SYNC
DPLL_REF_CLK
DPLL_REF_CLK#
A28 CLK_CPU_BCLKP
A27 CLK_CPU_BCLKN
Rc
PECI
Intel recommended UNCOREPWRGOOD

routing on one layer
apply C5205 for nosie
BCLK
BCLK#
CATERR#
AN33
EC_PECI
H_PROCHOT#
[32,35] H_PROCHOT#
PROC_SELECT#
AN34
TP_CATERR#
TP11
[32]
C26
SKTOCC#
CLOCKS
[8]
PEG_RX#0 [15]
PEG_RX#1 [15]
PEG_RX#2 [15]
PEG_RX#3 [15]
PEG_RX#4 [15]
PEG_RX#5 [15]
PEG_RX#6 [15]
PEG_RX#7 [15]
PEG_RX#8 [15]
PEG_RX#9 [15]
PEG_RX#10 [15]
PEG_RX#11 [15]
PEG_RX#12 [15]
PEG_RX#13 [15]
PEG_RX#14 [15]
PEG_RX#15 [15]
wo eDP and dGPU

Connect DPLL_REF_SSCLK on Processor to GND through 1K 5% resistor.
Connect DPLL_REF_SSCLK# on Processor to VCCP through 1K 5% resistor
[7]
[7]
[7]
[7]
[7]
[7]
[7]
[7]
DMI_TX[0]
DMI_TX[1]
DMI_TX[2]
DMI_TX[3]
PEG_COMP connect to PIN H22&J22 W:4mils/S:15mils/L: 500mils.

PEG_COMP connect to PIN J21 W:12mils/S:15mils/L: 500mils.
K33
M35
L34
J35
J32
H34
H31
G33
G30
F35
E34
E32
D33
D31
B33
C32
DDR3
MISC
G22
D22
F20
C21
DMI_RXP0
DMI_RXP1
DMI_RXP2
DMI_RXP3
DMI_TX#[0]
DMI_TX#[1]
DMI_TX#[2]
DMI_TX#[3]
PEG_COMP
MISC
DMI_RXN0
DMI_RXN1
DMI_RXN2
DMI_RXN3
G21
E22
F21
D21
DMI_RX[0]
DMI_RX[1]
DMI_RX[2]
DMI_RX[3]
J22
J21
H22
U16B
JTAG & BPM
[7]
[7]
[7]
[7]
B28
B26
A24
B23
PEG_RX#[0]
PEG_RX#[1]
PEG_RX#[2]
PEG_RX#[3]
PEG_RX#[4]
PEG_RX#[5]
PEG_RX#[6]
PEG_RX#[7]
PEG_RX#[8]
PEG_RX#[9]
PEG_RX#[10]
PEG_RX#[11]
PEG_RX#[12]
PEG_RX#[13]
PEG_RX#[14]
PEG_RX#[15]
PCI EXPRESS* - GRAPHICS
[7]
[7]
[7]
[7]
DMI_TXP0
DMI_TXP1
DMI_TXP2
DMI_TXP3
PEG_ICOMPI
PEG_ICOMPO
PEG_RCOMPO
DMI_RX#[0]
DMI_RX#[1]
DMI_RX#[2]
DMI_RX#[3]
DMI
[7]
[7]
[7]
[7]
B27
B25
A25
B24
DMI_TXN0
DMI_TXN1
DMI_TXN2
DMI_TXN3
Intel(R) FDI
[7]
[7]
[7]
[7]
eDP
IVY Bridge Processor (CLK,MISC,JTAG)
For IVY/Sandy processor compatibility:

Needs a pull-up resistor to PCH VccDFTERM rail (1.8V) through a 2.2 K5% pull-up resistor.
Connect to the DF_TVS of PCH though a 1K5% series resistor.
U16A
THERMAL
IVY Bridge Processor (DMI,PEG,FDI)
PWR MANAGEMENT
MAINON_ON_G [5,41]
DP & PEG Compensation

3
+1.05V
Processor pull-up(CPU)
+1.05V
9/26 add
[7,35] IMVP_PWRGD
Q4
FDV301N
Routed within 500 mils
+1.05V
FDI_INT
FDI_FSYNC0
FDI_FSYNC1
FDI_LSYNC0
FDI_LSYNC1
DO@0_4
DO@0_4
DO@0_4
R441
DO@1K/F_4
R447
DO@1K/F_4
FDI_FSYNC can gang

all these 4
signals together
and tie them with
only one 1K
resistor to GND
(DG V0.5 Ch2.2.9).
Routed within 25 mils

R433
24.9/F_4
R439
24.9/F_4
PEG_COMP
PEG_ICOMPI and RCOMPO signals should

be routed within 500 mils
typical impedance = 43 mohms
eDP_COMP
eDP_COMPIO and ICOMPO signals should

be shorted near balls and routed with
typical impedance <25 mohms
H_PROCHOT#
PCH_JTAG_TDO
PCH_JTAG_TMS
PCH_JTAG_TDI
XDP_PREQ#
XDP_TCLK
XDP_TRST#
R122
R134
R135
R430
R132
R137
R128
62_4
51_4
51_4
51_4
*51_4
51_4
51_4
R86
1K_4
9/27 modify
R444
R446
R443
PM_THRMTRIP#
PEG_ICOMPO signals should

be routed within 500 mils
typical impedance = 14.5 mohms
[5,7,8,9,11,22,32,35,36,40,41] +1.05V
[7,8,9,10,11,13,14,19,22,23,24,25,26,27,28,31,32,34,35,36,37,38,39,40,41]
+3V
+1.05V
Q5
3 MMBT3904
SYS_SHDN#
[34,41]

PROJECT : ZQTA/ZQSA
Size
Document Number
Date:
Rev
1A
IVY Bridge 1/4

5
Sheet
of
44
IVY Bridge Processor (DDR3)

U16C
U16D
[13]
[13]
[13]
[13]
[13]
[13]
C5
D5
D3
D2
D6
C6
C2
C3
F10
F8
G10
G9
F9
F7
G8
G7
K4
K5
K1
J1
J5
J4
J2
K2
M8
N10
N8
N7
M10
M9
N9
M7
AG6
AG5
AK6
AK5
AH5
AH6
AJ5
AJ6
AJ8
AK8
AJ9
AK9
AH8
AH9
AL9
AL8
AP11
AN11
AL12
AM12
AM11
AL11
AP12
AN12
AJ14
AH14
AL15
AK15
AL14
AK14
AJ15
AH15
AE10
AF10
V6
M_A_BS#0
M_A_BS#1
M_A_BS#2
AE8
AD9
AF9
M_A_CAS#
M_A_RAS#
M_A_WE#
SA_DQ[0]
SA_DQ[1]
SA_DQ[2]
SA_DQ[3]
SA_DQ[4]
SA_DQ[5]
SA_DQ[6]
SA_DQ[7]
SA_DQ[8]
SA_DQ[9]
SA_DQ[10]
SA_DQ[11]
SA_DQ[12]
SA_DQ[13]
SA_DQ[14]
SA_DQ[15]
SA_DQ[16]
SA_DQ[17]
SA_DQ[18]
SA_DQ[19]
SA_DQ[20]
SA_DQ[21]
SA_DQ[22]
SA_DQ[23]
SA_DQ[24]
SA_DQ[25]
SA_DQ[26]
SA_DQ[27]
SA_DQ[28]
SA_DQ[29]
SA_DQ[30]
SA_DQ[31]
SA_DQ[32]
SA_DQ[33]
SA_DQ[34]
SA_DQ[35]
SA_DQ[36]
SA_DQ[37]
SA_DQ[38]
SA_DQ[39]
SA_DQ[40]
SA_DQ[41]
SA_DQ[42]
SA_DQ[43]
SA_DQ[44]
SA_DQ[45]
SA_DQ[46]
SA_DQ[47]
SA_DQ[48]
SA_DQ[49]
SA_DQ[50]
SA_DQ[51]
SA_DQ[52]
SA_DQ[53]
SA_DQ[54]
SA_DQ[55]
SA_DQ[56]
SA_DQ[57]
SA_DQ[58]
SA_DQ[59]
SA_DQ[60]
SA_DQ[61]
SA_DQ[62]
SA_DQ[63]
SA_CLK[0]
SA_CLK#[0]
SA_CKE[0]
SA_CLK[1]
SA_CLK#[1]
SA_CKE[1]
DDR SYSTEM MEMORY A
M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63
AB6
AA6
V9
M_A_CLK0 [13]
M_A_CLK0# [13]
M_A_CKE0 [13]
AA5
AB5
V10
M_A_CLK1 [13]
M_A_CLK1# [13]
M_A_CKE1 [13]
SA_CLK[2]
SA_CLK#[2]
SA_CKE[2]
AB4
AA4
W9
SA_CLK[3]
SA_CLK#[3]
SA_CKE[3]
AB3
AA3
W10
SA_CS#[0]
SA_CS#[1]
SA_CS#[2]
SA_CS#[3]
AK3
AL3
AG1
AH1
M_A_CS#0 [13]
M_A_CS#1 [13]
SA_ODT[0]
SA_ODT[1]
SA_ODT[2]
SA_ODT[3]
AH3
AG3
AG2
AH2
M_A_ODT0 [13]
M_A_ODT1 [13]
C4
G6
J3
M6
AL6
AM8
AR12
AM15
M_A_DQS#0
M_A_DQS#1
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7
SA_DQS[0]
SA_DQS[1]
SA_DQS[2]
SA_DQS[3]
SA_DQS[4]
SA_DQS[5]
SA_DQS[6]
SA_DQS[7]
D4
F6
K3
N6
AL5
AM9
AR11
AM14
M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7
SA_MA[0]
SA_MA[1]
SA_MA[2]
SA_MA[3]
SA_MA[4]
SA_MA[5]
SA_MA[6]
SA_MA[7]
SA_MA[8]
SA_MA[9]
SA_MA[10]
SA_MA[11]
SA_MA[12]
SA_MA[13]
SA_MA[14]
SA_MA[15]
AD10
W1
W2
W7
V3
V2
W3
W6
V1
W5
AD8
V4
W4
AF8
V5
V7
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15
SA_DQS#[0]
SA_DQS#[1]
SA_DQS#[2]
SA_DQS#[3]
SA_DQS#[4]
SA_DQS#[5]
SA_DQS#[6]
SA_DQS#[7]
SA_BS[0]
SA_BS[1]
SA_BS[2]
SA_CAS#
SA_RAS#
SA_WE#
[14] M_B_DQ[63:0]
M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63
M_A_DQS#[7:0] [13]
M_A_DQS[7:0] [13]
[14]
[14]
[14]
[14]
[14]
[14]
M_A_A[15:0] [13]
M_B_BS#0
M_B_BS#1
M_B_BS#2
M_B_CAS#
M_B_RAS#
M_B_WE#
C9
A7
D10
C8
A9
A8
D9
D8
G4
F4
F1
G1
G5
F5
F2
G2
J7
J8
K10
K9
J9
J10
K8
K7
M5
N4
N2
N1
M4
N5
M2
M1
AM5
AM6
AR3
AP3
AN3
AN2
AN1
AP2
AP5
AN9
AT5
AT6
AP6
AN8
AR6
AR5
AR9
AJ11
AT8
AT9
AH11
AR8
AJ12
AH12
AT11
AN14
AR14
AT14
AT12
AN15
AR15
AT15
AA9
AA7
R6
AA10
AB8
AB9
SB_CLK[0]
SB_CLK#[0]
SB_CKE[0]
SB_DQ[0]
SB_DQ[1]
SB_DQ[2]
SB_DQ[3]
SB_DQ[4]
SB_DQ[5]
SB_DQ[6]
SB_DQ[7]
SB_DQ[8]
SB_DQ[9]
SB_DQ[10]
SB_DQ[11]
SB_DQ[12]
SB_DQ[13]
SB_DQ[14]
SB_DQ[15]
SB_DQ[16]
SB_DQ[17]
SB_DQ[18]
SB_DQ[19]
SB_DQ[20]
SB_DQ[21]
SB_DQ[22]
SB_DQ[23]
SB_DQ[24]
SB_DQ[25]
SB_DQ[26]
SB_DQ[27]
SB_DQ[28]
SB_DQ[29]
SB_DQ[30]
SB_DQ[31]
SB_DQ[32]
SB_DQ[33]
SB_DQ[34]
SB_DQ[35]
SB_DQ[36]
SB_DQ[37]
SB_DQ[38]
SB_DQ[39]
SB_DQ[40]
SB_DQ[41]
SB_DQ[42]
SB_DQ[43]
SB_DQ[44]
SB_DQ[45]
SB_DQ[46]
SB_DQ[47]
SB_DQ[48]
SB_DQ[49]
SB_DQ[50]
SB_DQ[51]
SB_DQ[52]
SB_DQ[53]
SB_DQ[54]
SB_DQ[55]
SB_DQ[56]
SB_DQ[57]
SB_DQ[58]
SB_DQ[59]
SB_DQ[60]
SB_DQ[61]
SB_DQ[62]
SB_DQ[63]
SB_CLK[1]
SB_CLK#[1]
SB_CKE[1]
DDR SYSTEM MEMORY B
[13] M_A_DQ[63:0]
D
SB_BS[0]
SB_BS[1]
SB_BS[2]
SB_CAS#
SB_RAS#
SB_WE#
AE2
AD2
R9
M_B_CLK0 [14]
M_B_CLK0# [14]
M_B_CKE0 [14]
AE1
AD1
R10
M_B_CLK1 [14]
M_B_CLK1# [14]
M_B_CKE1 [14]
SB_CLK[2]
SB_CLK#[2]
SB_CKE[2]
AB2
AA2
T9
SB_CLK[3]
SB_CLK#[3]
SB_CKE[3]
AA1
AB1
T10
SB_CS#[0]
SB_CS#[1]
SB_CS#[2]
SB_CS#[3]
AD3
AE3
AD6
AE6
M_B_CS#0 [14]
M_B_CS#1 [14]
SB_ODT[0]
SB_ODT[1]
SB_ODT[2]
SB_ODT[3]
AE4
AD4
AD5
AE5
M_B_ODT0 [14]
M_B_ODT1 [14]
C
D7
F3
K6
N3
AN5
AP9
AK12
AP15
M_B_DQS#0
M_B_DQS#1
M_B_DQS#2
M_B_DQS#3
M_B_DQS#4
M_B_DQS#5
M_B_DQS#6
M_B_DQS#7
SB_DQS[0]
SB_DQS[1]
SB_DQS[2]
SB_DQS[3]
SB_DQS[4]
SB_DQS[5]
SB_DQS[6]
SB_DQS[7]
C7
G3
J6
M3
AN6
AP8
AK11
AP14
M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7
SB_MA[0]
SB_MA[1]
SB_MA[2]
SB_MA[3]
SB_MA[4]
SB_MA[5]
SB_MA[6]
SB_MA[7]
SB_MA[8]
SB_MA[9]
SB_MA[10]
SB_MA[11]
SB_MA[12]
SB_MA[13]
SB_MA[14]
SB_MA[15]
AA8
T7
R7
T6
T2
T4
T3
R2
T5
R3
AB7
R1
T1
AB10
R5
R4
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15
SB_DQS#[0]
SB_DQS#[1]
SB_DQS#[2]
SB_DQS#[3]
SB_DQS#[4]
SB_DQS#[5]
SB_DQS#[6]
SB_DQS#[7]
M_B_DQS#[7:0] [14]
M_B_DQS[7:0] [14]
M_B_A[15:0] [14]
+1.5VSUS
R503
1K/F_4
A
R502
1K/F_4
Q36
CD_DRAMRST# 3
2N7002K
1
CPU_DRAMRST# [3]
[13,14] DDR3_DRAMRST#
[9,13,14] DRAMRST_CNTRL_PCH
C547
0.047u/16V_4
R500
4.99K/F_4

PROJECT : ZQTA/ZQSA
Size
Document Number
Rev
1A
IVY Bridge 2/4

Date:
5
Sheet
1
of
44
3
22uF x 4
10uF x 10
10uF x 20
reserved x 5
C489
C498
C497
C176
C187
22u/6.3V_8 22u/6.3V_8 22u/6.3V_8 22u/6.3V_8
C186
22u/6.3V_8 22u/6.3V_8
*22u/6.3V_8
C211
C201
C487
22u/6.3V_8
C170
C485
22u/6.3V_8
*22u/6.3V_8
C181
C486
22u/6.3V_8 22u/6.3V_8 22u/6.3V_8

*22u/6.3V_8
C490
C184
C197
C491
C496
10u/6.3V_8 10u/6.3V_8 10u/6.3V_8 10u/6.3V_8 10u/6.3V_8
C199
C479
C480
C481
C194
10u/6.3V_8 10u/6.3V_8 10u/6.3V_8 10u/6.3V_8

*10u/6.3V_8
10uF (Reserved)
4.5A
C191
C189
C182
22u/6.3V_8
22u/6.3V_8 *10u/6.3V_8
C205
C195
*10u/6.3V_8
*10u/6.3V_8
C193
+
C200
+
C169
+
C168
+
330u/2V_7343
330u/2V_7343
*470u/2V_7343
*470u/2V_7343
JP12
*SHORT_PAD
+1.5VSUS
Q34
+VCC_GFX
+1.5V_CPU
+1.5V_CPU
VCC1
VCC2
VCC3
VCC4
VCC5
VCC6
VCC7
VCC8
VCC9
VCC10
VCC11
VCC12
VCC13
VCC14
VCC15
VCC16
VCC17
VCC18
VCC19
VCC20
VCC21
VCC22
VCC23
VCC24
VCC25
VCC26
VCC27
VCC28
VCC29
VCC30
VCC31
VCC32
VCC33
VCC34
VCC35
VCC36
VCC37
VCC38
VCC39
VCC40
VCC41
VCC42
VCC43
VCC44
VCC45
VCC46
VCC47
VCC48
VCC49
VCC50
VCC51
VCC52
VCC53
VCC54
VCC55
VCC56
VCC57
VCC58
VCC59
VCC60
VCC61
VCC62
VCC63
VCC64
VCC65
VCC66
VCC67
VCC68
VCC69
VCC70
VCC71
VCC72
VCC73
VCC74
VCC75
VCC76
VCC77
VCC78
VCC79
VCC80
VCC81
VCC82
VCC83
VCC84
VCC85
VCC86
VCC87
VCC88
VCC89
VCC90
VCC91
VCC92
VCC93
VCC94
VCC95
VCC96
VCC97
VCC98
VCC99
VCC100
+ C511
330u/2V_7343
PEG AND DDR
22uF x 16
AG35
AG34
AG33
AG32
AG31
AG30
AG29
AG28
AG27
AG26
AF35
AF34
AF33
AF32
AF31
AF30
AF29
AF28
AF27
AF26
AD35
AD34
AD33
AD32
AD31
AD30
AD29
AD28
AD27
AD26
AC35
AC34
AC33
AC32
AC31
AC30
AC29
AC28
AC27
AC26
AA35
AA34
AA33
AA32
AA31
AA30
AA29
AA28
AA27
AA26
Y35
Y34
Y33
Y32
Y31
Y30
Y29
Y28
Y27
Y26
V35
V34
V33
V32
V31
V30
V29
V28
V27
V26
U35
U34
U33
U32
U31
U30
U29
U28
U27
U26
R35
R34
R33
R32
R31
R30
R29
R28
R27
R26
P35
P34
P33
P32
P31
P30
P29
P28
P27
P26
VCCIO1
VCCIO2
VCCIO3
VCCIO4
VCCIO5
VCCIO6
VCCIO7
VCCIO8
VCCIO9
VCCIO10
VCCIO11
VCCIO12
VCCIO13
VCCIO14
VCCIO15
VCCIO16
VCCIO17
VCCIO18
VCCIO19
VCCIO20
VCCIO21
VCCIO22
VCCIO23
VCCIO24
VCCIO25
VCCIO26
VCCIO27
VCCIO28
VCCIO29
VCCIO30
VCCIO31
VCCIO32
VCCIO33
VCCIO34
VCCIO35
VCCIO36
VCCIO37
VCCIO38
VCCIO39
VCCIO40
C506
C198
C209
C509
C212
C510
22u/6.3V_8
22u/6.3V_8
22u/6.3V_8
22u/6.3V_8
22u/6.3V_8
22u/6.3V_8
C477
IV@22u/6.3V_8
C508
C507
C215
C501
C503
C505
22u/6.3V_8
22u/6.3V_8
22u/6.3V_8
22u/6.3V_8
22u/6.3V_8
22u/6.3V_8
*IV@330u/2V_7343
C471
C493
IV@22u/6.3V_8
IV@22u/6.3V_8
C484
*IV@22u/6.3V_8
E11
D14
D13
D12
D11
C14
C13
C12
C11
B14
B12
A14
A13
A12
A11
C202
C495
C500
C494
C512
C515
*22u/6.3V_8
*22u/6.3V_8
*22u/6.3V_8
*22u/6.3V_8
*22u/6.3V_8
*22u/6.3V_8
C472
C183
*IV@22u/6.3V_8
C190
IV@22u/6.3V_8
C473
C488
IV@22u/6.3V_8
C179
IV@22u/6.3V_8
R436
*SHORT_4
AJ29
AJ30
AJ28
C499
C482
IV@22u/6.3V_8
C492
IV@22u/6.3V_8
+1.05V
DO@0/J_4
R476
0_8
R470
0_8
POWER
AT24
AT23
AT21
AT20
AT18
AT17
AR24
AR23
AR21
AR20
AR18
AR17
AP24
AP23
AP21
AP20
AP18
AP17
AN24
AN23
AN21
AN20
AN18
AN17
AM24
AM23
AM21
AM20
AM18
AM17
AL24
AL23
AL21
AL20
AL18
AL17
AK24
AK23
AK21
AK20
AK18
AK17
AJ24
AJ23
AJ21
AJ20
AJ18
AJ17
AH24
AH23
AH21
AH20
AH18
AH17
CPU_VCCPLL
B6
A6
A2
CPU VCCPL
H_CPU_SVIDALRT#
H_CPU_SVIDCLK
H_CPU_SVIDDAT
C537
10u/6.3V_8
IVY 45W:1.5A
Spec
C528
1u/6.3V_4
C529
1u/6.3V_4
VAXG1
VAXG2
VAXG3
VAXG4
VAXG5
VAXG6
VAXG7
VAXG8
VAXG9
VAXG10
VAXG11
VAXG12
VAXG13
VAXG14
VAXG15
VAXG16
VAXG17
VAXG18
VAXG19
VAXG20
VAXG21
VAXG22
VAXG23
VAXG24
VAXG25
VAXG26
VAXG27
VAXG28
VAXG29
VAXG30
VAXG31
VAXG32
VAXG33
VAXG34
VAXG35
VAXG36
VAXG37
VAXG38
VAXG39
VAXG40
VAXG41
VAXG42
VAXG43
VAXG44
VAXG45
VAXG46
VAXG47
VAXG48
VAXG49
VAXG50
VAXG51
VAXG52
VAXG53
VAXG54
VCCPLL1
VCCPLL2
VCCPLL3
+ C535
*330u/2V_7343
Real
VAXG_SENSE
VSSAXG_SENSE
R83
100/F_4
R82
100/F_4
0_4
0_4
SA_DIMM_VREFDQ
SB_DIMM_VREFDQ
B10
A10
VTT_VCCP_SENSE
VTT_VSSP_SENSE
VCC_AXG_SENSE [35]
VSS_AXG_SENSE [35]
+VDDR_REF_CPU
For M3 solution
need Rb4, Rd1
W/O M3 then NC
ball B4 and D1
+VDDR_REF_CPU
Rb4
R234
*1K_4
Rd1
R239
*1K_4
B4
D1
SMDDR_VREF_DQ0_M3 [13]
SMDDR_VREF_DQ1_M3 [14]
IVY SPEC
330uF x1, 10uF_8 x6 Socket BOT edge.
VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
VDDQ10
VDDQ11
VDDQ12
VDDQ13
VDDQ14
VDDQ15
AF7
AF4
AF1
AC7
AC4
AC1
Y7
Y4
Y1
U7
U4
U1
P7
P4
P1
+1.5V_CPU
C526
10u/6.3V_8
C524
10u/6.3V_8
C534
10u/6.3V_8
C531
10u/6.3V_8
C236
10u/6.3V_8
C234
*10u/6.3V_8
C533
C229
*10u/6.3V_8
C232
10u/6.3V_8
+
330u/2V_7343
C
VCCSA1
VCCSA2
VCCSA3
VCCSA4
VCCSA5
VCCSA6
VCCSA7
VCCSA8
VCCSA_SENSE
VCCSA_VID[0]
VCCSA_VID[1]
VCCIO_SEL
M27
M26
L26
J26
J25
J24
H26
H25
+VCCSA
C196
10u/6.3V_8
C188
10u/6.3V_8
VCCSA_SENSE [38]
C22
C24
VCCSA_VID0
VCCSA_VID1
A19
VCCIO_SEL_NC
+ C415
330u/2V_7343
C192
10u/6.3V_8
H23
1uF x 2
[38]
[38]
TP57
On CRB
H_SNB_IVB#_PWRCTRL = low, 1.0V
H_SNB_IVB#_PWRCTRL = high/NC, 1.05V
SVID CLK
Remove PU resistor 54.9/F,
stuff at IMVP7 page
IVY SPEC
330uF x1, 10uF_8 x1 Socket BOT edge,
10uF_8 x2 Socket BOT cavity.
CPU MCH
CPU SA
Spec
330uF/6mohm x 1
Spec
R78
*SHORT_4
VR_SVID_CLK
IVY 45W: 5A
IVY 45W: 6A
+VCC_CORE
VCC_SENSE [35]
VSS_SENSE [35]
H_CPU_SVIDCLK
VCCIO_SENSE
VSS_SENSE_VCCIO
+VCC_GFX
Voltage selection for VCCIO:

this pin must be pulled high
on the motherboard
Layout note: need routing

together and ALERT need
between CLK and DATA
R100
R99
IV@10/F_4
10 mil
AL1
SM_VREF
IVY SPEC
330uF x1, 10uF_8 x1, 1uF_4 x2
Socket BOT edge.
AJ35
AJ34
IV@10/F_4
R98
1uF x 2
VCC_SENSE
VSS_SENSE
R81
AK35
AK34
330uF/7mohm x 1 10uF x 1
10uF x 1
0929 change value by CRB
U16G
hDK
E
[35]
10uF x 6
Real
Real
10uF x 3
10uF x 8
VTT_VCCP_SENSE [36]
VTT_VSSP_SENSE [36]
Place PU resistor close to CPU

R456
10/F_4
R457
10/F_4
+1.05V
SVID DATA
+1.05V
+SMDDR_VREF
+VDDR_REF_CPU
+1.5VSUS
Remove PU resistor 130/F,

stuff at IMVP7 page
Trace Route to Power IC area.

1
2
3
C178
IV@22u/6.3V_8
IV@22u/6.3V_8
+1.05V_VTT_40
C180
IV@22u/6.3V_8
*IV@22u/6.3V_8
IVY SPEC
22uF_8 x7 Socket TOP cavity
22uF_8 x5 Socket BOT cavity
22uF_8 x2 Socket TOP cavity (no stuff)
22uF_8 x5 Socket BOT cavity (no stuff)
330uF_7343 x2
C470
IV@22u/6.3V_8
*IV@22u/6.3V_8
+1.8V
AO4496
8
7
6
5
IV@330u/2V_7343
/^s'
Z
VIDALERT#
VIDSCLK
VIDSOUT
+ C514
IV@330u/2V_7343
AH13
AH10
AG10
AC10
Y10
U10
P10
L10
J14
J13
J12
J11
H14
H12
H11
G14
G13
G12
F14
F13
F12
F11
E14
E12
J23
+ C213
330u/2V_7343
+ C233
R157
SVID
Cose down
470uF/4mohm x 4 330uF x2
C185
10uF x 10
22uF x 12
+ C502
SENSE LINES
SNB : Spec
IVY Bridge Processor (GRAPHIC POWER)
IVY SPEC
22uF_8 x4 Socket TOP edge
22uF_8 x4 Socket BOT edge
470uF_7343 x2
+VCC_CORE
IVY SPEC
22uF_8 x8 Socket TOP edge
470uF_7343 x4
total : 10uF x 10 , RSVD x 1
total : 22uF x 16 , RSVD x 3
tatal : 470u x 4, RSVD x2
CORE SUPPLY
22uF x 2
10uF x 10
22uF x 7 (Non-stuff) reserved x 4
+1.05V
POWER
330uF x1
SENSE
LINES
U16F
IVY 45W:TDC 52A
Cose down
Spec
VREF
22uF x 12
CPU Core Power
IVY 45W:TDC 38A
330uF x1
DDR3 -1.5V RAILS
330uF/6mohm x 2
[38] +VCCSA
Cose down
SA RAIL
CPU VGT
IVY 45W:8.5A
SNB : Spec
MISC
CPU VTT
IVY Processor (POWER)
[3] +1.5V_CPU
+VDDR_REF_CPU
GRAPHICS
1.8V RAIL
[3,7,8,9,11,22,32,35,36,40,41] +1.05V
[35] +VCC_CORE
[8,10,11,41] +1.8V
[35] +VCC_GFX
R492
*0_8
R497
*1K/F_4
R97
130/F_4
H_CPU_SVIDDAT
R80
*SHORT_4
VR_SVID_DATA
[35]
MAIND
R466
220_8
C543
*470p/50V_4
MAINON_ON_G
SVID ALERT
[34,37,41] MAIND
Q32
2N7002K
R498
*1K/F_4
R499
100K_4
+1.05V
2
R96
75_4
Q29
DMN601K-7
[35] +VCC_GFX
[35] +VCC_CORE
[3,41] MAINON_ON_G
Place PU resistor close to CPU
MAIND
4
A
H_CPU_SVIDALRT#
R95
43_4

R79
*SHORT_4
VR_SVID_ALERT#
PROJECT : ZQTA/ZQSA
[35]
Size
Document Number
Date:
Rev
1A
IVY Bridge 3/4

5
Sheet
of
44
4
IVY Bridge Processor (GND)
VSS
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS98
VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS154
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160
AJ22
AJ19
AJ16
AJ13
AJ10
AJ7
AJ4
AJ3
AJ2
AJ1
AH35
AH34
AH32
AH30
AH29
AH28
AH25
AH22
AH19
AH16
AH7
AH4
AG9
AG8
AG4
AF6
AF5
AF3
AF2
AE35
AE34
AE33
AE32
AE31
AE30
AE29
AE28
AE27
AE26
AE9
AD7
AC9
AC8
AC6
AC5
AC3
AC2
AB35
AB34
AB33
AB32
AB31
AB30
AB29
AB28
AB27
AB26
Y9
Y8
Y6
Y5
Y3
Y2
W 35
W 34
W 33
W 32
W 31
W 30
W 29
W 28
W 27
W 26
U9
U8
U6
U5
U3
U2
U16E
T35
T34
T33
T32
T31
T30
T29
T28
T27
T26
P9
P8
P6
P5
P3
P2
N35
N34
N33
N32
N31
N30
N29
N28
N27
N26
M34
L33
L30
L27
L9
L8
L6
L5
L4
L3
L2
L1
K35
K32
K29
K26
J34
J31
H33
H30
H27
H24
H21
H18
H15
H13
H10
H9
H8
H7
H6
H5
H4
H3
H2
H1
G35
G32
G29
G26
G23
G20
G17
G11
F34
F31
F29
Processor Strapping
VSS161
VSS162
VSS163
VSS164
VSS165
VSS166
VSS167
VSS168
VSS169
VSS170
VSS171
VSS172
VSS173
VSS174
VSS175
VSS176
VSS177
VSS178
VSS179
VSS180
VSS181
VSS182
VSS183
VSS184
VSS185
VSS186
VSS187
VSS188
VSS189
VSS190
VSS191
VSS192
VSS193
VSS194
VSS195
VSS196
VSS197
VSS198
VSS199
VSS200
VSS201
VSS202
VSS203
VSS204
VSS205
VSS206
VSS207
VSS208
VSS209
VSS210
VSS211
VSS212
VSS213
VSS214
VSS215
VSS216
VSS217
VSS218
VSS219
VSS220
VSS221
VSS222
VSS223
VSS224
VSS225
VSS226
VSS227
VSS228
VSS229
VSS230
VSS231
VSS232
VSS233
VSS234
VSS235
VSS236
VSS237
VSS238
VSS239
VSS240
VSS241
VSS242
VSS243
VSS244
VSS245
VSS246
VSS247
VSS248
VSS249
VSS250
VSS251
VSS252
VSS253
VSS254
VSS255
VSS256
VSS257
VSS258
VSS259
VSS260
VSS261
VSS262
VSS263
VSS264
VSS265
VSS266
VSS267
VSS268
VSS269
VSS270
VSS271
VSS272
VSS273
VSS274
VSS275
VSS276
VSS277
VSS278
VSS279
VSS280
VSS281
VSS282
VSS283
VSS284
VSS285
VSS
F22
F19
E30
E27
E24
E21
E18
E15
E13
E10
E9
E8
E7
E6
E5
E4
E3
E2
E1
D35
D32
D29
D26
D20
D17
C34
C31
C28
C27
C25
C23
C10
C1
B22
B19
B17
B15
B13
B11
B9
B8
B7
B5
B3
B2
A35
A32
A29
A26
A23
A20
A3
TP17
TP10
TP15
CFG[0]
CFG[1]
CFG[2]
CFG[3]
CFG[4]
CFG[5]
CFG[6]
CFG[7]
CFG[8]
CFG[9]
CFG[10]
CFG[11]
CFG[12]
CFG[13]
CFG[14]
CFG[15]
CFG[16]
CFG[17]
AJ31
AH31
AJ33
AH33
VAXG_VAL_SENSE
VSSAXG_VAL_SENSE
VCC_VAL_SENSE
VSS_VAL_SENSE
AJ26
RSVD5
F25
F24
F23
D24
G25
G24
E23
D23
C30
A31
B30
B29
D30
B31
A30
C29
RSVD8
RSVD9
RSVD10
RSVD11
RSVD12
RSVD13
RSVD14
RSVD15
RSVD16
RSVD17
RSVD18
RSVD19
RSVD20
RSVD21
RSVD22
RSVD23
J20
B18
RSVD24
RSVD25
J15
RSVD27
AH27
AH26
VCC_DIE_SENSE
VSS_DIE_SENSE
Rs
R136
*SP@0_4
RSVD28
RSVD29
RSVD30
RSVD31
L7
AG7
AE7
AK2
RSVD32
W8
RSVD33
RSVD34
RSVD35
AT26
AM33
AJ27
RSVD37
RSVD38
RSVD39
RSVD40
T8
J16
H16
G16
RSVD41
RSVD42
RSVD43
RSVD44
RSVD45
AR35
AT34
AT33
AP35
AR34
RSVD46
RSVD47
RSVD48
RSVD49
RSVD50
B34
A33
A34
B35
C35
RSVD51
RSVD52
AJ32
AK32
TP8
TP9
BCLK_ITP
BCLK_ITP#
AN35
AM35
TP43
TP44
RSVD56
RSVD57
RSVD58
TP14
TP21
For Sandy
Rs
For IVY
Stuff
AT2
AT1
AR1
B1
The CFG signals have a default value of '1' if not terminated on the board.
9/26 modify
Normal Operation
R133
CFG[6:5] (PCIE Port Bifurcation Straps)
1K/F_4
CFG5
CFG6
0
Lane Reversed
CFG4
(DP Presence Strap)
Disable; No physical DP attached to eDP
Enable; An ext DP device is connected to eDP
CFG7
(PEG Defer Training)
PEG train immediately following

xxRESETB de assertion
PEG wait for BIOS training
CFG4
R129
IV@1K/F_4
CFG7
R123
*1K/F_4
R130
R127
11:
10:
01:
00:
*1K/F_4
*1K/F_4
eDP_EN# [22]
(Default) x16 - Device 1 functions 1 and 2 disabled

x8, x8 - Device 1 function 1 enabled ; function 2 disabled
Reserved - (Device 1 function 1 disabled ; function 2 enabled)
x8,x4,x4 - Device 1 functions 1 and 2 enabled

PROJECT : ZQTA/ZQSA
Size
Document Number
Rev
1A
IVY Bridge 4/4

Date:
5
NC
CFG2
VCC_DIE_SENSE
VSS_DIE_SENSE
AK28
AK29
AL26
AL27
AK26
AL29
AL30
AM31
AM32
AM30
AM28
AM26
AN28
AN31
AN26
AM27
AK31
AN29
KEY
1
CFG2
(PEG Static Lane Reversal)
XDP_CFG0
CFG1
CFG2
CFG3
CFG4
CFG5
CFG6
CFG7
TP16
TP13
RESERVED
IVY Bridge Processor (RESERVED, CFG)
U16I
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
CFG
U16H
AT35
AT32
AT29
AT27
AT25
AT22
AT19
AT16
AT13
AT10
AT7
AT4
AT3
AR25
AR22
AR19
AR16
AR13
AR10
AR7
AR4
AR2
AP34
AP31
AP28
AP25
AP22
AP19
AP16
AP13
AP10
AP7
AP4
AP1
AN30
AN27
AN25
AN22
AN19
AN16
AN13
AN10
AN7
AN4
AM29
AM25
AM22
AM19
AM16
AM13
AM10
AM7
AM4
AM3
AM2
AM1
AL34
AL31
AL28
AL25
AL22
AL19
AL16
AL13
AL10
AL7
AL4
AL2
AK33
AK30
AK27
AK25
AK22
AK19
AK16
AK13
AK10
AK7
AK4
AJ25
Sheet

1
of
44
[3,5,8,9,11,22,32,35,36,40,41]
9,22,23,24,25,26,27,28,31,32,34,35,36,37,38,39,40,41]
[3,8,9,10,11,15,28,30,31,34,35,36,41,42]
+1.05V
+3V
+3V_S5
CPT/PPT (LVDS,DDI)
U20D
DMI0RXN
DMI1RXN
DMI2RXN
DMI3RXN
[3]
[3]
[3]
[3]
DMI_RXP0
DMI_RXP1
DMI_RXP2
DMI_RXP3
BE24
BC20
BJ18
BJ20
DMI0RXP
DMI1RXP
DMI2RXP
DMI3RXP
[3]
[3]
[3]
[3]
DMI_TXN0
DMI_TXN1
DMI_TXN2
DMI_TXN3
AW24
AW20
BB18
AV18
DMI0TXN
DMI1TXN
DMI2TXN
DMI3TXN
[3]
[3]
[3]
[3]
DMI_TXP0
DMI_TXP1
DMI_TXP2
DMI_TXP3
AY24
AY20
AY18
AU18
DMI0TXP
DMI1TXP
DMI2TXP
DMI3TXP
FDI_RXN0
FDI_RXN1
FDI_RXN2
FDI_RXN3
FDI_RXN4
FDI_RXN5
FDI_RXN6
FDI_RXN7
BJ14
AY14
BE14
BH13
BC12
BJ12
BG10
BG9
FDI_RXP0
FDI_RXP1
FDI_RXP2
FDI_RXP3
FDI_RXP4
FDI_RXP5
FDI_RXP6
FDI_RXP7
BG14
BB14
BF14
BG13
BE12
BG12
BJ10
BH9
FDI_INT
BJ24
+1.05V
R521
49.9/F_4 DMI_COMP
BG25
R527
750/F_4
BH21
DMI_ZCOMP
FDI_FSYNC0
DMI_IRCOMP
FDI_FSYNC1
DMI2RBIAS
FDI_LSYNC0
FDI_LSYNC1
FDI_TXN0
FDI_TXN1
FDI_TXN2
FDI_TXN3
FDI_TXN4
FDI_TXN5
FDI_TXN6
FDI_TXN7
FDI_TXP0
FDI_TXP1
FDI_TXP2
FDI_TXP3
FDI_TXP4
FDI_TXP5
FDI_TXP6
FDI_TXP7
[22] INT_LVDS_BRIGHT
L_BKLTCTL
T40
K47
L_DDC_CLK
L_DDC_DATA
T45
P39
L_CTRL_CLK
L_CTRL_DATA
[22] INT_LVDS_EDIDCLK
[22] INT_LVDS_EDIDDATA
[3]
[3]
[3]
[3]
[3]
[3]
[3]
[3]
R164
R188
+3V
2.2K_4
2.2K_4
R186
2.37K/F_4
AF37
AF36
LVD_IBG
LVD_VBG
AE48
AE47
LVD_VREFH
LVD_VREFL
[22] INT_TXLCLKOUT[22] INT_TXLCLKOUT+
AK39
AK40
LVDSA_CLK#
LVDSA_CLK
[22] INT_TXLOUT0[22] INT_TXLOUT1[22] INT_TXLOUT2-
AN48
AM47
AK47
AJ48
[22] INT_TXLOUT0+
[22] INT_TXLOUT1+
[22] INT_TXLOUT2+
AN47
AM49
AK49
AJ47
T7
[3]
[3]
[3]
[3]
[3]
[3]
[3]
[3]
AW16
FDI_INT
AV12
FDI_FSYNC0
[3]
BC10
FDI_FSYNC1
[3]
AV14
FDI_LSYNC0
[3]
BB10
FDI_LSYNC1
[3]
AF40
AF39
DSWVREN [8]
AH45
AH47
AF49
AF45
[3]
SUS_PWR_ACK
R539
SUSACK#_R
*0_4
C12
K3
C607
SYS_RESET#
*1u/10V_4
SYS_PWROK
P12
*0_4
PWROK
L10
[3] PM_DRAM_PWRGD
[32] PCH_RSMRST#
DPWROK
WAKE#
+3V
SYS_PWROK
L22
PWROK_EC
SUSACK#
XDP_DBRST#
[3] XDP_DBRST#
R583
System Power Management
DSWVRMEN
+3V_S5
CLKRUN# / GPIO32
SUS_STAT# / GPIO61
APWROK
+3V_S5
SUSCLK / GPIO62
+3V_S5
SLP_S5# / GPIO63
PM_DRAM_PWRGD
B13
DRAMPWROK
PCH_RSMRST#
C21
RSMRST#
SUS_PWR_ACK
K16
SUSWARN#/SUSPWRDNACK/GPIO30
E20
[32] DNBSWON#
A18
E22
PCH_RSMRST#
B9
PCIE_WAKE#
N3
CLKRUN#
G8
SUS_STAT#
T15
N14
PCH_SUSCLK
T12
D10
PCH_SLP_S5#
T14
PCIE_WAKE#
CLKRUN#
AH43
AH49
AF47
AF43
[28]
H4
SUSC#
[32]
SLP_S3#
F4
SUSB#
[32]
[22] INT_HSYNC
[22] INT_VSYNC
G10
SLP_A#
H20
PM_BATLOW#
PM_RI#
DSW
SLP_SUS#
E10
BATLOW# / GPIO72 +3V_S5
PMSYNCH
A10
RI#
+3V_S5
SLP_LAN# / GPIO29
ACPRESENT / GPIO31
G16
SLP_SUS#
INT_CRT_HSYNC_R
INT_CRT_VSYNC_R
M47
M49
DAC_IREF
T43
T42
R187
1K/F_4
SLP_A# [32]
PM_SYNC
AP43
AP45
SDVO_STALLN
SDVO_STALLP
AM42
AM40
SDVO_INTN
SDVO_INTP
AP39
AP40
LVDSA_DATA#0
LVDSA_DATA#1
LVDSA_DATA#2
LVDSA_DATA#3
LVDSA_DATA0
LVDSA_DATA1
LVDSA_DATA2
LVDSA_DATA3
LVDSB_CLK#
LVDSB_CLK
LVDSB_DATA#0
LVDSB_DATA#1
LVDSB_DATA#2
LVDSB_DATA#3
LVDSB_DATA0
LVDSB_DATA1
LVDSB_DATA2
LVDSB_DATA3
CRT_BLUE
CRT_GREEN
CRT_RED
DAC_IREF
CRT_IRTN
HDMI_DDCCLK_SW [23]
HDMI_DDCDATA_SW [23]
DDPB_AUXN
DDPB_AUXP
DDPB_HPD
DDPB_0N
DDPB_0P
DDPB_1N
DDPB_1P
DDPB_2N
DDPB_2P
DDPB_3N
DDPB_3P
AV42
AV40
AV45
AV46
AU48
AU47
AV47
AV49
INT_HDMITX2N_R
INT_HDMITX2P_R
INT_HDMITX1N_R
INT_HDMITX1P_R
INT_HDMITX0N_R
INT_HDMITX0P_R
INT_HDMICLK-_R
INT_HDMICLK+_R
P46
P42
DDPC_HPD_PU
DDPC_CTRLCLK
DDPC_CTRLDATA
DDPC_AUXN
DDPC_AUXP
DDPC_HPD
DDPC_0N
DDPC_0P
DDPC_1N
DDPC_1P
DDPC_2N
DDPC_2P
DDPC_3N
DDPC_3P
DDPD_AUXN
DDPD_AUXP
DDPD_HPD
DDPD_0N
DDPD_0P
DDPD_1N
DDPD_1P
DDPD_2N
DDPD_2P
DDPD_3N
DDPD_3P
CRT_HSYNC
CRT_VSYNC
P38
M39
AT49
AT47
AT40
DDPD_CTRLCLK
DDPD_CTRLDATA
CRT_DDC_CLK
CRT_DDC_DATA
HDMI_HP
RP184
2
RP194
2
RP204
2
RP214
2
3
1
3
1
3
1
3
1
IV@0_4P2R
[23]
INT_HDMITX2N
INT_HDMITX2P
INT_HDMITX1N
INT_HDMITX1P
INT_HDMITX0N
INT_HDMITX0P
INT_HDMICLKINT_HDMICLK+
IV@0_4P2R
IV@0_4P2R
IV@0_4P2R
[23]
[23]
[23]
[23]
[23]
[23]
[23]
[23]
AP47
AP49
AT38
AY47
AY49
AY43
AY45
BA47
BA48
BB47
BB49
M43
M36
DDPC_HPD_PU
R169
*2.2K_4
DDPD_HPD_PU
R197
*2.2K_4
0 : Port not detected
DDPD_HPD_PU
AT45
AT43
BH41
BB43
BB45
BF44
BE44
BF42
BE42
BJ42
BG42
B
PANTHER POINT
R place close to PCH
T10
AP14
K14
IV@33_4
IV@33_4
The required series-resistors are:

Direct Connect - 33
Docking Topology - 20
10/31 modify
AC_PRESENT
R126
R125
N48
P49
T49
T39
M40
[22] INT_CRT_DDCCLK
[22] INT_CRT_DDCDAT
SLP_S4#
SLP_A#
INT_CRT_BLU
INT_CRT_GRN
INT_CRT_RED
[22] INT_CRT_BLU
[22] INT_CRT_GRN
[22] INT_CRT_RED
SDVO_TVCLKINN
SDVO_TVCLKINP
SDVO_CTRLCLK
SDVO_CTRLDATA
[32]
+3V_S5
PWRBTN#
L_BKLTEN
L_VDD_EN
Digital Display Interface
BC24
BE20
BG18
BG20
P45
CRT
DMI_RXN0
DMI_RXN1
DMI_RXN2
DMI_RXN3
J47
M45
INT. HDMI
[3]
[3]
[3]
[3]
FDI
DMI
U20C
[22] INT_LVDS_BLON
[22] INT_LVDS_DIGON
LVDS
CPT/PPT (DMI,FDI,PM)
[3]
R483
IV@150/F_4
INT_CRT_BLU
R482
IV@150/F_4
INT_CRT_GRN
R484
IV@150/F_4
INT_CRT_RED
SLP_LAN#
PANTHER POINT
System PWR_OK(CLG)
PCH Pull-high/low(CLG)
+3V_S5
IMVP_PWRGD PU +3V
PWROK_EC PD
so AND gate output dont need PD again
+3V_S5
CRB 1.0 change R8315 to 1K

+3V
R545
10K_4
R584
8.2K_4
PM_BATLOW#
R282
8.2K_4
XDP_DBRST#
R567
4.99K/F_4
PCIE_WAKE#
R261
10K_4
R554
*1K_4
SLP_LAN#
R230
*10K_4
PCH_RSMRST# R219
10K_4
SUS_PWR_ACK
R538
10K_4
AC_PRESENT
R220
10K_4
C629
*0.1u/10V_4
to PCH Pin12,
U24
XDP and EE debug
PM_RI#
CLKRUN#
2
[3]
SYS_PWROK
SYS_PWROK
4
1
TC7SH08FU
SYS_PWROK
R601
IMVP_PWRGD [3,35]
PWROK_EC
PWROK_EC [32]
*10K_4
PM_DRAM_PWRGD R232
R594
100K_4
200/F_4
wo S3 leakage, remove R
PROJECT : ZQTA/ZQSA
Size
Document Number
Date:
Rev
1A
Panther Point 1/6

5
Sheet
1
of
44
20K_4
RTC_RST#
18p/50V_4
1
2
RTC_CON.
J2
C612
1u/6.3V_4
*SHORT_PAD
R216
1M_4
Add MOSFET to separate CODEC SYNC signal
10/5 chnage footprint & PN
CN13
DFWF02MS118
HDA Bus(CLG)
+3V_RTC
battery
AHL03003022
AHL03003024
R202
33_4
ACZ_BITCLK_R
R176
33_4
ACZ_SYNC_CODEC
[26] PCH_AZ_CODEC_RST#
R198
33_4
ACZ_RST#_R
[26] PCH_AZ_CODEC_SDOUT
R506
33_4
ACZ_SDOUT_R
[26] PCH_AZ_CODEC_BITCLK
[26] PCH_AZ_CODEC_SYNC
PCH JTAG Debug (CLG)
R201
+5V
ACZ_SYNC_CODEC
RTCX1
RTC_X2
C20
RTCX2
RTC_RST#
D20
RTCRST#
SRTC_RST#
G22
SRTCRST#
SM_INTRUDER#
K22
INTRUDER#
PCH_INVRMEN
C17
INTVRMEN
3
Q13
2N7002K
CRB 1.0
[26]
SPKR
R175
1M_4
ACZ_BITCLK_R
N34
HDA_BCLK
ACZ_SYNC_R
L34
HDA_SYNC
SPKR
T10
SPKR
ACZ_RST#_R
K34
HDA_RST#
E34
HDA_SDIN0
G34
HDA_SDIN1
C34
HDA_SDIN2
[26] PCH_AZ_CODEC_SDIN0
TP25
ACZ_SDOUT_R
A34
HDA_SDIN3
A36
HDA_SDO
9/27 add
R292
210/F_4
TP60
R293
210/F_4
TP28
PCH_JTAG_TMS_R
PCH_JTAG_TDI_R
PCH_JTAG_TCK
PCH_JTAG_TDO_R
R553
51_4
PCH Dual SPI (CLG)
R552
*100/F_4
R279
100/F_4
R280
100/F_4
(Default for WIN8)
W25Q32BVSSIG / AKE391P0N00----->4MB
+3VPCU
R336
10K_4
W25Q16BVSSIG / AKE38FP0N01----->2MB
R319
VA@0_6
+3V_M
R551
BA@0_6
[32] PCH_SPI_SI
10/31 add
[32] PCH_SPI_SO
+3V_PCH_ME
1
33_4 6
33_4 5
33_4 2
CE#
SCK
SI
SO
HOLD#
WP#
VSS
C344
*22p/50V_4
+3V_PCH_ME
R328
LPC_LFRAME# [24,32]
R287
IRQ_SERIRQ
8.2K_4
SATA0RXN
SATA0RXP
SATA0TXN
SATA0TXP
SATA1RXN
SATA1RXP
SATA1TXN
SATA1TXP
AM10
AM8
AP11
AP10
SATA_RXN_SSD
SATA_RXP_SSD
SATA_TXN_SSD
SATA_TXP_SSD
SATA2RXN
SATA2RXP
SATA2TXN
SATA2TXP
AD7
AD5
AH5
AH4
TP64
SATA3RXN
SATA3RXP
SATA3TXN
SATA3TXP
AB8
AB10
AF3
AF1
TP65
SATA4RXN
SATA4RXP
SATA4TXN
SATA4TXP
Y7
Y5
AD3
AD1
TP37
SATA5RXN
SATA5RXP
SATA5TXN
SATA5TXP
Y3
Y1
AB3
AB1
SATAICOMPO
Y11
+3V
HDA_DOCK_RST# / GPIO13
+3V_S5
J3
JTAG_TCK
PCH_JTAG_TMS_R
H7
JTAG_TMS
PCH_JTAG_TDI_R
K5
JTAG_TDI
PCH_JTAG_TDO_R
H1
JTAG_TDO
T3
PCH_SPI_CS1#
T1
PCH_SPI_SI
V4
PCH_SPI_SO
U3
SPI_CS1#
Y10
SATA_COMP
R236
37.4/F_4
SATA3RCOMPO
SATA3_COMP
R231
49.9/F_4
SATA3COMPI
AB13
SATA3RBIAS
AH1
SATA3_RBIAS
R561
P3
SATA_ACT#
SATA0GP / GPIO21
V14
SATA0GP
SATA1GP / GPIO19
P1
BBS_BIT0
R301
*1K_4
SPKR
R171
*1K_4
R526
330K_4
SATALED#
SPI_MOSI
+3V
SPI_MISO
+3V
VDD
8
7 R320
3.3K_4
Strap description
Sampled
SPKR
No reboot mode setting
PWROK
C338
0.1u/10V_4
ROM-2M
3.3K_4
+3V_PCH_ME
10/11 add
+3V
1 = Setting to No-Reboot mode

0 = "top-block swap" mode
GNT3# / GPIO55
Top-Block Swap Override
PWROK
10K_4
R274
10K_4
INTVRMEN
Integrated 1.05V VRM enable
ALWAYS
GNT1# / GPIO51
Boot BIOS Selection 1 [bit-1]
PWROK
Should be always pull-up
GNT1#
GNT0#
+3V_RTC
R325
R333
R326
1
33_4 6
33_4 5
33_4 2
CE#
SCK
SI
SO
HOLD#
WP#
VSS
C343
*22p/50V_4
+3V_PCH_ME
R339
VDD
8
7 R335
3.3K_4
C351
0.1u/10V_4
ROM-4M
R321
R331
GPIO19
Boot BIOS Selection 0 [bit-0]
PWROK
HDA_SDO
Flash Descriptor Security
RSMRST
3.3K_4
[32] SPI_CS0#_UR_ME
+3V
+3V
SATA0GP/GPIO21
SATA4GP/GPIO16
SATA5GP/GPIO49
If these pins are unused use 8.2k
to 10k pull-up to +Vcc3_3 or 8.2k
to 10k pull-down to ground
Used as GPIO only. at chklist 1.2
Boot Location
*0_4
0_4
PCH_SPI_CS0#
SPI
LPC
DMI/FDI Termination voltage
PWROK
GPIO28
On-die PLL Voltage Regulator
RSMRST#
1 = overridden
[32]
HDA_SYNC
On-Die PLL VR Voltage Select
RSMRST
GPIO15
Intel ME Crypto Transport Layer

Security (TLS) cipher suite
internal PD
RSMRST
DEEP S4/S5 well

On Die DSW VR Enable
DSW
*1K_4
R558
*1K_4
R505
ME_WR
R548
2.2K_4
R546
1 = Set to Vcc
PCH_SPI_CS1#
R473
0 = effect (default)(weak pull-down 20K)

0 = Set to Vss (weak pull-down 20K)
DF_TVS
PCH_INVRMEN
U8
PCH_SPI_CS1#
PCH_SPI_CLK
PCH_SPI_SI
PCH_SPI_SO
SATA_ACT# [31]
PCI_GNT3# [9]
1 = Default (weak pull-up 20K)
SATA ODD
750/F_4
R570
Configuration
0 = Default (weak pull-down 20K)
SSD
+1.05V
PANTHER POINT
Pin Name
[24]
[24]
[24]
[24]
SATA_RXN5_C [25]
SATA_RXP5_C [25]
SATA_TXN5 [25]
SATA_TXP5 [25]
SPI_CS0#
SATA HDD
DG recommended that AC coupling capacitors should be

close to the connector (<100 mils) for optimal signal quality.
AB12
SATAICOMPI
SPI_CLK
Y14
[32]
SATA_RXN0_C [25]
SATA_RXP0_C [25]
SATA_TXN0 [25]
SATA_TXP0 [25]
HDA_DOCK_EN# / GPIO33
+3V
AM3
AM1
AP7
AP5
N32
PCH_JTAG_TCK
[24,32]
[24,32]
[24,32]
[24,32]
TP24
TP23
V5
SERIRQ
C36
PCH Strap Table
U6
R324
R334
R322
E36 PCH_DRQ#0
K36 PCH_DRQ#1
+3V_PCH_ME
10/11 add
PCH_SPI_CS0#
PCH_SPI_CLK
PCH_SPI_SI
PCH_SPI_SO
D36
LDRQ0#
LDRQ1# / GPIO23
PCH_GPIO13
PCH_SPI_CS0#
+3V_S5
FWH4 / LFRAME#
+3V
PCH_GPIO33
PCH_SPI_CLK
[32] PCH_SPI_CLK
for BA W25Q64BVSSIG / AKE3EFP0N00----->8MB
LPC_LAD0
LPC_LAD1
LPC_LAD2
LPC_LAD3
10K_4
+3V_S5
R564
210/F_4
C38
A38
B37
C37
FWH0 / LAD0
FWH1 / LAD1
FWH2 / LAD2
FWH3 / LAD3
LPC
SRTC_RST#
20K_4
C620
1u/6.3V_4
A20
SATA 6G
R593
1
2
18p/50V_4
RTC_X1
SATA
CN11
R524
10M_4
*SHORT_PAD
C563
20MIL
U20A
Y3
32.768KHZ
30mils
RTC
J1
C614
1u/6.3V_4
R448
1K_4
IHDA
BAT54C
C564
JTAG
+3V_RTC_1
2
1
R596
20MIL
CPT/PPT (HDA,JTAG,SATA)
+3V_RTC
0_6
SPI
D11
R445
3
4
20mils
+3VPCU
PCH2(CLG)
RTC Circuitry(RTC)
0 = Disable
BBS_BIT1 [9]
*SHORT_4 ACZ_SDOUT_R
0930
+1.8V
H_SNB_IVB# [3]
DF_TVS
[10]
1K_4
R277
*1K_4
PLL_ODVR_EN
1 = Enable (weak pull-up 20K)

0 = Support by 1.8V (weak pull-down)
1 = Support by 1.5V
R177
+3V_S5
Default weak pull-up on GNT0/1#

[Need external pull-down for LPC BIOS]
BBS_BIT0
1K_4
ME_WR default EC setting folating

for future CPU, Sandy Bridge NC
DF_TVS needs to be pulled up to VccDFTERM power rail
through 2.2 kOhm 5% - R8361 change to 0 or not??
[10]
ACZ_SYNC_R
Needs to be pulled High for Huron River platform.

chklist 1.2
0 = Disable (Default)
1 = Enable
R563
+3V_S5
1K_4
PCH_GPIO15
[10]
DSWVREN
[22,25,30,31,32,33,34,41,42]
[11,22,23,25,26,31,34,41]
[3,7,9,10,11,15,28,30,31,34,35,36,41,42]
High = Enable (Default)

Low = Disable
R530
+3V_RTC
330K_4
R528
DSWVREN [7]
*330K_4
+3VPCU
+5V
+3V_S5
[3,5,7,9,11,22,32,35,36,40,41]
23,24,25,26,27,28,31,32,34,35,36,37,38,39,40,41]
[5,10,11,41]
NV_ALE
+1.05V
+3V
+1.8V
Intel Anti-Theft HDD protection

Only for Interposer
PWROK
0 = Disable (Internal pull-down 20kohm)
+1.8V
R308
*1K_4
NV_ALE
[9]
PROJECT :ZQTA/ZQSA
Size
Document Number
Date:
Rev
1A
Panther Point 2/6

5
Sheet
1
of
44
+3V
+3V_S5
+1.05V
CPT/PPT (PCI-E,SMBUS,CLK)
U20B
[30] USB30_TX3+
TP61
TP30
USB30_RX3+
USB30_RX4+
USB30_TX1-
TP26
TP29
USB30_TX3USB30_TX4USB30_TX1+
TP27
USB30_TX3+
USB30_TX4+
PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#
K40
K38
H38
G38
dGPU_EDIDSEL#
dGPU_SELECT#
REQ#3
C46
C44
E40
[8]
BBS_BIT1
[10] BOARD_ID2
[8]
PCI_GNT3#
TP25
TP26
TP27
TP28
TP29
TP30
TP31
TP32
TP33
TP34
TP35
TP36
TP37
TP38
TP39
TP40
RSVD23
RSVD24
RSVD25
RSVD26
RSVD27
USB30_RX1N
USB30_RX2N
USB30_RX3N
USB30_RX4N
USB30_RX1P
USB30_RX2P
USB30_RX3P
USB30_RX4P
USB30_TX1N
USB30_TX2N
USB30_TX3N
USB30_TX4N
USB30_TX1P
USB30_TX2P
USB30_TX3P
USB30_TX4P
PIRQA#
PIRQB#
PIRQC#
PIRQD#
RSVD28
RSVD29
REQ1# / GPIO50 +3V

REQ2# / GPIO52 +3V
REQ3# / GPIO54 +3V
D47
E42
F46
GNT1# / GPIO51 +3V

GNT2# / GPIO53 +3V
GNT3# / GPIO55 +3V
G42
G40
C42
D44
PIRQE# / GPIO2 +3V

PIRQF# / GPIO3 +3V
PIRQG# / GPIO4 +3V
PIRQH# / GPIO5 +3V
11/2 modify
G_SENSOR_INT#_PCH
dGPU_PWR_EN
DGPU_HOLD_RST#
EXTTS_SNI_DRV1_PCH
TP32
PCI_PME#
K10
PCI_PLTRST#
[3] PCI_PLTRST#
CLK_PCI_FB
[24] CLK_LPC_DEBUG
[32] CLK_PCI_775
TP22
R485
R183
R184
22_4
22_4
22_4
C6
CLK_PCI_FB_C
CLK_LPC_DEBUG_C
CLK_PCI_775_C
H49
H43
J48
K42
H40
AU2
AT4
AT3
AT1
AY3
AT5
AV3
AV1
BB1
BA3
BB5
BB3
BB7
BE8
BD4
BF6
USBRBIAS#
USBRBIAS
[28]
[28]
[28]
[28]
LAN
PCIE_RX3PCIE_RX3+
PCIE_TX3PCIE_TX3+
C252
C249
0.1u/10V_4
0.1u/10V_4
PERN2
PERP2
PETN2
PETP2
BG36
BJ36
AV34
AU34
PCIE_TXN3_C
PCIE_TXP3_C
NV_ALE
[8]
AY5
BA2
AT12
BF3
C24
A24
C25
B25
C26
A26
K28
H28
E28
D28
C28
A28
C29
B29
N28
M28
L30
K30
G30
E30
C30
A30
L32
K32
G32
E32
C32
A32
USBP0USBP0+
C33
USB_BIAS
T41
T40
T39
T38
C250
C253
0.1u/10V_4
0.1u/10V_4
BE38
BC38
AW38
AY38
PCIE_TXN8_C
PCIE_TXP8_C
SML0CLK
SML1ALERT# / PCHHOT# / GPIO74
+3V_S5
+3V_S5
PERN7
PERP7
PETN7
PETP7
PERN8
PERP8
PETN8
PETP8
USBP1USBP1+
USBP2USBP2+
USBP3USBP3+
USBP4USBP4+
[30]
[30]
[30]
[30]
[24]
[24]
[30]
[30]
XHCI for USBP0-3
USB/B-USB1-1/USB debug
PCIE_CLK_USB30_REQ#
MB USB
EHCI1
BLUETOOTH
J2
PCIE_CLKREQ1#
Reserve for SIM card
[22]
[22]
[30]
[30]
[24]
[24]
PCIECLKRQ1# / GPIO18
CL_RST1#
PCIE_CLKREQ3#
Mini Card (WLAN)
EHCI2
22.6/F_4
[24] CLK_PCH_SRC5#
[24] CLK_PCH_SRC5
Wireless
B33
[24] PCIE_CLK_REQ5#
PCIE_CLKREQ4#
L12
CLK_PCH_SRC5#
CLK_PCH_SRC5
V45
V46
PCIE_CLKREQ5#
L14
CLK_PCIE_LOM#
CLK_PCIE_LOM
AB42
AB40
CLKOUT_DMI_N
CLKOUT_DMI_P
CLKIN_DMI_N
CLKIN_DMI_P
+3V
SMB_PCH_CLK
SMB_PCH_DAT
A12
DRAMRST_CNTRL_PCH
C8
SMB_ME0_CLK
G12
SMB_ME0_DAT
C13
SML1ALERT#_R
E14
SMB_ME1_CLK
M16
SMB_ME1_DAT
DRAMRST_CNTRL_PCH
R536
*0_4
SML1ALERT# [10,31]
For EC
M7
CL_CLK1
CL_DATA1
P10
CL_RST1#
M10
CLK_PEGA_REQ#
TP33
TP36
TP35
CLK_PEGA_REQ#
CLKOUT_PCI0
CLKOUT_PCI1
CLKOUT_PCI2
CLKOUT_PCI3
CLKOUT_PCI4
[15]
AB37
AB38
CLK_PCIE_VGA# [15]
CLK_PCIE_VGA [15]
AV22
AU22
CLK_CPU_BCLKN
CLK_CPU_BCLKP
AM12
AM13
CLK_DPLL_SSCLKN
CLK_DPLL_SSCLKP
CLKIN_GND1_N
CLKIN_GND1_P
BF18
BE18
CLK_BUF_PCIE_3GPLLN
CLK_BUF_PCIE_3GPLLP
BJ30
BG30
CLK_BUF_BCLKN
CLK_BUF_BCLKP
G24
E24
CLK_BUF_DREFCLKN
CLK_BUF_DREFCLKP
CLKIN_SATA_N
CLKIN_SATA_P
+3V_S5
AK7
AK5
CLK_BUF_DREFSSCLKN
CLK_BUF_DREFSSCLKP
K45
REFCLK14IN
+3V_S5
CLKIN_PCILOOPBACK
CLK_PCH_14M
H45
CLK_PCI_FB
V47
V49
XTAL25_IN
XTAL25_OUT
[3]
[3]
Y47
XCLK_RCOMP R478
K43
SKU_ID1
F47
CLK_FLEX1
[3]
[3]
C538
PME#
PLTRST#
[4,13,14]
For LAN
T11
+3V_S5
CLKOUT_PCIE5N
CLKOUT_PCIE5P
SMBALERT#
H14
C9
CLKOUT_PCIE4N
CLKOUT_PCIE4P
E12
+3V
CLKIN_DOT_96N
CLKIN_DOT_96P
Y43
Y45
Reserve for FP
CLKOUT_PEG_A_N
CLKOUT_PEG_A_P
+3V_S5
CLKOUT_PCIE3N
CLKOUT_PCIE3P
A8
Reserve for Touch pad
PEG_A_CLKRQ# / GPIO47
CLKOUT_DP_N
CLKOUT_DP_P
Y37
Y36
USB/B-USB1-2
CL_DATA1
CLKOUT_PCIE2N
CLKOUT_PCIE2P
V10
Camera
Reserve for card reader
R507
CLKOUT_PCIE1N
CLKOUT_PCIE1P
M1
PCIE_CLK_REQ2#
USBP8USBP8+
USBP9USBP9+
USBP10USBP10+
AA48
AA47
USB port6/7 may not be available on all PCH sku

(HM55 support 12port only)
SML1DATA / GPIO75
CLKOUT_PCIE0N
CLKOUT_PCIE0P
AB49
AB47
Mini-SSD
SML1CLK / GPIO58
CL_CLK1
+3V_S5
Y40
Y39
Reserve for USB I/O function
USBP3USBP3+
USBP5USBP5+
[24] PCIE_RX8[24] PCIE_RX8+

[24] PCIE_TX8[24] PCIE_TX8+
Wireless
+3V_S5
PERN6
PERP6
PETN6
PETP6
BG40
BJ40
AY40
BB40
SML0ALERT# / GPIO60
SML0DATA
PERN5
PERP5
PETN5
PETP5
BJ38
BG38
AU36
AV36
AT8
+3V_S5
PERN4
PERP4
PETN4
PETP4
BG37
BH37
AY36
BB36
AV5
AV10
SMBDATA
PERN3
PERP3
PETN3
PETP3
BF36
BE36
AY34
BB34
SMBALERT# / GPIO11
SMBCLK
SMBUS
AT10
BC8
+3V_S5
27p/50V_4
[25] G_SENSOR_INT#_PCH
[40] dGPU_PWR_EN
[15] DGPU_HOLD_RST#
BE34
BF34
BB32
AY32
Port1 and port9 can be used on debug mode

USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P
USBP4N
USBP4P
USBP5N
USBP5P
USBP6N
USBP6P
USBP7N
USBP7P
USBP8N
USBP8P
USBP9N
USBP9P
USBP10N
USBP10P
USBP11N
USBP11P
USBP12N
USBP12P
USBP13N
USBP13P
PERN1
PERP1
PETN1
PETP1
+3V_S5
+3V_S5
+3V_S5
+3V_S5
+3V_S5
+3V_S5
+3V_S5
+3V_S5
OC0# /
OC1# /
OC2# /
OC3# /
OC4# /
OC5#
OC6# /
OC7# /
GPIO59
GPIO40
GPIO41
GPIO42
GPIO43
/ GPIO9
GPIO10
GPIO14
A14
K20
B17
C16
L16
A16
D14
C14
USB_OC0#
USB_OC1#
USB_OC2#
USB_OC3#
USB_OC4#
USB_OC5#
USB_OC6#
USB_OC7#
USB_OC0# [30]
USB_OC1# [30]
[28] CLK_PCIE_LOM#
[28] CLK_PCIE_LOM
LAN
CLK_PCIE_LAN_REQ#
[28] CLK_PCIE_LAN_REQ#
T6
CLKOUT_PEG_B_N
CLKOUT_PEG_B_P
T8
CLK_PCIE_REQ6#
T13
CLK_PCH_SRC7P
V38
V37
CLK_PCIE_REQ7#
K12
For XDP
CLK_ITPN
CLK_ITPP
T11
T13
Y2
25MHz
C539
XCLK_RCOMP
90.9/F_4
+1.05V
BOARD_ID4
[10,31]
27p/50V_4
CLKOUT_PCIE6N
CLKOUT_PCIE6P
PANTHER POINT
B
R486
1M_4
PEG_B_CLKRQ# / GPIO56+3V_S5
E6
V40
V42
CLK_PCH_SRC6P
XTAL25_IN
XTAL25_OUT
[30] USB30_TX3-
USB30_RX3USB30_RX4-
TP21
TP22
TP23
TP24
AY7
AV7
AU3
BG4
+3V_S5
CLKOUT_PCIE7N
CLKOUT_PCIE7P
AK14
AK13
+3V_S5
CLKOUT_ITPXDP_N
CLKOUT_ITPXDP_P
+3V
CLKOUTFLEX0 / GPIO64
+3V
+3V
+3V
FLEX CLOCKS
[30] USB30_RX3+
TP62
RSVD7
RSVD8
RSVD9
RSVD10
RSVD11
RSVD12
RSVD13
RSVD14
RSVD15
RSVD16
RSVD17
RSVD18
RSVD19
RSVD20
RSVD21
RSVD22
USB
[30] USB30_RX3-
BE28
BC30
BE32
BJ32
BC28
BE30
BF32
BG32
AV26
BB26
AU28
AY30
AU26
AY26
AV28
AW30
RSVD5
RSVD6
RSVD
B21
M20
AY16
BG46
TX AC cap place at connector side, AC cap to

connector < 400mils
TP1
TP2
TP3
TP4
TP5
TP6
TP7
TP8
TP9
TP10
TP11
TP12
TP13
TP14
TP15
TP16
TP17
TP18
TP19
TP20
PCI
RSVD1
RSVD2
RSVD3
RSVD4
Controller
U20E
BG26
BJ26
BH25
BJ16
BG16
AH38
AH37
AK43
AK45
C18
N30
H3
AH12
AM4
AM5
Y13
K24
L24
AB46
AB45
Link
BG34
BJ34
AV32
AU32
PCI-E*
CPT/PPT (PCI,USB,NVRAM)
h^
CLOCKS
13,14,19,22,23,24,25,26,27,28,31,32,34,35,36,37,38,39,40,41]
[3,7,8,10,11,15,28,30,31,34,35,36,41,42]
[3,5,7,8,11,22,32,35,36,40,41]
K49
T5
H47
48M_CLK_CR
T37
PANTHER POINT
+3V
+3V_S5
PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#
R534
10/11 modify
10
9
8
7
6
USB_OC1#
USB_OC4#
USB_OC2#
USB_OC3#
C605
0.1u/10V_4
1
2
3
4
5
USB_OC6#
USB_OC0#
USB_OC7#
USB_OC5#
G_SENSOR_INT#_PCH
2
4
PLTRST#
REQ#3
dGPU_PWR_EN
[15,24,28,32]
1
2
3
4
5
DGPU_HOLD_RST#
EXTTS_SNI_DRV1_PCH
dGPU_EDIDSEL#
dGPU_SELECT#
R565
R549
R294
R225
R306
R278
R281
10K_4
10K_4
10K_4
10K_4
10K_4
10K_4
10K_4
PCIE_CLK_USB30_REQ#
PCIE_CLKREQ3#
PCIE_CLKREQ4#
PCIE_CLKREQ5#
CLK_PCIE_LAN_REQ#
CLK_PCIE_REQ6#
CLK_PCIE_REQ7#
R556
R273
10K_4
10K_4
PCIE_CLKREQ1#
PCIE_CLK_REQ2#
[32] 2ND_MBCLK
+3V
R149
2.2K_4
+3V
S5
SMB_ME1_CLK
SMB_PCH_DAT
R603
4.7K_4
Q7
2N7002K
S0
CLK_SDATA [13,14,24,25,31]
Q41
2N7002K
+3V_S5
+3V
10K_10P8R
R582
100K_4
9/26 modify
R586
R495
R496
*SP@1K_4
SP@100K_4
dGPU_PW_CTRL#
OP@10K_4
SP@10K_4
SKU_ID1
UMA
Hidden
UMA boot
dGPU Only
GPU
Hidden
GPU boot
UMA+GPU
dGPU/SG
UMA boot
UMA
UMA/SG
UMA boot
Switchable
(Mux)
+3V
EV@10K_4
SP@10K_4
SKU_ID0
CLK_PEGA_REQ#
[32] 2ND_MBDATA
UMA Only
Optimize
(Muxless)
R571
R559
*10K_4
Setup
Menu
[10]
+3V
R166
R162
SKU_ID1
SKU_ID0
VGA H/W
(GPIO64) (GPIO16)
Signal
[10]
CLK_BUF_BCLKN
CLK_BUF_BCLKP
R514
R513
10K_4
10K_4
CLK_BUF_PCIE_3GPLLN
CLK_BUF_PCIE_3GPLLP
CLK_BUF_DREFCLKN
CLK_BUF_DREFCLKP
CLK_BUF_DREFSSCLKN
CLK_BUF_DREFSSCLKP
CLK_PCH_14M
R532
R531
R211
R205
R240
R244
R163
10K_4
10K_4
10K_4
10K_4
10K_4
10K_4
10K_4
SMB_PCH_CLK
R602
4.7K_4
CLK_SCLK [13,14,24,25,31]A
Q40
2N7002K
+3V_S5
CLOCK TERMINATION for FCIM
dGPU_PW_CTRL#
1 = GPU power is control by H/W (pure Discrete SKU)
SMB_ME1_DAT
Q8
2N7002K
0 = GPU power is control by PCH GPIO (Discrete, SG or Optimize)

--->(Default)
R150
2.2K_4
dGPU_PW_CTRL#
(GPIO68)
CTL : dGPU_VRON
+3V
SMBus(PCH)
U22
TC7SH08FU
11/2 modify
10
9
8
7
6
SMBus(EC)
+3V_S5
R479
11/2 modify
CLK_REQ/Strap Pin(CLG)
+3V_S5
8.2K_4
8.2K_4
8.2K_4
8.2K_4
+3V
10K_10P8R
5
PCI_PLTRST#
R161
R191
R469
R170
PCI/USBOC# Pull-up(CLG)
+3V
PLTRST#(CLG)
R246
1K_4
DRAMRST_CNTRL_PCH
R295
R590
R591
R296
R283
R537
10K_4
2.2K_4
2.2K_4
2.2K_4
2.2K_4
10K_4
SMBALERT#
SMB_PCH_CLK
SMB_PCH_DAT
SMB_ME0_CLK
SMB_ME0_DAT
SML1ALERT#_R

PROJECT : ZQTA/ZQSA
Size
Document Number
Date:
Rev
1A
Panther Point 3/6

1
Sheet
of
44
9,22,23,24,25,26,27,28,31,32,34,35,36,37,38,39,40,41]
[3,7,8,9,11,15,28,30,31,34,35,36,41,42]
CPT/PPT (GPIO,VSS_NCTF,RSVD)
+3V
+3V_S5
U20F
S_GPIO
[32] SIO_EXT_SMI#
D
[32] SIO_EXT_SCI#
R276
100_4
+3V
TACH4 / GPIO68
C40
A42
TACH1 / GPIO1
+3V
+3V
TACH5 / GPIO69
B41
BOARD_ID1
H36
TACH2 / GPIO6
+3V
+3V
TACH6 / GPIO70
C41
SIO_EXT_SCI#
E38
TACH3 / GPIO7
+3V
+3V
TACH7 / GPIO71
A40
C10
GPIO8
TP63
TP66
GPIO12
[8] PCH_GPIO15
[9]
+3V
SIO_EXT_SMI#
T7
LAN_PHY_PWR_CTRL / GPIO12
G2
GPIO15 +3V_S5
A20GATE
PECI
SATA4GP / GPIO16 +3V
[8] PLL_ODVR_EN
PCH_GPIO24
E8
GPIO24 / MEM_LED +3V_S5
PCH_GPIO27
E16
GPIO27
DSW
PLL_ODVR_EN
P8
GPIO28
+3V_S5
STP_PCI#
K1
STP_PCI# / GPIO34
K4
GPIO35 +3V
V8
SATA2GP / GPIO36
+3V
FDI_OVRVLTG
M5
SATA3GP / GPIO37
+3V
MFG_MODE
N2
SLOAD / GPIO38
BOARD_ID0
M3
SDATAOUT0 / GPIO39
V13
SDATAOUT1 / GPIO48
TEST_SET_UP
TP34
+3V
DMI_OVRVLTG
R572
[9,31] SML1ALERT#
*SHORT_4
CRIT_TEMP_REP#
SV_DET_NC
R266
CPU/MISC
SCLOCK / GPIO22
[39,40] dGPU_VRON
C
+3V
T5
+3V
V3
SATA5GP / GPIO49
D6
GPIO57 +3V_S5
+3V
+3V
100K_4
10/11 modify
R491
10K_4
P4
SIO_A20GATE
AU16
PCH_PECI
P5
PROCPWRGD
AY11
THRMTRIP#
AY10
INIT3_3V#
T14
DF_TVS
AY1
TS_VSS1
AH8
TS_VSS2
AK11
TS_VSS3
AH10
TS_VSS4
AK10
SIO_A20GATE [32]
at
at
is
be
PCH_GPIO24
R307
*10K_4
PLL_ODVR_EN
R303
10K_4
SIO_EXT_SMI#
SIO_EXT_SCI#
R148
R145
10K_4
10K_4
STP_PCI#
SIO_A20GATE
SIO_RCIN#
CRIT_TEMP_REP#
R566
R290
R304
R560
*10K_4
10K_4
10K_4
10K_4
+3V
10/31 modify
TP31
SIO_RCIN#
SIO_RCIN#
[32]
H_PW RGOOD [3]

PCH_THRMTRIP#
R249
390_4
PM_THRMTRIP# [3]
+1.8V
DF_TVS
DF_TVS
DF_TVS [8]
R550
*1K_4
Follow the Emerald Lake 2 CRB

PCH_GPIO27
R223
10K_4
GPIO27 : If not used then use 8.2-k to 10-k pull-down to GND.
NC_1
P37
VSS_NCTF_15
BG2
VSS_NCTF_16
BG48
VSS_NCTF_17
BH3
VSS_NCTF_18
BH47
A4
VSS_NCTF_1
VSS_NCTF_19
BJ4
A44
VSS_NCTF_2
VSS_NCTF_20
BJ44
A45
VSS_NCTF_3
VSS_NCTF_21
BJ45
A46
VSS_NCTF_4
VSS_NCTF_22
BJ46
A5
VSS_NCTF_5
VSS_NCTF_23
BJ5
A6
VSS_NCTF_6
VSS_NCTF_24
BJ6
B3
VSS_NCTF_7
VSS_NCTF_25
C2
B47
VSS_NCTF_8
VSS_NCTF_26
C48
BD1
VSS_NCTF_9
VSS_NCTF_27
D1
BD49
VSS_NCTF_10
VSS_NCTF_28
D49
BE1
VSS_NCTF_11
VSS_NCTF_29
E1
Reserve for future
SV_SET_UP
High = Strong (Default)
BE49
VSS_NCTF_12
VSS_NCTF_30
E49
BF1
VSS_NCTF_13
VSS_NCTF_31
F1
BF49
VSS_NCTF_14
VSS_NCTF_32
F49
TEST_SET_UP
R272
R285
+3V
10K_4
*1K_4
+3V
R555
R471
10K_4
10K_4
BOARD_ID0
BOARD_ID1
R568
R467
*10K_4
*10K_4
R490
R472
*10K_4
*10K_4
BOARD_ID3
BOARD_ID4
R487
R468
10K_4
10K_4
BOARD_ID3
BOARD_ID4
8 Layer ------->High *
6 Layer ------->Low
+3V
chklist 1.2
chklist 1.2
disabled after PLTRST# deasserts.
pulled high when strap is sampled.
[31]
[9,31]
BOARD_ID2
SGPIO
PANTHER POINT
SATA2GP : strap for reserved

SATA3GP : strap for reserved
NOTE: The internal pull-down
NOTE: This signal should not
+3V_S5
+3V
+3V
NCTF
11/2 modify
TACH0 / GPIO17
+3V
GPIO
G_SENSOR_ID
GPIO Pull-up/Pull-down(CLG)
CABLE_ID [22]
BOARD_ID3
+3V_S5
RCIN#
D40
[15,19] DGPU_PW ROK
dGPU_PW _CTRL# [9]
+3V_S5
C4
U2
SKU_ID0
BMBUSY# / GPIO0
+3V
S_GPIO
R302
R289
1K_4
*1K_4
R167
*10K_4
R172
BOARD_ID2
[9]
10K_4
+3V
+3V
+3V
R288
R305
100K_4
FDI_OVRVLTG
R291
*1K_4
DMI_OVRVLTG R286
*200K/F_4
G_SENSOR_ID
R275
SP@10K_4
SP@1K_4
MFG-TEST
+3V
FDI TERMINATION
VOLTAGE OVERRIDE
LOW - Tx, Rx terminated

to same voltage
DMI TERMINATION
VOLTAGE OVERRIDE
Low = Tx, Rx terminated to

same voltage (DC Coupling Mode)
(DEFAULT)
High = W/O G_SENSOR

BIOS RECOVERY
MFG_MODE
R569
R557
10K_4
*1K_4
PROJECT : ZQTA/ZQSA
Size
Low = W G_SENSOR
Rev
1A
Panther Point 4/6

Date:
Document Number
Sheet
1
10
of
44
4
PCH5(CLG)
CPT/PPT (POWER)
+VCCA_DAC_1_2
L36
*1uH/25mA_6
+1.05V
+1.05V_VCCAPLL_EXP
C569
*10u/6.3V_6
+1.05V
+1.05V_VCCIO
R533
AN19
VCCIO[28]
BJ22
VCCAPLLEXP
AN16
C290
1u/6.3V_4
C259
1u/6.3V_4
C263
1u/6.3V_4
AN17
AN21
C265
1u/6.3V_4
C291
10u/6.3V_6
+3V_VCC_EXP
R519
*SHORT_8
VCCIO[18]
VCCIO[19]
AP21
VCCIO[20]
C558
0.1u/10V_4
+VCCAFDI_VRM
+1.05V
+VCCAFDI_VRM
VCCIO[22]
VCCIO[23]
AT24
VCCIO[24]
VSSALVDS
AK37
VCCTX_LVDS[1]
AM37
VCCTX_LVDS[2]
AM38
VCCTX_LVDS[3]
AP36
VCCTX_LVDS[4]
AP37
VCC3_3[6]
VCCIO[26]
BH29
VCC3_3[3]
DO@0_4
+3V_S5
VCC3_3[7]
R250
*SHORT_4
PCH_VCCDSW
+1.8V
+1.05V
+VCCAPLL_CPY_PCH
C309
*0.1u/10V_4
+3V_SUS_CLKF33
*SHORT_6
+VCCDPLL_CPY
C552
R511
IV@22u/6.3V_8
L35
*10uH/100mA_8
DO@0_4
C565
*10u/6.3V_6
+1.05V
R199
IV@0.01u/25V_4
+VCCSUS1
R196
V34
C260
0.1u/10V_4
C271
*1u/6.3V_4
VCCME(+1.05V) = ??A(??mils)
+3V
V33
+1.05V
*SHORT_6
+1.05V_VCCEPW
R587
+1.05V
+1.1V_VCC_DMI
R258
VCCDMI[1]
AT16
+VCCAFDI_VRM
VA@0.002/F_1206
AT20
R648
+1.05V_M
BA@0.002/F_1206
*SHORT_4
C267
1u/6.3V_4
C286
1u/6.3V_4
VCCCLKDMI
+VCC_DMI_CCI
L31
AB36
C532
1u/6.3V_4
*0_8
+1.05V_VCCAPLL_FDI
BG6
R267
*SHORT_8
+1.05V_VCCDPLL_FDI
AP17
VCCIO[27]
AU20
VCCDMI[2]
VccAFDIPLL
VCCDFTERM[1]
AG16
VCCDFTERM[2]
AG17
VCCDFTERM[3]
AJ16
VCCDFTERM[4]
AJ17
R300
R477
*10uH/100mA_8
R474
+1.8V
C257
22u/6.3V_8
+1.05V
FDI
PANTHER POINT
V1
AL24
DCPSUS[3]
AA19
VCCASW[1]
AA21
VCCASW[2]
AA24
VCCASW[3]
VCCASW[4]
VCCASW[5]
AA29
VCCASW[6]
AA31
VCCASW[7]
AC26
VCCASW[8]
VCCASW[9]
VCCASW[10]
AC31
VCCASW[11]
0_4
AD29
VCCASW[12]
AD31
VCCASW[13]
W21
VCCASW[14]
W23
VCCASW[15]
W24
VCCASW[16]
W26
VCCASW[17]
W29
VCCASW[18]
W31
VCCASW[19]
W33
VCCASW[20]
C332
0.1u/10V_4
+1.05V
R562
*SHORT_6
VA@0_6
R647
BA@0_6
C599
1u/6.3V_4
10/31 add
+3V_M
R192
C299
0.1u/10V_4 +VCCRTCEXT
+VCCAFDI_VRM
*SHORT_6
+VCCAFDI_VRM
R481
N16
DCPRTC
Y49
VCCVRM[4]
65mA(10mils)
+1.05V_VCCA_A_DPL
BD47
VCCADPLLA
8mA(8mils)
+1.05V_VCCA_B_DPL
BF47
VCCADPLLB
C544
1u/6.3V_4
+1.05V
VCCDIFFCLKN= 55mA(10mils)
AF17
AF33
AF34
AG34
VCCIO[7]
VCCDIFFCLKN[1]
VCCDIFFCLKN[2]
VCCDIFFCLKN[3]
AG33
VCCSSC
C298
0.1u/10V_4 +VCCSST
+1.05V
*0_6
V16
DCPSST
T17
V19
DCPSUS[1]
DCPSUS[2]
+V1.05M_VCCSUS
BJ8
V_PROC_IO
1mA(8mils)
R535
*SHORT_4
VCCRTC<1mA(8mils)
C583
0.1u/10V_4
C586
0.1u/10V_4
A22
+3V_RTC
C288
1u/6.3V_4
[3,7,8,9,10,15,28,30,31,34,35,36,41,42]
[26,30,34,35,36,37,38,39]
[4,5,13,14,37,40]
C296
0.1u/10V_4
VCCRTC
PANTHER POINT
C287
0.1u/10V_4
T29
VCCSUS3_3[7]
T23
VCCSUS3_3[8]
T24
VCCSUS3_3 = 119mA(15mils)
+3V_S5
D
R243
*SHORT_6
C316
0.1u/10V_4
+3V_VCCPUSB
R235
VCCSUS3_3[9]
V23
VCCSUS3_3[10]
V24
VCCSUS3_3[6]
P24
+3V_VCCAUBG
VCCIO[34]
T26
+VCCAUPLL
V5REF_SUS
M26
+5V_PCH_VCC5REFSUS
*SHORT_6
C308
0.1u/10V_4
R209
*SHORT_6
+1.05V
VCC5REFSUS=1mA
R229
10/F_4
+5V_S5
RB500V-40
+3V_S5
C302
0.1u/10V_4
AN23
+VCCA_USBSUS
AN24
+3V_VCCPSUS
P34
+5V_PCH_VCC5REF
C285
*1u/6.3V_4
VCCSUS3_3[2]
N20
VCCSUS3_3[3]
N22
VCCSUS3_3[4]
P20
VCCSUS3_3[5]
P22
VCC3_3[1]
AA16
VCC3_3[8]
W16
VCC3_3[4]
T34
VCC3_3[2]
AJ2
R168
10/F_4
+5V
D5
RB500V-40
+3V
R238
*SHORT_6
+3V_S5
C240
1u/6.3V_4
+3V_VCCPSUS
VCCSUS3_3 = 119mA(15mils)
C311
1u/10V_4
R247
+3V_VCCPCORE
*SHORT_6
+3V
VCCPCORE = 28mA(10mils)
+3V
C315
0.1u/10V_4
VCCIO[5]
AF13
VCCIO[12]
AH13
VCCIO[13]
AH14
VCCIO[6]
AF14
VCCAPLLSATA
+3V
C317
0.1u/10V_4
R299
+V1.05S_SATA3
*SHORT_8
+1.05V
C331
1u/10V_4
??mA(??mils)
AK1
L37
+V1.1LAN_VCCAPLL
*10uH/100mA_8
VCCVRM= 114mA(15mils)
VCCVRM[1]
AF11
VCCIO[2]
AC16
VCCIO[3]
AC17
VCCIO[4]
AD17
VCCASW[22]
T21
VCCASW[23]
V21
VCCASW[21]
T19
VCCSUSHDA
P32
+1.05V
C594
*10u/6.3V_6
+VCCAFDI_VRM
R228
*SHORT_6
+1.05V
C294
1u/6.3V_4
+1.05V_VCCEPW
+VTT_VCCPCPU
C580
4.7u/6.3V_6
VCCIO[33]
C269
1u/6.3V_4
V5REF= 1mA
MISC
R264
C295
*1u/6.3V_4
VCCVRM: 1.8V (Destop)

1.5V (Mobile)
0_6
CPU
+1.05V
R263
RTC
+1.5V
+V1.05V_SSCVCC
T27
V5REF
HDA
+VCCAFDI_VRM
B
*0_6
VCCIO[32]
VCCSUS3_3[1]
VCCSSC= 95mA(10mils)
R226
P28
C255
0.1u/10V_4
*SHORT_6
+VCCDIFFCLK
+VCCDIFFCLKN
P26
VCCIO[31]
DCPSUS[4]
Reserve +3V_S5 to VCCSPI for EC 795

C256
1u/6.3V_4
VCCIO[30]
*SHORT_8
D6
+3V_S5
R575
C593
1u/6.3V_4
VCCIO[14]
*1/F_4
VCCPNAND = 190 mA(15mils)
VCCIO[29]
VCC3_3[5]
VCCAPLLDMI2
AC29
VCCSPI = 20mA(8mils)
VCCSPI
DCPSUSBYP
+1.05V
R203
N26
VCCDSW3_3
AL29
AC27
*SHORT_8
+3V_VCCME_SPI
T38
AA27
C530
*10u/6.3V_6
+VCCP_NAND
VCCACLK
BH23
AA26
C273
1u/6.3V_4
C603
22u/6.3V_8
VCCCLKDMI = 20mA(8mils)
+1.1V_VCC_DMI_CCI
V12
VccASW =1.01 A(60mils)
C318
1u/6.3V_4
+VCCAFDI_VRM
T16
L34
IV@0.1uH/250mA_8
C553
+VCCPDSW
C319
0.1u/10V_4
+VCC_TX_LVDS
C554
IV@0.01u/25V_4
AD49
VCCDSW3_3= 3mA
IV@0_4
R190
VCCDMI = 42mA(10mils)
VCCVRM[3]
VCCVRM[2]
R542
+1.1V_VCC_DMI
+3V
R195
When Dis sku, LVDS power can short to GND
VccTX_LVDS=60mA(10mils)
POWER
U20J
+VCCACLK
VCCIO[25]
AN34
AP16
AK36
+1.05V_VCCUSBCORE
*0_8
10/31 add
VCCIO[21]
AP26
AN33
VCCALVDS
R480
+1.05V
C527
10u/6.3V_6
+VCCALVDS
VccALVDS=1mA(8mils)
VCCIO[17]
AN27
AP24
+3V
VCCIO[16]
AN26
AP23
VCCIO[15]
C540
0.1u/10V_4
U47
+3V_VCC_GIO
VccIO =2.925 A(140mils)
0.002/F_1206
C541
0.01u/25V_4
USB
*SHORT_6
HVCMOS
R224
VSSADAC
U48
C525
22u/6.3V_8
Clock and Miscellaneous
+1.05V_PCH_VCCDPLL_EXP
VCCIO
+1.05V
CRT
C289
10u/6.3V_6
VCC CORE
C262
1u/6.3V_4
VCCADAC
LVDS
C272
1u/6.3V_4
R5285 near PCH ball for VCCP GND sense
VCCCORE[1]
VCCCORE[2]
VCCCORE[3]
VCCCORE[4]
VCCCORE[5]
VCCCORE[6]
VCCCORE[7]
VCCCORE[8]
VCCCORE[9]
VCCCORE[10]
VCCCORE[11]
VCCCORE[12]
VCCCORE[13]
VCCCORE[14]
VCCCORE[15]
VCCCORE[16]
VCCCORE[17]
DMI
C266
1u/6.3V_4
D
AA23
AC23
AD21
AD23
AF21
AF23
AG21
AG23
AG24
AG26
AG27
AG29
AJ23
AJ26
AJ27
AJ29
AJ31
CPT/PPT (POWER)
BKP1608HS181-T/180ohm/1.5A_6
VccCORE =1.3 A(60mils)
0.002/F_1206
+3V
L30
SATA
+1.05V_PCH_VCC
R284
DFT / SPI
+1.05V
POWER
PCI/GPIO/LPC
VccADAC =1mA(8mils)
U20G
+V3.3A_1.5A_HDA_IO
C239
*1u/6.3V_4
VCCME = 1.01A(60mils)
R159
*0_4
+1.5VSUS
R160
0_4
+3V_S5
VCCSUSHDA= 10mA(8mils)
C238
0.1u/10V_4
+3V_S5
+5V_S5
+1.5VSUS
[8,22,23,25,26,31,34,41]
+5V
10,13,14,19,22,23,24,25,26,27,28,31,32,34,35,36,37,38,39,40,41]
+3V
[24,37,41] +1.5V
[3,5,7,8,9,22,32,35,36,40,41]
+1.05V
[5,8,10,41] +1.8V
[8]
+1.05V
L32
10uH/100mA_8
+3V_RTC
+1.05V_VCCA_A_DPL
+ C546
220u/2.5V_3528
C542
1u/6.3V_4
+ C548
220u/2.5V_3528
C551
1u/6.3V_4
+3V
L33
R165
1/F_4 L15
10uH/100mA_8
10uH/100mA_8
+1.05V_VCCA_B_DPL
+3V_SUS_CLKF33
C235
10u/6.3V_6
C237
1u/10V_4

PROJECT :ZQTA/ZQSA
Size
Document Number
Date:
Rev
1A
Panther Point 5/6

5
Sheet
11
of
44
PCH6(CLG)
U20I
IBEX PEAK-M (GND)

D
U20H
H5
AA17
AA2
AA3
AA33
AA34
AB11
AB14
AB39
AB4
AB43
AB5
AB7
AC19
AC2
AC21
AC24
AC33
AC34
AC48
AD10
AD11
AD12
AD13
AD19
AD24
AD26
AD27
AD33
AD34
AD36
AD37
AD38
AD39
AD4
AD40
AD42
AD43
AD45
AD46
AD8
AE2
AE3
AF10
AF12
AD14
AD16
AF16
AF19
AF24
AF26
AF27
AF29
AF31
AF38
AF4
AF42
AF46
AF5
AF7
AF8
AG19
AG2
AG31
AG48
AH11
AH3
AH36
AH39
AH40
AH42
AH46
AH7
AJ19
AJ21
AJ24
AJ33
AJ34
AK12
AK3
VSS[0]
VSS[1]
VSS[2]
VSS[3]
VSS[4]
VSS[5]
VSS[6]
VSS[7]
VSS[8]
VSS[9]
VSS[10]
VSS[11]
VSS[12]
VSS[13]
VSS[14]
VSS[15]
VSS[16]
VSS[17]
VSS[18]
VSS[19]
VSS[20]
VSS[21]
VSS[22]
VSS[23]
VSS[24]
VSS[25]
VSS[26]
VSS[27]
VSS[28]
VSS[29]
VSS[30]
VSS[31]
VSS[32]
VSS[33]
VSS[34]
VSS[35]
VSS[36]
VSS[37]
VSS[38]
VSS[39]
VSS[40]
VSS[41]
VSS[42]
VSS[43]
VSS[44]
VSS[45]
VSS[46]
VSS[47]
VSS[48]
VSS[49]
VSS[50]
VSS[51]
VSS[52]
VSS[53]
VSS[54]
VSS[55]
VSS[56]
VSS[57]
VSS[58]
VSS[59]
VSS[60]
VSS[61]
VSS[62]
VSS[63]
VSS[64]
VSS[65]
VSS[66]
VSS[67]
VSS[68]
VSS[69]
VSS[70]
VSS[71]
VSS[72]
VSS[73]
VSS[74]
VSS[75]
VSS[76]
VSS[77]
VSS[78]
VSS[79]
VSS[80]
VSS[81]
VSS[82]
VSS[83]
VSS[84]
VSS[85]
VSS[86]
VSS[87]
VSS[88]
VSS[89]
VSS[90]
VSS[91]
VSS[92]
VSS[93]
VSS[94]
VSS[95]
VSS[96]
VSS[97]
VSS[98]
VSS[99]
VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]
VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]
PANTHER POINT
A
AK38
AK4
AK42
AK46
AK8
AL16
AL17
AL19
AL2
AL21
AL23
AL26
AL27
AL31
AL33
AL34
AL48
AM11
AM14
AM36
AM39
AM43
AM45
AM46
AM7
AN2
AN29
AN3
AN31
AP12
AP19
AP28
AP30
AP32
AP38
AP4
AP42
AP46
AP8
AR2
AR48
AT11
AT13
AT18
AT22
AT26
AT28
AT30
AT32
AT34
AT39
AT42
AT46
AT7
AU24
AU30
AV16
AV20
AV24
AV30
AV38
AV4
AV43
AV8
AW14
AW18
AW2
AW22
AW26
AW28
AW32
AW34
AW36
AW40
AW48
AV11
AY12
AY22
AY28
AY4
AY42
AY46
AY8
B11
B15
B19
B23
B27
B31
B35
B39
B7
F45
BB12
BB16
BB20
BB22
BB24
BB28
BB30
BB38
BB4
BB46
BC14
BC18
BC2
BC22
BC26
BC32
BC34
BC36
BC40
BC42
BC48
BD46
BD5
BE22
BE26
BE40
BF10
BF12
BF16
BF20
BF22
BF24
BF26
BF28
BD3
BF30
BF38
BF40
BF8
BG17
BG21
BG33
BG44
BG8
BH11
BH15
BH17
BH19
H10
BH27
BH31
BH33
BH35
BH39
BH43
BH7
D3
D12
D16
D18
D22
D24
D26
D30
D32
D34
D38
D42
D8
E18
E26
G18
G20
G26
G28
G36
G48
H12
H18
H22
H24
H26
H30
H32
H34
F3
VSS[159]
VSS[160]
VSS[161]
VSS[162]
VSS[163]
VSS[164]
VSS[165]
VSS[166]
VSS[167]
VSS[168]
VSS[169]
VSS[170]
VSS[171]
VSS[172]
VSS[173]
VSS[174]
VSS[175]
VSS[176]
VSS[177]
VSS[178]
VSS[179]
VSS[180]
VSS[181]
VSS[182]
VSS[183]
VSS[184]
VSS[185]
VSS[186]
VSS[187]
VSS[188]
VSS[189]
VSS[190]
VSS[191]
VSS[192]
VSS[193]
VSS[194]
VSS[195]
VSS[196]
VSS[197]
VSS[198]
VSS[199]
VSS[200]
VSS[201]
VSS[202]
VSS[203]
VSS[204]
VSS[205]
VSS[206]
VSS[207]
VSS[208]
VSS[209]
VSS[210]
VSS[211]
VSS[212]
VSS[213]
VSS[214]
VSS[215]
VSS[216]
VSS[217]
VSS[218]
VSS[219]
VSS[220]
VSS[221]
VSS[222]
VSS[223]
VSS[224]
VSS[225]
VSS[226]
VSS[227]
VSS[228]
VSS[229]
VSS[230]
VSS[231]
VSS[232]
VSS[233]
VSS[234]
VSS[235]
VSS[236]
VSS[237]
VSS[238]
VSS[239]
VSS[240]
VSS[241]
VSS[242]
VSS[243]
VSS[244]
VSS[245]
VSS[246]
VSS[247]
VSS[248]
VSS[249]
VSS[250]
VSS[251]
VSS[252]
VSS[253]
VSS[254]
VSS[255]
VSS[256]
VSS[257]
VSS[258]
VSS[259]
VSS[260]
VSS[261]
VSS[262]
VSS[263]
VSS[264]
VSS[265]
VSS[266]
VSS[267]
VSS[268]
VSS[269]
VSS[270]
VSS[271]
VSS[272]
VSS[273]
VSS[274]
VSS[275]
VSS[276]
VSS[277]
VSS[278]
VSS[279]
VSS[280]
VSS[281]
VSS[282]
VSS[283]
VSS[284]
VSS[285]
VSS[286]
VSS[287]
VSS[288]
VSS[289]
VSS[290]
VSS[291]
VSS[292]
VSS[293]
VSS[294]
VSS[295]
VSS[296]
VSS[297]
VSS[298]
VSS[299]
VSS[300]
VSS[301]
VSS[302]
VSS[303]
VSS[304]
VSS[305]
VSS[306]
VSS[307]
VSS[308]
VSS[309]
VSS[310]
VSS[311]
VSS[312]
VSS[313]
VSS[314]
VSS[315]
VSS[316]
VSS[317]
VSS[318]
VSS[319]
VSS[320]
VSS[321]
VSS[322]
VSS[323]
VSS[324]
VSS[325]
VSS[328]
VSS[329]
VSS[330]
VSS[331]
VSS[333]
VSS[334]
VSS[335]
VSS[337]
VSS[338]
VSS[340]
VSS[342]
VSS[343]
VSS[344]
VSS[345]
VSS[346]
VSS[347]
VSS[348]
VSS[349]
VSS[350]
VSS[351]
VSS[352]
H46
K18
K26
K39
K46
K7
L18
L2
L20
L26
L28
L36
L48
M12
P16
M18
M22
M24
M30
M32
M34
M38
M4
M42
M46
M8
N18
P30
N47
P11
P18
T33
P40
P43
P47
P7
R2
R48
T12
T31
T37
T4
W34
T46
T47
T8
V11
V17
V26
V27
V29
V31
V36
V39
V43
V7
W17
W19
W2
W27
W48
Y12
Y38
Y4
Y42
Y46
Y8
BG29
N24
AJ3
AD47
B43
BE10
BG41
G14
H16
T36
BG22
BG24
C22
AP13
M14
AP3
AP1
BE16
BC16
BG28
BJ28
PANTHER POINT

PROJECT :ZQTA/ZQSA
Size
Document Number
Rev
1A
Panther Point 6/6

Date:
5
Sheet
1
12
of
44
4
+1.5VSUS
[4] M_A_A[15:0]
R208
R207
[4]
[4]
[4]
[4]
[4]
[4]
[4]
[4]
[4]
[4]
[4]
[4]
[4]
[4]
10K_4
10K_4
M_A_BS#0
M_A_BS#1
M_A_BS#2
M_A_CS#0
M_A_CS#1
M_A_CLK0
M_A_CLK0#
M_A_CLK1
M_A_CLK1#
M_A_CKE0
M_A_CKE1
M_A_CAS#
M_A_RAS#
M_A_WE#
[9,14,24,25,31] CLK_SCLK
[9,14,24,25,31] CLK_SDATA
[4]
[4]
98
97
96
95
92
91
90
86
89
85
107
84
83
119
80
78
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC#
A13
A14
A15
DIMM0_SA0
DIMM0_SA1
CLK_SCLK
CLK_SDATA
109
108
79
114
121
101
103
102
104
73
74
115
110
113
197
201
202
200
BA0
BA1
BA2
S0#
S1#
CK0
CK0#
CK1
CK1#
CKE0
CKE1
CAS#
RAS#
WE#
SA0
SA1
SCL
SDA
116
120
ODT0
ODT1
11
28
46
63
136
153
170
187
DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7
12
29
47
64
137
154
171
188
10
27
45
62
135
152
169
186
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS#0
DQS#1
DQS#2
DQS#3
DQS#4
DQS#5
DQS#6
DQS#7
M_A_ODT0
M_A_ODT1
M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7
M_A_DQS#0
M_A_DQS#1
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7
[4] M_A_DQS[7:0]
[4] M_A_DQS#[7:0]
PC2100 DDR3 SDRAM SO-DIMM

(204P)
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15
JDIM1B
M_A_DQ[63:0] [4]
JDIM1A
M_A_DQ4
M_A_DQ0
M_A_DQ2
M_A_DQ3
M_A_DQ1
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ12
M_A_DQ13
M_A_DQ11
M_A_DQ10
M_A_DQ8
M_A_DQ9
M_A_DQ14
M_A_DQ15
M_A_DQ17
M_A_DQ20
M_A_DQ18
M_A_DQ19
M_A_DQ16
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ28
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ29
M_A_DQ31
M_A_DQ30
M_A_DQ36
M_A_DQ33
M_A_DQ34
M_A_DQ39
M_A_DQ32
M_A_DQ37
M_A_DQ38
M_A_DQ35
M_A_DQ45
M_A_DQ44
M_A_DQ40
M_A_DQ42
M_A_DQ47
M_A_DQ41
M_A_DQ46
M_A_DQ43
M_A_DQ53
M_A_DQ52
M_A_DQ50
M_A_DQ55
M_A_DQ49
M_A_DQ48
M_A_DQ54
M_A_DQ51
M_A_DQ56
M_A_DQ57
M_A_DQ62
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ63
M_A_DQ58
5
7
15
17
4
6
16
18
21
23
33
35
22
24
34
36
39
41
51
53
40
42
50
52
57
59
67
69
56
58
68
70
129
131
141
143
130
132
140
142
147
149
157
159
146
148
158
160
163
165
175
177
164
166
174
176
181
183
191
193
180
182
192
194
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
2.48A
+3V
+3V
R206
*10K_4
PM_EXTTS#0
M3 solution
[5] SMDDR_VREF_DQ0_M3
R222
*M3@0_6
+SMDDR_VREF_DQ0
+SMDDR_VREF_DIMM
75
76
81
82
87
88
93
94
99
100
105
106
111
112
117
118
123
124
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
VDD18
199
VDDSPD
77
122
125
NC1
NC2
NCTEST
198
30
EVENT#
RESET#
1
126
VREF_DQ
VREF_CA
2
3
8
9
13
14
19
20
25
26
31
32
37
38
43
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
+SMDDR_VREF
R182
R194
1K/F_4
+SMDDR_VREF_DIMM
C300
470p/50V_4
SMDDR_VREF_DQ0_M3
C247
0.1u/16V_4
C277
10u/6.3V_6
+3V
C245
0.1u/16V_4
C243
0.1u/16V_4
C276
0.1u/16V_4
C283
C280
C575
0.1u/16V_4
C555
1u/6.3V_4
+0.75V_DDR_VTT
[14]
change to 1K/F_4
C281
470p/50V_4
Q14
BA@AP2302GN
R214
1K/F_4
C275
0.1u/16V_4
2.2u/6.3V_6
2.2u/6.3V_6
[4,5,11,14,37,40] +1.5VSUS
[3,7,8,9,10,11,14,19,22,23,24,25,26,27,28,31,32,34,35,36,37,38,39,40,41]
+3V
[14,37,41] +0.75V_DDR_VTT
+0.75V_DDR_VTT
C576
2.2u/6.3V_6
GND
GND
205
206
+SMDDR_VREF_DQ0
+ C241
C293
*330u/2V_7343
0.1u/16V_4
10u/6.3V_6
*0_6
REV:B Add
C278
0.1u/16V_4
C246
C242
10u/6.3V_6
+SMDDR_VREF_DQ0
C274
10u/6.3V_6
R221
+SMDDR_VREF
+1.5VSUS
C279
10u/6.3V_6
203
204
+SMDDR_VREF_DQ0
R213
1K/F_4
M1 solution
C244
10u/6.3V_6
VTT1
VTT2
+1.5VSUS
DDR3-DIMM1_H=9.2_Reverse
+SMDDR_VREF_DIMM
44
48
49
54
55
60
61
65
66
71
72
127
128
133
134
138
139
144
145
150
151
155
156
161
162
167
168
172
173
178
179
184
185
189
190
195
196
+SMDDR_VREF_DIMM
*0_6
R218
1K/F_4
Place these Caps near So-Dimm0.
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
+1.5VSUS
change to 1K/F_4

(204P)
C557
1u/6.3V_4
C561
1u/6.3V_4
C572
1u/6.3V_4
C560
C562
C567
[5,14,37] +SMDDR_VREF
4.7u/6.3V_6 4.7u/6.3V_6 4.7u/6.3V_6
PROJECT : ZQTA/ZQSA
Size
Document Number
Rev
1A
DDRIII SO-DIMM-0
Date:
5
Sheet
1
13
of
44
4
[4] M_B_A[15:0]
R573
R574
+3V
10K_4
10K_4
M_B_BS#0
M_B_BS#1
M_B_BS#2
M_B_CS#0
M_B_CS#1
M_B_CLK0
M_B_CLK0#
M_B_CLK1
M_B_CLK1#
M_B_CKE0
M_B_CKE1
M_B_CAS#
M_B_RAS#
M_B_WE#
DIMM1_SA0
DIMM1_SA1
[9,13,24,25,31] CLK_SCLK
[9,13,24,25,31] CLK_SDATA
[4]
[4]
M_B_ODT0
M_B_ODT1
M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7
M_B_DQS#0
M_B_DQS#1
M_B_DQS#2
M_B_DQS#3
M_B_DQS#4
M_B_DQS#5
M_B_DQS#6
M_B_DQS#7
[4] M_B_DQS[7:0]
[4] M_B_DQS#[7:0]
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC#
A13
A14
A15
109
108
79
114
121
101
103
102
104
73
74
115
110
113
197
201
202
200
BA0
BA1
BA2
S0#
S1#
CK0
CK0#
CK1
CK1#
CKE0
CKE1
CAS#
RAS#
WE#
SA0
SA1
SCL
SDA
116
120
ODT0
ODT1
11
28
46
63
136
153
170
187
DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7
12
29
47
64
137
154
171
188
10
27
45
62
135
152
169
186
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS#0
DQS#1
DQS#2
DQS#3
DQS#4
DQS#5
DQS#6
DQS#7

(204P)
98
97
96
95
92
91
90
86
89
85
107
84
83
119
80
78
M_B_DQ5
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ0
M_B_DQ4
M_B_DQ6
M_B_DQ7
M_B_DQ13
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ8
M_B_DQ14
M_B_DQ15
M_B_DQ20
M_B_DQ17
M_B_DQ23
M_B_DQ18
M_B_DQ16
M_B_DQ21
M_B_DQ19
M_B_DQ22
M_B_DQ28
M_B_DQ24
M_B_DQ31
M_B_DQ27
M_B_DQ29
M_B_DQ25
M_B_DQ30
M_B_DQ26
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ46
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ47
M_B_DQ42
M_B_DQ49
M_B_DQ53
M_B_DQ55
M_B_DQ54
M_B_DQ52
M_B_DQ48
M_B_DQ51
M_B_DQ50
M_B_DQ60
M_B_DQ56
M_B_DQ59
M_B_DQ58
M_B_DQ61
M_B_DQ57
M_B_DQ62
M_B_DQ63
5
7
15
17
4
6
16
18
21
23
33
35
22
24
34
36
39
41
51
53
40
42
50
52
57
59
67
69
56
58
68
70
129
131
141
143
130
132
140
142
147
149
157
159
146
148
158
160
163
165
175
177
164
166
174
176
181
183
191
193
180
182
192
194
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
2.48A
+3V
+3V
R529
*10K_4
PM_EXTTS#1
M3 solution
[5] SMDDR_VREF_DQ1_M3
+1.5VSUS
M_B_DQ[63:0] [4]
JDIM2A
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15
[4]
[4]
[4]
[4]
[4]
[4]
[4]
[4]
[4]
[4]
[4]
[4]
[4]
[4]
R270
*M3@0_6
+SMDDR_VREF_DQ1
+SMDDR_VREF_DIMM
JDIM2B
75
76
81
82
87
88
93
94
99
100
105
106
111
112
117
118
123
124
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
VDD18
199
VDDSPD
77
122
125
NC1
NC2
NCTEST
198
30
EVENT#
RESET#
1
126
VREF_DQ
VREF_CA
2
3
8
9
13
14
19
20
25
26
31
32
37
38
43
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15

(204P)
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
44
48
49
54
55
60
61
65
66
71
72
127
128
133
134
138
139
144
145
150
151
155
156
161
162
167
168
172
173
178
179
184
185
189
190
195
196
VTT1
VTT2
203
204
GND
GND
205
206
+1.5VSUS
R233
+SMDDR_VREF_DIMM
C305
0.1u/16V_4
10u/6.3V_6
C306
10u/6.3V_6
+3V
C307
0.1u/16V_4
C321
0.1u/16V_4
*0_6
R271
1K/F_4
+SMDDR_VREF_DQ1
SMDDR_VREF_DQ1_M3
C327
470p/50V_4
REV:B Add
+ C301
C248
330u/2V_7343
0.1u/16V_4
C324
C326
10u/6.3V_6
+SMDDR_VREF_DQ1
C322
0.1u/16V_4
C323
0.1u/16V_4
C282
C303
10u/6.3V_6
+SMDDR_VREF_DQ1
change to 1K/F_4
Place these Caps near So-Dimm1.

C304
10u/6.3V_6
+0.75V_DDR_VTT
M1 solution
+SMDDR_VREF
C325
10u/6.3V_6
+1.5VSUS
C328 C329
Q15
BA@AP2302GN
R269
1K/F_4
0.1u/16V_4
2.2u/6.3V_6
2.2u/6.3V_6
+0.75V_DDR_VTT
C601
2.2u/6.3V_6
C600
0.1u/16V_4
C588
1u/6.3V_4
C589
1u/6.3V_4
C568
1u/6.3V_4
C570
1u/6.3V_4
C581
C584
4.7u/6.3V_6 4.7u/6.3V_6
[4,5,11,13,37,40] +1.5VSUS
C587[3,7,8,9,10,11,13,19,22,23,24,25,26,27,28,31,32,34,35,36,37,38,39,40,41]
+3V
[13,37,41] +0.75V_DDR_VTT
4.7u/6.3V_6
[13] +SMDDR_VREF_DIMM
[5,13,37] +SMDDR_VREF

PROJECT : ZQTA/ZQSA
Size
Document Number
Rev
1A
DDRIII SO-DIMM-1
Date:
5
Sheet
1
14
of
44
+1.05V_GFX
To be placed no further from the GPU
than bewteen the PS and GPU
PLACE UNDER BGA
PLACE NEAR BALLS
C443
C432
C114
C109
C52
C86
C78
EV@22u/6.3V_8
EV@22u/6.3V_8
EV@10u/6.3V_6
EV@10u/6.3V_6
EV@4.7u/6.3V_6
EV@1u/6.3V_4
EV@1u/6.3V_4
U15A
AG19
AG21
AG22
AG24
AH21
AH25
PEX_IOVDD_1
PEX_IOVDD_2
PEX_IOVDD_3
PEX_IOVDD_4
PEX_IOVDD_5
PEX_IOVDD_6
AG13
AG15
AG16
AG18
AG25
AH15
AH18
AH26
AH27
AJ27
AK27
AL27
AM28
AN28
PEX_IOVDDQ_1
PEX_IOVDDQ_2
PEX_IOVDDQ_3
PEX_IOVDDQ_4
PEX_IOVDDQ_5
PEX_IOVDDQ_6
PEX_IOVDDQ_7
PEX_IOVDDQ_8
PEX_IOVDDQ_9
PEX_IOVDDQ_10
PEX_IOVDDQ_11
PEX_IOVDDQ_12
PEX_IOVDDQ_13
PEX_IOVDDQ_14
AN12
AM12
AN14
AM14
AP14
AP15
AN15
AM15
AN17
AM17
AP17
AP18
AN18
AM18
AN20
AM20
AP20
AP21
AN21
AM21
AN23
AM23
AP23
AP24
AN24
AM24
AN26
AM26
AP26
AP27
AN27
AM27
PEG_TX15
PEG_TX#15
PEG_TX14
PEG_TX#14
PEG_TX13
PEG_TX#13
PEG_TX12
PEG_TX#12
PEG_TX11
PEG_TX#11
PEG_TX10
PEG_TX#10
PEG_TX9
PEG_TX#9
PEG_TX8
PEG_TX#8
PEG_TX7
PEG_TX#7
PEG_TX6
PEG_TX#6
PEG_TX5
PEG_TX#5
PEG_TX4
PEG_TX#4
PEG_TX3
PEG_TX#3
PEG_TX2
PEG_TX#2
PEG_TX1
PEG_TX#1
PEG_TX0
PEG_TX#0
PEX_TX0
PEX_TX0_N
PEX_TX1
PEX_TX1_N
PEX_TX2
PEX_TX2_N
PEX_TX3
PEX_TX3_N
PEX_TX4
PEX_TX4_N
PEX_TX5
PEX_TX5_N
PEX_TX6
PEX_TX6_N
PEX_TX7
PEX_TX7_N
PEX_TX8
PEX_TX8_N
PEX_TX9
PEX_TX9_N
PEX_TX10
PEX_TX10_N
PEX_TX11
PEX_TX11_N
PEX_TX12
PEX_TX12_N
PEX_TX13
PEX_TX13_N
PEX_TX14
PEX_TX14_N
PEX_TX15
PEX_TX15_N
AK14
AJ14
AH14
AG14
AK15
AJ15
AL16
AK16
AK17
AJ17
AH17
AG17
AK18
AJ18
AL19
AK19
AK20
AJ20
AH20
AG20
AK21
AJ21
AL22
AK22
AK23
AJ23
AH23
AG23
AK24
AJ24
AL25
AK25
R_PEG_RX15
R_PEG_RX#15
R_PEG_RX14
R_PEG_RX#14
R_PEG_RX13
R_PEG_RX#13
R_PEG_RX12
R_PEG_RX#12
R_PEG_RX11
R_PEG_RX#11
R_PEG_RX10
R_PEG_RX#10
R_PEG_RX9
R_PEG_RX#9
R_PEG_RX8
R_PEG_RX#8
R_PEG_RX7
R_PEG_RX#7
R_PEG_RX6
R_PEG_RX#6
R_PEG_RX5
R_PEG_RX#5
R_PEG_RX4
R_PEG_RX#4
R_PEG_RX3
R_PEG_RX#3
R_PEG_RX2
R_PEG_RX#2
R_PEG_RX1
R_PEG_RX#1
R_PEG_RX0
R_PEG_RX#0
PEX_REFCLK
PEX_REFCLK_N
AL13
AK13
CLK_PCIE_VGA
CLK_PCIE_VGA#
PEX_TSTCLK_OUT
PEX_TSTCLK_OUT_N
AJ26
AK26
PEX_TSTCLK
PEX_TSTCLK#
PEX_WAKE
PEX_RST_N
AJ11
AJ12
PEGX_RST#
PEX_CLKREQ_N
AK12
PEX_CLKREQ#
R390
PEX_TERMP
AP29
PEX_TERMP
R372
EV@2.49K/F_4
TESTMODE
TESTMODE
AK11
R393
R46
L3
EV@10K/F_4
GSS@0_6
GL@160808-120
W'/
AC6
AJ28
AJ4
AJ5
AL11
C15
D19
D20
D23
D26
H31
T8
V32
NC_1
NC_2
NC_3
NC_4
NC_5
NC_6
NC_7
NC_8
NC_9
NC_10
NC_11
NC_12
NC_13
J8
K8
L8
M8
+3V_GFX
VDD33_1
VDD33_2
VDD33_3
VDD33_4
IV@:iGPU
EV@:dGPU
OP@:Optimus
DO@:Discrete only
SP@:Special
PEX_RX0
PEX_RX0_N
PEX_RX1
PEX_RX1_N
PEX_RX2
PEX_RX2_N
PEX_RX3
PEX_RX3_N
PEX_RX4
PEX_RX4_N
PEX_RX5
PEX_RX5_N
PEX_RX6
PEX_RX6_N
PEX_RX7
PEX_RX7_N
PEX_RX8
PEX_RX8_N
PEX_RX9
PEX_RX9_N
PEX_RX10
PEX_RX10_N
PEX_RX11
PEX_RX11_N
PEX_RX12
PEX_RX12_N
PEX_RX13
PEX_RX13_N
PEX_RX14
PEX_RX14_N
PEX_RX15
PEX_RX15_N
PEG_TX15 [3]
PEG_TX#15 [3]
PEG_TX14 [3]
PEG_TX#14 [3]
PEG_TX13 [3]
PEG_TX#13 [3]
PEG_TX12 [3]
PEG_TX#12 [3]
PEG_TX11 [3]
PEG_TX#11 [3]
PEG_TX10 [3]
PEG_TX#10 [3]
PEG_TX9 [3]
PEG_TX#9 [3]
PEG_TX8 [3]
PEG_TX#8 [3]
PEG_TX7 [3]
PEG_TX#7 [3]
PEG_TX6 [3]
PEG_TX#6 [3]
PEG_TX5 [3]
PEG_TX#5 [3]
PEG_TX4 [3]
PEG_TX#4 [3]
PEG_TX3 [3]
PEG_TX#3 [3]
PEG_TX2 [3]
PEG_TX#2 [3]
PEG_TX1 [3]
PEG_TX#1 [3]
PEG_TX0 [3]
PEG_TX#0 [3]
C133
C138
C140
C145
C128
C130
C120
C123
C112
C119
C106
C111
C100
C105
C99
C95
C93
C89
C87
C84
C81
C77
C76
C71
C64
C62
C55
C54
C61
C59
C57
C56
EW'>
:EWd
EW'^
:EWd
ED'^
:EDd
+3V_S5
+3V_GFX
R589
R384
EV@10K/F_4
10/31 modify
[10,19] DGPU_PW ROK
R649
10K/F_4
CLK_PEGA_REQ# [9]
*EV@10K/F_4
Q39
EV@DTC144EUA
PEX_CLKREQ#
Q22
EV@PDTC143TT
+3V_GFX
10/11 chnage type
10/5 modify
C390
EV@0.1u/10V_4
PLACE NEAR BALLS

A
EV@22u/6.3V_8
EV@22u/6.3V_8
EV@10u/6.3V_6
EV@10u/6.3V_6
EV@4.7u/6.3V_6
EV@1u/6.3V_4
EV@1u/6.3V_4
[9,24,28,32]
EV@0.22u/6.3V_4
EV@0.22u/6.3V_4
EV@0.22u/6.3V_4
EV@0.22u/6.3V_4
EV@0.22u/6.3V_4
EV@0.22u/6.3V_4
EV@0.22u/6.3V_4
EV@0.22u/6.3V_4
EV@0.22u/6.3V_4
EV@0.22u/6.3V_4
EV@0.22u/6.3V_4
EV@0.22u/6.3V_4
EV@0.22u/6.3V_4
EV@0.22u/6.3V_4
EV@0.22u/6.3V_4
EV@0.22u/6.3V_4
EV@0.22u/6.3V_4
EV@0.22u/6.3V_4
EV@0.22u/6.3V_4
EV@0.22u/6.3V_4
EV@0.22u/6.3V_4
EV@0.22u/6.3V_4
EV@0.22u/6.3V_4
EV@0.22u/6.3V_4
EV@0.22u/6.3V_4
EV@0.22u/6.3V_4
EV@0.22u/6.3V_4
EV@0.22u/6.3V_4
EV@0.22u/6.3V_4
EV@0.22u/6.3V_4
EV@0.22u/6.3V_4
EV@0.22u/6.3V_4
PEG_RX15 [3]
PEG_RX#15 [3]
PEG_RX14 [3]
PEG_RX#14 [3]
PEG_RX13 [3]
PEG_RX#13 [3]
PEG_RX12 [3]
PEG_RX#12 [3]
PEG_RX11 [3]
PEG_RX#11 [3]
PEG_RX10 [3]
PEG_RX#10 [3]
PEG_RX9 [3]
PEG_RX#9 [3]
PEG_RX8 [3]
PEG_RX#8 [3]
PEG_RX7 [3]
PEG_RX#7 [3]
PEG_RX6 [3]
PEG_RX#6 [3]
PEG_RX5 [3]
PEG_RX#5 [3]
PEG_RX4 [3]
PEG_RX#4 [3]
PEG_RX3 [3]
PEG_RX#3 [3]
PEG_RX2 [3]
PEG_RX#2 [3]
PEG_RX1 [3]
PEG_RX#1 [3]
PEG_RX0 [3]
PEG_RX#0 [3]
PLTRST#
PEGX_RST#
4
1
[9] DGPU_HOLD_RST#
R374
PLACE UNDER BGA
C435
C441
C388
C392
C74
C91
C98
To be placed no further from the GPU

than bewteen the PS and GPU
+1.05V_GFX
3
U14
EV@100K_4
EV@MC74VHC1G08DFT2G
CLK_PCIE_VGA [9]
CLK_PCIE_VGA# [9]
R53
*EV@200_4
TP5
10/11 change to 1k
+3V_GFX
C154
C159
C143
C142
C144
C141
PLACE CLOSE TO BGA
EV@4.7u/6.3V_6
PEX_PLLVDD
EV@1u/10V_6
PEX_PLL_HVDD
PEX_SVDD_3V3
EV@0.1u/10V_4
EV@0.1u/10V_4
EV@0.1u/10V_4
EV@0.1u/10V_4
AG26 PEX_PLLVDD
C47
C48
AH12
AG12
+3V_GFX
EV@4.7u/6.3V_6
EWD'^
+1.05V_GFX
PLACE NEAR BGA

CLOSE TO CAPS
EV@1u/6.3V_4
^Z
ZZ
Z>
^>
I/O 3.3V
PLACE UNDER BGA
C63
3(;B567WLPLQJ
EW'>
PEX_RST
EV@0.1u/10V_4
PLACE NEAR BALLS
PLACE CLOSE TO GPU BALLS
3.3V_AUX_NC
P8
VDD_SENSE
L4
GND_SENSE
L5
C124
C459
C447
+3V_GFX
Trise >= 1uS
PROJECT : ZQTA/ZQSA
[16,17,19,40] +1.05V_GFX
[17,18,19,39,40] +3V_GFX
[3,7,8,9,10,11,28,30,31,34,35,36,41,42]
+3V_S5
[3,7,8,9,10,11,13,14,19,22,23,24,25,26,27,28,31,32,34,35,36,37,38,39,40,41]
+3V
3
Tfail <=500nS
PLACE NEAR BGA
GPUVCC_SENSE [39]
GPUVSS_SENSE [39]
N13P
2
EV@0.1u/10V_4
EV@4.7u/6.3V_6
EV@4.7u/6.3V_6
EV@N13x
EV@1K_4
Size
Document Number
Date:
Rev
1A
DGPU 1/5 (PEG)

7
Sheet
15
8
of
44
U15B
[20] FBA_CMD[30:0]
U30
T31
U29
R34
R33
U32
U33
U28
V28
V29
V30
U34
U31
V34
V33
Y32
AA31
AA29
AA28
AC34
AC33
AA32
AA33
Y28
Y29
W31
Y30
AA34
Y31
Y34
Y33
V31
T1
[20] VMA_DM[7:0]
FBA_CMD0 (FBA_CMD25)
FBA_CMD1 (FBA_CMD23) DDKZz/&
FBA_CMD2
FBA_CMD3 (FBA_CMD0)
FBA_CMD7
FBA_CMD8 (FBA_CMD1)
FBA_CMD30
FBA_CMD31 (NC)
VMA_DM0
VMA_DM1
VMA_DM2
VMA_DM3
VMA_DM4
VMA_DM5
VMA_DM6
VMA_DM7
P30
F31
F34
M32
AD31
AL29
AM32
AF34
FBA_DQM0
FBA_DQM1
FBA_DQM2
FBA_DQM3
FBA_DQM4
FBA_DQM5
FBA_DQM6
FBA_DQM7
VMA_WDQS0
VMA_WDQS1
VMA_WDQS2
VMA_WDQS3
VMA_WDQS4
VMA_WDQS5
VMA_WDQS6
VMA_WDQS7
M31
G31
E33
M33
AE31
AK30
AN33
AF33
FBA_DQS_WP0
FBA_DQS_WP1
FBA_DQS_WP2
FBA_DQS_WP3
FBA_DQS_WP4
FBA_DQS_WP5
FBA_DQS_WP6
FBA_DQS_WP7
VMA_RDQS0
VMA_RDQS1
VMA_RDQS2
VMA_RDQS3
VMA_RDQS4
VMA_RDQS5
VMA_RDQS6
VMA_RDQS7
M30
H30
E34
M34
AF30
AK31
AM34
AF32
[20] VMA_WDQS[7:0]
[20] VMA_RDQS[7:0]
AA27
AA30
AB27
AB33
AC27
AD27
AE27
AF27
AG27
B13
B16
B19
E13
E16
E19
H10
H11
H12
H13
H14
H15
H16
H18
H19
H20
H21
H22
H23
H24
H8
H9
L27
M27
N27
P27
R27
T27
T30
T33
V27
W27
W30
W33
Y27
+1.5V_GFX
+1.5V_GFX
C366
C387
C12 1
C46 1
C85
C127
C82
C129
C69
C373
C36
C65
C18
C19
C17
C367
EV@4.7u/6.3V_6
EV@4.7u/6.3V_6
2 EV@1u/10V_6
2 EV@1u/10V_6
EV@0.1u/10V_4
EV@0.1u/10V_4
EV@0.1u/10V_4
EV@0.1u/10V_4
EV@0.1u/10V_4
EV@0.1u/10V_4
EV@0.1u/10V_4
EV@0.1u/10V_4
EV@10u/6.3V_8
EV@10u/6.3V_8
EV@10u/6.3V_8
EV@10u/6.3V_8
FBA_DQS_RN0
FBA_DQS_RN1
FBA_DQS_RN2
FBA_DQS_RN3
FBA_DQS_RN4
FBA_DQS_RN5
FBA_DQS_RN6
FBA_DQS_RN7
FBVDDQ_1
FBVDDQ_2
FBVDDQ_3
FBVDDQ_4
FBVDDQ_5
FBVDDQ_6
FBVDDQ_7
FBVDDQ_8
FBVDDQ_9
FBVDDQ_10
FBVDDQ_11
FBVDDQ_12
FBVDDQ_13
FBVDDQ_14
FBVDDQ_15
FBVDDQ_16
FBVDDQ_17
FBVDDQ_18
FBVDDQ_19
FBVDDQ_20
FBVDDQ_21
FBVDDQ_22
FBVDDQ_23
FBVDDQ_24
FBVDDQ_25
FBVDDQ_26
FBVDDQ_27
FBVDDQ_28
FBVDDQ_29
FBVDDQ_30
FBVDDQ_31
FBVDDQ_32
FBVDDQ_33
FBVDDQ_34
FBVDDQ_35
FBVDDQ_36
FBVDDQ_37
FBVDDQ_38
FBVDDQ_39
FBVDDQ_40
FBVDDQ_41
FBVDDQ_42
FBVDDQ_43
FBVDDQ_44
FBA_D00
FBA_D01
FBA_D02
FBA_D03
FBA_D04
FBA_D05
FBA_D06
FBA_D07
FBA_D08
FBA_D09
FBA_D10
FBA_D11
FBA_D12
FBA_D13
FBA_D14
FBA_D15
FBA_D16
FBA_D17
FBA_D18
FBA_D19
FBA_D20
FBA_D21
FBA_D22
FBA_D23
FBA_D24
FBA_D25
FBA_D26
FBA_D27
FBA_D28
FBA_D29
FBA_D30
FBA_D31
FBA_D32
FBA_D33
FBA_D34
FBA_D35
FBA_D36
FBA_D37
FBA_D38
FBA_D39
FBA_D40
FBA_D41
FBA_D42
FBA_D43
FBA_D44
FBA_D45
FBA_D46
FBA_D47
FBA_D48
FBA_D49
FBA_D50
FBA_D51
FBA_D52
FBA_D53
FBA_D54
FBA_D55
FBA_D56
FBA_D57
FBA_D58
FBA_D59
FBA_D60
FBA_D61
FBA_D62
FBA_D63
FBA_CLK0
FBA_CLK0_N
FBA_CLK1
FBA_CLK1_N
(FBA_DEBUG) FBA_DEBUG0
(NC) FBA_DEBUG1
FB_VREF_NC
FBA_CMD_RFU0
FBA_CMD_RFU1
FBA_WCK01
FBA_WCK01_N
FBA_WCK23
FBA_WCK23_N
FBA_WCK45
FBA_WCK45_N
FBA_WCK67
FBA_WCK67_N
FBA_WCKB01
FBA_WCKB01_N
FBA_WCKB23
FBA_WCKB23_N
FBA_WCKB45
FBA_WCKB45_N
FBA_WCKB67
FBA_WCKB67_N
RSVD
FB_DLL_AVDD
FBA_PLL_AVDD
FBVDDQ_PROBE
GND_PROBE
L28
M29
L29
M28
N31
P29
R29
P28
J28
H29
J29
H28
G29
E31
E32
F30
C34
D32
B33
C33
F33
F32
H33
H32
P34
P32
P31
P33
L31
L34
L32
L33
AG28
AF29
AG29
AF28
AD30
AD29
AC29
AD28
AJ29
AK29
AJ30
AK28
AM29
AM31
AN29
AM30
AN31
AN32
AP30
AP32
AM33
AL31
AK33
AK32
AD34
AD32
AC30
AD33
AF31
AG34
AG32
AG33
VMA_DQ0
VMA_DQ1
VMA_DQ2
VMA_DQ3
VMA_DQ4
VMA_DQ5
VMA_DQ6
VMA_DQ7
VMA_DQ8
VMA_DQ9
VMA_DQ10
VMA_DQ11
VMA_DQ12
VMA_DQ13
VMA_DQ14
VMA_DQ15
VMA_DQ16
VMA_DQ17
VMA_DQ18
VMA_DQ19
VMA_DQ20
VMA_DQ21
VMA_DQ22
VMA_DQ23
VMA_DQ24
VMA_DQ25
VMA_DQ26
VMA_DQ27
VMA_DQ28
VMA_DQ29
VMA_DQ30
VMA_DQ31
VMA_DQ32
VMA_DQ33
VMA_DQ34
VMA_DQ35
VMA_DQ36
VMA_DQ37
VMA_DQ38
VMA_DQ39
VMA_DQ40
VMA_DQ41
VMA_DQ42
VMA_DQ43
VMA_DQ44
VMA_DQ45
VMA_DQ46
VMA_DQ47
VMA_DQ48
VMA_DQ49
VMA_DQ50
VMA_DQ51
VMA_DQ52
VMA_DQ53
VMA_DQ54
VMA_DQ55
VMA_DQ56
VMA_DQ57
VMA_DQ58
VMA_DQ59
VMA_DQ60
VMA_DQ61
VMA_DQ62
VMA_DQ63
R30
R31
AB31
AC31
VMA_CLK0
VMA_CLK0#
VMA_CLK1
VMA_CLK1#
[21] VMC_WDQS[7:0]
[21] VMC_RDQS[7:0]
VMC_DM0
VMC_DM1
VMC_DM2
VMC_DM3
VMC_DM4
VMC_DM5
VMC_DM6
VMC_DM7
E11
E3
A3
C9
F23
F27
C30
A24
FBC_DQM0
FBC_DQM1
FBC_DQM2
FBC_DQM3
FBC_DQM4
FBC_DQM5
FBC_DQM6
FBC_DQM7
VMC_WDQS0
VMC_WDQS1
VMC_WDQS2
VMC_WDQS3
VMC_WDQS4
VMC_WDQS5
VMC_WDQS6
VMC_WDQS7
D10
D5
C3
B9
E23
E28
B30
A23
FBC_DQS_WP0
FBC_DQS_WP1
FBC_DQS_WP2
FBC_DQS_WP3
FBC_DQS_WP4
FBC_DQS_WP5
FBC_DQS_WP6
FBC_DQS_WP7
VMC_RDQS0
VMC_RDQS1
VMC_RDQS2
VMC_RDQS3
VMC_RDQS4
VMC_RDQS5
VMC_RDQS6
VMC_RDQS7
D9
E4
B2
A9
D22
D28
A30
B23
FBC_D00
FBC_D01
FBC_D02
FBC_D03
FBC_D04
FBC_D05
FBC_D06
FBC_D07
FBC_D08
FBC_D09
FBC_D10
FBC_D11
FBC_D12
FBC_D13
FBC_D14
FBC_D15
FBC_D16
FBC_D17
FBC_D18
FBC_D19
FBC_D20
FBC_D21
FBC_D22
FBC_D23
FBC_D24
FBC_D25
FBC_D26
FBC_D27
FBC_D28
FBC_D29
FBC_D30
FBC_D31
FBC_D32
FBC_D33
FBC_D34
FBC_D35
FBC_D36
FBC_D37
FBC_D38
FBC_D39
FBC_D40
FBC_D41
FBC_D42
FBC_D43
FBC_D44
FBC_D45
FBC_D46
FBC_D47
FBC_D48
FBC_D49
FBC_D50
FBC_D51
FBC_D52
FBC_D53
FBC_D54
FBC_D55
FBC_D56
FBC_D57
FBC_D58
FBC_D59
FBC_D60
FBC_D61
FBC_D62
FBC_D63
DDKZz/&
FBC_DQS_RN0
FBC_DQS_RN1
FBC_DQS_RN2
FBC_DQS_RN3
FBC_DQS_RN4
FBC_DQS_RN5
FBC_DQS_RN6
FBC_DQS_RN7
FBC_CLK0
FBC_CLK0_N
FBC_CLK1
FBC_CLK1_N
VMA_CLK0 [20]
VMA_CLK0# [20]
VMA_CLK1 [20]
VMA_CLK1# [20]
FBA_DEBUG
FBA_DEBUG1
R50
R54
EV@60.4/F_4
EV@60.4/F_4
(FBC_DEBUG) FBB_DEBUG0
(NC) FBB_DEBUG1
+1.5V_GFX
FBB_CMD_RFU0
FBB_CMD_RFU1
T2
R32
AC32
FBB_WCK01
FBB_WCK01_N
FBB_WCK23
FBB_WCK23_N
FBB_WCK45
FBB_WCK45_N
FBB_WCK67
FBB_WCK67_N
K31
L30
H34
J34
AG30
AG31
AJ34
AK34
J30
J31
J32
J33
AH31
AJ31
AJ32
AJ33
EWD'^
^Z
FBB_WCKB01
FBB_WCKB01_N
FBB_WCKB23
FBB_WCKB23_N
FBB_WCKB45
FBB_WCKB45_N
FBB_WCKB67
FBB_WCKB67_N
EW'>
ZZ
E1
PS_FB_CLAMP
R415
K27
+FB_PLLAVDD
C70
Ra
FBB_PLL_AVDD
GSS@10K_4
G9
E9
G8
F9
F11
G11
F12
G12
G6
F5
E6
F6
F4
G4
E2
F3
C2
D4
D3
C1
B3
C4
B5
C5
A11
C11
D11
B11
D8
A8
C8
B8
F24
G23
E24
G24
D21
E21
G21
F21
G27
D27
G26
E27
E29
F29
E30
D30
A32
C31
C32
B32
D29
A29
C29
B29
B21
C23
A21
C21
B24
C24
B26
C26
VMC_DQ0
VMC_DQ1
VMC_DQ2
VMC_DQ3
VMC_DQ4
VMC_DQ5
VMC_DQ6
VMC_DQ7
VMC_DQ8
VMC_DQ9
VMC_DQ10
VMC_DQ11
VMC_DQ12
VMC_DQ13
VMC_DQ14
VMC_DQ15
VMC_DQ16
VMC_DQ17
VMC_DQ18
VMC_DQ19
VMC_DQ20
VMC_DQ21
VMC_DQ22
VMC_DQ23
VMC_DQ24
VMC_DQ25
VMC_DQ26
VMC_DQ27
VMC_DQ28
VMC_DQ29
VMC_DQ30
VMC_DQ31
VMC_DQ32
VMC_DQ33
VMC_DQ34
VMC_DQ35
VMC_DQ36
VMC_DQ37
VMC_DQ38
VMC_DQ39
VMC_DQ40
VMC_DQ41
VMC_DQ42
VMC_DQ43
VMC_DQ44
VMC_DQ45
VMC_DQ46
VMC_DQ47
VMC_DQ48
VMC_DQ49
VMC_DQ50
VMC_DQ51
VMC_DQ52
VMC_DQ53
VMC_DQ54
VMC_DQ55
VMC_DQ56
VMC_DQ57
VMC_DQ58
VMC_DQ59
VMC_DQ60
VMC_DQ61
VMC_DQ62
VMC_DQ63
D12
E12
E20
F20
VMC_CLK0
VMC_CLK0#
VMC_CLK1
VMC_CLK1#
G14
G20
FBC_DEBUG
FBC_DEBUG1
FBA_CMD2
R37
EV@10K/F_4
FBA_CMD3
R363
EV@10K/F_4
FBA_CMD5
R367
EV@10K/F_4
FBA_CMD18
R368
EV@10K/F_4
FBA_CMD19
R33
EV@10K/F_4
FBC_CMD2
R66
EV@10K/F_4
FBC_CMD3
R386
EV@10K/F_4
FBC_CMD5
R61
EV@10K/F_4
FBC_CMD18
R378
EV@10K/F_4
FBC_CMD19
R47
EV@10K/F_4
&&
VMA_DQ[63:0]
VMA_DQ[63:0] [20]
VMC_DQ[63:0]
VMC_DQ[63:0] [21]
VMC_CLK0 [21]
VMC_CLK0# [21]
VMC_CLK1 [21]
VMC_CLK1# [21]
R65
R60
EV@60.4/F_4
EV@60.4/F_4
+1.5V_GFX
C12
C20
F8
E8
A5
A6
D24
D25
B27
C27
D6
D7
C6
B6
F26
E26
A26
A27
H17 +FB_PLLAVDD
C107
EV@0.1u/10V_4
PLACE CLOSE TO BALL
EV@0.1u/10V_4
PLACE CLOSE TO BALL
U27
+FB_PLLAVDD
F1
FBVDDQ_SENSE_NC
F2
FB_GND_SENSE_NC
L2
C45
EV@N13x
EV@PBY160808T-30Y-N_6
EV@22u/6.3V_8
+1.05V_GFX
PLACE CLOSE TO BGA
T18
J27
FB_CAL_PD_VDDQ
R55
T19
EV@40.2/F_4
FB_CAL_PU_GND
H27
FB_CAL_PU_GND
R57
EV@42.2/F_4
FB_CALTERM_GND
H25
FB_CAL_TERM_GND
R59
EV@51.1/F_4
FB_CAL_PD_VDDQ
FBB_CMD0 (FBC_CMD25)
FBC_CMD2
FBB_CMD3 (FBC_CMD0)
FBC_CMD7
FBB_CMD8 (FBC_CMD1)
FBB_CMD24(FBC_CMD4)
FBC_CMD30
FBC_CMD31 (NC)
T3
[21] VMC_DM[7:0]
15mils width
R28
AC28
H26
D13
E14
F14
A12
B12
C14
B14
G15
F15
E15
D15
A14
D14
A15
B15
C17
D18
E18
F18
A20
B20
C18
B18
G18
G17
F17
D16
A18
D17
A17
B17
E17
C66
C67
EV@0.1u/10V_4
EV@0.1u/10V_4
+1.5V_GFX
EW'>
:EWd
EW'^
:EWd
ED'^
:EDd
PLACE CLOSE TO BGA
EV@N13x
*EV@330u/2.5V_3528
EV@330u/2.5V_3528
PROJECT : ZQTA/ZQSA
C39
[19,20,21,40] +1.5V_GFX
[15,17,19,40] +1.05V_GFX
C43
+1.5V_GFX
U15C
FBC_CMD0
FBC_CMD1
FBC_CMD2
FBC_CMD3
FBC_CMD4
FBC_CMD5
FBC_CMD6
FBC_CMD7
FBC_CMD8
FBC_CMD9
FBC_CMD10
FBC_CMD11
FBC_CMD12
FBC_CMD13
FBC_CMD14
FBC_CMD15
FBC_CMD16
FBC_CMD17
FBC_CMD18
FBC_CMD19
FBC_CMD20
FBC_CMD21
FBC_CMD22
FBC_CMD23
FBC_CMD24
FBC_CMD25
FBC_CMD26
FBC_CMD27
FBC_CMD28
FBC_CMD29
FBC_CMD30
[21] FBC_CMD[30:0]
FBA_CMD0
FBA_CMD1
FBA_CMD2
FBA_CMD3
FBA_CMD4
FBA_CMD5
FBA_CMD6
FBA_CMD7
FBA_CMD8
FBA_CMD9
FBA_CMD10
FBA_CMD11
FBA_CMD12
FBA_CMD13
FBA_CMD14
FBA_CMD15
FBA_CMD16
FBA_CMD17
FBA_CMD18
FBA_CMD19
FBA_CMD20
FBA_CMD21
FBA_CMD22
FBA_CMD23
FBA_CMD24
FBA_CMD25
FBA_CMD26
FBA_CMD27
FBA_CMD28
FBA_CMD29
FBA_CMD30
10/7 add
Size
Document Number
Date:
Rev
1A
DGPU 2/5 (Memory)

1
Sheet
16
8
of
44
R77
L4
C157
C158
C136
C161
R75
*DO@0.1u/10V_4
DO@1u/6.3V_4
DO@0.1u/10V_4
DO@4.7u/6.3V_6
DO@160808-120
L5
+3V_GFX
OP@10K/F_4
+1.05V_GFX
10/6 modify
DO@160808-0180P
C153
C150
C156
OP@10K/F_4
IFPAB_IOVDD
320 mA
DO@SBK160808T-301Y-N_6
L26
+IFPCD_PLLVDD
R426
(1.05V +/- 3% )
OP@10K/F_4
+1.05V_GFX
R425
DO@BLM18PG221SN1D
L28
+IFPCD_IOVDD
C155
C460
C461
C151
OP@10K/F_4
R413
AH8
IFPAB_RSET
220 mA
*DO@0.1u/10V_4
*DO@0.1u/10V_4
DO@1u/6.3V_4
DO@0.1u/10V_4
DO@4.7u/6.3V_6
285 mA
R400
IFPB_IOVDD
AJ8
AF7
IFPC_PLLVDD
AG7
IFPD_PLLVDD
AF6
IFPC_IOVDD
AG6
IFPD_IOVDD
DO@1K/F_4
IFPC_RSET
AF8
IFPC_RSET
DO@1K/F_4
IFPD_RSET
AN2
IFPD_RSET
AB8
IFPEF_PLLVDD
IFPEF_PLLVDD
EV@10K/F_4
C455
C452
C458
C134
OP@10K/F_4
AN6
AM6
AN3
AP3
AM5
AN5
AK6
AL6
AH6
AJ6
IFPB_TXC
IFPB_TXC_N
IFPB_TXD4
IFPB_TXD4_N
IFPB_TXD5
IFPB_TXD5_N
IFPB_TXD6
IFPB_TXD6_N
IFPB_TXD7
IFPB_TXD7_N
AH9
AJ9
AP5
AP6
AL7
AM7
AM8
AN8
AL8
AK8
IFPC_AUX_I2CW_SCL
IFPC_L0
IFPC_L0_N
IFPC_L1
IFPC_L1_N
IFPC_L2
IFPC_L2_N
IFPC_L3
IFPC_L3_N
AG3
AG2
AK1
AJ1
AJ3
AJ2
AH3
AH4
AG5
AG4
IFPD_AUX_I2CX_SCL
IFPD_AUX_I2CX_SDA_N
IFPD_L0
IFPD_L0_N
IFPD_L1
IFPD_L1_N
IFPD_L2
IFPD_L2_N
IFPD_L3
IFPD_L3_N
AK3
AK2
AM1
AM2
AM3
AM4
AL3
AL4
AK4
AK5
IFPE_AUX_I2CY_SCL
IFPE_AUX_I2CY_SDA_N
IFPE_L0
IFPE_L0_N
IFPE_L1
IFPE_L1_N
IFPE_L2
IFPE_L2_N
IFPE_L3
IFPE_L3_N
AB3
AB4
AD2
AD3
AD1
AC1
AC2
AC3
AC4
AC5
IFPF_AUX_I2CZ_SCL
IFPF_AUX_I2CZ_SDA_N
IFPF_L0
IFPF_L0_N
IFPF_L1
IFPF_L1_N
IFPF_L2
IFPF_L2_N
IFPF_L3
IFPF_L3_N
AF3
AF2
AE3
AE4
AF4
AF5
AD4
AD5
AG1
AF1
IFPAB_RSET
R399
DO@BLM18PG221SN1D
L27
+3V_GFX
IFPA_IOVDD
AG9
IFPA_TXC
IFPA_TXC_N
IFPA_TXD0
IFPA_TXD0_N
IFPA_TXD1
IFPA_TXD1_N
IFPA_TXD2
IFPA_TXD2_N
IFPA_TXD3
IFPA_TXD3_N
/&W>s^
/&WdD^IFPC_AUX_I2CW_SDA_N
10/7 add
IFPEF_IOVDD
AG8
R397
EV@10K/F_4
R398
IFPAB_PLLVDD
10/7 add
DO@0.1u/10V_4
DO@1u/6.3V_4
DO@4.7u/6.3V_6
*DO@0.1u/10V_4
AC7
AC8
IFPE_IOVDD
IFPF_IOVDD
AD6
IFPEF_RSET
/&W&W
DO@0.1u/10V_4
DO@1u/6.3V_4
DO@4.7u/6.3V_6
DO@0.1u/10V_4
120 mA
+DACA_VDD
C449
DO@0.1u/10V_4
DACA_VREF
R395
DO@124/F_4
DACA_RSET
AG10
AP9
AP8
DACA_VDD
Zd
L29
EV@160808-30Y
NV_PLLVDD
C454
R414
*EV@0_4
EV@22u/6.3V_8
EV_HDMI_DDCCK_C
EV_HDMI_DDCDAT_C
EV_EDP-AUX+
EV_EDP-AUXEV_EDP-ML0+
EV_EDP-ML0-
AD8
PLLVDD
AE8
SP_PLLVDD
EV@160808-0180P
C451
VID_PLLVDD
C147
EV_CRT_RED
EV_CRT_GRN
EV_CRT_BLU
DACA_HSYNC
DACA_VSYNC
AM9
AN9
EV_HSYNC_R
EV_VSYNC_R
R4
R5
EV_CRTDCLK
EV_CRTDDAT
R103
R102
DO@33_4
DO@33_4
EV_CRT_RED
R72
DO@150/F_4
EV_CRT_GRN
R67
DO@150/F_4
EV_CRT_BLU
R71
DO@150/F_4
EV_CRTDCLK [22]
EV_CRTDDAT [22]
AD7
VID_PLLVDD
yd>/E
XTAL_IN
XTAL_OUT
XTAL_OUTBUFF
XTAL_SSIN
H3
H2
J4
H1
CLK_27M_VGA_2
XTALOUT
R91
EV@10K/F_4
R401
EV@10K/F_4
Y1
2
EV@27MHZ
C162
EV@18P/50V_4
EV@0.1u/10V_4
C163
EV@18P/50V_4
PROJECT : ZQTA/ZQSA
Size
Document Number
Date:
PLACE CLOSE TO BALLS

2
:EDd
HSYNC_COM [22]
VSYNC_COM [22]
EV@0.1u/10V_4
ED'^
[15,16,19,40] +1.05V_GFX
[15,18,19,39,40] +3V_GFX
C450
EV@4.7u/6.3V_6
:EWd
EV_CRT_RED [22]
EV_CRT_GRN [22]
EV_CRT_BLU [22]
EV@N13x
EV@22u/6.3V_8
EW'^
AK9
AL10
AL9
PLACE CLOSE TO GPU
C456
:EWd
[22]
[22]
[22]
[22]
DACA_VREF
DACA_RSET
EW'>
C135
EV@0.1u/10V_4
SP_PLLVDD
L25
IV@:iGPU
EV@:dGPU
OP@:Optimus
DO@:Discrete only
SP@:Special
EV_HDMI_DDCCK_C [23]
EV_HDMI_DDCDAT_C [23]
EV_HDMITX2P [23]
EV_HDMITX2N [23]
EV_HDMITX1P [23]
EV_HDMITX1N [23]
EV_HDMITX0P [23]
EV_HDMITX0N [23]
EV_HDMICLK+ [23]
EV_HDMICLK- [23]
+1.05V_GFX
EV_TXLCLK- [22]
EV_TXLCLK+ [22]
EV_TXLOUT0- [22]
EV_TXLOUT0+ [22]
EV_TXLOUT1- [22]
EV_TXLOUT1+ [22]
EV_TXLOUT2- [22]
EV_TXLOUT2+ [22]
DACA_RED
DACA_GREEN
DACA_BLUE
I2CA_SCL
I2CA_SDA
+1.05V_GFX
0929 Exchange + & - ; because symbol error
10/7 add
*EV@1K/F_4
U15D
50 mA
*DO@0.1u/10V_4
DO@1u/6.3V_4
DO@4.7u/6.3V_6
C149
C463
C457
C146
C462
10/7 add
IFPAB_PLLVDD
R396
+3V_GFX
Rev
1A
DGPU 3/5 (Display)

4
Sheet
17
of
8
44
/RJLFDO6WUDS%LW0DSSLQJ
389''
3'
.
.
.
.
.
.
.
.
[15,17,19,39,40] +3V_GFX
U15E
D/K
STRAP2
N13P-GL (1001) ---> 10k PU
N13P-GS (1011) ---> 20K PU
STRAP1
N13P-GL (0111) ---> 45.3k PD
N13P-GS (0110) ---> 34.8K PD
STRAP3
Optimus ---> 4.99k PD
Discrete only ---> 15K PD

EW'>
:EWd
EW'^
:d
ED'^
:d
/RJLFDO
6WUDSSLQJ%LW
/RJLFDO
6WUDSSLQJ%LW
FB_1
FB_0
SMB_ALT_ADDR
VGA_DEVICE

520B6&/.
PCI_DEVIDE[4]
SUB_VENDOR
PCI_DEVID[5]
PEX_PLL_EN_TERM

520B6,
RAMCFG[3]
RAMCFG[2]
RAMCFG[1]
RAMCFG[0]
;;;;
USER[3]
USER[2]
USER[1]
USER[0]

675$3
3GIO_PADCFG[3]
3GIO_PADCFG[2]
3GIO_PADCFG[1]
3GIO_PADCFG[0]

675$3
PCI_DEVID[3]
PCI_DEVID[2]
PCI_DEVID[1]
PCI_DEVID[0]

675$3
SOR3_EXPOSED
SOR2_EXPOSED
SOR1_EXPOSED
SOR0_EXPOSED

675$3
RESERVED
PCI_MAX SPEED
DP_PLL_VDD33

PCI SPEED CHANGE GEN3
R404
EV@10K/F_4
JTAG_TMS
R392
*EV@10K/F_4
JTAG_TDI
R394
*EV@10K/F_4
VGA_OVT#
R403
EV@10K/F_4
ALERT
R423
EV@10K/F_4
JTAG_TCK
R68
*EV@10K/F_4
JTAG_TRST#
R391
EV@10K/F_4
DGPU_DPST_PW M
R73
*EV@2K/F_4
+3V_GFX
+3V_GFX
R420
R85
SNP@45.3K/F_4
R111
*SP@4.99K/F_4
R87
GS@10K/F_4
R112
GS@4.99K/F_4
R93
SP@34.8K/F_4
R88
SP@10K/F_4
R94
SP@15K/F_4
STRAP0
STRAP1
STRAP2
STRAP3
STRAP4
R421
R89
R109
SP@34.8K/F_4
R110
*EV@10K/F_4
SP@4.99K/F_4
*SP@34.8K/F_4
R76
R84
SP@34.8K/F_4
R90
SP@15K/F_4
SNM@10K/F_4
+3V_GFX
dGPU_AC_DC#
/RJLFDO
6WUDSSLQJ%LW
/RJLFDO
6WUDSSLQJ%LW
675$3
D/K
10/3 add
520B62
ROM_SI
ROM_SO
ROM_SCLK
Resistor P/N
4.99K---> CS24992FB26
10K ---> CS31002FB26
15K ---> CS31502FB24
20K ---> CS32002FB29
34.8K---> CS33482FB22
45.3K ---> CS34532FB18

R92
EV@10K/F_4
*SP@34.8K/F_4
B
N13P-GS/-GL Straping table

ROM_SI
1G Hynix 64Mx16
1G Micron 64Mx16
2G Hynix 128Mx16
2G Micron 128Mx16
-->15K PD
-->20K PD
-->35K PD (Default)
-->45K PD
ROM_SO
N13P-GL --> 10K PD
N13P-GS --> 10K PU
ROM_SCLK
N13P-GL (0010) ---> 15k PD
N13P-GS (1000) ---> 4.99K PU
N13M-GS Straping table
+3V_GFX
R410
R409
EV@2.2K_4
EV@2.2K_4
N13P_SCL
N13P_SDA
R7
R6
I2CB_SCL
I2CB_SDA
R411
R412
OP@2.2K_4
OP@2.2K_4
DGPU_EDIDCLK R2
DGPU_EDIDDATA R3
I2CC_SCL
I2CC_SDA
TP48
TP7
T4
T3
I2CS_SCL
I2CS_SDA
THERM+
THERM-
K4
K3
THERMDP
THERMDN
STRAP0
STRAP1
STRAP2
STRAP3
STRAP4
ROM_SCLK
ROM_CS_N
ROM_SI
ROM_SO
H4
H6
H5
H7
DGPU_DPST_PW M
VGA_OVT#
ALERT
GPU_VID0 [39]
dGPU_AC_DC#
10/3 modify
EV_HDMI_HPD [23]
GPU_DPRSLPVR [39]
EV_eDP_HPD [22]
'&^D/
J2
J7
J6
J5
J3
D/^ZKD
STRAP0
STRAP1
STRAP2
STRAP3
STRAP4
R422
SNP@40.2K/F_4 J1
WE
^D

ROM_SCLK
R69
ROM_SI
ROM_SO
GFx_SCL
EV@10K_4
+3V_GFX
R406
EV@4.7K_4

MULTISTRAP_REF_GND
BUFRST_N
L2
R402
*EV@10K_4
CEC
L3
R108
GL@10K_4
GFx_SDA
+3V_GFX
dGPU_AC_DC# 1
Q9
*EV@2N7002
+3V_GFX
1
TP72
Q23
*EV@2N7002
EWD'^
ZZ
EW'>
ALERT
**
GPUT_CLK [32]
Q26
EV@2N7002
Q25
EV@2N7002
3
GPUT_DATA [32]

1
^Z
10/5 add
GPU_THERMAL_ALERT# [32]
Q10
EV@2N7002
Size
Date:
+3V_GFX
3
PROJECT : ZQTA/ZQSA
Document Number
Rev
1A
DGPU 4/5 (MIO/GPIO)
+3V_GFX
2
11/8 change for GPU temp detect
TP71

EV@N13x
3

+3V_GFX

VGA_OVT# 1
GPU_VID5 [39]
R405
EV@4.7K_4

GFx_SCL
GFx_SDA
GPU_VID4 [39]
GPU_VID3 [39]
DGPU_DPST_PW M [22]
DGPU_DISP_ON [22]
DGPU_LVDS_BLON [22]
GPU_VID1 [39]
GPU_VID2 [39]
DGPU_EDIDCLK
DGPU_EDIDDATA
[22] DGPU_EDIDCLK
[22] DGPU_EDIDDATA
P6
M3
L6
P5
P7
L7
M7
N8
M1
M2
L1
M5
N3
M4
N4
P2
R8
M6
R1
P3
P4
P1
+3V_GFX
GPIO0
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7
GPIO8
GPIO9
GPIO10
GPIO11
GPIO12
GPIO13
GPIO14
GPIO15
GPIO16
GPIO17
GPIO18
GPIO19
GPIO20
GPIO21
JTAG_TCK
JTAG_TMS D/^'W/K/:d'd,Z
JTAG_TDI
JTAG_TDO
JTAG_TRST_N
AM10
AP11
AM11
AP12
AN11
JTAG_TCK
JTAG_TMS
JTAG_TDI
JTAG_TDO
JTAG_TRST#
TP6
TP41
TP42
TP39
TP40

7
Sheet
18
8
of
44
EW'>
:EWd
EW'^
:EWd
ED'^
:EDd
U15G
Ws'&y
D4
+VGACORE
EV@RB500V-40
+3V_GFX
D3
+1.5V_GFX
EV@RB500V-40
GND_OPT_1
C16
GND_OPT_2
W32
EV@1u/6.3V_4
EV@0.1u/10V_4
EV@0.1u/10V_4
EV@0.1u/10V_4
EV@0.1u/10V_4
EV@0.1u/10V_4
EV@0.1u/10V_4
EV@0.1u/10V_4
EV@0.1u/10V_4
+VGACORE
C103
C131
C102
C122
EV@4.7u/6.3V_6
EV@4.7u/6.3V_6
C126
C139
EV@4.7u/6.3V_6
EV@4.7u/6.3V_6
C80
C117
EV@4.7u/6.3V_6
EV@4.7u/6.3V_6
EV@4.7u/6.3V_6
EV@4.7u/6.3V_6
+VGACORE
C118
C72
C125
EV@4.7u/6.3V_6
C101
C108
EV@4.7u/6.3V_6
EV@4.7u/6.3V_6
C90
C73
EV@4.7u/6.3V_6
EV@4.7u/6.3V_6
EV@4.7u/6.3V_6
PLACE NEAR GPU
EV@4.7u/6.3V_6
+VGACORE
C96
C467
C164
C166
EV@4.7u/25V_8
EV@330u/2.5V_3528
C464
C465
EV@4.7u/25V_8
EV@4.7u/25V_8
C160
C466
EV@4.7u/25V_8
EV@4.7u/25V_8
EV@47u/6.3V_8
EV@22u/6.3V_8
+3V_GFX
C
R383
EV@4.7K_4
+3V
R380
EV@4.7K_4
DGPU_PWROK [10,15]
3
EV@N13x
PLACE UNDER GPU
C92
C75
C110
C116
C115
C104
C113
C83
C94
DGPU_PGOK-1
+1.5V_GFX
R381
DGPU_POK4
2
Q20
EV@MMBT3904-7-F
EV@4.7K_4
C412
*EV@1000P/50V_4
10/31 modify
R382
EV@100K/F_4
2
Q21
EV@DTC144EUA
'Whs
U1
U2
U3
U4
U5
U6
U7
U8
V1
V2
V3
V4
V5
V6
V7
V8
W2
W3
W4
W5
W7
W8
Y1
Y2
Y3
Y4
Y5
Y6
Y7
Y8
AA1
AA2
AA3
AA4
AA5
AA6
AA7
AA8
XVDD_001
XVDD_002
XVDD_003
XVDD_004
XVDD_005
XVDD_006
XVDD_007
XVDD_008
XVDD_009
XVDD_010
XVDD_011
XVDD_012
XVDD_013
XVDD_014
XVDD_015
XVDD_016
XVDD_017
XVDD_018
XVDD_019
XVDD_020
XVDD_021
XVDD_022
XVDD_023
XVDD_024
XVDD_025
XVDD_026
XVDD_027
XVDD_028
XVDD_029
XVDD_030
XVDD_031
XVDD_032
XVDD_033
XVDD_034
XVDD_035
XVDD_036
XVDD_037
XVDD_038
+VGACORE
C411
EV@1000P/50V_4
VDD_001
VDD_002
VDD_003
VDD_004
VDD_005
VDD_006
VDD_007
VDD_008
VDD_009
VDD_010
VDD_011
VDD_012
VDD_013
VDD_014
VDD_015
VDD_016
VDD_017
VDD_018
VDD_019
VDD_020
VDD_021
VDD_022
VDD_023
VDD_024
VDD_025
VDD_026
VDD_027
VDD_028
VDD_029
VDD_030
VDD_031
VDD_032
VDD_033
VDD_034
VDD_035
VDD_036
VDD_037
VDD_038
VDD_039
VDD_040
VDD_041
VDD_042
VDD_043
VDD_044
VDD_045
VDD_046
VDD_047
VDD_048
VDD_049
VDD_050
VDD_051
VDD_052
VDD_053
VDD_054
VDD_055
VDD_056
VDD_057
VDD_058
VDD_059
VDD_060
VDD_061
VDD_062
VDD_063
VDD_064
VDD_065
VDD_066
VDD_067
VDD_068
VDD_069
VDD_070
VDD_071
VDD_072
GND_101
GND_102
GND_103
GND_104
GND_105
GND_106
GND_107
GND_108
GND_109
GND_110
GND_111
GND_112
GND_113
GND_114
GND_115
GND_116
GND_117
GND_118
GND_119
GND_120
GND_121
GND_122
GND_123
GND_124
GND_125
GND_126
GND_127
GND_128
GND_129
GND_130
GND_131
GND_132
GND_133
GND_134
GND_135
GND_136
GND_137
GND_138
GND_139
GND_140
GND_141
GND_142
GND_143
GND_144
GND_145
GND_146
GND_147
GND_148
GND_149
GND_150
GND_151
GND_152
GND_153
GND_154
GND_155
GND_156
GND_157
GND_158
GND_159
GND_160
GND_161
GND_162
GND_163
GND_164
GND_165
GND_166
GND_167
GND_168
GND_169
GND_170
GND_171
GND_172
GND_173
GND_174
GND_175
GND_176
GND_177
GND_178
GND_179
GND_180
GND_181
GND_182
GND_183
GND_184
GND_185
GND_186
GND_187
GND_188
GND_189
GND_190
GND_191
GND_192
GND_193
GND_194
GND_195
GND_196
GND_197
GND_198
GND_199
GND_200
'Wh'E
U15F
AA12
AA14
AA16
AA19
AA21
AA23
AB13
AB15
AB17
AB18
AB20
AB22
AC12
AC14
AC16
AC19
AC21
AC23
M12
M14
M16
M19
M21
M23
N13
N15
N17
N18
N20
N22
P12
P14
P16
P19
P21
P23
R13
R15
R17
R18
R20
R22
T12
T14
T16
T19
T21
T23
U13
U15
U17
U18
U20
U22
V13
V15
V17
V18
V20
V22
W12
W14
W16
W19
W21
W23
Y13
Y15
Y18
Y17
Y20
Y22
GND_1
GND_2
GND_3
GND_4
GND_5
GND_6
GND_7
GND_8
GND_9
GND_10
GND_11
GND_12
GND_13
GND_14
GND_15
GND_16
GND_17
GND_18
GND_19
GND_20
GND_21
GND_22
GND_23
GND_24
GND_25
GND_26
GND_27
GND_28
GND_29
GND_30
GND_31
GND_32
GND_33
GND_34
GND_35
GND_36
GND_37
GND_38
GND_39
GND_40
GND_41
GND_42
GND_43
GND_44
GND_45
GND_46
GND_47
GND_48
GND_49
GND_50
GND_51
GND_52
GND_53
GND_54
GND_55
GND_56
GND_57
GND_58
GND_59
GND_60
GND_61
GND_62
GND_63
GND_64
GND_65
GND_66
GND_67
GND_68
GND_69
GND_70
GND_71
GND_72
GND_73
GND_74
GND_75
GND_76
GND_77
GND_78
GND_79
GND_80
GND_81
GND_82
GND_83
GND_84
GND_85
GND_86
GND_87
GND_88
GND_89
GND_90
GND_91
GND_92
GND_93
GND_94
GND_95
GND_96
GND_97
GND_98
GND_99
GND_100
D2
D31
D33
E10
E22
E25
E5
E7
F28
F7
G10
G13
G16
G19
G2
G22
G25
G28
G3
G30
G32
G33
G5
G7
K2
K28
K30
K32
K33
K5
K7
M13
M15
M17
M18
M20
M22
N12
N14
N16
N19
N2
N21
N23
N28
N30
N32
N33
N5
N7
P13
P15
P17
P18
P20
P22
R12
R14
R16
R19
R21
R23
T13
T15
T17
T18
T2
T20
T22
AG11
T28
T32
T5
T7
U12
U14
U16
U19
U21
U23
V12
V14
V16
V19
V21
V23
W13
W15
W17
W18
W20
W22
W28
Y12
Y14
Y16
Y19
Y21
Y23
AH11
+1.05V_GFX
EV@N13x
R375
DGPU_POK2
EV@4.7K_4
C396
*EV@1000P/50V_4
+VGACORE
A2
AA17
AA18
AA20
AA22
AB12
AB14
AB16
AB19
AB2
AB21
A33
AB23
AB28
AB30
AB32
AB5
AB7
AC13
AC15
AC17
AC18
AA13
AC20
AC22
AE2
AE28
AE30
AE32
AE33
AE5
AE7
AH10
AA15
AH13
AH16
AH19
AH2
AH22
AH24
AH28
AH29
AH30
AH32
AH33
AH5
AH7
AJ7
AK10
AK7
AL12
AL14
AL15
AL17
AL18
AL2
AL20
AL21
AL23
AL24
AL26
AL28
AL30
AL32
AL33
AL5
AM13
AM16
AM19
AM22
AM25
AN1
AN10
AN13
AN16
AN19
AN22
AN25
AN30
AN34
AN4
AN7
AP2
AP33
B1
B10
B22
B25
B28
B31
B34
B4
B7
C10
C13
C19
C22
C25
C28
C7
Q19
EV@MMBT3904-7-F
+VGACORE
[31,39] +VGACORE
[15,16,17,40] +1.05V_GFX
[16,20,21,40] +1.5V_GFX
[15,17,18,39,40] +3V_GFX
[3,7,8,9,10,11,13,14,22,23,24,25,26,27,28,31,32,34,35,36,37,38,39,40,41]
+3V
C476
*EV@330u/2V_7343
C171
EV@330u/2V_7343

PROJECT : ZQTA/ZQSA
9/27 add
Power request
ESR
1
Size
Document Number
Date:
Rev
1A
DGPU 5/5 (Power/Ground)

2
Sheet
19
8
of
44
CHANNEL A: 256MB/512MB DDR3
[16] VMA_DQ[63..0]
[16] VMA_DM[7..0]
[16] VMA_WDQS[7..0]
[16] VMA_RDQS[7..0]
VRAM2
[16]
[16]
[16]
[16]
[16]
[16]
[16]
[16]
[16]
[16]
[16]
[16]
[16]
[16]
[16]
[16]
FBA_CMD9
FBA_CMD11
FBA_CMD8
FBA_CMD25
FBA_CMD10
FBA_CMD24
FBA_CMD22
FBA_CMD7
FBA_CMD21
FBA_CMD6
FBA_CMD29
FBA_CMD23
FBA_CMD28
FBA_CMD20
FBA_CMD4
FBA_CMD14
VREFC_VMA1
VREFD_VMA1
M8
H1
VREFCA
VREFDQ
FBA_CMD9
FBA_CMD11
FBA_CMD8
FBA_CMD25
FBA_CMD10
FBA_CMD24
FBA_CMD22
FBA_CMD7
FBA_CMD21
FBA_CMD6
FBA_CMD29
FBA_CMD23
FBA_CMD28
FBA_CMD20
FBA_CMD4
FBA_CMD14
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC
A13
A14
A15
FBA_CMD12
FBA_CMD27
FBA_CMD26
M2
N8
M3
BA0
BA1
BA2
VMA_CLK0
VMA_CLK0#
FBA_CMD3
J7
K7
K9
CK
CK
CKE
FBA_CMD2
FBA_CMD0
FBA_CMD30
FBA_CMD15
FBA_CMD13
K1
L2
J3
K3
L3
ODT
CS
RAS
CAS
WE
VMA_WDQS1
VMA_RDQS1
F3
G3
DQSL
DQSL
VMA_DM1
VMA_DM0
E7
D3
VMA_WDQS0
VMA_RDQS0
C7
B7
FBA_CMD5
T2
VRAM5
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
E3
F7
F2
F8
H3
H8
G2
H7
VMA_DQ15
VMA_DQ10
VMA_DQ14
VMA_DQ9
VMA_DQ12
VMA_DQ8
VMA_DQ13
VMA_DQ11
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
D7
C3
C8
C2
A7
A2
B8
A3
VMA_DQ5
VMA_DQ3
VMA_DQ6
VMA_DQ0
VMA_DQ4
VMA_DQ2
VMA_DQ7
VMA_DQ1
VDD#B2
VDD#D9
VDD#G7
VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9
B2
D9
G7
K2
K8
N1
N9
R1
R9
VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9
A1
A8
C1
C9
D2
E9
F1
H2
H9
VSS#A9
VSS#B3
VSS#E1
VSS#G8
VSS#J2
VSS#J8
VSS#M1
VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9
B1
B9
D1
D8
E2
E8
F9
G1
G9
VREFC_VMA1
VREFD_VMA1
M8
H1
VREFCA
VREFDQ
FBA_CMD9
FBA_CMD11
FBA_CMD8
FBA_CMD25
FBA_CMD10
FBA_CMD24
FBA_CMD22
FBA_CMD7
FBA_CMD21
FBA_CMD6
FBA_CMD29
FBA_CMD23
FBA_CMD28
FBA_CMD20
FBA_CMD4
FBA_CMD14
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC
A13
A14
A15
FBA_CMD12
FBA_CMD27
FBA_CMD26
M2
N8
M3
BA0
BA1
BA2
[16]
VMA_CLK0
[16] VMA_CLK0#
[16] FBA_CMD3
VMA_CLK0
VMA_CLK0#
FBA_CMD3
J7
K7
K9
CK
CK
CKE
[16]
[16]
[16]
[16]
[16]
FBA_CMD2
FBA_CMD0
FBA_CMD30
FBA_CMD15
FBA_CMD13
FBA_CMD2
FBA_CMD0
FBA_CMD30
FBA_CMD15
FBA_CMD13
K1
L2
J3
K3
L3
ODT
CS
RAS
CAS
WE
VMA_WDQS3
VMA_RDQS3
F3
G3
DQSL
DQSL
[16] FBA_CMD5
VMA_ZQ1
L8
DML
DMU
VMA_DM3
VMA_DM2
E7
D3
DQSU
DQSU
VMA_WDQS2
VMA_RDQS2
C7
B7
RESET
ZQ
FBA_CMD5
T2
Should be 240
Ohms +-1%
R43
EV@243/F_4
J1
L1
J9
L9
NC#J1
NC#L1
NC#J9
NC#L9
HYNIX 900MHz 1G AKD5LZWTW02

HYNIX 900MHz 2G AKD5MGWTW00
VRAM1
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
E3
F7
F2
F8
H3
H8
G2
H7
VMA_DQ27
VMA_DQ29
VMA_DQ25
VMA_DQ31
VMA_DQ26
VMA_DQ28
VMA_DQ24
VMA_DQ30
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
D7
C3
C8
C2
A7
A2
B8
A3
VMA_DQ16
VMA_DQ22
VMA_DQ18
VMA_DQ23
VMA_DQ17
VMA_DQ21
VMA_DQ19
VMA_DQ20
VDD#B2
VDD#D9
VDD#G7
VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9
B2
D9
G7
K2
K8
N1
N9
R1
R9
VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9
A1
A8
C1
C9
D2
E9
F1
H2
H9
VSS#A9
VSS#B3
VSS#E1
VSS#G8
VSS#J2
VSS#J8
VSS#M1
VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9
B1
B9
D1
D8
E2
E8
F9
G1
G9
10/12 SWAP Pin

[16] FBA_CMD12
[16] FBA_CMD27
[16] FBA_CMD26
VREFC_VMA3
VREFD_VMA3
M8
H1
VREFCA
VREFDQ
FBA_CMD9
FBA_CMD11
FBA_CMD8
FBA_CMD25
FBA_CMD10
FBA_CMD24
FBA_CMD22
FBA_CMD7
FBA_CMD21
FBA_CMD6
FBA_CMD29
FBA_CMD23
FBA_CMD28
FBA_CMD20
FBA_CMD4
FBA_CMD14
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC
A13
A14
A15
FBA_CMD12
FBA_CMD27
FBA_CMD26
M2
N8
M3
BA0
BA1
BA2
VMA_CLK1
VMA_CLK1#
FBA_CMD19
J7
K7
K9
CK
CK
CKE
FBA_CMD18
FBA_CMD16
FBA_CMD30
FBA_CMD15
FBA_CMD13
K1
L2
J3
K3
L3
ODT
CS
RAS
CAS
WE
VMA_WDQS5
VMA_RDQS5
F3
G3
DQSL
DQSL
VMA_DM5
VMA_DM4
E7
D3
VMA_WDQS4
VMA_RDQS4
C7
B7
FBA_CMD5
T2
VRAM6
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
E3
F7
F2
F8
H3
H8
G2
H7
VMA_DQ42
VMA_DQ45
VMA_DQ43
VMA_DQ47
VMA_DQ41
VMA_DQ46
VMA_DQ40
VMA_DQ44
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
D7
C3
C8
C2
A7
A2
B8
A3
VMA_DQ33
VMA_DQ36
VMA_DQ32
VMA_DQ38
VMA_DQ34
VMA_DQ37
VMA_DQ35
VMA_DQ39
VDD#B2
VDD#D9
VDD#G7
VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9
B2
D9
G7
K2
K8
N1
N9
R1
R9
VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9
VREFC_VMA3
VREFD_VMA3
M8
H1
VREFCA
VREFDQ
FBA_CMD9
FBA_CMD11
FBA_CMD8
FBA_CMD25
FBA_CMD10
FBA_CMD24
FBA_CMD22
FBA_CMD7
FBA_CMD21
FBA_CMD6
FBA_CMD29
FBA_CMD23
FBA_CMD28
FBA_CMD20
FBA_CMD4
FBA_CMD14
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC
A13
A14
A15
FBA_CMD12
FBA_CMD27
FBA_CMD26
M2
N8
M3
BA0
BA1
BA2
VMA_CLK1
VMA_CLK1#
FBA_CMD19
J7
K7
K9
CK
CK
CKE
A1
A8
C1
C9
D2
E9
F1
H2
H9
FBA_CMD18
FBA_CMD16
FBA_CMD30
FBA_CMD15
FBA_CMD13
K1
L2
J3
K3
L3
ODT
CS
RAS
CAS
WE
VMA_WDQS7
VMA_RDQS7
F3
G3
DQSL
DQSL
VSS#A9
VSS#B3
VSS#E1
VSS#G8
VSS#J2
VSS#J8
VSS#M1
VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
VMA_DM7
VMA_DM6
E7
D3
VMA_WDQS6
VMA_RDQS6
C7
B7
FBA_CMD5
T2
VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9
B1
B9
D1
D8
E2
E8
F9
G1
G9
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
E3
F7
F2
F8
H3
H8
G2
H7
VMA_DQ62
VMA_DQ57
VMA_DQ63
VMA_DQ59
VMA_DQ61
VMA_DQ58
VMA_DQ60
VMA_DQ56
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
D7
C3
C8
C2
A7
A2
B8
A3
VMA_DQ55
VMA_DQ49
VMA_DQ54
VMA_DQ50
VMA_DQ52
VMA_DQ48
VMA_DQ53
VMA_DQ51
VDD#B2
VDD#D9
VDD#G7
VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9
B2
D9
G7
K2
K8
N1
N9
R1
R9
VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9
A1
A8
C1
C9
D2
E9
F1
H2
H9
VSS#A9
VSS#B3
VSS#E1
VSS#G8
VSS#J2
VSS#J8
VSS#M1
VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9
B1
B9
D1
D8
E2
E8
F9
G1
G9
10/12 SWAP Pin
+1.5V_GFX
VMA_ZQ2
DML
DMU
DQSU
DQSU
RESET
L8
ZQ
Should be 240
Ohms +-1%
R364
EV@243/F_4
J1
L1
J9
L9
96-BALL
SDRAM DDR3
EV@VRAM _DDR3
NC#J1
NC#L1
NC#J9
NC#L9
10/12 SWAP Pin
[16]
VMA_CLK1
[16] VMA_CLK1#
[16] FBA_CMD19
+1.5V_GFX
[16] FBA_CMD18
[16] FBA_CMD16
VMA_ZQ3
VMA_CLK0
DML
DMU
DQSU
DQSU
RESET
L8
ZQ
Should be 240
Ohms +-1%
R34
EV@243/F_4
J1
L1
J9
L9
96-BALL
SDRAM DDR3
EV@VRAM _DDR3
+1.5V_GFX
NC#J1
NC#L1
NC#J9
NC#L9
+1.5V_GFX
VMA_ZQ4
L8
R366
EV@1.33K/F_4
[16]
FBA_CMD17
[16]
FBA_CMD1
FBA_CMD17
TP1
FBA_CMD1
TP2
DML
DMU
DQSU
DQSU
RESET
ZQ
Should be 240
Ohms +-1%
R373
EV@243/F_4
J1
L1
J9
L9
96-BALL
SDRAM DDR3
EV@VRAM _DDR3
+1.5V_GFX
NC#J1
NC#L1
NC#J9
NC#L9
+1.5V_GFX
96-BALL
SDRAM DDR3
EV@VRAM _DDR3
+1.5V_GFX
+1.5V_GFX
10/14 modify
R39
EV@1.33K/F_4
R36
EV@1.33K/F_4
R370
EV@1.33K/F_4
VMA_CLK1
R371
EV@162/F_4
VREFC_VMA1
VREFD_VMA1
R41
EV@162/F_4
VMA_CLK0#
Fermi : Change to 160 ohm

1 : CS11602JB00 ,RES CHIP 160 1/16W +-5%(0402)
2 : CS11622FB07 ,RES CHIP 162 1/16W +-1%(0402)
VREFC_VMA3
VMA_CLK1#
C376
R365
R38
EV@0.1u/10V_4
EV@1.33K/F_4
C34
EV@0.1u/10V_4
R35

1 : CS11602JB00 ,RES CHIP 160 1/16W +-5%(0402)
2 : CS11622FB07 ,RES CHIP 162 1/16W +-1%(0402)
EV@1.33K/F_4
VREFD_VMA3
C24
EV@0.1u/10V_4
EV@1.33K/F_4
R369
C380
EV@0.1u/10V_4
EV@1.33K/F_4
+1.5V_GFX
+1.5V_GFX
+1.5V_GFX
+1.5V_GFX
C30
C27
C374
C25
EV@1u/10V_4
EV@1u/10V_4
EV@1u/10V_4
EV@1u/10V_4
C369
C379
C382
C23
C29
C32
EV@10u/6.3V_8
EV@1u/10V_4
EV@1u/10V_4
EV@1u/10V_4
EV@1u/10V_4
EV@1u/10V_4
EV@10u/6.3V_8
C386
C26
C375
C28
EV@1u/10V_4
EV@1u/10V_4
EV@1u/10V_4
C368
EV@10u/6.3V_8
C44
EV@10u/6.3V_8
EV@10u/6.3V_8
EV@1u/10V_4
EV@1u/10V_4
EV@1u/10V_4
EV@1u/10V_4
EV@0.1u/10V_4
EV@0.1u/10V_4
EV@0.1u/10V_4
C88
C37
C33
C31
C371
C381
C35
C377
C372
C385
C383
EV@0.1u/10V_4
EV@0.1u/10V_4
EV@0.1u/10V_4
C378
C370
EV@10u/6.3V_8
+1.5V_GFX
C416
EV@0.1u/10V_4
EV@0.1u/10V_4
[16,19,21,40] +1.5V_GFX

PROJECT : ZQTA/ZQSA
Size
Document Number
Rev
1A
DGPU Memory 1/2 (DDR3)

Date:
5
Sheet
1
20
of
44
CHANNEL B: 256MB/512MB DDR3
[16] VMC_DQ[63..0]
[16] VMC_DM[7..0]
[16] VMC_WDQS[7..0]
[16] VMC_RDQS[7..0]
VRAM8
[16]
[16]
[16]
[16]
[16]
[16]
[16]
[16]
[16]
[16]
[16]
[16]
[16]
[16]
[16]
[16]
FBC_CMD9
FBC_CMD11
FBC_CMD8
FBC_CMD25
FBC_CMD10
FBC_CMD24
FBC_CMD22
FBC_CMD7
FBC_CMD21
FBC_CMD6
FBC_CMD29
FBC_CMD23
FBC_CMD28
FBC_CMD20
FBC_CMD4
FBC_CMD14
VRAM4
VREFC_VMC1
VREFD_VMC1
M8
H1
VREFCA
VREFDQ
FBC_CMD9
FBC_CMD11
FBC_CMD8
FBC_CMD25
FBC_CMD10
FBC_CMD24
FBC_CMD22
FBC_CMD7
FBC_CMD21
FBC_CMD6
FBC_CMD29
FBC_CMD23
FBC_CMD28
FBC_CMD20
FBC_CMD4
FBC_CMD14
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC
A13
A14
A15
FBC_CMD12
FBC_CMD27
FBC_CMD26
M2
N8
M3
BA0
BA1
BA2
VMC_CLK0
VMC_CLK0#
FBC_CMD3
J7
K7
K9
CK
CK
CKE
FBC_CMD2
FBC_CMD0
FBC_CMD30
FBC_CMD15
FBC_CMD13
K1
L2
J3
K3
L3
ODT
CS
RAS
CAS
WE
VMC_WDQS0
VMC_RDQS0
F3
G3
DQSL
DQSL
VMC_DM0
VMC_DM2
E7
D3
VMC_WDQS2
VMC_RDQS2
C7
B7
FBC_CMD5
T2
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
E3
F7
F2
F8
H3
H8
G2
H7
VMC_DQ4
VMC_DQ1
VMC_DQ6
VMC_DQ2
VMC_DQ7
VMC_DQ0
VMC_DQ5
VMC_DQ3
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
D7
C3
C8
C2
A7
A2
B8
A3
VMC_DQ19
VMC_DQ21
VMC_DQ18
VMC_DQ23
VMC_DQ16
VMC_DQ22
VMC_DQ17
VMC_DQ20
VDD#B2
VDD#D9
VDD#G7
VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9
B2
D9
G7
K2
K8
N1
N9
R1
R9
M8
H1
VREFCA
VREFDQ
FBC_CMD9
FBC_CMD11
FBC_CMD8
FBC_CMD25
FBC_CMD10
FBC_CMD24
FBC_CMD22
FBC_CMD7
FBC_CMD21
FBC_CMD6
FBC_CMD29
FBC_CMD23
FBC_CMD28
FBC_CMD20
FBC_CMD4
FBC_CMD14
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC
A13
A14
A15
FBC_CMD12
FBC_CMD27
FBC_CMD26
M2
N8
M3
BA0
BA1
BA2
VMC_CLK0
VMC_CLK0#
FBC_CMD3
J7
K7
K9
CK
CK
CKE
VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9
A1
A8
C1
C9
D2
E9
F1
H2
H9
FBC_CMD2
FBC_CMD0
FBC_CMD30
FBC_CMD15
FBC_CMD13
K1
L2
J3
K3
L3
ODT
CS
RAS
CAS
WE
VMC_WDQS3
VMC_RDQS3
F3
G3
DQSL
DQSL
VSS#A9
VSS#B3
VSS#E1
VSS#G8
VSS#J2
VSS#J8
VSS#M1
VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
VMC_DM3
VMC_DM1
E7
D3
VMC_WDQS1
VMC_RDQS1
C7
B7
FBC_CMD5
T2
VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9
B1
B9
D1
D8
E2
E8
F9
G1
G9
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
E3
F7
F2
F8
H3
H8
G2
H7
VMC_DQ30
VMC_DQ24
VMC_DQ28
VMC_DQ27
VMC_DQ29
VMC_DQ26
VMC_DQ31
VMC_DQ25
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
D7
C3
C8
C2
A7
A2
B8
A3
VMC_DQ9
VMC_DQ12
VMC_DQ8
VMC_DQ13
VMC_DQ10
VMC_DQ14
VMC_DQ11
VMC_DQ15
VDD#B2
VDD#D9
VDD#G7
VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9
B2
D9
G7
K2
K8
N1
N9
R1
R9
[16]
VMC_CLK0
[16] VMC_CLK0#
[16] FBC_CMD3
[16]
[16]
[16]
[16]
[16]
FBC_CMD2
FBC_CMD0
FBC_CMD30
FBC_CMD15
FBC_CMD13
VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9
A1
A8
C1
C9
D2
E9
F1
H2
H9
[16] FBC_CMD5
VMC_ZQ1
L8
DML
DMU
VSS#A9
VSS#B3
VSS#E1
VSS#G8
VSS#J2
VSS#J8
VSS#M1
VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
DQSU
DQSU
RESET
ZQ
Should be 240
Ohms +-1%
VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9
B1
B9
D1
D8
E2
E8
F9
G1
G9
R385
SNP@243/F_4
J1
L1
J9
L9
NC#J1
NC#L1
NC#J9
NC#L9
VREFC_VMC3
VREFD_VMC3
M8
H1
VREFCA
VREFDQ
FBC_CMD9
FBC_CMD11
FBC_CMD8
FBC_CMD25
FBC_CMD10
FBC_CMD24
FBC_CMD22
FBC_CMD7
FBC_CMD21
FBC_CMD6
FBC_CMD29
FBC_CMD23
FBC_CMD28
FBC_CMD20
FBC_CMD4
FBC_CMD14
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC
A13
A14
A15
FBC_CMD12
FBC_CMD27
FBC_CMD26
M2
N8
M3
BA0
BA1
BA2
VMC_CLK1
VMC_CLK1#
FBC_CMD19
J7
K7
K9
CK
CK
CKE
FBC_CMD18
FBC_CMD16
FBC_CMD30
FBC_CMD15
FBC_CMD13
K1
L2
J3
K3
L3
ODT
CS
RAS
CAS
WE
VMC_WDQS4
VMC_RDQS4
F3
G3
DQSL
DQSL
VMC_DM4
VMC_DM5
E7
D3
VMC_WDQS5
VMC_RDQS5
C7
B7
FBC_CMD5
T2
VRAM7
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
E3
F7
F2
F8
H3
H8
G2
H7
VMC_DQ39
VMC_DQ34
VMC_DQ37
VMC_DQ33
VMC_DQ38
VMC_DQ35
VMC_DQ36
VMC_DQ32
VREFC_VMC3
VREFD_VMC3
M8
H1
VREFCA
VREFDQ
FBC_CMD9
FBC_CMD11
FBC_CMD8
FBC_CMD25
FBC_CMD10
FBC_CMD24
FBC_CMD22
FBC_CMD7
FBC_CMD21
FBC_CMD6
FBC_CMD29
FBC_CMD23
FBC_CMD28
FBC_CMD20
FBC_CMD4
FBC_CMD14
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC
A13
A14
A15
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
D7
C3
C8
C2
A7
A2
B8
A3
VMC_DQ44
VMC_DQ42
VMC_DQ46
VMC_DQ40
VMC_DQ45
VMC_DQ43
VMC_DQ47
VMC_DQ41
VDD#B2
VDD#D9
VDD#G7
VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9
B2
D9
G7
K2
K8
N1
N9
R1
R9
FBC_CMD12
FBC_CMD27
FBC_CMD26
M2
N8
M3
BA0
BA1
BA2
VMC_CLK1
VMC_CLK1#
FBC_CMD19
J7
K7
K9
CK
CK
CKE
VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9
A1
A8
C1
C9
D2
E9
F1
H2
H9
FBC_CMD18
FBC_CMD16
FBC_CMD30
FBC_CMD15
FBC_CMD13
K1
L2
J3
K3
L3
ODT
CS
RAS
CAS
WE
VMC_WDQS6
VMC_RDQS6
F3
G3
DQSL
DQSL
VSS#A9
VSS#B3
VSS#E1
VSS#G8
VSS#J2
VSS#J8
VSS#M1
VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
VMC_DM6
VMC_DM7
E7
D3
VMC_WDQS7
VMC_RDQS7
C7
B7
FBC_CMD5
T2
VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9
B1
B9
D1
D8
E2
E8
F9
G1
G9
10/12 SWAP Pin
+1.5V_GFX
VMC_ZQ2
DML
DMU
DQSU
DQSU
RESET
L8
ZQ
Should be 240
Ohms +-1%
R64
SNP@243/F_4
J1
L1
J9
L9
96-BALL
SDRAM DDR3
SNP@VRAM _DDR3
NC#J1
NC#L1
NC#J9
NC#L9
[16]
VMC_CLK1
[16] VMC_CLK1#
[16] FBC_CMD19
+1.5V_GFX
+1.5V_GFX
[16] FBC_CMD18
[16] FBC_CMD16
VMC_ZQ3
DML
DMU
DQSU
DQSU
RESET
L8
ZQ
Should be 240
Ohms +-1%
R52
SNP@243/F_4
J1
L1
J9
L9
NC#J1
NC#L1
NC#J9
NC#L9
VMC_ZQ4
R74
SNP@1.33K/F_4
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
D7
C3
C8
C2
A7
A2
B8
A3
VMC_DQ59
VMC_DQ61
VMC_DQ58
VMC_DQ63
VMC_DQ57
VMC_DQ62
VMC_DQ56
VMC_DQ60
VDD#B2
VDD#D9
VDD#G7
VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9
B2
D9
G7
K2
K8
N1
N9
R1
R9
VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9
A1
A8
C1
C9
D2
E9
F1
H2
H9
VSS#A9
VSS#B3
VSS#E1
VSS#G8
VSS#J2
VSS#J8
VSS#M1
VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9
B1
B9
D1
D8
E2
E8
F9
G1
G9
DQSU
DQSU
RESET
ZQ
Should be 240
Ohms +-1%
R379
SNP@243/F_4
J1
L1
J9
L9
NC#J1
NC#L1
NC#J9
NC#L9
+1.5V_GFX
96-BALL
SDRAM DDR3
SNP@VRAM _DDR3
VMC_CLK1
+1.5V_GFX
R56
SNP@1.33K/F_4
VREFD_VMC1
R376
SNP@1.33K/F_4
VREFC_VMC3
R63
C121
SNP@0.1u/10V_4
SNP@1.33K/F_4
R70

1 : CS11602JB00 ,RES CHIP 160 1/16W +-5%(0402)
2 : CS11622FB07 ,RES CHIP 162 1/16W +-1%(0402)
C148
SNP@0.1u/10V_4
VREFD_VMC3
SNP@1.33K/F_4
C152
SNP@10u/6.3V_8
C448
SNP@10u/6.3V_8
C446
SNP@1u/10V_4
C394
C58
C429
SNP@1u/10V_4
SNP@1u/10V_4
SNP@1u/10V_4
+1.5V_GFX
C21
C445
C132
C393
C397
C399
C442
C50
+1.5V_GFX
SNP@0.1u/10V_4
SNP@0.1u/10V_4
SNP@0.1u/10V_4
SNP@0.1u/10V_4
SNP@0.1u/10V_4
SNP@0.1u/10V_4
SNP@0.1u/10V_4
SNP@0.1u/10V_4
C53
C410
C51
C22
C97
C426
C391
C389
SNP@1u/10V_4
SNP@1u/10V_4
SNP@1u/10V_4
SNP@1u/10V_4
SNP@1u/10V_4
SNP@1u/10V_4
SNP@1u/10V_4
SNP@1u/10V_4
[16]
FBC_CMD17
[16]
FBC_CMD1
FBC_CMD17
TP3
FBC_CMD1
TP4
C79
SNP@0.1u/10V_4
R58
SNP@1.33K/F_4
+1.5V_GFX
C403
SNP@0.1u/10V_4
R377
SNP@1.33K/F_4
[16,19,20,40] +1.5V_GFX

PROJECT : ZQTA/ZQSA
Size
Document Number
Rev
1A
DGPU Memory 2/2 (DDR3)

Date:
5
VMC_CLK1#

1 : CS11602JB00 ,RES CHIP 160 1/16W +-5%(0402)
2 : CS11622FB07 ,RES CHIP 162 1/16W +-1%(0402)
SNP@1u/10V_4
SNP@1u/10V_4
SNP@1u/10V_4
SNP@1u/10V_4
VMC_DQ50
VMC_DQ53
VMC_DQ51
VMC_DQ55
VMC_DQ48
VMC_DQ52
VMC_DQ49
VMC_DQ54
R49
SNP@162/F_4
VREFC_VMC1
C137
C384
C68
C423
DML
DMU
+1.5V_GFX
VMC_CLK0#
+1.5V_GFX
L8
96-BALL
SDRAM DDR3
SNP@VRAM _DDR3
R388
SNP@162/F_4
E3
F7
F2
F8
H3
H8
G2
H7
10/12 SWAP Pin
+1.5V_GFX
+1.5V_GFX
R62
SNP@1.33K/F_4
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
10/12 SWAP Pin
96-BALL
SDRAM DDR3
SNP@VRAM _DDR3
VMC_CLK0
HYNIX 900MHz 1G AKD5LZWTW02

HYNIX 900MHz 2G AKD5MGWTW00
VRAM3
VREFC_VMC1
VREFD_VMC1
10/12 SWAP Pin

[16] FBC_CMD12
[16] FBC_CMD27
[16] FBC_CMD26
Sheet
1
21
of
44
C504
CRT
F1
[17] EV_CRT_GRN
[17] EV_CRT_BLU
R106
DO@0_4
CRT_RED_COM
R105
DO@0_4
CRT_GRN_COM
R104
DO@0_4
CRT_BLU_COM
[7] INT_CRT_RED
[7] INT_CRT_GRN
[7] INT_CRT_BLU
VSYNC_COM
HSYNC_COM
[17] VSYNC_COM
[17] HSYNC_COM
R408
R407
[17] EV_CRTDDAT
[17] EV_CRTDCLK
DO@0_4
DO@0_4
[7] INT_VSYNC
[7] INT_HSYNC
CRT_DDCDAT_COM
CRT_DDCCLK_COM
CRTVDD5
SSM22LLPT
R121
IV@0_4
CRT_RED_COM
L14
BLM18BA750SN1D/0.3A/75ohm_6
CRT_R1
R120
IV@0_4
CRT_GRN_COM
L12
CRT_G1
R119
IV@0_4
CRT_BLU_COM
L10
R117
R118
IV@0_4
IV@0_4
VSYNC_COM
HSYNC_COM
R417
R416
[7] INT_CRT_DDCDAT
[7] INT_CRT_DDCCLK
D12
SMD KMC3S110RY/1.1A_1206
IV@0_4
IV@0_4
CN12
CRT
6
1
7
2
8
3
9
4
10
5
CRT_B1
R158
R153
R151
C230
C225
C219
C221
C227
C231
150/F_4
150/F_4
150/F_4
10p/50V_4
10p/50V_4
10p/50V_4
10p/50V_4
10p/50V_4
10p/50V_4
CRT_DDCDAT_COM
CRT_DDCCLK_COM
11
CRT_11
12
DDCDAT_1
13
CRTHSYNC
14
CRTVSYNC
15
DDCCLK_1
T4
17
[17] EV_CRT_RED
From PCH
16
+5V
From EXT VGA
0.1u/10V_4
+3V
C520
U19
CRTVDD5
CRT_BYP
7
8
VCC_SYNC SYNC_OUT2
SYNC_OUT1
VCC_DDC
BYP
SYNC_IN2
VCC_VIDEO
SYNC_IN1
0.1u/10V_4
C517
0.22u/25V_6
+3V
16
14
15
13
CRT_VSYNC2
CRT_HSYNC2
R450
R451
0_4
0_4
CRTVSYNC
CRTHSYNC
VSYNC_COM
HSYNC_COM
+3V
C521
CRT_R1
CRT_G1
CRT_B1
0.1u/10V_4
3
4
5
VIDEO_1
VIDEO_2
VIDEO_3
DDC_IN1
DDC_IN2
DDC_OUT1
DDC_OUT2
GND
CRTVDD5
10
11
CRT_DDCCLK_COM
CRT_DDCDAT_COM
9
12
DDCCLK_1
DDCDAT_1
R454
R453
2.7K_4
2.7K_4
R455
R452
2.7K_4
2.7K_4
C513
0.1u/10V_4
CRTVDD5
C210
10p/50V_4
CRTVSYNC
C214
10p/50V_4
CRTHSYNC
C204
*10p/50V_4
DDCCLK_1
C216
*10p/50V_4
DDCDAT_1
CM2009-02QR
LVDS & eDP

From PCH
INT_LVDS_EDIDCLK
INT_LVDS_EDIDDATA
RP1
[7] INT_TXLCLKOUT+
[7] INT_TXLCLKOUT[7] INT_TXLOUT0+
[7] INT_TXLOUT0[7] INT_TXLOUT1+
[7] INT_TXLOUT1[7] INT_TXLOUT2+
[7] INT_TXLOUT2-
RP7
RP3
RP5
4
2
3 IV@0_4P2R
1
4
2
4
2
4
2
4
2
3
1
3
1
3
1
3
1
IV@0_4P2R
IV@0_4P2R
IV@0_4P2R
IV@0_4P2R
LVDS_EDIDCLK_CON
LVDS_EDIDDATA_CON
RP24
TXLCLKOUT+_CON
TXLCLKOUT-_CON
TXLOUT0+_CON
TXLOUT0-_CON
TXLOUT1+_CON
TXLOUT1-_CON
TXLOUT2+_CON
TXLOUT2-_CON
RP2
RP8
RP4
RP6
4
2
3 DO@0_4P2R
1
4
2
4
2
4
2
4
2
3
1
3
1
3
1
3
1
DGPU_EDIDCLK
DGPU_EDIDDATA
DO@0_4P2R
DO@0_4P2R
DO@0_4P2R
[7] INT_LVDS_BRIGHT
R28
[9]
[9]
USBP8+
USBP8-
0_4
*MCM2012B900GBE/400mA/90ohm
USBP8+_R
3
4
3
4
USBP8-_R
2
1
2
1
L1
R29
0_4
eDP_EN#
[7] INT_LVDS_DIGON
[18] DGPU_DISP_ON
R11
IV@0_4
R10
DO@0_4
R353
SP@0_4
10K_4
R354
*10K_4
CABLE_ID
Q45
IV@DTC144EUA
IV@/OP@-->0 ohm
DO@-->10K ohm
1
C38
C4
C3
*0.1u/10V_4
*2.2u/10V_8
0.1u/10V_4
0.01u/25V_4
C13
22u/6.3V_8
Lid Switch (Hall sensor)
R361
*0_4
+3VPCU
R360
47_6
C364
0.1u/10V_4
2
4
1 IV@0_4P2R
3
COM_EDP-AUX+
COM_EDP-AUX-
C16
C20
eDP@0.1u/10V_4 EDP-AUX+_R
eDP@0.1u/10V_4 EDP-AUX-_R
TXLOUT0+_CON
TXLOUT0-_CON
RP10
4
2
3 DO@0_4P2R
1
COM_EDP-ML0+
COM_EDP-ML0-
TXLOUT1+_CON
TXLOUT1-_CON
RP9
4
2
3 DO@0_4P2R
1
COM_EDP-AUX+
COM_EDP-AUX-
TXLOUT2+_CON
TXLOUT2-_CON
LVDS_BRIGHT
BL_ON
+3V
+3V
LVDS_EDIDDATA_CON
LVDS_EDIDCLK_CON
eDP-HPD
R31
BLM15AG121SS1/0.5A/120ohm_4
R359
0_6
LCDVCC
0.8A
[10]
CABLE_ID
CCD +3V-current budget 0.2A
R17
DO@100K_4
DO@100K_4
EDP-AUX+_R
EDP-AUX-_R
R19
+3V
CCD-USB
COM_EDP-AUX+
COM_EDP-AUX-
CABLE_ID
R358
CCD_PWR
0_6
USBP8-_R
USBP8+_R
[26] MIC2_INTL1
R30
DO@100K_4
C11
4.7u/25V_8
1000p/50V_4
ADOGND
+3VPCU
R25
*100K_4
+3V
C15
LID591#
C14
0.1u/10V_4
R40
10K_4
R18
LID591#
[32]
LID591#,EC intrnal PU
D2
BAS316
1000p/50V_4
BL_ON
10K_4
BL#
[7] INT_LVDS_BLON
R23
IV@0_4
[18] DGPU_LVDS_BLON
R24
DO@0_4
Q2
2N7002K
EC_FPBACK#
[32]
Q3
DTC144EUA
G_1
R22
Q1
2N7002K
100K_4

[3,7,8,9,10,11,13,14,19,23,24,25,26,27,28,31,32,34,35,36,37,38,39,40,41]
+3V
[8,11,23,25,26,31,34,41]
+5V
[8,25,30,31,32,33,34,41,42]
+3VPCU
[3,5,7,8,9,11,32,35,36,40,41]
+1.05V
[33,34,35,36,37,38,39,40,41,42,43]
VIN
GS12401-1011-40P-R-NH
9/26 modify pin define

3
Backlight Control
+3V
DO@100K_4
10/3 add
G_6
G_4
C5
RP11
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
eDP@0.1u/10V_4 EDP-ML0+_R
eDP@0.1u/10V_4 EDP-ML0-_R
C9
C8
COM_EDP-ML0+
COM_EDP-ML0-
1 IV@0_4P2R
3
D10
*VPORT_6
2
4
R16
LID591#
HE1
APX9132H AI
EM-6781-T3: AL006781000
APX9132H AI-TRG: AL009132001
AH9249NTR-G1: AL009249000
VIN
G_5
INVCC0
0_8
0_8
From EXT VGA
C6
G_0
R12
R15
RP12
R14
DO@100K_4
DO@100K_4
TXLCLKOUT+_CON
TXLCLKOUT-_CON
R13
GND
11/04 add
VIN
[17] EV_EDP-AUX+
[17] EV_EDP-AUX-
ON/OFF
LCDVCC
DO@0_4
From PCH
[17] EV_EDP-ML0+
[17] EV_EDP-ML0-
GND
[6]
R355
eDP-HPD
Q46
IV@2N7002K
CN1
EDP-AUX+
EDP-AUX-
OUT
IN
R9
R352
eDP@100K_4
[3]
[3]
IN
G5243AT11U
eDP@1K_4
Q18
eDP@2N7002E
EDP-ML0+
EDP-ML0-
R26
+3V
[3]
[3]
U1
C7
100K_4
+1.05V
R351
IV@0_4
+3V
R350
[18] EV_eDP_HPD
R20
+3V
LVDS_BRIGHT
1u/6.3V_4
IV@10K_4
DO@0_4
10/4 chnage parts for EOL
LVDS_EDIDDATA_CON
LVDS_EDIDCLK_CON
[3] INT_eDP_HPD_Q
R21
2.2K_4
2.2K_4
CONTRAST
*DO@0_4
R419
R418
[32]
EV_TXLCLK+ [17]
EV_TXLCLK- [17]
EV_TXLOUT0+ [17]
EV_TXLOUT0- [17]
EV_TXLOUT1+ [17]
EV_TXLOUT1- [17]
EV_TXLOUT2+ [17]
EV_TXLOUT2- [17]
DO@0_4P2R
Enable/Disable LVDS
Pull Up--->Enable
NC-->Disable
+3V
[18]
[18]
R32
RP25
[18] DGPU_DPST_PWM
[7] INT_LVDS_EDIDCLK
[7] INT_LVDS_EDIDDATA
LCD Power
From EXT VGA
PROJECT : ZQTA/ZQSA
Size
Document Number
Date:
Rev
1A
CRT/LVDS/CAMERA/LID
7
22
Sheet
8
of
44
HDMI
HDMI connector
CN13
INT_HDMITX2P_C
From PCH
[7] INT_HDMITX2N
[7] INT_HDMITX2P
D
[7] INT_HDMITX1N
[7] INT_HDMITX1P
[7] INT_HDMITX0N
[7] INT_HDMITX0P
[7] INT_HDMICLK+
[7] INT_HDMICLK-
C270
C284
0.1u/10V_4
0.1u/10V_4
INT_HDMITX2N_C
INT_HDMITX2P_C
INT_HDMITX2N_C
INT_HDMITX1P_C
C258
C261
0.1u/10V_4
0.1u/10V_4
INT_HDMITX1N_C
INT_HDMITX1P_C
INT_HDMITX1N_C
INT_HDMITX0P_C
C264
C268
0.1u/10V_4
0.1u/10V_4
INT_HDMITX0N_C
INT_HDMITX0P_C
INT_HDMITX0N_C
INT_HDMICLK+_C
C254
C251
0.1u/10V_4
0.1u/10V_4
INT_HDMICLK+_C
INT_HDMICLK-_C
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
INT_HDMICLK-_C
+5V
DO@--->499 ohm
P/N:CS14992FB24
IV@/OP@--->680 ohm
P/N:CS16802JB27
R512
R515
R522
R520
R518
R516
R525
R523
SP@680_4
SP@680_4
SP@680_4
SP@680_4
SP@680_4
SP@680_4
SP@680_4
SP@680_4
SMD KMC3S110RY/1.1A_1206
F2
HDMI_5V_R
2
1
C545
470p/50V_4
HDMI_DDCCLK_MB
HDMI_DDCDATA_MB
D19
HDMI_5V
SSM22LLPT
HDMI_MB_HP
R178
0_4 HP_DET_CN
SHELL1
D2+
D2 Shield
D2D1+
D1 Shield
D1D0+
D0 Shield
D0CK+
CK Shield
CKCE Remote
NC
DDC CLK
DDC DATA
GND
+5V
HP DET
SHELL2
20
21
HDMI CONN
R179
Q38
9/22 change parts

100K_4
+5V
2N7002E
R517
*100K/F_4
From EXT VGA

[17] EV_HDMITX2N
[17] EV_HDMITX2P
RP14 2
4
1 DO@0_4P2R
3
INT_HDMITX2N
INT_HDMITX2P
[17] EV_HDMITX1N
[17] EV_HDMITX1P
RP15 2
4
1 DO@0_4P2R
3
INT_HDMITX1N
INT_HDMITX1P
[17] EV_HDMITX0N
[17] EV_HDMITX0P
RP16 2
4
1 DO@0_4P2R
3
INT_HDMITX0N
INT_HDMITX0P
[17] EV_HDMICLK[17] EV_HDMICLK+
RP17 2
4
1 DO@0_4P2R
3
INT_HDMICLKINT_HDMICLK+
+3V
IV@:iGPU
EV@:dGPU
OP@:Optimus
DO@:Discrete only
SP@:Special
+3V
HDMI-detect
R181
10K_4
R174
10K_4
R185
IV@0_4
R189
DO@0_4
HDMI_HP
[7]
[32] HDMI_HPD_EC#
EV_HDMI_HPD
[18]
R180
*10K_4
HDMI_MB_HP
UMA
R239
R245
CS22202JB18
DIS
R239
R245
CS24702JB38
Q11
2N7002E
+5V
I2C
Q12
2N7002E
+5V
+3V
D20
RB501V-40
+3V
R489
SP@2.2K_4
From EXT VGA
Q35
BSN20
R494
2.2K_4
EMI
HDMI_DDCCLK_MB
INT_HDMITX2P_C
[17] EV_HDMI_DDCCK_C
[17] EV_HDMI_DDCDAT_C
R493
DO@0_4
HDMI_DDCCLK_COM
R508
DO@0_4
HDMI_DDCDATA_COM
R212
*100/F_4
INT_HDMITX2N_C
+5V
INT_HDMITX1P_C
+3V
R200
INT_HDMITX1N_C
INT_HDMITX0P_C
From PCH
[7] HDMI_DDCDATA_SW
R501
R504
IV@0_4
HDMI_DDCCLK_COM
IV@0_4
HDMI_DDCDATA_COM
R510
SP@2.2K_4
Q37
[7] HDMI_DDCCLK_SW
*100/F_4
D21
RB501V-40
+3V
R204
BSN20
*100/F_4
R509
2.2K_4
INT_HDMITX0N_C
HDMI_DDCDATA_MB
INT_HDMICLK+_C
R193
*100/F_4
INT_HDMICLK-_C

[3,7,8,9,10,11,13,14,19,22,24,25,26,27,28,31,32,34,35,36,37,38,39,40,41]
[8,11,22,25,26,31,34,41]
PROJECT : ZQTA/ZQSA
+3V
+5V
Size
Document Number
Date:
Rev
1A
HDMI (PS8101)
5
Sheet
1
23
of
44
MINI-CARD WLAN(MPC)
+3V
+3.3V: 1000mA
+3.3Vaux:330mA
+1.5V:500mA
+3V
R347
0_8
+WL_VDD
+WL_VDD
[30,32] BT_POWERON#
Q42
R652
10K_4
C354
10u/6.3V_8
DTC144EUA
C636
0.1u/10V_4
C640
*0.1u/10V_4
C638
*0.1u/10V_4
Check LED signal. (active high or low)
3BT_PWRON
+3V
CN18
PLTRST#
[9] CLK_LPC_DEBUG
R636
R639
0_4
0_4
51
49
47
45
43
41
39
37
35
33
31
29
27
25
23
21
19
17
CL_RST1#_WLAN
CL_DATA1_WLAN
CL_CLK1_WLAN
+WL_VDD
[9]
[9]
[9]
[9]
PCIE_TX8+
PCIE_TX8PCIE_RX8+
PCIE_RX8-
15
13
11
9
7
5
3
1
CLK_PCH_SRC5
CLK_PCH_SRC5#
[9] CLK_PCH_SRC5
[9] CLK_PCH_SRC5#
[9] PCIE_CLK_REQ5#
PCIE_WAKE#_R
TP67
Reserved
Reserved
Reserved
Reserved
GND
+3.3Vaux
+3.3Vaux
GND
GND
PETp0
PETn0
GND
GND
PERp0
PERn0
GND
UIM_C4
UIM_C8
+3.3V
GND
+1.5V
LED_WPAN#
LED_WLAN#
LED_WWAN#
GND
USB_D+
USB_DGND
SMB_DATA
SMB_CLK
+1.5V
GND
+3.3Vaux
PERST#
W_DISABLE#
GND
GND
REFCLK+
REFCLKGND
CLKREQ#
Reserved
Reserved
WAKE#
53
MINI-CARD1
UIM_VPP
UIM_RESET
UIM_CLK
UIM_DATA
UIM_PWR
+1.5V
GND
+3.3V
GND
TP70
GND
Debug
52
50
48
46
44
42
40
38
36
34
32
30
28
26
24
22
20
18
+WL_VDD
16
14
12
10
8
6
4
2
A_LFRAME#_R
A_LAD3_R
A_LAD2_R
A_LAD1_R
A_LAD0_R
+1.5V_Mimi
R597
*10K_4
LED_WLAN# [31]
USBP10+
USBP10-
+1.5V_Mimi
CLK_SDATA [9,13,14,25,31]
CLK_SCLK [9,13,14,25,31]
+1.5V_Mimi
+WL_VDD
+1.5V
[9]
[9]
PLTRST#
R610
R609
R608
R607
R606
C639
*1000p/50V_4
C641
*0.1u/10V_4
R605
*0_6
C635
*10u/6.3V_8
PLTRST# [9,15,28,32]
RF_EN [32]
0_4
0_4
0_4
0_4
0_4
Debug
LPC_LFRAME# [8,32]
LPC_LAD3 [8,32]
LPC_LAD2 [8,32]
LPC_LAD1 [8,32]
LPC_LAD0 [8,32]
+1.5V_Mimi
+WL_VDD
54
SSD-MINI moule
+3V_SATA
R615
C616
C615
C647
0.1u/10V_4
0.1u/10V_4
10u/10V_8
0_8
+3V
+3V_SATA
CN7
SATA_TXP_SSD_R
SATA_TXN_SSD_R
C346
C348
0.01u/16V_4
0.01u/16V_4
SATA_RXN_SSD_R
SATA_RXP_SSD_R
15
13
11
9
7
5
3
1
GND
REFCLK+
REFCLKGND
CLKREQ#
Reserved
Reserved
WAKE#
MINI-CARD1
UIM_VPP
UIM_RESET
UIM_CLK
UIM_DATA
UIM_PWR
+1.5V
GND
+3.3V
GND
0.01u/16V_4
0.01u/16V_4
GND
[8] SATA_RXN_SSD
[8] SATA_RXP_SSD
C345
C347
+3.3V
GND
+1.5V
LED_WPAN#
LED_WLAN#
LED_WWAN#
GND
USB_D+
USB_DGND
SMB_DATA
SMB_CLK
+1.5V
GND
+3.3Vaux
PERST#
W_DISABLE#
GND
52
50
48
46
44
42
40
38
36
34
32
30
28
26
24
22
20
18
USBP3+
USBP3-
[9]
[9]
16
14
12
10
8
6
4
2
54
[8] SATA_TXP_SSD
[8] SATA_TXN_SSD
Reserved
Reserved
Reserved
Reserved
GND
+3.3Vaux
+3.3Vaux
GND
GND
PETp0
PETn0
GND
GND
PERp0
PERn0
GND
UIM_C4
UIM_C8
53
LED_OUT
TP38
51
49
47
45
43
41
39
37
35
33
31
29
27
25
23
21
19
17

PROJECT : ZQTA/ZQSA
Size
Document Number
Date:
Rev
1A
MINI PCI-E / SSD

1
24
Sheet
8
of
44
MAIN SATA HDD(HDD)
G Sensor
+3V
CN14
1
A
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
SATA_TXP0_C
SATA_TXN0_C
C556
C559
0.01u/25V_4
0.01u/25V_4
SATA_RXN0
SATA_RXP0
C566
C571
0.01u/25V_4
0.01u/25V_4
R330
GS@0_6
SATA_TXP0 [8]
SATA_TXN0 [8]
U9
+VDD_3
VDD_IO
CS
+VDD_3
15
C350
14
GS@10u/6.3V_6
13
ADC3
12
GND
SATA_RXN0_C [8]
SATA_RXP0_C [8]
C353
GS@0.1u/10V_4
+5V_HDD
SCL/SPC
SDA/SDI/SDO
ADC2
INT2
VDD
INT1
11
ADC1
16
RES
GND
CLK_SDATA [9,13,14,24,31]
T17
G_SENSOR_INT#_PCH
[9]
10
SDO/SA0
NC
NC
CLK_SCLK [9,13,14,24,31]
R346
GS@0_4
GS@LIS3DHTR
19
SATA HDD
B
+5V
R541
+5V_HDD
0_8
C592
G-Sensor -->GS@
C585
C579
C578
C582
C577
10u/6.3V_6
*0.1u/16V_4
*0.1u/16V_4
0.01u/25V_4
0.01u/25V_4
+5V
Q24
ZP@AO6402A
6
5
2
1
8
9
10
11
12
13
GND15
15
C223
C222
0.01u/25V_4
0.01u/25V_4
SATA_RXN5
SATA_RXP5
C208
C207
0.01u/25V_4
0.01u/25V_4
SATA_TXP5 [8]
SATA_TXN5 [8]
ODD_POWER_R
SATA_RXN5_C [8]
SATA_RXP5_C [8]
*1K_4
C175
0.01u/25V_4
C18534-11305-L
[32] EC_ODD_EN
C177
0.01u/25V_4
C474
*0.1u/16V_4
C475
*0.1u/16V_4
C469
10u/6.3V_6
R140
Q6
ZP@DMN601K-7
*100u/6.3V_3528
ZP@0.1u/50V_6
Q28
ZP@DMN601K-7
C468
R437
*ZP@100K
SATA_DP
2 ODD_POWER_R
C453
+5V_ODD
Q27
ZP@DMN601K-7
10/3 add
DP
+5V
+5V
RSVD
GND
GND
SATA_TXP5_C
SATA_TXN5_C
ZP@100K
ODD@0_8
R131
ZP@22_8
MOD_EN_5V
1
2
3
4
5
6
7
GND1
RXP
RXN
GND2
TXN
TXP
GND3
+15V
R432
ZP@100K
R431
R428
14
GND14
+5V_ODD
+3VPCU
Zero Power -->ZP@
CN10
C
+5V
Zero Power (ODD)
ODD (ODD)
*100u/6.3V_3528
EC_ODD_EJ [32]
10/3 change PN

PROJECT : ZQTA/ZQSA
Size
Document Number
Rev
1A
SATA-HDD/ODD/G Sensor
Date:
1
Sheet
4
25
of
44
Codec(ADO)
Mute(ADO)
+3V
reverse R441
HP
[27]
HP-L
R618
*0_4
[27]
HP-R
R622
0_4
ADOGND
MIC1-VREFO-L
MIC1-VREFO-L [27]
+5VA
R633
R634
*10K_4
10K_4
PD#
*BAS316
D24
EAPD#
BAS316
D22
AMP_MUTE#
D26
PCH_AZ_CODEC_RST#
MIC1-VREFO-R [27]
MIC2-VREFO
ADOGND
R627
*0_4
MIC1-VREFO-L
BAS316
C661
10u/6.3V_6
C653
+
2.2u/6.3V_6
ADOGND
Place next to pin 27
+5VA
C666
2.2u/6.3V_6
ADOGND
C648
C665
0.1u/10V_4
+5VA

2.2u/6.3V_6
PVSS1
25
AVDD1
PGND
Spilt by DGND
Sense A
PCBEEP
SPDIFO
49
LINE2-L
12
48
T42
T43
R617
ADOGND
5
24
23
[32] AMP_MUTE#
22
MIC1-R [27]
21
EAPD#
MIC
MIC1-L [27]
U25
4
R595
0_4
TC7SH08FU
HP_MUTE# [27]
C609
*4.7u/10V_6
20
R632
19
20K/F_4
ADOGND
18
17
MIC2_INT_R C671
1u/10V_6
MIC2_INT_R_C
R638
1K_4
16
MIC2_INT_L C670
1u/10V_6
MIC2_INT_L_C
R637
1K_4
MIC2_INTL1
MIC2_INT_R_C
15
MIC2_INT_L_C
14
SENSEA
13
R630
20K/F_4
R631
39.2K/F_4
MIC1_JD [27]
C673
C674
*1000p/50V_4
*1000p/50V_4
HPOUT_JD [27]
ANALOG
ADOGND
ALC271X-VB6-GR
PCBEEP dont coupling any signals if possible

8/17 separate PCBEEP to Digital from Realtek suggestion
DIGITAL
+3V
10u/6.3V_6
26
27
VREF
AVSS1
29
30
28
LDO-CAP
MIC2-VREFO
31
MIC1-VREFO-R
32
HP-OUT-L
MIC1-VREFO-L
34
33
LINE2-R
SPDIFO2/EAPD
RESET#
0.1u/10V_4
PVDD2
SYNC
10u/6.3V_6
47
MIC2-L
11
46
EAPD#
C630
MIC2-R
SPK-R+
DVDD-IO
+5VPVDD2
C626
SPK-R-
10
10u/6.3V_6 0.1u/10V_4
45
SDATA-IN
0_6
C617
44
R_SPK+
C610
R_SPK-
R_SPK+
JDREF
Sense-B
R598
+5V
R_SPK-
[27]
MONO-OUT
(Vista Premium Version)
PVSS2
DVSS2
43
[27]
CPVEE
SPK-L-
42
41
BIT-CLK
L_SPK-
MIC1-L
SDATA-OUT
L_SPK-
MIC1-R
0.1u/10V_4 [27]
C669
0.1u/10V_4
+5V_S5
LINE1-L
SPK-L+
C668
10/6 change footprint
LINE1-R
PVDD1
10u/6.3V_6
L_SPK+
40
PD#
[27]
L_SPK+
GPIO1/DMIC-CLK
C631
10u/6.3V_6 0.1u/10V_4
39
C627
+5VPVDD1
0_6
C621
AVDD2
DVDD1
R599
C611
AVSS2
38
HP-OUT-R
CBP
37
ANALOG
Spilt by AGND
CBN
ADOGND
GPIO0/DMIC-DATA
ADOGND
+5V
36
U26
35
C634
0.1u/10V_4
C633
10u/6.3V_6
ADOGND
vendor suggest reserved for layout issue with noise
1.6Vrms
0_6
PCBEEP
C650
0.1u/10V_4
C662
1u/10V_6 BEEP_1
C649
10u/6.3V_6
C663
100p/50V_4
R624
47K/F_4 BEEP_2 D23
BAS316
D25
BAS316
R626
4.7K_4
C660
SPKR
[8]
PCBEEP_EC [32]
*100p/50V_4
Place next to pin 1
PCH_AZ_CODEC_RST# [8]
PCH_AZ_CODEC_SYNC [8]
+3V
PD#
C659
0V : Power down Class D SPK amplifer

3.3V : Power up Class D SPK amplifer
C657
0.1u/10V_4
10u/6.3V_6
Place next to pin 9

ACZ_SDIN0_R R623
C656
22_4
PCH_AZ_CODEC_SDIN0
[8]
*22p/50V_4
PCH_AZ_CODEC_BITCLK
[8]
PCH_AZ_CODEC_SDOUT
[8]
Power (ADO)
DIGITAL
+5V
INT MIC array
ANALOG
L39
UPB201209T-310Y-N/6A/31ohm_8
R625
+5VA
U27
3
IN
2
A
R643
OUT
SHDN
+
SET
R635
C672
R588
R298
R641
R309
C619
C664
C676
*29.4K/F_4
*10u/10V_3216
*0.1u/10V_4
*G923-330T1UF
C667
*0.1u/10V_4
C675
MIC2_INTL1
C658
GND
[22] MIC2_INTL1
0_4
4
0_4
0_4
0_4
0_4
*1000p/50V_4
*1000p/50V_4
*22p/50V_4
1/7 by FAE's recommend

A
R629
*10K/F_4
*10u/10V_3216
MIC2-VREFO
2.2K_4
ADOGND
ADOGND
ADOGND
C677 0.1u/10V_4
R628
*0_4
Tied at one point only under

the codec or near the codec
ADOGND
PROJECT : ZQTA/ZQSA
ADOGND
Size
cap place close to MIC-connector
C730, C787 close U37 pin3 and L65

4
Rev
1A
REALTEK ALC271X-VB6-GR
Date:
Document Number

1
Sheet
26
of
44
MIC
[26] MIC1-VREFO-R
Internal Speaker
[26] MIC1-VREFO-L
Normal OPEN Jack

R314
4.7K/F_4
R312
4.7K/F_4
CN17
[26]
[26]
MIC1-L
C336
4.7u/6.3V_6
MIC1_L2
R316
1K/F_4
MIC1_L3
MIC1-R
C335
4.7u/6.3V_6
MIC1_R2
R310
1K/F_4
MIC1_R3
L19
L18
CN16
1
2
6
3
5
4
MIC1_L4
MIC1_R4
MIC1_JD_R
[26]
[26]
[26]
[26]
L_SPK+_1
L_SPK-_1
R_SPK-_1
R_SPK+_1
0_6
0_6
0_6
0_6
1
2
3
4
50273-0047N-001
+3V
Max. 100mVrms input for Mic-IN
R311
R297
R259
R260
L_SPK+
L_SPKR_SPKR_SPK+
C330
C333
C313
C314
*0.22u/25V_6 *0.22u/25V_6 *0.22u/25V_6 *0.22u/25V_6
LINE-IN-SP6
C334
470p/50V_4
C337
470p/50V_4
R651
ADOGND
100K_4
ADOGND
MIC1_JD_R
1
MIC1_JD_R
D7
3
MIC1_JD
ADOGND
2
[26]
9/19 modify
Q44
2N7002K
*VPORT_6
ADOGND
10/31 add
HP
HP_MUTE#
HP_MUTE#
CN19
2
[26]
[26]
HP-L
HP-L2
HP-R2
1
R332
R323
47/F_4
47/F_4
HP-L3
HP-R3
L23
L22
1
2
6
3
5
4
HP-L4
HP-R4
HP-L2
HP_JD_R
Q17
*FDV301N
R338
0_6
C352
R329
R337
C342
*1K_4
*1K_4
2200p/50V_4 2200p/50V_4
LINE-IN-SP6
ADOGND
10/11 add
ADOGND
HP_MUTE#
HP_JD_R
HP-R
+3V
HP-R2
D8
Q16
*FDV301N
R327
0_6
[26]
R650
*VPORT_6
10/31 add
100K_4
10/11 add
ADOGND
2
HP_JD_R
[26] HPOUT_JD
10/31 add
1
ADOGND
Q43
2N7002K

PROJECT : ZQTA/ZQSA
Size
Document Number
Rev
1A
AUDIO JACK CONN

Date:
5
Sheet
1
27
of
44
4
LAN/Card reader
R621
0_6
VDD33
R616
0_6
VDDREG
SP16
Y4
C613
1
C618
25MHz
VDD33
27P/50_4
VDD10
27P/50_4
50 mils
SP15
SP14
SP13
VDD33/18
LAN_XTALI
LAN_XTAL2
R585
R3
R5
R6
R7
40 mils
R4
*1M_8
LED0/SPICSB
GPO_NC
R646
LED1/SPICLK/EESK
2.49K/F_4
VDD33
TXCT0
TXCT1
TXCT2
TXCT3
75/F_8
75/F_8
75/F_8
75/F_8
L24
1
D9
SG@B88069X9231T203
VDD10
10/31 modify
TD0+
MDI0-
TD0-
MDI1-
VDD10
MDI1+
MDI1MDI2+
MDI2MDI3+
MDI3-
VDD33
CARD_3V3
SP1
SP2
SP3
C
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
CARD_3V3
CARD_3V3
[29]
[29]
[29]
[29]
[29]
[29]
[29]
[29]
[29]
[29]
[29]
[29]
[29]
[29]
[29]
[29]
MDIP0
MDIN0
AVDD10
MDIP1
MDIN1
MIDP2
MDIN2
AVDD10
MDIP3
MDIN3
AVDD33
DVDD33
Card_3V3
SD_D7/xD_RDY
SD_D6/MS_INS#/xD_RE#
SD_D5/xD_CE#
SP1
SP2
SP3
SP4
SP5
SP6
SP7
SP8
SP9
SP10
SP11
SP12
SP13
SP14
SP15
SP16
SP1
SP2
SP3
SP4
SP5
SP6
SP7
SP8
SP9
SP10
SP11
SP12
SP13
SP14
SP15
SP16
RTL8411
(1.5A) 70 mils
MDI3+
MDI3MDI2+
MDI2MDI1+
MDI1MDI0+
MDI0-
TX1+
TD1+
R619
1K_4
VDD10
PCIE_WAKE#
TD1MCT2
TCT2
TX2+
TD2+
RJ45-TX1-
18
TXCT2
17
RJ45-TX2+
RJ45-TX2TXCT3
TX3+
14
RJ45-TX3+
TX3-
13
RJ45-TX3-
TCT3
TD3+
TD3LFE9276C-R
CN8
R349
+3V_S5
CLK_PCIE_LAN_REQ#
SP12
SP11
VDD33/18
LED0/SPICSB
ACT_LED_PWR
220_8
9
10
RJ45-TX0+
RJ45-TX0RJ45-TX1+
RJ45-TX2+
RJ45-TX2RJ45-TX1RJ45-TX3+
RJ45-TX3-
R620
15K/F_4
R8
+3V_S5
1
2
3
4
5
6
7
8
LED1/SPICLK/EESK11
LNK_LED_PWR
12
220_8
[9,15,24,32] PLTRST#
YELLOW_N
YELLOW_P
GND2
GND1
0+
01+
2+
213+
3-
14
13
GND_LAN
C
GREEN_N
GREEN_P
RJ45
SP4
SP5
SP6
SP7
SP8
SP9
SP10
11/04 modify
PCIE_RXN3_R
PCIE_RXP3_R
C637
C632
0.1u/10V_4
0.1u/10V_4
PCIE_RX3- [9]
PCIE_RX3+ [9]
R356
EVDD10
CLK_PCIE_LOM# [9]
CLK_PCIE_LOM [9]
PCIE_TX3- [9]
PCIE_TX3+ [9]
*SHORT_6
GND_LAN
SURGE
U11
MDI1MDI1+
MDI0MDI0+
1
2
3
4
1
2
3
4
8
7
6
5
U10
RJ45-TX1RJ45-TX1+
RJ45-TX0RJ45-TX0+
8
7
6
5
1
2
3
4
SG@UCLAMP2512T.TCT
10 mils
VDD33
Power-on Strapping
19
16
MCT3
12
RJ45-TX1+
15
TX2TD2-
11
TXCT1
20
RJ45
VDD33
ISOLATEB
TX1-
10
MDI3+
C355
0.01u/25V_4
MDI3-
RJ45-TX0-
21
VDD33
PCIE_WAKE#
[7] PCIE_WAKE#
MDI2-
+3V
VDDREG
ENSWREG R612
0_4
SDA/SPIDI
LED3/SPIDO/EEDO_NC
TP69
SCL/LED_CR_NC
TP68
CLK_PCIE_LAN_REQ#
[9] CLK_PCIE_LAN_REQ#
MDI2+
Reserver for EMI
REGOUT
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
REGOUT
VDDREG
VDDREG
ENSWREG_H
SDA/SPIDI
LED3/SPIDO
SCL/LED_CR
DVDD10
LANWAKEB
DVDD33
ISOLATEB
PERSTB
CLKREQB
SD_WP/MS_D1/xD_WP#
MS_BS/xD_CLE
VDD33/18
*6.8P/50V_4
*6.8P/50V_4
*6.8P/50V_4
*6.8P/50V_4
*6.8P/50V_4
*6.8P/50V_4
*6.8P/50V_4
*6.8P/50V_4
22
TCT1
C362
C363
C360
C361
C358
C359
C356
C357
Power source mode:

Pin45 :Pull-up VDD33 for SWR mode
Pull-down for LDO mde
RJ45-TX0+
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
[29]
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
GND
SD_D4/xD_WE#
SD_D1/MS_CLK/xD_D6
SD_D0/MS_D7/xD_D5
SD_CLK/MS_D3/xD_D4
SD_CMD/MS_D6/xD_D3
SD_D3/MS_D2/xD_D2
SD_D2/xD_D7
GND
HSIP
HSIN
REFCLK_P
REFCLK_N
EVDD10
HSOP
HSON
GND
MDI0+
MDI0VDD10
AVDD33
AVDD33
RSET
AVDD10
CKXTAL2
CKXTAL1
AVDD33
XD_CD#
MS_D0/xD_D1
MS_D4/xD_D0
SD_CD#/MS_D5/xD_ALE
VDD33/18
DVDD10
LED0/SPICSB
GPO
LED1/SPISCK
U23
65
TXCT0
23
TX0-
10K_4
GND_LAN
24
TX0+
MCT1
4
MDI1+
MCT0
TCT0
MDI0+
C2
220p/3KV_1808
R592
1M/F_4
2
+3V_S5
X'tal 25MHz
LAN_XTAL2
Transformer
(1.5A) 60 mils
LAN_XTALI
10 mils
VDD33/18
R611
1.5K/F_4
PCIE_WAKE#
R614
*10K_4
CLK_PCIE_LAN_REQ#
R613
*10K_4
LED1/SPICLK/EESK
R604
10K_4
C643
C644
*4.7u/6.3V_6 0.1u/10V_4
REGOUT
L38
C628
C622
*4.7u/6.3V_6 0.1u/10V_4
2.2uH/1A
(1.5A) 60 mils
C651
4.7u/6.3V_6
C654
0.1u/10V_4
MDI3MDI3+
MDI2MDI2+
1
2
3
4
1
2
3
4
8
7
6
5
8
7
6
5
8
7
6
5
SG@UCLAMP2512T.TCT
U13
VDD33/18
VDD10
SDA/SPIDI
1
2
3
4
U12
RJ45-TX3RJ45-TX3+
RJ45-TX2RJ45-TX2+
8
7
6
5
1
2
3
4
SG@UCLAMP2512T.TCT
1
2
3
4
8
7
6
5
8
7
6
5
SG@UCLAMP2512T.TCT

Place close to pin 33
Close to Chip
Place Close pins-- 48
VDDREG
VDD33
40 mils
Place close to pin 53
EVDD10
40 mils
(1.5A) 60 mils VDD10
30 mils
[3,7,8,9,10,11,15,30,31,34,35,36,41,42]
R600
+3V_S5
*SHORT_6
C596
C595
0.1u/10V_4
C645
C655
0.1u/10V_4
0.1u/10V_4
C602
C606
0.1u/10V_4
0.1u/10V_4
C652
4.7u/6.3V_6
C642
0.1u/10V_4
0.1u/10V_4
C646
C625
0.1u/10V_4
0.1u/10V_4
C608
C597
0.1u/10V_4
C598
0.1u/10V_4
C623
C624
0.1u/10V_4
1u/6.3V_4
0.1u/10V_4
PROJECT : ZQTA/ZQSA
Size
Document Number
Date:
LAN-RTL8411/CARD READER
Place Close to LAN chip, for VDD33 pins-- 11, 12, 39, 58, 63, 64
Place connect to Pin46/47
Place Close to LAN chip, for VDD33 pins-- 3, 8, 41, 52, 61
Close to Pin29
Sheet
28
of
44
Rev
1A
XD,MMC 4.2/SD,MS/MSP
CARD READER CONNECTOR
7 IN1 CARD READER
Share Pin
SP1
SP2
SP3
SP4
SP5
SP6
SP7
SP8
SP9
SP10
SP11
SP12
SP13
SP14
SP15
SP16
[28]
[28]
[28]
[28]
[28]
SD_D7
SD_D6
SD_D5
SD_D4
SD_D1
SD_D0
SD_CLK
SD_CMD
SD_D3
SD_D2
SD_WP
SD_CD#
SP1
SP2
SP3
SP4
SP5
SP6
SP7
SP8
[28]
[28]
[28]
[28]
SP9
SP10
SP11
SP12
[28]
[28]
[28]
[28]
SP13
SP14
SP15
SP16
MS_CLK
MS_D7
MS_D3
MS_D6
MS_D2
MS_BS
MS_D1
MS_D5
MS_D4
MS_D0
xD_RDY
xD_RE#
xD_CE#
xD_WE#
xD_D6
xD_D5
xD_D4
xD_D3
xD_D2
xD_D7
xD_CLE
xD_WP#
xD_ALE
xD_D0
xD_D1
xD_CD#
CN5
CARD_3V3
SP13=SD_CD#=MS_D5=XD_ALE
SP12=SD_WP=MS_D1=XD_WP#
SP5=SD_D1=MS_CLK=XD_D6
SP6=SD_D0=MS_D7=XD_D5
SP7=SD_CLK=MS_D3=XD_D4
SP8=SD_CMD=MS_D6=XD_D3
SP10=SD_D2=XD_D7
SP1=SD_D7=XD_RDY
SP2=SD_D6=MS_INS#=XD_RE#
SP3=SD_D5=XD_CE#
SP4=SD_D4=XD_WE#
CARD_3V3
SP11=MS_BS=XD_CLE
SP15=MS_D0=XD_D1
CARD_3V3
CARD_3V3
[28]
[28]
[28]
[28]
MS_INS#
R577
R251
R252
R255
0_4
0_4
0_4
0_4
SP1=SD_D7=XD_RDY
SP3=SD_D5=XD_CE#
SP4=SD_D4=XD_WE#
R254
R578
R242
R245
0_4
0_4
0_4
0_4
SP7=SD_CLK=MS_D3=xD_D4
SP8=SD_CMD=MS_D6=xD_D3
R253
R257
R581
R580
0_4
0_4
0_4
0_4
SP10=SD_D2=XD_D7
SP11=MS_BS=XD_CLE
R576
R640
R579
R642
0_4
0_4
0_4
0_4
SP14=MS_D4=XD_D0
SP15=MS_D0=XD_D1
SP16=XD_CD#
13
1
2
3
4
10
19
23
25
5
8
17
21
SD-VCC
SD-CD-SW
SD-WP-SW
SD-DAT1
SD-DAT0
SD-CLK
SD-CMD
SD-DATA3
SD-DAT2
MMC-DATA7
MMC-DATA6
MMC-DATA5
MMC-DATA4
7
15
26
27
SD-GND1
SD-GND2
SD-WP-GND
SD-CD-GND
22
9
11
12
14
16
18
20
MS-VCC
MS-BS
MS-DATA1
MS-DATA0
MS-DATA2
MS-INS
MS-DATA3
MS-SCLK
6
24
MS-GND1
MS-GND2
CARD_3V3
XD-VCC
45
XD-CD
XD-R/B
XD-RE
XD-CE
XD-CLE
XD-ALE
XD-WE
XD-WP
28
29
30
31
32
33
34
35
SP16=XD_CD#
SP1=SD_D7=XD_RDY
SP3=SD_D5=XD_CE#
SP11=MS_BS=XD_CLE
SP4=SD_D4=XD_WE#
XD-D0
XD-D1
XD-D2
XD-D3
XD-D4
XD-D5
XD-D6
XD-D7
37
38
39
40
41
42
43
44
SP14=MS_D4=XD_D0
SP15=MS_D0=XD_D1
SP8=SD_CMD=MS_D6=XD_D3
SP10=SD_D2=XD_D7
XD-GND1
XD-GND2
36
46
R013-P13-HM
1 : DFHS44FR012
2 : :DFHS44FR014
10/7 change 0 ohm
10 mils
CARD_3V3
SP7=SD_CLK=MS_D3=xD_D4
C604
10u/6.3V_6
C591
C590
*6P/50V_4
*6P/50V_4
10/7 add
Place close to connector
pin 13 or 22 or45
EMI solution

PROJECT : ZQTA/ZQSA
Size
Document Number
Date:
Rev
1A
CARD READER CONNECTOR

A
Sheet
E
29
of
44
4
Blutooth
Q33
C536
0.33u/10V_6
USB 3.0 Connector

R248
0_4
USBP2-_C
USBP2+_C
2
3
2
3
USBPWR1
USBP2-_R
USBP2+_R
1
4
1
4
USB30_RX3-_R
USB30_RX3+_R
R256
0_4
10/14 modify
R265
USB30_TX3-_R
USB30_TX3+_R
U3@0_4
[9]
[9]
4
1
USB30_RX3+
USB30_RX3-
USB30_RX3+_R
USB30_RX3-_R
3
2
R237
R653
4.7K_4
R215
2
3
USBP4+
USBP4-
U3@0.1u/10V_4 USB30_TX3+_C
U3@0.1u/10V_4 USB30_TX3-_C
U3@0_4
4
1
USB30_TX3+_R
USB30_TX3-_R
3
2
2
3
1
4
1
4
parts for EOL
+5V_S5
U7
[32]
IN1
IN2
4
1
USBON#
*U3@HDMI2012F2SF-900T04/90ohm/400mA
R241
U3@0_4
[9]
+5VPCU_USBP0
8
7
6
C341
C339
C340
470P/50V_4 .1u/10V_4
OC#
C349
1u/6.3V_4
USB2.0 connector P/N:

DFHS04FR487
OUT3
OUT2
OUT1
EN#
GND
RP22
C310
C312
7
6
0_4
R210
0_4
10/4 chnage
2
3

USB30_TX3+
USB30_TX3-
7
6
L16
USB/B
*U3@HDMI2012F2SF-900T04/90ohm/400mA
R268
U3@0_4
USB30_TX3+
USB30_TX3-
BT_LED
T9
5
4
3
2
1
87213-0500G
VBUS
[24,32] BT_POWERON#
DD+
GND
[9]
SSRX[9]
SSRX+
GND
SSTXSSTX+
13
12
11
10
[9]
[9]
1
2
3
4
5
6
7
8
9
USBP4+_R
USBP4-_R
C550
1000p/50V_4
+ C549
2.2u/6.3V_6
5
4
3
2
1
13
12
11
10
RP23
1
2
3
4
5
6
7
8
9
CN4
BT_POWER
R475
47K_4
CN15
USB3.0 CONN
L17
AO3413
+3V_S5
BLUETOOTH CONNECTOR for BT3.0
USB3.0/2.0
5
150u/6.3V_3528
G547E2P81U
USB_OC1#
USB_OC1#
CN6
+5VPCU_USBP0
R318
+5VPCU
USBP2-_R
RV4 1
2 *EGA_4
USBP2+_R
[9]
[9]
10/11 add
RV5 1
2 *EGA_4
USB30_RX3-_R RV7 1
2 *EGA_4
USB30_RX3+_RRV6 1
2 *EGA_4
USB30_TX3-_R RV3 1
2 *EGA_4
USB30_TX3+_R RV2 1
2 *EGA_4
2
3
USBP1+
USBP1-
U21
IN1
IN2
OUT3
OUT2
OUT1
8
7
6
USBPWR1
OC#
150u/6.3V_3528
EN
GND
C573
+
USB_BC_EN 4
1
USBP1+_R
USBP1-_R
L21
C574 1u/6.3V_4
2
3
0_4
2
3
USBP1+_R
USBP1-_R
1
4
1
4
USBP9+_R
USBP9-_R
R317
0_4
C297
R315
1
2
3
4
5
6
7
8
9
10
1
2
3
4
5
6
7
8
9
10
11
12
11
12
88501-1001
0_4
1000p/50V_4
G547E1P81U
L20
[9]
[9]
2
3
USBP9+
USBP9-
[9] USB_OC0#
2
3
1
4
USBP9+_R
USBP9-_R
1
4
R313
0_4
10/11 change to 3528 type
USB Charger -->CH@

None Charger--> NCH@
USB Charger to 3.0

CB
SELCDP
Funcion
DCP autodetect with mouse/keyboard wakeup
S0 charging with SDP only
S0 charging with CDP or SDP only (depending on external device)

BC_CEN
CH@0_4
USB_CHARGE_ON [32]
1
2
3
4
10/14 modify
CEN
CB1
DM
TDM
DP
TDP
SELCDP VDD
Thermal Pad
8
7
6
5
9
USBP2USBP2+
C320
R547
*CH@0_4
MAINON [32,36,37,40,41]
USBP2- [9]
USBP2+ [9]
CH@0.1u/10V_4
[32] USB_BC_ON
C292
*CH@0.1u/10V_4
2
USB_BC_ON
USB_BC_EN
4
1
3
R544
U5
CH@47K_4
5
R217
BC_CEN
USBP2-_C
USBP2+_C
+3VPCU
CEN:SLG55584A----pull up
SLG55584----pull low
R227
U4
CH@TC7SH08FU
NCH@0_4
CH@SLG55584A
A
R262
CH@10K_4
+5VPCU

USBP2-_C R540
USBP2+_C R543
U2@0_4 USBP2U2@0_4 USBP2+
PROJECT : ZQTA/ZQSA
Size
10/18 add
4
Rev
1A
USB/ BT/CHARGER
Date:
Document Number
Sheet
1
30
of
44
4
+3VPCU
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
+3V
R42
10/5 add
+5V
[32]
FANSIG
U2
2
+VGACORE
*0_8
VIN
VO
GND
/FON GND
GND
VSET GND
[9,10] SML1ALERT#
[32] CPUFAN#_DAC
CN9
3 R44
5
6
7
8
TH_FAN_POWER
0_8
2
C49
2.2u/6.3V_6
10/11 modify
10K_4
R45
MY0
MY1
MY2
MY3
MY4
MY5
MY6
MY7
MY8
MY9
MY10
MY11
MY12
MY13
MY14
MY15
MY16
MY17
MX7
MX6
MX5
MX4
MX3
MX2
MX1
MX0
MY0
MY1
MY2
MY3
MY4
MY5
MY6
MY7
MY8
MY9
MY10
MY11
MY12
MY13
MY14
MY15
MY16
MY17
MX7
MX6
MX5
MX4
MX3
MX2
MX1
MX0
CPU FAN
CN2
[32]
[32]
[32]
[32]
[32]
[32]
[32]
[32]
[32]
[32]
[32]
[32]
[32]
[32]
[32]
[32]
[32]
[32]
[32]
[32]
[32]
[32]
[32]
[32]
[32]
[32]
K/B
G995P1U
1
2
3
C40
C41
C42
2.2u/6.3V_6
*0.01u/25V_4
0.01u/25V_4
FAN_CONN.
53398-0310-3P-L
DFHD03MR026
FANPWR = 1.6*VSET
27
28
KB CONN
RP13
10
MX7 9
MX6 8
MX5 7
MX4 6
9/14 modify
LED
10K_10P8R
1 MX3
2 MX2
3 MX1
4 MX0
5
+3V_S5
Qpxfs
[32]
PWRLED#
[32]
SUSLED#
+3V
+5V
R101
R424
*0_6
0_6
R340
49.9/F_4
R341
249/F_4
L9
L8
+3V
+5V
LED2
PWRLED#
Model EA/EG/BA---->SW3,SW4
VA/VG--------->SW5,SW6
TOUCHPAD & Switch CONN.
*0_6
0_6
C174
3
R427
10K_4
R429
10K_4
0.1u/10V_4
TP/B
50mil
+TPVDD
LED_AMBER/BLUE
Qpxfs!Cpuupo
PWRLED#
R2
150/F_4
LED1 1
BEBL0089Z00
LTST-C190TBKT/BLUE
Cbuufsz
[32]
BATLED0#
[32]
BATLED1#
[32]
[32]
Cmvf
L6
L7
TPCLK
TPDATA
+3V_S5
C173
*0.01u/25V_4
C172
*0.01u/25V_4
TPDATA_R
TPCLK_R
10/5 modify
RIGHT#
[9,10] BOARD_ID4
[10] BOARD_ID3
[9,13,14,24,25] CLK_SDATA
[9,13,14,24,25] CLK_SCLK
R138
R139
*0_4
*0_4
LEFT#
+3VPCU
SW5
LED5
R342
300/F_4
R343
100_4
RIGHT#
1
5
3
1
LED_AMBER/BLUE
Cmvf
IEE
20/F_4
11/04 modify
SW3
+3V
LEFT#
2
6
4
RIGHT#
1
5
3
2
6
4
11/1 modify pin define

11/04 modify
SP@SWITCH
SW4
LEFT#
2
6
4
SP@SWITCH
HDD_LED
1
5
3
13
14
CN3
SW6
SP@SWITCH
LED3
R344
[8] SATA_ACT#
TPCLK_R
TPDATA_R
0_6
0_6
1
2
3
4
5
6
7
8
9
10
11
12
1
5
3
2
6
4
SP@SWITCH
For BA WLAN function

SW1
BNCFS
LED4
R345
20/F_4
[32]
RF_SW#
1
5
3
RF_SW#
1
XMBO
[24] LED_WLAN#
+3V
2
6
4
BA@SWITCH
RV1
WLAN_LED
PROJECT : ZQTA/ZQSA
*BA@EGA-0402
Size
Document Number
Rev
1A
KB/FAN/TP+FP/LED
Date:
5
Sheet
1
31
of
44
EC(KBC)
4
L13
PBY160808T-250Y-N/3A/25ohm_6
+3V
+3VPCU
R156
1
C228
C226
0.1u/10V_4
10u/6.3V_6
+3VPCU
E775AGND
D13
0.03A(30mils)
CLK_PCI_775
4.7u/6.3V_6
0.1u/10V_4
R1
10K_4
C519
E775AGND
10u/6.3V_8
C518
[10] SIO_A20GATE
[10]
122
SIO_RCIN#
[10] SIO_EXT_SCI#
29
[22] EC_FPBACK#
6
124
[26] AMP_MUTE#
[9,15,24,28]
PLTRST#
PLTRST#
LPC
ECSCI/GPIO54
GPIO24/LDRQ
GPIO10/LPCPD
LREST
123
GPIO67/PWUREQ
[8]
IRQ_SERIRQ
125
SERIRQ
[10] SIO_EXT_SMI#
MX0
MX1
MX2
MX3
MX4
MX5
MX6
MX7
54
55
56
57
58
59
60
61
[31]
[31]
[31]
[31]
[31]
[31]
[31]
[31]
[31]
[31]
[31]
[31]
[31]
[31]
[31]
[31]
[31]
[31]
MY0
MY1
MY2
MY3
MY4
MY5
MY6
MY7
MY8
MY9
MY10
MY11
MY12
MY13
MY14
MY15
MY16
MY17
53
52
51
50
49
48
47
43
42
41
40
39
38
37
36
35
34
33
MBCLK
MBDATA
2ND_MBCLK
2ND_MBDATA
[33]
MBCLK
[33]
MBDATA
[9] 2ND_MBCLK
[9] 2ND_MBDATA
[18]
GPUT_CLK
[18] GPUT_DATA
B
77
[25] EC_ODD_EN
+1.05V
EC_PECI
R147
R142
70
69
67
68
119
120
72
71
10
11
[31]
TPCLK
[31]
TPDATA
[8]
ME_WR
[24,30] BT_POWERON#
Reserve for writing ME ROM
[3]
KBRST/GPIO86
RF_EN
[31]
[31]
[31]
[31]
[31]
[31]
[31]
[31]
0_4
43_4
+1.05V_VTT_EC
EC_PECR_R
VTT - the power supply for the PECI signal

PECI - the PECI 3.0 data bus, bidirectional signal.
12
13
GPIO65/SMI
KBSIN0
KBSIN1
KBSIN2
KBSIN3
KBSIN4
KBSIN5
KBSIN6
KBSIN7
KBSOUT0/JENK
KBSOUT1/TCK
KBSOUT2/TMS
KBSOUT3/TDI
KB
KBSOUT4/JEN0
KBSOUT5/TDO
KBSOUT6/RDY
KBSOUT7
KBSOUT8
KBSOUT9/SDP_VIS
KBSOUT10/P80_CLK
KBSOUT11/P80_DAT
KBSOUT12/GPIO64
KBSOUT13/GPIO63
KBSOUT14/GPIO62
KBSOUT15/GPIO61/XOR_OUT
GPIO60/KBSOUT16
GPIO57/KBSOUT17
GPIO17/SCL1
GPIO22/SDA1
GPIO73/SCL2
GPIO74/SDA2
GPIO23/SCL3
GPIO31/SDA3
TIMER
GPIO15/A_PWM
GPIO21/B_PWM
GPIO13/C_PWM
GPIO32/D_PWM
GPIO45/E_PWM
GPIO40/F_PWM/RI1
GPIO66/G_PWM
GPIO33/H_PWM/SOUT1
GPIO87/CIRRXM/SIN_CR
GPIO34/SIN1/CIRRXL
GPIO46/CIRRXM/TRST
GPO83/SOUT_CR/TRIST
IR
L11
F_SDI/F_SDIO1
F_SDO/F_SDIO0
F_CS0
F_SCK
PS/2 FIU
GPIO00/32KCLKIN
WPCE885
GPIO56/TA1
GPIO20/TA2/IOX_DIN_DIO
GPIO14/TB1
SMB
GPIO37/PSCLK1
GPIO35/PSDAT1
GPIO26/PSCLK2
GPIO27PSDAT2
VTT
PECI
GPIO01/TB2
GPIO02
GPIO03
GPIO04
GPIO05
GPIO06/IOX_DOUT/RTS1
GPIO07
GPIO16
GPIO30
GPIO36/CTS1
GPIO41
GPIO42/SCL3B/TCK
GPIO43/SDA3B/TMS
GPIO44/TDI
GPIO
GPO47/SCL4
GPIO50/PSCLK3/TDO
GPIO51
GPIO52/PSDAT3/RDY
GPIO53/SDA4
GPIO70
GPIO71
GPIO72
GPIO75/SPI_SCK
GPO76/SHBM
GPIO77
GPIO81
GPO82/IOX_LDSH/TEST
GPO84/IOX_SCLK/XORTR
GPIO97
T32
ICM
11/04 modify
T33
CPUFAN#_DAC
[31]
T35
64
79
95
96
108
93
94
114
109
15
80
17
20
21
24
25
26
27
28
73
74
75
82
83
84
91
110
112
107
ACIN
113
14
23
111
T36
M_PON_R
SLP_A#_R
HWPG
VGA_THERM#_R
LID591# [22]
M_PON [42]
SLP_A# [7]
*SHORT_4
*SHORT_4
10/31modify
*SHORT_4
[35]
R434
R435
10K_4
10K_4
GPUT_CLK
GPUT_DATA
R155
R154
10K_4
10K_4
2ND_MBCLK
2ND_MBDATA
R143
R144
10K_4
10K_4
GPU_THERMAL_ALERT#
SUSB# [7]
[18]
T21
D/C#
[33]
S5_ON [34,41]
HDMI_HPD_EC#
[23]
T22
SUSC# [7]
PWROK_EC [7]
PCH_RSMRST# [7]
MAINON [30,36,37,40,41]
H_PROCHOT#
T29
PROCHOT_EC
T34
USBON# [30]
USB_CHARGE_ON
[3,35]
Q31
EC_ODD_EJ [25]
DNBSWON# [7]
Do not use it
[30]
2
R465
100K_4
T20
2N7002K
SUSON [37]
FANSIG [31]
CONTRAST [22]
PCBEEP_EC [26]
PWRLED# [31]
BATLED0# [31]
T25
SUSLED#
SUSLED# [31]
T27
BATLED1# [31]
USB_BC_ON [30]
+0.75V_ON [37]
T24
PROCHOT_EC
86
87
90
92
PCH_SPI_SO [8]
PCH_SPI_SI [8]
SPI_CS0#_UR_ME [8]
PCH_SPI_CLK [8]
30
VCC_POR#
104
+A3VPCU
T23
R146
47K/F_4
+3V
HWPG(KBC)
+3VPCU
R463
10K_4
SM BUS ARRANGEMENT TABLE

SM Bus 1
Battery
SM Bus 2
PCH
SM Bus 3
VGA
SM Bus 4
HDMI
[38] HWPG_VCCSA
[41] HWPG_1.8V
[36,38] HWPG_VTT
[37] HWPG_VDDR
1u/6.3V_4
GFX_PWRGD
dGPU_VRON
+VGPU_CORE
+1.5V_GPU
dGPU_PWROK
+3VPCU
MBCLK
MBDATA
10/11 add
VRON
R449
S5_ON
85
PBY160808T-250Y-N/3A/25ohm_6
R644
R645
T31
T28
VCC_POR
VREF
11/9 modify
RF_SW# [31]
31
117
63
32
118
62
65
22
16
81
66
SM BUS PU(KBC)
[33]
T26
NBSWON#
C478
pin13
pin21
pin23
pin25
pin27
D1
*VPORT_6
[33]
2
6
4
SWITCH
C1
0.1u/10V_4
T46
ICM
101
105
106
1
5
3
0.01u/25V_4
TEMP_MBAT [33]
GPIO55/CLKOUT/IOX_DIN_DIO
DG0.9 and chklist 0.9 apply one series 43ohm near EC side
+VCC_GFX
+3V_D for ATI
+1V for ATI
+1.8V_GPU for ATI
GPU_RST#
SW2
NBSWON#
GPIO85/GA20
[24]
GPIO94/DA0
GPI95/DA1
GPI96/DA2
D/A
GPIO11/CLKRUN
VCORF
121
AGND
CLKRUN#
97
98
99
100
VCORF_uR 44
[7]
C218
*10p/50V_4
GPIO90/AD0
GPIO91/AD1
GPIO92/AD2
GPIO93/AD3
A/D
GND1
GND2
GND3
GND4
GND5
GND6
*22_4
5
18
45
78
89
116
R152
LFRAME
LAD0
LAD1
LAD2
LAD3
LCLK
103
3
126
127
128
1
2
[8,24] LPC_LFRAME#
[8,24] LPC_LAD0
[8,24] LPC_LAD1
[8,24] LPC_LAD2
[8,24] LPC_LAD3
[9] CLK_PCI_775
ICM
U17
0.1u/10V_4
C483
*0.1u/16V_4
C523
VDD
C206
0.1u/10V_4
102
C217
*0.1u/16V_4
AVCC
C203
0.1u/10V_4
19
46
76
88
115
C220
4.7u/6.3V_6
VCC1
VCC2
VCC3
VCC4
VCC5
C224
C522
+3VPCU_EC
2.2_6
2
RB500V-40
pin14
pin22
pin24
pin26
pin28
Power on bottom
+A3VPCU
30mil
E775AGND
[34] SYS_HWPG
D14
BAS316
D17
BAS316
HWPG
D15
*BAS316
D16
BAS316
D18
BAS316
+3VPCU
S5_ON
R141
VA@10K_4
M_PON
R654
BA@10K_4
11/2 modify
PROJECT : ZQTA/ZQSA
Size
Document Number
Date:
Rev
1A
WPCE885 & FLASH

5
Sheet
1
32
of
44
4
VA1
PJ1
POWER_JACK
VA
1
2
3
4
VA2
PD5
SBR1045SP5-13
1
PL3
FBMA-11-201209-800A50T
PR164
0.01/F_0612
PQ30
AOL1413
VA2
1
2
3
1
2
3
PR8
220K_4
24707_ACN
PC5
0.1u/50V_6
PQ31
AOL1413
VIN
PR161
0_4
PC97
0.1u/50V_6
PL2
FBMA-11-201209-800A50T
PD6
SMAJ20A
PC107
0.1u/50V_6
PC104
0.1u/50V_6
PR28
33K/F_4
24707_ACP
PC1
0.1u/50V_6
PD1
1N4148WS
PR1
220K_4
recommend 200mA at least.
PR158
0_4
D/C#
PR29
10K_4
[32]
PR11
0_4
PC2
0.1u/50V_6
PQ1
IMD2AT108
2
PQ3
2N7002K
24707_ACP
VA2
24707_ACN
PC99
0.1u/50V_6
PC8
0.1u/50V_6
24707_ACDET 6
24707_VCC
PR24
100K_4
PR22
20_1206
20
REGN
16
24707_REGN
PD2
RB500V-40
VCC
BTST
17 24707_BST
ACIN
PR5
0_4
MBDATA
SDA
18
24707_DH
PHASE
19
24707_LX
SCL
LCDRV
15
PGND
14
24707_DL
PL5
FBMA-11-201209-800A50T
24707_CMPOUT
PR20
10_6
CMPOUT
SRP
BAT-V
10
PR23
100K_4
24707_CMPIN 4
PR165
*100K_4
+3VPCU
24707_SRP
13
SRN
12
PR13
7.5_6
0929
PC96
0.1u/25V_4
TEMP_MBAT
VN
CH2
VP
CH3
PC93
0.01u/25V_4
[32]
MBDATA
[32]
ICM
A
PC92
100P/50V_4
MBDATA
+3VPCU
MBCLK
PROJECT : ZQTA/ZQSA
Size
Add ESD diode base on EC FAE suggestion
Document Number
Rev
1A
Charger(bq24707A)
Date:
PC103
10u/25V_1206
24707_SRN
2
2
PC94
10u/25V_1206
MBCLK
PU2
IP4223-CZ6
CH4
PC6
0.1u/50V_6
PR18
100_4
[32]
CH1
24707_SRP
REGN MAX voltage 6.5V

V_ILIM=20*(VSRP-VSRN)=20*Ichg*Rsr
=0.793V for 3.965A current limit
PC3
*47p/50V_6
PR160
0_4
24707_SRN
C114F3-108A1-L_Batt_Conn
PR163
100K/F_4
PQ32
MDV1528
PC9
*680p/50V_6
PC7
0.1u/25V_4
CMPIN
TEMP_MBAT [32]
PR159
0_4
PC98
0.1u/25V_4
ILIM
IOUT
TEMP_MBAT
PR2
316K/F_4
PR7
100_4
PL4
FBMA-11-201209-800A50T
GND
GND
GND
GND
GND
24707_ILIM
PJ2
PR26
*4.7_6
IFAULT#
21
22
23
24
25
MBAT+
PR12
*10K_4
11
3
2
1
24707_IFAULT#
PR21
100_4
BAT-V
PR10
10K_4
PC102
*100p/50V_6
PR6
0_4
PR166
0.01/F_0612
PL6
6.8uH_7X7X3
+3VPCU
PC95
0.1u/50V_6
PC4
*47p/50V_6
PQ33
MDV1528
PU1
BQ24707A
PR4
0_4
MBCLK
HIDRV
ACOK#
3
2
1
PQ4
2N7002K
10 1
2
3
4
5
6
7
9 8
PC106
4.7u/25V_8
PC11
47n/50V_6
PC105
0.1u/50V_6
PR27
0_6
PC10
0.47u/25V_6
[32]
PR25
100K_4
ACDET
+3VPCU
VIN
PC101
1u/10V_6
ACN
PR162
10K/F_4
ACP
+3VPCU
PC100
0.1u/50V_6
PR3
63.4K/F_4
PR17
0_6
PR19
*0_6
Sheet

1
33
of
44
MAIND
MAIND
SYS_SHDN#
[5,37,41]
SYS_SHDN#
[3,41]
Ven=7.23V
10/7 add
VIN
VL
EN
PC82
0.1u/50V_6
+3V_PG
23
PGOOD
5V_DH
21
UGATE1
22
BOOT1
PR135
1/F_6
5V_LX
20
PHASE1
5V_DL
19
LGATE1
24
VOUT1
SKIPSEL
14
+3V_SKIP
TONSEL
+3V_TON
UGATE2
10
+3V_DH
BOOT2
PHASE2
11
PR125
1/F_6
+3V_LX
12
3V_DL
PC168
100u/25V_6X5.8
+3VPCU
PQ53
AON7410
PC77
0.1u/50V_6
PL14
2.2uH_7X7X3
+3VPCU
3.3 Volt +/- 5%
TDC : 7.75A
PEAK : 8.5A
OCP : 9A
Width : 3000mil
JP14
0.001/F_3720
FB2
GND
GND
ENTRIP2
OUT2
PR123
*4.7_6
+3VPCU_FB
4
PC171
0.1u/50V_6
PQ55
AON7702
PC83
*680p/50V_6
PR253
10K/F_4
PC174
0.1u/10V_4
PR251
100K/F_4
PC173
330u/6.3V_6X5.7
PC76
*680p/50V_6
3
2
1
8223_EN
PR256
10K/F_4
PR128
6.81K/F_4
15
PR249
0_4
1
2
3
PC178
0.1u/50V_6
25
FB1
ENTRIP1
+5VPCU_FB
18
PQ58
AON7702
PR137
*4.7_6
ENC
LGATE2
1
PR130
0_4
17
PU9
RT8223P
VIN
PC81
PC79
PR131
*0_4
PC170
4.7u/25V_8
REF
13
PR133
15.4K/F_4
PC179
330u/6.3V_6X5.7
4.7u/6.3V_6
SYS_SHDN#
PL15
2.2uH_7X7X3
PC169
0.1u/50V_6
3
2
1
VREG3
VIN
PQ57
AON7410
+
PR132
*0_4
PR254
0_4
16
+5VPCU
5 Volt +/- 5%
TDC : 6.63A
PEAK : 8.5A
OCP : 9A
Width : 260mil
PC172
1u/6.3V_4
PR129
330K/F_4
VREG5
PR136
*100K/F_4
1
2
3
+5VPCU [30]
PC80
0.1u/25V_4
PR138
*SHORT_4
8223_EN
PC177
0.1u/50V_6
8223_VIN
PC175
4.7u/25V_8
10u/6.3V_8
1
PR134
10/F_8
+5VPCU
JP13
0.001/F_3720
VL
2
PR126
665K/F_4
JP16
0.001/F_3720
8223REF
VIN
+3VPCU
VIN
[32] SYS_HWPG
JP15
0.001/F_3720
PR257
107K/F_4
PR252
113K/F_4
10/31 Modify
OCP:8A
OCP:9A
PD4
DA3J101F0L
L(ripple current)
=(9-5)*5/(2.2u*0.4M*9)
=2.525A
Iocp=9-(2.525/2)=7.74A
Vth=7.74A*14mOhm=0.10832mV
R(Ilim)=(108.32mV*10)/10uA
~107K
PC75
0.1u/50V_6
PR255
0_6
PR124
0_6
1
PC78
0.1u/50V_6
L(ripple current)
=(9-3.3)*3.3/(2.2u*0.5M*9)
~1.9A
Iocp=9-(1.9/2)=8.05A
Vth=8.05A*14mOhm=112.7mV
R(Ilim)=(112.7mV*10)/10uA
=112.7K
3V_DL
PR250
0_6
2
PD3
DA3J101F0L
3
PC74
0.1u/50V_6
+15V_ALWP
+15V
PR127
22_8
PC73
0.1u/50V_6
+5VPCU
PR258
*1M_6
PR248
1M_6
PQ60
MDV1528Q
MAIND
3
2
1
PQ59
MDV1528Q
MAIND 4
PQ17
MDV1528Q
S5D
2
A
2
2
PQ54
AO3404
PQ27
2N7002K
+5V_S5
PQ29
2N7002K
PR153
1M_6
2
PQ28
DTC144EUA
S5_ON
[32,41]
+3VPCU
+3VPCU
PR152
22_8
S5D 4
A
+5VPCU
3
2
1
PR151
22_8
VIN
PR150
1M_6
+15V
+5V_S5
3
2
1
+3V_S5
VIN
PQ56
2N7002K
PC176
*2200p/50V_4
+5V
TDC : 2.63A
PEAK : 3.5A
Width : 120mil
TDC : 3.45A
PEAK : 4.6A
Width : 140mil
+3V
+3V_S5
TDC : 3.2A
PEAK : 4.27A
Width : 140mil
TDC : 1.28A
PEAK : 1.7A
Width : 60mil

PROJECT : ZQTA/ZQSA
Size
Date:
Document Number
Rev
1A
SYSTEM 5V/3V (RT8223P)

Sheet
1
34
of
44
+VCC_CORE
JP8
0.001/F_3720
+VIN_VCC_CORE
PR81
2.2/F_6
33
CBST1
PR201
0_6
PC51
4.7u/6.3V_6
1
2
PC122
2200p/50V_4
PC31
10u/6.3V_8
PC32
0.1u/10V_4
PC145
2200p/50V_4
PC155
100u/25V_6X5.8
51650_CDH2
51650_CDL2
PC134
*2200p/50V_4
51650_CCSP2
Close to the
VR side.
10/7 add
51650_CCSN2
PR203
0_6
PC126
*0.1u/25V_4
+3V
PC141
0.1u/10V_4
VCORE Load Line :

1.9mV/A
Close with
phase2 inductor
[5] VCC_AXG_SENSE
JP11
IV@0.001/F_3720
[5] VSS_AXG_SENSE
PC58
*0.01u/50V_4
PR247
IV@2.2/F_6
PC164
IV@1u/10V_4
PL13
IV@0.36uH
2
51650_CTHERM
PC142
*IV@0.1u/25V_4
10/31 Add
Close to the
VR side.
VR_SVID_CLK
PR198
100K/F_4
PR205
IV@100K/F_4_4250NTC
PR197
100K/F_4_4250NTC
51650_GCSN1
11/7 modify
Place NTC close to the
GFX_CORE Hot-Spot.
+VCC_CORE

VCORE Hot-Spot.
+VCC_GFX
[5]
PC138
*IV@0.1u/25V_4
PR273
DO@0_4
[5]
1
2
PC69
IV@330u/2V_7343
PC148
IV@10u/6.3V_8
PC60
IV@0.1u/10V_4
IV@17.8K/F_4
PR116
Close with
AXG inductor
IV@ for Internal VGA(+VCC_GFX enable)

DO@ for External VGA(+VCC_GFX disable discrete only)
5
+VCC_GFX
+
IV@0_4
3
51650_GTHERM
DCR=1.1mOhm
+VCC_GFX
TDC : 24A
PEAK : 33A
OCP : 35.8A
Width : 1320mil
GFX_CORE Load Line :

-3.9mV/A for GT2
PR112
IV@140K/F_4
VR_SVID_DATA
51650_GCSP1
PR78
15.8K/F_4
PC57
IV@27n/16V_4
51650_VRON
PQ52
IV@AON6780
10/7 add
PR238
PR239
IV@100K/F_4_4250NTCIV@28.7K/F_4
PR225
15.8K/F_4
VR_SVID_ALERT#
1
2
3
PC71
*IV@2200p/50V_4
PR84
*75/F_4
PR87
130/F_4
PR83
54.9/F_4
PC133
0.1u/10V_4
PR272
DO@0_4
PC70
PR122
IV@2200p/50V_6
IV@2.2_6
10
11
12
13
14
51650_CDL3
+3V
VIN
PC165
IV@4.7u/25V_8
1
2
PQ51
IV@AON6414AL
+5V_S5
Close to VR
PC167
IV@2200p/50V_4
51650_CDH3
51650_CSW3
8
7
6
5
9
PR117
DRVH
SW
VDD
DRVL
PAD
51650_VREF
BST
SKIP
PWM
GND
T1
T2
T3
T4
T5
51650_VREF
+1.05V
PC162
IV@4.7u/25V_8
4
51650_GSKIP#
51650_GPWM1
11/7 modify
PU8
IV@TPS51601DRBR
1
2
3
4
PC161
IV@4.7u/25V_8
PC163
IV@0.22u/25V_6
PC72
IV@0.1u/50V_6
Close to the
CPU side.
AXG
VCC_GT_VIN
51650_CBST3
PC147
IV@100p/50V_4
PR288
DO@0_4
1
2
3
PR287
DO@0_4
PR104
*10_4
11/7 modify
PR213
IV@5.62K/F_4
PR106
IV@0_4
+VCC_CORE
TDC : 53A
PEAK : 53A
OCP : 60A
Width : 2120mil
PR236
28.7K/F_4
PC125
*0.1u/25V_4
PC35
27n/16V_4
CPWM3
T16
PAD
T1
T2
T3
42
55
54
53
36
65
49
50
51
52
GPWM2
35
GPWM1
34
51650_GPWM1
GTHERM
32
51650_GTHERM
GCSN2
31
51650_GCSN2
GCSP2
30
51650_GCSP2
GCSP1
29
51650_GCSP1
GCSN1
PR108
*10_4
PGND
T6
T5
T4
PQ49
AON6780
+
PC50
330u/2V_7343
51650_CBST2
38
+VCC_CORE
39
PR235
100K/F_4_4250NTC
PR107
IV@0_4
28
PC56
*330p/50V_4
51650_GCSN1
VDIO
+VCC_GFX
B
CDH2
ALERT
GCOMP
VCLK
GGFB
20
GVFB
19
VR_SVID_DATA
27
VR_SVID_ALERT#
[5] VR_SVID_DATA
25
[5] VR_SVID_ALERT#
26
PC43
1u/6.3V_4
51650_GGFB
18
51650_GVFB
VR_SVID_CLK
[5] VR_SVID_CLK
51650_CSW2
DCR=1.1mOhm
PC54
10u/6.3V_8
CBST2
40
0_4
CSW2
VR_HOT
51650_CDL2
PL12
0.36uH
1
1
2
3
GPGOOD
41
PQ50
AON6414AL
51650_CSW2
PC52
0.1u/10V_4
21
H_PROCHOT#
51650_CDL1
PR96
23
CDL2
51650_CSW1
PR68
140K/F_4
CPGOOD
45
44
PR88
2.2_6
*0_4
CDL1
PC55
2200p/50V_6
17
PR98
CSW1
PU6
TPS51650RSLR
VR_ON
V3R3
16
[3,7] IMVP_PWRGD
0923
VIN
PC151
4.7u/25V_8
PC53
0.22u/25V_6
51650_CDH2
46
PC39
330u/2V_7343
0_4
3
PR186
28.7K/F_4
PR65
140K/F_4
PR185
100K/F_4_4250NTC
51650_CBST2
PR196
10_6
1
2
3
GSKIP
PR94
2.2/F_6
51650_V5DRV
51650_CDH1
51650_CBST1
+VCC_CORE
JP10
0.001/F_3720
GF-IMAX
15
51650_VRON
Parallel
PC146
100u/25V_6X5.8
+VIN_VCC_CORE-2
PC150
4.7u/25V_8
24
51650_VBAT
51650_V5
PC131
2.2u/6.3V_4
51650_CTHERM
1
61
60
59
CTHERM
T12
T11
T10
SLEW
58
57
56
37
48
62
63
64
43
47
PR101
10K/F_4
51650_CCSP1
4
PC129
0.1u/10V_4
51650_CCSN1
5
CCSP1
51650_CCSN2
6
CCSN1
51650_CCSP2
7
CCSP2
51650_CCSP3
8
CCSN2
51650_CCSN3
CCSP3
51650_CCOMP
9
CCSN3
51650_CVFB
10
CCOMP
51650_CGFB
12
11
CVFB
VREF
GOCP-R
0_4
PC135
43p/50V_4
Close with
phase1 inductor
22
CF-IMAX
T9
T8
T7
VBAT
V5
T13
T14
T15
V5DRV
CDH1
PC128
*0.1u/25V_4
+5V_S5
PC34
27n/16V_4
PR193
PC127
13
51650_SLEW
+VIN_VCC_CORE-2
PC159
0.1u/50V_6
PR200
*100K/F_4
PR97
1.91K/F_4
PR202
1.91K/F_4
51650_GOCP-R
51650_GSKIP#
COCP-R
CGFB
14
+3V_S5
51650_GF-IMAX
PR89
*499/F_4
10.7K/F_4
47p/50V_4
PR194
39.2K/F_4
PR195
56.2K/F_4
PR192
24K/F_4
PR199
IV@75K/F_4
PR208
IV@30.1K/F_4
PR191
90.9K/F_4
PR80
IV@4.7K/F_4
PR209
*22.6K/F_4
PR214
IV@200K/F_4
PR226
*0_4
PR217
IV@100K/F_4
PR204
20K/F_4
11/7 modify
51650_CF-IMAX
[3,32]
51650_CCSN1
+3V_S5
PR82
10/7 add
51650_VREF
VRON
PC130
*0.1u/25V_4
Close to the
VR side.
1013
51650_COCP-R
PC44
1u/6.3V_4
+3V
51650_CCSP1
PR61
PC132
*2200p/50V_4
51650_VREF
51650_VREF
11/7 modify
PQ44
AON6780
17.8K/F_4
1
2
3
PC42
2200p/50V_6
PR60
51650_CDL1
51650_VREF
+1.05V
VIN
DCR=1.1mOhm
PR71
2.2_6
PC38
*0.01u/50V_4
Close to the
CPU side.
[32]
PL11
0.36uH
51650_CSW1
PR69
*10_4
Check pull up resister to

1.05V for H_PROCHOT#
PC123
4.7u/25V_8
1
2
PQ40
AON6414AL
17.8K/F_4
0_4
PR95
PR73
PC124
4.7u/25V_8
[5] VSS_SENSE
PC49
0.22u/25V_6
51650_CDH1
PC121
0.1u/50V_6
0_4
1
2
3
PR74
Parallel
[5] VCC_SENSE
51650_CBST1
PC36
*330p/50V_4
PR75
*10_4

PROJECT : ZQTA/ZQSA
Size
Document Number
Date:
Rev
1A
+VCC_CORE/+VGFX (TPS51650)
Sheet
1
35
of
44
JP2
0.001_3720
VIN
PC113
2200p/50V_4
V5
17
12
51219_SW
DL
10
51219_DL
51219_VSNS
51219_GSNS
51219_REFIN
COMP
GND
PC15
0.01u/16V_4
PR43
*4.7_6
PQ35
RJK03K5DPA
PR39
*100_4
+
PC117
560u/2.5V_6X5.7
PC116
0.1u/50V_6
PC19
*680p/50V_6
PR35
10_4
PR167
0_4
1n/50V_4
PC14
PR30
10_4
1n/50V_4
PR175
*11K/F_4
0.001/F_7520
PR173
0_6
PC12
PR169
0_4
Close to output cap

2
PR31
*10K/F_4
0.01u/25V_4
OCP=18A
L ripple current
=(19-1.05)*1.5/(0.68u*500k*19)
=2.918A
Vtrip=20-(2.918/2)*4.3mohm
=0.07972V
Rlimit = 0.07972/10uA*8=63.78Kohm
PC108
0.1u/10V_4
+1.05V
JP7
RDSon 3.9mOhm
PC13
+3V_S5
PQ36
RJK03J6DPA
PL8
0.68uH_7X7X3
13
VREF=2V
51219_REF
PC20
0.1u/25V_6
SW
VREF
1
PR176
64.9K/F_4
PR42
2_6
BST
PGND
VSNS
TRIP
11
1
2
3
PAD
18
PAD
19
PAD
20
PAD
21
MODE
PR178
1K/F_4
PU3
TPS51219RTER
51219_TRIP 6
PC17
1u/6.3V_4
+1.05V
1.05 Volt +/- 2%
TDC : 13.2A
PEAK : 17A
OCP : 20A
Width : 680mil
EN
51219_MODE 15
PC110
*0.1u/10V_4
PC115
4.7u/25V_8
1
2
3
14
51219_V5
GSNS
PR181
0_4
MAINON
51219_EN
51219_DH
DH
REFIN
[30,32,37,40,41]
PGOOD
16
[32,38] HWPG_VTT
PAD
PAD
22
PR177
10_6
PR180
100K_4
PC22
4.7u/25V_8
+5V_S5
+3V
VTT_VCCP_SENSE [5]
VTT_VSSP_SENSE [5]
PR168
0_4
RC filter is for improve

Jitter performance.
PR170
*100_4
+3VPCU
+1.05V
+3V_S5
VIN
+5V_S5
+3V
+5VPCU
[8,22,25,30,31,32,33,34,41,42]
[3,5,7,8,9,11,22,32,35,40,41]
[3,7,8,9,10,11,15,28,30,31,34,35,41,42]
[22,33,34,35,37,38,39,40,41,42,43]
[11,26,30,34,35,37,38,39]
[3,7,8,9,10,11,13,14,19,22,23,24,25,26,27,28,31,32,34,35,37,38,39,40,41]
[30,34]

PROJECT : ZQTA/ZQSA
Size
Document Number
Rev
1A
+1.05V (TPS51219)
Date:
5
Sheet
1
36
of
44
TDC : 0.75A
PEAK : 1A
Width : 40mil
TDC : 0.38A
PEAK : 0.5A
Width : 20mil
+0.75V_DDR_VTT
+0.75V_DDR_VTT [13,14,41]
PC85
10u/6.3V_8
PC86
10u/6.3V_8
D
+SMDDR_VREF
Close to IC
PC182
0.22u/10V_4
Greater than or equal 40mil

+5V_S5
+3V
[32] HWPG_VDDR
20
PGOOD
17
S3
PC87
1u/10V_4
51216_VIN
V5IN
12
51216_V5IN
DRVH
14
VBST
15
51216_DRVH
PR263
2_6
51216_VBST
SW
13
VREF=1.8V
+1.5VSUS [4,5,11,13,14,40]
PC188
2200p/50V_4
1
2
3
PC186
0.1u/50V_6
PC193
4.7u/25V_8
JP17
0.001/F_7520
PQ62
RJK03J6DPA
DRVL
11
PGND
10
51216_SW
+1.5VSUS_SRC
+1.5VSUS
PL16
0.68uH_7X7X3
51216_DRVL
+1.5V_SUS
1.5 Volt +/- 5%
TDC : 14.67A
PEAK : 18A
OCP : 20A
Width : 600mil
PR266
*4.7_6
4
1
2
3
GND
PAD
PAD
26
23
TRIP
24
18
PAD
MODE
PAD
51216_TRIP
PU10
TPS51216RUKR
25
51216_MODE 19
S5
REF
PR262
60.4K/F_4
16
VDDQSNS
PR261
200K/F_4
0_4
51216_S5
+0.75V_ON
SUSON
REFIN
[32]
[32]
51216_S3
PR267
*0_4
PR286
PR268
0_4
VIN
PC194
4.7u/25V_8
[30,32,36,40,41] MAINON
VLDOIN
3
VTT
1
VTTSNS
4
VTTGND
21
5
VTTREF
PAD
PR265
100K/F_4
PAD
22
JP18
0.001_3720
PC184
10u/6.3V_8
PQ61
RJK03K5DPA
+
PC180
560u/2.5V_6X5.7
PC185
*680p/50V_6
PC195
0.1u/50V_6
51216_REFIN
51216_REF
PC183
0.1u/10V_4
51216_S3
PR264
*0_4
51216_S5
PR259
0_6
RDSon=3.9mohm
PR140
10K/F_4
Close to output cap
+1.5VSUS
PR260
51K/F_4
PC181
0.01u/25V_4
+1.5V
+5V_S5
[11,24,41]
[11,26,30,34,35,36,38,39]
TDC : 0.38A
PEAK : 0.5A
Width : 20mil
[5,34,41] MAIND
+SMDDR_VREF [5,13,14]
PQ18
AO3404
+1.5V
OCP=20A
L ripple current
=(19-1.5)*1.5/(0.68u*400k*19)
=5.079A
Vtrip=20-(5.079/2)*4.3mohm
=0.07508V
Rlimit=0.07508/10uA*8=60.063Kohm
S3
S5
+1.5VSUS
REF
VTT
S0
ON
ON
ON
S3 (mainon off)
ON
ON
OFF
S4/S5
OFF
OFF
OFF

PROJECT : ZQTA/ZQSA
Size
Rev
1A
DDR 1.5V(TPS51216)
Date:
Document Number
Sheet
1
37
of
44
G1
+VCCSA
0.9V
0.8V
0.725V
0.675V
G0
+3V
+5V_S5
JP1
0.001/F_3720
default 0.9V
VSA_VIN
VIN
+VCCSA
TDC : 4.5A
PEAK : 6A
OCP : 7A
Width : 180mil
PR37
10_6
VSA_VCC
PR34
*100K_4
PQ37
AON7410
PC16
1u/6.3V_4
PC112
2200p/50V_6
PC23
4.7u/25V_8
3
2
1
VSA_DH
PR174
0_4
VSA_EN
VSA_CS 11
PHASE
VSA_LX
LGATE
VSA_DL
VCCSA_VID0
[5]
VCCSA_VID1
PL7
2.2uH_7X7X3
VSA_SRC
+VCCSA [5]
JP6
0.001/F_3720
12
PR44
*4.7_6
+
PC111
0.1u/50V_6
4
PQ34
AON7702
[5]
+VCCSA
PC18
0.1u/25V_6
VSA_BST1
3
2
1
PAD
FB
GND
13
0_6
PR179
71.5K/F_4
G1
PR171
CS
10
0_6
PU4
RT8241DZ
G0
PR172
PC109
*0.1u/10V_4
EN
[32,36] HWPG_VTT
PR41
3.3_6
UGATE
BOOST
PGOOD
VCC
[32] HWPG_VCCSA
PC114
560u/2.5V_6X5.7
PC21
*680p/50V_6
Close to output cap
VSA_FB
[5] VCCSA_SENSE
PR38
0_4
PR40
100_4
PR33
1K_4
PR32
1K_4
OCP=7A
Iripple=(19-0.9)*0.9/(2.2u*300K*19)
=1.299A
Rth=14mohm*8*(7-0.65)/10uA
=71.125K
Ipeak=8.299A

PROJECT : ZQTA/ZQSA
Size
Document Number
Rev
1A
VCCSA(RT8241DZ)
Date:
5
Sheet
1
38
of
44
1013
+3V_GFX
default 1.1V
H_VID0
PR207
*EV@10K/F_4
PR212
*EV@10K/F_4
PR221
GL@10K/F_4
VID5 VID4 VID3 VID2 VID1 VID0
H_VID1
H_VID2
H_VID3
D
PR223
GL@10K/F_4
PR228
GSS@10K/F_4
H_VID4
N13P-GL QS
N13P-GS QS
N13M-GS ES
0
D
H_VID5
CSN2
51728_CSN2
H_VID0
20
VID0
H_VID1
19
VID1
DRVH1
21
51728_DRVH1
51728_CSN2
H_VID2
18
VID2
VBST1
22
51728_VBST1
PC66
*EV@0.1u/25V_4
H_VID3
17
VID3
LL1
23
51728_LL1
H_VID4
16
VID4
DRVL1
24
51728_DRVL1
H_VID5
15
VID5
CSP1
51728_CSP1
H_VID6
14
VID6
CSN1
PU7
EV@TPS51728RHAR
51728_CSN1
PR118
EV@0_4
PR243
EV@100_4
38 51728_V5FILT
PC153
EV@2.2u/10V_6
51728_IMON
51728_VFB
[15] GPUVCC_SENSE
51728_DRVL1 4
PR244
EV@0_8
PC157
PQ45
EV@AON6780
PQ16
*EV@AON6780
51728_CSP1
PC68
*EV@0.1u/25V_4
10/7 add
PR121
EV@0_4
1
2
PC139
EV@2200p/50V_4
PC140
EV@4.7u/25V_8
PC149
EV@4.7u/25V_8
Close to the
VR side.
51728_GFB
[15] GPUVSS_SENSE
PR115
PC61
EV@11.3K/F_4 EV@3300p/50V_4
PR120
EV@100_4
PC67
*EV@0.1u/25V_4
PC29
EV@10u/6.3V_8
PC46
EV@4.7u/25V_8
PL9
EV@0.36uH
2
DCR=1.1mOhm
PC154
EV@100u/25V_6X5.8
PC45
EV@2200p/50V_4
PC143
EV@4.7u/25V_8
+VGACORE [19,31]
+VGACORE
+
PC27
EV@10u/6.3V_8
PQ48
EV@AON6414AL
51728_LL1
PC25
EV@0.1u/10V_4
PU
V5FILT
PR211
*EV@10K/F_4
PR64
51728_DRVH1
PR67
THRM
+VGACORE
32 51728_OSRSEL
SLEW
PR240
EV@100K/F_4_3540NTC

GPU Hot-Spot.
OSRSEL
PC48
EV@0.22u/25V_6
PC120
EV@330u/2V_7343
PR245
EV@200K/F_4
9
PR241
EV@11.8K/F_4
51728_TONSEL
31 51728_TRIPSEL
VIN
51728_VBST1
3
EV@17.8K/F_4
4
EV@0_4
PR233
IMON
PR105
EV@0_4
TRIPSEL
41
57
2
56
55
PR102
*EV@0_4
GFB
PR229
*EV@0_4
36 51728_TONSEL
VREF
PR110
EV@113K/F_4
51728_SLEW 37
*EV@316K/F_4
TONSEL
PR86
EV@2.2/F_6
PR77
EV@2.2_6
PC63
EV@0.22u/10V_6
PR113
EV@8.2K/F_4
51728_VREF 40
PR90
*EV@0_4
PR216
EV@0_4
PC62
EV@1200p/50V_4
+3V
11/9 Del
DROOP
51728_V5FILT
+VGPU_CORE (N13P-GS)
Countinue current:50A
Peak current:55A
OCP minimum 60A
Loadline=0mV/A
+3V
PC40
EV@2200p/50V_4
PGND
39
25
PR189
EV@27.4K/F_4
51728_DROOP
EV@68p/50V_4
PC119
EV@330u/2V_7343
PR183
EV@100K/F_4_3540NTC
PC41
EV@0.1u/50V_6
EV@0_4
EV@0.022u/25V_4
PR111
PC156
[18] GPU_VID5
EV@0.022u/25V_4
EV@0_4
1
2
3
EV@0_4
PR109
PR103
[18] GPU_VID4
[18] GPU_VID3
1
2
3
EV@0_4
PC137
*EV@2200p/50V_4
PR100
10/7 add
EV@0_4
[18] GPU_VID2
PC65
*EV@0.1u/25V_4
Close to the
VR side.
PR215
EV@0_4
PC152
EV@0.1u/50V_6
THAL
PR210
*EV@0_4
EV@0_4
PR93
51728_CSP2
10
*EV@0_4
PR91
[18] GPU_VID1
PC59
1
2
3
51728_DRVL2
DRVL2
PwPd
T16
GND
T15
T14
0929
[18] GPU_VID0
1
2
3
27
CSP2
SLP
+VGACORE
51728_CSP2
EN
EV@0_4
PR222
51728_SLP 12
EV@100K/F_4
51728_EN 35
PR224
11
PR227
[10,40] dGPU_VRON
11/9 Del
PC160
EV@100u/25V_6X5.8
+
PC24
EV@0.1u/10V_4
51728_LL2
EV@17.8K/F_4
28
PCNT
EV@0_4
51728_VBST2
LL2
51728_PCNT 13
PR63
51728_DRVH2
29
PR66
30
VBST2
PL10
EV@0.36uH DCR=1.1mOhm
2
PR246
EV@200K/F_4
DRVH2
PG
PC37
PR72
EV@2200p/50V_4EV@2.2_6
PGD
34
PQ15
*EV@AON6780
PR184
EV@27.4K/F_4
33
EV@2.2K_4
PQ46
EV@AON6780
PC136
*EV@2200p/50V_4
*EV@100K/F_4
4
1
2
3
48
49
50
51
52
53
54
26
47
46
45
44
43
42
PR242
VFB
PR237
T7
T8
T9
T10
T11
T12
T13
V5IN
T6
T5
T4
T3
T2
T1
[18] GPU_DPRSLPVR
51728_DRVL24
VGA_PG
PQ47
EV@AON6414AL
51728_LL2
EV@100K/F_4
PR114
4
PR206
*EV@10K/F_4
1
2
3
EV@56_4
PR119
+5V_S5
*EV@10K/F_4
EV@100K/F_4
PR92
PC47
EV@0.22u/25V_6
51728_DRVH2
PC144
EV@2.2u/10V_6
[40]
VIN
51728_VBST2
PR99
EV@10K/F_4
EV@10K/F_4
PR85
EV@2.2/F_6
+3V
PR220
PR219
PR218 GSS@10K/F_4
GL@10K/F_4
PR231 GSS@10K/F_4
PR232
*EV@10K/F_4
EV@10K/F_4
PR230
PR234
51728_CSN1
Close to the
GPU side.
PC158
EV@1n/50V_4
PR188
EV@100K/F_4_3540NTC
PC64
EV@1n/50V_4
PROJECT : ZQTA/ZQSA
Size
Document Number
Date:
Rev
1A
VGPU Core (TPS51728)

5
Sheet
1
39
of
44
4
VIN
PR50
EV@1M_4
PR48
*EV@0_4
PR49
EV@22_8
PR56
EV@1M_4
MAINON
dGPU_D
3
2
PQ9
EV@AO3404
1
2
PQ7
EV@2N7002K
PQ6
EV@PDTC143TT
PQ8
EV@2N7002K
PR46
EV@100K_4
VIN
+3V_GFX
PC26
*EV@2200p/50V_4
+1.5V_GFX
+1.5VSUS
+15V
PR57
EV@1M_4
VGA_PG
dGPU_D1
1
2
3
2
PQ12
EV@2N7002K
PQ10
EV@PDTC143TT
PQ11
EV@2N7002K
PC28
EV@1u/10V_4
PR55
EV@100K_4
1006
PQ13
EV@AOL1718
+1.5V_GFX
1006
PC30
*EV@2200p/50V_4
PR54
EV@1M_4
PR52
*EV@0_4
[10,39] dGPU_VRON
TDC : 5.67A
PEAK : 7.56A
Width : 240mil
[39]
PR58
EV@22_8
PR53
EV@1M_4
PR51
EV@0_4
PR45
EV@1M_4
[9] dGPU_PWR_EN
TDC : 1.04A
PEAK : 1.38A
Width : 50mil
PR47
EV@0_4
+3V
+15V
[30,32,36,37,41]
+3V_GFX
+1.05V_GFX
PR15
EV@1M_4
+1.05V
+15V
PR36
EV@22_8
VIN
PR182
EV@1M_4
+1.5V_GFX
3
PR9
EV@100K_4
PQ2
EV@PDTC143TT
2
PQ5
EV@2N7002K
PQ39
EV@2N7002K
PC118
*EV@2200p/50V_4
PQ38
EV@MDV1660
+1.05V_GFX
PR14
EV@1M_4
PR16
EV@0_4
3
2
1
dGPU_D2
TDC : 3.5A
PEAK : 5A
Width : 120mil

PROJECT : ZQTA/ZQSA
Size
Document Number
Rev
1A
GPU_PWR
Date:
5
Sheet
1
40
of
44
+1.8V
+3VPCU
PC190
0.1u/25V_4
PU11
MAINON
54418-1_VFB
PC89
1000p/50V_4
PR271
10K/F_4
PH
10
VIN
PH
11
VIN
PH
12
15
EN
BOOT
13
VSNS
PW RGD
COMP
GND
RT/CLK
GND
SS
AGND
PR270
121K/F_4
PC192
*100p/50V_4
PL1
1uH_7X7X3
+1.8V
1.8 Volt +/- 5%
TDC : 1.61A
PEAK : 2A
Width : 60mil
D
PR269
0_6
PC189
0.1u/50V_6
14
PR157
100K/F_4
R1
HWPG_1.8V [32]
PR155
*100K/F_4
+3V_S5
22
21
20
19
18
17
PR154
*100K/F_4
VIN
PAD
PAD
PAD
PAD
PAD
PAD
JP5
0.001/F_3720
TPS54318RTER
16
PC187
10u/6.3V_8
[30,32,36,37,40]
PC88
0.1u/25V_4
PC191
0.01u/25V_4
PC90
10u/6.3V_8
PC91
10u/6.3V_8
54418-1_VFB
V0=0.8*(R1+R2)/R2
PC196
1200p/50V_4
PR156
78.7K/F_4
R2
VIN
PD7
DA2J10100L
PR190
1M_6
Thermal protection
PQ41
AO3409
[32,34]
S5_ON 2
S5_ON
PR59
0_6
PQ42
DTC144EUA
VIN
+3V
VL
+0.75V_DDR_VTT
+5V
+1.5V
+1.05V
+1.8V
+15V
VL
SYS_SHDN#
[3,34]
PR143
1M_4
PR146
22_8
PR145
22_8
PR148
22_8
PR147
22_8
PR144
22_8
PR149
22_8
PR139
1M_4
PR62
200K_6
[5,34,37]
MAIND
PQ21
2N7002K
PQ25
2N7002K
PQ24
2N7002K
PQ20
2N7002K
PQ26
2N7002K
PC84
*2200p/50V_4
PQ23
2N7002K
2
PQ22
2N7002K
PR141
*100K/F_6
PR142
1M_4
PC33
0.1u/50V_6
PQ19
DTC144EUA
PQ14
2N7002K
PU5A
BA10393F
MAINON
MAIND
2.469V
3
S5_ON
MAINON_ON_G
[3,5] MAINON_ON_G
PC166
0.1u/50V_6
PR76
200K/F_4
PR70
1.74K/F_4
PR187
10K_6_NTC
2
PR79
200K/F_4
PQ43
2N7002K
[13,14,37] +0.75V_DDR_VTT
7
PU5B
BA10393F

PROJECT : ZQTA/ZQSA
For EC control thermal protection (output 3.3V)
Size
Document Number
Date:
Rev
1A
+1.8V/Discharge/Thermal
5
Sheet
1
41
of
44
+3VPCU
D
PC198
BA@0.1u/25V_6
PU12
[32]
M_PON
PC200
BA@1000p/50V_4
1.05M_FB
PR277
BA@2.49K/F_4
VIN
VIN
2
15
6
BA@TPS54318RTER
PH 10
PH
11
VIN
PH
12
EN
BOOT
13
PWRGD
14
VSNS
COMP
GND
RT/CLK
GND
SS
AGND
PR278
BA@182K/F_4
PAD
PAD
PAD
PAD
PAD
PAD
PR274
BA@0_4
16
PR275
+1.05V_M
BA@0_6
PC199
BA@0.1u/50V_6
PR276
R1
BA@24.9K/F_4
PC202
PC201
BA@10u/6.3V_8
BA@0.1u/10V_4
1.05M_FB
T44
PR279
BA@100K/F_4
PR280
BA@78.7K/F_4R2
+3V_S5
PC205
BA@0.01u/25V_4
PC203
PC204
*BA@100P/50V_4 BA@2700p/50V_4
PL17
BA@1uH_5X5X3
22
21
20
19
18
17
PC197
BA@10u/6.3V_8
+1.05V_M
1.05Volt +/- 5%
TDC : 0.8A
PEAK : 1.1A
Width : 40mil
V0=0.8*(R1+R2)/R2
11/7 modify
+3V_M
PR281
BA@1M_4
+3VPCU
+15V
PR282
BA@22_8
PR283
BA@1M_4
VIN
PR284
BA@1M_4
2
PQ65
BA@2N7002K
PQ66
BA@2N7002K
PC206
*BA@2.2n/50V_4
+3V_M
PR285
PQ64
*BA@100K_4 BA@DTC144EUA
TDC : 0.09A
PEAK : 0.1A
PQ63
Width : 10mil
BA@AO3404
M_PON
1
[32]
SUSD

PROJECT : ZQTA/ZQSA
Size
Document Number
Rev
1A
+1.05V_M/+3V_M
Date:
5
Sheet
1
42
of
44
4
HOLE1
*HG-C315D110P2
7
6
8
5
9
4
HOLE17
H-C256D161PT
HOLE3
H-TC315BC256D161P2
HOLE16
*H-C236D165P2
HOLE22
H-C224D123P2
HOLE9
*H-TC433BC315D110P2
HOLE21
H-C236D65PT
HOLE4
*O-ZQS-1
1
2
3
HOLE2
*HG-C315D110P2
7
6
8
5
9
4
HOLE6
*HG-C315D110P2
7
6
8
5
9
4
HOLE19
*H-C236D165P2
HOLE20
H-C224D123P2
HOLE15
H-C256D161PT
HOLE8
*ZQS-HOLE1
HOLE18
*H-C236D165P2
1
2
3
HOLE13
*HG-C315D110P2
7
6
8
5
9
4
1
2
3
HOLE12
*ZQS-HOLE2
7
6
8
5
9
4
1
2
3
1
2
3
HOLE5
*HG-C315D110P2
7
6
8
5
9
4
1
2
3
HOLE11
*hg-tc256bc315d110p2
7
6
8
5
9
4
1
2
3
HOLE14
*HG-C315D110P2
7
6
8
5
9
4
1
2
3
HOLE7
*HG-C315D110P2
7
6
8
5
9
4
HOLE10
H-C217D106PT
1
2
3
+ROH
VIN
VIN
C60
0.1u/25V_4
VIN
VIN
C365
0.1u/25V_4
VIN
C681
0.1u/25V_4
VIN
C438
0.1u/25V_4
VIN
VIN
C678
0.1u/25V_4
VIN
C679
0.1u/25V_4
C680
0.1u/25V_4
VIN
C682
0.1u/25V_4
C683
0.1u/25V_4
C684
0.1u/25V_4

PROJECT : ZQTA/ZQSA
Size
Document Number
Rev
1A
Hole
Date:
5

1
Sheet
43
of
44
CHANGE LIST
Model
date
ZASA/ZSQTA
D
9/26
page3 : add R511,R525,R527,R528,R529 for Discrete Only &PCH_JTAG_TDO net change pull-up from +3V_S5 to +1.05 rail
9/27
Update power circuit
9/30
Page18 : add Q3508 for U7 GPU_THERMAL_ALERT net
Page19 : add C3777,C3778
Page31 : Del CN1

Page18 : add dGPU_ACDC# net to U7 GPIO04 & add R347
10/3
Page22 : add R557,R554 to pull-down & R548,R547 stuff for Discrete only
Page25 : add R3693,C116 for ODD zero power circuit
10/4
Page31 : CN8 add board id3 & board id4 net for touch pad ID control
Page31 : CN8.2,CN8.3 add CLK_SDATA & CLK_SCLK net for touch pad & add R278,R279
Page15 : U41 Power rail change to +3V_GFX
10/5
Page24 : Del Q16 no't support wake up function

Page18 : add Q3509 for dGPU_ACDC# net
Page31 : add L35,R3694,R3695 for touch pad 5V & 3V option & add R297,R295 Fan PWR option
Page17 : IFPAB_PLLVDD rail change from +1.8V_GFX to +3V_GFX
10/6
Page27 : U6 change footprint

Page39 : PWR engineer add PQ3006,PQ3005
Page40 : PWR engineer Del PR193,PQ51,PQ54
Page16 :add C3779,C3780
10/7
Page29 :add C542,C530 for EMI solution & C544 change to 4.7u 0603 type
Page35 :PWR engineer add PC3037,PC3038,PC3039
Page35 :PWR engineer add PC3035,PC3036
Page8 :add R376,R381,R393,R407,R421,R434 for Dual SPI ROM
Page9 :U13 power rail change to +3V
Page10 :SV_DET_NC net add R250 to pull-down
10/11
Page27 :add R133,R235

Page30 :C443 change to 3528 type & add C366,R340
Page31 :CN2.27 pin change to +VGACORE
Page32 :add R330,R328 pull-up +3VPCU for GPUT_CLK,GPUT_DATA net

Page20 :add C3781,C3782,R3569,R3570,R3571,R3576
Page21 :add C3783,C3784,R3577,R3578,R3579,R3581
10/14

PROJECT : ZQTA/ZQSA
Size
Document Number
Date:
Rev
1A
Change list
Sheet
PROJECT MODEL :
DOC NO.
44
of
ZQTA/ZQSA
PART NUMBER:
APPROVED BY:
DATE:
DRAWING BY:
REVISON:
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Acer ZQTA ZQSA Free Laptop Schematic

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Acer ZQTA ZQSA Free Laptop Schematic

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http://hobi-elektronika.

Dual Channel DDR III

CRT Con. P22

P7, 8, 9, 10, 11, 12

Optimus : IV@ + EV@ + OP@

Quanta Computer Inc.

Friday, November 11, 2011

VGA power up sequence

CHARGE PUMP POWER

PCH/GPU/Peripheral component POWER

CPU/SODIMM CORE POWER

SODIMM Termination POWER

Internal GPU POWER

MINI CARD/NEW CARD POWER

PCH CORE POWER/IVY/SNB bridge VCCIO

CPU CORE POWER

Thermal Follow Chart

Quanta Computer Inc.

Friday, November 11, 2011

PWR Status & GPU PWR CRL & THRM

For Sandy Bridge processor only implementation:

CRB 1.0 : SM_RCOMP[2..0] W:20mils, S:15mils, L 500mils

CRB 1.0 : change to +3V(S0)

FDI Disabling (Discrete Only)

Intel recommended UNCOREPWRGOOD

apply C5205 for nosie

wo eDP and dGPU

PEG_COMP connect to PIN H22&J22 W:4mils/S:15mils/L: 500mils.

JTAG & BPM

PCI EXPRESS* - GRAPHICS

IVY Bridge Processor (CLK,MISC,JTAG)

For IVY/Sandy processor compatibility:

IVY Bridge Processor (DMI,PEG,FDI)

DP & PEG Compensation

Routed within 500 mils

FDI_FSYNC can gang

Routed within 25 mils

PEG_ICOMPI and RCOMPO signals should

eDP_COMPIO and ICOMPO signals should

PEG_ICOMPO signals should

Quanta Computer Inc.

Friday, November 11, 2011

IVY Bridge 1/4

IVY Bridge Processor (DDR3)

DDR SYSTEM MEMORY A

DDR SYSTEM MEMORY B

Quanta Computer Inc.

IVY Bridge 2/4

Friday, November 11, 2011

22u/6.3V_8 22u/6.3V_8 22u/6.3V_8 22u/6.3V_8

22u/6.3V_8 22u/6.3V_8 22u/6.3V_8

10u/6.3V_8 10u/6.3V_8 10u/6.3V_8 10u/6.3V_8 10u/6.3V_8

10u/6.3V_8 10u/6.3V_8 10u/6.3V_8 10u/6.3V_8

PEG AND DDR

Voltage selection for VCCIO:

Layout note: need routing

0929 change value by CRB

Place PU resistor close to CPU

Remove PU resistor 130/F,

Trace Route to Power IC area.

IVY Bridge Processor (GRAPHIC POWER)

IVY 45W:TDC 52A

CPU Core Power

IVY 45W:TDC 38A