IES COLLEGE OF TECHNOLOGY, BHOPAL

B.E. (3th SEM) PUT EXAMINATION DEC-2015

Branch: EC
Max./Min. Marks:70/22

Subject: CSO (EC-302)

Time: 2:30 Hrs
Unit - I

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Explain the data transfer between register and memory.(RGPV Dec 2014)
Differentiate the program counter and accumulator.(RGPV May 2006)
Draw the Von Newman Architecture and write its components.(RGPV May 2009)
What are the different addressing modes? Explain each with example.(RGPV May 2009)
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What is instruction cycle? Explain different phases of instruction cycle and show flow chart for
instruction cycle. (RGPV Dec 2014)
Unit - II
What is meant by Hardwired control? .(RGPV Dec 2014)
Explain 2s complement method of subtraction of any two binary numbers. .(RGPV Dec 2014)
Compare horizontal and vertical Microprogramming control unit design. (RGPV June 2013)
A 16bit microinstruction supports 16 conditions and stored in 128 word control memory. What will be
the number of control signals generated in horizontal and vertical microprogramming?
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Explain the difference between Hardwired and Micro programmed control unit design.
Unit - III
What do you mean by programmed I/O? (RGPV Dec 2014)
Explain the drawbacks in programmed I/O and Interrupt driven I/O? (RGPV Dec 2014)
Draw and explain typical block diagram of DMA? (RGPV June 2013)
How is interrupt I/O better than programmed I/O?
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What is an assembly language programming? Write any one program in assembly and explain it?
Unit - IV
What is the difference between RAM and ROM? (RGPV May 2009)
How many memory chips of 256 X 16 are needed to provide a memory capacity of 4096 X 16.(RGPV
Dec 2006)
What are the various mapping methods used with cache memory? Explain any one method in detail.
(RGPV May 2007)
The following page reference changes occur during a given time interval:
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Assume that main memory consists of four frames. Determine the number
of page faults using the FIFO page replacement algorithm.(RGPV May 2009)
Unit - IV
Define the instruction pipelining.(RGPV Dec 2005)
What do you mean by loosely coupled and tightly coupled multiprocessor architecture?
Explain Flynns Classification with diagram. (RGPV May 2004)
What is difference between array processor and vector processor? (RGPV June 2014)
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Explain the instruction pipelining hazards with example?

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