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1

01

ZE6 Block Diagram


A

667 MT/s

DDRIII-SODIMM
P3

Pineview

CPU
P4,5,6,7

Graphics Interfaces

DDR SYSTEM MEMORY

CK505
P2

10.1 "Panel

INT_LVDS

Up to 1280*800 or 1366*768

P14

CRT

CRT

DMI

P14

N570 1.66G: AJSLBXEVT05


N475 1.83G: AJSLBX5UT08
N455 1.66G: AJSLBX9VT05

Charger

DMI(x2)

SATA - HDD

SATA 0

DMI
PCIE-4

SATA

P19

USB-5

SIM Card

3G/WiMAX
P20

PCI-Express(Port1~4)

PCIE-2

Tigerpoint
USB port*3
CCD

WLAN

SB

PCIE-1

LAN

PCIE-3

P31

Card Reader

P11

RTS5209-GRP21

Intel High Definition Audio

+1.5V
Discharge
VCCGFX

IHDA

P20

+1.05V

PN : AJSLGXX0T14

USB-5

USB-7

P29

+1.5VSUS
+SMDDR_VREF
+0.75V_DDR_VTT
+1.5V
P30

USB-6

P20

P28

VCC_CORE

RTL8105TAP18

RTC

BATTERY

PCI-E

P8,9,10,11,12,13

USB-2
P14

P15

3G

WLAN/WiMAX
P20

USB

P17

Bluetooth module

USB-7

USB 2.0 (Port0~7)

USB-0,1,3

P20

USB-4

P27

+3VPCU
+5VPCU
+3V_S5
+5V_S5
+3VSUS
+3V
+5V

LPC

P32

LPC

Audio Codec Realtek ALC271X

EC

P16

NPCE791L

P22

Int. SPK
CONN

Int. AMIC
CONN

MIC
Jack

Combo
Jack

Touch Pad /B
Con.

K/B Con.
P15

SPI Flash

P15

P22

Charger
P24

Quanta Computer Inc.


PROJECT : ZE6
Size

Document Number

Date:

Friday, March 11, 2011

Rev
1B

Block Diagram
1

Sheet

1
8

of

35

CLK GEN (CLK)

02
VDD_CLK_3.3V

+3V

+1.5V

VDD_CLK_1.5V
R212
1

2.2/J_6
2

+3V

L22
PBY160808T-301Y-N/2A/300ohm_6

L20
C191

PBY160808T-301Y-N/2A/300ohm_6
D

.1U/10V_4

Place close to L8
C185

C188

C157

C163

.1U/10V_4

.1U/10V_4

.1U/10V_4

VDD_IO can be ranging


from 1.05V to 3.3V.
+1.05V
VDD_CLKIO_1.05V
0_6
L21
PBY160808T-301Y-N/2A/300ohm_6

C154
33P/50V_4

C178

C145

C162

C171

4.7U/10V/8

.1U/10V_4

.1U/10V_4

.1U/10V_4

CL=20p

[3,20] SMBDT1
[3,20] SMBCK1

Y2

CLK_BSEL1_FSB R217

VDD_PCI_3.3

VDD_CORE_1.5

45

14

VDD_48M_3.3
PCI_STOP#
CPU_STOP#

36
42

CPU_0
CPU_0#

53
52

CLK_CPU_BCLK [4]
CLK_CPU_BCLK# [4]

To CPU (Core CLK)

166 MHz

CPU_1
CPU_1#

50
49

CLK_MCH_BCLK [4]
CLK_MCH_BCLK# [4]

To CPU (Host CLK)

166 MHz

SRC_1/CPU_ITP
SRC_1/CPU_ITP#

44
43

CLK_PCIE_LANP
CLK_PCIE_LANN

SRC_2
SRC_2#

41
40

PE4CLK+ [20]
PE4CLK- [20]

SRC_3
SRC_3#

38
37

PE2CLK+ [20]
PE2CLK- [20]

SRC_4
SRC_4#

34
33

CLK_PCIE_DMIP
CLK_PCIE_DMIN

SRC_5
SRC_5#

32
31

CLK_CARDREADER [21]
CLK_CARDREADER#
[21]

SRC_6
SRC_6#

28
27

DOT96/SRC7
DOT96#/SRC7#

18
19

30

VDD_SRC_IO_1.05

35

VDD_SRC_IO_1.05

48

VDD_CPU_IO_1.05

1
2
13
54

NC
NC
NC
NC

3
4

XTAL_OUT
XTAL_IN

SMBDT1
SMBCK1

7
8

SDA
SCL

1K_4

FSB

CG_XOUT
[8] CLKUSB_48
[11] 14M_ICH

<Layout note>
Crystal place within 500mil of CK505

Follow Silegro schematic

[10] PCLK_ICH
[22] LCLK_EC
[20] PCLK_DEBUG

R218

33/J_4

R191

33/J_4

CLK_BSEL2_FSC R190

10K_4

USB_48M
FSC

R205
R204
R219

22/J_4
22/J_4
33/J_4

15

USB48_1/FSB

17

USB48_2

REF/FSC

ITP_EN

10

PCIF/ITP_EN

33M_SEL

11

25MHz/PCI_2/SEL_33MHz

12
16
22
24
39
51
56

VSS_PCI
VSS_48M
VSS_LCD
VSS_SATA
VSS_SRC
VSS_CPU
VSS_REF

57

Thermal Pad

PM_STPPCI#_R
PM_STPCPU#_R

R164
R157

*0/J_4
*0/short_J_4

PM_STPPCI# [11]
PM_STPCPU# [11]

DREFCLK
DREFCLK#

To SB

[18]
[18]

To LAN (LAN)

10K/J_4

ITP_EN

1 = Pin 43/44 as CPU_ITP

0 = Pin 43/44 as SRC_1

pin 10 has internal pull down resistor.

100 MHz

To CPU (DMI CLK)

100 MHz

To Card Reader

100 MHz

CLK_PCIE_ICH [8]
CLK_PCIE_ICH# [8]

To SB (DMI CLK)

100 MHz

DREFCLK [4]
DREFCLK# [4]

To CPU (PLL CLK)

96 MHz

[4]
[4]

20
21

DREFSSCLK [4]
DREFSSCLK# [4]

To CPU (DPLSS CLK)

100 MHz

SATA
SATA#

26
25

CLK_PCIE_SATA [9]
CLK_PCIE_SATA# [9]

To SB (SATA CLK)

100 MHz

CLKREQ_A#
CLKREQ_B#
CLKREQ_C#

47
46
29

CKPWRGD/PD#

55

CLKREQ_LAN#_R
CLKREQ_MPC#_R
CLKREQ_MNC#_R

R141
R142
R201

475/F_4
475/F_4
475/F_4

FSC FSB Frequency


0
0
133MHz
0
1
166MHz
1
1
200MHz
1
0
100MHz

R208

4.7K/J_4

R197

*10K/J_4 33M_SEL

+1.05V

+1.05V
[4] CPU_BSEL2

R215

*1K_4

R214

0_4

R216

*0_4

R188

*1K_4

R187

0_4

R189
5

R202

10K/J_4

CLKREQ_LAN#_R

R148

10K/J_4

USB_48M

R374

20K/F_4

Control SRC_1

CLKREQ_LAN# [18]
CLKREQ_WLAN# [20]
CLKREQ_CARD# [21]
VR_PWRGD_CK410

*0_4

C190

*10P/50V_4

ITP_EN

C192

*10P/50V_4

FSB

C189

*10P/50V_4

FSC

C176

*10P/50V_4

33M_SEL

C172

*10P/50V_4

Control SRC_3
[11]

Control SRC_5

Register B5b6 for CLKREQ_A#


0 = SRC1, 1=SRC2
Register B5b4 for CLKREQ_B#
0 = SRC3, 1=SRC4
Register B5b3 for CLKREQ_C#
0 = SRC5, 1=SRC6

&ORFN*HQ,&

+3V

R203
2.2K_4

2
3

SMBCK1

1
2N7002K
Q16

[23,26] VR_PWRGD_CK410#

1 = Pin 11 as 33MHz
0= Pin 11 as 25MHz

CLKREQ_MNC#_R

USB_48M

VR PWRGD

[4] CPU_BSEL1
+3V

10K/J_4

<20100819> Add 475 ohm for current leakage

SMBCK1 [3,20]

+3V

R186
2.2K_4

*10K_4
[11,20] PDAT_SMB

SMBDT1

SMBDT1 [3,20]

no connect FSA to CPU, due to there is no FSA PIN for CPU.


need to check check how to handle it in CPU CLK_BESEL0

0221 : follow vendor's suggestion, change from 10K to 4.7K

10K/J_4

R149

<EMI>

100 MHz

To Mini Card 1 (WLAN)

R146

R153

*10K/J_4

R207

PM_STPCPU#
CLKREQ_MPC#_R

To Mini Card 2 (3G/Wimax) 100 MHz

[11,20] PCLK_SMB

R206

10K/J_4

CFG input hardware strapping to allocate PLL assignment.


LOW = Both CPU and SRC clock drive from PLL3
HIGH = CPU clock drive from PLL1, SRC clock drive from PLL3.
Contains 100k pull-down resistor.

LCD_CLK
LCD_CLK#

SLG8LV631V

+3V

R163

1/19 : 439549_439549_CorbettPark_Schm_Rev0.5: If this pin is


used as PCI_STOP#, it is required to provide a 10-k pull-up to
Vcc3_3. It is not recommended to connect this signal to the
Tiger Point(NM10) as it may cause unexpected system behavior.

VDD_CORE_1.5

14.318MHZ

C152
33P/50V_4

23

VDD_REF_3.3

CG_XOUT
CG_XIN

0.1uF near every power pin

CG_XIN

4.7U/10V/8

U9

.1U/10V_4

PM_STPPCI#_R

<20100819_FAE Poyueh> Add 2.2ohm resistor for noise suppress

Place close to L13

0.1uF near every power pin

Place close to L18

C195

0.1uF near every power pin

4.7U/10V/8

R209

C146

R147

10K_4

2N7002K
Q15

+3V

CLK_BSEL1_FSB
2N7002K
Q9

VR_PWRGD_CK410

VR_PWRGD_CK410

[11]

C182

Quanta Computer Inc.

.1U/10V_4

PROJECT : ZE6

CLK_BSEL2_FSC
Size

Document Number

Date:

Friday, March 11, 2011

Rev
1C

CLOCK GENERATOR

<20090721(B2A)>
Change Q3,Q5,Q6 from BAM700200F6 to BAM70020002 (with ESD protection function)
2

Sheet
1

of

35

M_A_BS0
M_A_BS1
M_A_BS2
M_CS#0
M_CS#1
M_CLK0
M_CLK0#
M_CLK1
M_CLK1#
M_CKE0
M_CKE1
M_A_CAS#
M_A_RAS#
M_A_WE#

DIMM0_SA0
DIMM0_SA1
SMBCK1
SMBDT1

[2,20] SMBCK1
[2,20] SMBDT1

98
97
96
95
92
91
90
86
89
85
107
84
83
119
80
78
109
108
79
114
121
101
103
102
104
73
74
115
110
113
197
201
202
200
116
120

[5] M_ODT0
[5] M_ODT1
[5] M_A_DM[7:0]

[5] M_A_DQS[7:0]

[5] M_A_DQS#[7:0]

M_A_DM0
M_A_DM1
M_A_DM3
M_A_DM2
M_A_DM4
M_A_DM5
M_A_DM6
M_A_DM7

11
28
46
63
136
153
170
187

M_A_DQS0
M_A_DQS1
M_A_DQS3
M_A_DQS2
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7
M_A_DQS#0
M_A_DQS#1
M_A_DQS#3
M_A_DQS#2
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7

12
29
47
64
137
154
171
188
10
27
45
62
135
152
169
186

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC#
A13
A14
A15
BA0
BA1
BA2
S0#
S1#
CK0
CK0#
CK1
CK1#
CKE0
CKE1
CAS#
RAS#
WE#
SA0
SA1
SCL
SDA
ODT0
ODT1
DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7

PC2100 DDR3 SDRAM SO-DIMM


(204P)

M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14

R130
R129

M_A_DQ[63:0]

JDIM1A

[5] M_A_A[14:0]

[5]
[5]
[5]
[5]
[5]
[5]
[5]
[5]
[5]
[5]
[5]
[5]
[5]
[5]
10K_4
10K_4

+1.5VSUS

DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS#0
DQS#1
DQS#2
DQS#3
DQS#4
DQS#5
DQS#6
DQS#7

5
7
15
17
4
6
16
18
21
23
33
35
22
24
34
36
39
41
51
53
40
42
50
52
57
59
67
69
56
58
68
70
129
131
141
143
130
132
140
142
147
149
157
159
146
148
158
160
163
165
175
177
164
166
174
176
181
183
191
193
180
182
192
194

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63

M_A_DQ7
M_A_DQ6
M_A_DQ3
M_A_DQ2
M_A_DQ0
M_A_DQ5
M_A_DQ1
M_A_DQ4
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ24
M_A_DQ25
M_A_DQ27
M_A_DQ26
M_A_DQ29
M_A_DQ28
M_A_DQ30
M_A_DQ31
M_A_DQ18
M_A_DQ23
M_A_DQ22
M_A_DQ19
M_A_DQ21
M_A_DQ17
M_A_DQ16
M_A_DQ20
M_A_DQ33
M_A_DQ32
M_A_DQ35
M_A_DQ34
M_A_DQ37
M_A_DQ36
M_A_DQ38
M_A_DQ39
M_A_DQ44
M_A_DQ45
M_A_DQ42
M_A_DQ46
M_A_DQ40
M_A_DQ41
M_A_DQ47
M_A_DQ43
M_A_DQ48
M_A_DQ49
M_A_DQ55
M_A_DQ54
M_A_DQ53
M_A_DQ52
M_A_DQ51
M_A_DQ50
M_A_DQ61
M_A_DQ56
M_A_DQ63
M_A_DQ58
M_A_DQ57
M_A_DQ60
M_A_DQ59
M_A_DQ62

[5]

2.48A

+3V

R119

+3V

*10K_4

JDIM1B

75
76
81
82
87
88
93
94
99
100
105
106
111
112
117
118
123
124

VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
VDD18

199

VDDSPD

77
122
125
198
30

[4] PM_EXTTS#0
[5] DDR3_DRAMRST#
+SMDDR_VREF_DQ0
+SMDDR_VREF_DIMM

1
126
2
3
8
9
13
14
19
20
25
26
31
32
37
38
43

R116
1K/F_4
R115

*0_6
R117
1K/F_4

EVENT#
RESET#

VREF_DQ
VREF_CA
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15

VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52

VTT1
VTT2
GND
GND

44
48
49
54
55
60
61
65
66
71
72
127
128
133
134
138
139
144
145
150
151
155
156
161
162
167
168
172
173
178
179
184
185
189
190
195
196

203
204

+0.75V_DDR_VTT

205
206

DDR3-DIMM0_H=4_RVS

+1.5VSUS

+SMDDR_VREF

NC1
NC2
NCTEST

PC2100 DDR3 SDRAM SO-DIMM


(204P)

DDR_STD(DDR)

+SMDDR_VREF_DIMM
+SMDDR_VREF_DIMM
C109
470p/50V_4

+1.5VSUS

DDR3-DIMM0_H=4_RVS

R138
1K/F_4

Place these Caps near So-Dimm0.


R140

+SMDDR_VREF

+SMDDR_VREF_DQ0

*0_6

+1.5VSUS
+SMDDR_VREF_DIMM
C112
4.7U/6.3V_6

C126
4.7U/6.3V_6

C124
4.7U/6.3V_6

C114
0.1u/10V_4

+ C108
C110
220u/2V_7343
0.1u/10V_4

4.7U/6.3V_6

C125
4.7U/6.3V_6

+3V

C113
0.1u/10V_4

R139
1K/F_4

C127
0.1u/10V_4

C115

C116
4.7U/6.3V_6

+SMDDR_VREF_DQ0

C111
0.1u/10V_4

C107

C132
0.1u/10V_4

C131
2.2u/6.3V_6

2.2u/6.3V_6

C128
0.1u/10V_4

+0.75V_DDR_VTT

C129
2.2u/6.3V_6

C123
0.1u/10V_4

C118

C117

C122

C119

0.1u/10V_4

0.1u/10V_4

0.1u/10V_4

0.1u/10V_4

Quanta Computer Inc.


PROJECT : ZE6
Size

Document Number

Rev
1A

DDRIII SO-DIMM-0
Date:
5

Friday, March 11, 2011

Sheet
1

of

35

CRT_DDC_DATA
CRT_DDC_CLK
DAC_IREF
DPL_REFCLKINP
DPL_REFCLKINN
DPL_REFSSCLKINP
DPL_REFSSCLKINN

MISC

PM_EXTTS#_1/DPRSLPVR
PM_EXTTS#_0
PWROK
RSTINB

CRT_HSYNC
CRT_VSYNC

L31
L30

[14]
[14]

<Layout note>
Close to pin within 250mil

CRT_R [14]
CRT_G [14]
CRT_B [14]

CRT_R

CRT_G

CRT_B

R94
150/F_4

R95
150/F_4

R92
150/F_4

HPL_CLKINN
HPL_CLKINP

[14]
[14]
[14]
[14]
[14]
[14]
[14]
[14]

CRT_SDA [14]
CRT_SCL [14]

P28 VGA_IREF R96


Close pin < 500mil
Y30
Y29
AA30
AA31

R90

665/F_4

<Layout note>
Close to pin within 500mil
DREFCLK [2]
DREFCLK# [2]
DREFSSCLK [2]
DREFSSCLK# [2]

[14] INT_LVDS_PWM
+3V

R89
R88

[14] LVDS_CLK
[14] LVDS_DATA
[14] INT_LVDS_DIGON
R79

K29
J30
L5
AA3

*0/short_4

W8
W9

LIBG R22
J28
N22
N23
LBKLT_EN
L27
L26
*2.2K/J_4 LCTLA_CLK L23
*2.2K/J_4 LCTLB_DATAK25
K23
K24
H26

+3V
U5
3 OF 6
IMVP_PWRGD

LBKLT_EN

TC7SH08FU
4

INT_LVDS_BLON

100K_4

DMI

DMI_TXP_0
DMI_TXN_0
DMI_TXP_1
DMI_TXN_1

G2
G1
H3
J2

R295

DMI_RXP0
DMI_RXN0
DMI_RXP1
DMI_RXN1

C18
W1

PROCHOT_B
CPUPWRGOOD

H_THERMDA
H_THERMDC

[8]
[8]
[8]
[8]

G5
D14
D13
B14
C14
C16
D30
E30

H_PWRGD

L6
E17

K5
H5
K6

CLK_CPU_BCLK# [2]
CLK_CPU_BCLK [2]
CPU_BSEL0
CPU_BSEL1
CPU_BSEL2

CPU_BSEL1 [2]
CPU_BSEL2 [2]

H30
H29
H28
G30
G29
F29
E29

VID_0
VID_1
VID_2
VID_3
VID_4
VID_5
VID_6

VID0
VID1
VID2
VID3
VID4
VID5
VID6

L7
D20
H13
D18

RSVD
RSVD
RSVD
RSVD

THRMDA_1
THRMDC_1

H_PROCHOT# [26]
H_PWRGD [11]

H10
J10

BSEL_0
BSEL_1
BSEL_2

RSVD
TDI
TDO
TCK
TMS
TRST_B

<20090511(A1A)_Checklist Rev0.7>
PROCHOT_B:68ohm5% pull-up to Vcc1_05
(VCCP) at both CPU side and Intel MVP

+1.05V

H27

BCLKN
BCLKP

BPM_2_0#/RSVD
BPM_2_1#/RSVD
BPM_2_2#/RSVD
BPM_2_3#/RSVD

68_4

A13 H_GTLREF

RSVD
RSVD

BPM_1B_0
BPM_1B_1
BPM_1B_2
BPM_1B_3

[14]

*0_4

REV = 1.1

DMI_RXP_0
DMI_RXN_0
DMI_RXP_1
DMI_RXN_1

B18
B20
C20
B21

T9
XDP_TDI
T35
XDP_TCK
XDP_TMS
XDP_TRST#

PINEVIEW_M

R99

T33
T41
T36
T37

0.1u/10V_4

C82

G11
E15
G13
F13

ICH_DPRSTP# [11,26]
H_DPSLP# [11]
H_INIT# [9]

E13 H_THRMTRIP#

THERMTRIP_B

VSS

U21A

F3
F2
H4
G3

GTLREF

T8
T39
T13
T10

H_SMI# [9]
H_A20M# [9]
H_FERR# [9]
H_INTR [9]
H_NMI [9]
H_IGNNE# [9]
H_STPCLK# [9]

G6
G10
G8
T30
E11
F15 H_PREQ#

DPRSTP_B
DPSLP_B
INIT_B
PRDY_B
PREQ_B

<20090610(A1A)_Sighting Report Rev002_Number:3359187>


Avoid a glitch during system power up

R93

[8] DMI_TXP0
[8] DMI_TXN0
[8] DMI_TXP1
[8] DMI_TXN1

LVD_IBG
LVD_VBG
LVD_VREFH
LVD_VREFL
LBKLT_EN
LBKLT_CTL
LCTLA_CLK
LCTLB_CLK
LDDC_CLK
LDDC_DATA
LVDD_EN

E7
H7
H6
F10
F11
E5
F8

SMI_B
A20M_B
FERR_B
LINT00
LINT10
IGNNE_B
STPCLK_B

PM_DPRSLPVR [11,26]
PM_EXTTS#0 [3]
IMVP_PWRGD [11,23,26]
PLTRST# [11,18,20,21,22,23]

CLK_MCH_BCLK# [2]
CLK_MCH_BCLK [2]

Pineview-M 1.66G

LVD_A_CLKM
LVD_A_CLKP
LVD_A_DATAM_0
LVD_A_DATAP_0
LVD_A_DATAM_1
LVD_A_DATAP_1
LVD_A_DATAM_2
LVD_A_DATAP_2

2.37K/F_4

LCD Panel Backlight

RSVD_TP
RSVD_TP
RSVD_TP
RSVD_TP

REV = 1.1

U25
U26
R23
R24
N26
N27
R26
R27

INT_TXLCLKN
INT_TXLCLKP
INT_TXLOUTN0
INT_TXLOUTP0
INT_TXLOUTN1
INT_TXLOUTP1
INT_TXLOUTN2
INT_TXLOUTP2

ICH

CRT_R
CRT_G
CRT_B

N31
P30
P29
N30

15/F_4
15/F_4

RSVD_TP
RSVD_TP
RSVD_TP
RSVD_TP

AA21
W21
T21
V21
C

R81
R80

LVDS

CRT_RED
CRT_GREEN
CRT_BLUE
CRT_IRTN

M30 VGA_HSYNC_R
M29 VGA_VSYNC_R

CPU

VGA

CRT_HSYNC
CRT_VSYNC

RSVD

AA7
AA6
R5
R6

PINEVIEW_M

U21D

REV = 1.1

XDP_RSVD_00
XDP_RSVD_01
XDP_RSVD_02
XDP_RSVD_03
XDP_RSVD_04
XDP_RSVD_05
XDP_RSVD_06
XDP_RSVD_07
XDP_RSVD_08
XDP_RSVD_09
XDP_RSVD_10
XDP_RSVD_11
XDP_RSVD_12
XDP_RSVD_13
XDP_RSVD_14
XDP_RSVD_15
XDP_RSVD_16
XDP_RSVD_17

L11

04
<Layout note>
Place within 750mil from CPU

R292
D

PINEVIEW_M

U21C

D12
A7
D6
C5
C7
T34
C6
D8
B7
A9
1K/F_4 D9
C8
T29
B8
C10
D10
B11
B10
B12
T40
C11

[26]
[26]
[26]
[26]
[26]
[26]
[26]

CLK GEN no FSA pin for CPU_BSEL0,


so just pull high to fix it.

K9
D19
K7 H_EXBGREF

RSVD_TP
RSVD_TP
EXTBGREF

+1.05V
<Layout note>
Place within 500mil from CPU pin

EXP_CLKINN
EXP_CLKINP

R10
R9
N10
N9

EXP_RCOMPO
EXP_ICOMPI
EXP_RBIAS

RSVD
RSVD
RSVD
RSVD

RSVD_TP
RSVD_TP

L10
L9
L8

EXP_COMP

R91

49.9/F_4

EXP_RBIAS

R310

750/F_4

N11
P11

C30
D31

<Layout note>
PLACE TCK/TDI/TMS TERMINATION NEAR CPU

RSVD_C30
RSVD_D31

CPU_BSEL0
CPU_BSEL1
CPU_BSEL2

4 OF 6

RSVD_K2
RSVD_J1
RSVD_M4
RSVD_L3

RSVD_K3
RSVD_L2
RSVD_M2
RSVD_N2

1 OF 6

XDP PU

K3
L2
M2
N2
+3V

+1.05V

XDP_TMS

R63

51/J_4

<Layout note>
Place within 500mil from CPU pin and 5mil spacing

XDP_TDI

R62

51/J_4

H_PREQ#

R294

51/J_4

XDP_TCK

R293

51/J_4

XDP_TRST#

R61

51/J_4

+3V

R74

2.2K/J_4 LVDS_CLK

<Layout note>
Place within 500mil from CPU pin

R69

2.2K/J_4 LVDS_DATA

<EMI>

C52

+1.05V
Max 500mil

Near CPU pin

R51
976/F_4

R280
1K/F_4

1D: No Stuff C8007 (CRB v1.0)

C61

Pineview-M 1.66G

H_EXBGREF
PM_EXTTS#0 R77

10K_4

*220P/50V_4

R55
3.32K/F_4

&387KHUPDOPRQLWRU 7+0

CPU FAN CTRL(THM)

C36
1U/6.3V_4

R281
2K/F_4

C251
1U/6.3V_4

125 Degree Protection(CPU)

+3V

R76

R52

10K_4

*10K_4

R75

*0/short_4

C54

0.1u/10V_4

IMVP_PWRGD

Q2
2N7002K

<20090721(B2A)>
Change Q7 from BAM700200F6
to BAM70020002 (with ESD
protection function)

U4
H_THERMDA

C121
*220p/50V_6

+3V

R126
R133

R137

[22] 2ND_MBDATA
[11,22] THERM_ALERT#

+5V

+3V

R59

*0_4

THERM_ALERT#_R
FAN_ON#

10K_4

FAN_PWM_E

DXP

ALERT#

DXN

OVERT#

GND

C40

2200p/50V_4

H_THERMDC

[22]

ALERT#:pull up at SB side

2
1

Q8
MMBT3904
3

FAN_PWM_CN

4
3
2
1

SMSC ADDRESS: 98H

+1.05V

<Layout Note>
Routing 10:10 mils and
away from noise source
with ground gard

R47
1K_4
R60
CPU

56_4

Q1
1
3
MMBT3904

H_THRMTRIP#

SMSC : AL001412003

R67

6
5

FAN

*0_4

SYS_SHDN#

[25,26,30]

PM_THRMTRIP#

[9]

Tigerpoint

Quanta Computer Inc.

Q6
MMBT3904

PROJECT : ZE6

CPUFAN#

FAN_SIG

+5V
CN16

10K_4

[22] CPUFAN#

VCC

SDA

IC CTRL(8P) EMC1412-1-ACZL-TR
FAN_SIG
10K_4
R128

10K_4 FAN_PWM_B

SCLK

10K_4

+3V
A

FAN_ON# R124

[22] 2ND_MBCLK

C130
*220p/50V_6

C257
*220P/50V_4

+1.05V
+3V

8/11 B-test : for EMI

FAN_SIG

Size

Document Number

Date:

Friday, March 11, 2011

Rev
1B

Pineview DMI/Display
5

H_GTLREF

*220P/50V_4

XDP_BPM#5 : Length<200mil

FAN_PWM_CN

470/J_4
470/J_4
470/J_4

Pineview-M 1.66G
<Layout note>
Place within 500mil from CPU pin

+1.05V

K2
J1
M4
L3

R65
R66
R64

[2] CLK_PCIE_DMIN
[2] CLK_PCIE_DMIP

N7
N6

Sheet
1

of

35

05

PINEVIEW_M

U21B
[3] M_A_A[14..0]

[3] M_A_WE#
[3] M_A_CAS#
[3] M_A_RAS#
[3] M_A_BS0
[3] M_A_BS1
[3] M_A_BS2

[3] M_CS#0
[3] M_CS#1

[3] M_CKE0
[3] M_CKE1

[3] M_ODT0
[3] M_ODT1

[3]
[3]
[3]
[3]

M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14

AH19
AJ18
AK18
AK16
AJ14
AH14
AK14
AJ12
AH13
AK12
AK20
AH12
AJ11
AJ24
AJ10

M_A_WE#
M_A_CAS#
M_A_RAS#

AK22
AJ22
AK21

M_A_BS0
M_A_BS1
M_A_BS2

AJ20
AH20
AK11

M_CS#0
M_CS#1

AH22
AK25
AJ21
AJ25

M_CKE0
M_CKE1

AH10
AH9
AK10
AJ8

M_ODT0
M_ODT1

AK24
AH26
AH24
AK27

M_CLK0
M_CLK0#
M_CLK1
M_CLK1#

M_CLK0
M_CLK0#
M_CLK1
M_CLK1#

AG15
AF15
AD13
AC13

REV = 1.1

DDR_A_MA_0
DDR_A_MA_1
DDR_A_MA_2
DDR_A_MA_3
DDR_A_MA_4
DDR_A_MA_5
DDR_A_MA_6
DDR_A_MA_7
DDR_A_MA_8
DDR_A_MA_9
DDR_A_MA_10
DDR_A_MA_11
DDR_A_MA_12
DDR_A_MA_13
DDR_A_MA_14

[22,23,27] HWPG_1.5V

AC15
AD15
AF13
AG13

4
3

[22,23,27,29] SUSON

U7
TC7SH08FU

R121

AD17
AC17
AB15
AB17

+1.5VSUS

12.1K/F_4
DDRAM_PWROK

DDR_A_WEB
DDR_A_CASB
DDR_A_RASB

*10K_4

DDRAM_PWROK

10K_4

[3] DDR3_DRAMRST#

C294
<Layout note>
Close to pin
+1.5VSUS

R348
R349
C295

0.1U/10V_4

DDR_VREF
80.6/F_4 SM_RCOMP
80.6/F_4 SM_RCOMP#
0.01U/25V_4

AB4
AK8

AB11
AB13
AL28
AK28
AJ26
AK29

DDR_A_BS_0
DDR_A_BS_1
DDR_A_BS_2

R352

DDR_A_ODT_0
DDR_A_ODT_1
DDR_A_ODT_2
DDR_A_ODT_3

<EMI>

C297

AB8
AD7
AA9

M_A_DQS1
M_A_DQS#1
M_A_DM1

AB6
AB7
AE5
AG5
AA5
AB5
AB9
AD6

M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15

AD8
AD10
AE8

M_A_DQS2
M_A_DQS#2
M_A_DM2

AG8
AG7
AF10
AG11
AF7
AF8
AD11
AE10

M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23

AK5
AK3
AJ3

M_A_DQS3
M_A_DQS#3
M_A_DM3

AH1
AJ2
AK6
AJ7
AF3
AH2
AL5
AJ6

M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31

AG22
AG21
AD19

M_A_DQS4
M_A_DQS#4
M_A_DM4

AE19
AG19
AF22
AD22
AG17
AF19
AE21
AD21

M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39

AE26
AG27
AJ27

M_A_DQS5
M_A_DQS#5
M_A_DM5

AE24
AG25
AD25
AD24
AC22
AG24
AD27
AE27

M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47

AE30
AF29
AF30

M_A_DQS6
M_A_DQS#6
M_A_DM6

AG31
AG30
AD30
AD29
AJ30
AJ29
AE29
AD28

M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55

AB27
AA27
AB26

M_A_DQS7
M_A_DQS#7
M_A_DM7

AA24
AB25
W24
W22
AB24
AB23
AA23
W27

M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63

DDR_A_DQ_24
DDR_A_DQ_25
DDR_A_DQ_26
DDR_A_DQ_27
DDR_A_DQ_28
DDR_A_DQ_29
DDR_A_DQ_30
DDR_A_DQ_31

DDR_A_CK_0
DDR_A_CKB_0
DDR_A_CK_1
DDR_A_CKB_1
DDR_A_CK_3
DDR_A_CKB_3
DDR_A_CK_4
DDR_A_CKB_4

DDR_A_DQS_4
DDR_A_DQSB_4
DDR_A_DM_4
DDR_A_DQ_32
DDR_A_DQ_33
DDR_A_DQ_34
DDR_A_DQ_35
DDR_A_DQ_36
DDR_A_DQ_37
DDR_A_DQ_38
DDR_A_DQ_39

RSVD_AD17
RSVD_AC17
RSVD_AB15
RSVD_AB17

DDR_A_DQS_5
DDR_A_DQSB_5
DDR_A_DM_5

VSS
RSVD

DDR_A_DQ_40
DDR_A_DQ_41
DDR_A_DQ_42
DDR_A_DQ_43
DDR_A_DQ_44
DDR_A_DQ_45
DDR_A_DQ_46
DDR_A_DQ_47

RSVD_TP
RSVD_TP
DDR_VREF
DDR_RPD
DDR_RPU
RSVD

DDR_A_DQS_6
DDR_A_DQSB_6
DDR_A_DM_6
DDR_A_DQ_48
DDR_A_DQ_49
DDR_A_DQ_50
DDR_A_DQ_51
DDR_A_DQ_52
DDR_A_DQ_53
DDR_A_DQ_54
DDR_A_DQ_55
DDR_A_DQS_7
DDR_A_DQSB_7
DDR_A_DM_7

DDR_VREF
R353
1K/F_4

M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7

DDR_A_DQS_3
DDR_A_DQSB_3
DDR_A_DM_3

R351
1K/F_4

*0_4

DDR_A_DQ_0
DDR_A_DQ_1
DDR_A_DQ_2
DDR_A_DQ_3
DDR_A_DQ_4
DDR_A_DQ_5
DDR_A_DQ_6
DDR_A_DQ_7

DDR_A_DQ_16
DDR_A_DQ_17
DDR_A_DQ_18
DDR_A_DQ_19
DDR_A_DQ_20
DDR_A_DQ_21
DDR_A_DQ_22
DDR_A_DQ_23

DDR_A_CKE_0
DDR_A_CKE_1
DDR_A_CKE_2
DDR_A_CKE_3

+1.5VSUS

+SMDDR_VREF

M_A_DQS0
M_A_DQS#0
M_A_DM0

AC4
AC1
AF4
AG2
AB2
AB3
AE2
AE3

DDR_A_DQS_2
DDR_A_DQSB_2
DDR_A_DM_2

DDR_A_CSB_0
DDR_A_CSB_1
DDR_A_CSB_2
DDR_A_CSB_3

DDR_A

<Layout note>
Close to DDR_VREF pin

AD3
AD2
AD4

DDR_A_DQ_8
DDR_A_DQ_9
DDR_A_DQ_10
DDR_A_DQ_11
DDR_A_DQ_12
DDR_A_DQ_13
DDR_A_DQ_14
DDR_A_DQ_15

R350
R120

DDR_A_DQS_0
DDR_A_DQSB_0
DDR_A_DM_0

DDR_A_DQS_1
DDR_A_DQSB_1
DDR_A_DM_1

+3V_S5

DDR3 PWROK

M_A_DQ[63..0] [3]

C296
0.1u/16V_6

*1000p/50V_4
2 OF 6
DG 2.1 : It is strongly recommended that the SODIMM VREF motherboard traces, going from
their VREF resistor dividers to their specified SODIMM VREF pins, be ground referenced
on the motherboard where ever possible to help minimize risks of any possible noise
being coupled onto VREF. If they can't be referenced to ground we recommend placing
a site for a 0603 capacitor near the VREF divider. These 0603 capacitor sites must be
connected on one end to the non ground reference plane the VREF trace is referenced
to and the other end must be connected to ground.

DDR_A_DQ_56
DDR_A_DQ_57
DDR_A_DQ_58
DDR_A_DQ_59
DDR_A_DQ_60
DDR_A_DQ_61
DDR_A_DQ_62
DDR_A_DQ_63

M_A_DM[7..0] [3]
M_A_DQS[7..0] [3]
M_A_DQS#[7..0] [3]
D

Quanta Computer Inc.

Pineview-M 1.66G

PROJECT : ZE6
Size

Rev
1B

Pineview DDR
Date:

Document Number

Friday, March 11, 2011

Sheet
1

of

35

VCCGFX

C84

2.2U/6.3V_6

C85

1U/6.3V_4

C74

1U/6.3V_4

C72

1U/6.3V_4

C77

1U/6.3V_4

C88

1U/6.3V_4

C78

1U/6.3V_4

C86

1U/6.3V_4

+1.5VSUS
R111

PINEVIEW_M
REV = 1.1

T13
T14
T16
T18
T19
V13
V19
W14
W16
W18
W19

3.5A
VCCGFX
VCCGFX
VCCGFX
VCCGFX
VCCGFX
VCCGFX
VCCGFX
VCCGFX
VCCGFX
VCCGFX
VCCGFX

1.38A

*0/short_8

C101

2.2U/6.3V_6

C100

1U/6.3V_4

C99

1U/6.3V_4

C96

1U/6.3V_4

C103

1U/6.3V_4

AK13
AK19
AK9
AL11
AL16
AL21
AL25

VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM

<Layout note>
Close to pin

2.27A
R112

VCC1.5_VCCCK_DDR

*0/short_6

AK7
AL7

C102

C106
22U/6.3V_8

1U/6.3V_4

U10
U5
U6
U7
U8
U9
V2
V3
V4
W10
W11

+1.05V

C278

22u/6.3V_8

C81

4.7U/6.3V_6

C76

1U/6.3V_4

AA10
AA11

VCCCK_DDR
VCCCK_DDR
VCCA_DDR
VCCA_DDR
VCCA_DDR
VCCA_DDR
VCCA_DDR
VCCA_DDR
VCCA_DDR
VCCA_DDR
VCCA_DDR
VCCA_DDR
VCCA_DDR

POWER

+1.5VSUS

VCCSENSE
VSSSENSE

VCCACK_DDR
VCCACK_DDR

0.08AVCCA

*0.1u/10V_4

AA19

C91
C93

AC31

1U/6.3V_4
1U/6.3V_4

VCCD_HMPLL
VCCSFR_AB_DPL

VCC1.8_VCCACRTDAC

T30

1U/6.3V_4

C58

1U/6.3V_4

C39

1U/6.3V_4

C57

1U/6.3V_4

C32

22u/6.3V_8

C34

22u/6.3V_8

C33

22u/6.3V_8

C29
B29
Y2

VCC1.5_VCCA
C280
0.01U/25V_4

R322

VCC_SENSE [26]
VSS_SENSE [26]

*0/short_6
+1.5V
R57
100/F_4

<Layout note>
Close to pin
D4
B4
B3

C255

+1.05V

*0.1u/10V_4

VCCP_VCCP

<20090526(A1A)_EDS Rev0.7>
D4 pin is VCCP, not VCC
*0/short_4
+1.05V

R291

VCC1.8_LCCALVD

VCCALVD
VCCDLVD

R100

V30
W31

0.1uH/300mA_6

+1.8V
C92
1u/6.3V_4

C87
22U/6.3V_8

VCCACRTDAC

+3V
C79
1u/6.3V_4

C323
*22U/6.3V_8
+1.05V
+1.05V

C75

1U/6.3V_4

C253
C254

1U/6.3V_4
1U/6.3V_4

+1.05V
D

T31
J31
C3
B2
C2
A21

0.006A

0.33A

0.48A
DMI

0.2A/600ohm_6

C69

0.06A

0.154A

R98
+1.8V

06

VCCD_AB_DPL

LVDS

*0.1u/10V_4

C94

A23
A25
A27
B23
B24
B25
B26
B27
C24
C26
D23
D24
D26
D28
E22
E24
E27
F21
F22
F25
G19
G21
G24
H17
H19
H22
H24
J17
J19
J21
J22
K15
K17
K21
L14
L16
L19
L21
N14
N16
N19
N21

R56
100/F_4

VCCP
VCCP

V11

+1.8V

VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC

VCC

C80

VCORE

EXP\CRT\PLL

<Layout note>
VCCA_DDR and VCCACK_DDR rails can be
on the same source but make sure the
plane shapes are split near Pineview-M
to avoid noise coupling

1.32A

<Layout note>
Close to pin AA19

VCORE

U21E

DDR

CPU

GFX/MCH

VCC_GIO
VCCRING_EAST
VCCRING_WEST
VCCRING_WEST
VCCRING_WEST
VCC_LGI_VID

VCCA_DMI
VCCA_DMI
VCCA_DMI

0.104A

RSVD
VCCSFR_DMIHMPLL
VCCP

C256
*1u/6.3V_4

T1
T2
T3

VCCP_DMI
C273
1U/6.3V_4
C272
1U/6.3V_4

R315

VCCP_VCCAPLL_DMI
P2
R326
AA1VCC1.8_DMIHMPLL
E2

+1.05V

*0/short_6
+1.05V

R313
*0/short_4
+1.8V

*0_4

+1.05V

C267
*1u/6.3V_4

C284
1u/6.3V_4

5 OF 6
Pineview-M 1.66G

Quanta Computer Inc.


PROJECT : ZE6
Size

Document Number

Date:

Friday, March 11, 2011

Rev
1B

Pineview Power
1

Sheet

of
8

35

U21F

REV = 1.1
VSS
VSS
VSS
RSVD_NCTF
RSVD_NCTF
RSVD_NCTF
RSVD_NCTF
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
RSVD_NCTF
VSS
VSS
RSVD_NCTF
RSVD_NCTF
VSS
RSVD_NCTF
RSVD_NCTF
VSS
VSS
RSVD_NCTF
VSS
RSVD_NCTF
RSVD_NCTF
RSVD_NCTF
VSS
VSS
VSS
VSS
VSS
RSVD_NCTF
RSVD_NCTF
VSS
VSS
RSVD_NCTF
VSS
VSS
VSS
VSS
RSVD_NCTF
VSS
RSVD_NCTF
VSS
VSS
VSS
VSS
VSS
VSS
VSS
6 OF 6
GND

A11
A16
A19
A29
A3
A30
A4
AA13
AA14
AA16
AA18
AA2
AA22
AA25
AA26
AA29
AA8
AB19
AB21
AB28
AB29
AB30
AC10
AC11
AC19
AC2
AC21
AC28
AC30
AD26
AD5
AE1
AE11
AE13
AE15
AE17
AE22
AE31
AF11
AF17
AF21
AF24
AF28
AG10
AG3
AH18
AH23
AH28
AH4
AH6
AH8
AJ1
AJ16
AJ31
AK1
AK2
AK23
AK30
AK31
AL13
AL19
AL2
AL23
AL29
AL3
AL30
AL9
B13
B16
B19
B22
B30
B31
B5
B9
C1
C12
C21
C22
C25
C31
D22
E1
E10
E19
E21
E25
E8
F17
F19

07

PINEVIEW_M

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VSS

F24
F28
F4
G15
G17
G22
G27
G31
H11
H15
H2
H21
H25
H8
J11
J13
J15
J4
K11
K13
K19
K26
K27
K28
K30
K4
K8
L1
L13
L18
L22
L24
L25
L29
M28
M3
N1
N13
N18
N24
N25
N28
N4
N5
N8
P13
P14
P16
P18
P19
P21
P3
P4
R25
R7
R8
T11
U22
U23
U24
U27
V14
V16
V18
V28
V29
W13
W2
W23
W25
W26
W28
W30
W4
W5
W6
W7
Y28
Y3
Y4

T29

Pineview-M 1.66G

Quanta Computer Inc.


PROJECT : ZE6
Size

Document Number

Rev
1B

Pineview GND
Date:
1

Friday, March 11, 2011

Sheet

of

35

LAN
WLAN

3G

+1.5V

C65
C59

0.1U/10V_4 DMI_TXN1_C
0.1U/10V_4 DMI_TXP1_C

C259
C262

0.1U/10V_4 PCIE_TXN1_C
0.1U/10V_4 PCIE_TXP1_C

C263
C266

0.1U/10V_4 PCIE_TXN2_C
0.1U/10V_4 PCIE_TXP2_C

C270
C268

0.1U/10V_4 PCIE_TXN3_C
0.1U/10V_4 PCIE_TXP3_C

C271
C274

PCIE_TXN4_C
*3G@0.1U/10V_4
*3G@0.1U/10V_4
PCIE_TXP4_C

R78

R23
R24
P21
P20
T21
T20
T24
T25
T19
T18
U23
U24
V21
V20
V24
V23

K21
K22
J23
J24
M18
M19
K24
K25
L23
L24
L22
M21
P17
P18
N25
N24

24.9/F_4 DMI_COMP H24


J22
[2] CLK_PCIE_ICH#
[2] CLK_PCIE_ICH

W23
W24

DMI0RXN
DMI0RXP
DMI0TXN
DMI0TXP
DMI1RXN
DMI1RXP
DMI1TXN
DMI1TXP
DMI2RXN
DMI2RXP
DMI2TXN
DMI2TXP
DMI3RXN
DMI3RXP
DMI3TXN
DMI3TXP

USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P
USBP4N
USBP4P
USBP5N
USBP5P
USBP6N
USBP6P
USBP7N
USBP7P
USB

PE1RXPE1RX+
PE1TXPE1TX+
PE2RXPE2RX+
PE2TXPE2TX+
PE3RXPE3RX+
PE3TXPE3TX+
PE4RXPE4RX+
PE4TXPE4TX+

0.1U/10V_4 DMI_TXN0_C
0.1U/10V_4 DMI_TXP0_C

PERN1
PERP1
PETN1
PETP1
PERN2
PERP2
PETN2
PETP2
PERN3
PERP3
PETN3
PETP3
PERN4
PERP4
PETN4
PETP4

PCI-E

Card Reader
A

[18]
[18]
[18]
[18]
[20]
[20]
[20]
[20]
[21]
[21]
[21]
[21]
[20]
[20]
[20]
[20]

C53
C46

DMI

[4] DMI_RXN0
[4] DMI_RXP0
[4] DMI_TXN0
[4] DMI_TXP0
[4] DMI_RXN1
[4] DMI_RXP1
[4] DMI_TXN1
[4] DMI_TXP1

0110 : exchange USB port 1 and port 3


to fix charger port will auto wake up issue.

TGP

U20B

OC0#
OC1#
OC2#
OC3#
OC4#
OC5#/GPIO29
OC6#/GPIO30
OC7#/GPIO31

USBRBIAS
USBRBIAS#

H7
H6
H3
H2
J2
J3
K6
K5
K1
K2
L2
L3
M6
M5
N1
N2
D4
C5
D3
D2
E5
E6
C2
C3

G2
G3

USBP0USBP0+
USBP1USBP1+
USBP2USBP2+
USBP3USBP3+
USBP4USBP4+
USBP5USBP5+
USBP6USBP6+
USBP7USBP7+
USBOC#R_1
USBOC#L_1
USBOC#
USBOC#R_1
USBOC#
USBOC#
USBOC#
USBOC#

R303
R297

USBRBIAS R314

[17]
[17]
[17]
[17]
[14]
[14]
[17]
[17]
[20]
[20]
[20]
[20]
[15]
[15]
[20]
[20]

SYSTEM (Right down)


SYSTEM (Right up)
CCD
SYSTEM (Left)
SIM
3G
BT
WLAN

*0/short_4
*0/short_4

USBOC#R [17,22]
USBOC#L [17,22]

USBOC#R_1

R305

8.2K_4

USBOC#L_1

R298

8.2K_4

USBOC#

R306

1K/F_4

+3V_S5

22.6/F_4

placed within 500 mil of the chipset

CLK48

DMI_ZCOMP
DMI_IRCOMP

F4 CLKUSB_48

CLKUSB_48

[2]

CLKUSB_48

DMI_CLKN
DMI_CLKP
2

R309
*10/F_4

Tiger Point
C258
*10P/50V_4

Quanta Computer Inc.


PROJECT : ZE6
Size

Document Number

Rev
1B

Tiger Point DMI/PCIE/USB


Date:
1

Friday, March 11, 2011

Sheet

of

35

09
D

R12
AE20
AD17
AC15
AD18
Y12
AA10
AA12
Y10
AD15
W10
V12
AE21
AE18
AD19
U12

RSVD03
RSVD04
RSVD05
RSVD06
RSVD07
RSVD08
RSVD09
RSVD10
RSVD11
RSVD12
RSVD13
RSVD14
RSVD15
RSVD16
RSVD17
RSVD18

AC17
AB13
AC13
AB15
Y14

RSVD19
RSVD20
RSVD21
RSVD22
RSVD23

AB16
AE24
AE23

RSVD24
RSVD25
RSVD26

AA14
V14

RSVD27
RSVD28

TGP

SATA

U20C

SATA0RXN
SATA0RXP
SATA0TXN
SATA0TXP
SATA1RXN
SATA1RXP
SATA1TXN
SATA1TXP

AE6
AD6
AC7
AD7
AE8
AD8
AD9
AC9

SATA_RXN0
SATA_RXP0
SATA_TXN0
SATA_TXP0

[19]
[19]
[19]
[19]

SATA HDD
<20090514(A1A)_Checklist Rev0.7>
SERIRQ:8.2K pull-up
A20GATE:10K pull-up

R107
R108
R338
R339

SERIRQ
GA20
KBRST#
PCH_GPIO36

SATA_CLKN
SATA_CLKP

AD4
AC4

SATARBIAS#
SATARBIAS
SATALED#

AD11
AC11
AD25

<Layout note>
Close to pin within 500mil

CLK_PCIE_SATA# [2]
CLK_PCIE_SATA [2]
R335

SATARBIAS#

10K/J_4

8.2K_4
10K_4
10K/J_4
*10K/J_4

<Layout note>
Close to pin within 200mil

24.9/F_4

SATALED#
R340

+3V

SATALED# [15]
+3V

AD16
AB11
AB10
AD23

PCH_GPIO36

RSVD29
RSVD30
RSVD31
GPIO36

HOST

+1.05V

A20GATE
A20M#
CPUSLP#
IGNNE#
INIT3_3V#
INIT#
INTR
FERR#
NMI
RCIN#
SERIRQ
SMI#
STPCLK#
THERMTRIP#

U16 GA20
Y20
Y21
Y18
AD21
AC25
AB24
Y22
T17
AC21 KBRST#
AA16
AA21
V18
AA20

<Layout note>
Close to pin

GA20 [22]
H_A20M# [4]
H_IGNNE#

R84
56/J_4

[4]

H_INIT# [4]
H_INTR [4]

+1.05V
H_FERR#

H_NMI [4]
KBRST# [22]
SERIRQ [22]
H_SMI# [4]
H_STPCLK# [4]

<Layout note>
Close to pin within 1"

[4]

R103
56/J_4

PM_THRMTRIP# [4]

Tiger Point

NOTE
1. CPUSLP# is supported only on nettop platforms.

Quanta Computer Inc.


PROJECT : ZE6
Size

Document Number

Rev
1B

Tiger Point Sata/Host


Date:
5

Friday, March 11, 2011


2

Sheet

of
1

35

U20A

A5
PCI_DEVSEL# B15
J12
T27
A23
PCI_IRDY#
B7
C22
PCI_SERR#
B11
PCI_STOP#
F14
PCI_LOCK#
A8
PCI_TRDY#
A10
PCI_PERR#
D10
PCI_FRAME# A16

[2] PCLK_ICH

<20090601(A1A)_Checklist Rev0.7>
Strap1#/strap2#: signals have weak
internal pull-ups

EC_SCI#

[22] EC_SCI#

+3V
B

T38
R271
R73

PAR
DEVSEL#
PCICLK
PCIRST#
IRDY#
PME#
SERR#
STOP#
PLOCK#
TRDY#
PERR#
FRAME#

T26
T31

A18
E16

GNT1#
GNT2#

PCI_REQ1#
PCI_REQ2#

G16
A20

REQ1#
REQ2#

PCH_GPIO48 G14
PCH_GPIO17
A2
PCH_GPIO22 C15
C9

PCI_INTA#
PCI_INTB#
PCI_INTC#
PCI_INTD#
PCI_INTE#
PCI_INTF#
PCI_INTG#
PCI_INTH#

B2
D7
B3
H10
E8
D6
H8
F8

PCH_A16WP
10K/J_4
8.2K/J_4

D11
K9
M13

AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

PCI

GPIO48/ STRAP1#
GPIO17/ STRAP2#
GPIO22
GPIO1

PIRQA#
PIRQB#
PIRQC#
PIRQD#
PIRQE#/GPIO2
PIRQF#/GPIO3
PIRQG#/GPIO4
PIRQH#/GPIO5

C/BE0#
C/BE1#
C/BE2#
C/BE3#

STRAP0#
RSVD01
RSVD02

B22
D18
C17
C18
B17
C19
B18
B19
D16
D15
A13
E14
H14
L14
J14
E10
C11
E12
B9
B13
L12
B8
A3
B5
A6
G12
H12
C8
D9
C7
C1
B1

PCI_INTA#
PCI_INTC#
PCI_INTF#
PCI_INTB#

RP4

1
3
5
7

2 8.2K_8P4R
4
6
8

PCI_IRDY#
PCI_LOCK#
PCI_PERR#
PCI_TRDY#

RP3

1
3
5
7

2 8.2K_8P4R
4
6
8

1
3
5
7

2 8.2K_8P4R
4
6
8

PCI_DEVSEL#RP5
PCI_FRAME#
PCI_REQ1#
PCI_REQ2#

*1K_4
*1K_4

1
0
1
R71
R299

PCH_GPIO48
PCH_GPIO17

+3V

2 8.2K_8P4R
4
6
8

+3V

H16
M15
C13
L16

+3V

Description

IRQ

USB UHCI Controller #1, #4

PIRQB

AC'97 Codec; option for SMBUS

PIRQC

USB UH Controller #3; SATA/IDE Native Mode

PIRQD

USB UHCI Controller #2

PIRQE

Internal LAN; Option for SCI, TCO, HPET#0,1,2

PIRQF

Option for SCI, TCO, HPET#0,1,2

PIRQG

Option for SCI, TCO, HPET#0,1,2

PIRQH

USB EHCI Controller; Option for SCI, TCO, HPET#0,1,2

PCI_GNT#2

Internal PU
Should not be PD

+3V

Quanta Computer Inc.

A16 SWAP Override strap

PROJECT : ZE6

Low = A16 swap override enabled


High = Default

Size

Document Number

Rev
1B

TigerPoint PCI(3/6)
Date:

+3V

R284

PCH_A16WP
(INT PU)

+3V

PIRQA

SPI
PCI
LPC (Default)
R72
R300

8.2K_4

PCH_GPIO22

Boot BIOS Location

*1K_4
*1K_4

10

+3V

Tiger Point

0
1
1

8.2K/J_4
8.2K/J_4
10K_4

1RP1
3
5
7

PCI_INTD#
PCI_INTH#
PCI_INTG#
PCI_INTE#

ICH Boot BIOS select


PCH_GPIO48
(INT PU)

R272
R283
R54

PCI_STOP#
PCI_SERR#
EC_SCI#

PCH_GPIO17
(INT PU)

TGP

Friday, March 11, 2011


2

Sheet

10

of
1

35

<20090515(A1A)_Checklist Rev0.7>
BATLOW#:8.2K pull-up to V3ALWAYS
WAKE#:10K pull-up to VccSus3_3
SYS_RST#:10K pull-up to VccSus3_3

EMI
14M_ICH

LPCAD0
LPCAD1
LPCAD2
LPCAD3

AA5
V6
AA6
Y5
W8
Y8
Y4

T17

[20,22] LPCFRAME#

C285
*10P/50V_4

[16] ACZ_BITCLK_AUDIO
[16] ACZ_RESET#_AUDIO
[16] ACZ_SDIN0

R324
R323

[16] ACZ_SDOUT_AUDIO
[16] ACZ_SYNC_AUDIO
[2] 14M_ICH

debug port for google require

33/J_4
33/J_4

33/J_4
33/J_4

ACZ_BITCLK_R
ACZ_RST#_R

P6
U2
W2
V2
P8
ACZ_SDOUT_R AA1
ACZ_SYNC_R
Y1
14M_ICH
AA3

R2
T1
M8
P9
R4

SMBALERT#/GPIO11
SMBCLK
SMBDATA
SMLALERT#
SMLINK0
SMLINK1
SPI_MISO
SPI_MOSI
SPI_CS#
SPI_CLK
SPI_ARB

SPI

T43
T46
T14
T15
T45

RTCX1
RTCX2
RTCRST#

SMB

SMBALERT#
E20
PCLK_SMB
H18
PDAT_SMB
E23
SMB_LINK_ALERT# H21
SMLINK0
F25
SMLINK1
F24

[2,20] PCLK_SMB
[2,20] PDAT_SMB

RTC_X1 W4
RTC_X2 V5
RTCRST#
T5

RTC

15P/50V_4

LAN_CLK
LANR_STSYNC
LAN_RST#
LAN_RXD0
LAN_RXD1
LAN_RXD2
LAN_TXD0
LAN_TXD1
LAN_TXD2

CPUPWRGD/GPIO49

LAN

C275

EE_CS
EE_DIN
EE_DOUT
EE_SHCLK

EPROM

U3
AE2
T6
<20090529(A1A)_Checklist Rev0.7>
V3
If integrated LAN is not used
LAN_RST# tie it to GND.
T4
P7
B23
C279
15P/50V_4
AA2
AD1
AC2
R320
W3
32.768KHz,+-20PPM
T7
10M/J_4
Y3
U4

HDA_BIT_CLK
HDA_RST#
HDA_SDI0
HDA_SDIN1
HDA_SDIN2
HDA_SDOUT
HDA_SYNC
CLK14

BM_BUSY#/GPIO0
GPIO6
GPIO7
GPIO8
GPIO9
GPIO10
GPIO12
GPIO13
GPIO14
GPIO15
DPRSLPVR
STP_PCI#
STP_CPU#
GPIO24
GPIO25
GPIO26
GPIO27
GPIO28
CLKRUN#
GPIO33
GPIO34
GPIO38
GPIO39

AUDIO

R321
R316

LDRQ1#/GPIO23
LAD0/FWH0
LAD1/FWH1
LAD2/FWH2
LAD3/FWH3
LDRQ0#
LFRAME#

LPC

[20,22]
[20,22]
[20,22]
[20,22]

MISC

T18

R327
*33/J_4

TGP

U20D

THRM#
VRMPWRGD
MCH_SYNC#
PWRBTN#
RI#
SUS_STAT#/LPCPD#
SUSCLK
SYS_RESET#
PLTRSTB
WAKE#
INTRUDER#
PWROK
RSMRST#
INTVRMEN
SPKR
SLP_S3#
SLP_S4#
SLP_S5#
BATLOW#
DPRSTP#
DPSLP#
RSVD31

+3V_S5

T15 BM_BUSY#
W16 PCH_GPIO6
W14 PCH_GPIO7
K18 EC_SMI#
H19 PCH_GPIO9
M17 PCH_GPIO10
A24 PCH_GPIO12
C23 PCH_GPIO13
P5 PCH_GPIO14
E24 PCH_GPIO15
AB20
Y16
AB19
R3 PCH_GPIO24
C24 DMI_AC_ENABLE
D19 PCH_GPIO26
D20 PCH_GPIO27
F22 PCH_GPIO28
AC19 CLKRUN#
U14 PCH_GPIO33
AC1 MBID0
AC23 MBID1
AC24 MBID2

T20
T19
EC_SMI# [22]

PM_DPRSLPVR [4,26]
PM_STPPCI# [2]
PM_STPCPU# [2]
T44

1C: Intel suggestion enable AC mode


T28
T32
T11
CLKRUN# [22]
T16

AB22

PCLK_SMB
PDAT_SMB
PCH_GPIO10
PM_BATLOW#
THERM_ALERT#
DNBSWON#
PCH_GPIO9

R273
R288
R277
R282
R104
R276
R275

2.2K_4
2.2K_4
8.2K_4
8.2K_4
8.2K_4
*10K_4
8.2K_4

EC_SMI#
SYS_RST#
SMBALERT#
SMB_LINK_ALERT#
PCIE_WAKE#
SMLINK1
SMLINK0
PCH_GPIO15
ICH_RI#
PCH_GPIO12
PCH_GPIO13
PCH_GPIO14

R286
R274
R285
R278
R296
R304
R308
R301
R279
R289
R287
R317

10K_4
10K_4
10K_4
10K_4
10K_4
10K_4
10K_4
8.2K_4
10K_4
10K/J_4
10K/J_4
10K/J_4

MCH_SYNC#
CLKRUN#
BM_BUSY#

R337
R106
R333

1K/F_4
8.2K_4
8.2K_4

DMI_AC_ENABLE

R290

1K_4

TPT_PWROK

R336

10K_4

EC_RSMRST#

R334

10K_4

THERM_ALERT# [4,22]
VR_PWRGD_CK410 [2]

H20
E25
F21

SUSB# [22]
SUSC# [22]
T12

B25 PM_BATLOW#
AB23
AA18
F20

ICH_DPRSTP# [4,26]
H_DPSLP# [4]

DNBSWON# [22,23]
T42
SUSCLK [22]
VCCRTC
PCIE_WAKE# [18,20]
R347

1M/F_6

EC_RSMRST# [22,23]
R331

SB_BEEP [16]

+3V

TPT Power OK

1u/10V_6

CH500H-40

20K/F_6
C288

*SHORT_PAD

R302

R135

*0/short_4

R110

[22,23] ECPWROK

20MIL

20MIL
1
Q10
MMBT3904

VCCRTC_1

R160

2K/F_4

VCCRTC_2

R165

*0_4

2K/F_4

ACZ_SDOUT
(INT PD)

R161

ACZ_SYNC
(INT PD)

Description

INTVRMEN
1

CN5
RTC SOCKET

R162

150K/F_4

* 4 x 1s

Reserved

Quanta Computer Inc.


PROJECT : ZE6

Document Number

Rev
1A

TigerPoint GPIO
Date:

Disable

1 x 4s(1 port/4 lanes)


Size

Enable internal VccSus1_5 VRM


(default)

Reserved

1.Level 1 Environment-related Substances Should NEVER be Used.


2.Purchase ink, paint, wire rods, and Molding resins only from the business Partners that Sony approves as Green Partners.
5

TPT_PWROK [23]

0_4

68.1K/F_4
A

TPT_PWROK

+5V_S5

VCCRTC_4

R330
*10K_4

*TC7SH08FU
4

[4,23,26] IMVP_PWRGD

R332
10K_4

100K_4

G1

1u/10V_6
R354
1K_4

PLTRST# [4,18,20,21,22,23]
R307

RTCRST#

U6

R328
*10K_4
*0.1u/10V_4

[22,23] HWPG

*TC7SH08FU
4

2
1

R344

D32

CH500H-40
VCCRTC_3

PLT_RST#

R342
*10K_4

U17
C293

R343
*10K_4

VCCRTC

D33

+3VPCU

RTC(RTC)

+3V
C98

R329
10K_4

MBID2
MBID1
MBID0

<20090721(B2A)>
Stuff U19 and C275 and un-stuff R205 for power sequence

+3V
C252 *0.1u/10V_4

332K/F_4

Tiger Point

+3V

H_PWRGD [4]

AB17
V16
AC18 MCH_SYNC#
E21 DNBSWON#
H23 ICH_RI#
G22
D22 SUSCLK
G18 SYS_RST#
G23 PLT_RST#
C25 PCIE_WAKE#
SM_INTRUDER#
T8
U10 TPT_PWROK
AC3 EC_RSMRST#
AD3 ICH_INTVRMEN
J16

Platform Reset

11

Friday, March 11, 2011

Sheet
1

11

of

35

<Layout note>
Place 0402 caps close to ball
Place 0603/0805 caps close to ICH
D30 1
VCC5_VCC5REF
C37
1u/10V_4

2 1SS355

R270

100/F_4

D31 1

TGP

RVCC5_VCC5REF_SUS
C264
0.1u/10V_4

U20E

6mA
10mA

VCC5REF

VCC5REF_SUS

45mA

VCCSATAPLL

6uA

VCCRTC

24mA

VCCDMIPLL

10mA

VCCUSBPLL

14mA

V_CPU_IO
VCC1_5_1
VCC1_5_2
VCC1_5_3
VCC1_5_4

0.955A

VCC1_05_1
VCC1_05_2
VCC1_05_3
VCC1_05_4

2 1SS355

R312

10/F_4

+3V
+5V
+3V_S5
+5V_S5

F12
VCC1.5_SATAPLL
C83
0.1u/10V_4

F5

C291
C290

Y6

R109

0.1U/10V_4
0.01U/25V_4

AE3

*0/short_6

+1.5V

C97
4.7U/10V/8
VCCRTC

VCC1.5_VCCDMIPLL
C281
0.01U/25V_4

Y25

L26

F6

*0/short_6

+1.5V

C283
*4.7u/6.3V_6

W18

VCCP_VCC1_05

AA8
M9
M20
N22

VCC1.5_VCC1.5
C66
C67
C60
C89
C289

R341

*0/short_6

R319

*0/short_6

0.1U/10V_4
0.1U/10V_4
1U/6.3V_4
1U/6.3V_4
4.7U/10V/8

+1.5V

POWER

1.422A

12

0.216A

0.092A

VCC3_3_1
VCC3_3_2
VCC3_3_3
VCC3_3_4
VCC3_3_5
VCC3_3_6

VCCSUS3_3_1
VCCSUS3_3_2
VCCSUS3_3_3
VCCSUS3_3_4

J10
K17
P15
V10

H25
AD13
F10
G10
R10
T9

F18
N4
K7
F1

VCCP_VCC1_05
C71
C68
C277

VCC3_VCC3
C90
C48
C70
C73
C47

1U/6.3V_4
1U/6.3V_4
4.7U/10V/8

R105

*0/short_6

+3V

RVCC3_VCCSUS3
R311
C261
1U/6.3V_4
C51
1U/6.3V_4
C260
0.1U/10V_4

*0/short_6

+3V_S5

1U/6.3V_4
1U/6.3V_4
1U/6.3V_4
0.1U/10V_4
0.1U/10V_4

+1.05V

Tiger Point

Quanta Computer Inc.


PROJECT : ZE6
Size
1.Level 1 Environment-related Substances Should NEVER be Used.
2.Purchase ink, paint, wire rods, and Molding resins only from the business Partners that Sony approves as Green Partners.

Rev
1B

TigerPoint Power
Date:

Document Number
Friday, March 11, 2011

Sheet

12

of

35

13
U1LB

U20F

TGP

VSS01
VSS02
VSS03
VSS04
VSS05
VSS06
VSS07
VSS08
VSS09
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56

VSS57
VSS58
VSS59

RSVD32

A1
A25
B6
B10
B16
B20
B24
E18
F16
G4
G8
H1
H4
H5
K4
K8
K11
K19
K20
L4
M7
M11
N3
N12
N13
N14
N23
P11
P13
P19
R14
R22
T2
T22
V1
V7
V8
V19
V22
V25
W12
W22
Y2
Y24
AB4
AB6
AB7
AB8
AC8
AD2
AD10
AD20
AD24
AE1
AE10
AE25

G24
AE13
F2

AE16

Tiger Point

Quanta Computer Inc.


PROJECT : ZE6
Size
1.Level 1 Environment-related Substances Should NEVER be Used.
2.Purchase ink, paint, wire rods, and Molding resins only from the business Partners that Sony approves as Green Partners.

Rev
1B

TigerPoint GND
Date:

Document Number
Friday, March 11, 2011

Sheet

13

of

35

<20090724(B2A)>
Change R5 from CS41002JB20 to
CS44702JB15 (Follow vendor's
suggestion and reduce power)

+$//6(1625 +65

R102

+3VPCU

LED Panel POWER SWITCH(LDS)

100K_4

&$0(5$32:(5 &&'
+3V
CCD_POWER

C242
LCDVCC_1

MR1
PT3661-BB

D5

LCDVCC
R257

BAS316

LID# [22]

*0/short_8
1

0.1u/25V_6
R101
10K_4

0.15A

CCD_POWER

*0/short_8

*VPORT_6

C95

R260

C230

C239

C233

*0.1u/10V_4

0.1u/10V_4

33p/50V_4

+3V

LID#

4.7U/10V/8

Irush=1.5A

D6

PT3661-BB: AL003661003 ; pull-up: 470K ohm

C245

1000p/50V_4

C236

*0.1u/10V_4

C232
10u/10V_8

LED Panel(LDS)

+3V

VIN

R269

*0/short_8 V_BLIGHT
C248
4.7U/25V_8

DISPON
R83
10K_4
<20090721(B2A)>
Change Q13,Q14 from BAM700200F6 to
BAM70020002 (with ESD protection function)

2N7002K
1

INT_LVDS_BLON

C247
0.1U/50V_6
CN1

0_8

[4] INT_LVDS_DIGON

1
3

IN

OUT

IN

GND

ON/OFF

GND

R259

100K_4

EC_FPBACK#

reserve for IVO panel

LCDVCC_1

U16

[4]

R82

2N7002K

+5V

C235
1u/10V_6

Q3

[4] INT_LVDS_PWM
[22] CONTRAST

C325
*4.7U/25V_8

R48
R43
C25

IC(5P) G5243AT11U

C324
*0.1U/50V_6

LCDVCC
+3V
CCD_POWER

INT_TXLOUTN2_L
INT_TXLOUTP2_L
INT_TXLOUTN1_L
INT_TXLOUTP1_L

&57 &57

C250

F1

0.1u/10V_4

CRTVDD5

16

[4] CRT_R
[4] CRT_G
[4] CRT_B
R85

R86

R87
150/F_4

PBY160808T-220Y-N

CRT_R1

L16

PBY160808T-220Y-N

CRT_G1

L15

PBY160808T-220Y-N

CRT_B1

C62

C63

C64

C56

C50

C55

*10p/50V_4

*10p/50V_4

*10p/50V_4

10p/50V_4

10p/50V_4

10p/50V_4

6
1
7
2
8
3
9
4
10
5

17

150/F_4

L14

11

CRT_11

12

DDCDAT_1

13

CRTHSYNC

0.22u/25V_6

U3

CRTVDD5

CRT_BYP

7
8

0.1u/10V_4

+3V

CRT_VSYNC1
CRT_HSYNC1

16
14

VCC_SYNC SYNC_OUT2
SYNC_OUT1
VCC_DDC
BYP
SYNC_IN2
VCC_VIDEO
SYNC_IN1

3
4
5

VIDEO_1
VIDEO_2
VIDEO_3

DDC_IN1
DDC_IN2

10
11

CRT_SCL
CRT_SDA

DDC_OUT1
DDC_OUT2

9
12

DDCCLK_1
DDCDAT_1

15
13

R45
R44

22_4
22_4

CRT_VSYNC
CRT_HSYNC

VSYNC_R
HSYNC_R

L10
L9

CRT_R1
CRT_G1
CRT_B1

GND

CRT_SCL
CRT_SDA

14

CRTVSYNC

15

DDCCLK_1

CRT CONN

CRTVSYNC
CRTHSYNC

CRTVDD5

R53
R58

*0/short_4

R41

*0/short_4

R34

*0/short_4

R37

*0/short_4

R38

*0/short_4

2.2K_4
2.2K_4

R46
2.2K_4

R42
2.2K_4

*10p/50V_4

CRTVDD5

R40

*0/short_4

C20

1 *33p/50V_4

CRTVSYNC

C21

1 *33p/50V_4

CRTHSYNC

INT_TXLCLKN_L
INT_TXLCLKP_L
[4] LVDS_CLK
[4] LVDS_DATA

LCDVCC

LVDS_CLK
LVDS_DATA
R384
*0_8

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30

31
32

31
32

LCD CONN
INT_TXLOUTN1_L
INT_TXLOUTP1_L

INT_TXLOUTN2_L
INT_TXLOUTP2_L

INT_TXLCLKN_L
INT_TXLCLKP_L

[4] INT_TXLCLKN
[4] INT_TXLCLKP
C249

+3V
CRT_SCL
CRT_SDA

R39

[4] INT_TXLOUTN2
[4] INT_TXLOUTP2

BLM18BA220SN1D_22_6
BLM18BA220SN1D_22_6

[4]
[4]

[4]
[4]

*0/short_4

[4] INT_TXLOUTN1
[4] INT_TXLOUTP1

C49
0.1u/10V_4

R35

T7

+3V
C38

INT_TXLOUTN0_L
INT_TXLOUTP0_L
INT_TXLOUTN0_L
INT_TXLOUTP0_L

CN10

SMD1206P110TFT

150/F_4

*0/short_4

[4] INT_TXLOUTN0
[4] INT_TXLOUTP0

01/15 Modify

+5V

C43

CCD_POWER

DISPON
LCD_VADJ

100K_4

[22]

LCDVCC
LCDVCC

USBP2-_CCD
USBP2+_CCD

*0/short_J_4
*0/J_4
*3300P/50V_4

Q4
DTC144EU
R33

R385

BL#

Q5

+3V

R31

*0/short_4

R32

*0/short_4

USBP2+_CCD
USBP2-_CCD

[8] USBP2+
[8] USBP2-

C31

*10p/50V_4

DDCCLK_1

C27

*10p/50V_4

DDCDAT_1

Quanta Computer Inc.

IP4772_Rout=10ohm

PROJECT : ZE6
Size

Document Number

Date:

Friday, March 11, 2011

Rev
1B

CRT/LVDS
5

Sheet
1

14

of

35

TOUCH PAD (TPD)

3mA

BLUETOOTH(BTM)

+5V_TP
+5V

+5V_TP

CN3

7
8

4.7K/J_4

R262

R261

<EMI>
L12

1
2
3
4
5
6

TP_R#
TP_L#

<EMI>
+5V_TP

0.4A/120ohm_6
0.4A/120ohm_6

TPDATA [22]
TPCLK [22]

CX08T121000:0.4A/120ohm_6
CX121T04000:0.4A/120ohm_6

TP_CONN

C29
10P/50V_4

3A/120ohm_8
CX121T30001:3A/120ohm_8
BT@AO3413

L25
L24

TPDATA_CN
TPCLK_CN

C30

+3V

[8] USBP6+
[8] USBP6-

+ C160

10P/50V_4

C159
BT@1000p/50V_4

BT@0.22u/25V_6
R169
[20,22]

CN6

BT_POWER

3
Q14

.1U/10V_4

C28

4.7K/J_4

T22

BT_LED

5
4
3
2
1

6
7

BT@CONN

BT_POWERON#
BT@10K_4
C156
*BT@1000p/50V_4

TP_L#
1

3
4
5
6

TP switch

D35
*14V/38V/100P_4

D36
*14V/38V/100P_4

TP_R#

TP switch

SW3
1
2

SW2
1
2

3
4
5
6

KEYBOARD (KBC)

LED/SW (UIF)

PWR Button

SW1

<EMI>

CN2

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24

MX7
MX6
MX5
MY0
MY1
MY2
MX4
MY3
MY4
MY5
MY6
MY7
MY8
MX3
MY9
MX2
MX1
MY10
MY11
MX0
MY12
MY13
MY14
MY15

MX7 [22]
MX6 [22]
MX5 [22]
MY0 [22]
MY1 [22]
MY2 [22]
MX4 [22]
MY3 [22]
MY4 [22]
MY5 [22]
MY6 [22]
MY7 [22]
MY8 [22]
MX3 [22]
MY9 [22]
MX2 [22]
MX1 [22]
MY10 [22]
MY11 [22]
MX0 [22]
MY12 [22]
MY13 [22]
MY14 [22]
MY15 [22]

MX7
MX6
MX5
MY0
MY1
MY2
MX4
MY3
MY4
MY5
MY6
MY7
MY8
MX3
MY9
MX2
MX1
MY10
MY11
MX0
MY12
MY13
MY14
MY15

7
5
3
1
7
5
3
1
7
5
3
1
7
5
3
1
7
5
3
1
7
5
3
1

8
6
4
2
8
6
4
2
8
6
4
2
8
6
4
2
8
6
4
2
8
6
4
2

R222

R223

1
D16

FULL LED
CHG LED

D17

LED3
3

470/J_4

SUSLED#

[22]

[22,23]

NBSWON#

D22
*5.5V/25V/410P_4

power switch

[22]

2 *5.5V/25V/410P_4

2 *5.5V/25V/410P_4

SW4

R224

200/J_4

BATLED0#

[22]

R225

470/J_4

BATLED1#

[22]

3
4
5
6

LED_AMBER/BLUE

2
1

NBSWON#

*DIP-TJG-533-S-V-T/R
D18

2 *5.5V/25V/410P_4

D20

2 *3G@5.5V/25V/410P_4

side view

CP5
220P_8P4R
CP6
220P_8P4R

PWRLED#

side view

+3VPCU

CP4
220P_8P4R

200/J_4

LED_AMBER/BLUE

CP2
220P_8P4R
CP3
220P_8P4R

2 *5.5V/25V/410P_4

LED2
3

CP1
220P_8P4R

0402 size

25

D15

PWR LED
SUS LED

NBSWON#

2
1

+3VPCU
<20100303(C3A)>
20110117 : add CP1~CP6 for EMI issue

3
4
5
6

+3V
LED5

3G LED
WLAN LED

R228

*3G@270/J_4

R229

470/J_4

3G_MINI_LED#
WLAN_LED#

W/O 3G: use BE0R0083Z00


W
3G: use BEB00023ZA0

[20]
[20]

LED_AMBER/BLUE
D21

26

2 *5.5V/25V/410P_4

side view

SATALED#

KB CONN

+5V
LED4
3

HDD LED

R226

*330/J_4

[9]

<20090609(A1A)_Checklist Rev1.0>
Need the buffer for LED driving
capability since the IOL is 6mA only.

*BSS84
Q18

*LED_BULE
D19

2 *5.5V/25V/410P_4

side view
PWR: Blue Vf: 2.55~3.15V, If=20mA
SUS: Orange Vf=1.6~2.0V, If=20mA
A

+3V

PWR indicator

LED1
2

R238

120/J_4

Quanta Computer Inc.

LED_BLUE

PROJECT : ZE6
Size

Document Number

Date:

Friday, March 11, 2011

Rev
1B

KB/BT/TP/LED/Power Connector
5

Sheet
1

15

of

35

HPR

Codec(ADO)

HEADPHONE

HPL
MIC1-VREFO-L

Universal Jack

MIC1-VREFO-R

4.7U/6.3V_6

ADOGND

HPL-1

L28

*0/short_6

HPL_SYS

47/F_4

HPR-1

L27

*0/short_6

HPR_SYS

C151 place near to codec

C134

C136

ADOGND

C133
+5VA

R358

R360

C299

C300

*1K/J_4

*1K/J_4

2200P/50V_4

2200P/50V_4

D8

C137

ADOGND

*10u/6.3V_6

0.1u/10V_4

2.2U/6.3V_6

HP_JD#

*14V/38V/100P_4

C135

ADOGND

MIC2-VREFO

47

Spilt by DGND
48
49

SPDIFO2/EAPD
SPDIFO
PGND

Place next to pin 46

MIC1_R1

21

MIC1_L1

C3C
R200

20K/F_4

MIC2_L2

<20100917> Add 22k PD by FAE


suggestion for discharing

17

MIC2_R2

16

MIC2_L2

15

LINE2_R2

MIC2-JD#

Audio Codec

ADOGND

ADOGND

ADOGND

R155

MIC2-JD#

20K/F_4

COMBO MIC

R125

22K/F_4

Q7
2SK3018

C120
4.7U/10V/8

LINE2_L2
SENSEA

13

R179

39.2K/F_4

HP_JD#

R175

20K/F_4

MIC1_JD#

ADOGND

ANALOG
C

ALC271X

PCBEEP dont coupling any signals if possible


8/17 separate PCBEEP to Digital from Realtek suggestion

PCBEEP_1

C181

1u/10V_6 BEEP_1
C193

C170
0.1u/10V_4

MIC2_R2

2.2U/6.3V_6

R152
SENSEB

1.6Vrms

*0/short_6 +AZA_VDD

2.2U/6.3V_6

C155

*14V/38V/100P_4

18

DIGITAL
+3V

R118
22K/F_4

D39

Placement near

14

LINE2-L
Sense A

C153

22

19

LINE2-R

1K/J_4

27

25
AVDD1

28

29

26
AVSS1

VREF

LDO-CAP

MIC2-VREFO

32

33

31

30
MIC1-VREFO-R

HP-OUT-L

HP-OUT-R

MIC1-VREFO-L

36

34

35

PVDD2

PCBEEP

0.1u/10V_4

12

C168

4.7U/6.3V_6

RESET#

C167

MIC2-L

11

C166

4.7U/6.3V_6 0.1u/10V_4

MIC2-R

SPK-R+

SYNC

EAPD#
C165

Sense-B

SPK-R-

Place next to pin 25

20

JDREF

PVSS2

DVDD-IO

46

SDATA-IN

45

44

R_SPK+

(Vista Premium Version)

PVSS1

+5V

R_SPK-

Spilt by PGND

+5VPVDD2
*0/short_6

MIC1-L
MONO-OUT

R123

ADOGND

23

MIC1-R

SPK-L-

10

Place next to pin 39


C3C
R174

COMBO MIC

LINE1-L

DVSS2

43

4.7U/6.3V_6

24

LINE1-R

SPK-L+

42

C138
0.1u/10V_4

PVDD1

BIT-CLK

41

SDATA-OUT

40

L_SPK-

PD#

L_SPK+

0.1u/10V_4

C150

4.7U/6.3V_6

CBN

CBP
39

C147

+5VPVDD1

*0/short_6

C149

4.7U/6.3V_6 0.1u/10V_4

GPIO1/DMIC-CLK

C148

GPIO0/DMIC-DATA

+5V

AVDD2

DVDD1

38

AVSS2

37

CPVEE

ADOGND

ANALOG
Spilt by AGND

ADOGND

Place next to pin 38

C3C
R151

R122
2.2K/J_4

C139
U8

ADOGND

+
C142
0.1u/10V_4

6/*7&34"-+"$,
010030FR006G119ZR
D7
*14V/38V/100P_4

ADOGND

+5VA

2.2u/6.3V_6
C141
4.7U/6.3V_6

2
4
5

D9

*14V/38V/100P_4

Place next to pin 27

2.2u/6.3V_6

CN14

3
6
1

C140

47/F_4

R359

IN_MIC-VREFO

R361

HPR

Place near codec

HPL

MIC2-VREFO

ADOGND

COMBO MIC

C174
4.7U/6.3V_6

100p/50V_4

R213
4.7K_4

R199

47K/J_4

R220

47K_4

System MIC

MIC1-VREFO-R
MIC1-VREFO-L

PCBEEP [22]
SB_BEEP [11]

R356
4.7K/F_4

R355
4.7K/F_4

If either HDA device io power use +1.5V,


all device IO power change to +1.5V
CN13

Place next to pin 1

R196

DMIC_DAT_L
DMIC_CLK_L

*0/short_6
+AZA_VDD
C-test

ACZ_RESET#_AUDIO

PD#

0V : Power down Class D SPK amplifer


3.3V : Power up Class D SPK amplifer

ACZ_RESET#_AUDIO
ACZ_SYNC_AUDIO

ACZ_SDIN R185

33/J_4

ACZ_SDIN0

[11]

C173

C183

0.1u/10V_4

4.7U/6.3V_6

[11]

MIC1_L1

C151

4.7u/6.3V_6

MIC1_L2

R113

1K/F_4

MIC1_L3

R346

*0/short_6

MIC1_R1

C144

4.7u/6.3V_6

MIC1_R2

R114

1K/F_4

MIC1_R3

R345

*0/short_6

[11]

ACZ_BITCLK_AUDIO

[11]

2
4
5
6/*7&34"-+"$,
010030FR006G119ZR

C105

MIC1_JD#

Place next to pin 9

ACZ_SDOUT_AUDIO

MIC1_R
MIC1_JD#

C326

*22P-50V_4 *22P-50V_4

[11]

3
6
1

MIC1_L

C286

C287

C298

*470p/50V_4

*470p/50V_4

*0.1u/16V_6

Normal Open Jack

T49
T50

D34
*22p/50V_4

ADOGND
*VPORT_6

Near CN13

R363
R136
R193
R178
R144
R97
R158
R127

*Short_4
*0_6
*0_6
*0_6
*0_6
*0_6
*0_6
*0_6

R357
R132
R325
R168
R180

*0_6
*0_6
*0_6
*0_6
*0_6

C292
C282

Power (ADO)

ADOGND

Internal Analog MIC


IN_MIC-VREFO

R131
10K_4

*1000p/50V_4
*1000p/50V_4

R539

ADOGND

6/15:C203,R210,R98 short for EMI request

INT_MIC

ANALOG

L17

0_8

C158
C161

LINE2_R2
LINE2_L2

1u/10V_6
1u/10V_6

C104

*14V/38V/100P_4

DIGITAL

1K/J_4

1
2

L17 Place close to Codec

place near codec IC

CN4

D38

+5V

ADOGND

place near codec IC

Demodulation Filter

ADOGND

C175

C327

C328

*22P-50V_4

*22P-50V_4

*22P-50V_4

+5VA
ADOGND
ADOGND

Mute(ADO)

ADOGND
ADOGND

ADOGND

Internal Speaker
+5V

R184
*10K_4
A

PD#

40mil for each signal


CN7

*BAS316
*BAS316
*BAS316
R375

D13

ACZ_RESET#_AUDIO

D14

EAPD#

D12

R_SPK+
R_SPKL_SPKL_SPK+

R210
R198
R192
R176

R_SPK+_1
R_SPK-_1
L_SPK-_1
L_SPK+_1

*0/short_6
*0/short_6
*0/short_6
*0/short_6
C194
*68p/50V_6

AMP_MUTE# [22]

C186
*68p/50V_6

C177
*68p/50V_6

4
3
2
1

5
6

SPEAKER-CON

C169
*68p/50V_6

0_4

Quanta Computer Inc.


PROJECT : ZE6
Size

Document Number

Date:

Friday, March 11, 2011

Rev
1A

AUO/AMP
5

Sheet
1

16

of

35

17

USB for iPod charge (USB)


G547E1P81U: Enable: high active
Need infrom EC engineer modify

+3VPCU

+5VPCU

R369
C317

U22
G547E1P81U

*0.1u/10V_4
2
3

*47K_4
BC_CEN

USB_BC_EN

4
[22] USB_CHARGE_ON

4
1

5VUSB_1

8
7
6

OUT3
OUT2
OUT1

EN
GND

OC#

C314
1u/6.3V_4

U23
*TC7SH08FU

IN1
IN2

USBOC#L [8,22]
R368

0/J_4

B-test:
have charge IC function: stuff U10,U23,R369,C179,R376,R377,R380,R381
no charge IC function
: stuff R368,R378,R379,R382,R383

5VUSB_1

<Layout note>
Close to CONN

<Layout note>3528 type H=1.9mm

2A
+5VPCU
C307
C179

*0.1u/10V_4

+ C313

<Layout note>
Co-lay

Left

.1U/10V_4
100U/6.3V_3528

R380
R381

*0/J_4 USBP3-_L1
*0/J_4 USBP3+_L1

USBP3USBP3+

R382
R383

0/J_4
0/J_4

USBP3-_L1
USBP3+_L1
USBP3-_L2
USBP3+_L2

7
6

TDM
TDP

CB

DM
DP
GND
EPAD

2
3
4
9

USBP3-_L
USBP3+_L

R376
R377

*0/J_4 USBP3-_R
*0/J_4 USBP3+_R

USBP3-_L2
USBP3+_L2

R378
R379

0/J_4
0/J_4

USBP3-_L
USBP3+_L

*0/short_4

R181

*0/short_4

CN19

USBP3-_R
USBP3+_R

USBP3-_CN
USBP3+_CN

USBP3-_R
USBP3+_R

VDD
DD+
GND1

D10
*5V/30V/0.2P_4

GND6
GND5
GND7
GND8

6
5
7
8

USB_CONN

D11
*5V/30V/0.2P_4

QCI P/N & Footprint

[22] CHARGE_IC_ON

<20100128(B2A)>
Change CN14,16,17(USB CONN) from DFHS04FR201
to DFHS04FR362.

System Status: .
> Lo: AM, autodetection charger identification active.
> HI: PM, pass-through mode active, DP/DM connected to TDP/TDM.

1
2
3
4

USBP3USBP3+
USBP3USBP3+

R177

[8] USBP3[8] USBP3+

U10
*IC(8P)MAX14566AE
1
5
CEN
VCC

86% 86%
+5VPCU

[22] USB_EN#

U19
IC(8P)G547E2P81U
8
IN1
OUT3
7
IN2
OUT2
6
OUT1
4
EN#
1
GND
9
5
GND-C OC#
2
3

USB_EN#

2A
5VUSB_0

<Layout note>
Close to CONN

Right up

C17

+ C35
0.1u/10V_4

USBOC#R [8,22]

CN9

220u/6.3V_7343
R18

1
2
3
4

*0/short_4
USBP1-_CN
USBP1+_CN

[8] USBP1[8] USBP1+


R16

*0/short_4

VDD
DD+
GND1

GND6
GND5
GND7
GND8

6
5
7
8

USB_CONN

R318
*10K_4

C276
4.7u/10V_6

+3VPCU

D2
*5V/30V/0.2p_4

D1
*5V/30V/0.2p_4

5VUSB_0

<Layout note>
Close to CONN

C269

+ C16
0.1u/10V_4
*100u/6.3V_3528
R70

*0/short_4

R68

*0/short_4

Right down
CN12
1
2
3
4
D4
*5V/30V/0.2p_4

GND6
GND5
GND7
GND8

6
5
7
8

USB_CONN

D3
*5V/30V/0.2p_4

VDD
DD+
GND1

USBP0-_CN
USBP0+_CN

[8] USBP0[8] USBP0+

Quanta Computer Inc.


PROJECT : ZE6
Size

Document Number

Rev
1B

USB on Board/LED/SW/HOLE
Date:
5

Sheet

Friday, March 11, 2011


1

17

of

35

LAN (LAN)

18
+3V_LAN

R255

VDD10

*0/short_6

*0/short_6

Close To IC
C243
0.1U/16V_4

C15
0.1U/16V_4

C5
0.1U/16V_4
D

C228
0.1U/16V_4

C224

C229
0.1U/16V_4

C246
0.1U/16V_4

R252

EVDD10

+3V_S5

C237
1U/10V_4

C241
0.1U/16V_4

Close To IC Pin 13.

*4.7U/10V/8
D

R256

*0/short_6

CTRL12

Close to IC
Close To IC Pin 31.

C238
0.1U/16V_4

C10

33P/50V_4

25MCLKX1
25MCLKX2

R15

2.49K/F_4

Y1
25MHz-LAN

25MCLKX1
25MCLKX2
CTRL12
RSET

R265
GPO
LAN_LINKLED#

1K/J_4

+3V_LAN

+3V_LAN

[2] CLKREQ_LAN#

36
37
38
39

40
41
42

GND
GND
GND
GND

EEDIPIN/TDI/SPISI/SDA
EEDOPIN/LED3/SPISO
EECSPIN/TCS/SCL
VDD1
LANWAKEBPIN
VDD3
ISOLATEBPIN
PERSTBPIN

RTL8105TA-VC-CG

24
23
22
21
20
19
18
17

EEDI/SDA
LED3/EEDO
EECS/SCL
VDD10
PCIE_WAKE#
ISOLATE#

CLKREQ_LAN#_L

R251

PCIE_WAKE#

R28

*10K/J_4
*10K/J_4

EEDI/SDA

R266

10K/J_4

EECS/SCL

R267

10K/J_4

T6

+3V_LAN

R268

VDD10
*0/short_4
CLKREQ_LAN#_L

R13

HV
MDIP0
MDIN0
MDIP1
MDIN1
NC
VDD1
CLKREQBPIN

PU in CLK Gen.
C

1
2
3
4
5
6
7
8

+3V_LAN

HSIP
HSIN
REFCLK_P
REFCLK_N
VDDTX
HSOP
HSON
GNDTX

TX0P
TX0N
TX1P
TX1N

9
10
11
12
13
14
15
16

33P/50V_4

GND
GND
GND

GND
GND
GND

C8

33
34
35

RSET
CTRL12
CKXTAL2
CKXTAL1
LEDPIN/SPICSB
VDD3
GPOUTPIN
EESKPIN/LED1/TCLK/SPISCK

32
31
30
29
28
27
26
25

U2

LAN_ACTLED#

Int. PU in SB

PCIE_WAKE# [11,20]
R30
R27

1K/J_4
15K/J_4

*0/short_4

+3V

PLTRST# [4,11,20,21,22,23]

C244
*4.7U/10V/8

[8] PE1TX+
[8] PE1TX[2] CLK_PCIE_LANP
[2] CLK_PCIE_LANN
C11
C12

[8] PE1RX+
[8] PE1RX-

EVDD10
PCIE_RXP0_LAN
PCIE_RXN0_LAN

.1U/10V_4
.1U/10V_4

For Rural

TRANSFORMER (LAN)

RJ45 Connector (LAN)

U13
TX0P
TX0N
TX1P
TX1N

R9
R8
R7
R6

0/J_4
0/J_4
0/J_4
0/J_4

TX0P_R
TX0N_R
TX1P_R
TX1N_R

1
2
3
4

1
2
3
4

U15

8
7
6
5

X-TX1N
X-TX1P
X-TX0N
X-TX0P

8
7
6
5

1
2
3
4

*UCLAMP2512T.TCT

with ESD solution:R22,R13,R20,R26 need to use 1 ohm.


without ESD solution:R22,R13,R20,R26 need to use 0 ohm.

R254

LAN_LINKLED#

1
2
3
4

8
7
6
5

8
7
6
5

C240

*0.1U/50V_8

TERM9

C210
C215

C214

TDTD+
CT
NC
NC
CT
RDRD+

TXTX+
CT
NC
NC
CT
RXRX+

9
10
11
12
13
14
15
16

X-TX1N
X-TX1P
TERM0

X-TX0N
X-TX0P

LAN_ACTLED#
R242

R239

*0/J_4
C209

NS0014 LF_Bothhand

R240

R243

C213

NC4/3NC/3+

X-TX1N

RX-/1-

TERM9

NC2/2-

TX0N_R
TX0P_R

8
7
6
5
4
3
2
1

YY+

U14
TX1N_R
TX1P_R

11
12
8

*UCLAMP2512T.TCT

with ESD solution: stuff R35,U3,U8,D8


without ESD solution: remove R35,U3,U8,D8

C216

*510/J_6

+3V_LAN

CN8

X-TX1P

X-TX0N

X-TX0P

*510/J_6

+3V_LAN

*0.1U/50V_8

9
10

NC1/2+
RX+/1+
TX-/0TX+/0+
WW+

GND
GND

14
13

RJ45-CONN

D28
75/F_8

*10p/50V_4 *10p/50V_4 *10p/50V_4 *10p/50V_4

75/F_8

11/18 change connector pin define


Main:DFTJ12FR087
White LED:pin9(-),pin10(+)
Amber LED:pin11(-),pin12(+)

0.01U/25V_4

*BS3500N-C

TERM9

The value should be


0.01uF-0.4uF.

Quanta Computer Inc.

C223
1000P/3KV_1808

PROJECT : ZE6
Size

Document Number

Rev
1B

LAN RTL8105TA-VC-CG
Date:
5

Friday, March 11, 2011

Sheet
1

18

of

35

CN11
1
2
3
4
5
6
7

SATA_TXP0A
SATA_TXN0A

C45
C44

0.01u/16V_4
0.01u/16V_4

SATA_TXP0
SATA_TXN0

SATA_RXN0A
SATA_RXP0A

C42
C41

0.01u/16V_4
0.01u/16V_4

SATA_RXN0
SATA_RXP0

8
9
10
11
12
13

14
15
16
17

SATA_RXN0 [9]
SATA_RXP0 [9]

SATA_RXP0A

U18
*CM1213-04SO
1
2

SATA_TXN0A

1A

5V_SATA
C18

C19

C26

.1U/10V_4

*0.1U/10V_4

4.7U/10V/8

R36
+

MAIN_SATA

SATA_TXP0 [9]
SATA_TXN0 [9]

*0/short_8 +5V

CH1
VN
CH2

CH4
VP
CH3

SATA_RXN0A

+5V

5
4

SATA_TXP0A

C265
*0.1u/10V_4

C22
*100U/6.3V_3528

C test: unstuff C22 for Cost down

Quanta Computer Inc.


PROJECT : ZE6
Size

Document Number

Rev
1B

SATA-HDD
Date:
5

Friday, March 11, 2011

Sheet
1

19

of

35

Mini Card(MNC)

+1.5V_Mini1_VDD

20

+3V_Mini1_VDD
+3V_Mini1_VDD

[8] PE2RX+
[8] PE2RX-

15
13
11
9
7
5
3
1

[2] PE2CLK+
[2] PE2CLKCLKREQ_WLAN#

[2] CLKREQ_WLAN#

Q20
1

GND
REFCLK+
REFCLKGND
CLKREQ#
Reserved
Reserved
WAKE#

53

MINI-CARD1
MINI1_WAKE#

WLAN_LED# [15]

*0/short_8

R171

*0_8

C322

C321

C308

C309

C312

*10u/10V_8

0.1u/10V_4

0.1u/10V_4

0.1u/10V_4

0.1u/10V_4

+3V_Mini1_VDD

Q12
*3G@2N7002K
R386

4
2

USBP7+ [8]
USBP7- [8]

WLAN@0_4

WL_SMDATA
WL_SMCLK

RN1
*4.7K_4P2R

PLTRST#_2
RF_EN

R365

*0/short_4

PLTRST#

0.5A
PLTRST# [4,11,18,21,22,23]

RF_EN [22]

+1.5V

+1.5V_Mini1_VDD
R172

16
14
12
10
8
6
4
2

UIM_VPP
UIM_RESET
UIM_CLK
UIM_DATA
UIM_PWR
+1.5V
GND
+3.3V

R170
+3VSUS

WLAN_LED#_R
R366
*0/short_4

0.75A

+3V_Mini1_VDD

WL_SMDATA

*0_8
R237

LPCFRAME# [11,22]
LPCAD3 [11,22]
LPCAD2 [11,22]
LPCAD1 [11,22]
LPCAD0 [11,22]

C310
*1000p/50V_4

C311

C164

*0.1u/10V_4

*10u/10V_8

*0/short_4

+3V_Mini1_VDD
Q17
*2N7002E

[2,3] SMBCK1

*2N7002E
R373

Q19
*2N7002E

[2,3] SMBDT1

3
1

[8] PE2TX+
[8] PE2TX-

+3.3V
GND
+1.5V
LED_WPAN#
LED_WLAN#
LED_WWAN#
GND
USB_D+
USB_DGND
SMB_DATA
SMB_CLK
+1.5V
GND
+3.3Vaux
PERST#
W_DISABLE#
GND

+3V

3G_MINI_LED#

Reserved
Reserved
Reserved
Reserved
GND
+3.3Vaux
+3.3Vaux
GND
GND
PETp0
PETn0
GND
GND
PERp0
PERn0
GND
UIM_C4
UIM_C8

*0/short_4

*0_4
*0_4

RF_LED_ON R159

R371
R370

52
50
48
46
44
42
40
38
36
34
32
30
28
26
24
22
20
18

GND

PLTRST#
[2] PCLK_DEBUG

51
49
47
45
43
41
39
37
35
33
31
29
27
25
23
21
19
17

GND

[15,22] BT_POWERON#

R367
4.7K/F_4

CN20

*0/J_4

54

R372

3
[11,18] PCIE_WAKE#
+3V_Mini1_VDD

+3V_Mini1_VDD

WL_SMCLK

R227

*0/short_4

3G sku: stuff R362, Q12, don't stuff R386


W/O 3G sku: don't stuff R362,Q12, stuff R386

*10K_4

+3V_Mini2_VDD

R143

*3G@0_8

R173

*3G@0_8

+3V_Mini2_VDD

C143

+3V_Mini2_VDD
+3V

CN17

[2] PE4CLK+
[2] PE4CLKT48

CLKREQ_3G#

T23

3G_WAKE_2_R

15
13
11
9
7
5
3
1

GND
REFCLK+
REFCLKGND
CLKREQ#
Reserved
Reserved
WAKE#

53

*3G@MINI-CARD2

GND

R362

C303

C305

C319

C320

C301

*3G@0.1u/10V_4 *3G@0.1u/10V_4*3G@0.47u/6.3V_4 *3G@10p/50V_4

*3G@100K/F_4
WLAN_LED#_R
3G_MINI_LED#

3G_MINI_LED# [15]

0.5A

+1.5V
+1.5V_Mini2_VDD

USBP5+_R
USBP5-_R
R134

+3V_Mini2_VDD

*3G@0_8

3G_SMDATA
3G_SMCLK

C304

C318
+3V_Mini2_VDD
R154

*3G@1000p/50V_4 *3G@0.1u/10V_4
PLTRST#_1

R364

*3G@0_4

PLTRST#

R166

Q11

3G_EN [22]

*3G@10K_4

*3G@10K_4

*3G@2N7002E

UIM_VPP
UIM_RST
UIM_CLK
UIM_DATA
UIM_PWR

16
14
12
10
8
6
4
2

UIM_VPP
UIM_RST
UIM_CLK
UIM_DATA
UIM_PWR
+1.5V
GND
+3.3V

C302

*3G@4.7u/10V_8 *3G@0.1u/10V_4 *3G@0.1u/10V_4

[8] PE4RX+
[8] PE4RX-

52
50
48
46
44
42
40
38
36
34
32
30
28
26
24
22
20
18

+3.3V
GND
+1.5V
LED_WPAN#
LED_WLAN#
LED_WWAN#
GND
USB_D+
USB_DGND
SMB_DATA
SMB_CLK
+1.5V
GND
+3.3Vaux
PERST#
W_DISABLE#
GND

GND

[8] PE4TX+
[8] PE4TX-

Reserved
Reserved
Reserved
Reserved
GND
+3.3Vaux
+3.3Vaux
GND
GND
PETp0
PETn0
GND
GND
PERp0
PERn0
GND
UIM_C4
UIM_C8

[2,11] PDAT_SMB
R145

PDAT_SMB 3

3G_SMDATA

*3G@0_4
R156

USBP5+_R
USBP5-_R

*3G@0_4

USBP5+ [8]
USBP5- [8]
+3V_Mini2_VDD

54

3G_WAKE_R

T47

51
49
47
45
43
41
39
37
35
33
31
29
27
25
23
21
19
17

+3VSUS
+1.5V_Mini2_VDD
+3V_Mini2_VDD

1.1A

Mini Card 2 / GPS(MNC)

R150

*3G@0_4

Q13
*3G@2N7002E

+3V
[2,11] PCLK_SMB

ESD1

SIM

UIM_RST

CH1

2
UIM_CLK

Max: 7.5mA (Option)


JSIM1

GND
GND

*3G@SIM-Conn

UIM_PWR
UIM_VPP
UIM_RST
UIM_DATA

CH2

UIM_PWR

C227

*3G@27p/50V_4

UIM_DATA

C221

*3G@10p/50V_4

UIM_CLK

C231

*3G@10p/50V_4

UIM_RST

C222

*3G@27p/50V_4

*3G@0_4

1
2
3
4
5

UIM_VPP

C219

*3G@33p/50V_4

R11

GND(C5)
VCC(C1)
VPP(C6)
RST(C2)
DATA(C7)

GND
GND

USBP4+_R
USBP4-_R

[8] USBP4+
[8] USBP4-

VP
CH3

PCLK_SMB 3

R167

5
4

3G_SMCLK

UIM_VPP
*3G@0_4

UIM_DATA

*3G@CM1293-04SO

CLK(C3)
D-(C8)
D+(C4)
CT
CD

12
14

*3G@0_4

6
7
8
9
10

13
11

R14

UIM_CLK
USBP4-_R
USBP4+_R

VN

CH4

<20090604(A1A)_Qualcomm design guide>


Place 0.1uF near connector's VCC pin

UIM_PWR

C225
C226
*3G@1u/10V_6
*3G@0.1u/10V_4

Quanta Computer Inc.


PROJECT : ZE6
Size

Document Number

Date:

Friday, March 11, 2011

Rev
1B

Mini-Card/WL/3G/SIM
5

Sheet
1

20

of

35

RTS5209

for EMI issue: change R232,R233,R234,


R235,R236,R231,R211 to 33 ohm.

+3V3_IN

VCC_XD
CN18
R195
*100K_4
[4,11,18,20,22,23]

PLTRST#

SD_D1
SD_D0
SD_CLK
SD_CMD
SD_D3
SD_D2

C184
*1U/6.3V_4X

R232
R233
R234
R235
R236
R231

13
1
2
3
4
10
19
23
25
5
8
17
21

SD_CD#
SD_WP/XD_D7
SD_D1_R
SD_D0_R
SD_CLK_R
SD_CMD_R
SD_D3_R
SD_D2_R
SD_D7/XD_RDY
SD_D6/XD_RE#
SD_D5/XD_CE#
SD_D4/XD_WE#

33/J_4
33/J_4
33/J_4
33/J_4
33/J_4
33/J_4

[2] CLKREQ_CARD#

7
15
26
27

[8] PE3TX-

SD_CD#

SD_WP/XD_D7

XD_D6

39

37

SP13

HSIN

SP12

35

MS_D3/XD_D4

REFCLKP

SP11

34

MS_D6/XD_D3

[2] CLK_CARDREADER#

REFCLKN

SP10

33

MS_D2/XD_D2

AV12

SP9

32

MS_D0/XD_D1

SP8

31

MS_D4/XD_D0

[8] PE3RX+

0.1U/10V_4X

PCIE_RXP2_R 6

[8] PE3RX-

C199

0.1U/10V_4X

PCIE_RXN2_R 7

C200

0.1U/10V_4X

*0/short_6

SP7

30

MS_D1/XD_WP#

GND

SP6

29

MS_D5/XD_ALE

DV12

DV12

SP5

28

MS_BS/XD_CLE

DV12_S

27

DV12_S

GND

26

GND

SD_D2

25

SD_D2

HSON

VCC_XD

10

Card1_3V3

+3V3_IN

11

3V3_IN

12

Card2_3V3

TP8

XD-D0
XD-D1
XD-D2
XD-D3
XD-D4
XD-D5
XD-D6
XD-D7

37
38
39
40
41
42
43
44

MS_D4/XD_D0
MS_D0/XD_D1
MS_D2/XD_D2
MS_D6/XD_D3
MS_D3/XD_D4
MS_D7/XD_D5
XD_D6
SD_WP/XD_D7

6
24

MS-GND1
MS-GND2

XD-GND1
XD-GND2
XD-GND3

36
46
47

VCC_XD
C203

4.7U/6.3V_6X

C202

0.1U/10V_4X

C315

C306

C208

0.1u/10V_4

0.1u/10V_4

0.1u/10V_4

C316
4.7U/10V/8

SD_D3
24
SD_D3

SD_CMD
23
SD_CMD

SD_CLK
22
SD_CLK

SD_D0
21
SD_D0

SD_D1
20
SD_D1

SP3

SP2

SP1

SP4
SD_D4/XD_WE# 19

15

SD_D5/XD_CE# 18

14

GND

13

GND

*PBY160808T-601Y-N_1A DV12

XD_CD#

L23

DV33_18

AV12

XD_CD#
SD_D7/XD_RDY
SD_D6/XD_RE#
SD_D5/XD_CE#
MS_BS/XD_CLE
MS_D5/XD_ALE
SD_D4/XD_WE#
MS_D1/XD_WP#

C201
0.1U/10V_4X

XD_CD#

C204
4.7U/10V/8

RTS5209-GR

GND

SD_D6/XD_RE# 17

R230

+3V

HSOP

SD_D7/XD_RDY 16

Zdiff = 100 ohm

C198

33/J_4

28
29
30
31
32
33
34
35

XD-CD
XD-R/B
XD-RE
XD-CE
XD-CLE
XD-ALE
XD-WE
XD-WP

12/06 change connector pin define and footprint


Main:DFHS44FR015
MS_D7/XD_D5

HSIP

AV12

R211

MS-VCC
MS-BS
MS-DATA1
MS-DATA0
MS-DATA2
MS-INS
MS-DATA3
MS-SCLK

45

CM7R-052-H-D

4.7U/6.3V_6X

MS_CLK

SP14

SP15

SD_CD#

38

TP7

MS_INS#

40
MS_INS#

EESK

TP6
EECS

41

EEDO

42
EESK

PLTRST#

43
EECS

EEDO

CLKREQ_CARD#

45

44

PERST#

10P/50V_4

XD-VCC

SD-GND1
SD-GND2
SD-WP-GND
SD-CD-GND

22
9
11
12
14
16
18
20

add C196 for EMI.

C197

MS_BS/XD_CLE
MS_D1/XD_WP#
MS_D0/XD_D1
MS_D2/XD_D2
MS_INS#
MS_D3/XD_D4
MS_CLK_R

C196

*0/short_4 MS_CLK

[2] CLK_CARDREADER

DV33_18

Zdiff = 100 ohm

XD_D6
R221

36

Zdiff = 100 ohm

47

48
RREF

[8] PE3TX+

3V3_IN

U11

CLK_REQ#

6.2K/F_4

CARDREF

R194

46

0.1U/10V_4X

GPIO/EEDI

TP5

+3V3_IN
C180

VCC_XD

SD-VCC
SD-CD-SW
SD-WP-SW
SD-DAT1
SD-DAT0
SD-CLK
SD-CMD
SD-DATA3
SD-DAT2
MMC-DATA7
MMC-DATA6
MMC-DATA5
MMC-DATA4

C207
*4.7U/6.3V_6X

C205
0.1U/10V_4X

add C206 for EMI and close to chip pin

C206
SD_CLK_R
10P/50V_4

Quanta Computer Inc.


PROJECT : ZE6
Size

Document Number

Date:

Friday, March 11, 2011

Rev
1A

RTS5138
5

Sheet
1

21

of

35

SHBM=0: Enable shared memory with host BIOS

30mil

+A3VPCU
C7

C6

.1U/10V_4

C1

.1U/10V_4

.1U/10V_4

VCC1
VCC2
VCC3
VCC4
VCC5

U1

LCLK_EC

[11] CLKRUN#
[9] GA20

121

[9] KBRST#

122

[10] EC_SCI#

29

[14] EC_FPBACK#

6
124

[16] AMP_MUTE#
[4,11,18,20,21,23]

PLTRST#

[20] RF_EN

123

[9] SERIRQ

125
9

[11] EC_SMI#

<EMI>
LCLK_EC

R4
*22/J_4

C2
*10P/50V_4

FOR CPU Thermal Sensor


FOR VGA

[15]
[15]
[15]
[15]
[15]
[15]
[15]
[15]

MX0
MX1
MX2
MX3
MX4
MX5
MX6
MX7

[15]
[15]
[15]
[15]
[15]
[15]
[15]
[15]
[15]
[15]
[15]
[15]
[15]
[15]
[15]
[15]

MY0
MY1
MY2
MY3
MY4
MY5
MY6
MY7
MY8
MY9
MY10
MY11
MY12
MY13
MY14
MY15

[24] MBCLK
[24] MBDATA
[4] 2ND_MBCLK
[4] 2ND_MBDATA
T4
T5
[15] TPCLK
[15] TPDATA

MX0
MX1
MX2
MX3
MX4
MX5
MX6
MX7

54
55
56
57
58
59
60
61

MY0
MY1
MY2
MY3
MY4
MY5
MY6
MY7
MY8
MY9
MY10
MY11
MY12
MY13
MY14
MY15

53
52
51
50
49
48
47
43
42
41
40
39
38
37
36
35
34
33

MBCLK
MBDATA
2ND_MBCLK
2ND_MBDATA

TPCLK
TPDATA

[15,20] BT_POWERON#
[11] SUSCLK

70
69
67
68
119
120
72
71
10
11

R21

*0/short_4
E775_32KX1

77

R3

*0/short_4

12
13

If PECI 3.0 access functionality is not used,


connect VTT pin to GND.

C217

C218

.1U/10V_4

<20090602(A1A)_Vendor suggest>
Place 10nF-0.1uF capacitors for
every AD input. And close to the AD
input.

4.7U/6.3V_6

3G_EN

R22

10K_4

1/13 Comfirm by vendor mail :


Disabled ('1') if using FWH device on LPC.
Enabled ('0') if using SPI flash for both system BIOS and EC firmware
D

+3VPCU
C9

E791AGND

LFRAME
LAD0
LAD1
LAD2
LAD3
LCLK

GPIO90/AD0
GPIO91/AD1
GPIO92/AD2
GPIO93/AD3

A/D

GPIO94/DA0
GPI95/DA1
GPI96/DA2

D/A

GPIO11/CLKRUN

97
98
99
100
101
105
106

.01U/16V_4
BATLED0#
BATLED1#

TEMP_MBAT [24]
R258

ICMNT_EC

*0/short_4

C234

E791AGND

ICMNT [24]

R17
R29

100K/J_4
100K/J_4

<20090831(A1A)_EC team suggest>


1.change R7027/R7028 to 1M or 100K ohm
2.change PWR/SUS LED's power from +3VPCU to +3V_S5 or +3VSUS
can reduce pull-high resistor of SUSLED#/PWRLED#

3300P/50V_4

GPIO85/GA20
KBRST/GPIO86
GPIO01/TB2
GPIO02
GPIO03
GPIO04
GPIO05
GPIO06/IOX_DOUT/RTS1
GPIO07
GPIO16
GPIO30
GPIO36/CTS1
GPIO41
GPIO42/SCL3B/TCK
GPIO43/SDA3B/TMS
GPIO44/TDI
GPIO
GPO47/SCL4
GPIO50/PSCLK3/TDO
GPIO51
GPIO52/PSDAT3/RDY
GPIO53/SDA4
GPIO70
GPIO71
GPIO72
GPIO75/SPI_SCK
GPO76/SHBM
GPIO77
GPIO81
GPO82/IOX_LDSH/TEST
GPO84/IOX_SCLK/XORTR
GPIO97

LPC

ECSCI/GPIO54
GPIO24/LDRQ
GPIO10/LPCPD
LREST
GPIO67/PWUREQ
SERIRQ
GPIO65/SMI
KBSIN0
KBSIN1
KBSIN2
KBSIN3
KBSIN4
KBSIN5
KBSIN6
KBSIN7

KBSOUT0/JENK
KBSOUT1/TCK
KBSOUT2/TMS
KBSOUT3/TDI
KB
KBSOUT4/JEN0
KBSOUT5/TDO
KBSOUT6/RDY
KBSOUT7
KBSOUT8
KBSOUT9/SDP_VIS
KBSOUT10/P80_CLK
KBSOUT11/P80_DAT
KBSOUT12/GPIO64
KBSOUT13/GPIO63
KBSOUT14/GPIO62
KBSOUT15/GPIO61/XOR_OUT
GPIO60/KBSOUT16
GPIO57/KBSOUT17
GPIO17/SCL1
GPIO22/SDA1
GPIO73/SCL2
GPIO74/SDA2
GPIO23/SCL3
GPIO31/SDA3

GPIO56/TA1
GPIO20/TA2/IOX_DIN_DIO
GPIO14/TB1

TIMER

SMB

GPIO37/PSCLK1
GPIO35/PSDAT1
GPIO26/PSCLK2
GPIO27PSDAT2

PS/2

GPIO00/32KCLKIN
VTT
PECI
NPCE791L

GPIO15/A_PWM
GPIO21/B_PWM
GPIO13/C_PWM
GPIO32/D_PWM
GPIO45/E_PWM
GPIO40/F_PWM/RI1
GPIO66/G_PWM
GPIO33/H_PWM/SOUT1

GPIO87/CIRRXM/SIN_CR
GPIO34/SIN1/CIRRXL
GPIO46/CIRRXM/TRST
GPO83/SOUT_CR/TRIST

IR

F_SDI/F_SDIO1
F_SDO/F_SDIO0
F_CS0
F_SCK

FIU

GPIO55/CLKOUT/IOX_DIN_DIO

GND1
GND2
GND3
GND4
GND5
GND6

3
126
127
128
1
2

5
18
45
78
89
116

[11,20] LPCFRAME#
[11,20] LPCAD0
[11,20] LPCAD1
[11,20] LPCAD2
[11,20] LPCAD3
[2] LCLK_EC

C220

.1U/10V_4

VDD

C13

.1U/10V_4

1
BAS316

L3
PBY160808T-250Y-N/3A/25ohm_6

VCC_POR

VCORF

C14

.1U/10V_4

AGND

C3

4.7U/6.3V_6

103

0.03A (30mils)

+3VPCU_EC
C212

SHBM

D26

+3V_VDD_EC

<Layout note>
Place every 0.1uF
close to every
power pin

+3V

10mA

4.7U/6.3V_6

E791AGND

E791AGND

*0/J_6

VREF

64
79
95
96
108
93
94
114
109
15
80
17
20
21
24
25
26
27
28
73
74
75
82
83
84
91
110
112
107

ACIN [24]
R24
R10

SM BUS PU(KBC)

NBSWON# [15,23]
USBOC#R [8,17]
USBOC#L [8,17]
LID# [14]

*0/J_4
*0/J_4

CHARGE_IC_ON

+3VPCU

MBCLK
MBDATA

R20
R19

4.7K/J_4
4.7K/J_4

2ND_MBCLK
2ND_MBDATA

R264
R263

10K_4
10K_4

[17]

+3V

T3
VRON [23,26]

HWPG
THERM_ALERT#_1 R5

S5_ON
HDMI_IN

T1

PWROK_EC_uR
RSMRST#_uR

R25
R26

T25

*0/J_4

THERM_ALERT# [4,11]
SUSB# [11]
USB_CHARGE_ON [17]
D/C# [24]
S5_ON [23,25,30]

D37

SPI FLASH(KBC)

SUSC# [11]
ECPWROK [11,23]
EC_RSMRST# [11,23]
MAINON [23,27,28,29]
3G_EN [20]

*0/short_4
*0/short_4

BAS316

DNBSWON#

SPI_SDI_uR

R245

22_4 SPI_SDI_uR_R

[11,23]

USB_EN# [17]
R246

+3VPCU

31
117
63

+3VPCU
U12

10K_4

SPI_SDO_uR_R

SPI_SCK_uR_R

SPI_CS0#_uR

32
118
62
65
22
16
81
66

SO

VDD

SI

HOLD

SCK
CE

WP
VSS

8
7

R241
3.3K_4

HOLD#

C211
.1u/10V_4

MX25L1606EM2I-12G

SUSON [5,23,27,29]
FAN_SIG [4]

Winbond W25Q16CVSSIG
EON
EN25F40-100HIP
MXIC
MX25L1606EM2I-12G

CONTRAST [14]
PCBEEP [16]
PWRLED# [15]
BATLED0# [15]
CPUFAN# [4]
SUSLED# [15]

AKE38ZP0N02
AKE38ZA0Q00
AKE38FP0Z01

BATLED1# [15]

113
14
23
111

1/13 Comfirm by vendor mail :


If the Southbridge enables 'Long Wait Abort' by
default, the flash device should be 50MHz (or faster)

<20090721_FAE suggestion>
Stuff 100K and close to EC side
for improving power consumption
T24

86
87
90
92

SPI_SDI_uR
SPI_SDO_uR
SPI_CS0#_uR
SPI_SCK_uR

SPI_SDI_uR

30

ECDB_CLOCK

85

VCC_POR#

R23

47K/J_4

104

VREF_uR

R12

*0/short_4 +A3VPCU

R248

22/J_4 SPI_SDO_uR_R

R247

22/J_4 SPI_SCK_uR_R

+3V

HWPG
R244

T2

R2

100K/J_4
10K_4

+3VPCU
[23,29] HWPG_VCCGFX

VCORF_uR 44

2.2/J_6
2

19
46
76
88
115

+3VPCU

R250

102

PBY160808T-250Y-N/3A/25ohm_6

AVCC

L1

R249
1

I/O ADDRESS SETTING(KBC)

EC (KBC)

[5,23,27]

HWPG_1.5V

[23,28,29]

HWPG_1.05V

D27

BAS316

D29

*BAS316

D23

*BAS316

D24

*BAS316

D25

*BAS316

R1

HWPG [11,23]

*0/short_4

[29] HWPG_1.8V
[25] SYS_HWPG
C4
1U/6.3V_4

E791AGND

E791AGND

INTERNAL KEYBOARD STRIP SET (KBC)

INTERNAL KEYBOARD STRIP SET(KBC)

10/26 UnStuff

SM BUS ARRANGEMENT TABLE


+3VPCU

MY0
RP2
10
MX4 9
MX5 8
MX6 7
MX7 6

10K/J_10P8R
1 MX3
2 MX2
3 MX1
4 MX0
5

SM Bus 1

Battery

SM Bus 2

CPU thermal sensor

R253

+3VPCU

*10K_4

Quanta Computer Inc.

+3VPCU

PROJECT : ZE6
Size

Document Number

Date:

Friday, March 11, 2011

Rev
1A

WPCE781 & FLASH


5

Sheet
1

22

of

35

5
6
7

2
3
4

HOLE15

5
6
7

2
3
4

HOLE13

5
6
7

2
3
4

5
6
7

8
1
9

2
3
4

8
1
9

5
6
7

HOLE12

8
1
9

2
3
4

HOLE8

8
1
9

HOLE5

Power Sequence Connector 30pin (CPU)

Hole

8
1
9

EMI

CN15

5
6
7

2
3
4

*hg-tc276bc256d98p2

*HG-C276D98P2

*HG-C276D98P2

HOLE4

5
6
7
8
1
9

2
3
4

*HG-C276D98P2

HOLE16

8
1
9

5
6
7
8
1
9

2
3
4

*HG-C276D98P2

HOLE14

2
3
4

5
6
7

2
3
4

*HG-C276D98P2

*HG-C276D98P2

[15,22] NBSWON#

5
6
7

*HG-TC276BC315D98P2

[22,27,28,29] MAINON

[22,29]
[22,26]
[2,26]
[11,22]
[4,11,18,20,21,22]

NBSWON#
+3V_S5
EC_RSMRST#
SUSON
+1.5VSUS
MAINON
+5V
+1.5V
+1.8V
HWPG_VCCGFX
VRON
VR_PWRGD_CK410#
ECPWROK
PLTRST#

+3V_S5

[11,22] EC_RSMRST#
[5,22,27,29] SUSON

HOLE10

8
1
9

*HG-C276D98P2

HOLE9

8
1
9

*HG-C276D98P2

+1.5VSUS
+5V
+1.5V
+1.8V

HWPG_VCCGFX
VRON
VR_PWRGD_CK410#
ECPWROK
PLTRST#

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29

S5_ON
+5V_S5
DNBSWON#
+3VSUS
HWPG_1.5V
+3V
+1.05V
HWPG_1.05V
VCCGFX
HWPG
VCORE
IMVP_PWRGD
TPT_PWROK
PLTRST#

S5_ON [22,25,30]
+5V_S5
DNBSWON# [11,22]
+3VSUS
HWPG_1.5V [5,22,27]
+3V
+1.05V
HWPG_1.05V [22,28,29]
VCCGFX
HWPG [11,22]
VCORE
IMVP_PWRGD [4,11,26]
TPT_PWROK [11]
PLTRST# [4,11,18,20,21,22]

*30pin POWER SEQ CONN


HOLE2

HOLE3

5
6
7

2
3
4

5
6
7

HOLE19
h-c197d63p2

1
HOLE21
*3G@h-c197d63p2

*HG-TC276BC315D98P2

*HG-TC276BC315D98P2

HOLE18
h-tc177bc295d126p2

HOLE17
h-tc177bc295d126p2

HOLE1
*hg-c276do94x106p2

5
6
7
8
1
9

2
3
4

HOLE6
*O-ZE6-2

*HG-TC276BC315D98P2

HOLE20
*3G@h-c197d63p2

2
3
4
8
1
9

5
6
7
8
1
9

2
3
4

8
1
9

HOLE7

PAD1

GND

11

HWPG_1.5V

21

NBSWON#

12

MAINON

22

S5_ON

13

+3V

23

VCORE

+3V_S5

14

+5V

24

VR_PWRGD_CK410#

+5V_S5

15

+1.05V

25

EC_RSMRST# 16

+1.5V

26

ECPWROK

DNBSWON#

17

HWPG_1.05V

27

TPT_PWROK

SUSON

18

+1.8V

28

H_PWRGD

+3VSUS

19

VCCGFX

29

PLTRST#

10

+1.5VSUS

20

HWPG_VCCGFX

30

RESERVE

HWPG
VRON

IMVP_PWRGD

HOLE11
*O-ZE6-3

Quanta Computer Inc.


PROJECT : ZE6
Size

Document Number

Date:

Friday, March 11, 2011

Rev
1A

HDMI(1/2)
5

Sheet
1

23

of

35

VA1

PJ1

PL3
HI0805R800R-00/5A/80ohm_8
VA

1
2
3

VA2

3
2

8
7
6
5

3
PC63
0.1u/50V_6

PR102
220K/F_6

1
2
3

CSIP_1

VIN_SRC

PC80
0.1u/50V_6

PC79
2200p/50V_4

8
7
6
5

PR6
33K_6

PD10
SMAJ20A

PC65
0.1u/50V_6

1
2

PD8
SW1010CPT

30

PQ35
AO4427

VIN
2

PC66
2200p/50V_6

PC64
0.1u/50V_6

7
6
5
4

PR116
0.01_0612

PR101
220K/F_6

PR7
10K_6

D/C#

[22]

PR103
*0/short_4

1
2

PQ33
AO4427

PD9
SBR1045SP5-13
1

POWER_JACK
dcjk-2dc2003-000111-3p-v

PQ34
IMD2AT108

VIN_SRC

2
PQ1
DMN601K-7
1

CSIP_1
VIN
PC71
1u/10V_4
PR106
10/F_6

PR108
10/F_6
PC6
2200p/50V_4

PR4
4.7_6

PC67
0.1u/25V_4

PC78
1u/10V_4

ISL88731_VDDP

PR2
100K/F_4

VCC

VDDP
BOOT

PR113
2.7_6
88731B_2
25
24

ISL88731_UGATE

PHASE

23

ISL88731_PHASE

LGATE

20

ISL88731_LGATE

PGND

19

SDA

UGATE

10

SCL

13

ACOK

4
PQ2
AON7410

PR115
0.01_0612
PL6
6.8uH_7X7X3
1

BAT-V

MBCLK

VDDSMB

PC74
0.1u/50V_6
88731B_1

PC76
4.7u/25V_8

3
2
1

11
MBDATA

CSSN

NC
GND
GND
GND
GND
CSSP

+3VPCU

21

26

1
33
32
31
30
28

PD11
*RB500V-40

+3VPCU
PC73
1u/10V_4

PC7
0.1u/50V_6

CSIN
27

CSIP
C

PR5
49.9/F_4

PC75
0.1u/25V_4

PU7
ISL88731C

DCIN

22

DCIN

88731ACSET

ACIN

VREF

ICOMP

CSOP

18 CSOP

CSON

HI0805R800R-00/5A/80ohm_8
PL4

NC

TEMP_MBAT [22]
PR104
2.21K/F_4

PC69
47p/50V_4

PC70

PC68
0.1u/25V_4

17 CSON
PR117
*0/short_4
16

BAT-V

PR120
10/F_6

CSOP_1
PR114
100_4

VBF

15

GND

29

BAT-V

BAT-V

PC72
100p/50V_4
PC1
*1u/10V_4

PC4
0.01u/25V_4

47p/50V_4

ICMNT

PR111
*0/short_4
PR109
100_4

PC9
10u/25V_1206
PC8
10u/25V_1206

GND

VCOMP

PC5
2200p/50V_4

12

NC

NC

ICM

BAT-V

100_4

14

PR107
TEMP_MBAT_C

NC

MBAT+

HI0805R800R-00/5A/80ohm_8
PL5

10 1
2
3
4
5
6
7
9 8
PJ2
bat-btj-08tc0b-8p-l-v
Batt_Conn

PR112
100K_4

CSOP_1

PC10
2200p/50V_4

PC77
0.1u/25V_4

+3VPCU
B

PC11
0.01u/25V_4

4
PQ43
AON7410

PR121
10/F_6

PR105
82.5K/F_4

PR1
22K/F_4

PR3
2.2/F_4

3
2
1

[22] ACIN

PR110
100_4

PC2
0.01u/25V_4

ISL88731 thermal pad


tie to Pin12
ICMNT

[22]

PC3
*0.01u/25V_4

PU6
*CM1293A-04SO

MBCLK [22]
MBDATA [22]

TEMP_MBAT

CH1

VN

CH2

CH4

VP

CH3

MBDATA
+3VPCU
MBCLK

Quanta Computer Inc.

Add ESD diode base on EC FAE suggestion

PROJECT : ZE6
Size

Document Number

Rev
1A

CHARGER (ISL88731)
Date:
5

Sheet

Friday, March 11, 2011


1

24

of

35

MAIND

SYS_SHDN#

MAIND [27,29]

SUSD

SYS_SHDN#

Ven=7.23V

TP13

TP16
[22] SYS_HWPG

VIN

+3VPCU

VIN

VL

24

+5V_FB

4.7u/6.3V_6

17

FB1

PR180
*Short_4

LGATE2
OUT2
FB2

+3V_TON

10

+3V_DH

+3V_B

11

+3V_LX

12

+3V_DL

+3VPCU

+3V_FB

PC129
0.1u/50V_6
PR174
1/F_6

TP12

PR176
*4.7_6

PR178
6.81K/F_4
+

4
PQ47
AON7702

PC131
0.1u/50V_6
PC132
*680p/50V_6

PC133
*680p/50V_6

+3VPCU
TP10

PL11
2.2uH_7X7X3
+3VPCU

8223_EN
PR179
10K/F_4

+3VPCU
3.3Volt +/- 5%
TDC : 3A
PEAK : 4A
OCP : 5A
Width : 120mil

3
2
1

REF

LGATE1
VOUT1

4.7u/6.3V_6

PC123

8223_EN

VREG5

PHASE2

+3V_SKIP

PC126
4.7u/25V_8

19

PHASE1

14

3
2
1

+5V_DL
+5VPCU

BOOT2

GND

20

UGATE2
PU3
RT8223M

GND

+5V_LX

UGATE1
BOOT1

PR167
*0/short_4

15

PC130
0.1u/50V_6

22

1
2
3

PC117
220u/6.3V_6X4.2

PQ46
AON7702

PR177
*4.7_6

PR169
*0_4

PQ45
AON7410

TONSEL

25

21

+5V_B

PR175
15.4K/F_4

PC125
2200p/50V_6

SKIPSEL

PGOOD

ENTRIP2

+5V_DH

EN

23

PR173
1/F_6

16
13

+3V_PG

PC128
0.1u/50V_6

VIN

SYS_SHDN#

1
2
3

PL10
2.2uH_7X7X3

PR166
*0_4

PR172
*0/short_4

VREG3

PQ44
AON7410

PC124
1u/6.3V_4

PR171
330K/F_4

ENC

+5VPCU
5 Volt +/- 5%
TDC : 4.7A
PEAK : 6.2A
OCP : 7A
Width : 180mil

ENTRIP1

PR170
100K/F_4

TP9

8223_VIN

PC122
0.1u/25V_4

PR168
*0/short_4

PC121
2200p/50V_6

18

PC120
4.7u/25V_8

PC127

1
2

PC119
*100u/25V_6X5.8

+5VPCU

+5VPCU

TP15

+3VPCU

VIN
PR165
10_8

PR164
665K/F_4

TP11

8223REF

VIN

VIN

[4,26,30]

SUSD [29]
TP14

PC134
0.1u/10V_4

PR184
10K/F_4

PR181
100K/F_4

PR182
80.6K/F_4

PR183
56.2K/F_4

PC118
220u/6.3V_6X4.2

+5V_DL

PD12
CHN217

L(ripple current)
=(9-5)*5/(2.2u*0.4M*9)
=2.525A
Iocp=7-(2.525/2)=5.74A
Vth=5.74A*14mOhm=80mV
R(Ilim)=(80mV*10)/10uA
~80.323K

PC135
0.1u/50V_6

OCP:7A

PR185
*0_6
+3V_DL

L(ripple current)
=(9-3.3)*3.3/(2.2u*0.5M*9)
~1.9A
Iocp=5-(1.9/2)=4.05A
Vth=4.05A*14mOhm=56.7mV
R(Ilim)=(56.7mV*10)/10uA
~56.7K

PR186
*0/short_6

PR187
*0/short_6

1
PC137
0.1u/50V_6

OCP:5A

PR188
*0/short_6

2
PD13
CHN217

3
PC136
0.1u/50V_6

+15V_ALWP

+15V
PR189
22_8

PC138
0.1u/50V_6

+3VPCU
+5VPCU

+5VPCU

+3VPCU
+3VPCU

PR193
1M_6

PR194
*1M_6

SUSD

PR195
1M_6

2
PQ25
AO3404

TDC : 0.148A
PEAK : 0.2A
Width : 10mil

PQ24
AO3404

+3VSUS

+3V_S5

PQ50
DMN601K-7
PQ51
DMN601K-7

PC139
1000p/50V_4

+5V_S5

+5V

TDC : 0.008A
PEAK : 0.01A
Width : 10mil
5

S5D
PQ26
AO3404

PQ19
AO3404

MAIND 2

PQ32
AO3404

PQ49
DMN601K-7

MAIND

3
2

PQ48
DTC144EU

S5_ON

2,23,30]

S5D
A

TDC : 1.32A
PEAK : 1.76A
Width : 60mil

PR192
22_8

PR191
22_8

VIN

PR190
1M_6

+15V

+5V_S5

+3V_S5

VIN

TDC : 1.627A
PEAK : 2.2A
Width : 70mil
3

Quanta Computer Inc.

+3V

TDC : 1.496A
PEAK : 2A
Width : 60mil

PROJECT : ZE6
Size

Document Number

Rev
1A

SYSTEM 5V/3V (RT8223M)


Date:
2

Friday, March 11, 2011

Sheet
1

25

of

35

12/10 : PR141 need to add after thermal final tune.


+1.05V
[4] H_PROCHOT#
SYS_SHDN#

*68/F_4

PR9

*0_4

PR141

*0_4

TP2

PR12
10K/F_4

PR123
2.2_6

PC82
0.22u/25V_6

PR119

[4] VID1

15
14

[4] VID0
PR22

[4,11] ICH_DPRSTP#

*0/short_4 6

PR23

[4,11] PM_DPRSLPVR

499/F_4

25

26

1
2
3
DL

PC89

D0
CSP

DPRSTP

MAX8796GTJ+

CSN

[4,11,23]

PR137

1K/J_4

IMVP_PWRGD
[22,23] VRON
PR138

[2,23] VR_PWRGD_CK410#

*0/short_4

PR132

*0/short_4

PR133

*0/short_4

+
PC92
330u/2V_7343

PC17
330u/2V_7343

PC15
*680p/50V_6

ESR=9m
8796CSP

AGND

Load-line=-5.9mV/A
for Pine Trial-M

PR129

*0/short_8

PR146

*0/short_8

1000p/50V_4

FB_SRC

PR21

10/F_4

GNDS

PR14

10/F_4

PC86

10K/F_4
PR134
*0/short_4

PR15
10K/F_4

8796CSN
PR19
4.02K/F_4

PC83
100p/50V_4
PR131

PR122
10K_6_NTC

2.74K/F_4

VIN
+3V

PR16
PR24
*4.7_6

1000p/50V_4

PC12

IVZ .+]

PQ37
AOL1718

PR130
200K/F_4

W6: S)[ 5721.

PR17
*0/short_4

1000p/50V_4

33

PGND

CCV

21

32

V3P3

GNDS

13

12

SHDN

10

11

TON
9

CLKEN

FB
PWRGD

THRM

VCORE

PC87
0.22u/6.3V_4

PWR

PR140
*100K/F_4_NTC

TP4

OCP:14A

PR18
1.8K/F_4

PU8
DPRSLPVR

13K/F_4
B

VID5

LX

DH

24
BST

28

27

29
TIME

30
ILIM

D1

PR20

*0_8

PL7
1uH
8796DL

22

2200p/50V_4

PWR

PR124

8796LX

D2

*2.7K/F_4
8796THRM

*0_8

VID6

D3

PR125
2.7K/F_4

8796VCC

*0_8

PR127
+3VPCU

TP3

PC16

0.1u/50V_6
PR126

PR128

DCR=3m

PC88

VID3

PQ36
AOL1448

D4

PC84

PC90
100u/25V_6X5.8

D5

16

PC14
4.7u/25V_8

1
2
3

17

[4] VID2

*0_8

VID 1.0V

[4] VID3

D6

PGDIN

18

VRHOT

19

PR135
+3VPCU

20

VCC

23
VDD

31

10/F_6

[4] VID4

*0_8
VID2

PC13
2200p/50V_6

8796DH

PR11

[4] VID5

PR139

VID4

12.7K/F_4

PC81
1u/10V_4

[4] VID6

*0_8

1
1

8796VCC

PC85
1u/10V_4

*0_8

PR25

VID0

VIN

+5V

PR136

VID1
PR118
60.4K/F_4

TP1

+5V

[4,25,30]

PR8

VCC_SENSE

[6]

VSS_SENSE [6]

1000p/50V_4

FB_SRC

PR13

*10/F_4

GNDS

PR10

*10/F_4

VCORE

C187
*.1U/10V_4

Connect to output cap GND

+3V

PC91
*470p/50V_4

Quanta Computer Inc.


PROJECT : ZE6
Size

Document Number

Rev
1A

VCore( IMAX8796GTJ+)
Date:
5

Friday, March 11, 2011

Sheet
1

26

of

35

33

[PWM]
PC26
10u/6.3V_8

30mil
0.75A

PR45
*0/short_6

PC27
0.1u/50V_6

8207A_VBST

+0.75V_DDR_VTT
D

VIN

8207A_LX
8207A_DL

PC93
4.7u/25V_8

PC22
10u/6.3V_8

19

VTTGND

DRVL

LL

DRVH

VBST

PC96
0.1uF/50V_6
PL8
2.2uH

PGND

VTTSNS

PQ39
AON7410

CS_GND

PC94
2200p/50V_6

PC28
4.7u/25V_8

add for EMI


+1.5VSUS

18

+1.5VSUS

+1.5VSUS
1.5 Volt +/- 5%
TDC : 7A
PEAK : 9A
OCP : 10A
Width : 280mil

17
5

VLDOIN

VTT

GND

3
2
1

21

20

23

22

25

4
24

PC23
10u/6.3V_8

PC19
1u/10V_4

NC

13

1
PR28

PR29
100K/F_4

+3V_S5

VIN

(For RT8207A

PR32
10K/F_4

2
*0/short_4

SUSON [5,22,23,29]

2
*0/short_4

MAINON [22,23,28,29]

PQ38
AON7702
PC29
1000p/50V_4

PC101
330u/2V_7343

PC35
10u/6.3V_8

add for EMI

PC32
1000pF/50V_4

add for EMI

400KHZ) close to PC2016

+5V_S5

PR34
*0_4

PC18
*33p/50V_6

PC20
1u/10V_4

HWPG_1.5V [5,22,23]

S5_1.8V 1
PR27

PR33
5.1/F_6

PR30
620K/F_4

S3_1.8V

+5V_S5

14

PR41
*0/short_6

PR40
*0/short_6

PR48
2.2/F_4

PR36
13K/F_4

15

12

S5
11

S3

PGOOD

10

COMP

V5FILT

16

3
2
1

VTTREF
VDDQSET

PC21
0.033u/50V_6

V5IN

VDDQSNS

+5V_S5
C

CS

PU1
RT8207L

MODE

+SMDDR_VREF

GND

NC

+1.5VSUS

15mil
0.375A

8207A_DH

Vout = (PR150/PR149) X 0.75 + 0.75


L(ripple current)
=(19-1.5)*1.5/(2.2u*400k*9)
~1.57A
Vtrip= (10-1.57/2)*14mohm=0.129V
RILIM=Vtrip/10uA~12.901Kohm

8207A_SET
S5_1.8V

S3_1.8V
PR26

*0_4

+1.5VSUS

PR31
10K/F_4

MAIND

[25,29] MAIND

PQ27
AO3404

+1.5V

TDC : 2A
PEAK : 2.7A
Width : 80mil

S3

S5

+1.5VSUS

REF

S0

ON

ON

VTT
ON

S3

ON

ON

OFF

S4/S5

OFF

OFF

OFF
A

Quanta Computer Inc.


PROJECT : ZE6
Size

Document Number

Rev
1A

DDR 1.5V(TPS51116)
Date:
5

Sheet

Friday, March 11, 2011


1

27

of

35

34
VIN
+5V_S5
D

2
PC56
*0.1u/50V_6

3
4

HWPG_1.05V

6
5
14

UGATE

VOUT

PHASE

VDD
FB
PGOOD

OC
VDDP
LGATE

GND

PGND

NC

TPAD

3
2
1

12

UGATE-1.05V

11

PHASE-1.05V

PL9
2.2uH_7X7X3

PR95
5.62K/F_4

10

PQ41
AON7410

PC61
1u/10V_4

LGATE-1.05V

PR163
*4.7_6

PQ42
AON7702

7
17

PR91
10K_4

TON

13

PC113
0.1u/10V_4

BOOT

16

EN/DEM

PC62
0.1u/50V_6

3
2
1

15
+3V

[22,23,29]

PR93
*0/short_6

+1.05V
PC58
4.7u/10V_6

G5602

MAINON

PU5
PR92
*0/short_4

PC116
4.7u/25V_8

PR94
2.2/F_6

PR90
1M/F_4

[22,23,27,29]

PC114
2.2n/50V_4

PD7
RB500V-40

PR87
10_6

PC115
*680p/50V_6

NC

PC111
330u/2.5V_6X4.2

PC57
1u/10V_4

PC112
*10u/6.3V_8

PC55
*1000p/50V_6

R1

PR89
4.02K/F_4

PC54
*33p/50V_6

+1.05VSUS
1.05 Volt +/- 5%
TDC : 5.5A
PEAK : 7.3A
OCP : 9A
Width : 220mil

VOUT=(1+R1/R2)*0.75

1.05V_FB

R2

PR88
10K/F_4
PR86
*0/short_6

PR85
*0/short_6

TON=3.85p*RTON*Vout/(Vin-0.5)
Frequency=Vout/(Vin*TON)
TON=3.85p*1M*1/(Vin-0.5)
Frequency=1/(0.0036767)=272K

L(ripple current)
=(19-1.05)*1.05/(2.2u*272k*19)
~1.658A
Rth=14m*(9-0.829)/20uA
RILIM=5.719Kohm

Quanta Computer Inc.


PROJECT : ZE6
Size

Document Number

Rev
1A

+1.05V(G5602)
Date:
5

Friday, March 11, 2011

Sheet
1

28

of

35

PQ11
DMN601K-7

VCCGFX

PC30
*2200p/50V_4

PQ8
DMN601K-7

VIN

+3V

+5V

+1.5V

+1.05V

PC40
10u/6.3V_8

PR52
22_8

PR50
*22_8

PR51
22_8

MAIND

[25,27]

MAIND
3

PR144
127/F_4

PQ14
*DMN601K-7
1

PQ12
DMN601K-7
1

PQ13
DMN601K-7

PQ15
DMN601K-7

PQ16
DMN601K-7

PR197

*0/short_4

+3VSUS
PR66
22_8

PR196

PC142
PC143
10u/6.3V_8 0.1u/50V_6

100K_4
+3V
B

VPP PGOOD

VEN

VO

3
8
9

VIN
GND
GND

NC

HWPG_1.8V

R1

PR198
43.2K/F_4
PC141
10u/6.3V_8

PC144
*0.1u/50V_6

[22]

+1.8V

PR199
100K_4

3
2

R2

PR200
34K/F_4

+1.8V
1.8Volt +/- 5%
TDC : 0.5A
PEAK : 0.7A
Width : 20mil

Vout =0.8(1+R1/R2)
=1.8V

PQ10
DMN601K-7
1

HWPG_1.05V

PC100
0.1u/10V_4
C

0.8V

[22,23,28]

+5V

PU4
G9661

1u/16V_6

ADJ

HWPG_1.05V

VCCGFX

PR54
1M_4

Rh

+5VPCU

PQ7
DTC144EU

VCC

HWPG_VCCGFX [22,23]
PR143
10K/F_4
HWPG_1.05V
PC95
*0.1u/10V_4

Vout1 = (1+Rg/Rh)*0.5

PC140

PR55
1M_4

PC33
*2200p/50V_4

VIN

EN

PR68
1M_4

PGD

PC102
33n/25V_4

3
PQ18
DTC144EU

FB

PR60
1M_4

MAINON_ON_G

MAINON

DRV

3
PR147
47/F_4

Rg

[22,23,27,28]

PR145
100K_4

PR53
22_8

+15V
PR142
102/F_4

PR67
1M_4

+3V

PU9
G9334

+
PC103
330u/2V_7343

PC106
10u/6.3V_8

PQ40
AO3402

PQ17
*DMN601K-7

PC105
0.1u/10V_4

PQ9
DTC144EU

SUSON

[5,22,23,27]

+1.05V

VCCGFX
0.89Volt +/- 5%
TDC : 1.98A
PEAK : 2.64A
Width : 80mil

SUSD [25]

PR59
1M_4
SUSD

PR58
1M_4

PR56
22_8

SUS_ON_G

PR64
*22_8

+15V

GND

PR49
1M_4

+3VSUS

+1.5VSUS

VIN

Quanta Computer Inc.


PROJECT : ZE6
Size

Document Number

Rev
1A

Discharge/1.8V
Date:
5

Sheet

Friday, March 11, 2011


1

29

of

35

36

Thermal Protection (DCD)


VIN

PR47
1M/F_4

PD2
SW1010CPT

PQ3
AO3409

TSNS_ON 2

S5_ON

VL

PQ6
DTC144EU
VL

SYS_SHDN#

PU2A
AS393MTR-E1

4
S5_ON

PC25
0.1U/25V_4

PQ4
DMN601K-7
1

2.469V

[22,23,25]

PR44
200K/F_4

PC24
0.1U/25V_4
PR43
10K/J(NTC) _6

PR39
200K/F_4

PQ5
DMN601K-7

[4,25,26]

PR35
200K/F_4

PR42
1.3K/F_4

PU2B
5
6

AS393MTR-E1

Quanta Computer Inc.


PROJECT : ZE6
Size

Document Number

Rev
1A

Thermal protect
Date:
1

Friday, March 11, 2011

Sheet
5

30

of

35

30
DDR3 SO-DIMM

DMI (100MHz)

Page 03
CLOCK GEN CK505
(SLG8SP513VTR
,ICS9LPRS365BKLFT)

MEM (333MHz)

LVDS CLK (Max. 200MHz)

11.6" LED Panel

Page 15

SATA (100MHz)

Tigerpoint
BIT CLK (24MHz)

PCI (33MHz)

Audio ALC272
Page 26

REF (14.31818MHz)
CPU FSB (166MHz)

Intel@Pineview-M

USB (48MHz)
MCH FSB (166MHz)

SUSCLK (32KHz)

Page 9~14
MCH DMI (100MHz)

Page 5~8

LCD CLK (100MHz)

Y2(32.768K KHz)

DOT 96 (96MHz)

PCIE (100MHz)

LAN AR8131L

Y3(25 MHz)

Page 19

Page 2
PCIE (100MHz)

WLAN(Mini Card 1)

Page 21
PCIE (100MHz)

WLAN(Mini Card 2)

Page 21
B

PCI CLK (33MHz)

EC
(WPCE781L/FLASH)

Y4(32.768 KHz)

Page 23
PCI CLK (33MHz)

Debug Card
Page 21
Card Reader
RTS5138
Page 22

48MHz

Y5(12 MHz)

Quanta Computer Inc.

Y1(14.318 MHz)

PROJECT : ZE6
Size

Document Number

Rev
1B

Clock Distribution Diagram


Date:
5

Friday, March 11, 2011

Sheet
1

31

of

35

31

ISL6261A

VCC_CORE
<VRON>

PU3

VIN

+5VPCU

+5VPCU
<AC/DC Insert>
AO3404
PQ0009

+5V_S5
<S5D>

AO3404
PQ0010

+5V
<MAIND>

POWER
VIN

+3VPCU
<AC/DC Insert>

SYSTEM
5V/3V
(RT8206BGQW)

AO3404
PQ0008

PU0001

CHARGER
(ISL88731)
BATTERY

VIN

+3V_S5
<S5D>

PU2

+3VSUS
<SUSD>

AO3404
PQ0005

+3V
<MAIND>

USB Connecter
RTC, TPT

+3V_S5
+3VSUS
+3V

RT9025-25PSP
PU1

+2.5V
<MAINON>

CPU

+5V_S5

+3VPCU

AO3404
PQ0013

LCD Backlight

+5VPCU

+5V
+3VPCU

ADAPTER

VCC_CORE

Distribution

+1.5VSUS
+1.8V

TPT , CRT , TouchPad , Codec , SATA , FAN , HDMI


RTC, Hall Sensor, Light Sensor, EC, BIOS
TPT , LAN , LAN EEPROM , RJ45 LED
3G

CLK_GEN, CPU, TPT ,

LCD , CCD, DMIC, BT, Codec, WLAN/Wimax, Card reader, EC, DDR, HDMI

DDR
CPU, HDMI

RT8207A
PU2000

+1.5VSUS

VIN

+1.5VSUS
+1.5V

<SUSON>
AO3404
PQ2002

+0.75V_DDR_VTT DDR
+1.5V
<MAINON>
+SMDDR_VREF
+1.05V

+0.75V_DDR_VTT
<MAINON>
+SMDDR_VREF
<SUSON>

G9334ADJ

CPU, TPT

CPU, DDR

CLK_GEN , CPU, TPT

VCCGFX

CPU

+2.5V

HDMI

+1.05V
<MAINON + (RC)>
+1.05V

UP6111AQDD

G9334ADJ
PU9004

VCCGFX
<HWPG_1.05V>

G9334ADJ
PU9003

+1.8V
<HWPG_1.05V>

Quanta Computer Inc.


PROJECT : ZE6
Size

Document Number

Date:

Friday, March 11, 2011

Rev
1B

Power Tree
5

Sheet

32

of

35

32

ZGA Power On Sequence

From AC,BATT
D

From PWM to EC

VIN
+5VPCU +3VPCU VCCRTC
HWPG_SYS(PCU)

>=18ms (VCCRTC to RTCRST#)(t200)

From Button to EC
From EC to PWM

From EC to SB
From EC to SB

RTCRST#
NBSWON#
S5_ON
+5V_S5

>=0ms (VCCRTC to S5 well)(t203)


+5V_S5 power up before +3V_S5, or
after +3V_S5 within 0.7V (t201)

+3V_S5
EC_RSMRST#
DNBSWON#

+3V_S5 power down before +5V_S5,


or after +5V_S5 within 0.7V

>=5ms (S5 well to EC_RSMRST#)(t205)


100ms (EC define)
1~2 RTCCLK (SUSC# to SUSB#)(t234)

From SB to EC
From EC to PWM
From PWM to EC

SUSB#,SUSC#
SUSON
+3VSUS +1.5VSUS +SMDDR_VREF
HWPG_1.5V (SUS)

From EC to PWM

MAINON

+5V power up before +3V, or


after +3V within 0.7V (t209)

+3V power down before +5V,


or after +5V within 0.7V

+5V +3V +1.5V +0.75V_DDR_VTT

+1.05V power down before +1.5V,


or after +1.5V within 0.7V

From PWM to EC,PWM MAINON + (RC)


+1.05V

+1.5V power up before +1.05V, or


after +1.05V within 0.7V (t211)
>=0ms (+3.3V to +1.05V)(T1)

From PWM to EC,PWM HWPG_1.05V


+1.8V VCCGFX
From PWM to EC
HWPG_VCCGFX
From PWM to EC HWPG
From EC to PWM

>=0ms (+1.8V to +1.05V)(T3)


>=0ms (+1.05V to +1.8V)(T2)

VRON

10~100us (VCC_CORE=1.2V)(Tc)

VCC_CORE
From PWM to CLK,SB VR_PWRGD_CK410#
B

0~0.6ms (VCC_CORE@VID value)(Td)


B

BCLK
From CLK Gen
From PWM to EC,CPU IMVP_PWRGD
99ms (S0 well of TPT to TPT_PWROK)(t214)

To SB
From SB to CPU
From SB

TPT_PWROK
H_PWRGD

0.05~200ms;Typ=20ms (VCC_CORE to H_PWRGD)(Te)


>=10BLK=60ns(BCLK stable to H_PWRGD)(Tf)

PLTRST#
1~10ms (H_PWRGD to PLTRST#)(Th)

*Note: EC will sampling SUSB# & SUSC# every 5ms.

ICH SMBUS Table


A

(SMB_DATA)/(SMB_CLK) (+3V_S5)
Power Plane
MOS CKT (Level shift)

CLK GEN

RAM

+3V

+3V

Stuff

Stuff

EC SMBUS Table
Mini Card (WLAN)

Mini Card (3G)

Battery

+3V

*Reserve

EC781 SDA1 / SCL1 (+3VPCU)

EC781 SDA2 / SCL2 (+3V)

+3V_SUS

EC781 SDA3 / SCL3 (+3VPCU)


Power Plane

Stuff

MOS CKT (Level shift)

*Reserve: There is not SMBUS function in AVL

CPU thermal Sensor

+3VPCU

+3V

Quanta Computer Inc.


PROJECT : ZE6
Size

Document Number

Date:

Friday, March 11, 2011

Rev
1B

SYSTEM INFORMATION
5

Sheet

33

of

35

33

NBSWON# 3

SLP_S3#(SUSB#):
Control non-critical power plane when system into S3(Suspend to RAM)/S4(Suspend to Disk)/S5(Soft off).

4
S5_ON

SLP_S4#(SUSC#):
Control non-critical power plane when system into S4(Suspend to Disk)/S5(Soft off).Used to control DRAM power

1b
AC Adapter
BATT Charger
PU9001

1
VIN

Battery

6
EC_RSMRST#

+3VPCU
Always System power

Regulator
PQ9007

+5VPCU

RSMRST#
D

7
DNBSWON#

9
SUSON

5 +5V_S5 power up before +3V_S5


+3VPCU/+5VPCU +5V_S5
MOS
PQ0008/PQ0009 +3V_S5

PWRBTN#

8
SUSC#

SLP_S4#

SUSB#

12
MAINON

SLP_S3#

EC

TigerPoint
ECPWROK

Pineview

19
VRON

U8002
24
H_PWRGD
TPT_PWROK

CPUPWRGD

PWROK

CPUPWRGOOD

RSTIN#

23

Regulator
PU3

PLTRST#

U23

20
VCC_CORE

VIN

U8003

PWROK

25
PLTRST#

VRMPWRGD

IMVP_PWRGD 22
VR_PWRGD_CK410#
16
+1.8V

+1.8VSUS

MOS

1.05V power up before 1.8V

SYS_HWPG

PQ9021

+1.05V

VCCGFX(0.89V)

LDO
PU9004
B

14
+1.05V

VIN
MAINON +(RC)

Regulator
PU6000

21
VR_PWRGD_CK410

HWPG_1.8V

16
17

HWPG_VCCGFX

15

HWPG_1.05V

18
HWPG
B

HWPG_2.5V

CKPWRGD

1.5V power up before 1.05V

HWPG_1.5V

CK505
+3VPCU

+2.5V

LDO
PU1
+1.5VSUS

+1.5V

LDO
PQ2002
+3VPCU/+5VPCU

+5V

MOS
PQ0005/PQ0010

+3V

U9

13

+5V power up before +3V

11
+0.75V_DDR_VTT 13
A

VIN

Regulator

+1.5VSUS

PU2000

+3VPCU

SUSD

MOS

+SMDDR_VREF

+3VPCU

MOS

10
+3VSUS

Quanta Computer Inc.


PROJECT : ZE6

PQ0013

Size

Document Number

power sequence block diagram


Date:
5

Friday, March 11, 2011


1

Sheet

34

of

35

Rev
1B

Model

REV
A1

ZE6 MB

MODEL

CHANGE LIST

ZE6
FROM

To

FIRST RELEASED: (PCB:A)

1A

Page 2 : add R374 for CLK GEN change version


Page 11 : change RTC connector type from SMT to holder.
Page 15 : modify TP connector pin define
Page 16 : modify audio and mic connector pin define.
Page 17 : modify USB charger IC circuit to support or not support charger function.

Page 29 : modify 1.8V IC enable signal to HWPG_1.05V


20110117 Page 15 : add CP1~CP6 for EMI issue
20110117 Page 15 : for EMI issue: change R232,R233,R234,R235,R236,R231,R211 to bead CX5BB121001
20110118 Page 27 : for EMI issue: add PC96 ,PC32 and stuff PR48, PC29
20110118 Page 30 : Thermal temperature setting at 75C, change PR42 from 1.54K/F to

1.3K/F

20110131 Page 14 : add 5V into LCD connector for IVO panel to use.

1D
A

PROJECT MODEL :

DOC NO.

11.6

APPROVED BY:

PART NUMBER:
5

DATE:

DRAWING BY:
4

REVISON:
3

Quanta Computer Inc.

2009/12/05
1B
2

PROJECT : ZE6
Size

Document Number

Rev
1B

Change list
Date:

Friday, March 11, 2011

Sheet
1

35

of

35