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Lab 10 Report

CMOS Amplifier Configurations


Kevin Bradshaw & Yuan Tian
ECEN 325-503
Instructor: Sebastian Hoyos
November 18, 2015
Items
1
2
3
4
5
6
7

Pre-lab
Title Page
Intro /Theory / Procedure
Summary
Experimental Results /
Analysis / Discussion
Problems Encountered
Conclusion
Questions
Total

Grade Assigned
20%
5%
10%
40%
5%
5%
15%
100%

Student's Grade

Objectives

Understand the characteristics of the Metal-Oxide-Semiconductor FieldEffect Transistor (MOSFET).


Evaluate the I-V characteristics, threshold voltage, small signal
transconductance and channel length modulation.
Analyze the operating points of a MOS amplifier in DC analysis and
compare against the BJT amplifier DC analysis.

Procedure
Part A
In this lab, the circuit in Figure 1 was built using a CD4007 transistor. The
gate-switch voltage, VGS, was then swept from zero to 5 V while measuring
the drain current. Twenty measurements were taken up until the drain
current reached 5 mA. These measurements are recorded in Table 1 and
Figure 2 demonstrates the graph of these related to each other. Recorded in
Table 2 are the approximate values for the threshold voltage, current gain,
and the small signal transconductance.
Afterwards, the gate source voltage was set to 2.76 V so that the drain
current would be 1 mA. Following this, the power supply, VDD, was swept from
0 to 10 V while measuring the drain-switch voltage. These measurements are
recorded in Table 2 as well as the calculations for the effected drain current.
Figure 3 shows the graph of these observations related to each other.
Recorded in Table 2 are the approximate values for the threshold voltage,
current gain, and the channel length modulation parameter.
Figure 1: Basic MOS
Configuration

Figure 2: CD4007, Drain Current Vs Gate


Source Voltage

0.01
0.01
0

Drain Current (A)

0
0
0
0

Gate Source Voltage (V)

Figure 3: CD4007, Drain Current Vs Drain


Source Voltage

0
0
0
0

Drain Current (A) 0


0
0
0

10

Drain Source Voltage

The previous steps were repeated for the 2N7000 transistor and a 100
resistor. The goal was to achieve currents that were ten times larger than the
original transistor used. The swept gate-source voltage versus drain current
measurements for this transistor are recorded in Table 3 and the plot can be
seen in Figure 5. The set gate-source voltage for the power supply sweep
was then set to 2.39 V so that the drain current was measured at 10 mA. The
power supply sweep can be seen in Table 3 as well and is plotted in Figure 6.
The calculated values for this transistor for both sweeps are recorded in
Table 4.
Part B

A DC analysis of a common source amplifier with a CD4007, Figure 4, was


done in this part of the lab. The values for the resistors were calculated in
the pre-lab and are recorded in Table 5. After the circuit was built, the
operating point including the drain current, source voltage, and drain voltage
were also recorded in Table 5. Compared to the Pspice calculations, the
operating point was very similar because the closest resistor values were
used for each branch of the MOSFET. By putting a small potentiometer in
between both gate resistors, the drain current could be tweaked to better
meet the design parameters. Following this, the same DC analysis was done
for a common source amplifier with the 2N7000. The values for the resistors
were also calculated in the pre-lab and are recorded in Table 6.

Figure 5: 2N7000, Drain Current Vs Gate


Source Voltage

Figure 4: Common Source


Configuration
0.06
0.05
0.04

Drain Current (A) 0.03


0.02
0.01
0

0.5

1.5

Gate Source Voltage (V)

2.5

Figure 6: 2N7000, Drain Current Vs Drain


Source Voltage

0
0
0

Drain Current (A)

0
0
0
0

Drain Source Voltage (V)

Data Tables

10

Table 1: CD4007 MOSFET VGS and VDD


Sweep

R=1000 , I D =5 mA
V GS

ID

(V)

0
0.25
0.50
0.75
1.00
1.25
1.50
1.75
2.00
2.25
2.50
2.75
3.00
3.25
3.50
3.75
4.00
4.25
4.50
4.75
5.00

V GS=2.76 V , I D =1.0054 mA
V DD

0.0060 A
0.0059 A
0.0048 A
0.0067 A
0.4640 A
7.4430 A
51.420 A
0.1395 mA
0.2870 mA
0.4687 mA
0.7186 mA
0.9996 mA
1.3080 mA
1.6850 mA
2.0707 mA
2.4780 mA
2.9340 mA
3.3920 mA
3.8620 mA
4.4210 mA
5.0000 mA

VGS Sweep

VDD Sweep

(V)

0
0.25
0.50
0.75
1.00
1.50
2.00
2.50
3.00
3.50
4.00
4.50
5.00
5.50
6.00
6.50
7.00
7.50
8.00
8.50
9.00
9.50
10.0

V DS
0.3433 mV
77.280 mV
0.1740 V
0.2750 V
0.3850 V
0.6600 V
1.0610 V
1.5630 V
2.0190 V
2.5460 V
3.0260 V
3.5250 V
4.0350 V
4.5180 V
5.0310 V
5.5240 V
6.0430 V
6.5120 V
7.0229 V
7.4880 V
8.0060 V
8.4680 V
9.0150 V

Table 2: CD4007 MOSFET


Characteristics
Component
Threshold Voltage, VT
Current Gain,
Transconductance, gm
Threshold Voltage, VT
Current Gain,
Channel Length Modulation,

ID
-4.15394E-08
2.1036E-05
3.9829E-05
5.8033E-05
7.51374E-05
0.000102627
0.000114722
0.000114478
0.000119853
0.000116555
0.000118998
0.00011912
0.000117899
0.000119976
0.000118387
0.000119243
0.000116921
0.000120709
0.000119377
0.000123641
0.000121442
0.000126084
0.000120342

Value
1.8 V
0.000829 A/V2
0.001824 A/V
1.8 V
0.000829 A/V2
0.001586 A/V

Table 3: 2N7000 MOSFET VGS and VDD Sweep

R=100 , I D =50 mA
V GS

ID

(V)

0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1.0
1.1
1.3
1.5
1.7
1.9
2.1
2.3
2.5
2.71

0.0079 A
0.0081 A
0.0084 A
0.0076 A
0.0072 A
0.0070 A
0.0071 A
0.0072 A
0.0073 A
0.0075 A
0.0070 A
0.0057 A
0.0176 A
0.3950 A
7.4300 A
104.76 A
1.1310 mA
7.0100 mA
23.510 mA
50 mA

VGS Sweep

VDD Sweep

V GS=2.3 V , I D=10.003 9 mA
V DD

(V)

0
0.25
0.50
0.75
1.00
1.50
2.00
2.50
3.00
3.50
4.00
4.50
5.00
5.50
6.00
6.50
7.00
7.50
8.00
8.50
9.00
9.50
10.0

V DS

ID

0.1256 mV
34.920 mV
81.180 mV
0.1580 V
0.3200 V
0.7310 V
1.2440 V
1.7340 V
2.2100 V
2.6700 V
3.1640 V
3.6570 V
4.1180 V
4.6060 V
5.1030 V
5.5920 V
6.0570 V
6.5280 V
7.0150 V
7.4410 V
7.9700 V
8.4450 V
8.9510 V

-3.16996E-07
0.00054283
0.001057039
0.001494119
0.001716218
0.001940841
0.001908031
0.001933269
0.001993842
0.002094796
0.002109939
0.002127606
0.002226036
0.002256322
0.002263894
0.002291656
0.002379991
0.002453183
0.002485993
0.002672758
0.002599566
0.002662662
0.002647519

Table 4: 2N7000 MOSFET


Characteristics
Component
Threshold Voltage, VT
Current Gain,
Transconductance, gm
Threshold Voltage, VT
Current Gain,
Channel Length Modulation,

Value
2.1 V
0.31535 A/V2
0.12614 A/V
2.1 V
0.31535 A/V2
0.00009 A/V

Table 5: CD4007 MOSFET Based Amplifier


Configuration
Components

Value

Rs

0.746 K

RD

7.439 K

Rg 2

160.4 K

Rg 1

0.245 M

Measurements

Value

ID

1.122 mA

VD

8.435 V

VS

0.843 v

Table 6: 2N7000 MOSFET Based Amplifier


Configuration
Components

Value

Rs

35.72

RD

0.361 K

Rg 2

160.7 K

Rg 1

0.261 M

Measurements

Value

ID

24.97 mA

VD

8.954 V

VS

0.895 v

Applicable Calculations
GS V T
V

i D=
2

i D = ( V GSV T ) V s

V DS
( 1+ vDS ) V DS <( V GSV T )
2

gm=

iD
=(V GSQV T )
V gs

gds =

iD
= I DQ
v DS

Discussion
1. Comparing current gain, threshold voltage, and transconductance:
The CD4007 is a much more accurate MOSFET for this kind of
application because it has a longer region of saturation which is the
region needed for it to be switched on. It also has a smaller
transconductance which means it has a better linear approximation
when biasing as opposed to the 2N7000 MOSFET.
2. Comparing the operating points in Parts A and B:
Both drain currents for the circuits in Part A are relatively small. The
smaller being the CD4007 by a factor of ten for pretty much all voltage
points. This is accurate because when the 2N7000 MOSFET is used, a
resistance a tenth of the original value was used at the drain branch.
There was hardly any noticeable change between the drain source
voltages because the difference between the thermal voltages of each
MOSFET isn't much (approximately 0.3 V). There is quite a change for
the gate source voltage bias point (approximately 1.5 V) which is
understandable because the transconductance (slope) is much
different between each circuit.
The drain currents in Part B were also relatively small with the smaller
again being the CD4007 by a factor of 24, mainly because the design
constraint in the pre-lab meant for the 2N7000 circuit to have a drain
current of 20 mA while the CD4007 at 1 mA. There was also not much
of a change at all between each drain source voltage. The gate source
voltages, when the sweeps were being recorded for comparing the two
MOSFET configurations, only had a difference of about 0.4 V.
3. Comparing the change in drain current in the two different MOSFETs:
In the saturation region, the CD4007 MOSFET had hardly any change in
its drain current. The 2N7000 MOSFET practically doubled and then
some. It has a smaller channel length modulation which changes the
drain current inversely proportional when multiplied with the drain
source transconductance.
4. Channel length modulation parameter estimation:
The CD4007 MOSFET has a channel length modulation of
approximately 0.001586 A/V.
The 2N7000 MOSFET has a channel length modulation of
approximately 0.00009 A/V.
5. Gate resistance evaluation:

Changing the parallel combination of the gate biasing resistors could


change the biasing points completely. Mainly because the gate biasing
resistors determine the gate source voltage and this is directly related
to the drain current. The drain current is usually the first and most
important biasing point because this changes how much of a voltage
drop there is before the drain source voltage. Since the voltages would
change, this does not guarantee the MOSFET to be operating in the
saturation region.
Problems Encountered
There were not many problems in MOSFET design as compared to BJTs. The
only problem we had was proper calculations and they were double checked
with the Pspice simulations.
Conclusion
The purpose of this lab was to understand the fundamental concepts and
characteristics of MOSFET amplifiers. First we learned how to find the proper
biasing points of a simple MOS configuration. By sweeping the voltages and
observing the changes in the drain current, we were able to calculate the
threshold voltage, current gain, transconductance, and channel length
modulation. Following this, we learned how to design and perform a DC
analysis of a common source amplifier to observe the changes in the biasing
points when the configuration is loaded with gate resistances. We can use
these measurements and observations in different topologies of MOSFET
based amplifiers which provides us with great tools of understanding how to
directly use them in microelectronic designs.