CAD for VLSI Design - I

Lecture - 7
V. Kamakoti and Shankar Balachandran

Overview of the Lecture

Downloading and Installing Verilog
The instructor shall download and install the
verilog as per instructions in the next slide for
the benefit of the students

Verilog Quick Starter

Example of a 4-bit ripple carry counter

Downloading and Installing Verilog

Verilog available for free at
http://www.icarus.com
Have a Linux system
Download the rpm file and install using the following
command
rpm -i <filename>.rpm

You may sometime need root permission for the same. If you
do not have the same then

Download the <latest filename>.src.tar.gz

Unzip and untar the version
Go through the README file in the untarred directory
Install verilog in your <home> directory

Verilog - Quick Starter

That you have installed verilog - learn
some features of the same quickly
4-bit Ripple Carry Counter Design with demo

The verilog code of the same is available

in Samir Palnitkars book on Verilog
HDL.

4-bit Ripple Carry Counter

See the Next slide for the structure of the
counter
A Top Down Design
Counter has 4 T-flip flops
Each T-flip flop is a D-flip flop + inverter
Each D-flip flop has three inputs (d,reset,clk)
and one output (q)

q1

q0

q3

q2

clock

TFF
tff0

reset

tff1

tff2

tff3

The Design
The Instructor should key in line-by-line the code
in Fig 2-3, pg. 55, in the book Verilog HDL, by
Samir Palnitkar, Second edition, 2007 and
explain its functionality.
This is the equivalent HDL representation of the
counter shown in the previous slide
The design is complete and now you have to
test your design. It is similar to forming the
counter on a bread board and now you give
inputs and study the output

New things
You should have learnt the following from the
counter design HDL code
Always construct
For defining a sequential element - namely, the Flipflop
For defining a clock with a given time period

Initial construct
For defining the test inputs along with the timing

$monitor
Simulator directives for debugging
Equivalent to using an oscilloscope for observing waveforms

Salient Features
Concurrency constructs
Easy verification capabilities of the
specification compare it with breadboard
technique
The design part convertible to gates by
feeding the HDL code to a synthesis tool.

Question and Answer

Thank You