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Basic IC Fabrication

07/03/2014

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Transistor Fabrication Process

2014 Synopsys, Inc. All rights reserved. 2

Concepts to be covered in this session

silicon
substrate
silicon dioxide
oxide
field oxide
gate oxide
polysilicon
silicon nitride

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metal
ion implant
photoresist
photo mask
exposure
etch
resist strip
deposition

Process Steps
Wafer Fabrication
Oxidation
Deposition
Lithography
Etching
Diffusion
Ion Implantation

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Fabrication process of a simple Metal Oxide


Semiconductor (MOS) transistor
metal connection to gate
doped silicon

polysilicon gate
top nitride

metal connection
to drain

metal connection
to source

field oxide
oxide

gate

source
silicon substrate

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drain

oxide
gate oxide

Silicon Substrate
The manufacture of a single MOS transistor begins
with a silicon substrate

silicon substrate

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Wafer Fabrication

Fabrication of a silicon single crystal


Sliced into thin disks called wafers
Wafers are finely round, mirror-smooth and clean
Clean-Room environment is required

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Field Oxide Growth


A layer of silicon dioxide (field oxide) serves as
isolation between material between devices
manufactured on the same substrate.

field oxide

oxide
silicon substrate

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Oxidation
At atmospheric pressure
At 800C to 1200C
Temperature accuracy of
growth of oxide layers is
reproducible

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Deposition of Photoresist
Photoresist provides the means for transferring the
image of a mask onto the top surface of the wafer

photoresist
oxide
silicon substrate

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Deposition
Physical vapor deposition
(PVD)(Sputter deposition)
Chemical vapor deposition
(CVD)
Perfect conformity

Sputter deposition
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Mask Step

Ultraviolet light exposes photoresist through windows in a photomask

Ultraviolet Light
Chrome plated
glass mask

Shadow on
photoresist

Exposed area of
photoresist
photoresist
oxide
silicon substrate
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Lithography
Transferring geometric shapes
E.g. gate electrodes, contact windows
or metal interconnections

Optical lithography is the prevailing


method at present

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Silicon Substrate
Exposed photoresist becomes soluble and can be easily
removed by the develop chemical
Exposed area of photoresist
Unexposed area
of photoresist

photoresist
oxide
silicon substrate
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Etch of photoresist
Unexposed photoresist remains on surface of oxide to
serve as a temporary protective mask for areas of the
oxide that are not to be etched

photoresist

photoresist

oxide
silicon substrate
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Etching
Used to partly remove material
to create patterns
Chemical (wet) etching
Reactive ion (dry) etching
Combination of both

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Oxide Etch
Areas of oxide protected by photoresist remain on the
silicon substrate while exposed oxide is removed by
the etching process

photoresist

oxide

oxide
siliconsubstrate
substrate
silicon

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Removal of Photoresist
The photoresist is stripped off -- revealing the pattern
of the field oxide
field oxide

oxide

oxide
siliconsubstrate
substrate
silicon

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Gate Oxide growth


A thin layer of oxide is grown on the silicon and will
later serve as the gate oxide insulator for the transistor
being constructed

thin oxide layer

gate oxide

oxide

oxide
silicon substrate

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Gate oxide etch


The gate insulator area is defined by patterning the
gate oxide with a masking and etching process

gate oxide

oxide

oxide
silicon substrate

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Polysilicon deposition
Polysilicon is deposited and will serve as the building
material for the gate of the transistor
gate oxide

gate oxide
polysilicon
oxide

oxide
silicon substrate

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Poly gate etch


The shape of the gate is defined by a masking and
etching step
ultra-thin
gate oxide

polysilicon
gate

gate

oxide

silicon substrate

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oxide

Ion implantation for source/drain


Dopant ions are selectively implanted
windows in the photoresist mask

through

ion beam

Scanning direction
of ion beam
implanted ions in active
region of transistors
photoresist

Implanted ions in
photoresist to be
removed during
resist strip.

gate

oxide
source

drain

silicon substrate
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oxide

Ion Implantation
Atoms are ionized, accelerated
and
implanted
Variety of combinations of
target material
Dose can vary between 1011
and 1018/cm2
Acceleration energie between
several
keV and several
hundred keV

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Annealing
The source and drain regions of the transistor are
made conductive by implanting dopant atoms into
selected areas of the substrate

doped silicon

gate

oxide
source

drain

silicon substrate
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oxide

Diffusion
Important for electrical
characteristics
forms source, drain and channel
regions
Dope polysilicon in MOS prcessing

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Silicon Nitride deposition


A layer of silicon nitride is deposited on top of the
completed transistor to protect it from the
environment

top nitride

gate

oxide
source

drain

silicon substrate
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oxide

Etch Contact holes


Holes are etched into selected parts of the top nitride
where metal contacts will be formed
contact holes

gate
source

drain

silicon substrate
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Metal Deposition
Metal is deposited and selectively etched to provide
electrical contacts to the three active parts of the
transistor
metal contacts

oxide

gate

source
silicon substrate
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drain

oxide

Process flow

contact holes
ultra-thin
gate oxide

field oxide
polysilicon
gate

oxide
oxide

gate
gate

drain
source
drain
source
siliconsubstrate
substrate
silicon
siliconsubstrate
substrate
silicon

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oxide
oxide

Complete structure of MOS


Completed Structure of a Simple MOS Transistor
metal connection to gate
doped silicon

polysilicon gate
top nitride

metal connection
to drain

metal connection
to source

field oxide
oxide

gate

source
silicon substrate
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drain

oxide
gate oxide

Silicon switches: the NMOS

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Silicon switches: the NMOS


Abovesilicon:
silicon:
Above
Thinoxide
oxide(SiO
(SiO)2)under
underthe
thegate
gateareas;
areas;
Thin
2
Thickoxide
oxideeverywhere
everywhereelse;
else;
Thick

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Silicon switches: the PMOS

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