Pspice Notes

UCSI UNIVERSITY
FACULTY of ENGINEERING, ARCHITECTURE, & BUILD

ENVIRONMENT
PSPICE
Chapter 1: Introduction
Chapter 2: Getting Started
Chapter 3: Simple DC Circuits
Chapter 4: Other DC Analyses
Chapter 5: Operational Amplifier
Chapter 6: Time Domain Analysis
Chapter 7: Frequency Domain Analysis
Chapter 8: Fourier Analysis
Chapter 9: Conclusion
Bibliography
Chapter 1: Introduction
1. Background
SPICE is very powerful circuit simulation software that assists students to solve multi
element circuits that involves both analog and digital components in a small amount of
time. Although we imply the basic fundamental capabilities of the software, the
principles can be easily extended to analyze the complex electrical and electronic
networks used in the modern integrated circuit design.
The SPICE software was originally developed at the University of California at Berkeley
in 1975 and its name implies as follows:
Simulation Program with Integrated Circuit Emphasis
PSPICE is a PC Version of SPICE and currently the version available here is the OrCAD
Family Release 9.2 Lite Edition. This version is a student version that has limitations as
follows:
Circuits has a maximum of 64 nodes, 10 transistors and 2 operational amplifiers
The OrCAD student version is known as PSpice AD Lite. Information about the Pspice
AD is available from the OrCAD website: http://www.orcad.com/pspicead.aspx
PSpice can perform several different types of circuit analyses. Among the most important
are:
• DC analysis: calculate the DC transfer curve

• Transient Analysis: calculates outputs as a function of time when
a large signal input is applied
• AC analysis: calculates the outputs as a function of frequency
• Fourier Analysis: calculates and plots the frequency spectrum of
the response
• Noise Analysis
• Parametric Analysis
• Sensitivity Analysis
• Distortion Analysis
• Monte Carlo Analysis
In addition, the PSpice software has analog and digital components. The digital
components includes NAND, NOR, flip-flops, MUX, FPGA, PLDs, and many more. All
analyses can be done as different temperatures. The default temperature is 300K. The
circuit simulator contains internal models for the following components:
• Independent and dependent voltage and current sources

• Resistors
• Capacitors
• Inductors
• Mutual Inductors
• Transmission Lines
• Operational Amplifiers
• Switches
• Diodes
• Bipolar Transistors
• MOS Transistors
• JFET
• MOSFET
• and other components
2. PSpice with OrCAD Capture (release 9.2 Lite Edition)
Before any circuit can be simulated, one has to specify the configuration of the circuit.
There are many ways in doing this. One of the ways is to use a schematic program known
as OrCAD Capture. OrCAD Capture is bundled with PSpice Lite AD on the same CD that is
supplied with the textbook. Capture is a user-friendly program that allows you to capture the
schematic of the circuits and to specify the type of simulation.
The process shown below demonstrates how the circuit is simulated using Capture and
PSpice.
Step 1: Creating Circuit Step 2: Specify type of simulation

• Create a new Analog, mixed AD project • Create a simulation profile
• Place circuit parts • Select type of analysis: Bias, DC
• Connect the parts sweep, Transient, AC sweep
• Specify values and names • Run PSpice
Step 3: View the results

• Add traces to the probe window
• Use cursors to analyze waveforms
• Check the output file, if needed
• Save or print the results
The values of the components can be specified using scaling factors (upper or lowercase):
Symbolic Suffix* Mnemonic Exponential Form Value

F femto 1E-15 10 −15
P pico 1E-12 10 −12
N nano 1E-9 10 −9
U micro 1E-6 10 −6
M mili 1E-3 10 −3
K Kilo 1E3 10 3
MEG mega 1E6 10 6
G giga 1E9 10 9
T tera 1E12 10 12
Table 1: PSpice Scale Factors
Both upper and lower case letters are allowed in PSpice. As an example, one can specify
a inductor of 10 microHenry in the following ways:
10u, 10uH; 10E-6; 0.01M
Chapter 2: Getting Started
Example 1: Use the OrCAD Capture program to produce a netlist for the simple resistive
circuit shown in Figure 2.1.
R1 = 10 KΩ
+
V1
10 V R2 = 10 KΩ
Figure 2.1: Simple resistive circuit
2.1 Creating the Circuit in Capture
1. Go to OrCAD Family Release 9.2 Lite Edition and open OrCAD Capture
2. Create a new project: File Menu/New_Project
3. Enter the name of the project
4. Select Analog or Mixed A/D
5. When the create PSpice Project box opens, select “Create Blank Project”.
The below figure will be shown once the above steps has been completed:
Add Power
Figure 2.2: Design manager with schematic window and toolbars (OrCAD screen
capture)
2.2 Place the components and connect the parts
1. Click on the icon of adding parts and components.
2. To place parts go to Place Part menu. Figure 2.3 shows the Place
Part menu:
Figure 2.3: Place part window
3. Select the library that contains the required components. Type the
beginning of the name in the Part box. The part list will scroll to the
components whose name contains the same letters. If the library is not
available, you need to add the library, by clicking on the Add Library
button. This will bring up the Add Library window. Select the desired
library. For Spice you should select the libraries from the
Capture/Library/PSpice folder.
Analog: contains the passive components (R, L, C), mutual inductance,
transmission line, and voltage and current dependent sources (voltage
dependent voltage source E, current-dependent current source F, voltage-
dependent current source G and current-dependent voltage source H).
Source: give the different type of independent voltage and current sources,
such as Vdc, Idc, Vac, Iac, Vsin, Vexp, pulse, piecewise linear, etc. Browse
the library to see what is available.
4. Place the resistors, capacitor (from the Analog library) and the DC
voltage. You can place the part by the left mouse click. You can rotate the
components by clicking on the Ctrl+ R key. To place another instance of
the same part, click the left mouse button again. Hit the ESC key when
done with a particular element. Double-click on the part; this will open the
Property window that looks like below in Figure 2.4. This will allow you
to change the value of the parts. This window will appear for all types of
parts and components available in the software.
Figure 2.4: Display Properties window
5. After placing all the parts, you need to place the Ground terminal
by clicking on the GND icon (on the right side toolbar – see Fig. 2.2).
When the Place Ground window opens as seen in Figure 2.5, look for the
GND part that is labeled with a value of 0 next to it. If the part is not
available, go to the Add Library->Browse File->PSpice folder and double
click the source. Figure 2.6 will show you the part for the GND already
labeled 0. Click Ok and place the part on the circuit. If the GND part is not
placed on the circuit, PSpice will give an error or "Floating Node". The
reason is that SPICE needs a ground terminal as the reference node that
has the node number or name 0 (zero).
6. Now connect the elements using the Add Lines icon on the side
toolbar as shown in Figure 2.2.
Figure 2.5: Place the ground terminal box
Figure 2.6: GND part with labeled 0 value
2.3 Assign values and names to the part
1. Change the values of the resistors by double-clicking on the number next to

the resistor. You can also change the name of the resistor. Do the same for the
voltage source.
2. Save the project
2.4 Netlist
The netlist gives the list of all elements using the simple format:
R_name node1 node2 value
1. You can generate the netlist by going to the PSPICE/CREATE NETLIST

menu as shown in Figure 2.7.
2. Look at the netlist by double clicking on the Output/name.net file in the
Project Manager Window (in the left side File window).
Figure 2.7: Netlist for components used in Figure 1
2.5 Specifying the type of analysis and simulation
A. Bias or DC Analysis
1. With the schematic open, go to the PSPICE menu and choose NEW
SIMULATION PROFILE.
2. In the Name text box, type a descriptive name, e.g. Bias
3. From the Inherit From List: select none and click Create.
4. When the Simulation Setting window opens, for the Analyis Type, choose
Bias Point and click OK.
5. Now you are ready to run the simulation: PSPICE/RUN
6. A window will open, letting you know if the simulation was successful. If
there are errors, consult the Simulation Output file.
7. To see the result of the DC bias point simulation, you can open the
Simulation Output file or go back to the schematic and click on the V icon
(Enable Bias Voltage Display) and I icon (current display) to show the
voltage and currents (see Figure 2.8).
The check the direction of the current, you need to look at the netlist: the current is positive
flowing from node 1 to node 2.
5 0 0 . 0 u A
R 1
1 0 . 0 0 V
5 . 0 0 0 V
1 0 k
V 1
D C = 1 0 R 52 0 0 . 0 u A
A C = 0
T R A N = 0 1 0 k
5 0 0 . 0 u A
0 V
0
Figure 2.8: Results of Bias Simulation
B. DC Sweep Simulation
We will be using the same circuit but will evaluate the effect of sweeping
the voltage source between 0 and 10V. We'll keep the current source
constant at 0.5 mA.
1. Create a New Simulation Profile (from the PSpice Menu); we’ll call it DC
Sweep.
2. For analysis select DC Sweep; enter the name of the voltage source to be
swept: V1. The start and end values and the step need to be specified: 0,
10 and 1V, respectively (see Fig. below).
3. Run the simulation. PSpice will generate an output file that contains the
values of all voltages and currents in the circuit.
Figure 2.9: Setting for DC Sweep Simulation
2.6 Displaying the simulation Results
PSpice has a user-friendly interface to show the results of the simulations.

Once the simulation is finished a Probe window will open.
Figure 2.10: Probe Window

1. You can add traces using the "Voltage Markers" in the schematic. From the PSPICE menu
select MARKERS/VOLTAGE LEVELS. Place the makers on the Out and In node. When
done, right click and select End Mode.
I n R 1
O u t
V 1 0 k V
V 1
D C = 1 0 R 2
A C = 0
T R A N = 0 1 0 k
Figure 2.11: Using Voltage Markers to show the simulation result of V

(out) and V (in).
2. Go to back to the Probe Window. You will notice that the waveforms will appear.
Figure 2.12: Result of the DC sweep, showing V (R1:1) as the input and V (R1:2) as
the output.
3. In order to trace the value of the voltage across V (R1:1) and V (R1:2), select the Toggle
Cursor icon as shown below in Figure 2.13. Once selected, select the line you wish to
trace the value of Voltage. As shown above, the trace is selected for the V (R1:1) and the
value is 5.3667V.
4. In order to mark the value on the probe window, you need to click the Mark Label Icon.
By doing so, the value of 5.3667V will be marked as shown in Figure 2.14.
Toggle Cursor Mark Label
Figure 2.13: Toggle Cursor and Mark Label Icon
Figure 2.14: Value marked on the line traced.

Chapter 3: Simple DC Circuits
In this chapter, our analysis will be extended beyond the use of resistors and independent
voltage sources; instead we will also have a look at independent current sources as well
as dependent sources. This will allow us to analyze the Thevenin’s, Norton’s Theorem
and also the maximum power transfer.
3.1 Independent Sources

Independent voltage sources have been used in the earlier simulation to model the
behavior of a constant voltage source such as an ideal battery. Independent
voltage source produces a constant voltage across its terminals independent of the
current flowing through them. Another type of independent source is the
independent current source. Independent current source produces a constant
amount of current independent of the other elements in the circuit.
3.2 Dependent Sources

Dependent sources are used to model the behavior of physical devices. For an
example, a voltage controlled current source is used to model the behavior of a
MOSFET that is acting as an amplifier. The general way in which this is done is
to use the voltage input to the transistor to determine the amount of current that
flows through the transistor.
Below are the examples of the dependent sources:

E 2
+ F 1
+
- -
E F
V o l t a g e c o n t r o l l e d C v u o r lr te na tg e c o sn ot ru or lc l e e d c u r r e n t s o
G 3 H 1
+ +
-
-
G H
V o l t a g e c o n t r o l l e d c Cu ur rr re en tn t s oc uo rn ct er o l l e d v o l t a g
Example 2: Analyze the circuit of Figure 3.1, and determine the operating point voltage
and currents through all elements of the circuit. The current in the voltage controlled
current source is set to be I = 0.7*VR5 is the drop across R5 as noted in the diagram.
R 1 R 2 R 3
1 k 1 0 0 k 1 k
+
V 1 R 5 0.7*VR5 R 4 1 0 k
1 0 V V R 5
1 k -
0
Figure 3.1: Example of circuit utilizing a dependent source.
Solution: The PSpice analysis of the circuit is performed nearly the same as in Example
1. The only difference there and here is that; the presence of a dependent current source.
In order to retrieve the dependent current source, refer to the following Figure 3.2.
Based on the below Figure, it can be seen that there is G and GPOLY. Both of the parts
have the identical design, but it’s important to note that you are advised to use only the G
part and not the GPOLY part!
Figure 3.2: Dependent current source part window

R 3 R 5 R 6
1 k
1 0 0 k 1 k
V 2
G 2
R 4 + R 7
-
1 0 V d c 1 k G 1 0 k
0
Figure 3.3: Schematic Circuit of Example 2 containing dependent current source
Figure 3.4: Property Editor for a voltage dependent current source
Based on Figure 3.4, it can be seen that the Property Editor is obtained by clicking the G2
of the current dependent source on Figure 3.3. The value of the Gain for the current
dependent source is fixed to a value of -0.7. This is because the direction of the current in
Figure 3.1 is the opposite of that in Figure 3.3. After the value of the Gain has been set to
-0.7, do not forget to click the ‘Apply’ icon to set the value of the Gain.
To set up the simulation, click on the PSpice>New Simulation Menu item and choose the
analysis tab. Specify a name for this simulation run under the General Tab by filling in
the area Simulation Profile with a unique identifier name. Next, choose the Bias Point
analysis from the Analysis Type pull down menu and click OK to complete setup of the
simulation profile. To run the simulation, click on PSpice>Run from the menu.
Results of the simulation can be viewed by clicking the V button and the I button in the
OrCAD Capture window. Below are the results for the simulated circuit:
1 0 . 1 5 m A - 1 4 8 . 5 m V
1 0 . 3 0 m A
R 3 R 5 R 6
9 3 . 6 2 m A
1 k
1 0 0 k 1 k - 9 3 6 . 2 V
1 0 . 0 0 V
V 2 - 1 . 0 3 0 K V
G 2
R 4 + R 7
-
1 0 V d c 1 k G 1 0 k
1 4 8 . 5 u A 9 3 . 6 2 m A
1 0 . 1 5 m A
0 V
0
Figure 3.5: Solution to circuit with voltage dependent current source
Thevenin Equivalent Circuits
Thevenin equivalent circuit is an independent voltage source VTH in series with a resistor
RTH, which replaces an interconnection of sources and resistors. To represent the original
circuit by its Thevenin equivalent, we must be able to determine the Thevenin voltage
VTH and the Thevenin resistance RTH. If the load resistance is infinitely large, we have an
open circuit condition. The open circuit voltage at the terminals a,b in the circuit shown
in Figure 3.6(b) is VTH. This must be the same as the open circuit voltage at the terminals
a,b in the original circuit. Therefore, to calculate the Thevenin voltage VTH, we simply
calculate the open circuit voltage in the original circuit.
Reducing the load resistance to zero gives us a short circuit condition. If we place a short
circuit across the terminals a,b of the Thevenin equivalent circuit, the short circuit current
directed from a to b is
ISC = VTH/RTH (1)
This short circuit current must be identical to the short circuit current that exists in a short
circuit placed across the terminals a,b of the original network. From eq. (1),
RTH = VTH/ISC (2)
Thus the Thevenin resistance is the ratio of the open circuit voltage to the short circuit
current.
R T H
A A
A resistive network
containing independent
and dependent sources V T H
B
B
Figure 3.6(a) A general circuit Figure 3.6 (b) The Thevenin
equivalent circuit
Example 3: Find the Thevenin equivalent for the circuit containing dependent sources
shown in Figure 3.7.
2 Vx
R 1 R 2
a
1 k
+ 1 k
I 1 R 4
R 3 V x
5 A d c 1 k
1 k
-
b
Figure 3.7: A circuit used to illustrate a Thevenin equivalent when the circuit
contains dependent sources.
Solution 3: Draw the schematic in the OrCAD program as shown in Figure 3.8. The
element labeled as E1 is used to represent the voltage controlled voltage source with an
internal gain factor of two. When the circuit in simulated there is an error that states less
than 2 connections made at R6 between nodes a-b. To overcome this problem, we need
to connect a very large resistor of 1000Kohm as shown Figure 3.9. By doing so, it will
allow us to measure the open circuit voltage across a-b. From Figure 3.9, it can be seen
that the Voc across R5 is 3.743KV.
-
+
E 1
+
-
E
R 1 R 2
a
1 k
1 k
I 1 R 4
R 3
5 A d c 1 k
1 k
Figure 3.8: PSpice circuit to calculate Thevenin equivalent in Figure 3.7.
Short circuit current Isc is measured by placing a wire between node a and node b and
examining the current flowing in the wire. Running the PSpice simulation produces the
results in Figure 3.10, showing that Isc is 2.143A. Dividing the open circuit voltage by the
short circuit current produces the Thevenin equivalent resistance RTH = 1746.6Ω.
Figure 3.9: Large resistance at terminals a-b to calculate Voc
-
+
E 1
-
+
7 1 4 . 3 V
2 . 1 4 3 K V
R 1 R 2
a
1 k 1 k
1 . 4 2 9 A 0 V
7 1 4 . 3 m A 2 . 1 4 3 A
I 1 0 V 2 . 1 4 3 A
5 A d c R 3 R 4
5 . 0 0 0 A 1 k 1 k
Figure 3.10: Short circuit at terminals a-b to calculate Isc

Norton Equivalent Circuit:
Norton equivalent circuit consists of an independent current source in parallel

with the Norton equivalent resistance. We can derive it from a Thevenin
equivalent circuit simply by making a source transformation. Thus the Norton
current equals the short circuit current at the terminals of interest, and the Norton
resistance is identical to the Thevenin resistance. The general form of the Norton
equivalent circuit is shown in Figure 3.11.
a
a
Linear R T h
two-terminal IN
network
b
b
Figure 3.11: General form of the Norton equivalent circuit.
To find the Norton equivalent circuit for the network of Figure 3.1, we perform
the similar analyses as when finding the Thevenin equivalent. That is, use the
results shown in Figure 3.10 to determine the value of the IN as 2.143A, while
from Figure 3.9 the value of RN = Voc / Isc = 1746.6Ω. Thus, in Figure 3.12 you
see the two equivalent circuits, the Thevenin equivalent and the Norton
equivalent, for the circuit shown in Figure 3.1.
1 7 4 6 . 6
a a
1 7 4 6 . 6
2 0 V 2 . 1 4 3 A
b b
Figure 3.12: Thevenin and Norton equivalent for the circuit of Figure 3.1
Maximum Power Transfer:
Circuit analysis plays an important role in the analysis of systems designed to

transfer power from source to load. There are two types of basis power transfer
system. The first emphasizes on the efficiency of power transfer. Power utility
systems are a good example of this type because they are concerned with the
generation transmission, and distribution or large quantities of electric power. The
second emphasizes on the amount of power transferred. Communication and
instrumentation systems are good examples because in the transformation of
information, or data, via electric signals, the power available at the transmitter or
detector is limited.
Maximum power transfer can best be described with the aid of the circuit shown
in Figure 3.13(a). We assume a resistive network containing independent and
dependent sources and a designated pair of terminals a-b, to which a load, RL is to
be connected. To determine the value of RL, the network needs to be replaced by
its Thevenin equivalent as shown in Figure 3.13(b). This greatly simplifies the
task of finding RL. Derivation of RL requires expressing the power dissipated in RL
as a function of three circuit parameters VTh, RTh, and RL. Thus:
P = I2R L = (VTh/(RTh+RL))2RL
The maximum power transfer occurs when the load resistance RL equals the
Thevenin resistance RTh. To find the maximum power delivered to RL,
Pmax = V2ThRL/(2RL)2 = V2Th/4RL

R T h a
Resistive network a
containing independent I R L
R L V T h
and dependent
sources b
b
Figure 3.13(a): A circuit describing maximum Figure 3.13(b): A circuit used

to power transfer determine the value of RL for
maximum power transfer.
Example 4: Find the value of RL for maximum power transfer in the circuit of Figure
3.14. Find the maximum power transfer.
6 3 2 a
1 2 V 1 2 2 A
R L
b
Figure 3.14: For Example 4
We need to find the Thevenin resistance RTh and the Thevenin voltage VTh across
terminals a-b. To do this, first we need to place a large valued resistor across RL to find
the Thevenin voltage, VTh. The value of RL used here is 1000KΩ. The Analysis Setup
used for this simulation is Bias Point. The value of Thevenin voltage is shown in Figure
3.15. To find the short circuit current, Isc, we need to place a wire as shown in Figure
3.16.
6 3 2
1 6 . 0 0 V 2 2 . 0 0 V
1 2 . 0 0 V
2 2 . 0 0 V
1 2 V
1 2 2 A 1 0 0 0 k
0 V
0
Figure 3.15: Found Thevenin voltage, VTh across RL
The value of the VTh is 22V.
The value of the Isc is 2.444A.
Therefore, the value of RTh is 9Ω.

4 4 4 . 4 m A
9 6 3 . 0 m A
6 3 2
6 . 2 2 2 V 4 . 8 8 9 V
1 2 . 0 0 V
2 . 4 4 4 A 0 V
5 1 8 . 5 m A
1 2 V
9 6 3 . 0 m A 1 2 2 A
2 . 0 0 0 A
0 V
0
Figure 3.16: Found short circuit current, Isc
For the maximum power transfer,
RL = RTh = 9Ω
and the maximum power transfer is
Pmax = V2Th/4RL = (22V)2/(4 x 9) = 13.44W

School of Engineering
ID :______________________________________
Name : _____________________________________
Batch : MARKS
Engineering Software Applications

Experiment 1: Thevenin & Norton Circuits
Objectives: 1) To have a basic understanding of Thevenin and Norton circuits.

2) To understand the usage of independent and dependent sources.
Experiment
Outcome: 1) To understand how to use the PSpice software to simulate circuits on
Thevenin and Norton.
2) To understand the usage of independent and dependent blocks in
PSpice.
Equipment/Apparatus: 1) PSpice Software

Questions:
1. For the circuit below in Figure 3.17, the student is required to find the Thevenin
and Norton equivalent circuit by using both theoretical calculations and by PSpice
software.
5 3
I 2
6 V
1.5I2 4
Figure 3.17
2. For the circuit below in Figure 3.18, the student is required to find the Thevenin
and Norton equivalent circuit across terminals a-b by using both theoretical
calculations and by PSpice software.
0.25Vo
a
6
2
+
1 8 V
V o
3
-
b
Figure 3.18
3. Refer to the circuit in Figure 3.19; use both theoretical calculations and PSpice to
find the maximum power transfer to RL. Students are required to show the change
in maximum power transfer for a range of RL between 0KΩ < RL < 6KΩ.
1 k
1 V
R L
Figure 3.19
Additional Questions:
1. Find the Thevenin and Norton equivalent circuit across terminals a-b for the
circuit in Figure 3.20 using both theoretical calculations and PSpice software.
a
5 4
2 5 V
2 0 3 A
b
Figure 3.20
2. Find the Thevenin and Norton equivalent circuit across terminals a-b for the
circuit in Figure 3.21 using both theoretical calculations and PSpice software.
a
2 k
+
5 V
i 3v 20i v 2 5
-
b
Figure 3.21
3. Find the Norton resistance RN for the circuit in Figure 3.22 using both theoretical
calculations and PSpice software.
a
5 0 0
+
5 V
vab 10i v 2 5
i
-
b
Figure 3.22
4. Find the load RL that will result in maximum power delivered to the load of the
circuit in Figure 3.22. Also determine Pmax delivered. Students are required to
solve this problem using both theoretical calculations and by PSpice software.
A
5 0 0
+
2vAB
5 V R L
v 2 5
- B
Figure 3.22
Chapter 4: Other DC Analysis
PSpice is capable of performing several additional types of DC Analysis beyond the

simple bias point analysis discussed in Chapter 2 and 3. In this chapter, we will explore
how to use PSpice to perform simulations that allow circuit designers to develop circuit
tolerant of variations in expected operating conditions and component values. Also, we
will concentrate on Nodal and Mesh Analysis.
DC Sweep Analysis
In many situations, during the circuit design process it is necessary to analyze a circuit
over a range of DC voltage and currents. Some circumstances require that one or more
output voltages or currents be described as a function of inputs. To perform this analysis
in an efficient manner, PSpice has a built-in capability to sweep specified input sources
while tracking output values. The results can be plotted or printed so that the designer has
a thorough understanding of the full range of DC behavior of the circuit. Analysis of
Nodal and Mesh will be performed to see the efficiency of solving these circuits using
this method by means of the PSpice software.
4.1 Nodal Analysis (Current Source)
Nodal analysis provides a general procedure for analyzing circuits using node
voltages as the circuit variables. Choosing node voltages instead of elements as
the circuit variables is convenient and reduces the number of equations one must
solve simultaneously. In nodal analysis, we are interested in finding the node
voltages.
The first step in nodal analysis is selecting a node as the reference. The reference
node is commonly called the ground since it is assumed to have zero potential. A
reference node is indicated by the below symbols in Figure 4.1:
0
Figure 4.1: Common symbols for indicating a reference node.
Once we have selected a reference node, we assign voltage designations to non-

reference node. Consider, for example, the circuit in Figure 4.2. Node 0 is the
reference node (v = 0), while nodes 1 and nodes 2 are assigned voltages v1 and v2
respectively. Next, we apply KCL (Kirchoff’s Current Law) to each non-
reference node in the circuit. At node 1, applying KCL gives
I1 = I2 + i1 + i2 (4.1)
At node 2,
I2 + i2 = i3 (4.2)
We now apply Ohm’s law to express the unknown currents i1, i2, and i3 in terms of
nodes voltages. Since resistance is a passive element, by the passive sign
convention, current must always flow from a higher potential to a lower potential.
We can express this principle as
i = (vhigher – vlower)/R (4.3)
Based on the circuit in Figure 4.2, we obtain the following:
i1 = v1/R1 (4.4)
i2 = (v1 – v2)/R2 (4.5)
i3 = v2/R3 (4.6)
Substituting Eq. (4.4), (4.5), (4.6) in Eq. (4.1) and (4.2) gives the following:
I1 = I2 + v1/R1 + (v1 – v2)/R2 (4.7)
I2 + (v1 – v2)/R2 = v2/R3 (4.8)
The third step is to solve Eq. (4.7) and (4.8) using any standard method, such as
the substitution method, the elimination method or Cramer’s rule.
I 2
v 1 R 2
v 2
i 2 i 2
I 1 R 3
R 1
i 1 i 3
0
Figure 4.2: Typical circuit for nodal analysis
Example 5: Calculate the node voltages in the circuit shown in Figure 4.3 by using the
OrCAD software.
5 A
2
1
4
1 0 A
2 6
0
Figure 4.3: Circuit Analysis using current source
Solution: The circuit above has to be designed using the OrCAD software. For the
Analysis Type, we select the following as shown in Figure 4.4. For the above example,
we are using a current source. Therefore, we select Current Source. The name of the
source we write depending on which current source we consider as the main source. Let’s
say we take the 10A as the main source. So we name it as I1 and the below values are
filled in. The Start Value and the End Value are usually given high values so that range of
observation on the Probe Window is higher.
Once we have set the simulation settings for the above circuit, we click on PSpice>Run to
simulate the circuit. To observe the output (in this circuit the output is voltage at node 1
and node 2) of the circuit in the Probe Window, students are required to select the
Voltage/Level Marker as shown in Figure 4.5. Once the Voltage Marker is selected, place
two markers at node 1 and node 2 as shown in Figure 4.6. The output of the circuit can be
viewed in the Probe Window as shown in Figure 4.7. There are two lines shown here.
One is green representing the voltage at node 1 and the red line representing node 2. To
determine the voltage at node 1 and node 2, you are required to select the Toggle Cursor
as mentioned in Chapter 2. Since the main source is the 10A current source, therefore we
need to drag the Toggle Cursor until it reaches the 10A marking as shown in Figure 4.8.
At this point, we can see the voltage at node 1 is 13.33V and the voltage at node 2 is 20V.
Voltage/Level Marker
Figure 4.5: Voltage/Level Marker

Figure 4.4: DC Sweep Analysis using Current Source.
I 2
5 A
2
1
4
V V
I 1
2 6
1 0 A
Figure 4.6: Placing of Voltage/ Level Marker.

Figure 4.7: Output of the circuit in Figure 4.3. V(R2:2) represents node 1 and (VR1:2)
represents node 2.
Figure 4.8: Output of node 1 and node 2of circuit in Figure 4.3
4.2 Nodal Analysis (Voltage Source)
For the nodal analysis via voltage source, the method of solving is the same as the
above. The only difference between nodal analysis by voltage source and nodal
analysis via current source is that in Figure 4.4, instead of choosing Current
Source, we choose Voltage Source. When we consider the voltage source as the
main source, we come across a new term known as supernode. If the voltage
source (independent or dependent) is connected between two non-reference
nodes, the two non-reference nodes form a generalized node or supernode. A
supernode is formed by enclosing a dependent or independent voltage source
connected between two non-reference nodes and any elements connected in
parallel with it. An example of the supernode can be seen in Example 6.
Example 6: For the circuit shown in Figure 4.9, find the node voltages.
1 0
V1
v 1 v 2
2 V
2 A 7 A
2 4
0
Figure 4.9: Circuit for Example 6
Solution: As it can be seen from the above circuit in Figure 4.9, the presence of the
supernode happens to be between v1 and v2. In order to solve this example, first we have
to simulate this circuit using the OrCAD software. The method to solve is identical to that
of in Example 5. Here the main source is a voltage source. Therefore, for the Simulation
Settings as shown in Figure 4.10, we have to select the DC Sweep under the Type of
Analysis. Next, we select the Voltage Source by naming it V1. The value for the Start
Value, End Value and Increment are as follows in Figure 4.10.
Next, the circuit is simulated and the Voltage Marker is placed at v1 and v2 as shown in
Figure 4.11. There are two lines shown here. One is green representing the voltage at
node 1 and the red line representing node 2. To determine the voltage at node 1 and node
2, you are required to select the Toggle Cursor as mentioned in Chapter 2. Since the main
source is the 2V voltage source, therefore we need to drag the Toggle Cursor until it
reaches the 2V marking as shown in Figure 4.11. At this point, we can see the voltage at
node 1 is -7.333V and the voltage at node 2 is -5.333V.
Figure 4.10: Simulation Settings for choosing the Voltage Source
1 0
v 1 v 2
V 2 V V
2 A 7 A
2 4
Figure 4.11: Simulated circuit for Example 6.

Figure 4.11: Output for simulated circuit in Example 6. V (R1:1) represents the voltage at
v1 and V (R1:2) represents the voltage at v2.
4.3 Mesh Analysis (Voltage Source)
Mesh analysis provides another general procedure for analyzing circuits, using
mesh currents as the circuit variables. Using mesh currents instead of element
currents as circuit variables is convenient. Nodal analysis applies KCL to find
unknown voltages in a given circuit, while mesh analysis applies KVL to find
unknown currents. The circuit in Figure 4.12 shows an example of how mesh
currents are calculated theoretically.
The first step requires the mesh currents i1 and i2 are assigned to meshes 1 and 2.
Here mesh 1 is represented by abefa and mesh 2 is represented by bcdeb.
Although a mesh current may be assigned to each mesh in an arbitrary direction,
it is conventional to assume that each mesh current flows clockwise. As the
second step, we apply KVL to each mesh. The following equations will represent
mesh 1 and mesh 2:
Mesh 1:
-V1 + R1i1 + R3(i1 – i2) = 0
or
(R1 + R3)i1 – R3i2 = V1
Mesh 2:
R2i2 + V2 + R3(i2 – i1) = 0
or
-R3i1 + (R2 + R3)i2 = -V2
a R 1 b R 2 c
I 1 I 2
I 3
R 3 V 2
V 1
i 1 i 2
f e d
Figure 4.12: A circuit with two meshes.
Notice that the branch currents are different from the mesh currents unless the
mesh is isolated. To distinguish between the two types of currents, we use i for a
mesh current and I for a branch current. The current elements I1, I2, and I3 are
algebraic sums of the mesh currents. This can be shown as follows:
I1 = i1, I2 = i2, I3 = i1 – i2
The next example will show you how the Mesh Analysis via Voltage Source is
solved using the OrCAD software.
Example 7: For the circuit in Figure 4.13, find the branch currents I1, I2, and I3
using mesh analysis.
I 1 I 2
5 6
I 3
1 0
1 5 V i 1 i 2
4
1 0 V
0
Solution: To solve the above example, first we have to design the above circuit in
OrCAD software. The method to solve is identical to that of in Example 6. Here the main
source is a voltage source. Therefore, for the Simulation Settings as shown in Figure
4.14, we have to select the DC Sweep under the Type of Analysis. Next, we select the
Voltage Source by naming it V1. Here V1 is representing 15V. The value for the Start
Value, End Value and Increment are as follows in Figure 4.14.
Since the circuit above requires us to find the branch current, therefore we have to use the
Current/Level Marker as shown in Figure 4.15.
Next, the circuit is simulated and the Current Markers are placed at I1, I2 and I3 as
shown in Figure 4.16. There are three lines shown here. One is blue representing the
current at I1, the red line representing current at I2 and the green line representing the
current at I3. To determine the current at I1, I2, and I3, you are required to select the
Toggle Cursor as mentioned in Chapter 2. Since the main source is the 15V voltage
source, therefore we need to drag the Toggle Cursor until it reaches the 15V marking as
shown in Figure 4.17. At this point, we can see the current at I1 is
Current/Level Marker
Figure 4.15: Current/Level Marker

Figure 4.14: Simulation Settings for choosing the Voltage Source
I 1 I 2
5 6
I I 3 I
I
1 0
1 5 V i 1 i 2
4
1 0 V
0
Figure 4.16: Simulated circuit for Example 7
Figure 4.17: Output for simulated circuit in Example 7. I (R1) represent the current at
I1, I (R2) represent the current at I2 and –I (R3) represent the current at I3.
4.4 Mesh Analysis (Current Source)
Applying mesh analysis to circuits containing current sources (dependent or

independent) may appear complicated. But it is actually much easier than what we
have encountered. A supermesh results when two meshes have (dependent or
independent) current source in common. A supermesh has no current of its own
and a supermesh requires the application of both KVL and KCL.
To solve a mesh analysis with current source, the method implied here is the same
of that in Example 6.
ID :______________________________________
Name : _____________________________________
Batch : MARKS

Experiment 2: DC Sweep (Mesh Analysis and Nodal Analysis)
Objectives: 1) To have a basic understanding of mesh and nodal analysis.

2) To understand the usage of Analysis Type DC sweep.
Experiment
Outcome: 1) To understand how to use the PSpice software to simulate circuits using
mesh and nodal analysis
Questions:
1. Obtain the node voltages in the circuit in Figure 4.18 theoretically and using
OrCAD software at node 1 and node 2.
1 6 2
2
1 A 7 4 A
Figure 4.18
2. Determine the voltages at nodes 1, 2 and 3 in Figure 4.19 theoretically and using
OrCAD software.
4
1 2 2 8
3
i x
1 A 3A 4 2ix
0
Figure 4.19
3. Find the voltages at the three non-reference nodes in the circuit in Figure 4.20
theoretically and using OrCAD software. 2
1 3 2
3
4 ix
6
i x
1 0 A 4
Figure 4.20 0
4. Find the v and i in the circuit in Figure 4.21 theoretically and using OrCAD
software. 3 V
i
+
7 V v
3 2 6
Figure 4.21
5. Find the node voltages v1, v2, v3 and v4 in the circuit of Figure 4.22 theoretically
and using OrCAD software.
3
+ v x-
3vx
2 0 V
1 2 3
+- 4
6
2 1 0 A 4
1
0
Figure 4.22
6. Use mesh analysis to find the current io in the circuit in Figure 4.23 theoretically
i 1 i 2
i o
1 0 2 4
i 2
4
i 1
2 4 V
+
4io
-
1 2 i 3
Figure 4.23
7. For the circuit in Figure 4.24, find i1 to i4 using mesh analysis both theoretically
i 1
i 1
4 2
5 A
i o
i 2
1 0 V
3io
6 i 2 i 3 i 4
8
i 2 i 3
Figure 4.24
1. Find v1, v2 and v3 in the circuit in Figure 4.25 using nodal analysis both
theoretically and using OrCAD software.
6
5i
V 6
v 2
v 1 v 3
A C =
T R A N =
i D C =
2 4 3
Figure 4.25
2. Calculate the mesh currents i1 and i2 in the circuit of Figure 4.26 both
theoretically and using OrCAD software.
2 9
1 2 V i 1 8 V
1 2 i 2
4 3
Figure 4.26
3. Using mesh analysis, find io in the circuit in Figure 4.27 both theoretically and
using OrCAD software.
i o i 3
4 8
2 0 V
2 10io
i 1 i 2
Figure 4.27
4. Use mesh analysis to determine i1, i2 and i3 in Figure 4.28 both theoretically and
using OrCAD software.
2 2
i 3
i 1
4
6 V 3 A
i 2
Figure 4.28
5. Use the OrCAD software to find the node voltages at node 1, node 2 and node 3in
the circuit of Figure 4.29.
1 2 3
2 0 1 0
3 A
1 2 0 V
3 0 4 0
Figure 4.29
6. In the circuit of Figure 4.30, determine the currents of i1, i2 and i3 using the
OrCAD software.
3vo
4 2
i 1 i 3
i 2 +
2 4 V v o
4
2 8
-
Figure 4.30
Chapter 5: Operational Amplifiers
An operational amplifier, which is often called an op-amp, is a DC-coupled high-gain

electronic voltage amplifier with differential inputs and, usually, a single output.
Typically the output of the op-amp is controlled either by negative feedback, which
largely determines the magnitude of its output voltage gain, or by positive feedback,
which facilitates regenerative gain and oscillation. High input impedance at the input
terminals and low output impedance are important typical characteristics.
Op-amps are among the most widely used electronic devices today, being used in a vast
array of consumer, industrial, and scientific devices. The use of op-amps as circuit blocks
is much easier and clearer than specifying all their individual circuit elements (transistors,
resistors), whether the amplifiers used is integrated or discrete. In the first approximation
op-amps can be used as if they were ideal differential gain blocks; at a later stage limits
can be placed on the acceptable range of parameters for each op-amp.
In this chapter, we will also introduce the use of AC Sweep, which is part of the Analysis
Test Type. Op amps are generally modeled in three different ways in PSpice. The
simplest model is one that uses resistors and dependent sources to model the basic
behavior of the op amp. The second type involves the introduction to the different types
of op amps available such as inverting, non-inverting and others. The third type, has built
in op amps into the library of parts, which includes the usage of the idealized and non-
idealized op amps.
5.1 Simple Op Amp Model
The simple operational amplifier can be modeled as follows in Figure 5.1. The
main part in an amplifier is the dependent voltage source that increases in relation
to the voltage drop across Rin, thus amplifying the voltage difference between V +
and V − . Many uses have been found for operational amplifiers and an ideal op-
amp seeks to characterize the physical phenomena that make op-amps useful.
Supply voltages Vs + and Vs − are used internally to implement the dependent

voltage sources. The positive source Vs + acts as an upper bound on the output, and
the negative source Vs − acts as a lower bound on the output. The internal Vs + and
Vs − connections are not shown here and will vary by implementation of the
operational amplifier.
Example 8: For an amplifier circuit containing an op amp as shown in Figure 5.2,

determine the output voltage across the load resistor when the input signal is set to
0.5Vdc and compare it with the analytic solution for Vi and Vout. The op amp has
an input resistance, Rin = 100kΩ, output resistance Rout = 500Ω, an amplification
factor of G = 10000.
Figure 5.1: Idealized model for the operational amplifier.
2 0 k
U 1
+
1 0 k
O U T
0 . 5 V d c - O P A M P
5 k
0
0
0
Figure 5.2: Simple amplifier circuit
Solution: The schematic for the circuit in Figure 5.2 is given in Figure 5.3. The voltage
dependent voltage source E1 is set to have a gain of -10000 in the Property Editor. A
negative gain is used to account for the polarity of the input voltage of the op amp being
opposite that inherent in the element E1. Resistor R2 models the 100kΩ input resistance
of the ideal op amp while resistor R4 models the 500Ω output resistance. Voltage source
V1 is set to the input voltage specified as 0.5V.
R 3
2 0 k
R 1 R 4
Vo
1 0 k 5 0 0
E 1
+ +
-
-
V 1 E
R 2 R 5
0 . 5 V d c 1 0 0 k 5 k
0
Figure 5.3: The circuit above is representing the schematic circuit in Figure 5.2.
Figure 5.4: The PSpice output file from the bias point analysis of the circuit in Figure 5.3
Use bias point analysis to determine the output voltage for the given input voltage. Click
on the Run button, and examine the results from the PSpice analysis as shown in Figure
5.4. We can see that the output voltage at node N00501 is calculated to be -0.9996V by
PSpice. Calculating the output voltage by hand using the simple op amp model and KCL
at the two nodes V1 and Vo produces the following equations:
(0.5 – V1)/(10000) = V1/(100000) + (V1 – Vo)/20000
and
Vo/(5000) = (-10000V1 – Vo)/(500) + (V1 – Vo)/(20000)
Solving these equations simultaneously produces the value Vo = -0.999V, which matches
the calculated by PSpice.
5.2 Introduction of different type of Op Amp
As we go through this chapter, students will be exposed to different types

of operational amplifiers. Most of the time, students will encounter the
common types of operational amplifiers such as inverting amplifier, non-
inverting amplifier, comparator, summing amplifier, differential amplifier
as well as the integrator amplifier. In this chapter students will be thought
the basic formulas to perform analytic calculations whenever required. As
for the PSpice simulation, that will be discussed later in this chapter.
a. Inverting Amplifier
Figure 5.5: Inverting Amplifier

Inverts and amplifies a voltage (multiplies by a negative constant)
• Zin = Rin (because V − is a virtual ground)

 A third resistor, of value ,
added between the non-inverting input and ground, while not necessary, minimizes errors
due to input bias currents.
b. Non-Inverting Amplifier
Amplifies a voltage (multiplies by a constant greater than 1)
Figure 5.6: Non-Inverting Amplifier
c. Comparator
Used as a buffer amplifier, to eliminate loading effects or to interface

impedances (connecting a device with a high source impedance to a
device with a low input impedance). Due to the strong feedback, this
circuit tends to get unstable when driving a high capacity load. This can be
avoided by connecting the load through a resistor.
• (realistically, the differential input impedance of the op-

amp itself, 1 MΩ to 1 TΩ)
Figure 5.7: Voltage Follower (Comparator)
d. Summing Amplifier
Sums several (weighted) voltages
1. When , and Rf independent
• When
• Output is inverted
• Input impedance Zn = Rn, for each input (V − is a virtual ground)
Figure 5.8: Summing Amplifier

e. Integrator
Integrates the (inverted) signal over time
(where Vin and Vout are functions of time, Vinitial is the output voltage of the
integrator at time t = 0.)
Figure 5.9: Integrator Amplifier
f. Differential Amplifier
The circuit shown is used for finding the difference of two voltages each
multiplied by some constant (determined by the resistors).
• Differential Zin (between the two input pins) = R1 + R2
Figure 5.10: Differential Amplifier

5.3 Ideal and Non-Ideal Op Amp
Ideal Op Amp:
The ideal op amp has infinite voltage gain and infinite bandwidth. Also, it
has infinite input impedance (open) so that it does not load the driving
source. Finally it has zero output impedance. These characteristics can be
illustrated on Figure 5.1. The input voltage Vi appears between the two
input terminals, and the output voltage is G*Vi, as indicated by the internal
voltage source symbol. The concept of infinite input impedance is a
particularly valuable analysis tool for the various op amp configurations.
The ideal op amp in PSpice can be found as follows:
Place Part>Analog Library>OPAMP

The below Figure will show you the ideal op amp:
Figure 5.11: Ideal Op Amp
Non-Ideal Op Amp
Op amps have both voltage and current limitations. Peak to peak output
voltage, for example, is usually limited to slightly less than two supply
voltages. Output current is also limited by internal restrictions such as
power dissipation and component ratings. Characteristics of a practical op
amp are very high voltage gain, very high input impedance, very low
output impedance, and wide bandwidth. The non-ideal op amp can be
found as follows:
Place Part>Eval Library>uA741
The non ideal op amp used here is a uA741. The below figure will show
you the non-ideal op amp:
Figure 5.12: Non-ideal op amp
The below example will show you how to use an ideal and non ideal op amp as well and
teach you how to use the AC Sweep Analysis Test Type.
Example 9: The below circuit in Figure 5.13 is a First Order Active Low Pass Filter.
Based on the above circuit diagram, students are needed to do the following:
a) Simulate the above circuit using an ideal operational amplifier and perform Basic
AC Sweep Analysis.
b) Change the Cut-Off frequency to the last two digit of your student ID and show
the cut-off frequency on the simulated graph.
c) Change the ideal operational amplifier to a uA741 and perform Basic AC Sweep
Analysis.
d) Change the gain to 16 and perform the Basic AC Sweep Analysis
e) Perform the temperature sweep from 100 to 200 with an increment of 100.
Circuit Theory & Design
Cut-Off Frequency Gain
f = 1/(2πR1C1) A = (R2/R3) + 1
Solution: As we can see from the schematic circuit above, the circuit utilizes an ideal op
amp. Based on the question also, along the way we will have this circuit by utilizing a
non ideal op amp as well. The circuit above utilizes an AC source. To find for the AC
source, go to Place Part>SOURCE Library>VAC as shown in Figure 5.14. As seen from
the VAC, there are two labels written as Vac and Vdc. Since the above circuit is
simulated using the AC Sweep, therefore we need to label the VAC with 10Vac as shown
in Figure 5.13. The Vdc is labeled with 0Vdc as we are not using the DC Sweep for this
example.
Figure 5.14: AC Voltage Source

Next, we have to draw the circuit in Figure 5.13 using the OrCAD software. Figure 5.15
will show the schematic circuit for Figure 5.13 as follows:
R 1 U 1
+
2 k
O U T
- O P A M P
R 2
V 1
1 0 V a c 3 k
0 V d c C 1
5 n
R 3
1 k
0
Figure 5.15: Schematic circuit for Example 9
Next we simulate the circuit in Figure 5.15 using the AC Sweep. To simulate the circuit,
we go to PSpice>New Simulation Profile>Analysis Type>AC Sweep/Noise. Here we
choose the AC Sweep Type to be Logarithmic. The values for Start Frequency, End
Frequency and Points/Decade are filled in as shown in Figure 5.16. For the
Points/Decade, the higher the numbers of points are, the more accurate the reading
becomes.
Figure 5.16: AC Sweep Simulation Settings

Next, we place a Voltage Marker as at resistor R2 which is the output of the circuit and
then click on the RUN button to simulate the circuit as shown in Figure 5.17. The output
of the circuit can be seen in Figure 5.18.
0 A
R 1 U 1
(a) +
2 k
0 V
O U T
- V
O P A M 0P V
0 V
R 2
0 A
1 0 V a c 3 k
0 V d c C 1 0 A
V 1
5 n
0 V
R 3
1 k
0 A
0 V
0
Figure 5.17: Simulated Circuit for Figure 5.13
Figure 5.18: Output for the above circuit in Figure 5.13.

As we can see from the output of the circuit in Figure 5.18, the simulated graph is marked
with a value of 15.897 KHz. This value represents the cut-off frequency of the circuit in
Figure 5.13. The calculated value of the cut off frequency is shown as follows:
Cut off Frequency = 1/ (2 x π x 2 kΩ x 5 nF)

= 15.915 KHz
The above simulation of the circuit and seeing of the output both in Figure 5.17 and
Figure 5.18 practically ends for part (a) of the Example 9.
(b) For this part the student is required to replace the value of the cut off frequency with
the last two digits of their student ID. If the student ID is 1000810097, this means the
new Cut-Off Frequency is 97.000 KHz. Next, the student has to locate the value of this
new cut-off frequency on the simulated graph using the Toggle Cursor. Based on Figure
5.19, it can be seen that value closest in 97.000 KHz is 96.977 KHz. Therefore, the
student can be allowed to take this value as the value closest to 96.977 KHz.
Figure 5.19: The new cut-off frequency is 96.977 KHz.
(c) Here, the student is required to change the ideal op amp to a non-ideal op amp in
Figure 5.13 and simulate the circuit again using the AC Sweep Analysis Test Type. The
schematic circuit is shown as follows in Figure 5.20. In using a non-ideal op amp for
simulation, the students are required to connect pins 4 and 7 as shown in Figure 5.20 with
a DC Source. The Simulation Settings are the same as above in Figure 5.16.
V C C
2 0 . 0 0 V
7 9 . 7 2 n A 7 9 . 7 2 n A
R 1 U 2
7
3 5 2 . 2 1 8 m A
+ O S 2
V+
2 k
0 V 6 6 0 . 4 6 n A
O U T
2 1 V
- O S 1
V-
- 1 5 9 u. 4A u 7 V 4 1 - 3 2 1 . 4 u V
- 2 0 . 0 0 V
4
R 2
7 9 . 7 V 6 Cn AC 1
1 0 V a c - 2 . 2 1 8 m 3 Ak V C C V C C 1
0 V d c C 1 6 0 . 4 2 n A
V 1
7 9 . 7 2 n A 5 n - 2 0 . 0 0 V
2 0 . 0 0 V
V 2 V 3
- 1 4 0 . 2 u V 2 0 V d c - 2 0 V d 2c . 2 1 8 m A
R 3 2 . 2 1 8 m A
1 k
1 4 0 . 2 n A
0 0
0 V
0
Figure 5.20: Simulated Circuit using Non-Ideal Op Amp

As we can see in the above Figure, to represent the DC Source on the non-ideal op amp,
we use VCC/CAPSYM. Since pin 7 of the op amp is representing the positive side, the
pin is labeled with VCC which is valued with +20V and pin 4 is representing the negative
side, so the pin is labeled with VCC1 which is valued with -20V. To search for the
VCC/CAPSYM, the student needs to look back at Figure 2.2 in Chapter 2. On that
Figure, there is icon for Add Power. The students need to click on
Add Power>VCC/CAPSYM and later place the VCC/CAPSYM as shown in Figure 5.20.
As for the output of the circuit in Figure 5.21, it can be seen that the value of 15.971 KHz
has been labeled as the cut off frequency. It also can be seen that the accuracy of the
reading is not as accurate when utilizing the ideal op amp simulate circuit. For the ideal
op amp, the cut off frequency was 15.897 KHz. The difference between this value and the
calculated value is 18 KHz whereas the difference when using the non ideal op amp is 56
KHz. This clearly shows that there is a difference when we use an ideal and a non ideal
op amp.
(d) For this part, the student is required the change the gain of the circuit in Figure 5.20 to
16. This can be done by using the formula for Gain provided in the Example above. To
change the gain here, the student can either change the value for resistor R2 and fixed the
value of resistor R3 or the student can change the value for resistor R3 and fixed the
value for resistor R2. Let’s say we change the value of R2 and fixed the value for R3.
So, Gain = (R2/R3) + 1
16 = (R2/1 KΩ) + 1
R2 = 15 KΩ
Next, we change the value of the resistor R2 in Figure 5.20 and re-simulate the circuit
again as shown in Figure 5.22. The output of the circuit is shown in Figure 5.23 as
follows:
Figure 5.21: Output of a non-ideal op amp for circuit in Figure 5.20
V C C
R 1 U 2
7
3 5
+ O S 2
V+
2 k
6
O U T
2 1 V
- O S 1
V-
u A 7 4 1
4
R 2
V C C 1
1 0 V a c 1 5 k V C C V C C 1
0 V d c C 1
V 1
5 n
V 2 V 3
2 0 V d c - 2 0 V d c
R 3
1 k
0 0
0
Figure 5.22: Schematic circuit for part (d)
Figure 5.23: Output of circuit in Figure 5.22
(e) For the last part, the student is required to perform the temperature sweep from 100 to
200 with an increment of 100. Here the students are required to select the Temperature
Sweep under the AC Sweep Analysis Type. Since the example requires the student to
perform the temperature sweep from 100 to 200 with an increment of 100, therefore the
student need to fill the values as shown in Figure 5.24.
After the student has filled in the values, the students are required to click on the RUN
button to simulate the circuit. The output of the circuit based on the Temperature Settings
is as follows in Figure 5.25. Based on the output in Figure 5.25, it can be seen that a
change in 100 degrees does not show a significant change in the output. In future, if the
student is requested to perform Temperature Sweep test, and the change required is
higher, then maybe the student will witness a higher significant change in the output.
Figure 5.24: Temperature Sweep Simulation Settings
Figure 5.25: Output for the Simulation Settings shown above in Figure 5.24
ID :______________________________________
Name : _____________________________________
Batch : MARKS

Experiment 3: Operational Amplifiers
Objectives: 1) To have a basic understanding of operational op amp.

2) To understand the usage of Analysis Type AC sweep.
Experiment
Outcome: 1) To understand how to use the PSpice software to simulate op amp
circuits using AC Sweep.
Questions:
1.
Figure 5.26
The above circuit in Figure 5.26 is a Second Order Sallen & Key Low Pass Filter.
Based on the above circuit diagram, students are needed to do the following:
f) Simulate the above circuit using an ideal operational amplifier.
g) Change the Cut-Off frequency to the last two digit of your student ID and show
the cut-off frequency on the simulated graph.
h) Change the ideal operational amplifier to a uA741 and perform Basic AC Sweep
Analysis.
i) Change the gain to 16 and perform the Basic AC Sweep Analysis
j) Perform the temperature sweep from 100 to 300 with an increment of 100.
Students are needed to show the above results by means of the simulation graphs.
Explanation is also required to explain why the necessary results have taken place.
2.
Figure 5.27
Perform the transient analysis on the above circuit using AC sweep. Find the
simulated at the OUT of the circuit. For the above circuit, the students are
required to perform the simulation using the IDEAL operational amplifier.
3.
Figure 5.28
Perform the transient analysis on the above circuit using AC sweep. Find the
simulated at the OUT of the circuit. For the above circuit, the students are
required to perform the simulation using the uA741 operational amplifier.
Students are required to provide an explanation on the difference of the simulated
graphs at the OUT connector.
4.
Figure 5.29
Based on the above circuit, students are required to perform the transient analysis
with a run time of 2ms with a maximum step size of 1us for Vin and Vout.
For the above circuit, students are required to provide the output for the ideal and
non-ideal operational amplifier.
Students are also required to perform the temperature sweep from 100 to 300 with
an increment of 50 degrees.
5.
Figure 5.30
Based on the above circuit, students are required to perform the AC sweep
analysis using both the ideal and non-ideal operational amplifiers. Students are
required to provide the output at point 3. The input for the above source is 1VAC.
1.
Figure 5.31
required to provide the output at Vout. The input for the above source is 1VAC.
2.
Figure 5.32
required to provide the output at Vout. The input for the above source is 1VAC.
(Hint: VCC = VEE = 15V)
3.
Figure 5.33
required to provide the output at Vout and compare the results by theoretical
results. The input for the above source is 1VAC.
4.
Figure 5.34
required to provide the output at Vout.. The input for the above source is 1VAC.
Chapter 6: Time Domain Analysis

All electrical circuits have some type of time dependent behavior that needs to be
considered during the design cycle. Even simple electrical devices like the flashlight,
physically consisting a battery, a switch, and a resistor (the bulb), and have a time
varying behavior. As the switch is moved from off to on, or vice versa, the response of
the circuit is time varying and should be analyzed in order to understand not only the
circuit’s performance, but also its reliability.
The term time domain analysis indicates that we will be determining the output variables
as a function of time. Therefore, the independent variables in our calculation will be t,
standing for the time elapsed. In SPICE calculations, time domain analysis is referred to
as transient analysis. DC analyses performed earlier calculated values of the dependent
variables as a function of voltage or current. One of the forms of output in a DC analysis
is a plot of an output variable vs. voltage or current. When performing transient analyses,
we will generate plots of output variables vs. time. These results are similar to what we
might generally see displayed on a typical oscilloscope.
Previous chapters have covered the DC behavior of circuits where the only circuit
elements considered was DC sources and resistors. Any capacitance that might have
present in a physical circuit was modeled as open circuits while inductors were modeled
as short circuits. In this chapter, time varying sources will be considered, and all
capacitance and inductance will be included in the analysis. We will begin our discussion
of time varying circuits by analyzing circuits that contain no sources. For these circuits,
we will be seeking what is referred to as the natural response of the circuit. Initial
conditions will be specified for an arbitrary time called t = 0. Typically, some event will
occur at time t = 0 that will change the state or the configuration of a circuit, and we are
interested in knowing the circuit voltages and currents for t > 0.
6.1 Source Free RL Circuits
Source free circuits must have an initial voltage on a capacitor or an initial current
flowing in an inductor for a time dependent response to occur. The first step in
performing an analysis on a source free circuit is to determine the initial
conditions. Once the initial conditions are known, the circuit can be drawn, the
element parameters entered, and the simulation performed.
Example 10: Determine the natural response of a simple RL circuit with R in

parallel to L. Set R = 1 KΩ and L = 10 mH with an initial current of 10 mA
flowing in the inductor at t = 0. Plot the loop current using Probe Window.
Solution: The schematic for the circuit described above is shown in Figure 6.1.
Because the circuit utilizes an inductor, therefore a current marker is use in the
circuit. For the initial conditions as mentioned earlier, double click the inductor
and you will see the Property Editor. Look for a column indicating IC (initial
condition). Fill this column with 10 mA as shown in Figure 6.2. Once the column
is filled, click Apply and close the Property Editor.
For time domain analysis, we use the transient analysis as the Analysis Test Type.
Once the circuit has been drawn as shown in Figure 6.1, next we need to simulate
the circuit. To simulate, we need to go to PSpice>New Simulation Profile. Here
we select Time Domain (Transient) as shown in Figure 6.3. Here, we set the “Run
to Time” or TSTOP. The value that needs to be set here depends on the below
formula:
τ = L/R
=10mH/1KΩ
= 10µs
Since the time constant is 10µs, therefore, we choose the “Run to Time” to be
around 100µs. Since the initial conditions has already specified as part of the
inductor, therefore, we click on SKIBP (Skip the Initial transient bias point
calculations). This is done to omit unnecessary attempts at recalculating the state
of the circuit at t = 0. From our knowledge of circuit analysis, we know that this
circuit should exhibit a current flowing in the inductor that starts at 10 mA and
decays exponentially towards zero as it reaches t = 60 µs. The output of the circuit
in Figure 6.1 can be observed in Figure 6.4.
L 1
I
R 1
1 0 m H
1 k
0
Figure 6.1: Source Free RL circuit
Figure 6.2: Property Editor of Inductor indicating the initial condition (IC) as 10mA
Figure 6.3: Simulation Settings for Time Domain (Transient)
Figure 6.4: Output for the source free RL circuit
6.2 Source Free RC Circuits

A simple, yet important circuit, is one consisting of a charged capacitor
discharging through a resistor. This circuit forms the basis for many different
component behaviors seen in electronic devices such as diodes, transistors, and so
on. The basic behavior of this source free circuit can be modeled in much the
same way as the RL circuit above. However, for the purposes of illustration, we
will introduce a new transient element, the switch, and use it to connect the
capacitor to the discharge part at an arbitrary time.
Example 11: Configure a 5 KΩ resistor in series with a switch, in series with a 10

µF capacitance. Assume that the capacitor is initially charged to 5V and is to be
placed in parallel with the resistor at t = 10ms. Determine the voltage across the
capacitor and the current through the resistor as a function of time.
Solution: A schematic circuit for the above problem can be seen as shown in
Figure 6.5.Since the problem requires us to find the voltage across the capacitor
we place a voltage marker. At the same time, the problem also requires us to find
the current across the resistor, so we place a current marker to find the current
flowing in the circuit. Based on Figure 6.5, it can be seen that the circuit utilizes a
switch. This switch can be obtained from the EVAL library from the Place Part.
The type of switch used here is SW_tClose. This can be seen as shown in Figure
6.6. By clicking open the Property Editor as shown in Figure 6.7, the value of t =
10ms is filled in the TCLOSE column. TTRAN which is known as the transition
time for the switch, is specified as 10 ps. This indicates that this switch closes
very fast. The remaining parameters such as ROPEN and RCLOSED are specified
as shown in Figure 6.7. Values for these parameters are set so that the simulation
part closely models an ideal switch. Also, we have filled in the IC (initial
condition) column of the capacitor with a value of -5V.
T C L O S E = 0 . 0 1
1 2
U 1
R 1
C 1
I
V 5 k
1 0 u
Figure 6.5: Source Free RC Circuit

Figure 6.6: Switch part in EVAL library
Figure 6.7: Property Editor for the PSpice switch part
To simulate the circuit, the settings are set the same as for the RL circuit. Here the “Run
to Time” is set based on the following formula:
τ = R*C
= 5KΩ*10µF
= 50 ms
Since the value of τ = 50ms, we set the “Run to Time” to 250ms so that we can have a
wider view of the output of the circuit shown in Figure 6.8. The remaining settings are
the same as shown in Figure 6.3. Next, we simulate the circuit by clicking the RUN
button. From the output, it can be seen that there are two lines. The yellow line is
representing the current across the resistor as I (R1) whereas the voltage is represented by
the green line indicated as V (C1:2). Also, it can be seen that the value of the current is
labeled with a value of 0A. Actually, the value of the current is not 0A. Because the value
of the current is so much smaller compared to the value of voltage across the capacitor,
therefore it is indicated as 0A. To see the value of the current, simply remove the voltage
marker from the circuit from Figure 6.5 and the output of the current can be seen in
Figure 6.9.
Figure 6.8: Plotted results of voltage across the capacitor and current across the resistor
Figure 6.9: Probe window with a plot of the current across the resistor.
6.3 Source Free RLC Circuits

Most practical circuits include all three main electrical components: resistors,
inductors and capacitors. Often these elements are not all included intentionally;
rather some are parasitic elements that become part of the circuit because of the
way in which it is fabricated. To examine the effects of these type of circuits, we
will analyze a source free RLC circuit and determine the type of response that
occur.
Example 12: Simulate the behavior of a circuit consisting of a 5 Ω resistor in

series with a 2 mF capacitor in series with a 5H inductor. The capacitor is initially
charged to 10V and the inductor has 1A flowing in it at t = 0. Determine the
voltage across and the current through the resistor.
Solution: The circuit for the above example is drawn and shown as below in
Figure 6.10. Since the problem requires us to find the voltage and current across
the resistor, we will place a voltage and current marker across the resistor. Both
the capacitor and inductor have an initial condition value that needs to fill in their
respective Property Editor IC columns. After the IC has been filled in, we set the
simulation settings for the circuit in Figure 6.11. Here the simulation settings for
the “Run to Time” are set to 4s as shown in Figure 6.11. Next, we simulate the
circuit by clicking the RUN button.
C 1 L 1
1 2
2 m 5
V
R 1
5
I
0
Figure 6.11: Source Free RLC circuit
The results for the simulation are shown in Figure 6.12. Both the voltage and the current
are shown on the same plot. The waveform in the figure is under-damped with the
voltage starting off at 5V while the current is 1A. Both values eventually fall to zero as
expected in a source free circuit. Confirmation of the general shape of the waveforms can
be obtained through two simple calculations:
α = R/L = 5/5 = 1
ωo = 1/ (LC)1/2 = 1/ (0.01)1/2 = 10
Since ωo > α, the response of the circuit is under-damped and the waveforms calculated
by PSpice are reasonable.
Figure 6.11: Simulation Settings for source free RLC circuit.
Figure 6.12: Simulation results based on schematic circuit in Figure 6.11
If we look closely at the simulation results, it can be seen that the waveforms are not so
smooth. In order to make the waveforms smooth based on the simulation settings shown
in Figure 6.13, we can fill in the Maximum step size with value which much smaller than
the “Run to Time”. In this case, let’s set it to 1ms. Based on the settings, when we re-
simulate the circuit, the simulation results in Figure 6.14 is a lot more smoother compared
to those in Figure 6.12.
Figure 6.13: Simulation Settings upon filling up the Maximum step size.
Figure 6.14: Simulation results after setting the maximum step size.
6.4 Time Varying Sources
Most practical circuits have some form of time varying source in the circuit. In
simple cases time varying sources are modeled as switches. More complex time
varying sources require models that follow certain mathematical behavior. Time
varying source models are contained in the SOURCE parts library. For the
following parts description, seconds are the units for all variables that are a
function of time, volts are the units for all variables that describe voltage, and
amperes are the units for all current parameters.
Voltage source VPULSE delivers a pulse waveform which is defined by a set of

parameters that control transition times and voltage levels. Figure 6.15 shows the
symbol of the voltage source mentioned above. Here:
V1 = offset voltage
V 1 = V 1 V2 = peak voltage
V 2 = TD = time delay before the pulse waveform begins
T D = oscillating at a certain frequency
T R = TR = rise time which provides the slope portion of
T F = the waveform
P W = TF = fall time which shows how fast the waveform
P E R = falls from the value at V2
PW = pulse width which what is the width of
each/time gap for each pulse.
PER = period which represents the cycle time for
each pulse
Figure 6.15
The next voltage source is the VSIN which produces a time varying sinusoidal
waveform as shown in Figure 6.16.
V 2 VOFF = initial offset voltage for the waveform

VAMPL = waveform amplitude with the actual
V O F F = maximum voltage being VAMPL + VOFF
V A M P L
FREQ == 1/TSTOP Hz, where TSTOP is the
simulation stop time as specifies in the
F R E Q = Simulation Settings window
Figure 6.16
The next source is VEXP which produces an exponentially rising and

exponentially falling voltage waveform. Figure 6.17 shows a symbol of this time
varying source.
V1 = offset voltage
V 1 = V 3 V2 = peak voltage
V 2 =
T D 1 =
T C 1 =
T D 2 =
T C 2 =
TD1 = time delay before the start of the rise of the
waveform
TC1 = exponential time constant for the rising portion of
the waveform
TD2 = TD1 + 1 simulation time step TSTEP
TC2 = TD1 + TD2, after which the voltage begins to fall
exponentially with a time constant.
Figure 6.17
The last source here is the VPWL which produces a piecewise linear time varying
waveform. Figure 6.18 shows the symbol for this voltage source:
T 1 = V 4 V1), (T2, V2), (T3, V3) are points that represent the
(T1,
V 1 = voltage transition linearly with time.
T 2 =
V 2 =
T 3 =
V 3 =
Figure 6.18
For each of the time varying voltage sources described above, there is a
corresponding current source that has the same set of parameters and produces the
same format of waveform. The corresponding part names are IPULSE, ISIN,
IEXP, and IPWL.
6.5 Circuits with Time Varying Sources
The step response of a circuit is its behavior when the voltage or current
excitation is applied in the form of a step function. The ideal step function
has an infinitely small rise time. Because of the way in which PSpice
performs its calculations, we are limited to producing a driving source that
has a finite slope for its rise or fall time.
Example 13: Determine the step response of a simple RC series circuit which has
an initial voltage across the capacitor of zero volts.
Solution: A schematic for the simple RC circuit is shown in Figure 6.19. Source
VPULSE is used to provide the step function input which changes from zero to
five volts. The specification of the voltage source is shown as follows in Figure
6.19.
A Time Domain (Transient) analysis is specified in the Simulation Settings
window along with ensuring that the SKIBP is left unchecked. This is done so to
enable an initial bias point analysis of the circuit to be performed. The bias point
analysis will establish the initial conditions for the capacitor, which will be Vc =
0. TSTOP is set to 10 ms as shown in Figure 6.20.
The simulation results for the capacitor voltage are shown in Figure 6.21. As
expected, the voltage waveform follows the equation as follows:
Vc = 5(1 – e-t/0.001)
effectively reaching its final voltage of 5 Volts after about 5ms.
R 1
2 0 0
V
V 1 = 0 V 1
V 2 = 5 C 1
T D = 0
T R = 1 N 5 u
T F = 0
P W = 1 0 0 M
P E R = 0
Figure 6.19: Schematic for the series RC circuit driven by VPULSE

Figure 6.20: Simulation Settings window for Example 13
Figure 6.21: Plot of the capacitor voltage response to the 5 Volt step function
input
ID :______________________________________
Name : _____________________________________
Batch : MARKS

Experiment 4: Time Domain Analysis
Objectives: 1) To have a basic understanding of the various types of voltage sources.

2) To understand the types of time varying circuits.
Experiment
Outcome: 1) To understand how to use the PSpice software to simulate the time
varying circuits using various types of voltage sources and also to have a
basic understanding of the Time Domain (Transient) Analysis.
Questions:
1. Analyze the RC circuit shown in Figure 6.22 using PSpice. Determine the
behavior of the current flowing in the resistor and the voltage across the resistor
and capacitor.
Figure 6.22
2. The switch in the circuit shown in Figure 6.23 has been closed for a long time,
and it is opened at t = 0. Find v (t) for t ≥ 0 using PSpice. Calculate the initial
energy stored in the capacitor.
Figure 6.23
3. Analyze the RL circuit shown in Figure 6.24 using PSpice. Determine the
behavior of the current flowing in the resistor and the voltage across the resistor
and inductor assuming i(0) = 10A.
Figure 6.24
4. The switch in the circuit shown in Figure 6.25 has been closed for a long time. At
t = 0, the switch is opened. Calculate i(t) for t > 0 using PSpice.
Figure 6.25
5. Analyze the RLC circuit shown in Figure 6.26 using PSpice. Determine the
behavior of the current flowing in the inductor and the voltage across the
capacitor. The capacitor has an initial condition of 15V whereas the inductor has
an initial condition of 4A. (Hint: the voltage source is a VPULSE)
T C L O S E = 0
1 2
U 1
2 0
2
I 1
2 0 2 0
3 0 u ( - t ) 8 m 4 A d c
1
Figure 6.26
1. The switch shown in Figure 6.27 has been in position A for a long time. At t = 0,
the switch moves to B. Determine v(t) using PSpice for t > 0 and calculate its
value at t = 1s and 4 s.
Figure 6.27
2. In the circuit shown in Figure 6.28 the switch has been closed for a long time and
is opened at t = 0. Find i and v for all time.
Figure 6.28
3. Find i(t) in the circuit in Figure 6.29 using PSpice shown for t > 0. Assuming that
the switch has been closed for a long time.
Figure 6.29
4. At t = 0, switch 1 is closed, and switch 2 is closed 4s later. Find i(t) as shown in

Figure 6.30 using PSpice for t > 0. Calculate i for t = 2s and t = 5s.
Figure 6.30
Hint: All above questions are using VPULSE as their voltage source. This voltage
source can be obtained from the SOURCE library in PSpice.
Chapter 7: Frequency Domain Analysis
Circuits have different behaviors when stimuli are applied at different frequencies. These
response characteristics are significant in many different applications, for example, in the
tuning circuits for communication systems. It is important to characterize these different
behaviors to know that a circuit will perform properly in its designated frequency range.
PSpice can perform analysis over ranges of frequencies and thus calculate values of
voltages and currents as a function of frequency. This is generally referred to as
frequency domain analysis and is also referred to sometimes as an AC analysis or AC
Sweep Analysis. However, you have already been exposed to AC analysis in Chapter 5.
Here, you are being exposed to the different types of filters that are available such as low
pass filter, high pass filter, band pass filter, and band stop filter.
7.1 Frequency Response
The frequency domain analysis performed by PSpice assumes that all transient
effects in a circuit have come to a steady state and no further time varying
changes will take place. All sources are assumed to be sinusoidal varying with
constant amplitude throughout the analysis period. PSpice can calculate the
amplitude and phase angle response at each specified frequency analysis point. To
relate the PSpice calculations to the physical world, we note that a transient
analysis produces an output like that seen on an oscilloscope set to view time
varying voltages or currents. Frequency Domain Analysis produces an output that
is similar to what you would see on an instrument known as a spectrum analyzer.
Example 14: Analyze the simple circuit shown in the schematic of Figure 7.1.
The circuit consists of passive elements R1, R2, C1 and C2 that act as a filtering
network. The source V1 is a steady state sinusoidal signal generator with an input
waveform having a magnitude of 1V. Determine the frequency response of the
circuit plotting both the magnitude and phase across C2.
Solution: The schematic circuit of Figure 7.1 is shown below and it utilizes a
voltage marker at capacitor C2 to measure the magnitude and phase at this part.
Figure 7.2 shows the Simulation Settings for the schematic circuit in Figure 7.1.
Here, even though the source is an AC source, but in the simulation settings we
do not use Logarithmic Sweep type but instead we use Linear Sweep type. This is
because we are asked to find the magnitude and the phase of the circuit. Next, we
click on the RUN button to simulate the circuit. The magnitude of the circuit at
C2 can be seen as shown in Figure 7.3. To find the phase angle of the circuit, in
the Probe Window, we need to add another Trace to locate the phase angle. To do
so, look at Figure 7.4. This shows where we need to go to Add Trace. Once we
click on this, Figure 7.5 will show the Add Trace window. To find the phase
angle, we need to have the following Trace Expression:
VP(C2:2) = this is to show the phase angle at capacitor C2, where P represents the
phase angle of the circuit at capacitor C2.
Figure 7.6 shows the phase angle of the voltage across the capacitor C2. The
phase angle of the voltage varies from 0 degrees to nearly -154 degrees over the
range of frequencies from 1Hz to 1KHz at a magnitude of capacitor voltage that
varies from 1V to nearly 0V.
R 1 R 2
1 k
V
1 k
V 1
1 V a c C 1 C 2
0 V d c 1 u 1 u
Figure 7.1: Schematic circuit for Example 14
Figure 7.2: Simulation Settings window for a frequency response analysis

Figure 7.3: Magnitude of the voltage across capacitor C2 in Figure 7.1
Figure 7.4: Add Trace to locate the phase angle across capacitor C2
Figure 7.6: Phase angle of the voltage across the capacitor C2

Figure 7.5: Plot of the voltage phase angle is added to the plot with the Add Trace
window
7.2 Filter
It is sometimes desirable to have circuits capable of selectively filtering one

frequency or range of frequencies out of a mix of different frequencies in a
circuit. A circuit designed to perform this frequency selection is called a filter
circuit, or simply a filter. A common need for filter circuits is in high-
performance stereo systems, where certain ranges of audio frequencies need to be
amplified or suppressed for best sound quality and power efficiency. You may be
familiar with equalizers, which allow the amplitudes of several frequency ranges
to be adjusted to suit the listener's taste and acoustic properties of the listening
area. You may also be familiar with crossover networks, which block certain
ranges of frequencies from reaching speakers. A tweeter (high-frequency speaker)
is inefficient at reproducing low-frequency signals such as drum beats, so a
crossover circuit is connected between the tweeter and the stereo's output
terminals to block low-frequency signals, only passing high-frequency signals to
the speaker's connection terminals. This gives better audio system efficiency and
thus better performance. Both equalizers and crossover networks are examples of
filters, designed to accomplish filtering of certain frequencies.
7.2.1 Low Pass Filter
By definition, a low-pass filter is a circuit offering easy passage to low-

frequency signals and difficult passage to high-frequency signals. There
are two basic kinds of circuits capable of accomplishing this objective; the
inductive low-pass filter and the capacitive low-pass filter. The inductor's
impedance increases with increasing frequency. This high impedance in
series tends to block high-frequency signals from getting to the load. The
capacitor's impedance decreases with increasing frequency. This low
impedance in parallel with the load resistance tends to short out high-
frequency signals, dropping most of the voltage across series resistor R.
The inductive low-pass filter is the pinnacle of simplicity, with only one
component comprising the filter. The inductive low-pass filter is often
preferred in AC-DC power supplies to filter out the AC “ripple” waveform
created when AC is converted (rectified) into DC, passing only the pure
DC component. The primary reason for this is the requirement of low
filter resistance for the output of such a power supply. The capacitive
version of this filter is not that much more complex, with only a resistor
and capacitor needed for operation. A capacitive low-pass filter requires
an extra resistance in series with the source.
All low-pass filters are rated at a certain cutoff frequency. That is, the
frequency above which the output voltage falls below 70.7% of the input
voltage. This cutoff percentage of 70.7 is not really arbitrary, all though it
may seem so at first glance.
The cut-off frequency for an inductive low pass filter:
fc = R/(2πL)
The cut-off frequency for a capacitive low pass filter:
fc = 1/(2πRC)
Example 15: Use PSpice to plot the magnitude and phase of the voltages and
currents for the circuit shown in Figure 7.6 using both linear and logarithmic
scale. Also determine the cut-off frequency for this low pass filter.
Solution: The schematic circuit of Figure 7.6 is shown below. Source V1 is based
on the VAC source with a magnitude of 10V and a phase angle of 0 degrees. The
scale for plotting the graphs by linear and logarithmic is entirely dependent on the
student. If the problem does not state the range, the student can define their own
ranges. For this problem, we take a range between 1 Hz and 100000 Hz. To
determine the magnitude and phase angle by linear scale, the Simulation Settings
is set window as shown in Figure 7.7 has to be filled in as follows. After that,
click on the RUN button to simulate the circuit. The magnitude and the phase
angle of the voltage are shown as in Figure 7.8. The magnitude and the phase
angle of the current are shown as in Figure 7.9.
R 1
1 k
V
V 1 C 1
1 0 V a c
0 V d c 1 0 n
I
Figure 7.6: RC Low Pass Filter
Figure 7.7: Simulation settings window for circuit in Figure 7.6

Figure 7.8: Magnitude and phase angle of voltage using linear scale
Figure 7.9: Magnitude and phase angle of current using linear scale
The same can be done for the logarithmic scale where Simulation Settings
window is set as shown in Figure 7.10. Next, the RUN button is click and the
output of the magnitude and the phase angle for both voltage and current of circuit
in Figure 7.6 are shown in Figure 7.11 and Figure 7.12 respectively.
Figure 7.10: Simulation Settings window for logarithmic scale
Figure 7.11: Magnitude and phase angle of voltage using logarithmic scale
Figure 7.11: Magnitude and phase angle of current using logarithmic scale
The cut-off frequency is as follows:
fc = 1/(2πRC)
= 1/(2π*1KΩ*10nF)
= 15.92 KHz
7.2.2 High Pass Filter
A high-pass filter's task is just the opposite of a low-pass filter: to offer easy
passage of a high-frequency signal and difficult passage to a low-frequency
signal. As one might expect, the inductive and capacitive versions of the high-
pass filter are just the opposite of their respective low-pass filter designs. The
capacitor's impedance increases with decreasing frequency. This high impedance
in series tends to block low-frequency signals from getting to load. The inductor's
impedance decreases with decreasing frequency. This low impedance in parallel
tends to short out low-frequency signals from getting to the load resistor. As a
consequence, most of the voltage gets dropped across series resistor R. This time,
the capacitive design is the simplest, requiring only one component above and
beyond the load. And, again, the reactive purity of capacitors over inductors tends
to favor their use in filter design, especially with high-pass filters where high
frequencies commonly cause inductors to behave strangely due to the skin effect
and electromagnetic core losses.
As with low-pass filters, high-pass filters have a rated cutoff frequency, above
which the output voltage increases above 70.7% of the input voltage. Just as in the
case of the capacitive and inductive low-pass filter circuit, the capacitive and
inductive high-pass filter's cutoff frequency can be found with the same formula:
The cut-off frequency for an inductive high pass filter:
fc = R/(2πL)
The cut-off frequency for a capacitive high pass filter:
fc = 1/(2πRC)
Example 16: Use PSpice to plot the magnitude and phase of the voltages and
currents for the circuit shown in Figure 7.12 using both linear and logarithmic
scale. Also determine the cut-off frequency for this high pass filter.
Solution: The schematic circuit of Figure 7.12 is shown below. Source V1 is

based on the VAC source with a magnitude of 10V and a phase angle of 0
degrees. The scale for plotting the graphs by linear and logarithmic is entirely
dependent on the student. If the problem does not state the range, the student can
define their own ranges. For this problem, we take a range between 1 Hz and
100000 Hz. To determine the magnitude and phase angle by linear scale, the
Simulation Settings window is set as shown in Figure 7.7 has to be filled in as
follows. After that, click on the RUN button to simulate the circuit. The
magnitude and the phase angle of the voltage are shown as in Figure 7.13. The
magnitude and the phase angle of the voltage are shown as in Figure 7.14.
C 1
V
0 . 5 n
V 1 R 1
I
1 0 V a c
0 V d c 1 0 k
Figure 7.12: RC High Pass Filter

fc = 1/(2πRC)
= 1/(2π*10KΩ*0.5nF)
= 31.83 KHz
7.2.3 Band Pass Filter
There are applications where a particular band, or spread, or frequencies

need to be filtered from a wider range of mixed signals. Filter circuits can
be designed to accomplish this task by combining the properties of low-
pass and high-pass into a single filter. The result is called a band-pass
filter. What emerges from the series combination of these two filter
circuits is a circuit that will only allow passage of those frequencies that
are neither too high nor too low. Band-pass filters can also be constructed
using inductors, but as mentioned before, the reactive “purity” of
capacitors gives them a design advantage. The fact that the high-pass
section comes “first” in this design instead of the low-pass section makes
no difference in its overall operation. It will still filter out all frequencies
too high or too low. While the general idea of combining low-pass and
high-pass filters together to make a band pass filter is sound, it is not
without certain limitations. Because this type of band-pass filter works by
relying on either section to block unwanted frequencies, it can be difficult
to design such a filter to allow unhindered passage within the desired
frequency range. Both the low-pass and high-pass sections will always be
blocking signals to some extent, and their combined effort makes for an
attenuated (reduced amplitude) signal at best, even at the peak of the
“pass-band” frequency range.
The cut-off frequency for band pass filter:
fc = 1/(2π)(LC)1/2
Example 17: Use PSpice to plot the magnitude and phase of the voltages
and currents for the circuit shown in Figure 7.17 using both linear and
logarithmic scale. Also determine the cut-off frequency for this band pass
filter.
Solution: The schematic circuit of Figure 7.17 is shown below. Source V1

is based on the VAC source with a magnitude of 10V and a phase angle of
0 degrees. The scale for plotting the graphs by linear and logarithmic is
entirely dependent on the student. If the problem does not state the range,
the student can define their own ranges. For this problem, we take a range
between 1 Hz and 100000 Hz. To determine the magnitude and phase
angle by linear scale, the Simulation Settings window is set as shown in
Figure 7.7 has to be filled in as follows. After that, click on the RUN
button to simulate the circuit. The magnitude and the phase angle of the
voltage are shown as in Figure 7.18. The magnitude and the phase angle of
the voltage are shown as in Figure 7.19.
L 1 C 1
1 2
5 m
5 n V
V 1 R 1
I
1 0 V a c
0 V d c 5 0 0
Figure 7.17: RLC Band Pass Filter
fc = 1/(2π)(LC)1/2
= 1/(2π)(5mH*5nF)1/2
= 1.006 KHz
7.2.4 Band Stop Filter
Also called band-elimination, band-reject, or notch filters, this kind of filter

passes all frequencies above and below a particular range set by the component
values. Not surprisingly, it can be made out of a low-pass and a high-pass filter,
just like the band-pass design, except that this time we connect the two filter
sections in parallel with each other instead of in series. Constructed using two
capacitive filter sections, the circuit is as shown in Figure 7.22.
Figure 7.22:“Twin-T” band-stop filter.

The low-pass filter section is comprised of R1, R2, and C1 in a “T” configuration.
The high-pass filter section is comprised of C2, C3, and R3 in a “T” configuration
as well. Together, this arrangement is commonly known as a “Twin-T” filter,
giving sharp response when the component values are chosen in the following
ratios:
The cut-off frequency for band stop filter:
fc = 1/(2π)(LC)1/2
Example 18: Use PSpice to plot the magnitude and phase of the voltages
and currents for the circuit shown in Figure 7.23 using both linear and
logarithmic scale. Also determine the cut-off frequency for this band stop
filter.
Solution: The schematic circuit of Figure 7.23 is shown below. Source V1

is based on the VAC source with a magnitude of 10V and a phase angle of
0 degrees. The scale for plotting the graphs by linear and logarithmic is
entirely dependent on the student. If the problem does not state the range,
the student can define their own ranges. For this problem, we take a range
between 1 Hz and 100000 Hz. To determine the magnitude and phase
angle by linear scale, the Simulation Settings window is set as shown in
Figure 7.7 has to be filled in as follows. After that, click on the RUN
button to simulate the circuit. The magnitude and the phase angle of the
voltage are shown as in Figure 7.24. The magnitude and the phase angle of
the voltage are shown as in Figure 7.25.
R 1
V
5 0 0 1
L 1
I
5 m
V 1
1 0 V a c C 1
0 V d c
5 n
0
Figure 7.23: RLC Band Stop Filter
fc = 1/(2π)(LC)1/2
= 1/(2π)(5mH*5nF)1/2
= 1.006 KHz
ID :______________________________________
Name : _____________________________________
Batch : MARKS

Experiment 5: Frequency Domain Analysis
Objectives: 1) To have a basic understanding of the various types of filters.
Experiment
Outcome: 1) To understand how to use the PSpice software to simulate the various
types of filters and also understand the difference between linear scaling
and logarithmic scaling.
Questions:
1. Use PSpice to plot the magnitude and phase of the voltages and currents
for the circuit shown in Figure 7.28 using both linear and logarithmic scale. Also
determine the cut-off frequency. Also determine the type of filter for the below
circuit.
Figure 7.28
circuit.
Figure 7.29
circuit.
Figure 7.30
for the circuit shown in Figure 7.31across the inductor using both linear and
logarithmic scale. Also determine the cut-off frequency. Also determine the type
of filter for the below circuit.
5 0
1 0 u 1
1 A
1 0 2 0
4 m
2
Figure 7.31
circuit.
2 5 0
1
0 . 5 m
1 0 V a c V 2
0 V d c
2
1 0 n
Figure 7.32
circuit.
Figure 7.33
circuit.
Figure 7.34
3. Use PSpice to plot the magnitude and phase of the voltages and currents for the
circuit shown in Figure 7.35 using both linear and logarithmic scale. Also
circuit.
Figure 7.35
4. Use PSpice to plot the magnitude and phase of the voltages and currents for the
circuit shown in Figure 7.36 using both linear and logarithmic scale. Also
circuit.
4 k 1 u
1 0 V a Vc 2
0 V d c 1 k
Figure 7.36
Chapter 8: Fourier Analysis
Many circuits are designed to process non sinusoidal signals. Although these signals are
non sinusoidal, they are still periodic, repeating certain patterns over a certain period T.
This chapter is concerned with using PSpice to support the analysis of these types of
signals. We will describe how to express non sinusoidal signals in the terms of sinusoids
which can then be analyzed using standard techniques such as phasor analysis.
8.1 Basic Analysis
Linear circuits that have a steady state periodic signal applied to their inputs will
produce an output that is periodic. As might be expected, the period of the output
signal is equal to the period of the input signal. To break these periodic signals
into their sinusoidal components, we use a Fourier series to describe each of the
individual sinusoids, which when summed together produce the non sinusoidal
periodic signal. The Fourier series for a function f(t) can be expressed as:
f(t) = a0 + Σan sin(nω0t + θn)
where ω0 is the fundamental frequency in radians per second and is related to the
period of the signal by
ω0 = (2π/T) = 2πf
where T is the period and f is the frequency of the periodic signal.
The task at hand is to determine the values of the individual coefficients a1, a2, a3,
…,θ1, θ2, θ3,… corresponding to the specific f(t).
An example of a typical non sinusoidal waveform is shown in Figure 8.1. The

waveform is periodic with a value of T = 2 (ω0 = π) and a Fourier Series
description of:
f(t) = 0.5 + (2/π) Σ (1/n) sin nπt, where n = 2k -1
or
f(t) = 0.5 + (2/π) sin nπt + (2/3π) sin 3πt + (2/5π) sin 5πt + …
f(t)
-2 -1 0 1 2 3 4 (t)
Figure 8.1: Example waveform for Fourier series analysis
The equation above shows only the constant component (DC component), and the
first three time dependent components. Notice that the coefficient ai, becomes
very small after the third series term and does not influence the shape of the
resulting function f(t) very much.
8.2 Fourier Circuit Analysis
OrCAD PSpice can calculate the Fourier series coefficients for a

waveform in two ways; the PSpice program can perform a discrete Fourier
transform (DFT) on a waveform as part of its transient analysis
calculations, or the Probe plotting package can perform a fast Fourier
transform (FFT) on the data resulting from a transient analysis. The next
example describes how these operations can be performed.
Example 19: Use the waveform shown in Figure 8.2 as input to the circuit
in Figure 8.3. Perform a transient analysis on the circuit, and then
determine the Fourier series expression for both the input and output
waveforms.
f(t)
1
…
-2 -1 0 1 2 3 4 t
Figure 8.2: Sawtooth waveform with T = 1

R 1
1 k
V V
V 1 = 0 V I N
V 2 = 1
T D = 0 C 1
T R = 1 1 0 0 u
T F = 0
P W = 1
P E R = 1
Figure 8.3: Determine the Fourier series expression for the response of this
circuit.
Solution: We develop a schematic for the circuit much like the earlier schematic
using the VPULSE voltage source to produce the input waveform shown in
Figure 8.2. To produce the sawtooth waveform, VPULSE parameters must be set
as shown in Figure 8.3. The parameters shown above will allow you to produce an
ideal sawtooth waveform.
The next step is to set up the Simulation Settings window as shown in Figure 8.4.
Here, we are using the Transient Analysis Test Type and we set the “Run to
Time” to be 5s as shown in Figure 8.2. We set the TSTOP to be 5s so that the
circuit response has stabilized in its steady state; meaning all effects due to the
given initial conditions Vc = 0 have been eliminated and the only thing affecting
the circuit is the sawtooth waveform. PSpice calculates the Fourier coefficients on
the output waveform starting at time TSTOP and working backward one full cycle
of the fundamental frequency. It is necessary to ensure that the waveform has
reached steady state to perform the Fourier analysis properly.
Time TSTART, or the start saving data after time, is set to 0 to observe all of the
waveform. The Maximum Step Size parameter sets the internal step size (variable
istep) for the numerical routines that PSpice uses to solve the circuit. This value
will be determined automatically if the field is left blank. However, for this
problem we must specify a step size and we choose 0.001s.
Now that we have the transient analysis set up, we must next set up the Fourier
analysis. Click on the button labeled Output File Options… and set the system to
print values in the output file every 0.01s. Checks the box labeled Perform Fourier
Analysis and specifies the center frequency to be 1 Hz, which is the fundamental
frequency for our input waveform. Set the number of coefficients to be calculated
to 10 to get a good feel for the pattern of the series of coefficients. Finally, specify
the Output Variables for which Fourier coefficients will be calculated; in this case
we choose the voltage across the capacitor and the input voltage. The Transient
Output File Options window should look similar to the one in Figure 8.5
Figure 8.4: Simulation Settings window for Example 19
Figure 8.5: Dialog box used to set up a Fourier analysis

After the simulation is run, Probe displays a window similar to the one in Figure
8.6. Waveforms representing the voltage across the capacitor and the voltage
produced by input source VIN are included in the plot because of the voltage
probes placed in the original schematic. The input waveform is a sawtooth that is
expected based on the parameters supplied for VIN. The second waveform shows
that the output waveform does not fall all the way to zero before the input
switches upward and begins to drive the output back toward the value one. The
lag is due to the size of the RC charging time constant.
Figure 8.6: Transient analysis output showing both input and output waveform
Fourier coefficients for the two variables selected in the Transient Output File
Options window are shown in the printed output file which can be viewed by
clicking the View Simulation Output File button. Scrolling down in the output file
you will find the coefficients for the input signal VIN as shown in Figure 8.7.
Using the first three harmonics along with the DC component, we can construct
the Fourier series equation that describes the input waveform as:
f(t) = 0.495 + 0.318sin(πt - 178ᵒ) + 0.159sin(3πt - 176ᵒ) + 0.106sin(5πt - 175ᵒ) +

…
The ideal sawtooth waveform shown in Figure 8.2 can be represented by the
Fourier series expansion:
f(t) = (1/2) – (1/π)Σ(1/n)*sin 2nπt

Examining these two expressions we see that the major difference appears to
occur in phase of the sinusoid. Coefficients generated by PSpice are positive,
whereas the theoretical expression shows a negative sign in front of the
coefficients. However, when you include consideration of the phase angle in the
PSpice generated coefficients, the expression provides a very good approximation
to the theoretical form. This is due to the fact that sin(x-180ᵒ) = -sin(t). Phase
angles for the first three coefficients are roughly 180ᵒ and thus produce the effect
of negating the associated term. The difference between the first three phase
angles of -178ᵒ, -176ᵒ, and -175ᵒ and the expected value of -180ᵒ is likely due to
the inaccuracy in describing the sawtooth waveform. Remember, because the
minimum fall time TF is istep, the falling edge of the sawtooth does not have an
infinite slope as would be expected in the original theoretical calculation.
Reduced numerical accuracy also accounts for some of the reduced accuracy of
the calculated phase angles.
The Fourier series coefficients for the voltage output V(C1:2) are shown in Figure
8.8. The Fourier series expression for the output voltage is
f(t) = 0.4998 + 0.27sin(πt - 148ᵒ) + 0.099sin(3πt + 129ᵒ) + 0.05sin(5πt + 118ᵒ) +

…
Figure 8.7: Fourier series coefficients for the sawtooth input waveform VIN
Figure 8.8:Fourier series coefficients for the output voltage waveform VOUT

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UCSI UNIVERSITY

FACULTY of ENGINEERING, ARCHITECTURE, & BUILD

Chapter 2: Getting Started

Chapter 3: Simple DC Circuits

Chapter 4: Other DC Analyses

Chapter 5: Operational Amplifier

Chapter 6: Time Domain Analysis

Chapter 7: Frequency Domain Analysis

Chapter 8: Fourier Analysis

Simulation Program with Integrated Circuit Emphasis

Circuits has a maximum of 64 nodes, 10 transistors and 2 operational amplifiers

• DC analysis: calculate the DC transfer curve

• Independent and dependent voltage and current sources

2. PSpice with OrCAD Capture (release 9.2 Lite Edition)

Step 1: Creating Circuit Step 2: Specify type of simulation

Step 3: View the results

Symbolic Suffix* Mnemonic Exponential Form Value

Figure 2.1: Simple resistive circuit

2.1 Creating the Circuit in Capture

Figure 2.3: Place part window

Figure 2.4: Display Properties window

Figure 2.6: GND part with labeled 0 value

2.3 Assign values and names to the part

1. Change the values of the resistors by double-clicking on the number next to

R_name node1 node2 value

1. You can generate the netlist by going to the PSPICE/CREATE NETLIST

Figure 2.7: Netlist for components used in Figure 1

2.5 Specifying the type of analysis and simulation

2.6 Displaying the simulation Results

PSpice has a user-friendly interface to show the results of the simulations.

Figure 2.10: Probe Window

Figure 2.11: Using Voltage Markers to show the simulation result of V

Toggle Cursor Mark Label

Figure 2.13: Toggle Cursor and Mark Label Icon

Figure 2.14: Value marked on the line traced.

3.1 Independent Sources

3.2 Dependent Sources

Below are the examples of the dependent sources:

Figure 3.2: Dependent current source part window

Figure 3.4: Property Editor for a voltage dependent current source

Thevenin Equivalent Circuits

ISC = VTH/RTH (1)

RTH = VTH/ISC (2)

Figure 3.8: PSpice circuit to calculate Thevenin equivalent in Figure 3.7.

Figure 3.10: Short circuit at terminals a-b to calculate Isc

Norton equivalent circuit consists of an independent current source in parallel

Figure 3.11: General form of the Norton equivalent circuit.

Circuit analysis plays an important role in the analysis of systems designed to

Pmax = V2ThRL/(2RL)2 = V2Th/4RL

Figure 3.13(a): A circuit describing maximum Figure 3.13(b): A circuit used

Figure 3.15: Found Thevenin voltage, VTh across RL

The value of the VTh is 22V.

The value of the Isc is 2.444A.

Therefore, the value of RTh is 9Ω.

For the maximum power transfer,

and the maximum power transfer is

Pmax = V2Th/4RL = (22V)2/(4 x 9) = 13.44W

Engineering Software Applications

Objectives: 1) To have a basic understanding of Thevenin and Norton circuits.

Equipment/Apparatus: 1) PSpice Software

PSpice is capable of performing several additional types of DC Analysis beyond the

4.1 Nodal Analysis (Current Source)

Once we have selected a reference node, we assign voltage designations to non-

i = (vhigher – vlower)/R (4.3)