EE 242 DIGITAL ELECTRONICS &MICROPROCESSOR ASSIGNMENT-1 1. Convert to hexadecimal and then to binary: (a) 757.2510 (b) 123.1710 (€) 356.8910 (d) 1063.510 2. Add, subtract, and multiply in binary: (a) 1111 and 1010 (b) 110110 and 11101 (c) 100100 and 10110 3. Add the following numbers in binary using 2’s complement to represent negative numbers. Use a word length of 6 bits (including sign) and indicate if an overflow occurs. (a) 21+11 (b) (-14)+-32) (c) (-25)+18 () (-12)#13 (e) C11)+21) 4. Divide in binary: (a) 10001101 110 (b) 110000011 1011 (c) 1110100 1010 5. Construct a 7-3-2-1 code for base 12 digits. Write B4A9 using this code. 6. Prove the following theorems algebraically: (a)X(X' Y)=XY (b) X+XY=X (c)XY+XY" =X (d) (A+B)(A+B’)= 7. For cach of the following circuits, find the output and design a simpler circuit having the same output. (@) 8. Draw a circuit that uses only one AND gate and one OR gate to realize each of the following functions: (a) (A+B+C+D)(A+B+C+E)(A+B+C+F) (b) WXYZ+VXYZ+UXYZ 9. Simplify the following expressions to a minimum sum of products. (a) [(AB)' +C’D]’ (b) [A+B(C’ +D)]' (c) (AFB)C)(AtB)(C+AY” 10.Given F1=Sm(0, 4, 5, 6) and F2=Sm(0, 3, 6, 7) find the minterm expression for F1+F2. State a general rule for finding the expression for FI+F2 given the minterm expansions for F1 and F2 . Prove your answer by using the general form of the minterm expansion. (a) Implement a full subtracter using a minimum number of gates. (b) Compare the logic equations for the full adder and full subtracter.11. Convert each of the following expressions into sum of products and product of sums: (a) (u+xw)(x tu’v) (b) x + xt y+ 2’) 12.A combinational circuit has four inputs (A, B, C, D) and three outputs (X, Y, Z). XYZ represents a binary number whose value equals the number of 1’s at the input. For example if ABCD=1011,XYZ=011. (a) Find the minterm expansions for X,Y, and Z. (b)Find the maxterm expansions for Y and Z. 13.A half adder is a circuit that adds two bits to give a sum and a carry. Give the truth table for a half adder, and design the circuit using only two gates Then design a circuit which will find the 2’s complement of a 4-bit binary number. Use four half adders and any additional gates. 14.F(a, b, c, d, e}= Fm(0, 3, 4, 5, 6, 7, 8, 12, 13, 14, 16, 21, 23, 24, 29, 31) (a) Find the essential prime implicants using a Karnaugh map, and indicate why each one of the chosen prime implicants is essential (there are four essential prime implicants). (b) Find all of the prime implicants by using the Karmaugh map. 15,Using the Quine-McCluskey method, find all minimum sum-of-products expressions for (a) f(A, B, C, D, E)=Ym(0, 1, 2, 3, 4, 8, 9, 10, 11, 19, 21, 22, 23, 27, 28, 29, 30) (b) f(A, B, C, D, E)=TmQO, 1, 2, 4, 8, 11, 13, 14, 15, 17, 18, 20, 21, 26, 27, 30,31) 16.Using the Quine-McCluskey, method find all prime implicants of f(A,B,C,D)=Em(, 3, 5, 6, 8, 9,12, 14, 15)+¥d(4, 10, 13). Identify all essential prime implicants and find all minimum sum-of products expressions. 17.Draw a NAND logic diagram that implements the complement of the following function: F(A, B, C, D) =¥0, 1, 2, 3, 6, 10, 11, 142 18.Draw the multiple-level NOR circuit for the following expression: CD(B+C)A+(BC’ +DE’) 19.Implement the following four Boolean expressions with three half adders: F=ABC’ + (A’ +B’)C G=ABC 20.Show that a positive logic NAND gate is a negative logic NOR gate and vice versa,