; Sintetizador para LMX2306

; Frecuencia para convertir a canal 8 VCO = 227 Mhz

; R Counter = 40
; N Counter = 908
; Fcomp = 250 Khz
; B=113 ; A=4 ; Fvco = [ ( P x B ) + A ] x Fcomp / R ; P = 8 Preescaler
; Cristal = 10 Mhz
;*********************************************************************
;(RB1) high
DATA HI
;(RB2) high
LE HI
;(RB3) high
CLK HI
;-----------------------------------------------------------------------list
p=16f877a
#include
<p16f877a.inc>
errorlevel -302
__CONFIG _CP_OFF & _WDT_OFF
_LVP_OFF & _CPD_OFF

;
;
;
&

cblock 0x20
reg_h
reg_m
reg_l
mcount
ncount
ocount
endc

list directive to define processor

processor specific variable definitions
suprimimos el mensaje "not in bank 0"
_BODEN_OFF & _PWRTE_ON & _HS_OSC & _WRT_OFF &

RESET_VECTOR
CODE
nop
pagesel start
goto
start
MAIN_PROG
start

0x0000 ; processor reset vector

; nop for icd
; go to beginning of program

CODE

org

clrf

; declaramos las variables

clrf
clrf
clrf
clrf
clrf
ocount
clrf

0x010
reg_h
reg_m
reg_l
mcount
ncount
PORTB

bsf
STATUS,RP0
bcf STATUS,RP1 ;

; PASO A BANCO 1

movlw b'00000000'
movwf TRISB
; PORTB TODAS OUTPUTS
bcf
STATUS,RP0
call wait

; PASO A BANCO 0

;***** make enable high************ Puede no ser necesario

bsf
PORTB,2
nop
nop
call
wait
; Wait a short while
bcf
PORTB,2

nop
nop
movlw
movwf

0x00
PORTB

; load low bits

; make all output bits low

;
; Load the 21 bit F register C1,C2 = 1,1
; MSB first 00000000:00000000:10010011 ; Vco positivo, LD digital lock detect, p
ower down normal
;
clrf
reg_h
clrf
reg_m
clrf
reg_l
movlw 0x00
; Load reg_h with f_high
movwf reg_h
;
movlw 0x00
; Load reg_m with f_mid
movwf reg_m
;
movlw b'00010011' ; Load reg_l with f_low
movwf reg_l
;
call
sendreg
; Send data to LMX
;
; Load the 21 bit R register C1,C2 = 0,0
; MSB first R = 40 :00000000:00000000:10100000
;
clrf
reg_h
clrf
reg_m
clrf
reg_l
movlw 0x00
; Load reg_h with r_high
movwf reg_h
;
movlw 0x00
; Load reg_m with r_mid
movwf reg_m
;
movlw b'10100000' ; Load reg_l with r_low
movwf reg_l
;
call
sendreg
; Send data to LMX
;
; Load the 21 bit N register C1,C2 = 1,0;
; MSB first N = 908 ; A = 4 B = 113 ; 000100000:00111000:10010010
; Go bit = 1 ; A = 5 bits = 00100 = 4 ; B = 1110001 = 113
clrf
reg_h
clrf
reg_m
clrf
reg_l
movlw b'00010000'
; Load reg_h with n_high
movwf reg_h
;
movlw b'00111000'
; Load reg_m with n_mid
movwf reg_m
;
movlw b'10010010'
; Load reg_l with n_low
movwf reg_l
;
call sendreg
; Send data to LMX
goto final
; Rutina de espera
;
; time = (((ncount * 3 + 2) * mcount) * ocount) *0.4-microseconds
wait
movlw 0x01
; 1 = aproximadamente 0.5 segundos
movlw ocount
loadM movlw 0x0A
; set w = 10
movwf mcount
; mcount = 10
loadN movlw 0xFF
; set w = 256

decN

movwf
decfsz
goto
decfsz
goto

ncount
ncount,
decN
mcount,
loadN
decfsz
goto

return
; Load the 21 bit
;
sendreg
btfss reg_h,4
call zero
btfsc reg_h,4
call one
btfss reg_h,3
call zero
btfsc reg_h,3
call one
btfss reg_h,2
call zero
btfsc reg_h,2
call one
btfss reg_h,1
call zero
btfsc reg_h,1
call one
btfss reg_h,0
call zero
btfsc reg_h,0
call one
btfss reg_m,7
call zero
btfsc reg_m,7
call one
btfss reg_m,6
call zero
btfsc reg_m,6
call one
btfss reg_m,5
call zero
btfsc reg_m,5
call one
btfss reg_m,4
call zero
btfsc reg_m,4
call one
btfss reg_m,3
call zero
btfsc reg_m,3
call one
btfss reg_m,2
call zero
btfsc reg_m,2
call one
btfss reg_m,1
call zero
btfsc reg_m,1
call one

; ncount = 256
f ; decrement ncount by 1
; if ncount not 0 then decrement again
f ; else decrement mcount by 1
; if mcount not 0 then reload ncount
ocount, f ; if ocount not 0 then decrement again
loadM
; if ocount not 0 then reload mcount
;

register
;
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Bit 21
0
1
Bit 20
0
1
Bit 19
0
1
Bit 18
0
1
Bit 17
0
1
Bit 16
0
1
Bit 15
0
1
Bit 14
0
1
Bit 13
0
1
Bit 12
0
1
Bit 11
0
1
Bit 10
0
1

btfss
call
btfsc
call
btfss
call
btfsc
call
btfss
call
btfsc
call
btfss
call
btfsc
call
btfss
call
btfsc
call
btfss
call
btfsc
call
btfss
call
btfsc
call
btfss
call
btfsc
call
btfss
call
btfsc
call

reg_m,0
zero
reg_m,0
one
reg_l,7
zero
reg_l,7
one
reg_l,6
zero
reg_l,6
one
reg_l,5
zero
reg_l,5
one
reg_l,4
zero
reg_l,4
one
reg_l,3
zero
reg_l,3
one
reg_l,2
zero
reg_l,2
one
reg_l,1
zero
reg_l,1
one
reg_l,0
zero
reg_l,0
one

;
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;

Bit 9
0
1
Bit 8
0
1
Bit 7
0
1
Bit 6
0
1
Bit 5
0
1
Bit 4
0
1
Bit 3
0
1
Bit 2
0
1
Bit 1
0
1

;*******make enable high para transmitir los datos****

bsf
PORTB,2
nop
bcf
PORTB,2
return
;
; Subrutinas para mandar
;
zero
BCF
PORTB,1
nop
BSF
PORTB,3
nop
BCF
PORTB,3
RETURN
;
one
BSF
PORTB,1
nop
BSF
PORTB,3
nop
BCF
PORTB,3

ceros y unos
; Load 0 on data line
; Clock high
; Clock Low

; Load 1 on data line

; Clock high
; Clock Low

RETURN
final
clrf
PORTB
bsf PORTB,0
loop goto loop
END

; directiva 'final del programa'