Beruflich Dokumente
Kultur Dokumente
MODES OF OPERATIONS
Mode 1 is strobed in put, out put mode of operation. Port A and B are
designed to operate in this mode.
CONTROL WORD
Control word is written to the control word register which is within 8255. No
read operation of the control register is allowed.
EXAMPLE: For generating a square wave, 7th bit = 1, port A is in mode 0 operation.
6th and 5th bit are set 0. Port A is an output port. So 4 th bit=0. Port B and C are
also output ports. So bits 0, 1, 3 are set 0. Port B is in mode 0 operation. So bit
2=0.
1 0 0 0 0 0 0 0
MVI A,80
1
OUT 17
BACK MVI A,FF 13
OUT 14
14
CALL DELAY
MVI A,00 26
OUT 14 1 to 8 Port A
CALL DELAY
9 to 16
JMP BACK
DELAY LXI D,FFFF Port B
BEHIND DCX D
17 to
MOV A,D
ORA E 24 Port C
JNZ BEHIND
26 PIN IDC 25 Ground
CONNECTOR
26 Vcc
RET
MVI A,80
OUT 17
START LXI H,4500
MOV B,M
INX H
MOV A,M
OUT 14
CALL DELAY
DCR B
G F Cc A B
JNZ AGAIN
JMP START
DELAY MVI C,09
L3 MVI D,FF
L2 MVI E,FF
L1 DCR E
JNZ L1
DCR D
JNZ L2
DCR C
JNZ L3
RET E D Cc C Dp
1 1 0 0 0 0 1 1 0 86
2 1 1 0 1 1 0 1 1 EB
3 1 1 0 0 1 1 1 1 CF
4 1 1 1 0 0 1 1 0 E6
5 1 1 1 0 1 1 0 1 ED
6 1 1 1 1 1 1 0 1 FD
7 1 0 0 0 0 1 1 1 87
8 1 1 1 1 1 1 1 1 FF
9 1 1 1 0 1 1 1 1 EF
LOOK UP TABLE
09
05
06
0A
5. ADC INTERFACING
. .. . . .. . . ..
OUT C8
MVI A,18
OUT C8
A C A C A . C
HLT
J1 J2 J5
B. USING SOFTWARE
MVI A,10
OUT C8
MVI A,18
OUT C8 JUMPER
SETTINGS
MVI A,01
OUT D0 B B B
. .. . . .. . . ..
XRA A
XRA A
XRA A A C A C A . C
J1 J2 J5
MVI A,00
OUT D0
HLT
6. DAC INERFACING
A. TRIANGULAR WAVE
B. SQUARE WAVE
C. SAW-TOOTH
MVI A,80
OUT 17
START MVI A,5A
OUT 14
CALL DELAY
MVI A,A5
OUT 14
CALL DELAY
JMP START
DELAY LXI D,FFFF
AGAIN DCX D
MOV A,D
ORA E
JNZ AGAIN
RET
R3 R2
G3 G2
R1 G1 R2 G2 R3 G3
R4 G4
0 1 0 1 1 0 1 0
R1 R4 5 A
G1 G4
R3 R2
G3 G2
R1 G1 R2 G2 R3 G3
R4 G41 0 1 0 0 1 0 1
R1 R4 A 5
G1 G4
1. SQUARE ROOT OF A NUMBER 2. MULTIPLICATION OF TWO 8-BIT
MVI C, 00 NUMBERS.
MVI B, 01 MVI C,00
LXI H, 4200H MVI A,00
MOV A, M LXI H 4200
LOOP2 SUB B MOV B,M
JC LOOP1 INX H
INR C L1: ADD M
INR B JNC L2
INR B INR C
JMP LOOP2 L2: DCR B
LOOP1 ADD B JNZ L1
JZ LOOP3 STA 4500
MVI A, EE MOV A,C
STA 4500 STA 4501
HLT HLT
LOOP3 MOV A, C
STA 4500 3. SORTING
HLT LXI H,4200H
MOV B,M
DCR B
LOOP3 MOV C,B JZ L3
LXI H,4201 INX H
LOOP2 MOV A,M MVI M,01
INX H DCR B
CMP M JZ L3
JNC LOOOP1 L2: MOV A,M
MOV C,M DCX H
MOV M,A ADD M
DCX H INX H
MOV M,D INX H
INX H MOV M,A
LOOP1 DCR C DCR B
JNZ LOOP2 JNZ L2
DCR B L3: HLT
JNZ LOOP3
HLT 7. PRIME_NUMBER
MVI B,02
4. ASCII TO HEX LXI H 4200
MVI E,0E L3 MOV A,M
LDA 4200H L2 SUB B
CPI 30H JZ L1
JC ERROR JNC L2
CPI 40H INR B
JZ ERROR JMP L3
CPI 47H L1 MOV A,M
JNC ERROR CMP B
SUI 30H JZ L4
CPI 0AH MVI A,00
JC LOOP STA 4500
SUI 07H HLT
JMP LOOP L4 MVI A,H
ERROR MOV A,E STA 4500
LOOP STA 4201H HLT
HLT
8. SWAPPING_HIGHER_LOWER_NIBBLE
5. ADDITION OF TWO 16-BIT S
NUMBERS LXI H 4200
LHLD 4200H MOV A,M
XCHG RRC
LHLD 4202H RRC
XRA A RRC
DAD D RRC
JNC LABEL STA 4500
INR A HLT
LABEL: SHLD 4204H
STA 4206 9. BLOCK TRANSFER
HLT LXI H,4200H
MOV B,M
6. FIBINOCCI SERIES INX H
LXI H 4200 LXI D,4301
MOV B,M LOOP MOV A,M
INX H STAX D
MVI M,00 INX D
DCR B INX H
DCR B MOV E,A
JNZ LOOP ANI 0F0H
HLT RLC
RLC
10. LARGEST NUMBER IN AN ARRAY RLC
LXI H,4200H RLC
MOV B,M MOV B,A
INX H XRA A
MOV A, M MVI C,0AH
DCR B LOOP1 ADD B
LOOP2 INX H DCR C
CMP M JNZ LOOP1
JNC LOOP1 MOV B,A
MOV A,M MOV A,E
LOOP1 DCR B ANI 0FH
JNZ LOOP2 ADD B
STA 4500H STA 4201
HLT HLT