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expression of EXOR is given by
a.(A+B)1AB b.AB+A1B1
c.(A+B)(AB)1 d.none
23.B.E (A1+B)(A+C1)(B1+C1) simplified as
a.(A+B)C1 b. (A+ B1 ) C1 c.(A1+ B1 ) C1 d.none
24.2's cpmplement of decimal no 4 is
a.0100 b.1100 c.1011 d.1010
25.The minimum no of NAND gates required to implement the BF
A+AB1+AB1C is equal to
a.zero b.1 c.4 d.7
26.A binary half subtractor have 2inps A and B, the correct set of the logical expression
for the output D=AB X=borrow are
a.D=AB+A1B,X=A1B b.D=A1B+AB1,X=AB1
c. D=A1B+AB1 ,X=A1B d.D= AB+A1B ,X=AB1
27.The vector address of Rst 6.5 is
a.0024H b.0020H c.0034H d.003Ch
28.The function of ALE is
a.serial data transfer b.interrupt
c.demux d.memory or I/O read or write
29.Which of the following interrrupt has the highest priority
a.INTR b.Rst 6.5 c.Rst 7.5 d. Rst4.5
30.Which of the folowing is nonmaskable interrrupt
a.Rst 7.5 b.Rst 5.5 c.TRAP d.INTR
31.Which of the following is a software interrupt
a.Rst 7.5 b.Rst 6 c.Rst 6.5 d.INTR
32.Which of the following is a non vectored interrupt
a.Rst 7.5 b.TRAP C.INTR d.Rst 6.5
33.Which of the following are used for DMA operation
a.SID&SOD b.READY c.HOLD &HLDA d.S0 &S1
34.Which of the folowing are used for serial I/O communication
a.SID&SOD b.SIM&RIM c.HOLD &HLDA d.S0&S1
35.How many machine cycles are required to execute the instruction SHLD
a.4 b.5 c.3 d.2
36.Which of the folllowing keeps track of the instruction execution sequence
a.acumulator b.program counter c.stack pointer d.instructin register
37.Full adder can be converted to full subtractor with
a. an invertor b.NAND c.NOR d.All
38.A circuit which is working as a NAND gate with positive level logic sys will work as
gate with negative logic system
a.NAND b.NOR c.AND d.OR
39.State transition table and state transition diagram form the part of design steps in the
case of
a.combinational ckt b.amp ckt c.delay ckt d.sequential ckt
40.The octal expression 1 83/512 is
a. 1.123 b. 1.321 c.11.23 d.18.21