Code No: NR310201 NR

III B.Tech I Semester Supplimentary Examinations, May/Jun 2009

COMPUTER ORGANISATION
( Common to Electrical & Electronic Engineering, Electronics &
Communication Engineering, Electronics & Instrumentation Engineering
and Electronics & Telematics)
Time: 3 hours Max Marks: 80
Answer any FIVE Questions
All Questions carry equal marks
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1. (a) Explain the architecture of Von Neumann machine clearly.

(b) Prove that the multiplication of two n-digit numbers in base B gives a product
of no more than 2n digits. [8+8]

2. (a) Compare interrupt-handling mechanism in Pentium and Power PC processors.

(b) Explain the arithmetic and data transfer instructions.
[8+8]

3. (a) Explain how instructions are classified into different groups based on word
size. Give example for each group.
(b) Write programs for 8085 microprocessor,
i. to complement the data stored in eight consecutive locations and store
the result back to same locations.
ii. to check whether the given number is positive or negative. [6+10]

4. Consider an accumulator based CPU with the following eight one address instruc-
tions. LOAD X, STORE X, ADD X, AND X, JMP X, JMPZ X, CMPL, (Com-
plement Accumulator), and RSHIFT. Give fetch and execute cycle operations and
identify the necessary control signals to be generated for the above instructions by
a micro programmed control unit. [16]

5. (a) Define the following terms:

i. Hit ratio
ii. Miss ratio
(b) What do you mean by cache coherence problem?
(c) Explain how cache memories can be used in paging technique. [4+6+6]

6. (a) What are the advantages of paging?

(b) Explain how the logical address can be converted into physical address in a
paging system? [8+8]

7. (a) What is a Bus? Discuss two typical bus structures.

(b) What are different types of I/O devices? Discuss the advantages of using I/O
processor. [8+8]

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Code No: NR310201 NR
8. (a) Explain how data transfer is achieved using DMA.
(b) List the actions taken by a processor when an interrupt occurs. [8+8]

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