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Code No: R5220203 R5

II B.Tech II Semester(R05) Supplementary Examinations, December 2010

(Common to Electrical & Electronic Engineering and Instrumentation & Control
Time: 3 hours Max Marks: 80
Answer any FIVE Questions
All Questions carry equal marks

1. (a) Define common mode rejection ratio (CMRR)? Explain why for an
CM RR → ∞ emitter coupled differential amplifier where RE → ∞.
(b) Why is cascade configuration used in an Op-amp?
(c) Explain with the figures how two supply voltages V + and V − are obtained from a single supply.
2. (a) Explain the non-linear application of Op-amp as logarithmic and anti logarithmic amplifier.
(b) Design a Integrator to integrate an I/P signal that varies in frequency from 1 KHz to 10 KHz
and plot the O/P wave forms if the I/P is a sine wave of 1V peak at 1 KHz. [10+6]
3. (a) Derive the transfer function, gain and phase angle for second order high pass active filter.
(b) Explain how Q, upper cutoff frequency and lower cutoff frequency is determined in Band pass
filter. [8+8]
4. (a) Write short notes on :
i. Balanced Modulator.
ii. Voltage Controlled Oscillator.
iii. Digital Phase Detector.
(b) Give any one applications of PLL and explain it in detail. [4+4+4+4]
5. Write short notes on:
(a) Dual-slope A/D converter.
(b) Charge balancing type Analog to Digital converter. [8+8]
6. (a) Draw the schematic circuits of CMOS NAND and CMOS NOR gates and explain their functions
with the help of Truth-Table.
(b) What are the advantages and disadvantages of CMOS over TTL gate?
(c) Which is the fastest saturated logic gate? and Why? [8+4+4]
7. (a) Design the combinational circuit for common cathode 7 segment display/driver?
(b) Write short notes on gray code to Binary converter. [8+8]
8. (a) Distinguish between combinational and sequential circuit.
(b) Define the following terms as applied to flip flops.
i. Set up time.
ii. Hold time.
iii. Propagation delay.
iv. Maximum clock frequency.
v. Power dissipation. [8+8]