Beruflich Dokumente
Kultur Dokumente
MOSFETs
Instructor
Engr: Mir Muhammad Lodro
Lecturer
Department of Electrical (Telecomm) Engineering
Sukkur IBA
outlines
JFETs
N-channel JFET
P-channel JFET
Operation of JFET
JFET terminals
JFET drain curves
JFET trans-conductance
JFET biasing
Ohmic region
Active region
MOSFET
Depletion
mode
Enhancement mode
Fig: JFET biase d fo r c o nduc tio n (c o mmo n so urc e
co nfiguratio n)
JFET operation
Drain characteristic curves for JFET
VGS controls ID
EXAMPLE:
For the JFET in the following figure, VGS(off)= 4v and IDSS =12mA.
Determine minimum value of VDD required to put the device in
constant current area of operation.
Sol:
Since VGS(off) = 4 V ,VP=4V. The
minimum value of VDS for the JFET
to be in its constant current area is
In the constant current area with VGS =0 V,
Apply kirchhoff’slaw around the drain ci
Drop across drain resistor
This is the required value of VDD to put the transistor in co
JFET forward trans-conductance
JFET biasing
Self-bias
Voltage-divider bias
Self-bias JFETs
Fo r nc hanne l JFET,IS=ID and VG=0
,VS=IDRD gate to source voltage is
Thus
Drain voltage with respect to ground is
Since VS=IDRS , the drain to source voltage is
EXAMPLE
Solution
Here ID=IS
VGS is –vefor nchannel
Mid-point bias
Usually de sirable to bias a JFET ne ar midpo int o f its transfe r
c haracte ristic c urve whe re ID=IDSS /2
Midpoint allows maximum amount of drain current swing between IDSS and 0.
Select resistor values for RD and RSto setup an approximate midpoint bias.
For this particular JFET, the parameters are IDSS =12mA and VGS(off) = 3 V.
VD should be approximately 6 V.
Solution
For midpoint biasing
Then
Voltage divider bias
Voltage at source of JFET must be more positive
than voltage at the gate in order to keep the gate
source junction reversebiased
Source voltage
Gate voltage is set by resistors R1 and R2
Gate to source voltage is
Fig: nc hanne l JFET with
vo ltage divide r bias (IS=ID)
And source voltage is
The drain current can be expressed as
EXAMPLE
Determine ID and VGS for the JFET with voltage divider bias given that for
this particular JFET the internal parameter values are such that VD=7V.
Solution
Calculate gate to source voltage
The point at which load line intersects the transfer characteristic curve is
known as Qpoint
For voltage divider Qpoint is determined as follows
For ID=0
For VGS =0
Fig: Generalized dc load line for a
JFET with voltagedivider bias
EXAMPLE
Determine the approximate Qpoint for the JFET with voltagedivider
bias , given that this particular device has transfer characteristic curve of
Solution
First establish two points for the bias line ie ID and
VGS
Approximate Qpoint values are ID=1.8mA and VGS =1.8 V
MOSFET (Metal Oxide Semi-conductor FET)
MOSFET is ano the r c ate go ry o f fie ld e ffe c t transisto r. The
MOSFET diffe rs fro m JFET in that it has no pn junc tio n
struc ture .
Gate is insulate d fro m c hanne l by silic o n dioxide (SiO2) layer
D-MOSFET (Depletion MOSFET)
Nchanne l MOSFET o pe rate s in de ple tio n mo de whe n a ne gative gate
to so urce vo ltage is applie d and in e nhanc e me nt mo de whe n
po sitive gate to so urc e vo ltage is applie d
The se de vic e s are ge ne rally o pe rate d in De ple tio n mo de
D-MOSFET operation
Gre ate r the ne gative vo ltage o n gate , gre ate r the de ple tio n o f n
c hanne l e le c tro ns
With po sitive gate vo ltage , mo re e le c tro ns are attrac te d into the
c hanne l, thus inc re asing c hanne l c o nduc tivity.
E-MOSFET (Enhancement-MOSFET)
EMOSFET o pe rate s o nly in e nhanc e me nt mo de and has no de ple tio n
mo de
EMOSFET has no struc tural c hanne l (substrate exte nds co mple te ly to
SiO2 layer)
Positive gate voltage induces a channel by creating a thin layer of negative
charges in substrate region adjacent to SiO2 layer.
For gate voltage below threshold there is no channel
conductivity of channel is enhanced by increasing gatetosource voltage
and thus pulling more electrons into the channel area
Broken lines symbolize the absence of physical channel
Fig: EMOSFET schematic symbols
thanks
Drs Ian Munro Ro ss
(fro nt) and G.C Dace y
jo intly de ve lo pe d
expe rime ntal
pro c e dure fo r
me asuring
c haracte ristics o f Fie ld
Effe c t Transisto r in
1955.
(AT&T arc hive s)