ASIC Design Flow & Tool Support for Designing.

Tool Providers.
Design Steps. Synopsys Mentor Cadence Magma Others.
Graphics
1) Concept,
Architectural
Any Of the Design Analysis Or Specification Descriptive Languages.
Specifications&
Market Survey.
Presto; VCS; Catapult C; Verilog-XL; Active HDL from
2) RTL Coding VHDL Compiler; ADVance MS; Encounter RTL Aldec; IC Wizard
& Simulation. Scirocco. Model Sim® SE Compiler; from Aristo; Jupiter &
Allegro HDL Design Polaris from Avant.
Entry. CoValdator from
Impulse Accelerated
Technologies, Inc.
3) Logic Design Compiler; Leonardo Build Gates; Blue View & Novas
Synthesis. Chip Architect; Spectrum; Cadence Incisive™ Debussy from
BlueSpec.
4) Formal Formality; Formal Pro; Encounter Test; VHDL Simili from
Verification. Expedition; Palladium II Symphony EDA;
Capital Script Accelerator. Verification Navigator
Analyzer. from Trans EDA.
5) Static Time Prime Timer; Mach TA; AssuSim II; Analysis Tools from
Analysis. Capital Sim Grid Source III. Inc.
6) Spice Hspice; Eldo Kernel; Allegro AMS Tspice;
Verification. Simulator;
7) Schematic Cosmos SE; DIAC; Virtuso schematic S-Edit from Tanner;
Editor. Discovery AMS. editor; Allegro Work Stabie-Soft;
Bench.
8) Physical Astro; IC Station SDL; Silicon Ensemble;
Design Calibre; Assura;
(Placing & ICgraph Basic; Nano Route Ultra.
Routing) IC assemble;
Hot Plot.

9) Physical Hercules; Calibre DRC; Assura DRC;

Verification. Calibre Diva Physical
DESIGNrev; Verification,
Calibre Fire & Ice QX.
Interactive;
Calibre RVE

10) Full Custom Cosmos LE; IC Station; Virtuoso XL Layout L-Edit;

Layout Calibre MDP Editor;
Mask Compose.
11) Design For DFT Compiler; DFT Advisor;
Test Tetra Max; Fast Scan;