Beruflich Dokumente
Kultur Dokumente
Principles of CMOS VLSI Design: A systems perspective, Neil H. E. Weste and Kamran Eshraghian
5. Calculate the native threshold voltage for n-transistor at 300K for a process with a Chapter-2
Si Substrate with NA=1.8X1016 , A SiO2 gate oxide with thickness 20 nm, assuming
φms=-0.9V, Qfc = 0.
6. How does a dummy collector prevent latch up? Chapter-2
10. Draw the symbolic layout for CMOS XNOR gates Chapter-5
11. Draw the symbolic layout for CMOS gate with multiple source-drain connections Chapter-5
12. For the given set of parameters, evaluate Maximum Depletion width and Lecture-1
Threshold voltage for a N-MOSFET. Given: NA = 1017/cm3 , At room temp kT/q =
0.026V, ni = 9.65x109/cm3, es = 11.9x1.85x10-14 F/cm, d=50 nm and ei=3.9x8.85x10-
14
F/cm
13. For the given set of parameters evaluate threshold voltage roll-off for a short Lecture-3
channel N-MOSFET. Given: L = 200 nm, NA = 1017/cm3 , At room temp kT/q =
0.026V, ni = 9.65x109/cm3, es = 11.9x1.85x10-14 F/cm, d=50 nm and ei=3.9x8.85x10-
14
F/cm, rj = 25 nm
14. Fill in the Blank Lecture-5
i. If the width of a transistor increases, the current will _____________
ii. If the length of a transistor increases, the current will ____________
iii. If the supply voltage of a chip increases, the maximum transistor current
will_________
iv. If the width of a transistor increases, its gate capacitance will _____________
v. If the length of a transistor increases, its gate capacitance will _____________