Beruflich Dokumente
Kultur Dokumente
Page Index
===============
P01-Cover Page
P02-Block Diagram
P03-Notes List
P04-Dothan(1/2)
P05-Dothan(2/2)
1 1
P06-Alviso HOST(1/5)
P07-Alviso DDR(2/5)
P08-Alviso PCI-E(3/5)
P09-Alviso POWER(4/5)
P10-Alviso POWER(5/5)
P11-DDRI-SODIMM0
Compal Confidential
P12-DDRI-SODIMM1
P13-DDR Decoupling
P14-Clock Generator
P15-CRT Conn.
P16-VGA / LCD Conn.
P21-HDD/CDROM
Intel Dothan/ Celeron M/ Alviso GM(PM) / DDR-2 / ICH6-M P22-DVI / TV_Out Conn
P23-PCMCIA ENE CB1410 & CB714
P24-PCMCIA SOCKET
P25-TI 1394A TSB43AB21A
(Daughter Card: ATi M24P/ M26P) P26-LAN BCM5788M
P27-LAN Magnetic & RJ45/RJ11
P28-Mimi-PCI Slot
Compal confidential
Project Code: EFL50/ EFT51 Intel Dothan/ Celeron M CPU Thermal Sensor Clock Generator
File Name : LA-2761 ADM1032ARM ICS954226AGT
page 4,5
CRT & TV-OUT
page 4 page 14
page 15
1
H_A#(3..31) FSB H_D#(0..63)
1
DMI
LCD CONN
page 16
2
USB 2.0 USB conn x 3 2
page 37
SIGNAL
STATE SLP_S1# SLP_S3# SLP_S4# SLP_S5# +VALW +V +VS Clock
Voltage Rails
Full ON HIGH HIGH HIGH HIGH ON ON ON ON
Power Plane Description S1 S3 S4/ S5 S1(Power On Suspend) LOW HIGH HIGH HIGH ON ON ON LOW
VIN Adapter power supply (19V) N/A N/A N/A S3 (Suspend to RAM) LOW LOW HIGH HIGH ON ON OFF OFF
1 B+ AC or battery power rail for power circuit. N/A N/A N/A 1
S4 (Suspend to Disk) LOW LOW LOW HIGH ON OFF OFF OFF
+CPU_CORE Core voltage for CPU ON OFF OFF
+1.05VS 1.05V switched power rail ON OFF OFF S5 (Soft OFF) LOW LOW LOW LOW ON OFF OFF OFF
+DDRVTT 0.9V switched power rail for DDR terminator ON OFF OFF
+1.5VALW 1.5V always on power rail ON ON ON*
+1.5VS 1.5V switched power rail ON OFF OFF Board ID / SKU ID Table for AD channel
+1.8VS 1.8V switched power rail ON OFF OFF Vcc 3.3V +/- 5%
+DDRVCC 1.8V power rail for DDR ON ON OFF Ra / Rc 100K +/- 5%
+2.5VS 2.5V switched power rail ON OFF OFF Board ID Rb / Rd V AD_BID min V AD_BID typ V AD_BID max
+3VALW 3.3V always on power rail ON ON ON* 0 0 0 V 0 V 0 V
+3V 3.3V power rail ON ON OFF 1 8.2K +/- 5% 0.216 V 0.250 V 0.289 V
+3VS 3.3V switched power rail ON OFF OFF 2 18K +/- 5% 0.436 V 0.503 V 0.538 V
+5VALW 5V always on power rail ON ON ON* 3 33K +/- 5% 0.712 V 0.819 V 0.875 V
+5VS 5V switched power rail ON OFF OFF 4 56K +/- 5% 1.036 V 1.185 V 1.264 V
+5VMOD 5V switched power rail for Module Bay ON OFF OFF 5 100K +/- 5% 1.453 V 1.650 V 1.759 V
2 2
+12VALW 12V always on power rail ON ON ON* 6 200K +/- 5% 1.935 V 2.200 V 2.341 V
+RTCVCC RTC power ON ON ON 7 NC 2.500 V 3.300 V 3.300 V
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF. BOARD ID Table BTO Option Table
External PCI Devices Board ID PCB Revision BTO Item BOM Structure
Device IDSEL# REQ#/GNT# Interrupts 0 0.1 UMA GM@
C ardBus AD20 2 PIRQA/PIRQB 1 0.2 Discrete PM@
1394 AD16 0 PIRQE 2 LAN 10/100 4401@
SD AD20 2 PIRQA/PIRQB 3 LAN GIGA 5788@
Mini-PCI AD18 1 PIRQG/PIRQH 4 1 Spindle 1S@
LAN AD17 3 PIRQF 5 2 Spindle 2S@
6 2 Spindle with SATA 2SS@
3 3
7 2 Spindle with PATA 2SP@
1 Spindle with SATA 1SS@
EC SM Bus1 address EC SM Bus2 address SKU ID Table 1 Spindle with PATA 1SP@
With Docking WD@
Device Address Device Address SKU ID SKU Without Docking ND@
Smart Battery 0001 011X b ADM1032 1001 110X b 0 With 1394 1394@
EEPROM(24C16/02) 1010 000X b 1 With 1394 4pin 1394<4>@
(24C04) 1011 000Xb 2 With 1394 6pin 1394<6>@
3
4
5
ICH6M SM Bus address 6
7
Device Address
4 4
Clock Generator 1101 001Xb
(ICS 954226AGT)
DDRII DIMM0 1001 000Xb
DDRII DIMM2 1001 010Xb Security Classification Compal Secret Data
Issued Date 2005/03/08 Deciphered Date 2006/03/08 Title
Notes
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom EFL50 LA-2761 0.2
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Wednesday, April 20, 2005 Sheet 3 of 51
A B C D E
5 4 3 2 1
JP20A
H_A#[3..31]
6 H_A#[3..31]
H_A#3 P4 A19 H_D#0
6 H_REQ#[0..4]
H_REQ#[0..4] H_A#4
H_A#5
U4
A3#
A4#
Dothan D0#
D1# A25 H_D#1
H_D#2
V3 A5# D2# A22
H_RS#[0..2] H_A#6 R3 B21 H_D#3 +3VS
6 H_RS#[0..2] A6# D3#
H_A#7 V2 A24 H_D#4
H_D#[0..63] H_A#8 A7# D4# H_D#5
6 H_D#[0..63] W1 A8# D5# B26
H_A#9 T4 A21 H_D#6
H_A#10 A9# D6# H_D#7
W2 A10# D7# B20
H_A#11 Y4 C20 H_D#8 1
A11# D8#
1
H_A#12 Y1 B24 H_D#9
H_A#13 A12# D9# H_D#10 C401 R379
U1 A13# D10# D24
D H_A#14 AA3 E24 H_D#11 0.1U_0402_16V4Z @ 10K_0402_5% D
H_A#15 A14# D11# H_D#12 2
Y3 A15# D12# C26 1
H_A#16 AA2 B23 H_D#13 C402
2
H_A#17 A16# D13# H_D#14 U29
AF4 A17# D14# E23
H_A#18 AC4 C25 H_D#15 2200P_0402_50V7K THERMDA 2 1
H_A#19 A18# D15# H_D#16 2 D+ VDD1
AC7 A19# D16# H23
H_A#20 AC3 G25 H_D#17 THERMDC 3 6
H_A#21 A20# D17# H_D#18 D- ALERT#
AD3 A21# D18# L23
H_A#22 AE4 M26 H_D#19 EC_SMB_CK2 8 4
A22# D19# 33 EC_SMB_CK2 SCLK THERM#
H_A#23 AD2 H24 H_D#20
H_A#24 A23# D20# H_D#21 EC_SMB_DA2
AB4 A24# D21# F25 33 EC_SMB_DA2 7 SDATA GND 5
H_A#25 AC6 ADDR GROUP DATA GROUP G24 H_D#22
H_A#26 A25# D22# H_D#23
AD5 A26# D23# J23
H_A#27 AE2 M23 H_D#24 ADM1032ARM_RM8
H_A#28 A27# D24# H_D#25
AD6 A28# D25# J25
H_A#29 AF3 L26 H_D#26 SMBus Address: 1001110X (b)
H_A#30 A29# D26# H_D#27
AE1 A30# D27# N24
H_A#31 AF1 M25 H_D#28
A31# D28# H_D#29
D29# H26
H_REQ#0 R2 N25 H_D#30
H_REQ#1 REQ0# D30# H_D#31
P3 REQ1# D31# K25
H_REQ#2 T2 Y26 H_D#32
H_REQ#3 REQ2# D32# H_D#33
P1 REQ3# D33# AA24
H_REQ#4 T1 T25 H_D#34
REQ4# D34# H_D#35
D35# U23
H_ADSTB#0 U3 V23 H_D#36
6 H_ADSTB#0 ADSTB0# D36#
H_ADSTB#1 AE5 R24 H_D#37
6 H_ADSTB#1 ADSTB1# D37# +1.05VS
R26 H_D#38
D38# H_D#39
D39# R23
C A16 AA23 H_D#40 C
ITP_CLK0 D40# H_D#41
A15 ITP_CLK1 D41# U26
V24 H_D#42
CLK_CPU_BCLK D42# H_D#43 ITP_TDI R53 150_0402_5%
13 CLK_CPU_BCLK B15 BCLK0 D43# U25 2 1
CLK_CPU_BCLK# B14 HOST CLK V26 H_D#44
13 CLK_CPU_BCLK# BCLK1 D44#
Y23 H_D#45 ITP_TDO R383 2 1 @ 54.9_0402_1%
D45# H_D#46
D46# AA26
Y25 H_D#47 H_CPURST# R382 2 1 @ 54.9_0402_1%
H_ADS# D47# H_D#48
6 H_ADS# N2 ADS# D48# AB25
H_BNR# L1 AC23 H_D#49 ITP_TMS R54 2 1 40.2_0402_1%
6 H_BNR# BNR# D49#
H_BPRI# J3 AB24 H_D#50
6 H_BPRI# H_BR0# BPRI# D50# H_D#51 PRO_CHOT# R386 56_0402_5%
6 H_BR0# N4 BR0# D51# AC20 2 1
H_DEFER# L4 AC22 H_D#52
6 H_DEFER# H_DRD Y# DEFER# D52# H_D#53 H_PWRGOOD R56 200_0402_5%
6 H_DRDY# H2 DRDY# D53# AC25 2 1
H_HIT# K3 AD23 H_D#54
6 H_HIT# HIT# D54#
H_HITM# K4 CONTROL GROUP AE22 H_D#55 H_IERR# R380 2 1 56_0402_5%
6 H_HITM# HITM# D55#
H_IERR# A4 AF23 H_D#56
H_LOCK# IERR# D56# H_D#57
6 H_LOCK# J2 LOCK# D57# AD24
H_CPURST# B11 AF20 H_D#58
6 H_CPURST# RESET# D58# H_D#59 +3VS
D59# AE21
AD21 H_D#60
H_RS#0 D60# H_D#61
H1 RS0# D61# AF25
H_RS#1 K1 AF22 H_D#62 ITP_DBRRESET# R381 2 1 150_0402_5%
H_RS#2 RS1# D62# H_D#63
L2 RS2# D63# AF26
H_TRDY# M3
6 H_TRDY# TRDY#
D25 H_DINV#0
DINV0# H_DINV#0 6
J26 H_DINV#1 ITP_TRST# R384 2 1 680_0402_5%
DINV1# H_DINV#1 6
C8 T24 H_DINV#2
B BPM0# DINV2# H_DINV#2 6 B
B8 AD20 H_DINV#3 ITP_TCK R385 2 1 27.4_0402_1%
BPM1# DINV3# H_DINV#3 6
A9 BPM2#
C9 TEST1 R55 2 1 @ 1K_0402_5%
BPM3# H_DSTBN#0
DSTBN0# C23 H_DSTBN#0 6
ITP_DBRRESET# A7 K24 H_DSTBN#1 TEST2 R401 2 1 @ 1K_0402_5%
DBR# DSTBN1# H_DSTBN#1 6
H_DBSY# M2 W25 H_DSTBN#2
6 H_DBSY# DBSY# DSTBN2# H_DSTBN#2 6
H_DPSLP# B7 AE24 H_DSTBN#3
17 H_DPSLP# DPSLP# DSTBN3# H_DSTBN#3 6
H_DPRSTP# G1 C22 H_DSTBP#0
17 H_DPRSTP# DPRSTP# DSTBP0# H_DSTBP#0 6
H_DPWR# C19 L24 H_DSTBP#1
6 H_DPWR# DPWR# DSTBP1# H_DSTBP#1 6
A10 MISC W24 H_DSTBP#2
PRDY# DSTBP2# H_DSTBP#2 6
B10 AE25 H_DSTBP#3
PRO_CHOT# B17
PREQ#
PROCHOT#
DSTBP3# H_DSTBP#3 6 0415
H_PWRGOOD E4 H_INIT# C685 1 2 47P_0402_50V8J
17 H_PWRGOOD PWRGOOD
H_CPUSLP# A6
6,17 H_CPUSLP# SLP#
ITP_TCK A13
ITP_TDI TCK H_A20M# H_NMI C686 1
C12 TDI A20M# C2 H_A20M# 17 2 47P_0402_50V8J
ITP_TDO A12 D3 H_FERR#
TDO FERR# H_FERR# 17
TEST1 C5 A3 H_IGNNE#
TEST1 IGNNE# H_IGNNE# 17
TEST2 F23 B5 H_INIT# H_SMI# C687 1 2 47P_0402_50V8J
TEST2 INIT# H_INIT# 17
ITP_TMS C11 D1 H_INTR
TMS LINT0 H_INTR 17
ITP_TRST# B13 D4 H_NMI
TRST# LINT1 H_NMI 17
LEGACY CPU H_CPURST# C688 1 2 47P_0402_50V8J
THERMAL
THERMDA B18 C6 H_STPCLK#
THERMDC THERMDA DIODE STPCLK# H_SMI#
H_STPCLK# 17
A18 THERMDC SMI# B4 H_SMI# 17
H_THERMTRIP# C17
6,17 H_THERMTRIP# THERMTRIP#
A A
TYCO_1612365-1_Dothan
+CPU_CORE +CPU_CORE
JP20B JP20C
220U_D2_4VM_R12 220U_D2_4VM_R12
R144 1 2 @ 54.9_0402_1% VCCSENSE AE7 A2 1 1 1 1 F20 T26
R141 1 @ 54.9_0402_1% VSSSENSE VCCSENSE VSS VCC VSS
2 AF6 VSSSENSE VSS A5 F22 VCC VSS U2
A8 + + C50 + + C151 G5 U6
VSS VCC VSS
R393
30 mils0_0603_5% VCCA0 VSS A11
C49 C150
G21 VCC VSS U22
1 2 F26 VCCA0 VSS A14 H6 VCC VSS U24
R388 @20_0603_5% VCCA1 2 2 2 2
1 B1 VCCA1 VSS A17 H22 VCC VSS V1
+VCCA R387 1 @20_0603_5% VCCA2 N1 A20 220U_D2_4VM_R12 220U_D2_4VM_R12 J5 V4
R417 @20_0603_5% VCCA3 AC26 VCCA2 VSS VCC VSS
1 VCCA3 VSS A23 J21 VCC VSS V5
VSS A26 K22 VCC VSS V21
D
+1.05VS P23 VCCQ0 VSS B3 U5 VCC VSS V25 D
+CPU_CORE
1.8V FOR DOTHAN-A W4 VCCQ1 VSS B6 V6 VCC VSS W3
VSS B9 V22 VCC VSS W6
1 2 B12 10U_0805_10V4Z 10U_0805_10V4Z 10U_0805_10V4Z W5 W22
+1.8VS R419 @ 0_1206_5% D10 VCCP
Dothan VSS
VSS B16 1
C455
1
C456
1
C424
1
C435
1
C443
1
C448
1
C453
W21
VCC
VCC
VSS
VSS W23
D12 B19 Y6 W26
D14
VCCP
VCCP
VSS
VSS B22 Y22
VCC
VCC
Dothan VSS
VSS Y2
D16 VCCP VSS B25 AA5 VCC VSS Y5
2 2 2 2 2 2 2
1.5V FOR DOTHAN-B E11 VCCP VSS C1
10U_0805_10V4Z 10U_0805_10V4Z 10U_0805_10V4Z 10U_0805_10V4Z
AA7 VCC VSS Y21
E13 C4 AA9 Y24
CPU_VID3 2 2 2 2 2 2 2
46 CPU_VID3 G3 VID3 VSS G2 VSS AD19
R422 46 CPU_VID4 CPU_VID4 G4 G6 10U_0805_10V4Z 10U_0805_10V4Z 10U_0805_10V4Z 10U_0805_10V4Z AD22
1K_0402_1% CPU_VID5 VID4 VSS VSS
46 CPU_VID5 H4 VID5 VSS G22 M4 VSS VSS AD25
G23 M5 AE3
VSS
G26 0331 M21
VSS VSS
AE6
2
H_RS#[0..2] +1.5VS
H_RS#[0..2] 4
H_A#[3..31]
4 H_A#[3..31] CLK_DREF_SSC R114 1 2 PM@ 0_0402_5%
H_REQ#[0..4] H_D#[0..63]
4 H_REQ#[0..4] H_D#[0..63] 4
CLK_DREF_SSC# R122 1 2 PM@ 0_0402_5%
U31A
U31B
H_A#3 G9 E4 H_D#0
H_A#4 C9
HA3#
HA4#
Alviso HD0#
HD1# E1 H_D#1
18 DMI_ITX_MRX_N0
DMI_ITX_MRX_N0 AA31 DMIRXN0 CFG0 G16 CFG0
H_A#5 E9 F4 H_D#2 DMI_ITX_MRX_N1 AB35 H13 MCH_CLKSEL1
HA5# HD2# 18 DMI_ITX_MRX_N1 DMIRXN1 CFG1 MCH_CLKSEL1 13
H_A#6 B7 H7 H_D#3 DMI_ITX_MRX_N2 AC31 G14 MCH_CLKSEL0
HA6# HD3# 18 DMI_ITX_MRX_N2 DMIRXN2 CFG2 MCH_CLKSEL0 13
D H_A#7 A10 E2 H_D#4 DMI_ITX_MRX_N3 AD35 F16 D
HA7# HD4# 18 DMI_ITX_MRX_N3 DMIRXN3 CFG3
H_A#8 F9 F1 H_D#5 F15
H_A#9 HA8# HD5# H_D#6 DMI_ITX_MRX_P0 CFG4 CFG5
D8 HA9# HD6# E3 18 DMI_ITX_MRX_P0 Y31 DMIRXP0 CFG5 G15
H_A#10 B10 D3 H_D#7 DMI_ITX_MRX_P1 AA35 E16 CFG6
HA10# HD7# 18 DMI_ITX_MRX_P1 DMIRXP1 CFG6 +1.05VS
H_A#11 E10 K7 H_D#8 DMI_ITX_MRX_P2 AB31 D17 CFG7
HA11# HD8# 18 DMI_ITX_MRX_P2 DMIRXP2 CFG7
H_A#12 G10 F2 H_D#9 DMI_ITX_MRX_P3 AC35 J16
HA12# HD9# 18 DMI_ITX_MRX_P3 DMIRXP3 CFG8
H_A#13 D9 J7 H_D#10 D15 CFG9 CFG0 R131 1 2 10K_0402_5%
H_A#14 HA13# HD10# H_D#11 DMI_MTX_IRX_N0 CFG9
E11 HA14# HD11# J8 18 DMI_MTX_IRX_N0 AA33 DMITXN0 CFG10 E15
H_A#15 F10 H6 H_D#12 DMI_MTX_IRX_N1 AB37 D14
18 DMI_MTX_IRX_N1
DMI
H_A#16 HA15# HD12# H_D#13 DMI_MTX_IRX_N2 DMITXN1 CFG11 CFG12 CFG0 R132 1
G11 HA16# HD13# F3 18 DMI_MTX_IRX_N2 AC33 DMITXN2 CFG12 E14 2 @ 1K_0402_5%
H_A#17 G13 K8 H_D#14 DMI_MTX_IRX_N3 AD37 H12 CFG13
HA17# HD14# 18 DMI_MTX_IRX_N3 DMITXN3 CFG13
H_A#18 C10 H5 H_D#15 C14 CFG5 R127 1 2 @ 1K_0402_5%
H_A#19 HA18# HD15# H_D#16 DMI_MTX_IRX_P0 CFG14
CFG/RSVD
C11 HA19# HD16# H1 18 DMI_MTX_IRX_P0 Y33 DMITXP0 CFG15 H15
H_A#20 D11 H2 H_D#17 DMI_MTX_IRX_P1 AA37 J15 CFG16 CFG6 R124 1 2 1K_0402_5%
HA20# HD17# 18 DMI_MTX_IRX_P1 DMITXP1 CFG16
H_A#21 C12 K5 H_D#18 DMI_MTX_IRX_P2 AB33 H14
HA21# HD18# 18 DMI_MTX_IRX_P2 DMITXP2 CFG17
H_A#22 B13 K6 H_D#19 DMI_MTX_IRX_P3 AC37 G22 CFG18 CFG7 R117 1 2 @ 1K_0402_5%
HA22# HD19# 18 DMI_MTX_IRX_P3 DMITXP3 CFG18
H_A#23 A12 J4 H_D#20 G23 CFG19
H_A#24 HA23# HD20# H_D#21 CFG19 CFG9 R119 1
F12 HA24# HD21# G3 CFG20 D23 2 @ 1K_0402_5%
H_A#25 G12 H3 H_D#22 M_CLK_DDR0 AM33 G25
HA25# HD22# 11 M_CLK_DDR0 SM_CK0 RSVD21
H_A#26 E12 J1 H_D#23 M_CLK_DDR1 AL1 G24 CFG12 R125 1 2 @ 1K_0402_5%
HA26# HD23# 11 M_CLK_DDR1 SM_CK1 RSVD22
H_A#27 C13 L5 H_D#24 AE11 J17
H_A#28 HA27# HD24# H_D#25 M_CLK_DDR3 SM_CK2 RSVD23 CFG13 R137 1
B11 HA28# HD25# K4 12 M_CLK_DDR3 AJ34 SM_CK3 RSVD24 A31 2 @ 1K_0402_5%
H_A#29 D13 J5 H_D#26 M_CLK_DDR4 AF6 A30
HA29# HD26# 12 M_CLK_DDR4 SM_CK4 RSVD25
H_A#30 A13 P7 H_D#27 AC10 D26 CFG16 R140 1 2 @ 1K_0402_5%
H_A#31 HA30# HD27# H_D#28 SM_CK5 RSVD26
F13 HA31# HD28# L7 RSVD27 D25
J3 H_D#29 M_CLK_DDR#0 AN33 CFG[17:3]: internal pull-up
HD29# 11 M_CLK_DDR#0 SM_CK0#
DDR MUXING
A11 P5 H_D#30 M_CLK_DDR#1 AK1
HOST
CLK PM
4 H_DSTBN#3 HDSTBN#3 HD45# RSTIN# PLT_RST# 16,18,20,32,33,41
H_DSTBP#0 G5 V8 H_D#46 R162 1 2 40.2_0402_1% M_OCDCOMP0 AF22
4 H_DSTBP#0 H_DSTBP#1 HDSTBP#0 HD46# H_D#47 R163 1 SM_OCDCOMP0
4 H_DSTBP#1 K2 HDSTBP#1 HD47# U6 2 40.2_0402_1% M_OCDCOMP1 AF16 SM_OCDCOMP1
H_DSTBP#2 R2 W6 H_D#48 10mils 11 M_ODT0 M_ODT0 AP14 A24 CLK_DREF_96M#
4 H_DSTBP#2 HDSTBP#2 HD48# SM_ODT0 DREF_CLKN CLK_DREF_96M# 13
H_DSTBP#3 W4 U3 H_D#49 M_ODT1 AL15 A23 CLK_DREF_96M
4 H_DSTBP#3 HDSTBP#3 HD49# 11 M_ODT1 SM_ODT1 DREF_CLKP CLK_DREF_96M 13
H_DINV#0 H8 V5 H_D#50 M_ODT2 AM11 D37 CLK_DREF_SSC
4 H_DINV#0 HDINV#0 HD50# 12 M_ODT2 SM_ODT2 DREF_SSCLKP CLK_DREF_SSC 13
H_DINV#1 K3 W8 H_D#51 M_ODT3 AN10 C37 CLK_DREF_SSC#
4 H_DINV#1 HDINV#1 HD51# 12 M_ODT3 SM_ODT3 DREF_SSCLKN CLK_DREF_SSC# 13 +2.5VS
H_DINV#2 T7 W7 H_D#52
4 H_DINV#2 H_DINV#3 HDINV#2 HD52# H_D#53 R165 1
4 H_DINV#3 U5 HDINV#3 HD53# U2 +1.8V 2 80.6_0402_1% M_RCOMPN AK10 SMRCOMPN
U1 H_D#54 R166 1 2 80.6_0402_1% M_RCOMPP AK11 AP37 EXT_TS#0 R139 1 2 10K_0402_5%
HD54# H_D#55 SMVREF SMRCOMPP NC1
HD55# Y5 10mils AF37 SMVREF0 NC2 AN37
H_CPURST# H10 Y2 H_D#56 AD1 AP36 EXT_TS#1 R136 1 2 10K_0402_5%
4 H_CPURST# HCPURST# HD56# SMVREF1 NC3
V4 H_D#57 M_XSLEW AE27 AP2
H_ADS# HD57# H_D#58 SMXSLEWIN NC4
4 H_ADS# F8 HADS# HD58# Y7 AE28 SMXSLEWOUT NC5 AP1
H_TRDY# B5 W1 H_D#59 M_YSLEW AF9 AN1
4 H_TRDY# H_DPWR# HTRDY# HD59# H_D#60 SMYSLEWIN NC6
4 H_DPWR# G6 HDPWR# HD60# W3 AF10 SMYSLEWOUT NC7 B1 Refer to sheet 6 for FSB
H_DRD Y# F7 Y3 H_D#61 A2 CFG[2:0]
B 4 H_DRDY# H_DEFER# E6
HDRDY# HD61#
Y6 H_D#62 10mils NC8
B37
frequency select B
4 H_DEFER# HDEFER# HD62# H_D#63 NC9
NC
F6 HEDRDY# HD63# W2
+1.05VS NC10 A36 Low = DMI x 2
H_HITM# D6 A37 CFG5 High = DMI x 4
4
4
H_HITM#
H_HIT#
H_HIT#
H_LOCK#
D4
HHITM#
HHIT# HVREF J11 H_VREF
H_XRCOMP R1202 24.9_0402_1%
NC11 *
B3 C1 1 (10mil:20mil) Low = DDR-II
4
4
H_LOCK#
H_BR0#
H_BR0#
H_BNR#
E7
HLOCK#
HBREQ0#
HXRCOMP
HXSCOMP C2 H_XSCOMP
H_YRCOMP
R1111
R1512
2 54.9_0402_1%
24.9_0402_1%
ALVISO_BGA1257 CFG6 High = DDR-I *
4 H_BNR# A5 HBNR# HYRCOMP T1 1
H_BPRI# D5 L1 H_YSCOMP R1451 2 54.9_0402_1% Low = DT/Transportable CPU
4 H_BPRI# H_DBSY# HBPRI# HYSCOMP H_XSWING
C6 D1 CFG7 High = Mobile CPU
4 H_DBSY# CPU_SLP#
H_RS#0
G8
HDBSY#
HCPUSLP#
HXSWING
HYSWING P1 H_YSWING *
A4 HRS0# +1.8V CFG9 Low = Reverse Lane
H_RS#1 C5 High = Normal Operation
H_RS#2 B4
HRS1#
HRS2# H_XRCOMP & H_YRCOMP Trace / Space = 10 / 20 mil *
00 = Reserved
1
+1.05VS CFG[13:12] 01 = XOR Mode Enabled
Un-pop for Dothan-A ALVISO_BGA1257 R164 10 = All Z Mode Enabled
11 = Normal Operation (Default)
1K_0402_1% *
1
2
R421 0.1U_0402_16V4Z SMVREF Low = Disabled
221_0603_1% (FSB Dynamic High = Enabled
+1.05VS +1.05VS R158
1
C185
1 1 ODT) *
2
C179 CFG18
H_YSWING (12mil:10mil) 1K_0402_1% 0.1U_0402_16V4Z Low = 1.05V (Default)
*
1
R405 R409 1
100_0603_1% 221_0603_1% C149 CFG19
R423 Low = 1.05V (Default)
A
(5mil:15mil) (12mil:10mil) 0.1U_0402_16V4Z 100_0603_1% (VTT Select) High = 1.2V * A
2
2
2
H_VREF H_XSWING
1
1 1
C138 R406 C459 R411
Security Classification Compal Secret Data
0.1U_0402_16V4Z 200_0603_1% 0.1U_0402_16V4Z 100_0603_1% 2005/03/08 2006/03/08 Title
2 2 Issued Date Deciphered Date
Alviso HOST (1/5)
2
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom EFL50 LA-2761 0.2
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Wednesday, April 20, 2005 Sheet 6 of 51
5 4 3 2 1
5 4 3 2 1
D D
U31C U31D
DDR_A_D[0..63] 11 DDR_B_D[0..63] 12
DDR_A_BS#0 AK15 AG35 DDR_A_D0 DDR_B_BS#0 AJ15 AE31 DDR_B_D0
11 DDR_A_BS#0 SA_BS0# SADQ0 12 DDR_B_BS#0 SB_BS0# SBDQ0
DDR_A_BS#1 AK16 AH35 DDR_A_D1 DDR_B_BS#1 AG17 AE32 DDR_B_D1
11 DDR_A_BS#1 SA_BS1# SADQ1 12 DDR_B_BS#1 SB_BS1# SBDQ1
DDR_A_BS#2 AL21 AL35 DDR_A_D2 DDR_B_BS#2 AG21 AG32 DDR_B_D2
11 DDR_A_BS#2 SA_BS2# SADQ2 12 DDR_B_BS#2 SB_BS2# SBDQ2
11 DDR_A_DM[0..7] AL37 DDR_A_D3 12 DDR_B_DM[0..7] AG36 DDR_B_D3
DDR_A_DM0 SADQ3 DDR_A_D4 DDR_B_DM0 SBDQ3 DDR_B_D4
AJ37 SA_DM0 SADQ4 AH36 AF32 SB_DM0 SBDQ4 AE34
DDR_A_DM1 AP35 AJ35 DDR_A_D5 DDR_B_DM1 AK34 AE33 DDR_B_D5
DDR_A_DM2 SA_DM1 SADQ5 DDR_A_D6 DDR_B_DM2 SB_DM1 SBDQ5 DDR_B_D6
AL29 SA_DM2 SADQ6 AK37 AK27 SB_DM2 SBDQ6 AF31
DDR_A_DM3 AP24 AL34 DDR_A_D7 DDR_B_DM3 AK24 AF30 DDR_B_D7
DDR_A_DM4 SA_DM3 SADQ7 DDR_A_D8 DDR_B_DM4 SB_DM3 SBDQ7 DDR_B_D8
AP9 SA_DM4 SADQ8 AM36 AJ10 SB_DM4 SBDQ8 AH33
DDR_A_DM5 AP4 AN35 DDR_A_D9 DDR_B_DM5 AK5 AH32 DDR_B_D9
DDR_A_DM6 SA_DM5 SADQ9 DDR_A_D10 DDR_B_DM6 SB_DM5 SBDQ9 DDR_B_D10
AJ2 SA_DM6 SADQ10 AP32 AE7 SB_DM6 SBDQ10 AK31
DDR_A_DM7 AD3 AM31 DDR_A_D11 DDR_B_DM7 AB7 AG30 DDR_B_D11
SA_DM7 SADQ11 DDR_A_D12 SB_DM7 SBDQ11 DDR_B_D12
11 DDR_A_DQS[0..7] SADQ12 AM34 12 DDR_B_DQS[0..7] SBDQ12 AG34
DDR_A_DQS0 AK36 AM35 DDR_A_D13 DDR_B_DQS0 AF34 AG33 DDR_B_D13
DDR_A_DQS1 SA_DQS0 SADQ13 DDR_A_D14 DDR_B_DQS1 SB_DQS0 SBDQ13 DDR_B_D14
AP33 SA_DQS1 SADQ14 AL32 AK32 SB_DQS1 SBDQ14 AH31
DDR_A_DQS2 AN29 AM32 DDR_A_D15 DDR_B_DQS2 AJ28 AJ31 DDR_B_D15
DDR_A_DQS3 SA_DQS2 SADQ15 DDR_A_D16 DDR_B_DQS3 SB_DQS2 SBDQ15 DDR_B_D16
AP23 SA_DQS3 SADQ16 AN31 AK23 SB_DQS3 SBDQ16 AK30
DDR_A_DQS4 AM8 AP31 DDR_A_D17 DDR_B_DQS4 AM10 AJ30 DDR_B_D17
DDR_A_DQS5 SA_DQS4 SADQ17 DDR_A_D18 DDR_B_DQS5 SB_DQS4 SBDQ17 DDR_B_D18
AM4 SA_DQS5 SADQ18 AN28 AH6 SB_DQS5 SBDQ18 AH29
DDR_A_DQS6 AJ1 AP28 DDR_A_D19 DDR_B_DQS6 AF8 AH28 DDR_B_D19
DDR_A_DQS7 SA_DQS6 SADQ19 DDR_A_D20 DDR_B_DQS7 SB_DQS6 SBDQ19 DDR_B_D20
AE5 SA_DQS7 SADQ20 AL30 AB4 SB_DQS7 SBDQ20 AK29
11 DDR_A_DQS#[0..7] AM30 DDR_A_D21 12 DDR_B_DQS#[0..7] AH30 DDR_B_D21
DDR_A_DQS#0 SADQ21 DDR_A_D22 DDR_B_DQS#0 SBDQ21 DDR_B_D22
AK35 SA_DQS0# SADQ22 AM28 AF35 SB_DQS0# SBDQ22 AH27
C DDR_A_DQS#1 AP34 AL28 DDR_A_D23 DDR_B_DQS#1 AK33 AG28 DDR_B_D23 C
ALVISO_BGA1257 ALVISO_BGA1257
A A
+3VS +2.5VS
1
PCIE_MTX_C_GRX_N[0..15]
15,41 PCIE_MTX_C_GRX_N[0..15]
R92 PCIE_MTX_C_GRX_P[0..15]
15,41 PCIE_MTX_C_GRX_P[0..15]
GM@ 2.2K_0402_5%
2
GM@ BSS138_SOT23 PCEI_GTX_C_MRX_N[0..15]
G
15,41 PCEI_GTX_C_MRX_N[0..15]
2
GMCH_ENBKL 1 3 LBKLT_EN PCEI_GTX_C_MRX_P[0..15]
15,33 GMCH_ENBKL 15,41 PCEI_GTX_C_MRX_P[0..15]
S
D Q10 D
2 1
R88 @ 0_0402_5% U31G
SDVO_SDAT H24 D36 PEG_COMP 1 2 +1.5VS
15,41 SDVO_SDAT SDVOCTRL_DATA EXP_COMPI
SDVO_SCLK H25 D34 R115 24.9_0402_1%
15,41 SDVO_SCLK SDVOCTRL_CLK EXP_ICOMPO
CLK_MCH_3GPLL# AB29
MISC
13 CLK_MCH_3GPLL# GCLKN
CLK_MCH_3GPLL AC29 E30 PCEI_GTX_C_MRX_N0
13 CLK_MCH_3GPLL GCLKP EXP_RXN0/SDVO_TVCLKIN#
F34 PCEI_GTX_C_MRX_N1
EXP_RXN1/SDVO_INT# PCEI_GTX_C_MRX_N2
EXP_RXN2/SDVO_FLDSTALL# G30
GMCH_TV_COMPS A15 H34 PCEI_GTX_C_MRX_N3
21 GMCH_TV_COMPS TVDAC_A EXP_RXN3
GMCH_TV_LUMA C16 J30 PCEI_GTX_C_MRX_N4
21 GMCH_TV_LUMA TVDAC_B EXP_RXN4
GMCH_TV_CRMA A17 K34 PCEI_GTX_C_MRX_N5
21 GMCH_TV_CRMA TVDAC_C EXP_RXN5
2 1 TV_REFSET J18 L30 PCEI_GTX_C_MRX_N6
R143 4.99K_0603_1% TV_REFSET EXP_RXN6 PCEI_GTX_C_MRX_N7
2 1 B15 TV_IRTNA EXP_RXN7 M34
R108 0_0402_5% B16 N30 PCEI_GTX_C_MRX_N8
TV_IRTNB EXP_RXN8 PCEI_GTX_C_MRX_N9
B17 P34
TV
TV_IRTNC EXP_RXN9 PCEI_GTX_C_MRX_N10
EXP_RXN10 R30
T34 PCEI_GTX_C_MRX_N11
EXP_RXN11 PCEI_GTX_C_MRX_N12
EXP_RXN12 U30
V34 PCEI_GTX_C_MRX_N13
EXP_RXN13 PCEI_GTX_C_MRX_N14
EXP_RXN14 W30
GMCH_CRT_CLK E24 Y34 PCEI_GTX_C_MRX_N15
14 GMCH_CRT_CLK DDCCLK EXP_RXN15
GMCH_CRT_DATA E23
14 GMCH_CRT_DATA DDCDATA
GMCH_CRT_B E21 D30 PCEI_GTX_C_MRX_P0
14 GMCH_CRT_B BLUE EXP_RXP0/SDVO_TVCLKIN
2 1 D21 E34 PCEI_GTX_C_MRX_P1
R121 PM@ 150_0402_5% GMCH_CRT_G BLUE# EXP_RXP1/SDVO_INT PCEI_GTX_C_MRX_P2
14 GMCH_CRT_G C20 GREEN EXP_RXP2/SDVO_FLDSTALL F30
2 1 B20 G34 PCEI_GTX_C_MRX_P3
R107 PM@ 150_0402_5% GMCH_CRT_R GREEN# EXP_RXP3 PCEI_GTX_C_MRX_P4
14 GMCH_CRT_R A19 RED EXP_RXP4 H30
2 1 B19 J34 PCEI_GTX_C_MRX_P5
C R403 PM@ 150_0402_5% GMCH_CRT_VSYNC RED# EXP_RXP5 PCEI_GTX_C_MRX_P6 C
H21 K30
VGA
14 GMCH_CRT_VSYNC VSYNC EXP_RXP6
GMCH_CRT_HSYNC G21 L34 PCEI_GTX_C_MRX_P7
14 GMCH_CRT_HSYNC HSYNC EXP_RXP7
LVDS
GMCH_TZCLK- C25 V36 PCIE_MTX_GRX_N13 C469 1 2 0.1U_0402_16V4Z PCIE_MTX_C_GRX_N13
15 GMCH_TZCLK- LBCLKN EXP_TXN13
R134 1 2 100K_0402_5% LBKLT_EN GMCH_TZCLK+ C24 W32 PCIE_MTX_GRX_N14 C474 1 2 0.1U_0402_16V4Z PCIE_MTX_C_GRX_N14
15 GMCH_TZCLK+ LBCLKP EXP_TXN14
Y36 PCIE_MTX_GRX_N15 C476 1 2 0.1U_0402_16V4Z PCIE_MTX_C_GRX_N15
R112 1.5K_0402_1% LIBG GMCH_TXOUT0- EXP_TXN15
1 2 15 GMCH_TXOUT0- B34 LADATAN0
GMCH_TXOUT1- B33
B 15 GMCH_TXOUT1- LADATAN1 B
R109 1 2 PM@ 150_0402_5% GMCH_TV_COMPS GMCH_TXOUT2- B32 D32 PCIE_MTX_GRX_P0 C413 1 2 0.1U_0402_16V4Z PCIE_MTX_C_GRX_P0
15 GMCH_TXOUT2- LADATAN2 EXP_TXP0/SDVOB_RED
E36 PCIE_MTX_GRX_P1 C418 1 2 0.1U_0402_16V4Z PCIE_MTX_C_GRX_P1
R118 EXP_TXP1/SDVOB_GREEN
1 2 PM@ 150_0402_5% GMCH_TV_LUMA
EXP_TXP2/SDVOB_BLUE F32 PCIE_MTX_GRX_P2 C425 1 2 0.1U_0402_16V4Z PCIE_MTX_C_GRX_P2
GMCH_TXOUT0+ A34 G36 PCIE_MTX_GRX_P3 C430 1 2 0.1U_0402_16V4Z PCIE_MTX_C_GRX_P3
15 GMCH_TXOUT0+ LADATAP0 EXP_TXP3/SDVOB_CLKP
R101 1 2 PM@ 150_0402_5% GMCH_TV_CRMA GMCH_TXOUT1+ A33 H32 PCIE_MTX_GRX_P4 C438 1 2 0.1U_0402_16V4Z PCIE_MTX_C_GRX_P4
15 GMCH_TXOUT1+ LADATAP1 EXP_TXP4/SDVOC_RED
GMCH_TXOUT2+ B31 J36 PCIE_MTX_GRX_P5 C444 1 2 0.1U_0402_16V4Z PCIE_MTX_C_GRX_P5
15 GMCH_TXOUT2+ LADATAP2 EXP_TXP5/SDVOC_GREEN
K32 PCIE_MTX_GRX_P6 C446 1 2 0.1U_0402_16V4Z PCIE_MTX_C_GRX_P6
EXP_TXP6/SDVOC_BLUE PCIE_MTX_GRX_P7 C450 1 0.1U_0402_16V4Z PCIE_MTX_C_GRX_P7
EXP_TXP7/SDVOC_CLKP L36 2
M32 PCIE_MTX_GRX_P8 C454 1 2 0.1U_0402_16V4Z PCIE_MTX_C_GRX_P8
GMCH_TZOUT0- EXP_TXP8 PCIE_MTX_GRX_P9 C458 1 0.1U_0402_16V4Z PCIE_MTX_C_GRX_P9
15 GMCH_TZOUT0- C29 LBDATAN0 EXP_TXP9 N36 2
GMCH_TZOUT1- D28 P32 PCIE_MTX_GRX_P10 C461 1 2 0.1U_0402_16V4Z PCIE_MTX_C_GRX_P10
15 GMCH_TZOUT1- LBDATAN1 EXP_TXP10
GMCH_TZOUT2- C27 R36 PCIE_MTX_GRX_P11 C464 1 2 0.1U_0402_16V4Z PCIE_MTX_C_GRX_P11
15 GMCH_TZOUT2- LBDATAN2 EXP_TXP11
T32 PCIE_MTX_GRX_P12 C466 1 2 0.1U_0402_16V4Z PCIE_MTX_C_GRX_P12
+2.5VS EXP_TXP12 PCIE_MTX_GRX_P13 C468 1 0.1U_0402_16V4Z PCIE_MTX_C_GRX_P13
EXP_TXP13 U36 2
+3VS V32 PCIE_MTX_GRX_P14 C470 1 2 0.1U_0402_16V4Z PCIE_MTX_C_GRX_P14
GMCH_TZOUT0+ EXP_TXP14 PCIE_MTX_GRX_P15 C475 1 0.1U_0402_16V4Z PCIE_MTX_C_GRX_P15
15 GMCH_TZOUT0+ C28 LBDATAP0 EXP_TXP15 W36 2
GMCH_TZOUT1+ D27
15 GMCH_TZOUT1+ LBDATAP1
2
GMCH_TZOUT2+ C26
15 GMCH_TZOUT2+ LBDATAP2
R104 R87
GM@ 4.7K_0402_5% GM@ 4.7K_0402_5%
2
G
ALVISO_BGA1257
1
LDDC_CLK 3 1 GMCH_LCD_CLK
GMCH_LCD_CLK 15
S
Q9
GM@ 2N7002_SOT23
A +2.5VS A
+3VS
2
R105 R404
GM@ 4.7K_0402_5% GM@ 4.7K_0402_5% Security Classification Compal Secret Data
2
G
LDDC_DATA 3 1 GMCH_LCD_DATA
GMCH_LCD_DATA 15 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number Rev
S
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Q32 DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS B EFL50 LA-2761 0.2
GM@ 2N7002_SOT23 MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Wednesday, April 20, 2005 Sheet 8 of 51
5 4 3 2 1
5 4 3 2 1
+1.05VS
4000mA
U31F C195
U31E 0.1U_0402_16V4Z C189 2.2U_0603_6.3V6K
0.1U_0402_16V4Z 0.1U_0402_16V4Z
120mA +3VS_TVDAC +1.05VS K13 AM37 V1.8_DDR_CAP1 2 1 0.1U_0402_16V4Z
VTT0 VCCSM0 V1.8_DDR_CAP2
+1.05VS T29 VCC0 VCCA_TVDACA0 F17 J13 VTT1 VCCSM1 AH37 2 1 1 1 1 1 1 1
R29 E17 1 K12 AP29 V1.8_DDR_CAP5 2 1 C169 C160 C144 C143
VCC1 VCCA_TVDACA1 VTT2 VCCSM2 C198
N29 VCC2 VCCA_TVDACB0 D18 W11 VTT3 VCCSM3 AD28 +1.8V
M29 C18 + V11 AD27 0.1U_0402_16V4Z C154 C152
VCC3 VCCA_TVDACB1 C55 VTT4 VCCSM4 2 2 2 2 2 2
K29 VCC4 VCCA_TVDACC0 F18 U11 VTT5 VCCSM5 AC27
J29 E18 TV@150U_D2_6.3VM T11 AP26 10U_1206_16V4Z
VCC5 VCCA_TVDACC1 2 VTT6 VCCSM6 2.2U_0603_6.3V6K 0.1U_0402_16V4Z
D V28 R11 AN26 D
U28
T28
VCC6
VCC7
VCC8 POWER VCCA_TVBG
VSSA_TVBG
H18
G18
P11
N11
VTT7
VTT8
VTT9
POWER VCCSM7
VCCSM8
VCCSM9
AM26
AL26 +1.8V
2200mA
R28 VCC9 M11 VTT10 VCCSM10 AK26
P28 D19 L11 AJ26 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
VCC10 VCCD_TVDAC VTT11 VCCSM11
N28 VCC11 VCCDQ_TVDAC H17 24mA K11 VTT12 VCCSM12 AH26 1
M28 VCC12 W10 VTT13 VCCSM13 AG26 1 1 1 1 1 1 1 1
L28 B26 V10 AF26 + C174 C188 C172 C177
VCC13 VCCD_LVDS0 +1.5VS VTT14 VCCSM14
K28 VCC14 VCCD_LVDS1 B25 U10 VTT15 VCCSM15 AE26
J28 A25 60mA T10 AP25 C200 C175 C176 C178 C187
VCC15 VCCD_LVDS2 VTT16 VCCSM16 330U_D2E_2.5VM 2 2 2 2 2 2 2 2 2
H28 VCC16 R10 VTT17 VCCSM17 AN25
G28 VCC17 VCCA_LVDS A35 +2.5VS P10 VTT18 VCCSM18 AM25
V27 10mA N10 AL25 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
VCC18 VTT19 VCCSM19
U27 VCC19 VCCHV0 B22 M10 VTT20 VCCSM20 AK25
T27 VCC20 VCCHV1 B21 2mA K10 VTT21 VCCSM21 AJ25
R27 VCC21 VCCHV2 A21 J10 VTT22 VCCSM22 AH25
P27 VCC22 Y9 VTT23 VCCSM23 AG25
+2.5VS
N27 VCC23 VCCTX_LVDS0 B28 W9 VTT24 VCCSM24 AF25 VCCHV(Ball A21,B21,B22)
M27 VCC24 VCCTX_LVDS1 A28 60mA U9 VTT25 VCCSM25 AE25
L27 VCC25 VCCTX_LVDS2 A27 R9 VTT26 VCCSM26 AE24
K27 VCC26 P9 VTT27 VCCSM27 AE23
J27 VCC27 VCCA_SM0 AF20 +1.5VS_DDRDLL N9 VTT28 VCCSM28 AE22 1 1 1 1 1 1
H27 AP19 M9 AE21 C101 C100 C94 C107 C92 C102
VCC28 VCCA_SM1 VTT29 VCCSM29
K26 VCC29 VCCA_SM2 AF19 L9 VTT30 VCCSM30 AE20
H26 VCC30 VCCA_SM3 AF18 J9 VTT31 VCCSM31 AE19
2 0.1U_0402_16V4Z 2 0.01U_0402_16V7K 2 4.7U_0805_10V4Z 2 0.1U_0402_16V4Z 2 4.7U_0805_10V4Z 2 0.1U_0402_16V4Z
K25 VCC31 N8 VTT32 VCCSM32 AE18
J25 VCC32 VCC3G0 AE37 +1.5VS_PEG M8 VTT33 VCCSM33 AE17
K24 VCC33 VCC3G1 W37 N7 VTT34 VCCSM34 AE16
K23 VCC34 VCC3G2 U37 M7 VTT35 VCCSM35 AE15
C K22 VCC35 VCC3G3 R37 1500mA N6 VTT36 VCCSM36 AE14 VCCA_LVDS (Ball A35) VCCTX_LVDS(Ball A27,A28,B28) C
K21 VCC36 VCC3G4 N37 M6 VTT37 VCCSM37 AP13
W20 VCC37 VCC3G5 L37 A6 VTT38 VCCSM38 AN13
+2.5VS
U20 VCC38 VCC3G6 J37
C432 1
N5 VTT39 VCCSM39 AM13 VCCA_CRTDAC(Ball F19,E19)
T20 VCC39 M5 VTT40 VCCSM40 AL13
K20 0.47U_0603_16V4Z N4 AK13
VCC40 VTT41 VCCSM41
V19 VCC41 M4 VTT42 VCCSM42 AJ13
U19 VCC42 VCCA_3GPLL0 Y29 +1.5VS_3GPLL N3 VTT43 VCCSM43 AH13 1 1 1 1
2 C91 C133 C126 C103
K19 VCC43 VCCA_3GPLL1 Y28 M3 VTT44 VCCSM44 AG13
W18 VCC44 VCCA_3GPLL2 Y27 N2 VTT45 VCCSM45 AF13
V18 VCC45 M2 VTT46 VCCSM46 AE13
2 4.7U_0805_10V4Z 2 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z 2 0.022U_0402_16V7K
T18 VCC46 B2 VTT47 VCCSM47 AP12
K18 VCC47 VCCA_3GBG F37 0.15mA +2.5VS_3GBG V1 VTT48 VCCSM48 AN12
K17 VCC48 VSSA_3GBG G37 N1 VTT49 VCCSM49 AM12
1 M1 VTT50 VCCSM50 AL12
+1.5VS AC1 VCCD_HMPLL1 VCC_SYNC H20 +2.5VS G1 VTT51 VCCSM51 AK12 VCC_SYNC(Ball H20)
AC2 VCCD_HMPLL2 VCCSM52 AJ12
+1.5VS_DPLLA +1.5VS_DPLLA B23 F19 70mA C431 AH12
+1.5VS_DPLLB VCCA_DPLLA VCCA_CRTDAC0 0.47U_0603_16V4Z 2 VCCSM53
+1.5VS_DPLLB
+1.5VS_HPLL
C35 VCCA_DPLLB VCCA_CRTDAC1 E19 VCCSM54 AG12
+1.5VS VCCD_TVDAC (Ball D19)
+1.5VS_HPLL AA1 VCCA_HPLL VSSA_CRTDAC G19 1 VCCSM55 AF12
+1.5VS_MPLL +1.5VS_MPLL AA2 AE12 0.1U_0402_16V4Z 0.1U_0402_16V4Z
VCCA_MPLL VCCSM56
VCCSM57 AD11
C163 AC11
ALVISO_BGA1257 0.22U_0402_10V4Z 2 VCCSM58
VCCSM59 AB11 1 1 1 1 1 1
1 AB10 C199 C93 C104 C120 C122 C140 C134
VCCSM60 0.1U_0402_16V4Z C197
VCCSM61 AB9
VCCSM62 AP8 V1.8_DDR_CAP6 2 1 0.1U_0402_16V4Z
C131 AM1 V1.8_DDR_CAP4 2 1 4.7U_0805_10V4Z 2 2 2 2 2 2
B
Please Closed to U31-H20 +2.5VS 0.22U_0402_10V4Z 2 VCCSM63
VCCSM64 AE1 V1.8_DDR_CAP3 2 1
B
1 C182 0.1U_0402_16V4Z 0.022U_0402_16V7K 0.022U_0402_16V7K
1 1 0.1U_0402_16V4Z
C663+ C664 C665 ALVISO_BGA1257 VCCD_LVDS(Ball A25,B25,B26) VCCDQ_TVDAC (Ball H17)
150U_D2_6.3VM
2
TV@
2 2
0307 +1.5VS_DDRDLL R160 +1.5VS_PEG +1.05VS
0_0603_5% R153 950mA
@ 1000P_0402_50V7K +1.5VS_DDRDLL 1 2 +1.5VS +1.5VS_PEG 1 2 +1.5VS
0.1U_0402_16V4Z 1
1 1 1 1 1 1 1 0_0805_5% 1 1 1 1 1
+1.5VS_DPLLA L15 +1.5VS_DPLLB L16 C183 C181 C186 C146 C153 C141 C157 + C168 C165 C166 C158 C159 C132
60mA 60mA
CHB1608U301_0603 CHB1608U301_0603
+1.5VS_DPLLA 1 2 +1.5VS +1.5VS_DPLLB 1 2 +1.5VS 2 10U_1206_16V4Z
2 2 0.1U_0402_16V4Z 2 10U_1206_16V4Z 2 4.7U_0805_10V4Z
2 2 4.7U_0805_10V4Z 2 470U_D2_2.5VM2 2.2U_0603_6.3V6K
2 2 2.2U_0603_6.3V6K 2 2.2U_0603_6.3V6K 2 2.2U_0603_6.3V6K
1 1 1 1 1 1
C59 C70 C77 C73 C87 C80 @ 1000P_0402_50V7K @ 1000P_0402_50V7K @ 1000P_0402_50V7K
2 10U_1206_16V4Z
2 2 0.1U_0402_16V4Z 2 10U_1206_16V4Z
2 2 0.1U_0402_16V4Z
@ 1000P_0402_50V7K @ 1000P_0402_50V7K +1.5VS_3GPLL R159 L24 L17 +3VS_TVDAC VCCA_TVDAC VCCA_TVBG (Ball H18)
0.5_0603_1% CHB1608U301_0603 +2.5VS_3GBG CHB1608U301_0603
+1.5VS_3GPLL 1 2 +3GPLL 1 2 +1.5VS +3VS 1 2
+2.5VS_3GBG 1 2 +2.5VS
1 1 1 R123 0_0603_5% 1 1 1 1 1 1
C184 C171 1 1 C65 C74 C139 C123 C136 C130
+1.5VS_HPLL L31 +1.5VS_MPLL L21 C170 C128
60mA 60mA
CHB1608U301_0603 CHB1608U301_0603 C129
+1.5VS_HPLL +1.5VS_MPLL 2 10U_1206_16V4Z
2 2 0.1U_0402_16V4Z 0.1U_0402_16V4Z 2 10U_1206_16V4Z 2 2 2 1000P_0402_50V7K 2 0.1U_0402_16V4Z 2
A 1 2 +1.5VS 1 2 +1.5VS A
2 2
1 1 1 1 1 1 @ 1000P_0402_50V7K 1000P_0402_50V7K 0.1U_0402_16V4Z 0.022U_0402_16V7K
C478 C481 C477 C161 C167 C155 @ 1000P_0402_50V7K
120mA
2 10U_1206_16V4Z
2 2 0.1U_0402_16V4Z 2 10U_1206_16V4Z
2 2 0.1U_0402_16V4Z
Security Classification Compal Secret Data
@ 1000P_0402_50V7K @ 1000P_0402_50V7K 2005/03/08 2006/03/08 Title
Issued Date Deciphered Date
Alviso POWER (4/5)
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom EFL50 LA-2761 0.2
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Wednesday, April 20, 2005 Sheet 9 of 51
5 4 3 2 1
5 4 3 2 1
U31H
U31I U31J
+1.05VS L12 VTT_NCTF17 VCCSM_NCTF31 AB12 +1.8V
M12 VTT_NCTF16 VCCSM_NCTF30 AC12 Y1 VSS271 AL24 VSS267
N12 VTT_NCTF15 VCCSM_NCTF29 AD12 D2 VSS270 VSSALVDS B36 AN24 VSS266 VSS67 AC32
P12 VTT_NCTF14 VCCSM_NCTF28 AB13 G2 VSS269 A26 VSS265 VSS66 AD32
R12 VTT_NCTF13 VCCSM_NCTF27 AC13 J2 VSS268 VSS195 AA11 E26 VSS264 VSS65 AJ32
T12 VTT_NCTF12 VCCSM_NCTF26 AD13 L2 VSS260 VSS194 AF11 G26 VSS263 VSS64 AN32
U12 VTT_NCTF11 VCCSM_NCTF25 AC14 P2 VSS259 VSS193 AG11 J26 VSS262 VSS63 D33
D V12 VTT_NCTF10 VCCSM_NCTF24 AD14 T2 VSS258 VSS192 AJ11 B27 VSS261 VSS62 E33 D
W12 VTT_NCTF9 VCCSM_NCTF23 AC15 V2 VSS257 VSS191 AL11 E27 VSS129 VSS61 F33
L13 VTT_NCTF8 VCCSM_NCTF22 AD15 AD2 VSS256 VSS190 AN11 G27 VSS128 VSS60 G33
M13 VTT_NCTF7 VCCSM_NCTF21 AC16 AE2 VSS255 VSS189 B12 W27 VSS127 VSS59 H33
N13
P13
R13
T13
U13
VTT_NCTF6
VTT_NCTF5
VTT_NCTF4
VTT_NCTF3
VCCSM_NCTF20
VCCSM_NCTF19
VCCSM_NCTF18
VCCSM_NCTF17
AD16
AC17
AD17
AC18
AD18
AH2
AL2
AN2
A3
C3
VSS254
VSS253
VSS252
VSS251
VSS
VSS188
VSS187
VSS186
VSS185
D12
J12
A14
B14
F14
AA27
AB27
AF27
AG27
AJ27
VSS126
VSS125
VSS124
VSS123
VSS VSS58
VSS57
VSS56
VSS55
J33
K33
L33
M33
N33
VTT_NCTF2 VCCSM_NCTF16 VSS250 VSS184 VSS122 VSS54
V13 VTT_NCTF1 VCCSM_NCTF15 AC19 AA3 VSS249 VSS183 J14 AL27 VSS121 VSS53 P33
W13 VTT_NCTF0 VCCSM_NCTF14 AD19 AB3 VSS248 VSS182 K14 AN27 VSS120 VSS52 R33
VCCSM_NCTF13 AC20 AC3 VSS247 VSS181 AG14 E28 VSS119 VSS51 T33
VCCSM_NCTF12 AD20 AJ3 VSS246 VSS180 AJ14 W28 VSS118 VSS50 U33
Y12 VSS_NCTF68 VCCSM_NCTF11 AC21 C4 VSS245 VSS179 AL14 AA28 VSS117 VSS49 V33
AA12 VSS_NCTF67 VCCSM_NCTF10 AD21 H4 VSS244 VSS178 AN14 AB28 VSS116 VSS48 W33
Y13 VSS_NCTF66 VCCSM_NCTF9 AC22 L4 VSS243 VSS177 C15 AC28 VSS115 VSS47 AD33
AA13 VSS_NCTF65 VCCSM_NCTF8 AD22 P4 VSS242 VSS176 K15 A29 VSS114 VSS46 AF33
L14 VSS_NCTF64 VCCSM_NCTF7 AC23 U4 VSS241 VSS175 A16 D29 VSS113 VSS45 AL33
M14 VSS_NCTF63 VCCSM_NCTF6 AD23 Y4 VSS240 VSS174 D16 E29 VSS112 VSS44 C34
N14 VSS_NCTF62 VCCSM_NCTF5 AC24 AF4 VSS239 VSS173 H16 F29 VSS111 VSS43 AA34
P14 VSS_NCTF61 VCCSM_NCTF4 AD24 AN4 VSS238 VSS172 K16 G29 VSS110 VSS42 AB34
R14 VSS_NCTF60 VCCSM_NCTF3 AC25 E5 VSS237 VSS171 AL16 H29 VSS109 VSS41 AC34
T14 VSS_NCTF59 VCCSM_NCTF2 AD25 W5 VSS236 VSS170 C17 L29 VSS108 VSS40 AD34
U14 VSS_NCTF58 VCCSM_NCTF1 AC26 AL5 VSS235 VSS169 G17 P29 VSS107 VSS39 AH34
V14 VSS_NCTF57 VCCSM_NCTF0 AD26 AP5 VSS234 VSS168 AF17 U29 VSS106 VSS38 AN34
W14 VSS_NCTF56 B6 VSS233 VSS167 AJ17 V29 VSS105 VSS37 B35
Y14 VSS_NCTF55 VCC_NCTF78 L17 +1.05VS J6 VSS232 VSS166 AN17 W29 VSS104 VSS36 D35
AA14 VSS_NCTF54 VCC_NCTF77 M17 L6 VSS231 VSS165 A18 AA29 VSS103 VSS35 E35
AB14 VSS_NCTF53 VCC_NCTF76 N17 P6 VSS230 VSS164 B18 AD29 VSS102 VSS34 F35
C L15 P17 T6 U18 AG29 G35 C
VSS_NCTF52 VCC_NCTF75 VSS229 VSS163 VSS101 VSS33
M15 T17 AA6 AL18 AJ29 H35
NCTF
ALVISO_BGA1257
Alviso POWER (5/5)
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS B EFL50 LA-2761 0.2
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Wednesday, April 20, 2005 Sheet 10 of 51
5 4 3 2 1
5 4 3 2 1
@680P_0402_50V7K
@680P_0402_50V7K
DDR_A_DM[0..7]
7 DDR_A_DM[0..7]
1
C658
C659
0.1U_0402_16V4Z
JP31 R228
1
1
1 2 C273 DDR_A_DQS[0..7] Layout Note:
VREF VSS DDR_A_D4 7 DDR_A_DQS[0..7]
3 4 1 1
DDR_A_D0 5
VSS DQ4
6 DDR_A_D5 1K_0402_1% DDR_A_MA[0..13] Place near DIMM
7 DDR_A_MA[0..13]
2
2
DQ0 DQ5
C272
4.7U_0805_10V4Z
DDR_A_D1 7 8
2
DQ1 VSS DDR_A_DM0 DDR_A_DQS#[0..7]
9 VSS DM0 10 7 DDR_A_DQS#[0..7]
DDR_A_DQS#0 2 2
11 DQS0# VSS 12
DDR_A_DQS0 13 14 DDR_A_D6
DQS0 DQ6 DDR_A_D7
15 VSS DQ7 16
1
DDR_A_D2 17 18 R226 +1.8V
+1.8V +1.8V DDR_A_D3 DQ2 VSS DDR_A_D12
D 19 DQ3 DQ12 20 D
21 22 DDR_A_D13
VSS DQ13
@680P_0402_50V7K
@680P_0402_50V7K
DDR_A_D8 23 24 1K_0402_1%
DQ8 VSS
C660
C661
DDR_A_D9 25 26 DDR_A_DM1
2
DQ9 DM1
1
27 VSS VSS 28 1 1 1 1 1
DDR_A_DQS#1 29 30 M_CLK_DDR0 C310 C312 C313 C311 C314
DQS1# CK0 M_CLK_DDR0 6
DDR_A_DQS1 31 32 M_CLK_DDR#0
M_CLK_DDR#0 6
2
DQS1 CK0#
4.7U_0805_10V4Z
4.7U_0805_10V4Z
4.7U_0805_10V4Z
4.7U_0805_10V4Z
4.7U_0805_10V4Z
33 VSS VSS 34
DDR_A_D10 DDR_A_D14 2 2 2 2 2
35 DQ10 DQ14 36
DDR_A_D11 37 38 DDR_A_D15 +1.8V
DQ11 DQ15 @ @ @
39 VSS VSS 40
10U_0805_10V4Z 10U_0805_10V4Z 10U_0805_10V4Z
+1.8V
1 1 1 1 1 1 1
41 42 C292 C293 C294 C295 C296 C297 C298
VSS VSS
@680P_0402_50V7K
DDR_A_D16 43 44 DDR_A_D20
DQ16 DQ20
C662
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
DDR_A_D17 45 46 DDR_A_D21
DQ17 DQ21
1
2 2 2 2 2 2 2
47 VSS VSS 48 1 1 1 1
C260
C277
C276
C275
DDR_A_DQS#2 49 50 10U_0805_10V4Z 10U_0805_10V4Z 10U_0805_10V4Z 10U_0805_10V4Z
DDR_A_DQS2 DQS2# NC DDR_A_DM2 @ @ @ @
51 52
2
DQS2 DM2
53 VSS VSS 54
DDR_A_D18 DDR_A_D22 2 2 2 2
55 DQ18 DQ22 56
DDR_A_D19 57 58 DDR_A_D23
DQ19 DQ23
59 VSS VSS 60
DDR_A_D24 61 62 DDR_A_D28
DDR_A_D25 DQ24 DQ28 DDR_A_D29
63 64
0304 EMI DDR_A_DM3
65
DQ25
VSS
DQ29
VSS 66
DDR_A_DQS#3
67 DM3 DQS3# 68
69 70 DDR_A_DQS3
NC DQS3 +0.9VS
71 VSS VSS 72
DDR_A_D26 73 74 DDR_A_D30
DDR_A_D27 DQ26 DQ30 DDR_A_D31
75 DQ27 DQ31 76
77 VSS VSS 78
C C
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
DDR_CKE0_DIMMA 79 80 DDR_CKE1_DIMMA
6 DDR_CKE0_DIMMA CKE0 NC/CKE1 DDR_CKE1_DIMMA 6
81 VDD VDD 82
83 NC NC/A15 84 1 1 1 1 1 1 1 1 1 1 1 1 1
DDR_A_BS#2 85 86
7 DDR_A_BS#2 BA2 NC/A14
87 VDD VDD 88
DDR_A_MA12 89 90 DDR_A_MA11
DDR_A_MA9 A12 A11 DDR_A_MA7 2 2 2 2 2 2 2 2 2 2 2 2 2
91 A9 A7 92
C303
C302
C301
C300
C299
C321
C317
C316
C305
C304
C318
C319
C320
DDR_A_MA8 93 94 DDR_A_MA6
A8 A6
95 VDD VDD 96
DDR_A_MA5 97 98 DDR_A_MA4
DDR_A_MA3 A5 A4 DDR_A_MA2
99 A3 A2 100
DDR_A_MA1 101 102 DDR_A_MA0 Layout Note:
A1 A0
103 104
DDR_A_MA10 105
VDD VDD
106 DDR_A_BS#1 Place one cap close to every 2 pullup
A10/AP BA1 DDR_A_BS#1 7
DDR_A_BS#0 107 108 DDR_A_RAS# resistors terminated to +0.9VS
7 DDR_A_BS#0 BA0 RAS# DDR_A_RAS# 7
DDR_A_WE# 109 110 DDR_CS0_DIMMA#
7 DDR_A_WE# WE# S0# DDR_CS0_DIMMA# 6
111 VDD VDD 112 Layout Note:
DDR_A_CAS# 113 114 M_ODT0 Place these resistor
7 DDR_A_CAS# CAS# ODT0 M_ODT0 6
DDR_CS1_DIMMA# 115 116 DDR_A_MA13
6 DDR_CS1_DIMMA# NC/S1# NC/A13 closely DIMM0,all
117 VDD VDD 118
M_ODT1 119 120 trace length<750 mil
6 M_ODT1 NC/ODT1 NC
121 VSS VSS 122
DDR_A_D32 123 124 DDR_A_D36 +0.9VS
DDR_A_D33 DQ32 DQ36 DDR_A_D37
125 DQ33 DQ37 126
127 128 R269 1 2 56_0402_5% DDR_A_MA0
DDR_A_DQS#4 VSS VSS DDR_A_DM4 R254 1 DDR_A_MA1
129 DQS4# DM4 130 2 56_0402_5%
DDR_A_DQS4 131 132 DDR_A_MA2 R264 1 2 56_0402_5%
DQS4 VSS DDR_A_D38 DDR_A_MA4 R263 1 DDR_A_MA3
133 VSS DQ38 134 2 56_0402_5% R253 1 2 56_0402_5%
DDR_A_D34 135 136 DDR_A_D39 R268 1 2 56_0402_5% DDR_A_MA6
DDR_A_D35 DQ34 DQ39 DDR_A_MA5 R247 1
137 DQ35 VSS 138 2 56_0402_5%
139 140 DDR_A_D44 DDR_A_MA8 R246 1 2 56_0402_5% R267 1 2 56_0402_5% DDR_A_MA7
DDR_A_D40 VSS DQ44 DDR_A_D45 R252 1 DDR_A_MA9
B 141 DQ40 DQ45 142 2 56_0402_5% B
DDR_A_D41 143 144 DDR_A_MA10 R248 1 2 56_0402_5%
DQ41 VSS DDR_A_DQS#5 DDR_A_MA11 R262 1 DDR_A_MA12
145 VSS DQS5# 146 2 56_0402_5% R251 1 2 56_0402_5%
DDR_A_DM5 147 148 DDR_A_DQS5 R273 1 2 56_0402_5% DDR_A_MA13
DM5 DQS5 DDR_A_BS#0 R249 1
149 VSS VSS 150 2 56_0402_5% Layout Note:
DDR_A_D42 151 152 DDR_A_D46 DDR_A_BS#2 R245 1 2 56_0402_5% R270 1 2 56_0402_5% DDR_A_BS#1 Place these resistor
DDR_A_D43 DQ42 DQ46 DDR_A_D47 R255 1 DDR_A_WE#
153 DQ43 DQ47 154 2 56_0402_5% closely DIMM0,all
155 156 DDR_A_RAS# R265 1 2 56_0402_5%
DDR_A_D48 VSS VSS DDR_A_D52 DDR_CKE0_DIMMA R244 1 DDR_A_CAS# trace length
157 DQ48 DQ52 158 2 56_0402_5% R256 1 2 56_0402_5%
DDR_A_D49 159 160 DDR_A_D53 R271 1 2 56_0402_5% DDR_CS0_DIMMA# Max=1.3"
DQ49 DQ53 DDR_CKE1_DIMMA R261 1
161 VSS VSS 162 2 56_0402_5%
163 164 M_CLK_DDR1 M_ODT1 R250 1 2 56_0402_5% R257 1 2 56_0402_5% DDR_CS1_DIMMA#
NC,TEST CK1 M_CLK_DDR1 6
165 166 M_CLK_DDR#1 R272 1 2 56_0402_5% M_ODT0
VSS CK1# M_CLK_DDR#1 6
DDR_A_DQS#6 167 168
DDR_A_DQS6 DQS6# VSS DDR_A_DM6
169 DQS6 DM6 170
171 VSS VSS 172
DDR_A_D50 173 174 DDR_A_D54
DDR_A_D51 DQ50 DQ54 DDR_A_D55
175 DQ51 DQ55 176
177 VSS VSS 178
DDR_A_D56 179 180 DDR_A_D60
DDR_A_D57 DQ56 DQ60 DDR_A_D61
181 DQ57 DQ61 182
183 VSS VSS 184
DDR_A_DM7 185 186 DDR_A_DQS#7
DM7 DQS7# DDR_A_DQS7
187 VSS DQS7 188
DDR_A_D58 189 190
DDR_A_D59 DQ58 VSS DDR_A_D62
191 DQ59 DQ62 192
193 194 DDR_A_D63
D_CK_SDATA VSS DQ63
12,13,38 D_CK_SDATA 195 SDA VSS 196
D_CK_SCLK 197 198 R242 1 2 10K_0402_5%
12,13,38 D_CK_SCLK SCL SAO
+3VS 199 200 R243 1 2 10K_0402_5%
VDDSPD SA1
A 1 2 A
C278 P-TWO_A5640C-A0G16-N
0.1U_0402_16V4Z
Address: 1001 000X b
+1.8V
+1.8V +1.8V +DIMM_VREF
DDR_B_D[0..63]
7 DDR_B_D[0..63]
JP26 DDR_B_DM[0..7]
7 DDR_B_DM[0..7]
0.1U_0402_16V4Z
1 VREF VSS 2 1 1 1 1 1
3 4 DDR_B_D4 DDR_B_DQS[0..7] C323 C325 C322 C324 C326
DDR_B_D0 VSS DQ4 DDR_B_D5 7 DDR_B_DQS[0..7]
5 DQ0 DQ5 6 1 1
4.7U_0805_10V4Z
4.7U_0805_10V4Z
4.7U_0805_10V4Z
4.7U_0805_10V4Z
4.7U_0805_10V4Z
DDR_B_D1 7 8 C252 DDR_B_MA[0..13]
DQ1 VSS 7 DDR_B_MA[0..13] 2 2 2 2 2
C251
9 10 DDR_B_DM0
VSS DM0
4.7U_0805_10V4Z
DDR_B_DQS#0 11 12 DDR_B_DQS#[0..7]
DDR_B_DQS0 DQS0# VSS DDR_B_D6 2 2 7 DDR_B_DQS#[0..7]
13 DQS0 DQ6 14
15 16 DDR_B_D7
DDR_B_D2 VSS DQ7
1 17 DQ2 VSS 18 1
DDR_B_D3 19 20 DDR_B_D12
DQ3 DQ12 DDR_B_D13
21 VSS DQ13 22
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
DDR_B_D8 23 24 Layout Note:
DDR_B_D9 DQ8 VSS DDR_B_DM1
25 26 1 1 1 1 1
DQ9 DM1 Place near DIMM
C262
C261
C263
C264
C265
27 VSS VSS 28
DDR_B_DQS#1 29 30 M_CLK_DDR3 +1.8V
DQS1# CK0 M_CLK_DDR3 6
DDR_B_DQS1 31 32 M_CLK_DDR#3
DQS1 CK0# M_CLK_DDR#3 6 2 2 2 2 2
33 VSS VSS 34
DDR_B_D10 35 36 DDR_B_D14 1 1 1 1
DDR_B_D11 DQ10 DQ14 DDR_B_D15
37 DQ11 DQ15 38
39 40 C289 C288 C286 C287
VSS VSS 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
2 2 2 2
41 VSS VSS 42
DDR_B_D16 43 44 DDR_B_D20
DDR_B_D17 DQ16 DQ20 DDR_B_D21 +1.8V
45 DQ17 DQ21 46
47 VSS VSS 48
DDR_B_DQS#2 49 50
DDR_B_DQS2 DQS2# NC DDR_B_DM2
51 DQS2 DM2 52 1 1 1 1 1 1 1 1 1
53 VSS VSS 54
DDR_B_D18 55 56 DDR_B_D22 C250 C249 C248 C247 C246 C245 C274 C291 C290
DDR_B_D19 DQ18 DQ22 DDR_B_D23 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
57 DQ19 DQ23 58
2 2 2 2 2 2 2 2 2
59 VSS VSS 60
DDR_B_D24 61 62 DDR_B_D28
DDR_B_D25 DQ24 DQ28 DDR_B_D29 0.1U_0402_16V4Z
63 DQ25 DQ29 64
65 VSS VSS 66
DDR_B_DM3 67 68 DDR_B_DQS#3
DM3 DQS3# DDR_B_DQS3
69 NC DQS3 70
71 VSS VSS 72
DDR_B_D26 73 74 DDR_B_D30
DDR_B_D27 DQ26 DQ30 DDR_B_D31 +0.9VS
75 DQ27 DQ31 76
2 2
77 VSS VSS 78
DDR_CKE2_DIMMB 79 80 DDR_CKE3_DIMMB
6 DDR_CKE2_DIMMB CKE0 NC/CKE1 DDR_CKE3_DIMMB 6
81 VDD VDD 82
83 NC NC/A15 84
+1.8V
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
DDR_B_BS#2 85 86
7 DDR_B_BS#2 BA2 NC/A14
87 VDD VDD 88
DDR_B_MA12 89 90 DDR_B_MA11 1 1 1 1 1 1 1 1 1 1 1 1 1
DDR_B_MA9 A12 A11 DDR_B_MA7
91 A9 A7 92 1 1
DDR_B_MA8 93 94 DDR_B_MA6
A8 A6 + +
95 VDD VDD 96
DDR_B_MA5 DDR_B_MA4 2 2 2 2 2 2 2 2 2 2 2 2 2 C328 C306
97 A5 A4 98
C282
C285
C284
C259
C283
C253
C254
C255
C256
C280
C281
C257
C258
DDR_B_MA3 99 100 DDR_B_MA2 150U_D2_6.3VM 150U_D2_6.3VM
DDR_B_MA1 A3 A2 DDR_B_MA0 2 2
101 A1 A0 102
103 VDD VDD 104
DDR_B_MA10 105 106 DDR_B_BS#1
A10/AP BA1 DDR_B_BS#1 7
DDR_B_BS#0 107 108 DDR_B_RAS# Layout Note:
7 DDR_B_BS#0 BA0 RAS# DDR_B_RAS# 7
DDR_B_WE# 109 110 DDR_CS2_DIMMB#
7 DDR_B_WE# WE# S0# DDR_CS2_DIMMB# 6 Place one cap close to every 2 pullup
111 VDD VDD 112
DDR_B_CAS# 113 114 M_ODT2 resistors terminated to +0.9VS
7 DDR_B_CAS# CAS# ODT0 M_ODT2 6
DDR_CS3_DIMMB# 115 116 DDR_B_MA13
6 DDR_CS3_DIMMB# NC/S1# NC/A13
117 VDD VDD 118
M_ODT3 119 120
6 M_ODT3 NC/ODT1 NC
121 VSS VSS 122
DDR_B_D32 123 124 DDR_B_D36 +0.9VS
DDR_B_D33 DQ32 DQ36 DDR_B_D37
125 DQ33 DQ37 126 Layout Note:
127 VSS VSS 128 Place these resistor
DDR_B_DQS#4 129 130 DDR_B_DM4 DDR_B_BS#2 R203 1 2 56_0402_5% R211 1 2 56_0402_5% DDR_B_MA9
DDR_B_DQS4 DQS4# DM4 DDR_CKE2_DIMMB R202 1 DDR_B_MA12 closely DIMM0,all
131 DQS4 VSS 132 2 56_0402_5% R210 1 2 56_0402_5%
133 134 DDR_B_D38 trace length<750 mil
DDR_B_D34 VSS DQ38 DDR_B_D39
135 DQ34 DQ39 136
DDR_B_D35 137 138 DDR_B_MA5 R205 1 2 56_0402_5% R213 1 2 56_0402_5% DDR_B_MA1
DQ35 VSS DDR_B_D44 DDR_B_MA8 R204 1 DDR_B_MA3
3 139 VSS DQ44 140 2 56_0402_5% R212 1 2 56_0402_5% 3
DDR_B_D40 141 142 DDR_B_D45
DDR_B_D41 DQ40 DQ45
143 DQ41 VSS 144
145 146 DDR_B_DQS#5 DDR_B_BS#0 R207 1 2 56_0402_5% R215 1 2 56_0402_5% DDR_B_CAS#
DDR_B_DM5 VSS DQS5# DDR_B_DQS5 DDR_B_MA10 R206 1 DDR_B_WE#
147 DM5 DQS5 148 2 56_0402_5% R214 1 2 56_0402_5%
149 VSS VSS 150
DDR_B_D42 151 152 DDR_B_D46
DDR_B_D43 DQ42 DQ46 DDR_B_D47 M_ODT3 R209 1 DDR_CKE3_DIMMB
153 DQ43 DQ47 154 2 56_0402_5% R233 1 2 56_0402_5%
155 156 DDR_CS3_DIMMB# R208 1 2 56_0402_5% R234 1 2 56_0402_5% DDR_B_MA11
DDR_B_D48 VSS VSS DDR_B_D52
157 DQ48 DQ52 158 Layout Note:
DDR_B_D49 159 160 DDR_B_D53 Place these resistor
DQ49 DQ53 DDR_B_MA7 R229 1 DDR_B_MA4
161 VSS VSS 162 2 56_0402_5% R235 1 2 56_0402_5% closely DIMM0,all
163 164 M_CLK_DDR4 DDR_B_MA6 R230 1 2 56_0402_5% R236 1 2 56_0402_5% DDR_B_MA2
NC,TEST CK1 M_CLK_DDR4 6 trace length
165 166 M_CLK_DDR#4
VSS CK1# M_CLK_DDR#4 6
DDR_B_DQS#6 167 168 Max=1.3"
DDR_B_DQS6 DQS6# VSS DDR_B_DM6 R237 1 DDR_B_MA0
169 DQS6 DM6 170 2 56_0402_5%
171 172 R238 1 2 56_0402_5% DDR_B_BS#1
DDR_B_D50 VSS VSS DDR_B_D54
173 DQ50 DQ54 174
DDR_B_D51 175 176 DDR_B_D55
DQ51 DQ55
177 VSS VSS 178
DDR_B_D56 179 180 DDR_B_D60
DDR_B_D57 DQ56 DQ60 DDR_B_D61 DDR_B_RAS# R231 1 M_ODT2
181 DQ57 DQ61 182 2 56_0402_5% R239 1 2 56_0402_5%
183 184 DDR_CS2_DIMMB# R232 1 2 56_0402_5% R240 1 2 56_0402_5% DDR_B_MA13
DDR_B_DM7 VSS VSS DDR_B_DQS#7
185 DM7 DQS7# 186
187 188 DDR_B_DQS7
DDR_B_D58 VSS DQS7
189 DQ58 VSS 190
DDR_B_D59 191 192 DDR_B_D62
DQ59 DQ62 DDR_B_D63
193 VSS DQ63 194
D_CK_SDATA 195 196
11,13,38 D_CK_SDATA SDA VSS
D_CK_SCLK 197 198 R222 1 2 10K_0402_5%
11,13,38 D_CK_SCLK SCL SAO
+3VS 199 200 R223 1 2 10K_0402_5% +3VS
VDDSPD SA1
4 4
1 2
C244 2S@ SUPER_AKH-110A-092-3
0.1U_0402_16V4Z
Address: 1001 010X b
Security Classification Compal Secret Data
Issued Date 2005/03/08 Deciphered Date 2006/03/08 Title
DDRII-SODIMM SLOT1
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number R ev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom EFL50 LA-2761 0.2
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Wednesday, April 20, 2005 Sheet 12 of 51
A B C D E
A B C D E F G H
L32
KC FBM-L11-201209-221LMAT_0805 40mil
+CLK_VDD1
Clock Generator
+CLK_VDD48 +CLK_VDDREF +3VS 1 2 +CLK_VDD1
FSC FSB FSA CPU SRC PCI 1
C541
1
C537
1 1 1 1 1 1
PCIEXT1 CLK_PCIE_SATA 17
Q33 CLK_EZ_CLK2# 1 2
2N7002_SOT23 20 CLK_SRC1# R465 1 2 33_0402_5% CLK_PCIE_SATA# R443 49.9_0402_1%
PCIEXC1 CLK_PCIE_SATA# 17
13 GND_0
+3VS
R502 29 17 CLK_SRC0 R479 1 2 33_0402_5% CLK_DREF_SSC
GND_1 LCDCLK_SS/PCIEX0T CLK_DREF_SSC 6
4.7K_0402_5%
2
DOTT_96MHz CLK_DREF_96M 6
Q34 51 15 CLK_DOT# R481 1 2 33_0402_5% CLK_DREF_96M#
GND_4 DOTC_96MHz CLK_DREF_96M# 6
2N7002_SOT23
6 GND_5
+1.05VS
+3VS 1 2 VGATE
VGATE 6,18,46
R488 10K_0402_5%
2
2
R522
G
@ 1K_0402_5%
+1.05VS 10 VTT_POWERGD# 1 3
R519 R518 VTT_PWRGD#/PD
S
4.7K_0402_5% 0_0402_5% 52 CLK_REF 1 2 CLK_14M_SIO Q35
CLK_14M_SIO 32
1
REF0
2
CLKSEL1 1 2 1 2 MCH_CLKSEL1
MCH_CLKSEL1 6
1 2 2 1 CPU_BSEL1
CPU_BSEL1 5
Compal Electronics, Inc.
R521 R509 Title
@ 0_0402_5% 0_0402_5% Clock Generator
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
EFL50 LA-2761 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Wednesday, April 20, 2005 Sheet 13 of 51
A B C D E F G H
A B C D E
D18
+R_CRT_VCC
W=40mils
F1
+CRT_VCC
W=40mils
1
CRT_RQ 1 2 CRT_R 2 1 1 2
R375 ND@ 0_0402_5% +5VS
CRT_GQ 1 2 CRT_G RB411D_SOT23 1.1A_6VDC_FUSE
R376 ND@ 0_0402_5% 1
CRT_BQ 1 2 CRT_B 1 2 0.1U_0402_16V4Z D19
R389 ND@ 0_0402_5% C22 @ DAN217_SC59 C398
3
U4 0.1U_0402_16V4Z
2
VCC 16 +3VS
DOCKIN# 1
21,26,33,38 DOCKIN# SEL
1 15 2 D_CRT_R 1
OE# 1B1 D_CRT_G D_CRT_R 38
2B1 5 D_CRT_G 38
11 D_CRT_B
CRT_RQ 3B1 D_CRT_B 38 JP3
4 1A 4B1 14
VGA_CRT_R R40 1 2 PM@ 0_0402_5% CRT_GQ 7 CRT_R 1 2 CRT_R_L 6
GMCH_CRT_R CRT_BQ 2A L5
1 2 9 3A 11
R39 GM@ 0_0402_5% 12 3 FCM2012C-800_0805 1
VGA_CRT_G R37 4A 1B2
1 2 PM@ 0_0402_5%
2B2 6 CRT_G 1 2 CRT_G_L 7
GMCH_CRT_G 1 2 10 L4 12
R38 GM@ 0_0402_5% 3B2 FCM2012C-800_0805
4B2 13 2
VGA_CRT_B R59 1 2 PM@ 0_0402_5% 8 CRT_B 1 2 CRT_B_L 8
GMCH_CRT_B GND L2
1 2 13
R60 GM@ 0_0402_5% W D@ FSAV330MTC_TSSOP16 FCM2012C-800_0805 3
1
1 1 1 1 1 1 DDC_MD2 9
R32 R30 R25 C5 C10 C14 C11 14
C16 C8 4
8P_0402_50V8K 8P_0402_50V8K 10
VGA_CRT_R 150_0402_5% 150_0402_5% 150_0402_5% 2 8P_0402_50V8K 2 8P_0402_50V8K 2 2 2 2
15
15 VGA_CRT_R
2
GMCH_CRT_R 8P_0402_50V8K C4 5
8 GMCH_CRT_R
10P for GMCH 8P_0402_50V8K
VGA_CRT_G 100P_0402_25V8K SUYIN_070112FR015S2227U
15 VGA_CRT_G +CRT_VCC
GMCH_CRT_G 1 2 H SYNC_L (CL55)
8 GMCH_CRT_G
L3 FCM1608C-121T_0603
VGA_CRT_B 1 2 2 1 D_DDC_DATA
15 VGA_CRT_B
GMCH_CRT_B C399 0.1U_0402_16V4Z R370 10K_0402_5% 1 2 VSYNC_L
8 GMCH_CRT_B
L1 FCM1608C-121T_0603 1
5
1
1 1
P
OE#
VGA_CRT_HSYNC 1 2 CRT_HSYNC 2 4 D_CRT_HSYNC C6
15 VGA_CRT_HSYNC A Y
2 R373 PM@ 0_0402_5% C9 C13 2 2
G
GMCH_CRT_HSYNC 1 2 U27 10P_0402_50V8J 10P_0402_50V8J 68P_0402_50V8K D_DDC_CLK
8 GMCH_CRT_HSYNC 2 2
R372 GM@ 39_0402_5% SN74AHCT1G125GW_SOT353-5
3
+CRT_VCC 33P for GMCH 1
C3
1 2 68P_0402_50V8K
C400 0.1U_0402_16V4Z 2
D_CRT_HSYNC 38
5
1
P
OE#
VGA_CRT_VSYNC 1 2 CRT_VSYNC 2 4 D_CRT_VSYNC
15 VGA_CRT_VSYNC A Y D_CRT_VSYNC 38
R377 PM@ 0_0402_5%
G
GMCH_CRT_VSYNC 1 2 U28
8 GMCH_CRT_VSYNC
R378 GM@ 39_0402_5% SN74AHCT1G125GW_SOT353-5
3
3 +CRT_VCC 3
R43 1 2 PM@ 0_0402_5% +3VS
1
R371 R41 GM@ 0_0402_5%
4.7K_0402_5% R374 2 1 GMCH_CRT_DATA
GMCH_CRT_DATA 8
2
G
4.7K_0402_5%
D_DDC_DATA 1 3 VGA_DDC_DATA
38 D_DDC_DATA VGA_DDC_DATA 15
S
Q3
2
2N7002_SOT23
G
D_DDC_CLK 1 3 VGA_DDC_CLK
38 D_DDC_CLK VGA_DDC_CLK 15
S
Q4
2N7002_SOT23 2 1 GMCH_CRT_CLK
R47 GMCH_CRT_CLK 8
GM@ 0_0402_5%
4 4
2005/01/24
D
VGA BOARD Conn. D
+3V JP22
+LCDVDD VGA_CRT_R
14 VGA_CRT_R 1 2 B+
VGA_CRT_G
14 VGA_CRT_G 3 4
VGA_CRT_B
14 VGA_CRT_B 5 6
1
2
VGA_CRT_VSYNC
14 VGA_CRT_VSYNC 7 8
R63 VGA_CRT_HSYNC
+3VS 14 VGA_CRT_HSYNC 9 10
R61
1K_0402_5% PCIE_MTX_C_GRX_P0 11 12 VGA_TV_LUMA
GM@ 300_0603_1% VGA_TV_LUMA 21
PCIE_MTX_C_GRX_N0 13 14 VGA_TV_CRMA
W=60mils VGA_TV_CRMA 21
1 2
15 16 VGA_TV_COMPS
R624 17 18 VGA_TV_COMPS 21
3
D S
PCIE_MTX_C_GRX_P1
Q7
G
Q6 PCIE_MTX_C_GRX_N1 19 20 PCEI_GTX_C_MRX_P0
2 2 1 2 21 22
GM@ 2N7002_SOT23 G GM@ SI2301BDS_SOT23 PCEI_GTX_C_MRX_N0
PCIE_MTX_C_GRX_P2 23 24
S 1
3
100K_0402_5% 25 26
2
+LCDVDD PCIE_MTX_C_GRX_N2 PCEI_GTX_C_MRX_P1
GM@ D W=60mils 27 28 PCEI_GTX_C_MRX_N1
1
R65 C29 +LCDVDD PCIE_MTX_C_GRX_P3 29 30
2 PCIE_MTX_C_GRX_N3 31 32 PCEI_GTX_C_MRX_P2
33 34
1
PCIE_MTX_C_GRX_N6 49 50 PCEI_GTX_C_MRX_P5
51 52 PCEI_GTX_C_MRX_N5
PCIE_MTX_C_GRX_P7 53 54
PCIE_MTX_C_GRX_N7 55 56 PCEI_GTX_C_MRX_P6
57 58 PCEI_GTX_C_MRX_N6
PCIE_MTX_C_GRX_P8 59 60
+3VS PCIE_MTX_C_GRX_N8 61 62 PCEI_GTX_C_MRX_P7
+3VS 63 64 PCEI_GTX_C_MRX_N7
PCIE_MTX_C_GRX_P9 65 66
67 68
1
PCIE_MTX_C_GRX_N9 PCEI_GTX_C_MRX_P8
R57 69 70 PCEI_GTX_C_MRX_N8
1 71 72
PCIE_MTX_C_GRX_P10
C25 4.7K_0402_5% PCIE_MTX_C_GRX_N10 73 74 PCEI_GTX_C_MRX_P9
@ 0.1U_0402_16V4Z D3 75 76 PCEI_GTX_C_MRX_N9
2
2 BKOFF# 77 78
33 BKOFF# 1 2 RB751V_SOD323 DISPOFF# PCIE_MTX_C_GRX_P11
79 80
PCIE_MTX_C_GRX_N11 PCEI_GTX_C_MRX_P10
81 82 PCEI_GTX_C_MRX_N10
PCIE_MTX_C_GRX_P12 83 84
PCIE_MTX_C_GRX_N12 85 86 PCEI_GTX_C_MRX_P11
87 88 PCEI_GTX_C_MRX_N11
INVT_PWM PCIE_MTX_C_GRX_P13 89 90
PCIE_MTX_C_GRX_N13 91 92 PCEI_GTX_C_MRX_P12
93 94
1
1 PCEI_GTX_C_MRX_N12
D5 PCIE_MTX_C_GRX_P14 95 96
C33 PCIE_MTX_C_GRX_N14 97 98 PCEI_GTX_C_MRX_P13
@ 1N4148_SOT23 @ 1U_0603_10V4Z GMCH_ENBKL ENBKL 99 100 PCEI_GTX_C_MRX_N13
8,33 GMCH_ENBKL 1 2 101 102
2 R86 GM@ 0_0402_5% PCIE_MTX_C_GRX_P15
2
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
VGA / LCD CONN.
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
EFL50 LA-2761 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Wednesday, April 20, 2005 Sheet 15 of 51
5 4 3 2 1
5 4 3 2 1
RP14
1 8 PCI_SERR#
+3VS
2 7 PCI_TRDY#
3 6 PCI_FRAME# U13B
22,24,25,27,28 PCI_AD[0..31]
D 4 5 PCI_STOP# PCI_AD0 E2 L5 PCI_REQ#0 D
AD[0] REQ[0]# PCI_REQ#0 24
PCI_AD1 PCI_GNT#0 Internal Pull-up.
8.2K_1206_8P4R_5% PCI_AD2
E5
C2
AD[1] PCI GNT[0]# C1
B5 PCI_REQ#1
PCI_GNT#0 24
AD[2] REQ[1]# PCI_REQ#1 27,28 Sample high destination is LPC.
PCI_AD3 F5 B6 PCI_GNT#1
AD[3] GNT[1]# PCI_GNT#1 27,28
PCI_AD4 F3 M5 PCI_REQ#2
AD[4] REQ[2]# PCI_REQ#2 22
PCI_AD5 E9 F1 PCI_GNT#2 PCI_GNT#5
AD[5] GNT[2]# PCI_GNT#2 22
RP11 PCI_AD6 F2 B8 PCI_REQ#3
AD[6] REQ[3]# PCI_REQ#3 25
1 8 PCI_PLOCK# PCI_AD7 D6 C8 PCI_GNT#3
+3VS AD[7] GNT[3]# PCI_GNT#3 25
1
2 7 P CI_IRDY# PCI_AD8 E6 F7 PCI_REQ#4
PCI_PERR# PCI_AD9 AD[8] REQ[4]#/GPI[40] R154
3 6 D3 AD[9] GNT[4]#/GPO[48] E7
4 5 PCI_DEVSEL# PCI_AD10 A2 E8 D_USB_SMI#1 @ 0_0402_5%
AD[10] REQ[5]#/GPI[1] D_USB_SMI#1 38
PCI_AD11 D2 F6 PCI_GNT#5
8.2K_1206_8P4R_5% PCI_AD12 AD[11] GNT[5]#/GPO[17] D_USB_SMI#2
D5 B7 D_USB_SMI#2 38
2
PCI_AD13 AD[12] REQ[6]#/GPI[0] PCI_GNT#6
H3 AD[13] GNT[6]#/GPO[16] D8
PCI_AD14 B4
PCI_AD15 AD[14] PCI_CBE#0
J5 AD[15] C/BE[0]# J6 PCI_C/BE#0 22,24,25,27,28
RP15 PCI_AD16 K2 H6 PCI_CBE#1 PCI_C/BE#1 22,24,25,27,28
PCI_PIRQD# PCI_AD17 AD[16] C/BE[1]# PCI_CBE#2
+3VS 1 8 K5 AD[17] C/BE[2]# G4 PCI_C/BE#2 22,24,25,27,28
2 7 PCI_PIRQB# PCI_AD18 D4 G2 PCI_CBE#3
AD[18] C/BE[3]# PCI_C/BE#3 22,24,25,27,28
3 6 PCI_PIRQC# PCI_AD19 L6
PCI_PIRQA# PCI_AD20 AD[19] P CI_IRDY#
4 5 G3 AD[20] IRDY# A3 PCI_IRDY# 22,24,25,27,28
PCI_AD21 H4 E1 PCI_PAR
8.2K_1206_8P4R_5% PCI_AD22 AD[21] PAR PCI_RST# PCI_PAR 22,24,25,27,28
H2 AD[22] PCIRST# R2 PCI_RST# 22,24,25,27,28,32,33
PCI_AD23 H5 C3 PCI_DEVSEL#
PCI_AD24 AD[23] DEVSEL# PCI_PERR# PCI_DEVSEL# 22,24,25,27,28
B3 AD[24] PERR# E3 PCI_PERR# 22,24,25,27,28
RP12 PCI_AD25 M6 C5 PCI_PLOCK#
PCI_PIRQE# PCI_AD26 AD[25] PLOCK# PCI_SERR#
+3VS 1 8 B2 AD[26] SERR# G5 PCI_SERR# 22,24,25,27,28
2 7 PCI_PIRQF# PCI_AD27 K6 J1 PCI_STOP#
AD[27] STOP# PCI_STOP# 22,24,25,27,28
3 6 D_USB_SMI#2 PCI_AD28 K3 J2 PCI_TRDY#
AD[28] TRDY# PCI_TRDY# 22,24,25,27,28
C 4 5 PCI_PIRQG# PCI_AD29 A5 C
PCI_AD30 AD[29]
L1 AD[30]
8.2K_1206_8P4R_5% PCI_AD31 K4 AD[31] PLT_RST#
PLTRST# R5 PLT_RST# 6,18,20,32,33,41
G6 CLK_ICH_PCI
PCICLK CLK_PCI_ICH 13
RP13 PCI_FRAME# J3 P6 CLK_PCI_ICH
22,24,25,27,28 PCI_FRAME# FRAME# PME#
1 8 PCI_REQ#3
+3VS
2 7 D_USB_SMI#1 Interrupt I/F
2
3 6 PCI_REQ#4 PCI_PIRQA# N2 D9 PCI_PIRQE#
22 PCI_PIRQA# PIRQ[A]# PIRQ[E]#/GPI[2] PCI_PIRQE# 24
4 5 PCI_REQ#1 PCI_PIRQB# L2 C7 PCI_PIRQF#
22 PCI_PIRQB# PIRQ[B]# PIRQ[F]#/GPI[3] PCI_PIRQF# 25
PCI_PIRQC# M1 C6 PCI_PIRQG# R157
PIRQ[C]# PIRQ[G]#GPI[4] PCI_PIRQG# 27,28
8.2K_1206_8P4R_5% PCI_PIRQD# L3 M3 PCI_PIRQH# @ 10_0402_5%
PIRQ[D]# PIRQ[H]#/GPI[5] PCI_PIRQH# 27,28
1
AC5
RESERVED 1
RP23 SATA[1]RXN/RSVD[1] C173
AD5 SATA[1]RXP/RSVD[2]
1 8 PCI_GNT#6 AF4 @ 10P_0402_50V8J
+3VS SATA[1]TXN/RSVD[3]
2 7 PCI_REQ#0 AG4
PCI_REQ#2 SATA[1]TXP/RSVD[4] 2
3 6 AC9 SATA[3]RXN/RSVD[5]
4 5 PCI_PIRQH# AD9 SATA[3]RXP/RSVD[6]
AF8 SATA[3]TXN/RSVD[7]
8.2K_1206_8P4R_5% AG8 SATA[3]TXP/RSVD[8]
U3 TP[3]/RSVD[9]
ICH6_BGA609
B B
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
ICH6(1/4)
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS EFL50 LA-2761 0.2
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Wednesday, April 20, 2005 Sheet 16 of 51
5 4 3 2 1
5 4 3 2 1
C205
18P_0402_50V8J
2 1 ICH_RTCX1
+RTCVCC
10M_0402_5%
Y2
1
3 NC OUT 4
1
R171
R440 32.768KHZ_12.5P_1TJS125DJ2A073 2 1
NC IN U13A
1M_0402_1% C203 +1.05VS
2
D 18P_0402_50V8J Y1 P2 LPC_LAD0 D
LPC_AD0 32,33
2
RTCX1 LAD[0]/FWH[0]
RTC
2 1 ICH_RTCX2 Y2 N3 LPC_LAD1
RTCX2 LAD[1]/FWH[1] LPC_AD1 32,33
INTRUDER# N5 LPC_LAD2
LAD[2]/FWH[2] LPC_AD2 32,33
1 2 ICH_RTCRST# AA2 N4 LPC_LAD3 H_FERR# 1 2
LPC
+RTCVCC RTCRST# LAD[3]/FWH[3] LPC_AD3 32,33
R444 R183 56_0402_5%
20K_0402_5% INTRUDER# AA3 N6 H_DPRSTP# 1 2
INTRUDER# LDRQ[0]# LPC_DRQ#1 R181 @ 56_0402_5%
AA5 INTVRMEN LDRQ[1]#/GPI[41] P4 LPC_DRQ#1 32
2 1 P3 LPC_FRAME#
LFRAME#/FWH[4] LPC_FRAME# 32,33
close to RAM door J3 JOPEN D12 EE_CS R199 1
B12 EE_SHCLK 2 10K_0402_5% +3VS
+3VS D11 AF22 EC_GA20
EE_DOUT A20GATE EC_GA20 33
C522 F13 AF23 H_A20M#
EE_DIN A20M# H_A20M# 4
1U_0402_6.3V4Z
1
LAN
CPUSLP# R176 1 @ 0_0402_5% H_CPUSLP#
CPU
1 2 F12 LAN_CLK CPUSLP# AE27 2 H_CPUSLP# 4,6
R185
B11 AE24 DPRSTP# R180 1 2 @ 0_0402_5% H_DPRSTP# H_DPRSTP# 4
10K_0402_5% LAN_RSTSYNC DPRSLP#/TP[4] DPSLP#
DPSLP#/TP[2] AD27 H_DPSLP# 4
E12
2
1
C142 R149 E13 AE22 @ 330_0402_5% C
@ 10P_0402_50V8J @ 10_0402_5% LANTXD[2] INIT3_3V# H_INIT# Q16
INIT# AF27 H_INIT# 4 +1.05VS 1 2 2
1 2 2 1 AG24 H_INTR R195 B @ 2SC2411K_SC59
INTR H_INTR 4
10K_0402_5% E
3
ICH_AC_BITCLK C10 1 2 +3VS
29,34 ICH_AC_BITCLK ACZ_BIT_CLK
AC-97/AZALIA
C
29,34 ICH_AC_SYNC ICH_AC_SYNC 2 AC97_SYNC_R
1 B9 AD23 KB_RST# C
ACZ_SYNC RCIN# EC_KBRST# 33
R150 33_0402_5%
ICH_AC_RST# 1 2 AC97_RST_R# A10 AF25 H_NMI H_NMI 4 +1.05VS 1 2 2 1 THRMTRIP#
29,34 ICH_AC_RST# ACZ_RST# NMI
R146 33_0402_5% AG27 H_SMI# H_SMI# 4 R187 75_0402_1% R186
ICH_AC_SDIN0 SMI# 56_0402_5%
29 ICH_AC_SDIN0 F11 ACZ_SDIN[0]
34 ICH_AC_SDIN1 ICH_AC_SDIN1 F10 AE26 H_STPCLK# H_STPCLK# 4
ACZ_SDIN[1] STPCLK# H_THERMTRIP#
B10 ACZ_SDIN[2] H_THERMTRIP# 4,6
AE23 THRMTRIP#
ICH_AC_SDOUT AC_SDOUT THRMTRIP#
29,34 ICH_AC_SDOUT 2 1 C9 ACZ_SDO
R427 33_0402_5% IDE_DA[0..2] 20
AC16 IDE_DA0
PHDD_LED# P_HDD_LED# DA[0] IDE_DA1
33 PHDD_LED# 1 2 AC19 SATALED# DA[1] AB17
R184 33_0402_5% AC17 IDE_DA2
DA[2]
1K_0402_5% 2 1 R464 SATA_DTX_IRX_N0 AE3 AD16 IDE_DCS1# IDE_DCS1# 20
1K_0402_5% 2 SATA[0]RXN DCS1#
1 R459 SATA_DTX_IRX_P0 AD3 SATA[0]RXP DCS3# AE17 IDE_DCS3# IDE_DCS3# 20
SATA_ITX_DRX_N0 AG2
SATA_ITX_DRX_P0 SATA[0]TXN
AF2 SATA[0]TXP IDE_DD[0..15] 20
AD14 IDE_DD0
DD[0]
SATA
1K_0402_5% 2 1 R491 SATA_DTX_IRX_N2 AD7 AF15 IDE_DD1
SATA[2]RXN DD[1]
PIDE
1K_0402_5% 2 1 R483 SATA_DTX_IRX_P2 AC7 AF14 IDE_DD2
SATA[2]RXP DD[2] IDE_DD3
AF6 SATA[2]TXN DD[3] AD12
AG6 AE14 IDE_DD4
SATA[2]TXP DD[4] IDE_DD5
DD[5] AC11
CLK_PCIE_SATA# AC2 AD11 IDE_DD6
13 CLK_PCIE_SATA# CLK_PCIE_SATA SATA_CLKN DD[6] IDE_DD7
13 CLK_PCIE_SATA AC1 SATA_CLKP DD[7] AB11
AE13 IDE_DD8
DD[8] IDE_DD9
AG11 SATARBIAS# DD[9] AF13
R188 1 2 24.9_0402_1% SATARBIAS AF11 AB12 IDE_DD10
B SATARBIAS DD[10] IDE_DD11 B
DD[11] AB13
AC13 IDE_DD12
DD[12] IDE_DD13
DD[13] AE15
R189 1 2 4.7K_0402_5% IDE _DIORDY AG15 IDE_DD14
+3VS DD[14]
IDE _DIORDY AF16 AD13 IDE_DD15
20 IDE_DIORDY IORDY DD[15]
IDE_IRQ AB16
20 IDE_IRQ IDEIRQ
R201 1 2 8.2K_0402_5% IDE_IRQ IDE_DDACK# AB15
20 IDE_DDACK# DDACK#
IDE_DIOW# AC14 AB14 IDE_DDREQ
20 IDE_DIOW# DIOW# DDREQ IDE_DDREQ 20
IDE_DIOR# AE16
20 IDE_DIOR# DIOR#
ICH6_BGA609
Place near ICH6 side.
SATA_DTX_IRX_N0 2 1 SATA_DTX_C_IRX_N0
C531 0.01U_0402_16V7K SATA_DTX_C_IRX_N0 20
SATA_DTX_IRX_P0 2 1 SATA_DTX_C_IRX_P0
C530 0.01U_0402_16V7K SATA_DTX_C_IRX_P0 20
SATA_ITX_DRX_N0 2 1 SATA_ITX_C_DRX_N0
C535 0.01U_0402_16V7K SATA_ITX_C_DRX_N0 20
SATA_ITX_DRX_P0 2 1 SATA_ITX_C_DRX_P0
C534 0.01U_0402_16V7K SATA_ITX_C_DRX_P0 20
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
ICH6(2/4)
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS EFL50 LA-2761 0.2
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Wednesday, April 20, 2005 Sheet 17 of 51
5 4 3 2 1
5 4 3 2 1
+3VALW
U13C
1 2 ICH_SMLINK0 EC_SWI# T2 H25 EZ_PCIE_RXN1
33 EC_SWI# RI# PERn[1] EZ_PCIE_RXN1 38
R439 10K_0402_5% H24 EZ_PCIE_RXP1
PERp[1] EZ_PCIE_RXP1 38
1 2 ICH_SMLINK1 GPI26 AF17 G27 EZ_PCIE_C_TXN1 C489 1 2 1@ 0.1U_0402_16V4Z EZ_PCIE_TXN1
SATA[0]GP/GPI[26] PETn[1] EZ_PCIE_TXN1 38
R434 10K_0402_5% GPI27 AE18 G26 EZ_PCIE_C_TXP1 1 2 EZ_PCIE_TXP1
SATA[1]GP/GPI[29] PETp[1] EZ_PCIE_TXP1 38
1 2 CK_SCLK GPI28 AF18 C490 1@ 0.1U_0402_16V4Z
R438 2.2K_0402_5% GPI29 SATA[2]GP/GPI[30] EZ_PCIE_RXN2
AG18 SATA[3]GP/GPI[31] PERn[2] K25 EZ_PCIE_RXN2 38
1 2 CK_SDATA K24 EZ_PCIE_RXP2
PERp[2] EZ_PCIE_RXP2 38
D R437 2.2K_0402_5% CK_SCLK Y4 J27 EZ_PCIE_C_TXN2 C494 1 2 1@ 0.1U_0402_16V4Z EZ_PCIE_TXN2 D
13 CK_SCLK SMBCLK PETn[2] EZ_PCIE_TXN2 38
PCI-EXPRESS
1 2 LINKALERT# CK_SDATA W5 J26 EZ_PCIE_C_TXP2 1 2 EZ_PCIE_TXP2
13 CK_SDATA SMBDATA PETp[2] EZ_PCIE_TXP2 38
R436 10K_0402_5% LINKALERT# Y5 C495 1@ 0.1U_0402_16V4Z
EC_LID_OUT# ICH_SMLINK0 LINKALERT#
1 2 W4 SMLINK[0] PERn[3] M25
GPIO
R431 10K_0402_5% ICH_SMLINK1 U6 M24
EC_SWI# MCH_SYNC# SMLINK[1] PERp[3]
1 2 AG21 MCH_SYNC# PETn[3] L27
R167 10K_0402_5% SB_SPKR F8 L26
PM_BATLOW# 29 SB_SPKR SPKR PETp[3]
1 2
R168 8.2K_0402_5% SUS_STAT# W3 P24
35 SUS_STAT# SUS_STAT#/LPCPD# PERn[4]
1 2 PE_WAKE# P23
R433 1K_0402_5% SYSRST# PERp[4] +3VALW
U2 SYS_RESET# PETn[4] N27
1 2 SYSRST# N26
R170 10K_0402_5% PM_BMBUSY# PETp[4]
6 PM_BMBUSY# AD19 BM_BUSY#/GPI[6]
T25 DMI_MTX_IRX_N0 RP9
DMI[0]RXN DMI_MTX_IRX_N0 6
EZ_PE_REQ2# D8 1 2 ICH_GPI7 AE19 T24 DMI_MTX_IRX_P0 USB_OC#5 4 5
33,38 EZ_PE_REQ2# GPI[7] DMI[0]RXP DMI_MTX_IRX_P0 6
RB751V_SOD323 33 EC_SMI# EC_SMI# R1 R27 DMI_ITX_MRX_N0 3 6
GPI[8] DMI[0]TXN DMI_ITX_MRX_N0 6
R26 DMI_ITX_MRX_P0 USB_OC#6 2 7
DMI[0]TXP DMI_ITX_MRX_P0 6
CLOCK
A27 CLK48 USBP[0]N C21 USB20_N0 37
RP16 D21 USB20_P0
USBP[0]P USB20_P0 37
4 5 GPI29 RTC_CLK V6 A20
GPI28 33 RTC_CLK SUSCLK USBP[1]N
3 6 USBP[1]P B20
2 7 GPI27 SLP_S3# T4 D19 USB20_N2
33 PM_SLP_S3# SLP_S3# USBP[2]N USB20_N2 37
1 8 GPI26 SLP_S4# T5 C19 USB20_P2
SLP_S4# USBP[2]P USB20_P2 37
USB
SLP_S5# T6 A18
B 100_1206_8P4R_5% SLP_S5# USBP[3]N B
USBP[3]P B18
SYS_PWROK AA1 E17 USB20_N4
39 SYS_PWROK PWROK USBP[4]N USB20_N4 37
POWER MGT
1 2 PM_DPRSLPVR D17 USB20_P4
USBP[4]P USB20_P4 37
R192 100K_0402_5% PM_DPRSLPVR AE20 B16 USB20_N5
46 PM_DPRSLPVR DPRSLPVR/TP[1] USBP[5]N USB20_N5 34
A16 USB20_P5
USBP[5]P USB20_P5 34
PM_BATLOW# V2 C15 USB20_N6
BATLOW#/TP[0] USBP[6]N USB20_N6 37
D15 USB20_P6
USBP[6]P USB20_P6 37
PBTN_OUT# U1 A14
33 PBTN_OUT# PWRBTN# USBP[7]N
USBP[7]P B14
PLT_RST# V5
6,16,20,32,33,41 PLT_RST# LAN_RST# USBRBIAS
USBRBIAS# A22 1 2
EC_RSMRST# Y3 B22 R426 22.6_0402_1%
33 EC_RSMRST# RSMRST# USBRBIAS
ICH6_BGA609
+3VALW C201
0.1U_0402_16V4Z
1 2
5
U14
1 SLP_S4#
P
G
1
R428 SN74AHC1G08DCKR_SC70
A A
R152 @ 10_0402_5%
@ 10_0402_5%
2
2
1
1
C486
C162
2
@ 10P_0402_50V8J Compal Electronics, Inc.
@ 10P_0402_50V8J Title
2
ICH6(3/4)
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
EFL50 LA-2761
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Date: Wednesday, April 20, 2005 Sheet 18 of 51
5 4 3 2 1
5 4 3 2 1
+1.5VS
Near PIN F27(C155), +1.5VS C508
P27(C154), AB27(C157) U13E +RTCVCC 0.1U_0402_16V4Z U13D
1 2 E27 VSS[172] VSS[86] F4
+1.5VS AA22 VCC1_5[1] VCC1_5[98] F9 Y6 VSS[171] VSS[85] F22
220U_D2_4VM_R12
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1 AA23 U17 0.1U_0402_16V4Z C512 Y27 F19
VCC1_5[2] VCC1_5[97] 0.1U_0402_16V4Z VSS[170] VSS[84]
2 2 2 AA24 VCC1_5[3] VCC1_5[96] U16 Y26 VSS[169] VSS[83] F17
C219
+ AA25 U14 1 2 Y23 E25
VCC1_5[4] VCC1_5[95] 2 2 VSS[168] VSS[82]
C504
C499
C500
AB25 U12 C526 W7 E19
VCC1_5[5] VCC1_5[94] C507 VSS[167] VSS[81]
AB26 VCC1_5[6] VCC1_5[93] U11 W25 VSS[166] VSS[80] E18
2 1 1 1 0.1U_0402_16V4Z
AB27 VCC1_5[7] VCC1_5[92] T17 W24 VSS[165] VSS[79] E15
D F25 T11 C5271 1
1 2 W23 E14 D
VCC1_5[8] VCC1_5[91] VSS[164] VSS[78]
F26 VCC1_5[9] VCC1_5[90] P17 W1 VSS[163] VSS[77] D7
F27 P11 0.1U_0402_16V4Z C497 V4 D22
VCC1_5[10] VCC1_5[89] 0.1U_0402_16V4Z VSS[162] VSS[76]
G22 M17 V27 D20
CORE
VCC1_5[11] VCC1_5[88] VSS[161] VSS[75]
G23 VCC1_5[12] VCC1_5[87] M11 1 2 V26 VSS[160] VSS[74] D18
G24 VCC1_5[13] VCC1_5[86] L17 V23 VSS[159] VSS[73] D14
G25 L16 C503 U25 D13
+5VS +3VS VCC1_5[14] VCC1_5[85] 0.1U_0402_16V4Z VSS[158] VSS[72]
H21 VCC1_5[15] VCC1_5[84] L14 U24 VSS[157] VSS[71] D10
H22 VCC1_5[16] VCC1_5[83] L12 1 2 U23 VSS[156] VSS[70] D1
J21 VCC1_5[17] VCC1_5[82] L11 U15 VSS[155] VSS[69] C4
2
2
J22 AA21 C513 U13 C22
R148 D7 VCC1_5[18] VCC1_5[81] 0.1U_0402_16V4Z VSS[154] VSS[68]
K21 VCC1_5[19] VCC1_5[80] AA20 T7 VSS[153] VSS[67] C20
K22 VCC1_5[20] VCC1_5[79] AA19 1 2 T27 VSS[152] VSS[66] C18
PCIE
10_0402_5% RB751V_SOD323 L21 T26 C14
VCC1_5[21] C484 VSS[151] VSS[65]
L22 T23 B25
1
IDE
0.1U_0402_16V4Z P21
VCC1_5[29] VCC3_3[15]
AA15 C4961 1 AG13, AG16 C493 R25
VSS[143] VSS[57]
AG3
VCC1_5[30] VCC3_3[14] 0.1U_0402_16V4Z VSS[142] VSS[56]
P25 VCC1_5[31] VCC3_3[13] AA14 R24 VSS[141] VSS[55] AG22
P26 VCC1_5[32] VCC3_3[12] AA12 1 2 R23 VSS[140] VSS[54] AG20
P27 0.1U_0402_16V4Z R17 AG17
VCC1_5[33] C498 VSS[139] VSS[53]
R21 VCC1_5[34] R16 VSS[138] VSS[52] AG14
R22 P1 +3VS 0.1U_0402_16V4Z R15 AG12
VCC1_5[35] VCC3_3[11] VSS[137] VSS[51]
T21 VCC1_5[36] VCC3_3[10] M7 2 2 2 1 2 R14 VSS[136] VSS[50] AG1
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C T22 L7 R13 AF7 C
VCC1_5[37] VCC3_3[9] VSS[135] VSS[49]
C501
C491
C492
U21 L4 C502 R12 AF3
VCC1_5[38] VCC3_3[8] 0.01U_0402_16V7K VSS[134] VSS[48]
U22 VCC1_5[39] VCC3_3[7] J7 R11 VSS[133] VSS[47] AF26
1 1 1
V21 VCC1_5[40] VCC3_3[6] H7 1 2 P22 VSS[132] VSS[46] AF12
GROUND
PCI
V22 VCC1_5[41] VCC3_3[5] H1 P16 VSS[131] VSS[45] AF10
W21 VCC1_5[42] VCC3_3[4] E4 Near PIN A25 P15 VSS[130] VSS[44] AF1
W22 VCC1_5[43] VCC3_3[3] B1 Near PIN C506
P14 VSS[129] VSS[43] AE7
Y21 A6 P13 AE6
Y22
VCC1_5[44] VCC3_3[2] A2-A6, D1-H1 0.01U_0402_16V7K P12
VSS[128] VSS[42]
AE25
VCC1_5[45] VSS[127] VSS[41]
VCCSUS1_5[3] U7 +1.5VALW 1 2 N7 VSS[126] VSS[40] AE21
+1.5VS AA6 VCC1_5[46] VCCSUS1_5[2] R7 N17 VSS[125] VSS[39] AE2
AB4 VCC1_5[47] Near PIN AA19 N16 VSS[124] VSS[38] AE12
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
AB5 VCC1_5[48] 2 2 2 N15 VSS[123] VSS[37] AE11
USB
2 AB6 VCC1_5[49] VCCSUS1_5[1] G19 N14 VSS[122] VSS[36] AE10
C505
C509
C510
AC4 VCC1_5[50] N13 VSS[121] VSS[35] AD6
Near PIN AG5 C521 AD4 G20 N12 AD24
0.1U_0402_16V4Z VCC1_5[51] VCC1_5[78] 1 1 1 VSS[120] VSS[34]
AE4 VCC1_5[52] VCC1_5[77] F20 N11 VSS[119] VSS[33] AD2
1
AE5 VCC1_5[53] VCC1_5[76] E24 N1 VSS[118] VSS[32] AD18
SATA
AF5 VCC1_5[54] VCC1_5[75] E23 M4 VSS[117] VSS[31] AD15
USB CORE
AG5 VCC1_5[55] VCC1_5[74] E22 M27 VSS[116] VSS[30] AD10
VCC1_5[73] E21 +3VALW M26 VSS[115] VSS[29] AD1
+1.5VS AA7 VCC1_5[56] VCC1_5[72] E20 M23 VSS[114] VSS[28] AC6
AA8 D27 C520 M16 AC3
VCC1_5[57] VCC1_5[71] 0.1U_0402_16V4Z VSS[113] VSS[27]
AA9 VCC1_5[58] VCC1_5[70] D26 M15 VSS[112] VSS[26] AC26
2 AB8 VCC1_5[59] VCC1_5[69] D25 1 2 M14 VSS[111] VSS[25] AC24
AC8 VCC1_5[60] VCC1_5[68] D24 +1.5VS M13 VSS[110] VSS[24] AC23
+5VALW +3VALW C517 C488
Near PIN AG9 0.1U_0402_16V4Z
AD8 VCC1_5[61] +2.5VS 0.1U_0402_16V4Z
M12 VSS[109] VSS[23] AC22
AE8 VCC1_5[62] VCC1_5[67] G8 L25 VSS[108] VSS[22] AC12
1
AE9 VCC1_5[63] 1 2 L24 VSS[107] VSS[21] AC10
2
B B
AF9 VCC1_5[64] VCC2_5[4] AB18 L23 VSS[106] VSS[20] AB9
R147 D6 AG9 PCI/IDE RBP P7 C511 L15 AB7
VCC1_5[65] VCC2_5[2] 0.1U_0402_16V4Z VSS[105] VSS[19]
L13 VSS[104] VSS[18] AB2
0.1U_0402_16V4Z
10_0402_5% RB751V_SOD323 ICH6_VCCPLL AC27 AA18 ICH_V5REF_RUN 2 1 2 K7 AB19
VCCDMIPLL V5REF[2] VSS[103] VSS[17]
+3VS E26 A8 K27 AB10
1
C516
ICH_V5REF_SUS C514 K26 AB1
ICH_V5REF_SUS 0.1U_0402_16V4Z VSS[101] VSS[15]
2 2 +1.5VS AE1 VCCSATAPLL V5REF_SUS F21 K23 VSS[100] VSS[14] AA4
C145 1
2 +3VS AG10 VCC3_3[22] 1 2 K1 VSS[99] VSS[13] AA16
C487 Near PIN A25 +1.5VS J4 AA13
1U_0603_10V4Z 0.1U_0402_16V4Z VCCUSBPLL VSS[98] VSS[12]
1 1 C483 E26, E27
A13 VCCLAN3_3/VCCSUS3_3[1] VCCSUS3_3[20] A24 +3VALW Near PIN A24 J25 VSS[97] VSS[11] AA11
+3VS F14 VCCLAN3_3/VCCSUS3_3[2] J24 VSS[96] VSS[10] A9
0.1U_0402_16V4Z 1 G13 AB3 +RTCVCC J23 A7
VCCLAN3_3/VCCSUS3_3[3] VCCRTC VSS[95] VSS[9]
G14 VCCLAN3_3/VCCSUS3_3[4] Near PIN AB18 H27 VSS[94] VSS[8] A4
VCCLAN1_5/VCCSUS1_5[2] G11 H26 VSS[93] VSS[7] A26
+3VALW A11 VCCSUS3_3[1] VCCLAN1_5/VCCSUS1_5[1] G10 +1.5VS H23 VSS[92] VSS[6] A23
U4 VCCSUS3_3[2] G9 VSS[91] VSS[5] A21
V1 VCCSUS3_3[3] V_CPU_IO[3] AG23 G7 VSS[90] VSS[4] A19
+3VS
V7 VCCSUS3_3[4] V_CPU_IO[2] AD26 +1.05VS G21 VSS[89] VSS[3] A15
W2 AB22 C518 G12 A12
VCCSUS3_3[5] V_CPU_IO[1] 0.1U_0402_16V4Z VSS[88] VSS[2]
Y7 VCCSUS3_3[6] G1 VSS[87] VSS[1] A1
0.1U_0402_16V4Z
VCCSUS3_3[19] G16 2 1 2
+3VALW A17 VCCSUS3_3[7] VCCSUS3_3[18] G15 C528 Near PIN AG23 ICH6_BGA609
B17 VCCSUS3_3[8] VCCSUS3_3[17] F16
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C480
C208
Near PIN A17
0.1U_0402_16V4Z 1 C207 2
0.01U_0402_16V7K
Compal Electronics, Inc.
Title
ICH6(4/4)
Near PIN THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number Rev
AC27 AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D EFL50 LA-2761 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Date: Wednesday, April 20, 2005 Sheet 19 of 51
5 4 3 2 1
5 4 3 2 1
HDD CONN
IDE_DD[0..15]
17 IDE_DD[0..15]
IDE_DA[0..2]
17 IDE_DA[0..2]
D JP28 D
IDE_RESET#
IDE_DD7 1 2 IDE_DD8
IDE_DD6 3 4 IDE_DD9
IDE_DD5 5 6 IDE_DD10
IDE_DD4 7 8 IDE_DD11
IDE_DD3 9 10 IDE_DD12
IDE_DD2 11 12 IDE_DD13
IDE_DD1 13 14 IDE_DD14
+5VS IDE_DD0 15 16 IDE_DD15
17 18
IDE_DDREQ 19 20
17 IDE_DDREQ 21 22
IDE_DIOW#
17 IDE_DIOW# 23 24
1
IDE_DIOR#
17 IDE_DIOR# 25 26
R224 IDE _DIORDY IDE_CSEL R219 1 2 470_0402_5%
17 IDE_DIORDY 27 28
100K_0402_5% IDE_DDACK#
17 IDE_DDACK# 29 30
IDE_IRQ
17 IDE_IRQ 31 32
IDE_DA1 PDIAG#
2
IDE_DA0 33 34 IDE_DA2
IDE_DCS1# 35 36 IDE_DCS3#
17 IDE_DCS1# 37 38 IDE_DCS3# 17
IDE_LED# IDE_LED#
33 IDE_LED# 39 40
+5VS 41 42 +5VS
80mils 43 44 80mils
2SP@
SUYIN_200138FR044G272ZU_RV
For 2 Spindle
C C
+5VS
10U_0805_10V4Z 0.1U_0402_16V4Z
+3VS
1 1 1 1
C269 C267
C270 C268
1 2 0.1U_0402_16V4Z C279
+5VS
2 2 2 2
5
U19
10U_0805_10V4Z 0.1U_0402_16V4Z IDE_HRESET# 1 1U_0603_10V4Z 1000P_0402_50V7K
P
18 IDE_HRESET# B
4 IDE_RESET#
PLT_RST# Y
1 1 1 1 6,16,18,32,33,41 PLT_RST# 2 A
G
C598
C594 C593 C590 TC7SH08FU_SSOP5
3
2 2 2 2
0.1U_0402_16V4Z 1000P_0402_50V7K
B B
D D
1
C C
3
VCC 16
DOCKIN# 1
14,26,33,38 DOCKIN# SEL +3VS
15 2 D_TV_LUMA
OE# 1B1 D_TV_CRMA D_TV_LUMA 38
2B1 5 D_TV_CRMA 38
11 D_TV_COMPS
VGA_TV_LUMA LUMA_Q 3B1 D_TV_COMPS 38
15 VGA_TV_LUMA 1 2 4 1A 4B1 14
R69 PM@ 0_0402_5% CRMA_Q 7
GMCH_TV_LUMA COMPS_Q 2A JP17
8 GMCH_TV_LUMA 1 2 9 3A
R67 GM@ 0_0402_5% 12 3 LUMA L8 1 2 3
VGA_TV_CRMA 4A 1B2 FBM-11-160808-121T_0603 CRMA_L
15 VGA_TV_CRMA 1 2 2B2 6 6
R71 PM@ 0_0402_5% 10 COMPS_L 7
GMCH_TV_CRMA 3B2 CRMA L14 1
8 GMCH_TV_CRMA 1 2 4B2 13 2 5
R75 GM@ 0_0402_5% 8 FBM-11-160808-121T_0603 2
GND LUMA_L 4
VGA_TV_COMPS 1 2 FSAV330MTC_TSSOP16 COMPS L13 1 2 1
15 VGA_TV_COMPS
R77 PM@ 0_0402_5% W D@ FBM-11-160808-121T_0603 8
GMCH_TV_COMPS 1 2 9
8 GMCH_TV_COMPS
1
R78 GM@ 0_0402_5%
2
B LUMA_Q LUMA 2 2 2 2 2 2 B
1 2
R391 ND@ 0_0402_5%
CRMA_Q 1 2 CRMA
R392 ND@ 0_0402_5% 150_0402_5% 150_0402_5% 270P_0402_50V7K 270P_0402_50V7K 330P_0402_50V7K 330P_0402_50V7K
COMPS_Q 1 2 COMPS 150_0402_5% 270P_0402_50V7K 330P_0402_50V7K
R80 ND@ 0_0402_5%
A A
+3VS
23 VPPD0 +S1_VCC
23 VPPD1 +3VS
23 VCCD0#
23 VCCD1# 1 1 1 2
M13
M12
G13
N13
N12
D12
H11
G1
C8
N4
C347 C346 C620 C623
A7
B4
K2
F3
L9
L6
U39 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
S1_A[0..25] 2 2 2 1
VCCD1#
VCCD0#
VPPD1
VPPD0
VCCA2
VCCA1
VCC10
VCC9
VCC8
VCC7
VCC6
VCC5
VCC4
VCC3
VCC2
VCC1
S1_A[0..25] 23
S1_D[0..15]
PCI_AD[0..31] S1_D[0..15] 23
16,24,25,27,28 PCI_AD[0..31] +3VS
D PCI_AD31 C2 B2 S1_D10 D
PCI_AD30 AD31 CAD31/D10 S1_D9
C1 AD30 CAD30/D9 C3
PCI_AD29 D4 B3 S1_D1 1 1 1 1
PCI_AD28 AD29 CAD29/D1 S1_D8
D2 AD28 CAD28/D8 A3
PCI_AD27 D1 C4 S1_D0 C349 C357 C605 C599
PCI_AD26 AD27 CAD27/D0 S1_A0 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
E4 AD26 CAD26/A0 A6
PCI_AD25 S1_A1 2 2 2 2
E3 AD25 CAD25/A1 D7
PCI_AD24 E2 C7 S1_A2
PCI_AD23 AD24 CAD24/A2 S1_A3
F2 AD23 CAD23/A3 A8
PCI_AD22 F1 D8 S1_A4
PCI_AD21 AD22 CAD22/A4 S1_A5
G2 AD21 CAD21/A5 A9
PCI_AD20 G3 C9 S1_A6
PCI_AD19 AD20 CAD20/A6 S1_A25 +S1_VCC
H3 AD19 CAD19/A25 A10
PCI_AD18 H4 B10 S1_A7
PCI_AD17 AD18 CAD18/A7 S1_A24
J1 AD17 CAD17/A24 D10
PCI_AD16 J2 E12 S1_A17 1 1 1 1
CLK_PCI_PCM PCI_AD15 AD16 CAD16/A17 S1_IOWR#
N2 AD15 CAD15/IOWR# F10 S1_IOWR# 23
PCI_AD14 M3 E13 S1_A9 C617 C618 C616 C615
AD14 CAD14/A9
1
PCI Interface
C PCI_AD2 AD3 CAD3/D5 S1_D11 C
L7 AD2 CAD2/D11 K10
CARDBUS
PCI_AD1 K7 K12 S1_D4
PCI_AD0 AD1 CAD1/D4 S1_D3
N8 AD0 CAD0/D3 L13
E1 B7 S1_REG#
16,24,25,27,28 PCI_C/BE#3 CBE3# CCBE3#/REG# S1_REG# 23
J3 A11 S1_A12 S1_CD1# S1_CD2#
16,24,25,27,28 PCI_C/BE#2 CBE2# CCBE2#/A12
N1 E11 S1_A8
16,24,25,27,28 PCI_C/BE#1 CBE1# CCBE1#/A8
N5 H13 S1_CE1# 1 1
16,24,25,27,28 PCI_C/BE#0 CBE0# CCBE0#/CE1# S1_CE1# 23
C348 C619
PCI_RST# G4 B9 S1_RST
16,24,25,27,28,32,33 PCI_RST# PCIRST# CRST#/RESET S1_RST 23
J4 B11 S1_A23 10P_0402_50V8K 10P_0402_50V8K
16,24,25,27,28 PCI_FRAME# FRAME# CFRAME#/A23 2 2
K1 A12 S1_A15
16,24,25,27,28 PCI_IRDY# IRDY# CIRDY#/A15
K3 A13 S1_A22
16,24,25,27,28 PCI_TRDY# TRDY# CTRDY#/A22
L1 B13 S1_A21
16,24,25,27,28 PCI_DEVSEL# DEVSEL# CDEVSEL#/A21
L2 C12 S1_A20 Closed to Pin L12 Closed to Pin A4
16,24,25,27,28 PCI_STOP# STOP# CSTOP#/A20
L3 C13 S1_A14
16,24,25,27,28 PCI_PERR# PERR# CPERR#/A14
M1 A5 S1_WAIT#
16,24,25,27,28 PCI_SERR# SERR# CSERR#/WAIT# S1_WAIT# 23
M2 D13 S1_A13
16,24,25,27,28 PCI_PAR PAR CPAR/A13
A1 B8 S1_INPACK#
16 PCI_REQ#2 PCIREQ# CREQ#/INPACK# S1_INPACK# 23
IDSEL: B1 C11 S1_WE#
16 PCI_GNT#2 PCIGNT# CGNT#/WE# S1_WE# 23
CLK_PCI_PCM H1 B12 A16_CLK 1 2 S1_A16
+3VS PCI_AD20 13 CLK_PCI_PCM PCICLK CCLK/A16 R593 33_0402_5%
L8 C5 S1_BVD1
RIOUT#_PME# CSTSCHG/BVD1_STSCHG# S1_BVD1 23
1 2 L11 D5 S1_WP Chip has internal pull low
+3VS SUSPEND# CCLKRUN#/WP_IOIS16# S1_WP 23
R563 10K_0402_5%
PCI_AD20 1 2 PCM_ID F4 D11 S1_A19
IDSEL CBLOCK#/A19
2
J13 S1_D14
R296 CRSV1/D14
@10_0402_5%
+VCC_5IN1 E7
SD/MMC/MS/SM H7 MSINS#
MSINS# 23
2
VCC_SD MSINS#
1 MSPWREN#/SMPWREN# J8 XD_MS_PWREN# 23
SDCD# E8 H8 MSBS_XDD1
23 SDCD# SDCD# MSBS/SMDATA1 MSBS_XDD1 23
C344 SDWP F8 E9 1 2
15P_0402_50V8J 23 SDWP SDWP/SMWPD# MSCLK/SMRE# MSCLK_XDRE# 23
G7 G9 MSD0_XDD2 R590 33_0402_5%
2 23 SDPWREN# SDPWREN33# MSDATA0/SMDATA2 MSD0_XDD2 23
H9 MSD1_XDD6
MSDATA1/SMDATA6 MSD1_XDD6 23
CLK_SD_48M H5 G8 MSD2_XDD5
13 CLK_SD_48M SDCLKI MSDATA2/SMDATA5 MSD2_XDD5 23
R570 22_0402_5% F9 MSD3_XDD3
MSDATA3/SMDATA3 MSD3_XDD3 23
23 SDCK 1 2 F6 SDCLK/SMWE#
SDCM_XDALE E5
23 SDCM_XDALE SDCMD/SMALE
R569 22_0402_5% SDDA0_XDD7 E6 H6
23 SDDA0_XDD7 SDDAT0/SMDATA7 SMBSY# XDBSY# 23
1 2 SDDA1_XDD0 F7 J7
23 XDWE# 23 SDDA1_XDD0 SDDAT1/SMDATA0 SMCD# XDCD# 23
SDDA2_XDCL F5 J6 XDWP#
23 SDDA2_XDCL SDDAT2/SMCLE SMWP# XDWP# 23
SDDA3_XDD4 G6 J5
23 SDDA3_XDD4 SDDAT3/SMDATA4 SMCE# XDCE# 23
2
GND1
GND2
GND3
GND4
GND5
GND6
GND7
GND8
+3VS G5
A GND_SD A
Chip has internal pull high R574
2.2K_0402_5%
CB714_LFBGA169
D3
H2
L4
M8
K11
F12
C10
B6
1 2 SDCD#
1
R592 @43K_0402_5%
1 2 SDWP
R568 @43K_0402_5% Compal Electronics, Inc.
1 2 MSINS# Title
R587 @43K_0402_5%
SDCD# & SDWP# & MSINS# have THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PCMCIA Controller
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Close chip termenal internal 30Kohm pull up resistor B EFL50 LA-2761 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Wednesday, April 20, 2005 Sheet 22 of 51
5 4 3 2 1
5 4 3 2 1
S1_A[0..25]
PCMCIA Power Controller +3VS 22 S1_A[0..25]
1
R552
CardBus Socket
2
@ 43K_0402_5%
G
U36 +S1_VCC 1 2 JP7
Don't support 12V card 13 40mil C585 0.1U_0402_16V4Z XDCD# 1 3 XD_CD# 1
22 XDCD#
2
VCC GND
12 35
S
VCC C584 0.1U_0402_16V4Z GND S1_D3
9 12V VCC 11 Close to +S1_VCC DATA3 2
1 2 36 S1_CD1#
C586 10U_0805_10V4Z CardBus Conn. Q45 CD1#
3 S1_D4 S1_CD1# 22
+S1_VPP 2N7002_SOT23 DATA4 S1_D11
D 1 2 DATA11 37 D
20mil C583 0.01U_0402_16V7K 1 1 4 S1_D5
+5VS DATA5 S1_D12
VPP 10 1 2 DATA12 38
C587 1U_0603_10V4Z C337 C339 5 S1_D6
0.1U_0402_16V4Z C573 10U_0805_10V4Z 0.1U_0402_16V4Z SDDA3_XDD4 DATA6 S1_D13
5 5V SDDA3_XDD4 22 DATA13 39
2 2 SDDA1_XDD0 S1_D7
6 5V SDDA1_XDD0 22 DATA7 6
4.7U_0805_10V4Z C570 SDDA0_XDD7 40 S1_D14
SDDA0_XDD7 22 DATA14
1 SDCM_XDALE 7 S1_CE1#
VCCD0 VCCD0# 22 SDCM_XDALE 22 CE1# S1_CE1# 22
2 SDDA2_XDCL 41 S1_D15
VCCD1 VCCD1# 22 SDDA2_XDCL 22 DATA15
15 MSBS_XDD1 8 S1_A10
+3VS VPPD0 VPPD0 22 MSBS_XDD1 22 ADD10
14 MSD1_XDD6 42 S1_CE2#
VPPD1 VPPD1 22 +S1_VPP MSD1_XDD6 22 CE2# S1_CE2# 22
MSD0_XDD2 9 S1_OE#
MSD0_XDD2 22 OE# S1_OE# 22
1
0.1U_0402_16V4Z C574 3 MSD2_XDD5 43 S1_VS1
3.3V MSD2_XDD5 22 VS1# S1_VS1 22
4 8 R550 MSINS# 10 S1_A11
3.3V OC MSINS# 22 ADD11
SHDN
4.7U_0805_10V4Z C571 @0_0805_5% MSD3_XDD3 44 S1_IORD#
GND 1 1
SDWP
MSD3_XDD3 22 IORD# S1_A9 S1_IORD# 22
SDWP 22 ADD9 11
2
2
R562 4.7U_0805_10V4Z 0.01U_0402_16V7K IOWR# S1_A8 S1_IOWR# 22
12
7
16
10K_0402_5% 2 2 ADD8 S1_A17
ADD17 46
CP2211D3_SSOP16 +VCC_5IN1 13 S1_A13
ADD13 S1_A18
47
1
ADD18 S1_A14
ADD14 14
Reserve for SD pull high issue. 48 S1_A19
ADD19 S1_WE#
1 WE# 15 S1_WE# 22
S1_A20
SD/ MMC/ MS C589 C580 C588 ADD20 49
16 S1_RDY#
1U_0603_10V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z READY S1_A21 S1_RDY# 22
ADD21 50
2
VCC 17 +S1_VCC
VCC 51 +S1_VCC
C JP36 18 +S1_VPP C
VPP
VPP 52 +S1_VPP
+VCC_SM/XD 34 14 19 S1_A16
+VCC_SM/XD XD-VCC SD-VCC ADD16 S1_A22
4 IN 1 CONN MS-VCC 3 ADD22 53
20 S1_A15
ADD15 S1_A23
SD / MMC / MS(PRO) / XD ADD23 54
2 1 XDBSY# XDBSY# 22
SDDA1_XDD0 26 XD-D0 SD-CLK 15 SDCK
ADD12 21 S1_A12
R551 43K_0402_5% MSBS_XDD1 27 16 SDDA0_XDD7 55 S1_A24
MSD0_XDD2 XD-D1 SD-DAT0 SDDA1_XDD0 ADD24 S1_A7
1 2 XDCE# 22 28 XD-D2 SD-DAT1 17 ADD7 22
R547 43K_0402_5% MSD3_XDD3 29 11 SDDA2_XDCL 56 S1_A25
XD-D3 SD-DAT2 ADD25
2 1 MSCLK_XDRE# SDDA3_XDD4 30 XD-D4 SD-DAT3 12 SDDA3_XDD4
ADD6 23 S1_A6
R564 43K_0402_5% SD CLK MSD2_XDD5 31 13 SDCM_XDALE 57 S1_VS2
XD-D5 SD-CMD VS2# S1_VS2 22
2 1 XDWE# XDWE# 22
MSD1_XDD6 32 XD-D6 SD-CD-SW 2 SDCD#
ADD5 24 S1_A5
R545 2.2K_0402_5% SDDA0_XDD7 33 35 SDWP 58 S1_RST
SDCK XD-D7 SD-WP-SW RESET S1_A4 S1_RST 22
22 SDCK ADD4 25
59 S1_WAIT#
XDWE# MSCLK_XDRE# WAIT# S1_A3 S1_WAIT# 22
1 24 XD-WE MS-SCLK 4 ADD3 26
C579 XDWP# 25 8 MSD0_XDD2 60 S1_INPACK#
22 XDWP# XD-WP MS-DATA0 INPACK# S1_INPACK# 22
10P_0402_50V8K SDCM_XDALE 23 9 MSD1_XDD6 27 S1_A2
XD_CD# XD-ALE MS-DATA1 MSD2_XDD5 ADD2 S1_REG#
18 XD-CD MS-DATA2 7 REG# 61 S1_REG# 22
2 XDBSY# MSD3_XDD3 S1_A1
+SD_PULLHIGH by BIOS setting 19 XD-R/B MS-DATA3 5 ADD1 28
MSCLK_XDRE# 20 6 MSINS# 62 S1_BVD2
SD_PULLHIGH XDCE# XD-RE MS-INS MSBS_XDD1 BVD2 S1_A0 S1_BVD2 22
22 SD_PULLHIGH 21 XD-CE MS-BS 10 ADD0 29
SDDA2_XDCL 22 63 S1_BVD1
XD-CLE BVD1 S1_D0 S1_BVD1 22
MS CLK 4IN1-GND 1 DATA0 30
1 2 SD_PULLHIGH 36 64 S1_D8
R294 @ 0_0603_5% MSCLK_XDRE# 4IN1-GND DATA8 S1_D1
22 MSCLK_XDRE# DATA1 31
1 2 SDCM_XDALE TAITW_R007-520-L3 69 65 S1_D9
GND DATA9
1
SDDA2_XDCL GND
1 2 1 1 1 1 1 1 1 1 GND 68
R560 @ 43K_0402_5% C572
1 2 SDDA3_XDD4 @10P_0402_50V8K C656 C657 C551 C556 C555 C554 C553 SANTA_130609-1_LT
R559 @ 43K_0402_5% 1U_0603_10V4Z 1U_0603_10V4Z
2 2 2 2 2 2 2 2
Close to 5 in 1 socket +3VS
0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
2
+3VS +VCC_SM/XD
+3VS R626
+3VS 10K_0402_5%
5 IN 1 PWR Control
2
2
+VCC_5IN1 R537 U48 R628
1
10K_0402_5% +3VS R627 4 3 1 2 XDOC#
+3VS VIN FLG XDOC# 22
5 IN 1 PWR Control
R538 10K_0402_5% 5
1
VOUT 0_0402_5%
2
U49 1 2 1
SDOC# 22
1
+3VS R629 1 2
R633 4.7K_0402_5% CE GND R630 C666
1 GND OUT 8 0_0402_5%
1
2 7 1 2 XDOC# RT9702ACB_SOT23-5 100K_0402_5% 0.1U_0402_16V4Z
IN OUT
2
2 @
3 6
1
R536 IN OUT 0_0402_5%
4 5
0308
2
4.7K_0402_5% EN# OC#
100K
A 22 XD_MS_PWREN# 2 A
TPS2041ADR_SO8
1
DTC115EKA_SOT23
1
100K
R571 Q44
R531
22 SDPWREN#
3
100K_0402_5% +VCC_5IN1 1 2 +VCC_SM/XD
22 MSPWREN#
0_0603_5% Compal Electronics, Inc.
0307
2
1 2 Title
22 XD_MS_PWREN#
R632 0_0402_5%
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PCMCIA Socket
Size Document Number Rev
0307 AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
B EFL50 LA-2761 0.2
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Wednesday, April 20, 2005 Sheet 23 of 51
5 4 3 2 1
5 4 3 2 1
+3VS
+3VS
1 1 1 1
1394_CYCLEIN 1 2 C582 C581 C564 C567
R548 4.7K_0402_5%
1394_CYCLEOUT 1 2 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
R546 10K_0402_5% 2 2 2 2
+3VS 1394_CNA 1 2
R554 4.7K_0402_5%
1394_TEST17 1 2
D R542 4.7K_0402_5% D
1394_TEST16 2 1 +3VS
R543 4.7K_0402_5%
U37
PCI_AD[0..31] TSB43AB21_PQFP128
20
35
48
62
78
87
86
96
10
11
16,22,25,27,28 PCI_AD[0..31] 1 1 1 1
C563 C559 C558 C557
VDDP
VDDP
VDDP
VDDP
VDDP
CYCLEOUT/CARDBUS
CNA
TEST17
TEST16
CYCLEIN
15 +3VS 1000P_0402_50V7K 1000P_0402_50V7K 1000P_0402_50V7K 1000P_0402_50V7K
PCI_AD0 DVDD 2 2 2 2
84 PCI_AD0 DVDD 27
PCI_AD1 82 39
PCI_AD2 PCI_AD1 DVDD
81 PCI_AD2 DVDD 51
PCI_AD3 80 59
PCI_AD4 PCI_AD3 DVDD
79 PCI_AD4 DVDD 72
PCI_AD5 77 88 L34
PCI_AD6 PCI_AD5 DVDD BLM21A601SPT_0805
76 PCI_AD6 DVDD 100
PCI_AD7 74 7 +1394_PLLVDD 0.01U_0402_16V7K 1 2 +3VS
PCI_AD8 PCI_AD7 PLLVDD
71 1
PCI_AD9
PCI_AD10
70
69
PCI_AD8
PCI_AD9
TSB43AB21 AVDD
AVDD 2
107
+3VS 1
C569
1
C568
PCI_AD11
PCI_AD12
67
66
PCI_AD10
PCI_AD11
/(TSB43AB22) AVDD
AVDD 108
120
2 2
4.7U_0805_10V4Z
2
PCI_C/BE#3 34
16,22,25,27,28 PCI_C/BE#3 PCI_C/BE3
PCI_C/BE#2 47 X2
16,22,25,27,28 PCI_C/BE#2 PCI_C/BE2
PCI_C/BE#1 60 24.576MHz_16P_3XG-24576-43E1
16,22,25,27,28 PCI_C/BE#1 PCI_C/BE1
PCI_C/BE#0 73 5 1394_X1
16,22,25,27,28 PCI_C/BE#0
1
CLK_PCI_1394 PCI_C/BE0 X1 C576 1
13 CLK_PCI_1394 16 PCI_CLK 2 22P_0402_50V8J
PCI_GNT#0 18
16 PCI_GNT#0 PCI_GNT
PCI_REQ#0 19 3 C578 1 2
16 PCI_REQ#0
1394_IDSEL PCI_REQ FILTER FILTER0
36 PCI_IDSEL
PCI_FRAME# 49 4 0.1U_0402_16V4Z
16,22,25,27,28 PCI_FRAME# PCI_FRAME FILTER1
P CI_IRDY# 50
16,22,25,27,28 PCI_IRDY# PCI_IRDY
PCI_TRDY# 52 92 1394_SDA
16,22,25,27,28 PCI_TRDY#
PCI_DEVSEL# PCI_TRDY EEPROM 2 WIRE BUS SDA
16,22,25,27,28 PCI_DEVSEL# 53 PCI_DEVSEL
PCI_STOP# 54 91 1394_SCL 1
16,22,25,27,28 PCI_STOP# PCI_STOP SCL
1
PCI_PERR# 56
16,22,25,27,28 PCI_PERR# PCI_PERR
PCI_PIRQE# 13 POWER CLASS 99 R217 R218 C266
16 PCI_PIRQE# PCI_INTA/CINT PC0
1394_PME# 21 98 PC1 56.2_0402_1% 56.2_0402_1% 0.33U_0603_16V4Z
33 1394_PME# PCI_PME/CSTSCHG PC1 2
PCI_SERR# 57 97 PC2
16,22,25,27,28 PCI_SERR# PCI_SERR PC2
PCI_PAR 58
16,22,25,27,28 PCI_PAR
2
PCI_PAR
5
6
7
8
B PM_CLKRUN# TPBIAS0 JP30 B
18,25,27,28,32,33 PM_CLKRUN# 12 PCI_CLKRUN PHY PORT 1 TPBIAS0 116
PCI_RST# 85 115 TPA0+ 4
GND1
GND2
GND3
GND4
16,22,25,27,28,32,33 PCI_RST# PCI_RST TPA0+ 4
114 TPA0- 3
TPA0- TPB0+ 3
TPB0 + 113 2 2
112 TPB0- 1
TPB0 - 1
1
94 R220 R225 SUYIN_020204FR004S506ZL
TEST9 56.2_0402_1% 56.2_0402_1% 1394<4>@
TEST8 95
14 G_RST
101
2
1394_GPIO3 TEST3
PLLGND1
89 102
REG_EN
REG18
GPIO2 TEST1
DGND
DGND
DGND
DGND
DGND
DGND
DGND
DGND
DGND
DGND
1
AGND
AGND
AGND
AGND
AGND
AGND
AGND
TEST0 105 1
RP24 C271 R221
5 4 1394_GPIO3 5.11K_0402_1%
6 3 1394_GPIO2 220P_0402_50V7K
8
9
109
110
111
117
126
127
128
17
23
30
33
44
55
64
68
75
83
93
103
1394_SCL 2
7 2
2
8 1 1394_SDA
220_1206_8P4R_5%
+3VS
1 1 PC1
C561 C577
0_0402_5% 1 2 R614 R615 2 1 4.7K_0402_5%
CLK_PCI_1394 0.1U_0402_16V4Z @
2 2 0.1U_0402_16V4Z
A A
1
1
C565
2005/01/24 Compal Electronics, Inc.
Title
@ 10P_0402_50V8K
2 TI TSB43AB21A 1394A CONTROLLER
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom EFL50 LA-2761 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Wednesday, April 20, 2005 Sheet 24 of 51
5 4 3 2 1
5 4 3 2 1
1
Q5 5788@ BCP69_SOT223
System can wake on LAN 10U_0805_10V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z BCP69_SOT223 +2.5V_LAN +1.2V_LAN
( keep Low when Power On)
60mils
1 1 1 1 1 1 1 +3V_LAN
1
S
G C114 C119 3 2 10U_0805_10V4Z 0.1U_0402_16V4Z 3 2 0.1U_0402_16V4Z
EN_WOL# 2 R129 C111 C99 C52 C415 C417 4 1 1 1 1 1 4 1 1
33 EN_WOL#
0_1206_5% C66 C411 C408 C410 C409 C406
Q11 D 2 2 2 2 2 2 2 C407
1
VGS(th) = -0.45V SI2301DS_SOT23 10U_0805_10V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
2
@ 2 2 2 2 2 2 2
IDmax = 2.3A 10U_0805_10V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 10U_0805_10V4Z
+3V_LOM_PCI
D
+3V_LAN
20mils +1.2V_LAN
D
2
ONBD_LAN_PME# A6 D10 LAN_RDAC 1 2 L9
33 ONBD_LAN_PME# PME RDAC 0.1U_0402_16V4Z
10mils R400 1.24K_0402_1%
0_0603_5% 5788@ R93 R89 5788@
+3V_LAN 4.7K_0402_5% 4.7K_0402_5%
U10 U9
A10 LAN_A10 1 2 +3V_LAN LAN_EEDA 1 8 8 VCC 1
1
NC_A10 LAN_C9 R84 @ 10K_0402_5% LAN_EECLK CS VCC LAN_EEWP A0
NC_C9 C9 1 2 2 SK NC 7 1 7 WP A1 2
R402 @ 10K_0402_5% LAN_EEDI 3 6 LAN_EECLK 6 SCL 3
Y1 LAN_EEDO DI NC C89 LAN_EEDA NC
4 DO GND 5 5 SDA GND 4
LAN_X1 2 1 LAN_X2 BCM5788M_FBGA196 0.1U_0402_16V4Z
A 2 A
AT93C46-10SI-2.7_SO8 4401@ AT24C256_SO8~D
1 25MHZ_20P 1 4401@ 24C256 for BCM5788 5788@
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
LAN BCM5788M
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B EFL50 LA-2761 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Wednesday, April 20, 2005 Sheet 25 of 51
5 4 3 2 1
5 4 3 2 1
+3V_LAN
1 1
C46 C51
RP19
LAN_MIDI3- 1 4 L_LAN_MDI3- 0.1U_0402_16V4Z 0.1U_0402_16V4Z
LAN_MIDI3+ L_LAN_MDI3+ 2 2
56
50
38
27
18
10
2 3
4
U6
ND@ 0_0404_4P2R_5%
VDD6
VDD5
VDD4
VDD3
VDD2
VDD1
VDD0
48 D_LAN_MDI0+
0B1 D_LAN_MDI0+ 38
RP20 47 D_LAN_MDI0-
1B1 D_LAN_MDI0- 38
1
LAN_MIDI2- 1 4 L_LAN_MDI2- R76 25 LAN_MIDI0+ LAN_MIDI0+ 2
LAN_MIDI2+ L_LAN_MDI2+ 49.9_0402_1% A0 D_LAN_MDI1+
2 3 2B1 43 D_LAN_MDI1+ 38
D R73 R79 R83 25 LAN_MIDI0- LAN_MIDI0- 3 42 D_LAN_MDI1- D
A1 3B1 D_LAN_MDI1- 38
ND@ 0_0404_4P2R_5% 49.9_0402_1% 49.9_0402_1% 49.9_0402_1%
37 D_LAN_MDI2+
D_LAN_MDI2+ 38
2
LAN_MIDI1+ 4B1 D_LAN_MDI2-
RP21 25 LAN_MIDI1+ 7 36 D_LAN_MDI2- 38
LAN_MIDI1- L_LAN_MDI1- LAN_MIDI0+ A2 5B1
1 4
LAN_MIDI1+ 2 3 L_LAN_MDI1+ LAN_MIDI0- 25 LAN_MIDI1- LAN_MIDI1- 8 32 D_LAN_MDI3+
A3 6B1 D_LAN_MDI3+ 38
LAN_MIDI1+ 31 D_LAN_MDI3-
7B1 D_LAN_MDI3- 38
ND@ 0_0404_4P2R_5% LAN_MIDI1-
25 LAN_MIDI2+ LAN_MIDI2+ 11 22 D_LAN_ACTIVITY#
A4 0LED1 D_LAN_ACTIVITY# 38
RP22 23 D_LAN_LINK#
1LED1 D_LAN_LINK# 38
LAN_MIDI0- 1 4 L_LAN_MDI0- LAN_MIDI2+ 25 LAN_MIDI2- LAN_MIDI2- 12 52
LAN_MIDI0+ L_LAN_MDI0+ LAN_MIDI2- A5 2LED1
2 3
LAN_MIDI3+ 46 L_LAN_MDI0+
ND@ 0_0404_4P2R_5% LAN_MIDI3- LAN_MIDI3+ 0B2 L_LAN_MDI0-
25 LAN_MIDI3+ 14 A6 1B2 45
1
RP18 25 LAN_MIDI3- LAN_MIDI3- 15 41 L_LAN_MDI1+
LAN_LINK# L_LAN_LINK# R72 R70 5788@ R68 R64 A7 2B2 L_LAN_MDI1-
1 4 3B2 40
LAN_ACTIVITY# 2 3 L_LAN_ACTIVITY# 49.9_0402_1% 49.9_0402_1%
49.9_0402_1% 49.9_0402_1% 5788@ DOCKIN# 17 35 L_LAN_MDI2+
14,21,33,38 DOCKIN# SEL 4B2
ND@ 0_0404_4P2R_5% 5788@ 5788@ 34 L_LAN_MDI2-
2
5B2
LAN_ACTIVITY# 19 30 L_LAN_MDI3+
C39 1 C34 1 25 LAN_ACTIVITY# LAN_LINK# LED0 6B2 L_LAN_MDI3-
25 LAN_LINK# 20 LED1 7B2 29
54 LED2
25 L_LAN_ACTIVITY#
0.1U_0402_16V4Z 0.1U_0402_16V4Z 0LED2 L_LAN_LINK#
1LED2 26
5788@ 2 5788@ 2 51
2LED2
5 NC
GND10
GND11
GND12
GND13
GND0
GND1
GND2
GND3
GND4
GND5
GND6
GND7
GND8
GND9
C C
1
6
9
13
16
21
24
28
33
39
44
49
53
55
W D@
+2.5V_LAN
LAN BCM5788M/BCM4401KFB
JP19
24ST0023-3(SP050004200) for BCM4401(10/100) +3V_LAN 1 2 R90 LAN_LED_ACTIVE 1 Yellow LED+
300_0603_5%
24HST1041A-3(SP050002110) for BCM5788M(GbE) L_LAN_ACTIVITY# 2 Yellow LED-
T1
RJ45_MDI1- 5 RX1-
1 TCT1 MCT1 24
L_LAN_MDI0+ 2 23 RJ45_MDI0+ RJ45_MDI1+ 8
L_LAN_MDI0- TD1+ MX1+ RJ45_MDI0- RX1+
3 TD1- MX1- 22
RJ45_MDI0- 9 TX1-
4 TCT2 MCT2 21
L_LAN_MDI1+ 5 20 RJ45_MDI1+ RJ45_MDI0+ 10
L_LAN_MDI1- TD2+ MX2+ RJ45_MDI1- TX1+
6 TD2- MX2- 19
RJ45_MDI3- 3 RX2-
7 TCT3 MCT3 18
L_LAN_MDI2+ 8 17 RJ45_MDI2+ RJ45_MDI3+ 4
L_LAN_MDI2- TD3+ MX3+ RJ45_MDI2- RX2+
9 TD3- MX3- 16
RJ45_MDI2- 6 TX2-
10 TCT4 MCT4 15 SGND1 15
B L_LAN_MDI3+ RJ45_MDI3+ RJ45_MDI2+ B
11 TD4+ MX4+ 14 7 TX2+
L_LAN_MDI3- 12 13 RJ45_MDI3- 16
TD4- MX4- L_LAN_LINK# SGND2
12 Green LED-
RJ11_2
RJ11
0.01U_0402_16V7K MOLEX_53398-0290 TYCO_1770365-1
2 2 0.01U_0402_16V7K
2 2
0.01U_0402_16V7K
4401@
RJ45_MDI3+ R94 1 2 0_0402_5% RJ45_GND 1 2 1 LANGND
RJ45_MDI3- R91 1 0_0402_5%
2 4401@ 1
C64 C62
RJ45_MDI2+ R106 1 2 4401@
0_0402_5% 1000P_1206_2KV7K 0.1U_0402_16V4Z C67
2
RJ45_MDI2- R102 1 2 4401@
0_0402_5% 4.7U_0805_10V4Z
2
1
R126 R138
75_0402_1% 75_0402_1%
2
RJ45_GND
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
LAN Magnetic & RJ45/RJ11
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B EFL50 LA-2761 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Wednesday, April 20, 2005 Sheet 26 of 51
5 4 3 2 1
A B C D E
1 1
PCI_AD[0..31]
PCI_AD[0..31] 16,22,24,25,28
MINI_PCI SOCKET
JP35
TIP 1 2 RING
1 2
3 3 4 4
LAN RESERVED 5 6
5 6
7 7 8 8
D10 9 10 LAN RESERVED
2S@RB751V_SOD323 9 10
11 11 12 12
WL_ON 1 2 13 14
+3VS_MINIPCI1 28,33 WL_ON 13 14
15 15 16 16
L29 PCI_PIRQH# 17 18 W=30mils
16,28 PCI_PIRQH# 17 18 +5VS_MINIPCI1
1 2 19 20 PCI_PIRQG#
+3VS 0_0603_5% 19 20 PCI_PIRQG# 16,28
W= 40mils 21 21 22 22 +3VS_MINIPCI1
2S@ 23 24 W=40mils
23 24 +3V
CLK_PCI_MINI1 25 26 PCI_RST# L26
13 CLK_PCI_MINI1 25 26 PCI_RST# 16,22,24,25,28,32,33
27 27 28 28 1 2 +3VS
PCI_REQ#1 29 30 PCI_GNT#1 W= 40mils 0_0603_5%
16,28 PCI_REQ#1 29 30 PCI_GNT#1 16,28
31 32 2S@
PCI_AD31 31 32 WLANPME#
33 33 34 34 WLANPME# 28,33
2 CLK_PCI_MINI1 PCI_AD29 35 36 WLAN_BT_CLK 2
35 36 WLAN_BT_CLK 28,34
37 38 PCI_AD30
37 38
1
PCI_AD27 39 40
R544 PCI_AD25 39 40 PCI_AD28
41 41 42 42
@ 33_0402_5% WLAN_BT_DATA 43 44 PCI_AD26
28,34 WLAN_BT_DATA 43 44
PCI_C/BE#3 45 46 PCI_AD24
16,22,24,25,28 PCI_C/BE#3 45 46
PCI_AD23 47 48 MINI_IDSEL11 2 PCI_AD18 IDSEL : PCI_AD18
2
47 48 R281 2S@100_0402_5%
49 49 50 50
1 PCI_AD21 51 52 PCI_AD22
PCI_AD19 51 52 PCI_AD20
53 53 54 54
C566 55 56
55 56 PCI_PAR 16,22,24,25,28
@ 10P_0402_50V8J PCI_AD17 57 58 PCI_AD18
2 PCI_C/BE#2 57 58 PCI_AD16
16,22,24,25,28 PCI_C/BE#2 59 59 60 60
P CI_IRDY# 61 62
16,22,24,25,28 PCI_IRDY# 61 62 PCI_FRAME#
63 63 64 64 PCI_FRAME# 16,22,24,25,28
PM_CLKRUN# 65 66 PCI_TRDY#
18,24,25,28,32,33 PM_CLKRUN# 65 66 PCI_TRDY# 16,22,24,25,28
PCI_SERR# 67 68 PCI_STOP#
16,22,24,25,28 PCI_SERR# 67 68 PCI_STOP# 16,22,24,25,28 +5VS_MINIPCI1
69 69 70 70
PCI_PERR# 71 72 PCI_DEVSEL# 1 2 2 1
16,22,24,25,28 PCI_PERR# 71 72 PCI_DEVSEL# 16,22,24,25,28
PCI_C/BE#1 73 74
16,22,24,25,28 PCI_C/BE#1 PCI_AD14 73 74 PCI_AD15 C381 C327 C364 C315
75 75 76 76
77 78 PCI_AD13 1000P_0402_50V7K 0.1U_0402_16V4Z 0.1U_0402_16V4Z 10U_1206_16V4Z
PCI_AD12 77 78 PCI_AD11 2 1 1 2 2S@
79 79 80 80
PCI_AD10 81 82 2S@ 2S@ 2S@
81 82 PCI_AD9
83 83 84 84
PCI_AD8 85 86 PCI_C/BE#0
PCI_AD7 85 86 PCI_C/BE#0 16,22,24,25,28
87 87 88 88
89 90 PCI_AD6
PCI_AD5 89 90 PCI_AD4
91 91 92 92
3 PCI_AD2 3
93 93 94 94
PCI_AD3 95 96 PCI_AD0
W=30mils 95 96
+5VS_MINIPCI1 97 97 98 98
PCI_AD1 99 100
99 100 +3VS_MINIPCI1
101 101 102 102
103 103 104 104 2 2 2 2 2 1
105 105 106 106
107 108 C355 C352 C345 C334 C330 C331
107 108 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 10U_1206_16V4Z
109 109 110 110
1 1 1 1 1 2 2S@
111 111 112 112
113 114 2S@ 2S@ 2S@ 2S@ 2S@
113 114
115 115 116 116
117 117 118 118
119 119 120 120
121 121 122 122
1 2 W=30mils 123 124 W=20mils
+5VS 123 124 +3V
L30 2S@ 0_0603_5% 2
0603 QTC_C102A-040B31-4 C378
2S@ 2S@ 0.1U_0402_16V4Z
+5VS_MINIPCI1 1
4 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Mini PCI Slot
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
EFL50 LA-2761 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Wednesday, April 20, 2005 Sheet 27 of 51
A B C D E
A B C D E
1 1
PCI_AD[0..31]
PCI_AD[0..31] 16,22,24,25,27
MINI_PCI SOCKET
JP18
TIP 1 2 RING
1 2
3 3 4 4
LAN RESERVED 5 6
5 6
7 7 8 8
D4 9 10 LAN RESERVED
1S@RB751V_SOD323 9 10
11 11 12 12
+3VS_MINIPCI2 27,33 WL_ON 1 2 13 13 14 14
15 15 16 16
L12 PCI_PIRQH# 17 18 W=30mils
16,27 PCI_PIRQH# 17 18 +5VS_MINIPCI2
1 2 19 20 PCI_PIRQG#
+3VS 0_0603_5% 19 20 PCI_PIRQG# 16,27
W= 40mils 21 21 22 22 +3VS_MINIPCI2
1S@ 23 24 W=40mils
23 24 +3V
CLK_PCI_MINI2 25 26 PCI_RST# L18
13 CLK_PCI_MINI2 25 26 PCI_RST# 16,22,24,25,27,32,33
27 27 28 28 1 2 +3VS
29 30 W= 40mils 0_0603_5%
16,27 PCI_REQ#1 29 30 PCI_GNT#1 16,27
31 32 1S@
PCI_AD31 31 32
33 33 34 34 WLANPME# 27,33
2 CLK_PCI_MINI2 PCI_AD29 35 36 2
35 36 WLAN_BT_CLK 27,34
37 38 PCI_AD30
37 38
1
PCI_AD27 39 40
R390 PCI_AD25 39 40 PCI_AD28
41 41 42 42
@ 33_0402_5% 43 44 PCI_AD26
27,34 WLAN_BT_DATA 43 44
45 46 PCI_AD24
16,22,24,25,27 PCI_C/BE#3 45 46
PCI_AD23 47 48 MINI_IDSEL21 2 PCI_AD18 IDSEL : PCI_AD18
2
47 48 R81 1S@100_0402_5%
49 49 50 50
1 PCI_AD21 51 52 PCI_AD22
PCI_AD19 51 52 PCI_AD20
53 53 54 54
C403 55 56
55 56 PCI_PAR 16,22,24,25,27
@ 10P_0402_50V8J PCI_AD17 57 58 PCI_AD18
2 57 58 PCI_AD16
16,22,24,25,27 PCI_C/BE#2 59 59 60 60
16,22,24,25,27 PCI_IRDY# 61 61 62 62
63 63 64 64 PCI_FRAME# 16,22,24,25,27
18,24,25,27,32,33 PM_CLKRUN# 65 65 66 66 PCI_TRDY# 16,22,24,25,27
16,22,24,25,27 PCI_SERR# 67 67 68 68 PCI_STOP# 16,22,24,25,27 +5VS_MINIPCI2
69 69 70 70
16,22,24,25,27 PCI_PERR# 71 71 72 72 PCI_DEVSEL# 16,22,24,25,27 1 2 2 1
16,22,24,25,27 PCI_C/BE#1 73 73 74 74
PCI_AD14 75 76 PCI_AD15 C137 C164 C23 C156
75 76 PCI_AD13 1000P_0402_50V7K 0.1U_0402_16V4Z 0.1U_0402_16V4Z 10U_1206_16V4Z
77 77 78 78
PCI_AD12 PCI_AD11 2 1S@ 1 1S@ 1 1S@ 2 1S@
79 79 80 80
PCI_AD10 81 82
81 82 PCI_AD9
83 83 84 84
PCI_AD8 85 86
PCI_AD7 85 86 PCI_C/BE#0 16,22,24,25,27
87 87 88 88
89 90 PCI_AD6
PCI_AD5 89 90 PCI_AD4
91 91 92 92
3 PCI_AD2 3
93 93 94 94
PCI_AD3 95 96 PCI_AD0
W=30mils 95 96
+5VS_MINIPCI2 97 97 98 98
PCI_AD1 99 100
99 100 +3VS_MINIPCI2
101 101 102 102
103 103 104 104 2 2 2 2 2 1
105 105 106 106
107 108 C24 C32 C125 C127 C45 C69
107 108 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 10U_1206_16V4Z
109 109 110 110
1 1S@ 1 1S@ 1 1S@ 1 1S@ 1 1S@ 2 1S@
111 111 112 112
113 113 114 114
115 115 116 116
117 117 118 118
119 119 120 120
121 121 122 122
1 2 W=30mils 123 124 W=20mils
+5VS 123 124 +3V
L6 1S@ 0_0603_5% 2
0603 QTC_C102A-040B31-4 C26
1S@ 0.1U_0402_16V4Z
+5VS_MINIPCI2 1 1S@
4 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Mini PCI Slot
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
EFL50 LA2761 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Wednesday, April 20, 2005 Sheet 28 of 51
A B C D E
A B C D E F G H
+3V +VDDA
C560
1 2 0.1U_0402_16V4Z
1
28.7K for Module Design (VDDA = 4.702)
R326
U34A 10K_0402_5%
(output = 250 mA)
14
SN74LVC14APWLE_TSSOP14 +5VS +5VAMP
C550 C366 U44
60mil 40mil
2
R530 1U_0402_6.3V4Z L42 1
33 BEEP# 1 I O 2 2 1 1 2 2 4 VIN VOUT 5 +VDDA
560_0402_5% 2 1 KC FBM-L11-201209-221LMAT_0805
2
1U_0402_6.3V4Z L37 1 2 2 6 1 4.85V
DELAY SENSE or ADJ
1
1 KC FBM-L11-201209-221LMAT_0805 1
7
1 R321 C634 C643 7 1 R603 C637 1
10K_0402_5% ERROR CNOISE 150K_0603_1% 10U_0805_10V4Z
10U_0805_10V4Z 2
8 3 1
1
2 2 SD GND C650
2
+3V C367 10U_1206_16V4Z SI9182DH-AD_MSOP8
1
1 2 MONO_IN
2
14
1U_0402_6.3V4Z R601
1
C549 C 1 2 0.1U_0402_16V4Z 51K_0603_1%
P
R529 Q20
3 4 2 1 1 2 2 R323
2
22 PCM_SPK# I O B
560_0402_5% 2SC2411K_SC59 2.4K_0402_5%
G
U34B 1000P_0402_50V7K E
3
SN74LVC14APWLE_TSSOP14
7
C552
R528
2 1 1 2
560_0402_5%
1
1U_0402_6.3V4Z
+3V D27 +AUD_VREF 1 2
R527 RB751V_SOD323 R583 0_0603_5%
10K_0402_5%
14
10mil
2
1 1 1 2
P
5 6 R580 0_0603_5%
18 SB_SPKR I O C640 C629
G
R608 0_0603_5%
2 2
+AVDD_AC97
0.1U_0402_16V4Z
GND GNDA
+3VS
L36
1 2 0.1U_0402_16V4Z 1 1 1
+VDDA
FBM-L10-160808-301-T_0603 1 1 1 C596
C628 C627 C597 C592
C638 10U_1206_16V4Z
10U_0805_10V4Z 2 2 2
25
38
9
2 2 2
1 1
0.1U_0402_16V4Z 0.1U_0402_16V4Z
AVDD1
AVDD2
DVDD1
DVDD2
C625 C626
1000P_0402_50V7K 1000P_0402_50V7K
2 2
C602 1 2 1U_0603_10V4Z AUDIO_AUX_L 14 35 250_LINE_OUTL C635 1 2 4.7U_0805_10V4Z LINE_OUTL
AUX_L LINE_OUT_L LINE_OUTL 31
C601 1 2 1U_0603_10V4Z AUDIO_AUX_R 15 36 250_LINE_OUTR C636 1 2 4.7U_0805_10V4Z LINE_OUTR
AUX_R LINE_OUT_R LINE_OUTR 31
R319 1 2 0_0402_5% 16 37
31,33 NBA_PLUG_M JD2 MONO_OUT/VREFOUT3
NBA_PLUG 17 39
31 NBA_PLUG JD1 HP_OUT_L 27P_0402_50V8J
LINE_IN_L_AC 23 41 C595 1 2
30 LINE_IN_L_AC LINE_IN_L HP_OUT_R
30 LINE_IN_R_AC
LINE_IN_R_AC 24 R578
R320 20K_0402_5% CD_R_L LINE_IN_R 250_BIT_CLK
20 INT_CD_L 2 1 BIT_CLK 6 1 2 22_0402_5% ICH_AC_BITCLK
ICH_AC_BITCLK 17,34
R318 2 1 6.8K_0402_5% C368 1 2 1U_0402_6.3V4Z CD_RC_L 18
3 R328 6.8K_0402_5% CD_L 250_SDIN R311 1 3
2 1 SDATA_IN 8 2 22_0402_5% ICH_AC_SDIN0
ICH_AC_SDIN0 17
R324 2 1 20K_0402_5% CD_R_R C369 1 2 1U_0402_6.3V4Z CD_RC_R 20
20 INT_CD_R CD_R
2 250_XTL_IN 1 2 CLK_14M_CODEC
XTL_IN CLK_14M_CODEC 13
CD_GNA C607 1 2 1U_0603_10V4Z CD_GNDA 19 R310
CD_GND 0_0402_5%
+AUD_VREF MIC 1 2 C_MIC 21
31 MIC MIC1 1
C612 1U_0603_10V4Z
1 2 C_MIC2 22 3 C362
C613 1U_0603_10V4Z MIC2 XTL_OUT
22P_0402_50V8J
MDC_RC_SPK C375 1 2
1 2 13 PHONE AFILT1 29 2 1000P_0402_50V7K @
1
@ C365 0.1U_0402_16V4Z
MONO_IN 12 30 C374 1 2 1000P_0402_50V7K
R332 PC_BEEP AFILT2
2.2K_0402_5% 28
VREFOUT +AUD_VREF
@ ICH_AC_RST# 11
17,34 ICH_AC_RST#
2
SCK 44
R317 SPDIFO 48
0_0402_5% 31 SPDIFO SPDIFO
NC 40
4 DVSS1 AVSS1 26
1
4 DVSS2 AVSS2 4
20K_0402_5% R322
U40 ALC250-VD_LQFP48 @ 20K_0402_5%
1
R596 R598
2
0_0402_5% 6.8K_0402_5%
DGND AGND
Compal Electronics, Inc.
2
Title
With 14.318Mhz : R321 POP THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AC97 CODEC
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
With 24.576Mhz : R321 DEPOP DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS EFL50 LA2761 0.2
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Wednesday, April 20, 2005 Sheet 29 of 51
A B C D E F G H
5 4 3 2 1
R325 2 1 @ 6.8K_0402_5%
D R333 2 1 @ 6.8K_0402_5% D
31 AUD_INR
C C
B B
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND Audio Line Switch
PROPRIETARY NOTE TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE 0.2
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
EFL50 LA-2761
Date: Wednesday, April 20, 2005 Sheet 30 of 51
5 4 3 2 1
A B C D E
Speaker Conn.
JP9
SPKR+O 4
SPKR-O 4
3 3
+5VAMP SPKL+O 2 JP42
SPKL-O 2 SPKR+O R634 0_0603_5%
W=40mil 1 1 SPKR-O R635
1 2
0_0603_5%
4 4
1 2 3 3
ACES_85205-0400 SPKL+O R636 1 2 0_0603_5% 2
RIN C648 2
1 2 100P_0603_50V8J SPKR+ 1 1 SPKL-O R637 1 2 0_0603_5% 1 1
1 1
C363 C603 ACES_85205-0400
R638
R348 1 2 33K_0402_5% 0.1U_0402_16V4Z 4.7U_0805_10V4Z
2 2 EC_MUTE
1 2 EC_MUTE 33
1 1K_0402_5%
L IN C649 1 2 100P_0603_50V8J SPKL+
C695
2
0.1U_0402_16V4Z 0419
R347 1 2 33K_0402_5%
U41
1
LINE_OUTR 1 2 RIGHT_2 R346 1 2 10K_0402_5% 3 SPKR+ L43 1 2 FBM-11-160808-700T_0603 SPKR+O
29 LINE_OUTR C644 0.47U_0603_16V4Z RIN ROUT+ SPKL+ L44 FBM-11-160808-700T_0603 SPKL+O R338
2 RIN LOUT+ 6 1 2
LINE_OUTL 1 2 LEFT_2 R345 1 2 10K_0402_5% L IN 7 15 SPKR- L45 1 2 FBM-11-160808-700T_0603 SPKR-O 100K_0402_5%
29 LINE_OUTL LIN ROUT-
1
C645 0.47U_0603_16V4Z 11 SPKL- L46 1 2 FBM-11-160808-700T_0603 SPKL-O MIC_S -->ON Channel
AMP_MUTE LOUT- -------------------------
33 AMP_MUTE 12
2
100K_0402_5% 2 MUTE
+5VAMP 1 R314 NBA_PLUG 14 SE/BTL# GND 4 R337 L -->B1
1 5 2.2K_0402_5% H --->B2
RBYPASS GND
29 NBA_PLUG 8 13 Docking MIC
2
LBYPASS GND U24
1
1
R313 APA2066KAI-TRL_SOP16 AUD_MIC2 1 6 DOCK_MIC_S
100K_0402_5% C621 B2 S
2 GND VCC 5 +VDDA
4.7U_0805_10V4Z AUD_MIC1 3 4
2 B1 A MIC 29
1
2
SN74LVC1G3157DCKR_SC70-6
C380
220P_0402_50V7K R342 1 2 2@0_0402_5%
2 2 2
NBA_PLUG_S
Docking : MIC plug ---> HIGH
R316 Docking : MIC Unplug ---> LOW
+5VAMP 1 2 Q37
1
10K_0402_5% 2N7002_SOT23 D
JP38 NBA_PLUG_S# 2
29 SPDIFO
SPDIFO
HP_S
1
2
1
G
S
HeadPhone JACK
3
DOCK_MIC_S 2
3 3
SPKR+ 4
SPKL+ 4
5 5
AGND 6 FBM-11-160808-700T_0603 JP40
AUD_MIC2 6 150U_D2_6.3VM 47_0402_5% L35
7 7 1
AGND 8 SPKL+ C608 1 2 INTSPK_L1-2 1 2 INTSPK_L1-31 2 INTSPK_L1-4 2
AUD_INR 8 R591
9 6
+
30 AUD_INR 9
AUD_INL 10 SPKR+ C622 1 2 INTSPK_R1-2 1 2 INTSPK_R1-31 2 INTSPK_R1-4 3
30 AUD_INL 10 R604 L38
+
ACES_87212-1000 150U_D2_6.3VM 47_0402_5% FBM-11-160808-700T_0603 NBA_PLUG_S# 5
1
R589 R607 C379 C382 4
1K_0402_5% 330P_0402_50V7K 330P_0402_50V7K 7
@ 29 SPDIFO
@ 1K_0402_5% @ +5VSPDIF 8
ACES_87213-1200 10
2
SPDIFO 12 NBA_PLUG_S#
29 SPDIFO 12
HP_S 11 9
11
2
G
DOCK_MIC_S 10
SPKR+ 10 FOX_2F11381-SJ5-TR
9 9
SPKL+ 8 LINE_IN_R L39 1 2 LINE_IN_R-1 +5VS 3 1 +5VSPDIF
3 AGND 8 30 LINE_IN_R FBM-11-160808-700T_0603 3
D
7
S
AUD_MIC2 7 LINE_IN_L L40 1 LINE_IN_L-1
6 2
AGND
AUD_INR
5
6
5
30 LINE_IN_L FBM-11-160808-700T_0603 0304 NDS352AP_SOT23
30 AUD_INR 4 4 Q38
AUD_INL 3
30 AUD_INL 3
NBA_PLUG_S 2 NBA_PLUG_M
2 29,33 NBA_PLUG_M
+5VSPDIF 1 1 R602 +AUD_VREF
JP37 +5VAMP 1 2 Q42
1
10K_0402_5% 2N7002_SOT23 D
NBA_PLUG_MP 2
G NBA_PLUG_MP
MIC JACK
1
S JP41
3
5
R350 R351
+5VAMP +5VAMP 2.2K_0402_5% @ 2.2K_0402_5% 4
2
JP10 MIC1 LINE_IN_R-1 3
C651
2
1 INT_MIC1 6
R349 INT_MIC1 1 AUD_MIC1 LINE_IN_L-1
1 2 2 2 1 2 2
100K_0402_5% 1 L41 1
0.1U_0402_16V4Z WM-64PCY_2P FBM-11-160808-700T_0603 1 1
MOLEX_53398-0290 C384
1
5
NBA_PLUG I0 2 2
4 O
1 HP_S
I1
G
TC7SH32FU_SSOP5
3
4 4
2
R352
100K_0402_5%
1
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AMP & Audio Jack
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS EFL50 LA-2761
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. B
Date: Wednesday, April 20, 2005 Sheet 31 of 51
A B C D E
A B C D E
1 1 1 1
LPC_AD[0..3] C7 C12 C18 C19
+3VS 17,33 LPC_AD[0..3]
4.7U_0805_10V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
2 2 2 2
R51 1 2 10K_0402_5% SIO_PD#
U3
LPC_AD0 10 62 RXD
LAD0 RXD1 RXD 38
LPC_AD1 TXD
SERIAL I/F
12 LAD1 TXD1 63 TXD 38
LPC_AD2 13 64 DSR#
LAD2 DSR1# DSR# 38
LPC_AD3 14 1 RTS#
LAD3 RTS1# RTS# 38
2 CTS#
CTS1# CTS# 38
LPC_FRAME# 15 3 DTR#
17,33 LPC_FRAME# LFRAME# DTR1# DTR# 38
LPC_DRQ#1 16 4 R I# +3VS
17 LPC_DRQ#1 LDRQ# RI1# RI# 38
LPC I/F
5 DC D#
DCD1# DCD# 38
R50 1 2 @ 0_0402_5% 17
16,22,24,25,27,28,33 PCI_RST# R49 0_0402_5% SIO_PD# PCI_RESET# IRRX
1 2 18 LPCPD# 37 IRRX 37
FIR IRRX2
2
6,16,18,20,33,41 PLT_RST# 38 IRTXOUT
IRTX2 IRTXOUT 37
PM_CLKRUN# 19 39 IRMODE R44
18,24,25,27,28,33 PM_CLKRUN# CLKRUN# IRMODE/IRRX3 IRMODE 37
CLK_PCI_SIO 20 @ 10K_0402_5%
13 CLK_PCI_SIO PCI_CLK
SIO_IRQ R36 2 1 10K_0402_5% SERIRQ 21 41 LPTINIT#
18,22,33 SERIRQ SER_IRQ INIT# LPTINIT# 38
SIO_PME# 6 42 LPTSLCTIN# Base I/O Address
33 SIO_PME# LPTSLCTIN# 38
1
IRRX R35 IO_PME# SLCTIN#
1 2 10K_0402_5% PD0 44 LPD0
CLK_SIO_14M 9 46 LPD1 0 *= 02Eh
13 CLK_14M_SIO CLK14 PD1 LPD2 SIO_GPIO11
CLOCK PD2 47 1 = 04Eh
23 48 LPD3
GPIO40 PD3
2
PARALLEL I/F
24 49 LPD4
GPIO41 PD4 LPD5 R46
25 GPIO42 PD5 50
27 51 LPD6 1K_0402_5%
GPIO43 PD6 LPD7
GPIO
28 GPIO44 PD7 53
CLK_SIO_14M CLK_PCI_SIO 29 55 LPTSLCT
LPTSLCT 38
1
GPIO45 SLCT LPTPE
30 GPIO46 PE 56 LPTPE 38
2
31 57 LPTBUSY
GPIO47 BUSY LPTBUSY 38
2 R33 32 58 LPTACK# 2
GPIO10 ACK# LPTACK# 38
@ 10K_0402_5% R52 SIO_GPIO11 33 59 LPTERR#
GPIO11/SYSOPT ERROR# LPTERR# 38
@ 10_0402_5% SIO_SMI# 34 60 AFD#/3M#
GPIO12/IO_SMI# ALF# AFD#/3M# 38
SIO_IRQ 35 61 R_LPTSTB#
R_LPTSTB# 38
1
GPIO13/IRQIN1 STROBE#
1 1 36 GPIO14/IRQIN2
C17 40
@ 15P_0402_50V8J C20 GPIO23
@ 15P_0402_50V8J 8 7 +3VS
2 2 VSS VTR
22 VSS VCC 11 1
43 VSS POWER VCC 26
52 45 C15
VSS VCC 0.1U_0402_16V4Z
VCC 54 +3VS 2 +5VS
LPC47N217_STQFP64
+5V_PRN JP15
1
RXD 2
TXD 3
+5VS 2 1 4
D2 DSR#
RB420D_SOT23 RTS# 5
CTS# 6
1@ 7
DTR#
+5V_PRN R I# 8
DC D# 9
10
@ ACES_85201-1005
3 3
R22 1 2 @ 2.7K_0402_5% LPTSLCT
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
LPC-Super I/O 217
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
EFL50 LA2751 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Wednesday, April 20, 2005 Sheet 32 of 51
A B C D E
5 4 3 2 1
+3VALW
+3VALW
2
KBA[0..19] R304
KBA[0..19] 35 L28 0_0402_5% For EC Tools
ADB[0..7] 0.1U_0402_16V4Z 0.1U_0402_16V4Z 1 2
ADB[0..7] 35 +5VALW
1 1 C351 1 1 2 2 FBM-L11-160808-800LMT_0603
1
C342 @
1
C350 C354 C340 C333 ACES_85205-0400
1000P_0402_50V7K 1000P_0402_50V7K C332 1 1 1
L27 2 2 2 2 1 1 C353 C356 EC_TCK 1
2 2
ECAGND
ECAGND 0.1U_0402_16V4Z 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z EC_TDO
1 2 3 3
FBM-L11-160808-800LMT_0603 0.1U_0402_16V4Z 1U_0603_10V4Z 4
2 2 4
D D
JP33
123
136
157
166
161
159
16
34
45
95
96
U20
LPC_AD0 15 KSI[0..7]
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCA
AGND
VCCBAT
BATGND
17,32 LPC_AD0 LAD0 KSI[0..7] 34,39
C338 LPC_AD1 14 49 KSO0
17,32 LPC_AD1 LAD1 GPOK0/KSO0 KSO[0..15]
@ 22P_0402_50V8J LPC_AD2 13 50 KSO1
17,32 LPC_AD2 LAD2 GPOK1/KSO1 KSO[0..15] 34
2 1 R285 2 1 @ 33_0402_5% LPC_AD3 10 51 KSO2
17,32 LPC_AD3 LAD3 GPOK2/KSO2
LPC_FRAME# KSO3
17,32 LPC_FRAME#
LRST#
9 LFRAME# LPC Interface GPOK3/KSO3 52
KSO4
165 LRST#/GPIO2C GPOK4/KSO4 53
ENE-KB910-B4
18 56 KSO5
13 CLK_PCI_LPC LCLK GPOK5/KSO5
7 57 KSO6 Analog Board ID definition,
18,22,32 SERIRQ SERIRQ GPOK6/KSO6
25 58 KSO7
18,24,25,27,28,32 PM_CLKRUN# CLKRUN#/GPIO0C * GPOK7/KSO7 Please see page 3.
24 59 KSO8
+3VALW LPCPD#/GPIO0B * GPOK8/KSO8 KSO9
GPOK9/KSO9 60
FR D# 150 61 KSO10 +3VALW
35 FRD# RD# GPOK10/KSO10
FW R# KSO11
Internal Keyboard
2 35 FWR# 151 WR# GPOK11/KSO11 64
FSEL# 173 65 KSO12
35 FSEL# MEMCS# GPOK12/KSO12
R305 SELIO# 152 66 KSO13
IOCS# GPOK13/KSO13
2
10K_0402_5% ADB0 138 67 KSO14
ADB1 D0 GPOK14/KSO14 KSO15 R274
139 D1 GPOK15/KSO15 68
ADB2 140 153 KSO16 Ra 100K_0402_5%
KSO16 39
1
1
R303 0_0402_5% ADB5 D4 KSI0 AD_BID0
27,28 WLANPME# 1 2 145 D5 GPIK0/KSI0 71
X-BUS Interface
R299 1 2 0_0402_5% EC_PME# ADB6 146 72 KSI1
32 SIO_PME# D6 GPIK1/KSI1
2
ADB7 147 73 KSI2 1
KBA0 D7 GPIK2/KSI2 KSI3 R275 C329
124 A0 GPIK3/KSI3 74
KBA1 125 77 KSI4 Rb
R277 1 0_0402_5% ENBKL KBA2 A1/XIOP_TP GPIK4/KSI4 KSI5 0_0402_5% 0.1U_0402_16V4Z
8,15 GMCH_ENBKL 2 126 A2 GPIK5/KSI5 78
KBA3 KSI6 2
127 79
1
C KBA4 A3 GPIK6/KSI6 KSI7 C
128 A4/DMRP_TP GPIK7/KSI7 80
R573 1 2 @ 0_0402_5% LRST# KBA5 131
16,22,24,25,27,28,32 PCI_RST# KBA6 A5/EMWB_TP INVT_PWM +3VALW
132 A6 GPOW0/PWM0 32 INVT_PWM 15
R572 1 2 0_0402_5% KBA7 133 33 BEEP#
6,16,18,20,32,41 PLT_RST# A7 GPOW1/PWM1 BEEP# 29
KBA8 143 36
A8 FAN2PWM/GPOW2/PWM2
2
KBA9 142 37 ACOFF
A9 GPOW3/PWM3 ACOFF 42,43
KBA10 135 Pulse Width GPOW4/PWM4 38 R279
KBA11 A10 EC_ON 10K_0402_5%
134 A11 GPOW5/PWM5 39 EC_ON 39
+3VALW KBA12 130 40 EC_LID_OUT#
A12 GPOW6/PWM6 EC_LID_OUT# 18
SKU ID definition, KBA13 129 43 EC_MUTE
EC_MUTE 31
1
KBA14 A13 FAN1PWM/GPOW7/PWM7 D11 CH751H-40_SC76
121
Please see page 3. KBA15 120
A14
2 ON /OFF
A15 GPWU0 ON/OFF 39
2
KBA16 113 26 2 1
A16 GPWU1 ACIN 42
R258 KBA17 112 29
100K_0402_5% KBA18 A17 GPWU2 PM_SLP_S3#
Rc 104 A18 GPWU3 30 PM_SLP_S3# 18 ACIN1 18
KBA19 103 Wake Up Pin 44 PM_SLP_S5#
A19 GPWU4 PM_SLP_S5# 18
108 76 EN_BT#
EN_BT# 34,39
1
2
+3VALW BKOFF# 28 174
15 BKOFF# GPIO0E GPODA7/DA7 EZ_PERST# 38
RP26 FSTCHG 48 R312
43 FSTCHG GPIO10
1 8 EC_SMI# EC_SMI# 62 85 PWR_LED#
18 EC_SMI# GPIO13 * GPIO18/XIO8CS# PWR_LED# 34,39
2 7 FR D# 63 86 PWR_SUSP_LED# 0_0402_5%
20 IDE_LED# GPIO14 * GPIO19/XIO9CS# PWR_SUSP_LED# 34,39
3 6 SELIO# 69 91 BATT_FULL_LED#
34,39 EN_WL# BATT_FULL_LED# 34,39
1
FSEL# GPIO15 * GPIO1A/XIOACS# BATT_CHGI_LED#
4 5 18 EC_SWI# 70 GPIO16 GPIO * GPIO1B/XIOBCS# 92 BATT_CHGI_LED# 34,39
75 Expanded I/O * GPIO1C/XIOCCS# 93 WL_ON_LED#
25 EN_WOL# GPIO17 WL_ON_LED# 34,39
10K_1206_8P4R_5% PE_REQ1# 109 94 BT_ON_LED# 1 1
+5VALW 13 PE_REQ1# GPIO24 * GPIO1D/XIODCS# BT_ON_LED# 34,39
LID_SW# 118 97 E_MAIL_LED# C359 C358
36 LID_SW# GPIO25 * GPIO1E/XIOECS# E_MAIL_LED# 39
4
RP25 BT_ON# 119 98 MEDIA_LED#
34 BT_ON# GPIO26 * GPIO1F/XIOFCS# MEDIA_LED# 39
10P_0402_50V8J
10P_0402_50V8J
1 8 EC_SMB_CK1 SYSON 148 X1
OUT
IN
37,40,48 SYSON GPIO27 2 2
2 7 EC_SMB_DA1 SUSP# 149 171 FAN_SPEED1
15,35,40 SUSP# GPIO28 GPIO2E/TOUT1/FANFB1 FAN_SPEED1 36
3 6 EC_SMB_CK2 VR_ON 155 12 DPLL_TP
46,47 VR_ON GPIO29 DPLL_TP/GPIO06/FANFB3
4 5 EC_SMB_DA2 156 FANTEST_TP/GPIO05/FAN3PWM 11 TEST_TP
22 CARD_LED# GPIO2A
PE_REQ2#
NC
NC
13 PE_REQ2# 162 GPIO2B
4.7K_1206_8P4R_5% PBTN_OUT# 168 175 EC_THERM#
18 PBTN_OUT# GPIO2D EC_THERM# 18
Timer Pin TOUT2/GPIO2F
3
+5VS 1394PWRON
24 1394PWRON 55 FnLock#/GPIO12 * E51IT0/GPIO00 3 EC_RSMRST# 18
0.1U_0402_16V4Z CAPSLED# 54 4
39 CAPSLED# CapLock#/GPIO011 * E51IT1/GPIO01 EAPD 29
2 1 TP_CLK 2 1 39 NUMLED#
NUMLED# 23 NumLock#/GPIO0A * E51RXD/GPIO21/ISPCLK 106 EC_TCK
4.7K_0402_5% R287 C335 41 107 EC_TDO 32.768KHZ_12.5P_1TJS125DJ2A073
17 PHDD_LED# ScrollLock#/GPIO0F * E51TXD/GPIO22/ISPDAT
2 1 TP_DATA +3VALW 2 1 19 ECRST# MISC CRY2
4.7K_0402_5% R286 47K_0402_5% R284 5 158 R577 1 2 @ 0_0402_5% RTC_CLK
17 EC_GA20 GA20/GPIO02 XCLKI RTC_CLK 18
6 160 CRY1
17 EC_KBRST# KBRST#/GPIO03 XCLKO
31
GND
GND
GND
GND
GND
GND
ECSCI#
+3VALW
A A
KB910Q B4_LQFP176
17
35
46
122
137
167
2 1 KBA1 1 2 ENBKL
1K_0402_5% R292 R278 @ 120K_0402_5%
2 1 KBA4 1 2 DPLL_TP
1K_0402_5% R293 R290 1K_0402_5%
2 1 KBA5 1 2 TEST_TP
1K_0402_5% R295 R291 1K_0402_5%
2 1 LID_SW# Compal Electronics, Inc.
20K_0402_5% R289 Title
2 1 DOCKIN#
10K_0402_5% R260 PROPRIETARY NOTE THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND ENE-KB910
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE EFL50 LA2761 0.2
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Wednesday, April 20, 2005 Sheet 33 of 51
5 4 3 2 1
TO M/B
MDC CONN. +3V
ACES_85201-0605
1
JP14 +5VS
C2 6
1U_0805_25V4Z TP_CLK 5
1 GND1 RES0 2 33 TP_CLK 4
2 TP_DATA
17,29 ICH_AC_SDOUT 3 IAC_SDATA_OUT RES1 4 33 TP_DATA 3
5 GND2 3.3V 6 +3V 2
ICH_AC_SYNC 7 8
17,29 ICH_AC_SYNC IAC_SYNC GND3 1
17 ICH_AC_SDIN1 1 2 ICHAC_SDIN1_MDC 9 IAC_SDATA_IN GND4 10
R13 22_0402_5% 11 12 ICHAC_BITCLK_MDC 1 2 JP5
17,29 ICH_AC_RST# IAC_RESET# IAC_BITCLK ICH_AC_BITCLK 17,29
R14 22_0402_5%
13
14
15
16
17
18
19
20
FOX_QT8A0121-4011~D
13
14
15
16
17
18
19
20
TO M/B
@
Connector for MDC Rev1.5
(EMW80) ACES_85201-1605
<>
16 16
15 15
TP_DATA 14
33 TP_DATA 14
TP_CLK 13
33 TP_CLK 13
+5VS 12 12
KSI[0..7] 11
KSI[0..7] 33,39 11
EN_WL# 10
KSO[0..15] 33,39 EN_WL# 10
EN_BT# 9
KSO[0..15] 33 33,39 EN_BT# 9
WL_ON_LED# 8
33,39 WL_ON_LED# 8
BT_ON_LED# 7
33,39 BT_ON_LED# 7
33,39 PWR_SUSP_LED# 6 6
33,39 PWR_LED# 5 5
KSO8 C215 100P_0402_25V8K KSI7 C238 100P_0402_25V8K 4
33,39 BATT_FULL_LED# 4
33,39 BATT_CHGI_LED# 3 3
KSI3 C217 100P_0402_25V8K KSI6 C236 100P_0402_25V8K +5VALW 2 2
1 1
KSO9 C220 100P_0402_25V8K KSI5 C234 100P_0402_25V8K
JP6
KSI2 C222 100P_0402_25V8K KSO0 C232 100P_0402_25V8K
+3VALW
3
S
Q31
G
33 BT_ON# 2
INT_KBD CONN. D
SI2301BDS_SOT23
1
(Right) ACES_87213-0800
JP4
KSO15 BT_VCC 1
KSO14 24 1
23 2 2
KSO13 USB20_P5 3
22 18 USB20_P5 3
KSO12 USB20_N5 4
21 18 USB20_N5 4
KSI0 5
KSO11 20 5
19 27,28 WLAN_BT_DATA 6 6
KSO10 27,28 WLAN_BT_CLK 7
KSI1 18 7
17 8 8
KSI2
KSO9 16 BT_VCC JP1
KSI3 15
KSO8 14
KSO7 13 C396
1 1
C397
Bluetooth Connector
KSO6 12
KSO5 11 10U_0805_10V4Z 0.1U_0402_16V4Z
KSO4 10 2 2
KSO3 9
KSI4 8
KSO2 7
KSO1 6
KSO0 5
KSI5 4
KSI6 3
KSI7 2
1
(Left) ACES_85201-2405
Compal Electronics, Inc.
Title
MDC / BT / KBD / TP
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
EFL50 LA2761 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Wednesday, April 20, 2005 Sheet 34 of 51
SB_INT_FLASH_SEL# 18
10
KBA[0..19] U22C
33 KBA[0..19]
OE#
ADB[0..7] INT_FLASH_SEL 8 9
33 ADB[0..7] O I SUS_STAT# 18
SN74LVC125APWLE_TSSOP14
+3VALW
2
U42 C614 +3VALW
0.1U_0402_16V4Z +3VALW +3VALW 0.1U_0402_16V4Z
KBA18 1 C377 1
1 NC VCC 32 C372 2
2
KBA16 2 31 FWE#
A16 WE*
1
KBA15 3 30 KBA17 1 2 R335 R330
KBA12 A15 A17 KBA14 100K_0402_5% INT_FLASH_EN# R334 1
4 A12 A14 29 SUSP# 15,33,40 10K_0402_5% 2
KBA7 5 28 KBA13 0.1U_0402_16V4Z
A7 A13
2
KBA6 KBA8 100K_0402_5%
G
6 27
1
A6 A8
5
KBA5 7 26 KBA9 U23
2
A5 A9
4
KBA4 8 25 KBA11 2 1 3 U22B
P
A4 A11 I0 EC_FLASH# 18
KBA3 9 24 FR D# FWE# 4
OE#
KBA2 A3 OE* KBA10 FRD# 33 O INT_FSEL# 1 FSEL#
10 A2 A10 23 I1 1 2 6 O I 5
G
KBA1 11 22 FSEL# Q21 R331 22_0402_5%
KBA0 A1 CE* ADB7 FSEL# 33 TC7SH32FU_SSOP5 2N7002_SOT23
12 21
3
ADB0 A0 DQ7 ADB6
13 DQ0 DQ6 20
ADB1 14 19 ADB5 SN74LVC125APWLE_TSSOP14
DQ1 DQ5 FWR# 33
ADB2 15 18 ADB4
DQ2 DQ4 ADB3
16 VSS DQ3 17
29F040/SST39VF040_PLCC
(CL55)
1
KBA4 17 25 ADB0 @ 0.1U_0402_16V4Z KBA16 KBA17
KBA5 A4 D0 ADB1 2 KBA15 1 2 C361 1
16 A5 D1 26 3 4 2 0.1U_0402_16V4Z R315
KBA6 15 27 ADB2 KBA14
KBA7 A6 D2 ADB3 KBA13 5 6 KBA19 100K_0402_5%
14 A7 D3 28 7 8
KBA8 8 32 ADB4 KBA12 KBA10
2
KBA9 A8 D4 ADB5 KBA11 9 10 ADB7 U21
7 A9 D5 33 11 12
KBA10 36 34 ADB6 KBA9 ADB6 8 1
KBA11 A10 D6 ADB7 KBA8 13 14 ADB5 VCC A0
6 A11 D7 35 15 16 7 WP A1 2
KBA12 5 FWE# ADB4 6 3
A12 17 18 33,45 EC_SMB_CK1 SCL A2
KBA13 4 RESET# +3VALW 5 4
A13 19 20 33,45 EC_SMB_DA1 SDA GND
KBA14 3 10 RESET# 1 2 +3VALW INT_FLASH_EN#
KBA15 A14 RP# R301 INT_FLASH_SEL 21 22 AT24C16AN-10SI-2.7_SO8
2 A15 NC 11 23 24
KBA16 1 12 @ 100K_0402_5% KBA18 ADB3
KBA17 A16 READY/BUSY# KBA7 25 26 ADB2
40 A17 NC0 29 27 28
KBA18 13 38 KBA6 ADB1
KBA19 A18 NC1 KBA5 29 30 ADB0
37 A19 31 32
KBA4 FR D#
33 34
1
INT_FSEL# 22 KBA3
FR D# CE# KBA2 35 36 FSEL# R309
24 OE# GND0 23 37 38
FWE# 9 39 KBA1 KBA0
WE# GND1 39 40 100K_0402_5%
@ SUYIN_80065AR-040G2T
2
SST39VF080-70_TSOP40
@
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
BIOS & EXT. I/O PORT & SATA HDD
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS EFL50 LA-2761
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Wednesday, April 20, 2005 Sheet 35 of 51
FAN Conn
+5VS
VSB
1 2
1
2
5
6
C231 Q15
0.1U_0402_16V4Z D SI3456DV-T1_TSOP6
P
EN_DFAN1 3 G
33 EN_DFAN1 +IN
1 EN_FAN1 3 AO6400
OUT S
2 -IN +VCC_FAN1
4
G
U15A
LM358A_SO8 93/05/16 FAN1 1 2
4
C540 10U_1206_16V4Z
1
1 2
C210 @2200P_0402_50V7K D26 1 2
C543 @1000P_0402_50V7K
1 2 RB751V_SOD323
2
R177 120K_0402_5% JP21
2
R175 +3VS 1
93/05/16 2
100K_0402_5% 3
1
1 ACES_85205-0300
1
R576
C121
10K_0402_5% @1000P_0402_50V7K
2
2
33 FAN_SPEED1
U18
EN_DFAN1 1 8
VEN GND
+5VS 2 VIN GND 7
+VCC_FAN1 3 VO GND 6
4 VSET GND 5
1
G993P1U_SOP8L
C547
10U_1206_16V4Z
2
1 3 LID_SW# 33
SW1
MPU-101-81_4P
2 4
3
D1
@ PSOT24C_SOT23
(ELW80)
1
+5VS
1
C548
+
@ 150U_D2_6.3VM 2
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
FAN / FIR / RJ11/Lid_Switch
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS EFL50 LA-2761
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Date: Wednesday, April 20, 2005 Sheet 36 of 51
5 4 3 2 1
+5VALW
U26
4 VIN FLG 3 USB_OC#0 18
VOUT 5 +USB_AS
1
C390 1 2 +USB_AS
4.7U_0805_10V4Z CE GND
D D
RT9702ACB_SOT23-5 +USB_BS
2 470P_0402_50V7K
1
470P_0402_50V7K 1
SYSON C388 + C387
33,40,48 SYSON 1
1
+ C202 150U_D2_6.3VM
Cost-Down from G528 to RT9702 C204 2 2
150U_D2_6.3VM
2 2
+3VALW
0307
1
JP24 JP13
+5VALW +USB_BS R178
1 1 VCC
U16 10K_0402_5% 2
18 USB20_N2 2 18 USB20_N0 D-
1 GND OUT 8 18 USB20_P2 3 18 USB20_P0 3 D+
2 7 4
2
IN OUT 4 GND
3 IN OUT 6
1 4 5 1 2 SUYIN_020173MR004S312ZL 5
EN# FLG USB_OC#4 18 GND1
C211 R179 6
4.7U_0805_10V4Z G528_SO8 10K_0402_5% GND2
(Left) 7 GND3
1 2 USB_OC#2 18 8 GND4
2 R174
10K_0402_5% 1 1
SUYIN_020173MR004G533ZR
SYSON# C206 C209
40 SYSON#
0.1U_0402_16V4Z 0.1U_0402_16V4Z (Rear)
C 2 2 C
U1
USB20_N0 1 6 USB20_P0
AS SDA
U32 2 5 +USB_AS
+5VALW USB20_N2 USB20_P2 GND ALERT
1 AS SDA 6
U46 3 4
VDD SCL
4 VIN FLG 3 USB_OC#6 18 2 GND ALERT 5 +USB_BS
+USB_CS
SYSON
33,40,48 SYSON
470P_0402_50V7K
Cost-Down from G528 to RT9702 1
C655 1
+ @
C652
150U_D2_6.3VM
@ 2 2
B +USB_BS B
4.7_1206_5% @ 150U_D2_6.3VM
+3VS 10U_1206_16V4Z JP25
2
1
18 USB20_N4 2
2
18 USB20_P4 3
R594 IR1
47_1206_5% 4
IRED_A 1
2 3 IRTXOUT SUYIN_020173MR004S312ZL U47
IRED_C TXD IRTXOUT 32
IRRX 4 5 IRMODE USB20_N6 1 6 USB20_P6
32 IRRX IRMODE 32
1
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
USB Conn
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS EFL50 LA-2761
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Wednesday, April 20, 2005 Sheet 37 of 51
5 4 3 2 1
A B C D E
+5VS
+3VALW +3VALW
D14 +3VS +5VS
1@ 0.1U_0402_16V4Z R2
C1 2 1 2 1
D_DVI_DET 1 2
D_DVI_DET
2
1@ 10K_0402_5% U2 RB411D_SOT23 R11
R3 2 1 1 1@ 100K_0402_5% 0_0402_5% R363
P
B DOCKIN# PM@ 0_0402_5%
Y 4 DOCKIN# 14,21,26,33
1
1 2 MZIN_EM# 2 GM@ R366 GM@ 6.8K_0402_5%
A
G
R1 2 1 +5VS
1
1@ 10K_0402_5% 1@ TC7SH08FU_SSOP5 R356
3
4.7K_0402_5% R355 R365 PM@ 6.8K_0402_5%
1
Docking Conn. 2 1 +3VS
1
2
JP12
G
D_LAN_MDI0+ 1 63 4.7K_0402_5% Q27
26 D_LAN_MDI0+ LAN0+ GND DE_DVI_SDATA 1 3 DVI_SDATA
D_LAN_MDI0- D_DVI_DET DVI_SDATA 15,41
2 64
S
26 D_LAN_MDI0- LAN0- DVI_DET D_DVI_DET
3 65 DE_DVI_SDATA
GND DVI_DAT
2
D_LAN_MDI1+ 2N7002_SOT23 Q26
G
26 D_LAN_MDI1+ 4 LAN1+ GND 66
D_LAN_MDI1- 5 67 DE_DVI_SCLK
26 D_LAN_MDI1- LAN1- DVI_CLK
6 68 MZIN_EM# DE_DVI_SCLK 1 3 DVI_SCLK
GND EZIN_EM# D_MIC_S DVI_SCLK 15,41
7 69
S
D_LAN_LINK# GND MIC_S D_AUD_INR
26 D_LAN_LINK# 8 LAN_LINK# AUD_INR 70
R_LPTSTB# 9 71 D_AUD_INL 2N7002_SOT23 2 1 +3VS
32 R_LPTSTB# PP_STB# AUD_INL
AFD#/3M# 10 72 D_AGND
32 AFD#/3M# PP_AFD# AGND
F D0 11 73 D_AUD_MIC2 R360 PM@ 6.8K_0402_5%
32 FD0 PP_D0 AUD_MIC
LPTERR# 12 74 D_AUD_OR 2 1 +5VS
32 LPTERR# PP_ERR# AUD_OR
F D1 13 75 D_AUD_OL
32 FD1 PP_D1 AUD_OL
LPTINIT# 14 76 D_AGND R364 GM@ 6.8K_0402_5%
32 LPTINIT# PP_INIT# AGND
F D2 15 77
32 FD2 PP_D2 GND
LPTSLCTIN# 16 78 D_CRT_HSYNC
32 LPTSLCTIN# PP_SLIN# VGA_HS D_CRT_HSYNC 14
F D3 17 79 D_CRT_VSYNC
32 FD3 PP_D3 VGA_VS D_CRT_VSYNC 14
F D4 18 80 D_DDC_DATA
32 FD4 PP_D4 VGA_DAT D_DDC_DATA 14
F D5 19 81 D_DDC_CLK
32 FD5 PP_D5 VGA_CLK D_DDC_CLK 14
F D6 20 82 +5VS 30mil
32 FD6 PP_D6 SERIRQ
F D7 21 83 EZ_SMB_CLK
32 FD7 PP_D7 PE_CLK
LPTACK# 22 84 MZIN_ME# R4 1 1@ 2 1K_0402_5%
32 LPTACK# PP_ACK# EZIN_ME#
LPTBUSY 23 85
32 LPTBUSY PP_BUSY PE_REQ2# EZ_PE_REQ2# 18,33
D13 LPTPE 24 86 EZ_SMB_DAT
32 LPTPE PP_PE PE_DAT
LPTSLCT 25 87
32 LPTSLCT PP_SLCT PE_REQ1# EZ_PE_REQ1# 33
2 2 1 26 88 2
16 D_USB_SMI#1 PE_WAKE# GND
27 89 EZ_PCIE_RXP1
GND PCIERX1+ EZ_PCIE_RXP1 18
28 90 EZ_PCIE_RXN1
1@ RB751V_SOD323 GND PCIERX1- EZ_PCIE_RXN1 18
CLK_EZ_CLK1 29 91 D_DVI_TXD1-
13 CLK_EZ_CLK1 PCIECLK1+ DVI1- D_DVI_TXD1- 41
D12 CLK_EZ_CLK1# 30 92 D_DVI_TXD1+
13 CLK_EZ_CLK1# PCIECLK1- DVI1+ D_DVI_TXD1+ 41
D_LAN_ACTIVITY# 31 93
26 D_LAN_ACTIVITY# LAN_ACT# GND
2 1 32 94 D_DVI_TXD0-
16 D_USB_SMI#2 RESERVE DVI0- D_DVI_TXD0- 41
33 95 D_DVI_TXD0+
GND DVI0+ D_DVI_TXD0+ 41
D_LAN_MDI2+ 34 96
1@ RB751V_SOD323 26 D_LAN_MDI2+ LAN2+ GND
D_LAN_MDI2- 35 97 D:DVI_TXC+
26 D_LAN_MDI2- LAN2- DVICLK+ D_DVI_TXC+ 41
36 98 D_DVI_TXC-
GND DVICLK- D_DVI_TXC- 41
D_LAN_MDI3+ 37 99 JP2
26 D_LAN_MDI3+ LAN3+ GND
D_LAN_MDI3- 38 100 D_SPDIFO 1
26 D_LAN_MDI3- LAN3- GND 1
39 101 D_TV_COMPS D_HP_S 2
D_HP_S GND TV_COMP D_TV_LUMA D_TV_COMPS 21 D_MIC_S 2
40 HP_S TV_Y 102 D_TV_LUMA 21 3 3
D_SPDIFO 41 103 D_TV_CRMA D_AUD_INR 4
R I# SPDIF TV_C D_TV_CRMA 21 D_AUD_INL 4
32 RI# 42 COM_RI# GND 104 5 5
DTR# 43 105 D_AGND 6
32 DTR# COM_DTR# GND 6
CTS# 44 106 D_CRT_R D_AUD_MIC2 7
32 CTS# COM_CTS# VGA_R D_CRT_R 14 7
TXD 45 107 D_CRT_G D_AGND 8
32 TXD COM_SOUT VGA_G D_CRT_G 14 8
RTS# 46 108 D_CRT_B D_AUD_OR 9
32 RTS# COM_RTS# VGA_B D_CRT_B 14 9
RXD 47 109 D_AUD_OL 10
32 RXD COM_SIN GND 10
DSR# 48 110
32 DSR# COM_DSR# GND
DC D# 49 111 EZ_PCIE_RXP2
32 DCD# COM_DCD# PCIERX2+ EZ_PCIE_RXP2 18
50 112 EZ_PCIE_RXN2 ACES_87213-1000
GND PCIERX2- EZ_PCIE_RXN2 18
KB_DATA R8 1 2 W D@ 0_0402_5% 51 113
33 KB_DATA PS2_KBDT GND
KB_CLK R7 1 2 W D@ 0_0402_5% 52 114
33 KB_CLK PS2_KBCK GND
PS_DATA R6 1 2 W D@ 0_0402_5% 53 115 EZ_PCIE_TXP2
33 PS_DATA PS2_MSDT PCIETX2+ EZ_PCIE_TXP2 18
PS_CLK R5 1 2 W D@ 0_0402_5% 54 116 EZ_PCIE_TXN2
3 33 PS_CLK PS2_MSCK PCIETX2- EZ_PCIE_TXN2 18 3
33 EZ_SUSON 55 SUSON GND 117
33 EZ_MAINON 56 MAINON GND 118
57 119 CLK_EZ_CLK2
33 EZ_PERST# PE_RST# PCIECLK2+ CLK_EZ_CLK2 13
58 120 CLK_EZ_CLK2#
GND PCIECLK2- CLK_EZ_CLK2# 13
EZ_PCIE_TXP1 59 121
18 EZ_PCIE_TXP1
EZ_PCIE_TXN1 PCIETX1+ VCC PJP1 DKN_B+
18 EZ_PCIE_TXN1 60 PCIETX1- VCC 122
D_DVI_TXD2- 61 123 1@ JUMP_43X118
41 D_DVI_TXD2- DVI2- GND
D_DVI_TXD2+ 62 124 1 1
41 D_DVI_TXD2+ DVI2+ GND 2 2 VIN
VIN
+3VS FOX_QL10303-C4444R-4F_124P
EZ_SMBUS_ON# 33
R369 1 1 1 1 1
@ 100K_0402_5%
2
2 2 2 2 2
1 3 Q30
1
@ 2N7002_SOT23
D
R361 @ 4.7K_0402_5%
G
2
Q28 R357
1 3 EZ_SMB_CLK DVI_DET 1 2
11,12,13 D_CK_SCLK 15,41 DVI_DET D_DVI_DET
@ 2N7002_SOT23
D
100_0402_5%
1
4 1 2 4
R362 1@ 0_0603_5% 1 2 +3VS R359
2
R9 @ 4.7K_0402_5% D15
G
2
@ 2N7002_SOT23
D
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Docking
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS EFL50 LA-2761
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Wednesday, April 20, 2005 Sheet 38 of 51
A B C D E
A B C D E
2
33 KSO16 3 1 KSI3 33,34 33 KSO16 3 1 KSI2 33,34
2 1 R358
J2 JOPEN 4 2 4 2
Bottom Side 100K_0402_5%
5
6
5
6
SW3 D16
1 EVQPLHA15_4P 2 1
ON/OFF 33
3 1 ON/OFFBTN# 1
3 51ON#
51ON# 42
4 2
DAN202U_SC70
5
6
+3VALW
e/eManager_BTN Launch Manager_BTN
1
2
2
C389 D17 SW5 SW6
1
R368 1000P_0402_50V7K RLZ20A_LL34 EVQPLHA15_4P EVQPLHA15_4P
4.7K_0402_5% 1
33 KSO16 3 1 KSI0 33,34 33 KSO16 3 1 KSI1 33,34
2
4 2 4 2
1
EC_ON 1 2 2
33 EC_ON
R367
5
6
5
6
33K_0402_5%
Q2
3
DTC124EK_SC59
1
D
Q29 2
G
2N7002_SOT23 S
BlueTooth_BTN Wireless_BTN
3
SW7 SW8
1 2 EN_BT# 33,34 1 2 EN_WL# 33,34
2 2
PTS-042_2P PTS-042_2P
Power ON Circuit
+3VS +3V +3V
LED Indicator
1
U34D U34E
R539 SN74LVC14APWLE_TSSOP14 SN74LVC14APWLE_TSSOP14
14
14
180K_0402_5%
P
P
2
9 I O 8 11 I O 10 SYS_PWROK 18
G
1 2 CAPSLED#D 2 1 +5VS
33 CAPSLED# LED2 HT-170UYG-DT GRN_0805 R45 360_0402_5%
3 NUMLED#D 3
33 NUMLED# 1 2 2 1 +5VS
LED3 HT-170UYG-DT GRN_0805 R58 360_0402_5%
1 2 PWR_LED#D 2 1
RTC Battery 33,34 PWR_LED# LED5 HT-170UYG-DT GRN_0805 R613 360_0402_5%
+5VALW
1 2 BATT_FULL_LED#D 2 1
- BATT1 + +RTCBATT 33,34 BATT_FULL_LED# LED6 HT-170UYG-DT GRN_0805 R610 360_0402_5%
+5VALW
2 1 +RTCBATT
1 2 BATT_CHGI_LED#D 2 1 +5VALW
33,34 BATT_CHGI_LED# LED8 HT-170UD_0805 R611 360_0402_5%
RTCBATT
1
1 2 MEDIA_LED#D 2 1 +5VS
D9 33 MEDIA_LED# LED4 HT-170UYG-DT GRN_0805 R85 360_0402_5%
BAS40-04_SOT23
+RTCVCC LED10 3
1
3
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Power OK/Reset/RTC battery
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
EFL50 LA-2761 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Wednesday, April 20, 2005 Sheet 39 of 51
A B C D E
A B C D E
+3V +1.8VS
+3VALW TO +3V +5VALW TO +5VS
+3V
2
+5VALW +5VS R339 R169
U45 470_0402_5% 470_0402_5%
1 1 8 D S 1
C611 C609 7 2
1
D S
6 D S 3 1 1
10U_1206_16V4Z 1U_0805_25V4Z 5 4 C647 C646
D G
1
+3VALW 2 2 D D
1 U43 1 SI4800DY_SO8 4.7U_0805_10V4Z 1U_0805_25V4Z 2 SYSON# 2 SUSP 1
2 2 G G
8 D S 1
7 2 R340 C653 S Q23 S Q14
3
D S 100K_0402_5% 4.7U_0805_10V4Z 2N7002_SOT23 2N7002_SOT23
6 D S 3
SYSON_ALW 2
5 D G 4 1 2 VSB
1
SI4800DY_SO8 2
1
C639 R341 D 5VS_GATE
1
C633 @ 1M_0402_1% 2 SYSON#
0.1U_0402_16V4Z G
10U_1206_16V4Z 1 S Q24
2
3
2 2N7002_SOT23
+3VS +5VS
2
R156 R609
470_0402_5% 470_0402_5%
1
1
1
D D
+3VALW TO +3VS 2 SUSP 2 SUSP
G G
+3VS S Q13 S Q41
3
2N7002_SOT23 2N7002_SOT23
2 2
+3VALW
1
C194
1
C190 +1.5VALW TO +1.5VS
U11 10U_1206_16V4Z 1U_0805_25V4Z
2 2 +1.5VALW +1.5VS
8 D S 1
7 2 R161 U17
D S 100K_0402_5%
6 D S 3 8 D S 1
5 4 5VS_GATE 1 2 7 D 2 +5VALW
D G VSB S
6 D S 3 1 1
SI4800DY_SO8 5 D 4 C230 C229
G
2
+1.5VS
1
2
@ 1M_0402_1% 2 SUSP C228
10U_1206_16V4Z 0.1U_0402_16V4Z G 4.7U_0805_10V4Z R200
1
2 1 S Q12 2 470_0402_5% SUSP
49 SUSP
2
2N7002_SOT23
1
1
5VS_GATE
1
D
100K
2 SUSP 15,33,35 SUSP# 2
G
S Q17
3
2N7002_SOT23 DTC115EKA_SOT23 100K
Q25
3
3 3
+5VALW
2
+1.8V
R344
10K_0402_5%
2
R631
1
470_0402_5% SYSON#
+1.8V 37 SYSON#
1
1
U12
8 D S 1 +1.8VS
1
D
7 D S 2 100K
6 3 2 SYSON# SYSON 2
5
D S
4 1 1
+1.8V TO +1.8VS (DDR2) G
33,37,48 SYSON
D G C192 C191 Q46
S
3
SI4800DY_SO8 2N7002_SOT23 DTC115EKA_SOT23 100K
4.7U_0805_10V4Z 1U_0805_25V4Z Q22
1
3
2 2
C193
4.7U_0805_10V4Z
4
2 0304 4
5VS_GATE
PROPRIETARY NOTE THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND POWER CONTROL CKT
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE B 0.2
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. EFL50 LA-2761
Date: Wednesday, April 20, 2005 Sheet 40 of 51
A B C D E
5 4 3 2 1
EXP_TXN0/SDVOB_RED# PCIE_MTX_C_GRX_N0
1
1
0307
1
CF6 CF5 CF4 CF13 CF7 CF9 CF10
SMD40M80 SMD40M80 SMD40M80 SMD40M80 SMD40M80 SMD40M80 SMD40M80 EXP_TXP1/SDVOB_GREEN PCIE_MTX_C_GRX_P1
H21 H7 H14 H2 H5 H15 H4
H_S354D118 H_S354D118 H_S354D118 H_C276D173 H_C276D173 H_C315D315N H_O335X236D256X157 EXP_TXN1/SDVOB_GREEN# PCIE_MTX_C_GRX_N1
1
1
D D
CF17 CF18 CF21 CF22 EXP_TXP2/SDVOB_BLUE PCIE_MTX_C_GRX_P2
PAD_C197 PAD_C197 PAD_C197 PAD_C197
EXP_TXN2/SDVOB_BLUE# PCIE_MTX_C_GRX_N2
1
1
1
EXP_TXP3/SDVOB_CLKP PCIE_MTX_C_GRX_P3
H6 H13 H10 H11 H3 H9 H8 H22
H_C394BC217D177 H_C394BC217D177 H_C394BC217D177 H_C394BC217D177 H_S433D118 H_R551X350D165 H_S354D165 H_S429D157
FD3 FD6 FD1 FD4 FD2 FD5 EXP_TXN3/SDVOB_CLKN PCIE_MTX_C_GRX_N3
FIDUCAL FIDUCAL FIDUCAL FIDUCAL FIDUCAL FIDUCAL
EXP_RXP1/SDVO_INT PCEI_GTX_C_MRX_P1
1
1
EXP_RXN1/SDVO_INT# PCEI_GTX_C_MRX_N1
CF11 CF12
PAD_181X138 PAD_181X138
D_DVI_TXC-
D_DVI_TXC- 38
VSB D_DVI_TXC+
DVI CONTROLLER D_DVI_TXC+ 38
1
D_DVI_TXD0-
D_DVI_TXD0- 38
U15B D_DVI_TXD0+
D_DVI_TXD0+ 38
5 +IN +3VS +2.5VS
7 D_DVI_TXD1-
OUT D_DVI_TXD1- 38
6 +2.5VS D_DVI_TXD1+
-IN D_DVI_TXD1+ 38
LM358A_SO8 D_DVI_TXD2-
D_DVI_TXD2- 38
D_DVI_TXD2+
C D_DVI_TXD2+ 38 C
12
28
15
21
36
42
48
1
U30 1 4 RP8 DVI_TXC-
DVI_TXC- 15
2 3 DVI_TXC+
DVDD
DVDD
TVDD
TVDD
AVDD
AVDD
AVDD
AVDD_PLL
DVI_TXC+ 15
0.1U_0402_16V4Z 0_0404_4P2R_5%
PCEI_GTX_C_MRX_P1 C427 SDVOB_INT+ 32 13 D_DVI_TXC- 1 4 RP7 DVI_TXD0-
8,15 PCEI_GTX_C_MRX_P1 SDVOB_INT+ TLC# DVI_TXD0- 15
PCEI_GTX_C_MRX_N1 SDVOB_INT- 33 14 D_DVI_TXC+ 2 3 DVI_TXD0+
8,15 PCEI_GTX_C_MRX_N1 SDVOB_INT- TLC DVI_TXD0+ 15
C433 0.1U_0402_16V4Z 16 D_DVI_TXD0- 0_0404_4P2R_5%
PCIE_MTX_C_GRX_P0 TDC0#
8,15 PCIE_MTX_C_GRX_P0 4 1 RP1 PCIE_MTX_C_GRX_P0-R 37 SDVOB_R+ TDC0 17 D_DVI_TXD0+ 1 4 RP6 DVI_TXD1-
DVI_TXD1- 15
PCIE_MTX_C_GRX_N0 3 2 PCIE_MTX_C_GRX_N0-R 38 19 D_DVI_TXD1- 2 3 DVI_TXD1+
8,15 PCIE_MTX_C_GRX_N0 SDVOB_R- TDC1# DVI_TXD1+ 15
0_0404_4P2R_5% 20 D_DVI_TXD1+ 0_0404_4P2R_5%
PCIE_MTX_C_GRX_P1 TDC1
8,15 PCIE_MTX_C_GRX_P1 4 1 RP2 PCIE_MTX_C_GRX_P1-R 40 SDVOB_G+ TDC2# 22 D_DVI_TXD2- 1 4 RP5 DVI_TXD2-
DVI_TXD2- 15
PCIE_MTX_C_GRX_N1 3 2 PCIE_MTX_C_GRX_N1-R 41 23 D_DVI_TXD2+ 2 3 DVI_TXD2+
8,15 PCIE_MTX_C_GRX_N1 SDVOB_G- TDC2 DVI_TXD2+ 15
0_0404_4P2R_5% 0_0404_4P2R_5%
PCIE_MTX_C_GRX_P2 4 1 RP3 PCIE_MTX_C_GRX_P2-R 43
8,15 PCIE_MTX_C_GRX_P2 SDVOB_B+
PCIE_MTX_C_GRX_N2 3 2 PCIE_MTX_C_GRX_N2-R 44 29 DVI_DET
8,15 PCIE_MTX_C_GRX_N2 SDVOB_B- HPDET DVI_DET 15,38
0_0404_4P2R_5%
PCIE_MTX_C_GRX_P3 4 1 RP4 PCIE_MTX_C_GRX_P3-R 46 11 DVI_SCLK
8,15 PCIE_MTX_C_GRX_P3 SDVOB_CLK+ SC_DDC DVI_SCLK 15,38
PCIE_MTX_C_GRX_N3 3 2 PCIE_MTX_C_GRX_N3-R 47 10 DVI_SDATA
8,15 PCIE_MTX_C_GRX_N3 SDVOB_CLK- SD_DDC DVI_SDATA 15,38 +2.5VS
0_0404_4P2R_5%
AS 3 9 +2.5VS
PLTRST_VGA# R412 1 AS SC_PROM
15,18 PLTRST_VGA# 2 0_0402_5% CH_RST# 2 RESET# SD_PROM 8
1
CH_VSWING 25 VSWING
AGND_PLL
PLT_RST# R410 1 2 0_0402_5% 5 SDVO_SDAT R116 1 2 5.6K_0402_5% R413
6,16,18,20,32,33 PLT_RST# SPD
@ 27 4 SDVO_SCLK R113 1 2 5.6K_0402_5%
ATPG SPC
DGND
DGND
AGND
AGND
AGND
TGND
TGND
26 10K_0402_5%
SCEN
NC
NC
2
1
1 AS
R418 R415 R416 CH7307C_LQFP48 W=20 mils
7
30
31
39
45
18
24
6
34
35
GM@ SDVO_SDAT
SDVO_SDAT 8,15
1
1.2K_0402_5% 10K_0402_5% 10K_0402_5% SDVO_SCLK
B SDVO_SCLK 8,15 B
R414
2
@ 10K_0402_5%
2
+3VALW
1 2
U22A
DVI_DVDD_2.5V
P
OE#
+2.5VS
2 3 +1.5VS C6761 2 @ 1000P_0603_50V8J +3VS +5VS C6771 2 @ 1000P_0603_50V8J +3VS
I O
1
G
+3VS
U22D
C6821 2 @ 1000P_0603_50V8J For EMI 1
OE#
+5VS +1.8V
12 11 C472 C471 C473
I O
+3V +5VS C6831 2 @ 1000P_0603_50V8J +1.8V 0.1U_0402_16V4Z 10U_1206_16V4Z
2
SN74LVC125APWLE_TSSOP14
A C6841 A
+5VS 2 @ 1000P_0603_50V8J +1.8V 0.1U_0402_16V4Z
14
U34F
P
13 I O 12
G
SN74LVC14APWLE_TSSOP14
Compal Electronics, Inc.
7
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND Screws and CH7307
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE 0.2
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. EFL50 LA-2761
Date: Wednesday, April 20, 2005 Sheet 41 of 51
5 4 3 2 1
A B C D
1
5 G
1
2 ADPIN PD26 VS PR2
SINGATRON 2DC-S026-I07 SBM1040-13_POWERMITE3 VIN PR3 10K_0603_5%
PCN1 PL1 2 84.5K_0603_1%
1 1 2 AD IN 1 1 PR4
2
2
0_0603_5% ACIN 33
3 G 1 3
8
FBM-L11-453215-900LMA60T_2P PR5 PU1A
4 G 1 2 3
P
1 1
22K_0603_5% + PACIN
2 O 1 PACIN 43
1
5 G 2 -
G
2
1
SINGA 2DC-S026-B07_3P PC5 LM393M_SO8 PZD1
4
PC1 PC3 PR7
2
PC2 PC4 2200P_0603_50V7K PC6 10K_0603_5%
2
1000P_0603_50V7K 1000P_0603_50V7K PR6 RLZ4.3B_LL34
2
100P_0603_50V8J 100P_0603_50V8J 20K_0603_1% 1000P_0603_16V7K
Vin Detector
2
2 1 RTCVREF
PR8
10K_0603_5% 3.3V High 18.764 17.901 17.063
1 PR9
2
1K_1206_5%
Low 17.745 16.903 16.038
1 PR10
2
VIN PD4 1K_1206_5% PQ35
VIN
2 1 3 TP0610K_SOT23
1
1 PR12
2
100K_0402_5%
100K_0402_5%
PD2 1N4148_SOD80 1K_1206_5%
1
PR168
1N4148_SOD80 1 PR15
2
PR167
1K_1206_5%
1
PD3
2
2 1 PR11
BATT+
1
2 RB751V_SOD323 33_1206_5% 2
VS PQ34 PR169
DTC115EUA_SC70 100K_0402_5%
B+
PQ1 2 33,43 ACOFF 2
1 2
CHGRTCP 3 TP0610K_SOT23
1
PQ33
1
DTC115EUA_SC70
3
1
PR14
100K_0603_5% PC7 PC8 2
0.22U_1206_25V7K 0.1U_0805_25V7K
2
2
2
PR17
39 51ON# 1 2
3
22K_0603_5%
1
VL 1 PR18
2 2 PR19
1
10K_0603_5% 1.5M_0603_5% PR20
330K_0603_1%
2
8
PU1B
PD5 RB751V_SOD323 5 PR24
P
+
1
17,40,44,45 MAINPWON 2 1 7 O
RTCVREF PR21 6 @66.5K_0603_1%
-
1
200_0805_5%
1
34K_0603_1%
LM393M_SO8 PR22
4
1
1
PU2 PC11 PC12 PC10
3.3V
2
PR23
3 PR26 PR27 43 ACON 2 1 PR25 634K_0603_1% 1000P_0603_50V8J 3
2
1 2 1 2 3 2 0.1U_0603_16V7K 1000P_0603_50V7K
2
CHGRTC OUT IN PD6 RB751V_SOD323 137K_0603_1%
1
300_0603_5% 300_0603_5%
2
1
GND PC13
PC14 1U_0805_25V4Z
2
Precharge detector
1
D
PJP4 PJP5 PQ2 PR28 PACIN
1 2 1 2
AC ADAPTOR 2
2N7002_SOT23
G
2 1
47K_0603_5%
+1.5VALWP +1.5VALW +1.8VP +1.8V
S
3
PAD-OPEN 3x3m PAD-OPEN 3x3m 14.04 13.70 13.40
1
(2.5A,100mils ,Via NO.=5) (6A,240mils ,Via NO.= 12) 12.90 12.60 12.40 PQ3
PJP6 DTC115EUA_SC70
+5VALWP 1 2 +5VALW
2 +5VALWP
PJP7
PAD-OPEN 3x3m
+0.9VP 1 2 +0.9VS
(5A,200mils ,Via NO.= 10) Precharge detector
PAD-OPEN 3x3m
3
PJP8 BATTERY
+3VALWP 1 2 +3VALW (0.3A,40mils ,Via NO.= 2) 5.85 5.74 5.64
4 4
P2
Iadp=0~2.84A
P3 B+ PC17 B++
PQ4 2200P_0603_50V7K PQ6
PQ5 PL2
AO4407_SO8 AO4407_SO8 PR29 AO4407_SO8
VIN 8 1 1 8 2 1 1 2 1 8
7 2 2 7 0.02_2512_1% FBM-L11-453215-900LMA60T_2P 2 7
2
6 3 3 6 PC15 PC16 3 6
5 5 PC18 5
1 4.7UF_1206_25V 4.7UF_1206_25V 0.1U_0805_25V7K 1
1
4
4
PR33
ACOFF# PR32 1 2 1 2 VIN
1
47K_0603_5%
PQ38 PR34 10K_0603_5%
DTA144EUA_SC70 0_0603_5%
PU3
1
PR30 1 24
33 ADP_I
2
-INC2 +INC2
3
2
1
47K_0402_5%
47K
1
1 PR36
1
2 PC140 2 1 2 23
47K OUTC2 GND
0.1U_0603_25V7K PR31 4 PQ8
2
PC20
1
1
4 21 1 2 1SS355_SOD323
-INE2 VCC(o)
1
PR38
5
6
7
8
PQ37 PC21 1 PR39 PC22 PR40 PR183 0.1U_0603_25V7K PR192 PQ7
3
2 34K_0603_1% 1 21 2 1 2 5 20 1 2
DTC115EUA_SC70 0.1U_0603_25V7K 10K_0603_1% FB2 OUT 2.2_0402_5%
2
2
4700P_0603_50V7K 10K_0603_1% 0_0402_5% PC23
@0_0402_5%
6 19 1 2 LXCHRG
VREF VH
1
2
D
0.1U_0603_25V7K
3
1
PR187
2 PQ36 PC25 PR41 PR181 0.1U_0603_25V7K PC26 0.1UF_0805_25V
2 G 2N7002_SOT23 1 21 2 1 2 7 18 1 2 2
FB1 VCC
PC24
S
CC=0.5~3.3A
3
2
VREF_MB39A126 2200P_0603_50V7K
10K_0603_1% 0_0402_5% PR42
FSTCHG 33
1
8 17 1 2
-INE1 RT CV=12.6V(6 OR 9 CELLS LI-ION)
68K_0402_1% PL3
1 PR43
2 9 16
33 IREF 133K_0603_1% +INE1 -INE3 10U_SIQB125-100A_4.5A_20% PR44 BATT+
1 2 1 2
2 PR45
1 10 15 1 PR46
2 1 2 PC27
OUTC1 FB3
1
SKS30-04AT_TSMA
SKS30-04AT_TSMA
4.7UF_1206_25V
4.7UF_1206_25V
PR35 PR47 PC28
1
PD7 150K_0603_5% 0.1U_0402_16V7K 11 14
2
OUTD CTL
1
PD9
PD24
PC29
PC30
ACOFF# 1 2 100K_0603_1%
2 PR184 1
1
@0_0402_5%
2
2
-INC1 +INC1
2
2
@0_0402_5%
PR186
@0_0402_5% 47K_0603_1%
2
PC148 @10P_0402_25V8K
1
D
PR185
MB3887_SSOP24 1 2
2
1 PR37
2 2 PQ9
42 PACIN 10K_0603_5%
G 2N7002_SOT23 VREF_MB39A126 MB39A126
1
S
3
42 ACON
MB39A126
PR49 PR50
2 1 2 1
150K_0603_0.1% 300K_0603_0.1%
3
4.2V 3
VMB 1 2 PC31
22P_0603_50V8J
IREF=0.9323Icharge
IREF=0.466~3.1V FOR 6 CELL VS
1
PR51
340K_0603_1%
FOR 9 CELL 0.1U_0603_50V4Z
2
1
PC32
1 PR52
2
187K_0603_1%
2
8
PU4A
3 PU4B
P
+
33 BATT_OVP 1 0 + 5
- 2 7 0
G
- 6
LM358A_SO8
4
LM358A_SO8
1
PR53 PR54
OVP voltage : LI
1
2.2K_0603_5%
4 105K_0603_0.5% PC33 4
0.01U_0402_25V7K
2
2
2
B+
2
PL4
FBM-L18-453215-900LMA90T_1812 PC34 PC38
0.1U_0603_50V4Z 0.1U_0603_50V4Z
2
1 2 BST5B BST3B 1 2
1
PD10
1 B+++ CHP202U_SC70 1
2200P_0402_50V7K
PQ11 VL
8 1
1
G2 D2
7 D1/S2/K D2 2
1
2
6 3 DL5
D1/S2/K G1
PC36
47_0402_5%
4.7U_1206_25V6K 0_0603_5% B+++ PQ10
2
PR171 1
1
4.7_1206_5%
@4.7_1206_5%
2200P_0402_50V7K
1 D2 G2 8
4.7U_1206_25V6K
PR59
AO4912_SO8 PR57 PC41 2 7
1
D2 D1/S2/K
PR56
0_0603_5% 0.1U_0603_16V7K 3 6
2
G1 D1/S2/K
1
5HG 1 2 DH5 4 5
1
S1/A D1/S2/K
PC42
PC40
1 2
2
1U_1206_25V7K
AO4912_SO8
2
PC43
LX5
VL PR58
2
0_0603_5%
2VREF_1999
4.7U_0805_10V4Z
170.1U_0603_50V4Z
3HG
1
1U_0805_16V7K
499K_0402_1% 200K_0402_1%
499K_0402_1% 200K_0402_1%
1
2
PC47
PR67
PR69
1
1
BST3A
PC44
PC46
LX3
2
PR64
2
0_0603_5%
2 1
2 1
1
18
20
13
PR60
PL6
SIL104R-100 BST5A 14
V+
LD05
TON
VCC
1
BST5
PR63
2
ILIM3 5 2
16 DL3
DH5
+5VALWP
2
1
15 LX5
19 PU5 11 PL5
DL5 ILIM5
21 OUT5 MAX1999EEI_QSOP28 SIL104R-100
9 FB5 BST3 28
10.2K_0402_1%
1 26 DH3
N.C. DH3
2
24
2
DL3
PR68
6 SHDN# LX3 27
VS 4 22
1 ON5 OUT3
1 2 3 ON3
150U_D_6.3VM
+ PR62 7
1
FB3
PC48
0_0402_5% 12 2 +3VALWP
@ SKIP# PGOOD
2 2VREF_19998
PRO#
0_0402_5% @ 3.57K_0402_1%
LDO3
PR72
GND
REF
2
2
0_0402_5%
PR70
1 2 1 2 1 2
23
25
10
2
0.047U_0603_16V7K
0.22U_0603_10V7K
100K_0603_5%
RLZ5.1B_LL34 0_0402_5% 1
PR172
PC54
1
2 1
1
PC50
+ PC53
2
150U_D_6.3VM
2
45 SPOK
1
2
2
4.7U_0805_10V4Z
PR73
PR74
0_0402_5%
1
1
PR173
1
PC55
1 2
3 3
2
47K_0402_5%
1
PC141
0.047U_0603_16V7K
+5V Ipeak = 6.66A ~ 10A
2
MAINPWON 17,40,42,45
1
PC51
1U_0603_16V6M
2
4 4
1
1 3 EC_SMC1 PC152 PC56 PC57 VL 1
SMC EC_SMD1 1000P_0603_50V7K 1000P_0603_50V7K 0.01U_0603_50V7K VS VL
7 2
2
G SMD
6 G GND 1
2
100_0603_1%
1
P_SUYIN_200275MR005G179ZL PR85 PC58 PR80
1
17.8K_0603_1% 0.1U_0603_50V4Z PR81 150K_0603_1%
PR77
1 2
2
442K_0603_1%
1
2
2
8
100_0603_1%
PR83 PU6A
1 2 3
P
+ MAINPWON 17,40,42,44
PR78
PR84 154K_0603_1% 1
TM_REF1 O
1 2 +3VALWP 2 -
G
6.49K_0603_1%
1
LM393M_SO8
4
PH1
1
PR86 100K_0603_1%_TH11-4H104FT
1K_0603_1%
2
1
1
@BAS40-04_SOT23 PC59
3 PR87
2
1
1U_0805_50V4Z
PD15 PD16 2 1 VL
2
1 1000P_0402_50V7K
PC60
100K_0603_1%
2
PR88
1
PD14 100K_0603_1%
3
2 BATT_TEMP 33 2
@BAS40-04_SOT23 @BAS40-04_SOT23
EC_SMB_CK1 33,35
2
+3VALWP EC_SMB_DA1 33,35
PQ40
TP0610K_SOT23
B+ 3 1 VSB
1
1
PR176
8
100K_0603_5% PC143 PC144 PU6B
0.22U_1206_25V7K 0.1U_0805_25V7K 5
P
2
+
7
2
PR180 O
6 -
G
VL 1 2
22K_0603_5% LM393M_SO8
4
2
3 PR175 3
100K_0603_1%
PR174
PQ39
1
0_0402_5% D
2N7002_SOT23
44 SPOK 1 2 2
G
S
3
1
PC142
@ 0.1U_0402_16V7K
2
4 4
+5VS
CPUB+ B+
PR90 10_0402_5%
PL8
+3VS
PR89 FBM-L11-322513-201LMAT_1210
5VS1 2 1
0_1206_5% 2 1
2200P_0402_50V7K
2200P_0402_50V7K
2200P_0402_50V7K
2200P_0402_50V7K
2200P_0402_50V7K
2200P_0402_50V7K
100K_0402_5%
100U_25V_M
1
1
4.7U_1206_25V6K
4.7U_1206_25V6K
PC63
PC64
PC154
PC155
PC156
PC157
PC158
PC159
PC66
D
+ D
2
1
2
2
2
5
6
7
8
@ PC67
0.01U_0402_25V7Z
PC68
2
1U_0603_16V6K 2.2U_0603_6.3V6K BSTMA
1
1
PR91
PC69
PU7
0.22U_0603_16V7K
1
1
DHM4
PC70
VCC 10 30
PR92 0_0402_5% VCC VDD
2
5 CPU_VID0 2 1 24 D0 V+ 36
PR93 0_0402_5% AO4408_SO8
3
2
1
2 1 23 26 1 PR94 2 PQ14
5 CPU_VID1 D1 BSTM 2.2_0402_5% +CPU_CORE
PR95 PR190
2 0_0402_5%
1 22 28 DHM1 1 2 PL9
5 CPU_VID2 D2 DHM 2.2_0402_5%
PR96 0_0402_5% 0.56UH_ETQP4LR56WFC_21A_20% PR97
2 1 21 27 LXM 2 1 1 2
5 CPU_VID3 D3 LXM
5
6
7
8
PR98 0_0402_5%
2 1 20 29 0.001_2512_5%
5 CPU_VID4 D4 DLM
4.7_1206_5%
909_0402_1%
@ 100K_0402_1%
PR99 0_0402_5%
2
PR189
5 CPU_VID5 2 1 19 D5 PGND 31
1
680P_0603_50V8J
PR100
1 2 25 37 CMP 4
6,13,18 VGATE VROK CMP
499_0402_1%
499_0402_1%
1
1
PR101 0_0402_5% 4 38 CMN
1
PR106 S0 CMN
2
PC150
PR102
1000P_0402_50V7K
0_0402_5% PR107 VCC 5 17 OAIN+ AO4410_SO8 PC71
3
2
1
2
S1 OAIN+
2
C @ 100K_0402_5% PQ16 C
3K_0603_1%
1 2 6 16 OAIN- 1 2
33,47 VR_ON
2
SHDN# OAIN-
PR105
PR108 30.1K_0402_1% DLM
1
PR103
PR104
PC72
1 2 2 1 1 15 FB
1
TIME FB 0.47U_0603_16V7K
PC73 1 2 12 14 1 2
CCV CCI PC74 470P_0402_50V8J
1 2 270P_0402_50V7K 2 35 PR110 909_0402_1% @
TON BSTS
1 2
PR111 PR109 1 2 8 33 DHS1
78.7K_0603_1% 200K_0402_1% REF DHS
1 2 PC75 0.22U_0603_16V7K 9 34 1 2
ILIM LXS PR112 CPU VCC SENSE
PD18
FB 1 2 7 32 3K_0603_1%
OFS DLS BSTMA 2 1 2 1 2
100P_0402_50V8J
10.7K_0402_1%
PC77
2
D CPUB+
27P_0402_50V8J
11 GND GNDS 13
1
D
@RHU002N06_SOT323
2 PR116
1
G 2 2.2_0402_5%
S G
3
4.7U_1206_25V6K
4.7U_1206_25V6K
PQ17 S MAX1532AETL_TQFN40
3
5
6
7
8
PQ18
RHU002N06_SOT323
1
PC81
PC82
PR117
0_0402_5%
2
0.22U_0603_16V7K
18 PM_DPRSLPVR 1 2
1
B DHS PR119 B
4
PC84
5VS1 1 2 @ 100K_0402_1%
2
2 1
PR118 PR191 AO4408_SO8
3
2
1
2
PR122 909_0402_1%
1 1
5
6
7
8
1
1
PR188
4.7_1206_5%
PQ20
2
G RHU002N06_SOT323
680P_0603_50V8J
S
3
2
1
C 4
5 PSI# 2
1
B 1 2
PC149
E PQ23
3
3
2
1
2
0.47U_0603_16V7K
PQ22
PR123 909_0402_1%
A A
1 2
PC124
1000P_0402_50V7K
2 1 OAIN+
Compal Electronics, Inc.
2 1 OAIN+ Title
PC125
+VCC_H_CORE
Size Document Number Rev
B EFL50 LA-2761 0.1
1000P_0402_50V7K
Date: Wednesday, April 20, 2005 Sheet 46 of 51
5 4 3 2 1
5 4 3 2 1
PL18
FBM-L11-322513-151LMAT_1210
B+ 1 2
4.7U_1206_25V6K
0.1U_0603_25V7K
PC130
PC128
2
PR159
D D
2
PR165 1 2 +3VS
2
4.12K_0402_1%
2
PC127 PC132 0_0402_5%
0.01U_0402_25V7Z
1
@0.1U_0603_16V4Z
1
PU8
10 9 PR161
OCSET IN PQ32
0_0402_5%
2 8 VCCP_HG1
2 1 VCCP_HG2 8 1
SS DH G2 D2
7 D1/S2/K D2 2
1
1 7 VCCP_PHASE 6 3
FB LX D1/S2/K G1
3300P_0402_50V7K
5 D1/S2/K S1/A 4
3 5
2
VCC DL
PC138
VCCP_LG1
1
4 GND BST 6 AO4912_SO8
MAX8578EUB
BSTVCCP
1 2 VCCP_LG2
PC133
4.7_0402_5%
4.7U_0805_6.3V6K PR162
PD25
PL17 1.8U_SIL104R-1R8_9.5A_30%
2 1 1 2 2 1 +1.05VP
1
1SS355_SOD323 PC134 PR166 PR164 1
220U_D2_4VM_R15
0.1U_0603_25V7K 4.7K_0402_1% 30_0402_5%
PC137
+
PR160
2
750_0402_5%
2
C
+5VALWP 1 2
C
1 2
866_0402_1%
PC135
2
4.7_1206_5%
PR163
6800P_0402_25V7K
PR193
PC136
0.1U_0603_25V7K
1
2
1
680P_0603_50V8J
2
B PC153 B
A A
B++++
PL13
+1.5VP Current limit = 8.2A ~10.64A FBM-L11-322513-151LMAT_1210
1 2 B+
0.1U_0603_25V7K
D D
1
1
1
PC97
PC99 PR137 PC110
4.7U_1206_25V6K 0_1206_5% 4.7U_1206_25V6K
2
+5VALWP
1
PC101
2
4.7U_0805_6.3V6K PC126
1
PR156
2
PC103 2.2_0603_5% 2.2U_0805_10V6K
PD22 0.1U_0603_25V7K
2
DAP202U_SOT323
1
2
3
8
7
6
5
BST_1.8V-2
D
D
D
D
PQ25
BST_1.5V-2
AO4422_SO8
14
28
G
S
S
S
PC106 PU9 PC112
5
6
7
8
+1.5VALWP PL14 2 1 12 17 2 1
VIN
VCC
1
2
3
4
1.8U_SIL104R-1R8_9.5A_30% SOFT1 SOFT2
D
D
D
D
1 2 PC100 0.01U_0402_25V7Z 0.01U_0402_25V7Z PC111 PQ26
0.1U_0402_16V7K 0.1U_0402_16V7K AO4422_SO8
1 2 1 1 2BST_1.5V-16 BOOT1 BOOT2 23 BST_1.8V-1
1 2 2 1
8
7
6
5
G
S
S
S
PR135 PR148
150U_D_2V18
4
3
2
1
PC104
C C
PQ31 DH_1.5V 5 24 DH_1.8V 1.8U_SIL104R-1R8_9.5A_30% +1.8VP
2 AO4702_SO8 UGATE1 UGATE2
G
S
S
S
0.01U_0402_25V7Z
LX_VGA 4 25 LX_1.8V 1 2
PHASE1 PHASE2
1
1
1
2
3
4
1
5
6
7
8
PC107
330U_D_3VM
6.81K_0402_1% 2.05K_0402_1% 1.74K_0402_1% +
PC114
PR141 1 2 ISE_1.5V 7 22 ISE_1.8V 1 2
D
D
D
D
2
1
DL_1.5V DL_1.8V PQ27 PC117 2
2 LGATE1 LGATE2 27
AO4702_SO8 PR146 0.01U_0402_25V7Z
2
1
S
S
S
0_0402_5%
2
4
3
2
1
3 26 PR143
2
PGND1 PGND2 11K_0402_1%
2
VOUT_1.5V 9 20 VOUT_1.8V
VSE_1.5V VOUT1 VOUT2 VSE_1.8V
10 VSEN1 VSEN2 19
1 PR153 2 8 21 1 2 SYSON 33,37,40
+5VALWP 0_0402_5% EN1 EN2
15 PG1 PG2/REF 16
1
PR152 0_0402_5%
GND
DDR
1
1
10K_0402_1%
11 OCSET1 OCSET2 18
1
1
PR155
13
2
1
2
1
@ 0.1U_0402_16V7K 80.6K_0402_1%
2
2
PR157
2
71.5K_0402_1%
2
2
B B
A A
D D
+3VALWP
PJP12
1 1 2 2
PC115
JUMP_43X118
2
C 4.7U_1206_25V6K C
1
+5VALWP
RTCVREF
PU11
1 VIN PGND 8
2 VFB AGND 7
2
PC147
+2.5VP
3 6
1
VTT VCCA 1U_0603_16V6K
AGND
10_0603_1%
1
4 VTT REFEN 5
PR177
CM8562IS_PSOP8 2 PR179 1
9
PC113
2
200K_0402_1%
2200PF_0603_16V7K
4.7U_1206_25V6K 64.9K_0402_1%
2
2
PR178
0.1U_0603_50V4Z
1
PC146
PC145
1
1
PQ41
1
D
2N7002_SOT23
B
2 SUSP 40 B
G
S
+1.8VP
1
PJ2
1
JUMP_43X118
2
2
PU12
1 VIN VCNTL 6 +3VALWP
2 GND NC 5
1
1
1
PC118 3 7 PC119
10U_1206_6.3V7K VREF NC 1U_0603_6.3V6M
2
2
PR149 4 8
1.07K_0402_1% VOUT NC
9
2
TP
APL5331KAC-TR_SO8
A PR150 A
1
PQ30 +0.9VP
1
0_0402_5% D
2N7002_SOT23 PC120
SUSP 1 2 2 0.1U_0402_16V7K
40 SUSP
2
G PR151
S 1K_0402_1% PC121
3
1
10U_1206_6.3V7K
2
Title
1.8VP/0.9VP/2.5VP
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
B EFL50 LA-2761
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Date: Wednesday, April 20, 2005 Sheet 49 of 51
5 4 3 2 1
5 4 3 2 1
Item Fixed Issue Reason for change Rev. PG# Modify List VER Phase
1
D Add C663, C664, C665 For +2.5V (VCC_SYNC) 0.2 9 D
C C
B B
A A
D
1 1. change PU8 from MAX8576 to MAX8578 DVT D
Modify PU8 IC 47
2delete PC132
Modify 1.05VP voltage level
2 47
1. change PR166 from 7.15k to 4.7k , DVT
PC135 from 6800P to 0.047u 0603
1. change PR20 from 412k to 330k
3 change precharge detect point 42 DVT
4 Modify disable precharge respond time
42 1. change PR167/PR168/PR169 from 470k to 100k
DVT
5 PD16 PIN2 AND PIN3 are wrong 45 1. modify PD16 schematic,and delete PD16(only reserve)
DVT
B B
A A
5 4 3 2 1