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Five Variable Maps

Five Variable Maps


Two methods:
1) 32 squares
Think of two maps on top of each other 1 d 1 1 0 1 c

This map for e=0 a

0
One can circle squares: on either level, or between levels.

This map for e=1

1 1

1
c

1 1 1 1

2) Enter variables (letters) on the 16 square map


This is the same as putting a 1 on the e=0 map This is the same as putting a 1 on the e=1 map Can circle Cannot circle e 1 e e e 1 1 1

e a 1 1 1
c

1 1 e 1

Best for where e has simple relations: e is in only a few squares or e is in almost all the squares.
Printed; 11/02/04 Modified; February 11, 2004 Department of Electronics, Carleton University John Knight

Slide 46

Digital Circuits p. 91

Five Variable Maps

Five Variable Maps


d d

Five Variable Maps


Wrap Around To circle between layers, the layers must have a 1 in the same position on both layers. These are the squares which differ by only one input bit. Use of variable entered maps For complicated functions using the double map is usually easier. For many functions one of the variables has a simple relationship. Then the variable entered map is simpler. 58. PROBLEM Plot the variable entered map on the right on the 5-variable map on its left.
a a a

1
b a

1
b

e=0
d

OK
1
b

e=0
d

b a

e=1
d

e=1

b d

e=0
d

e
a b

1 e
c

1 1 e 1

Variable entered map

e=1

Printed; 11/02/04 Modified; February 11, 2004

Department of Electronics, Carleton University John Knight

Comment on Slide 46

Digital Circuits p. 92

Five Variable Maps

Five Variable Maps

Five Variable Maps Method 1: Dual 4-Variable maps


Terms for circles only on the e=0 map are ANDed with e F = e(bd) Terms for circles only on the e=1 map are ANDed with e Terms for circles on both maps dont mention e. + acd + ab + e(cd) 1 d 1 1 0 1 c

e=0

e=1

Method 2: Variable Entered Maps


1s in circles containing e must also be in another circle containing e or all 1s. 1s in circles containing e must be in another circle containing e or all 1s. Terms for circles containing e are ANDed with e Terms for circles containing e are ANDed with e

1 1

1
c

1 1 1 1

1 e 1 e or e 1
d

1 e or 1 e e 1

F = e(bd) + acd + ab + e(cd)

e a 1 1 1
c

1 1 e 1

Printed; 11/02/04 Modified; February 11, 2004

Department of Electronics, Carleton University John Knight

Slide 47 o Comment nSlide 63

Digital Circuits p. 93

Five Variable Maps

Five-Variable Maps

Five-Variable Maps
The 0 is specifically entered on one map, just to remind you that it is a 1 on the other map. Normally 0 are left blank to reduce the clutter. 59. PROBLEM F = (abc + abd + cb)e + (abd + ac + adb)e = (abc + cb)e + (ac + adb)e +abd Plot F on the 5 variable map on the right. Plot F on the variable entered map on the right. 60. PROBLEM (based on the last problem) Circle the 5 variable map and reduce F to 12 letters. Circle the variable entered map and reduce F to 4 terms of 3 letters each.
a a

b d c b a b c c

e=0
d

Variable entered map

e=1

Printed; 11/02/04 Modified; February 11, 2004

Department of Electronics, Carleton University John Knight

Comment on Slide 47

Digital Circuits p. 94

Five Variable Maps

Five Variable Maps

Five Variable Maps Method 1: Dual maps


d 1 e=0
1 1 1 1 1 1 1 0 Johns solution d Toms solution d 1

d d

e=0
a

1 1 1 c

d d

d
b

e=0
a

1 1 1 c

d d

d
1 1 1

d
1 1

e=1

e=1
a

e=1
a

Method 2: Variable entered

c
F = e(abd) + bd + e(abcd)

c F = e(abd) + bd + abcd Tom says, The interaction of d and e is too complex. Use dual maps.

d/e 1 d/0 e/d e


e/d 1

d/e 1 d/0 e/d b e


a
e/d 1

c
F = e(abd) + bd + e(abcd)
Slide 48

Printed; 11/02/04 Modified; February 11, 2004

Department of Electronics, Carleton University John Knight

Digital Circuits p. 95

Five Variable Maps

Five Variable Maps With Dont Cares

Five Variable Maps With Dont Cares


Method 1: Dual 4-variable maps
The extension to 5 variables is straight forward. As before, d can be optionally circled like 1.

Method 2: Variable entered maps


This is much harder. Some new notation must be devised. A d by itself in a square means a d in both the upper and lower levels. If a d is on only one level, the value on the other level must be specified. d / e means d on the top level and 1 on the lower (e=1) level. e / d means 1 on the upper level, the e level, and d on the lower level. One must also have 0 / d and d /0 The result is very difficult to circle properly. However it may be useful if e appears in a very simple way.

Method 3: Split-square maps


A third method for 5 variables would be to use a / if the symbols differed between the levels. Thus 1/0, 0/1, d/0, d/1, 0/d and 1/d would be introduced. You can judge if this is an improvement over Method 2. 1/ 0

d/1 1 d/0 1/d b


1/d 1

c Method 3 map

Printed; 11/02/04 Modified; February 11, 2004

Department of Electronics, Carleton University John Knight

Comment on Slide 48

Digital Circuits p. 96

Multiple Output Maps

Five Variable Maps

Multiple Output Maps


Two or more outputs Same inputs
Find the circuits for F and G
Need two maps Need two circuits

a
Often one can share some gates We optimized maps individually got one common gate abd. size measures 29 letters (literals) 37 gate inputs 11 gates
a c d b c d a b d a b d a b c

1 1 1 1

1 1 1 1
c b

1 1

1 1 1

Map of F

Map of G c

u=abd
F

3 letters

b c d a c d a d b a b c

1 1 1 1

1 a 1 1 1

1 1 1
c

1 1 1
c

c d

F = acd+bcd +u+abd+abc 13 letters

G=bcd+acd +u+abc+acd 13 letters


Slide 49

Printed; 11/02/04 Modified; February 11, 2004

Department of Electronics, Carleton University John Knight

Digital Circuits p. 97

Multiple Output Maps

Five Variable Maps With Dont Cares

Circuit With Two Outputs


Multiple Outputs
The change between multiple outputs and single outputs With multiple outputs, one can often find common gates that can be used for both outputs. Often these common gates are not optimum for either individual circuit, but are optimum for the whole circuit. In the example In this slide the circuits were optimized individually with a half-hearted effort to find common terms. In the next slide, common terms were agressively sought out. Circuit complexity There are several ways to estimate the size of the circuit. The same measures also estimate power dissipation which is now likely to be more important than size. Inverters are not usually counted in the gate count. This is because most will be absorbed when one does a AND/OR to NAND/NOR conversion. The number of gates. The number of gate inputs. This admits that multi-input gates are larger. The number of letters on the right hand side of the expressions. This is easy to do, and is usually considered the best estimate. Note these are relative estimates; used for estimating if one circuit bigger than another. An exact estimate is usually not needed since modern logic is quite inexpensive. It is like estimating the cost of something as $10.00 and quibbiling whether it was really $9.98.

Printed; 11/02/04 Modified; February 11, 2004

Department of Electronics, Carleton University John Knight

Comment on Slide 49

Digital Circuits p. 98

Multiple Output Maps

Multiple Outputs, Finding Common Terms

Multiple Outputs, Finding Common Terms


d d

Try to share terms


Identify common squares on both maps Circle common terms even if the individual maps allow larger circles Check, sometimes this doesnt help. Here changed 3-input AND to 4-input and removed another 3-input. size measures Prev This slide slide 29 letters (literals) 29 33 gate inputs 37 9 gates 11
c a b

1 1 1 1

1 1 1 1
c b

1 1

1 1 1
c

Map of F

Map of G

v=abcd w=abcd u=abd F


c d a a

11 gate inputs

a b c

a d b a b c a b c

1 1 a

1 a 1 1 1

1 1

1 1 1
c

F =v+w+u abc +abc+abc 11 gate inputs

1 1 1
c

b c

G=v+w+u +acd+abc acd 11 gate inputs


Slide 50

Printed; 11/02/04 Modified; February 11, 2004

Department of Electronics, Carleton University John Knight

Digital Circuits p. 99

Multiple Output Maps

Multiple Outputs

Multiple Outputs
Collecting the u+v+w terms would reduce the number of letters and gate inputs, but will increase the number of gates. However the total logic is clearly reduced.
F = abc + abc + x G

(7 letters, 9 inputs, 3 gates) (7 letters, 9 inputs, 3 gates) (11 letters, 14 inputs, 4 gates))

= acd + abc + x

x = abcd + abcd + abd

Total: 25 letters, 10 gates, 32 gate inputs 61. PROBLEM Find the of expressions with minimal logic for the two-output circuit E,F. Soln has 5 gates. If it does not have to be pure of , it can be done in 5 two-input gates, or, with factoring, 4 gates.
Z Z

YZ WX 00 01 11 10

YZ WX 00 01 11 10
00 01

W X Y Z

E F W

00 01 11 10

d 1

d
1

d
1

d
E

1 1
Y

1 1
Y

11

W 10

d
F

62. PROBLEM Find the minimum circuit with the three outputs defined by the maps below. This is a hard problem. You should read over the example for the 7-segment display drivers before attempting it. .
YZ WX 00 01 11 10
00 01 11

YZ WX 00 01 11 10
00 01

1 1

1 1

W 10 1

d
1 1
Y

X W

11 10

1 1 1 1 1 1
Y

YZ WX 00
00 01

Z
01 11 10

X W

11 10

1 1 1 1 1 1 1 1 1 1 d
Y

E=

F=

G=

Printed; 11/02/04 Modified; February 11, 2004

Department of Electronics, Carleton University John Knight

Comment on Slide 50

Digital Circuits p. 100

Multiple Output Maps

7-Segment Display Driver,

7-Segment Display Driver,


YZ WX 00 00 0000 01 0100 11 1100 10 1000 01 11 10

0001 0101 1101 1001

0011 0010 0111 0110 1111 1110 1011 1010

BCD Digits in binary

Z Y X W

b a f g e d c

a f g e d c b

YZ WX 00
00 01 11 10

01 11

10

Design Driver Logic


4 inputs, 7 outputs 7 maps, each with 6 dont cares

Design this logic

LOGIC

Decimal digits displayed

Generate Maps
Choose segment a find all the squares where a is lit. Repeat for b, c, . . .
Digits with a lit Digits with b lit Digits with c lit

Digits with d lit

Digits with e lit

Digits with f lit

Digits with g lit

Printed; 11/02/04 Modified; February 11, 2004

Department of Electronics, Carleton University John Knight

Slide 51

Digital Circuits p. 101

Multiple Output Maps

Seven-Segment Display Driver

Seven-Segment Display Driver


Design Example
The slide above, shows the bars in a seven segment display such as is used in many automotive dashboard displays, or other bright displays1. All the digits from 0 through nine can be shown by lighting the proper bars. Design a circuit which takes a binary-coded-decimal (BCD) digit in on leads W,X,Y and Z and sends out the proper signals to light the 7-segment display on leads a, b, c, d, e, f, and g. Binary-coded decimal (BCD) digits only go from 0 to 9. The other numbers, 10 through 15 will never be received as inputs. Utilize this fact in your solution. 63. PROBLEM The digits on the right have a revised form for 1, 7, 6 and 9. Derive the equations for the display drivers. Keep the same notation for all items that do not change. Minimize the equations for multiple outputs, as is done in the next few pages. If you have new terms, the letters H, Q, S, T, U and V have not been used.
Revised display
YZ WX\

1. The bright light-emitting diode displays use 7-segments as shown. The dimmer watch and control panel displays are usually liquid crystal and have more complex driver logic.

Printed; 11/02/04 Modified; February 11, 2004

Department of Electronics, Carleton University John Knight

Comment on Slide 51

Digital Circuits p. 102

Multiple Output Maps Maps for 7-Segment Display Driver

7-Segment Display Driver,

1
Digits with a lit

1
W

1 1

1
X W

1 1

1 1 1

1
X W

1 1

1 1

1 1 1

Transfer lit segment maps to Karnaugh maps


Z

d d d d 1 1 d d
a
Z Y

d d d d 1 1 d d
b
Z Y

d d d d 1 1 d d
c
Z Y

1 1
W

1 1

1
X W

1 1
X W

1 1 1 1 1

1
X W

1 1
X

d d d d d d 1
d
Y

d d d d d d 1
e
Y

d d d d 1 1 d d
f
Y

d d d d 1 1 d d
g
Y

Minimization
Look for isolated 1s with no neighbors. Look for isolated pairs of 1s with no neighbors. These will always have to be circled individually.
Z Z Z

Expand circles to include d


Z

1 1
W

1 1

1
X W

1 1
X W

1 1 1 1 1

1
X W

1 1
X

d d d d d d 1
d
Y

d d d d d d 1
e
Y

d d d d 1 1 d d
f
Y

d d d d 1 1 d d
g
Y
Slide 52

Printed; 11/02/04 Modified; February 11, 2004

Department of Electronics, Carleton University John Knight

Digital Circuits p. 103

Multiple Output Maps

BCD Display

BCD Display
Typical Minimization Procedure
This should work fairly well as as a general procedure, but a clever person may find more efficient procedures for certain problems. 1. Locate isolated 1s. 1 1 1 These are 1s in a square 1 1 that cannot be grouped with d d W any other square except 1 d d d Y possibly a d squares. Isolated 2. Circle these isolated 1s and expand the circle to include any ds.
Z Z Z Z

1
X W

1 1

1
X W

1 1 1 f
Y

1 1
X

1 1

1 e
Y

d d

X W

d d d d 1 1 d d
g
Y

Isolated pair

3. Locate isolated pairs of 1s in which neither 1 can be paired with another any other square. 4. Circle this pair and expand the circle to include any ds.

Solution to Prob 62. See also prob 74. .


L=YZ+WXY+WXZ E=W Y+L
YZ WX 00 01 11 10
00 01 11

F=WYZ+L
YZ WX 00 01 11 10
00 01

G=WX+Z+XY
YZ WX 00
00 01

Z
01 11 10

1 1

1 1

W 10 1

d
1 1
Y

X W

11 10

1 1 1 1 1 1
Y

X W

11 10

1 1 1 1

1 1 1 1 1 1 d
Y

20 letters, 27 gate inputs, 11 gates


X

Printed; 11/02/04 Modified; February 11, 2004

Department of Electronics, Carleton University John Knight

Comment on Slide 52

Digital Circuits p. 104

Multiple Output Maps Maps for 7-Segment Display Driver Minimization


Look for half-map circles (one letter terms) These do not require an AND gate. Hence they can always be circled without loss of potential gate sharing. On maps b and c, circle W is redundant
Z

Maps for 7-Segment Display Driver ,

Example: f needs only one AND gate for three circles


X Y Z
Z Z

1 1
W

1 1

1
X W

1 1

1 1 1

1
X W

1 1

1 1

1 1 1

d d d d 1 1 d d
a
Y Z

d d d d 1 1 d d
b
Z Y

d d d d 1 1 d d
c
Z Y

1 1
W

1 1

1
X W

1 1
X W

1 1 1 1 1

1
X W

1 1
X

d d d d d d 1
d
Y

d d d d d d 1
e
Y

d d d d 1 1 d d
f
Y

d d d d 1 1 d d
g
Y

The green (light) circles are repeats of half-map circles. A common error is to add the dashed circle W to the b map and on the c map. They are not needed.

Printed; 11/02/04 Modified; February 11, 2004

Department of Electronics, Carleton University John Knight

Slide 53

Digital Circuits p. 105

Multiple Output Maps Maps for 7-Segment Display Driver


Minimization (continued)

BCD Display

Circles that cover half the map These are representend by a single letter and are particularly good. Since they only contain a single letter, they do not need an AND gate. The input can feed directly into the OR gate. There is no advantage to sharing these terms between maps because there is no hardware to share. 5. Locate all circles which, with ds if needed, cover half of a map. There are some ten of them in this example. 6. It is easy to overdo this step Two of these circles cover no 1s that are not covered by other circles. The only new squares they cover contain ds and hence are useless. Remove such circles. The b and c maps have such useless circles.
Z 1 1 W
Z

Z 1 1 1 X W 1 1 1 1 1 1 X W 1 1 1 1

Z 1 1 1

d d d d 1 1 d d
a Y Z 1

d d d d 1 1 d d
b Y Z 1 1 1

d d d d 1 1 d d
c
Z

Y 1 1 1
X

1 1
W

1 1

1 1
X W

d d d d 1 d d
d
Y

X W

d d d d 1 d d
e
Y

d d d d 1 1 d d
f
Y

X W

d d d d 1 1 d d
g
Y

Printed; 11/02/04 Modified; February 11, 2004

Department of Electronics, Carleton University John Knight

Comment on Slide 53

Digital Circuits p. 106

Multiple Output Maps Maps for 7-Segment Display Driver , One partner squares.
1 1
W Z

Maps for 7-Segment Display Driver,

1 1

1
X W

1 1

1 1 1

1
X W

1 1

1 1

1 1 1

d d d d 1 1 d d
a
Y

d d d d 1 1 d d
b
Z
Y

d d d d 1 1 d d
c
Z
Y

1 1
W

1 1

1
X W

1 1
X W

1 1 1 1 1

1
X W

1 1
X

d d d d d d 1
d
Y

d d d d d d 1
e
Y

d d d d 1 1 d d
f
Y

d d d d 1 1 d d
g
Y

Squares with only one partner: (See arrows


ds don't count as partners. Single circle if: Square is isolated on another map. Square has a different single partner on another map, and both partners join other circles. Else circle both partners. They are unlikely to be shareable.

) 1 1 1 1 1 G H 3 AND gates 1 1 1 1 1 G H 4 AND gates 1 There is no example in the BCD display maps.

Expand circles to include ds; lighter (blue) circles.


Printed; 11/02/04 Modified; February 11, 2004 Department of Electronics, Carleton University John Knight

Slide 54

Digital Circuits p. 107

Multiple Output Maps Display Driver, One Partner Squares


Minimization (continued)
Squares that have one partner These squares can be encircled with one and only one other square. ds dont count as a partner. There are two cases, depending on what is at the same position on the other maps The square matches an isolated square on another map Map a has such a square. It can be given a single circle or a double square circle. Looking at map d one sees it has to have a single circle. It can do double duty if this term, WXYZ, is given a single circle on each map.( The pair matches another single partner square. Map e has such a square. WXYZ has one possible partner. On all the other maps where WXYZ =1, it has the same partner (maps d and g), or is covered already (maps f and c). This means it is not a likely candidate for a single circle. Circle both partners. Then expand to cover the ds. Map g has such a square. W XYZ has one possible partner. The partner works on map d, and b has another partner. Circle both partners and expand the circle to cover the ds. There is no example in the BCD display where such term should have only a single circle.
Z 1 1 W 1 1 1 X
W Z

BCD Display

1 1

d d d d 1 1 d d
a Y

1 1

d d d d 1 d d
d
Y Z

1 1
X W

1 1
X

d d d d 1 d d
e
Z Y

d d d d 1 d d
e
Z Y

1 1
W

1 1
X W

1 1 1

1 1
X

d d d d 1 1 d d
g
Y

d d d d 1 1 d d
g
Y

Printed; 11/02/04 Modified; February 11, 2004

Department of Electronics, Carleton University John Knight

Comment on Slide 54

Digital Circuits p. 108

Multiple Output Maps

Maps for 7-Segment Display Driver,

Maps for 7-Segment Display Driver,


Final fill in
Uncovered bits identified as 1 Add terms to cover them 3 new AND terms needed
Z
W

1 1

1 1

1
X W

1 1

1 1 1

1
X W

1 1

1 1

1 1 1

d d d d 1 1 d d
a
Y

d d d d 1 1 d d
b
Y

d d d d 1 1 d d
c
1
Y

1 1
W

1 1

1
X W

1 1
X W

1 1 1 1 1

1 1
X

d d d d d d 1
d
Y

d d d d d d 1
e
Z

d d d d 1 1 d d
f
Y
Z

X W

d d d d 1 1 d d
g
Z

L
1 1 1
X W

One new term is unique XY The others (K, L) are reused. K


1 1
W
W

1 1

1 1 1

1
X W

1 1

1 1

1 1 1

d d d d 1 1 d d
a
Y

d d d d 1 1 d d
b
Z
Y

d d d d 1 1 d d
c
Z
Y

K
1 1 1 1
X W

1 1
X

1 1
W

1 1 1 1
X W

1 1
X

d d d d d d 1
d
Y

d d d d d d 1
e
Y

d d d d 1 1 d d
f
Y

d d d d 1 1 d d
g
Y

Printed; 11/02/04 Modified; February 11, 2004

Department of Electronics, Carleton University John Knight

Slide 55

Digital Circuits p. 109

Multiple Output Maps Display Driver, Final Fill In


Minimization (continued)
Squares that are left These squares have little chance of sharing by circling a smaller than optimum circle. However keep your eyes open. Example: Assume one did not do maps a, b and c, only d, e, f, and g. Then one would do a two square circle for d, e and f
Z Z Z

BCD Display

1 1

If only 4 maps were optimized


W

1 1

1
X W

1 1
X W

1 1 1 1 1

1
X W

1 1
X

d d d d 1 d d
d
Y

d d d d d d 1
e
Y

d d d d 1 1 d d
f
Y

d d d d 1 1 d d
g
Y

For all seven maps, the largest circles appear to be optimum. However another circling, using smaller circles might still be optimum. 64. P ROBLEM Reducing the size of L to L=XYZ and adding reusable term R makes all multi-letter terms reusable. Find the number of letters, gate inputs and gates.
W

R
Z Z 1 1 1 X W 1 1 1 1 1 1 X W 1 1 1 1 Z 1 1 1

K
1 1

L L
Z

d d d d 1 1 d d
a
Z

d d d d 1 1 d d
b
Z

d d d d 1 1 d d
c Y
Z

L
1 1
X W

N
1 1 1
W

1 1

1 1

1
X W

1 1 1

1
X

1 1
X

d d d d 1 d d
d
Y

d d d d 1 d d
e
Y

d d d d 1 1 d d
f
Y

d d d d 1 1 d d
g
Y

Printed; 11/02/04 Modified; February 11, 2004

Department of Electronics, Carleton University John Knight

Comment on Slide 55

Digital Circuits p. 110

Multiple Output Maps

Maps for 7-Segment Display Driver,

Maps for 7-Segment Display Driver,


Form Equations
Label AND terms with letters If one term covers square replace 1 by letter If several terms cover square leave as 1.
Z
Z Z Z

1 N J

K
X W

1 L

X 1 J

X
X W

Y 1

1 1

Z 1 X

d d d d 1 1 d d
a
Z
Y

d d d d 1 1 d d
b
Z
Y

d d d d 1 1 d d
c
Z
Y

K N
W

M 1 P

K
X W

1 P
X W

L 1 X X X

M 1
X W

1 1

d d d d d d K
d
Y

d d d d d d K
e
Y

d d d d 1 W d d
f
Y

d d d d W W d d
g
Y

J = YZ K = XZ L = YZ

M = XY N = XYZ P = YZ

a=J+W+K+N b=J+L+X c=Z+Y+X d=N+M+P+K

e=K+P f=L+W+X g = W + M + P + XY Only term not reused.

Size measures
37 letters (literals) 14 gates 38 gate inputs
Printed; 11/02/04 Modified; February 11, 2004

Using: 35 letters

c=f+Z 14 gates

d=e+N+M 36 gate inputs


Slide 56

Department of Electronics, Carleton University John Knight

Digital Circuits p. 111

Multiple Output Maps

Display Drivers, Forming Equations

Display Drivers, Forming Equations


One way of forming equations is to put a letter like J,K L ... in the square covered by a circle. The one can write the OR inputs for the equation of the map by writing down the letters. To avoid confusion, leave a 1 in squares which are covered by several circles. All letters must appear at least once, or the circle they represent is redundant. Terms which have only one input like X, do not require a special letter, and we give them the name of the input variable.

It is very hard to find the optimal circling in a problem of this size. These maps show a solution which is suboptimal, but you will probably have difficulty improving without comparing answers.
Z Q 1 N J M X W 1 X L 1 X b
Z

Z 1 J X X W Y Y Y 1 X

Z J 1 X

W
Z

1 W a Y Z

Y Y c
Z

Y M 1

Q N
W

M 1 P

Q
X W

P P
X W

Q X 1 X W f
Y

X W

Q d
Y

Q e
Y

1 W g
Y

The equations.

J = YZ L = YZ M = XY

N = XYZ P = YZ Q = XYZ

a= J + W+ Q+ M b=J+L+X c=J+Y+X d = N+ M+ P + Q e=Q+P f = Q+ W+ X g = W + M + P + XY

14+24 literals = 38 14 gates 16 and gate inputs + 23 or = 39

Printed; 11/02/04 Modified; February 11, 2004

Department of Electronics, Carleton University John Knight

Comment on Slide 56

Digital Circuits p. 112

Factoring and Multiplying Out

Two canonical forms

Factoring and Multiplying Out


Two canonical forms
These form can represent any Boolean function.
c b a a e a c e a b d

Sum of Products ( of )
abc + ae + ace + abd + . . . NAND-NAND logic

Product of Sum ( of )
(a+b+c)(a+e)(a+c+e)(a+b+d)( . . . NOR-NOR logic

Dual of of
NAND

Factoring

transforms of of ab + cad (a + c)(b + a + d)

of
(NAND-NAND)

Multiplying out

transforms of of (a + c)(b + a + d) ab + cad


b a

Three Methods of factoring


1. Use the 2nd distributive law x + ab = (x + a)(x + b) 2. Take the dual, multiply out and take the dual again. 3. Plot F on a map and use DeMorgans Law
Printed; 11/02/04 Modified; February 11, 2004 Department of Electronics, Carleton University John Knight

a e a e c a d b

NOR

of
(NOR-NOR)

Slide 57

Digital Circuits p. 113

Factoring and Multiplying Out

Display Drivers, Forming Equations

Factoring and Multiplying Out


Why factor?
Often the factored form is about the same complexity as the of form, but sometimes it can be much simpler. Example where the factored form has half the letters and just over half the gate inputs. a cd + abc + abc + acd = (a + c)(b + d)( a + c)

Three methods of factoring


Using (D2) This is the straightforward way, unfortunately it uses the unfamiliar distributive law which makes the algebra harder for many people. Using duality and (D1) This is algebraically just as difficult as the previous method. However using the more familiar (D1) makes it easier for most people. Using Karnaugh maps This is quite easy, but is more complex for over five input variables.

Printed; 11/02/04 Modified; February 11, 2004

Department of Electronics, Carleton University John Knight

Comment on Slide 57

Digital Circuits p. 114

Factoring and Multiplying Out

Method 1: Factoring Using (D2) YZ + U = YZ + U = (Y + U)(Z + U)


Get extended (D2)

Method 1: Factoring Using (D2)


Example
ABC + X

Use (D2)
(AB + X) (C + X)

ABC + X = (A + X)(B + X)(C + X)

Use (D2) again


(A + X)(B + X)(C + X)

Review Consensus Rules bx + xy + yb

Example
BC + AD

Use (D2) again


(BC + A) (BC + D)

= bx + yb (b + x)(x + y)(y + b) = (b + x)(y + b)


Can reduce further using Consensus (C2) (C + B)(B + D) (C + D) = (B + C)(C + D) (D + B) = (C + B)(D + B)

Use (D2) again, twice


(B + A) (C + A)(B + D) (C + D)

Example
BC + BD (BC + B) (BC + D) (B + B) (C + B)(B + D) (C + D) 1 (C + B)(B + D) (C + D)

Get the Swap Rule


BC + BD = (B + C)(B + D)
Department of Electronics, Carleton University John Knight Slide 58

Printed; 11/02/04 Modified; February 11, 2004

Digital Circuits p. 115

Factoring and Multiplying Out

Factoring Using (D2)

Factoring Using (D2)


Review of the thorems that will be used.
The extended (D2)
ABC + X = (A + X)(B + X)(C + X)

The dual is the extended (D1)


(A + B + C)X = AX + BX + CX

Consensus bx + xy + yb = bx + yb Swap rule (Sw) BC + BD = (B + C)(B + D) 65. PROBLEM What can you say about the dual of the Swap rule? If you cant say anything, substitute X for W and X for W. 66. PROBLEM Factor AB + BC + CA

The dual Consensus (b + x)(x + y)(y + b) = (b + x)(y + b) The dual of the Swap rule (B + C)(B + D) = BC + BD

Printed; 11/02/04 Modified; February 11, 2004

Department of Electronics, Carleton University John Knight

Comment on Slide 58

Digital Circuits p. 116

Factoring and Multiplying Out

Method 1: Factoring Using (D2) YZ + U =

Using D2 alone always works, but long! Shortcut method:


(a) Look for common variables and use (D1) xa + xbc = x(a + bc) (b) Look for complemented variables and use (Sw) xa + xbc = (x + a)(x + bc) (c) Do simplifications as soon as possible xa + a = a, x + xy = x + y (d) Then use (D2)

Review of Rules
Simplify (S) xy + x = x Reduction (R) xy + x = y + x (b + x)(b)=(b + x) Distributive (D2) u + yz = (u + y)(u + z) Extended Distributive (D2) u + xyz = (u + x)(u + y)(u + z) Swap (Sw) by + bz = (b + y)(b + z) Ready to use (D2) Use (D2) twice This can be reduced (B + C)(B + F + C) = (B + C)(F + C) (b + x)(b) = b

Example:
ABC + BCD + BF
commute

Find common variables Choose B over C Use (D1) with B Find complimented variables Use (Sw) with B

BAC + B(CD + F) (B + CD + F)(B + AC)


commute

(B + F + CD)(B + AC) (B + F + C)(B + F + D)(B + A)(B + C) If one expanded using (D2) alone, get
(B + A)(F + A + B)(F + A + C)(F + A + D)(B + F + C)(B + F + D)(B + C)(F + C)
Printed; 11/02/04 Modified; February 11, 2004 Department of Electronics, Carleton University John Knight

see page below

ugh!
Slide 59

Digital Circuits p. 117

Factoring and Multiplying Out

Shortcuts for Factoring

Shortcuts for Factoring


Reason for choosing B over C There are two common factors B and C. If one factors out C first get C(AB + BD) + BF Then one can only use (Sw) on part of the expression to give C(A + B)(B + D) +BF This requires about 6 applications of (D2) to get the final result. Details of the extra reduction (B + C)(B + F + C) = C +B(B + F) = C + BB + BF = (C + B)(C + F) ABC + BCD + BF = (A + BCD)(B + BCD)(C + BCD) + BF = (A + BCD)(B + CD)(C) + BF = (BF + A + BCD)(BF + B + CD)(BF + C) = (BF + A + BCD)(F + B + CD)(BF + C) (D2) (Simplification) xy + x = y + x, (extended D2) (Simplification) xy + x = y + x Use (D2) three times (Simplification) z + uz = z z + uz = z (D2) (c + x)(c + y) = c + xy (D1) (D2)

The long expression using (D2) alone, except for simplifications

= (B + A + BCD)(F + A + BCD) (F + B + C)(F + B + D) (B + C)(F + C) = (B + A)(F + A + BCD) (F + B + C)(F + B + D) (B + C)(F + C) After completing the simplification, you can see why we like the short cuts.

= (B + A)(F + A + B)(F + A + C) (F + A + D) (F + B + C)(F + B + D) (B + C)(F + C) (extended D2)

Printed; 11/02/04 Modified; February 11, 2004

Department of Electronics, Carleton University John Knight

Comment on Slide 59

Digital Circuits p. 118

Factoring and Multiplying Out Factoring Examples Using Shortcut Methods


Factor WXY + WXZ + WYZ + WYZ Associative law WXY + WYZ + WXZ + WYZ (D1) used twice W(XY + YZ) + W(XZ + YZ)

Shortcuts for Factoring

Swap: w(a) + w(b) = (w + b)(w + a) [W +(XZ + YZ)][W +(XY + YZ)] D1 Swap [(W +(Z +Y)(Z + X)][W +Y(X + Z)] D2 D2 (W + Z + Y)(W + Z + X) (W + Y)(W + X + Z) Factor ABD + ACD + AC + ABD (D1) on both sides A(BD + CD) + A(C + BD) swap [A + (C + BD)][A + (BD + CD)] [A + (C + B)(C + D)][A + (B + D)(C + D)] (D2) on left; swap on right (D2) on left; (D2) on right Swap on left; (D1) on right Finally we have to use (D2).

[A + (C + B)][A + (C + D)][A + (B + D)][A + (C + D)] Clean up brackets (A + C + B)(A + C + D)(A + B + D)(A + C + D) 67. PROBLEM: Factor AC + ABD + ABE + ACDE Five factors, four have 3 letters, one has 2.

Printed; 11/02/04 Modified; February 11, 2004

Department of Electronics, Carleton University John Knight

Comment on Slide 59

Digital Circuits p. 119

Factoring and Multiplying Out Example of Multiplying Out


(A + B)(C + D)(F + G + H) = (AC + AD + BC + BD)(F + G + H) (AC + AD + BC + BD) F = + (AC + AD + BC + BD) G + (AC + AD + BC + BD) H ACF + ADF + BCF + BDF + ACG + ADG + BCG + BDG + ACH + ADH + BCH + BDH Use (D1)

Shortcuts for Factoring

All letters are different, no simplification possible Use (D1) rewrite

With all the letters different, there is no way to simplify. The expressions get long rapidly. Using (D1) always works, it is easy on the brain, but hard on the pencil. Also the simplifications must be done by other means.

Printed; 11/02/04 Modified; February 11, 2004

Department of Electronics, Carleton University John Knight

Comment on Slide 60

Digital Circuits p. 120

Factoring and Multiplying Out

Multiplying Out

Multiplying Out
Needed to change of to of ( - - - )( - - - )( - - - ) ( ) + ( ) + ( )
Multiplying out is the dual operation of factoring.

Multiplying Out Uses (D1)

Example:
(B + F + C)(B + C)(B + F + D)(B + A) 0 0 = (BB + BC + FB + FC + CB + C)(BB + BA + FB + FA + DB + DA)
Use D1 x +xy = x Use D1 twice BCD
D

ACF BF
B

= (FB + C)(BA + FB + FA + DB + DA) 0 = FBBA + FBFB + FBFA + FBDB + FBDA + CBA + CFB + CFA + CDB + CDA)
Put letters in order x +xy = x

ABC ACD
D C

BCD

= BF + ABC + ACF + BCD + ACD


Use map

= BF + ABC + BCD

F
A

ABC
C

ACD

Printed; 11/02/04 Modified; February 11, 2004

Department of Electronics, Carleton University John Knight

Slide 60

Digital Circuits p. 121

Factoring and Multiplying Out Example of Multiplying Out


(A + D)(A + C + D)(A + B)(A + B + C)(A + C + D) = (A + D)(A + B) (A + C + D )(A + C + D) (A + B + C)

Shortcuts for Factoring

Arrange terms to ready to use Swap Use Swap twice

= (AB + AD) [A (C + D) + A(C + D )] (A + B + C) Use (D1) = {AB [A (C + D) + A(C + D )] + AD)[A (C + D) + A(C + D )]} (A + B + C) Use (D1) = {AB(C + D) + AD(C + D)} (A + B + C)
xy + x = x

= {ABC + ABD + ADC + AD)} (A + B + C) {ABC + ABD + AD)} A ABC + ABD + + ADB = + {ABC + ABD + AD)} B = + {ABC + ABD + AD)} C ABDC + ADC
xy + x = x

Use (D1)

A C D ABD
B

= ABC + ABD + ABD + ACD

Collect terms Check on map that there is no more simplification


A

ABC

ABD C

Printed; 11/02/04 Modified; February 11, 2004

Department of Electronics, Carleton University John Knight

Comment on Slide 60

Digital Circuits p. 122

Factoring and Multiplying Out

Multiplying Out

Using D1 alone eventually works, but long! Shortcut method:


(a) Look for common variables and use (D2) (x + a)(x + b) = x + bc (b) Look for complemented variables and use (Sw) (x + a)(x + bc) = xa + xbc (c) Do simplifications as soon as possible xa + a = a, x + xy = x + y (d) Then use (D1) (e) Loop back and try again until done.

Review of Rules
Simplify (S) xy + x = x Reduction (R) xy + x = y + x (b + x)(b)=(b + x) Distributive (D2) u + yz = (u + y)(u + z) Extended Distributive (D2) u + xyz = (u + x)(u + y)(u + z) Swap (Sw) by + bz = (b + y)(b + z) (b + x)(b) = b

Example:
(B + F + C)(B + C)(B + F + D)(B + A) Find common variables = (B + F + C)(B + F + D) (B + A)(B + C) Use (D2) twice = (B + F + CD) (B + AC) Use (Sw) with B = BAC + B(F + CD) Finally use (D1) = ABC + BF + BCD Go back and look at Slide 60

Printed; 11/02/04 Modified; February 11, 2004

Department of Electronics, Carleton University John Knight

Slide 61

Digital Circuits p. 123

Factoring and Multiplying Out Multiplying Out


68. PROBLEM Multiply out. Remember to check for obvious simplifications before starting. (W + Y + Z)(X + Y + Z)(W + X)(W + Z)(X + Y + Z)(W + X + Z)

Shortcuts for Factoring

69. PROBLEM Multiply out to get four terms of three letters each. The answer should be very symmetric on an AB\CD Karnaugh map. (B + C)(A + B + C)(A + C + D)(A + B + C)(A + C + D)

Printed; 11/02/04 Modified; February 11, 2004

Department of Electronics, Carleton University John Knight

Comment on Slide 61

Digital Circuits p. 124

Factoring and Multiplying Out

Multiplying Out, Short Cut Method

Multiplying Out, Short Cut Method Example:


(A + C + D)(B + D)(A + B + C)(C + D)(A + B + D)
(x)(x+y) = x Always check for obvious simplifications

= (A + C + D)(B + D)(A + B + C)(C + D)(A + B + D)


Rearrange to use (D2) and Swap

= (A + C + D)(A + C + B)(B + D)(C + D)


Use (D2) and Swap

(A + C + BD) (CD + BD)


x +xy = x

(A + C + BD) CD + (A + C + BD) BD

0 + ABD + CBD + BDBD


Collect terms

ACD + CD + BCD

Use (D1)

= CD + ABD + BCD
Check map for further
D

CD simplifications BCD

= CD + ABD + BC

ABD
A C

Printed; 11/02/04 Modified; February 11, 2004

Department of Electronics, Carleton University John Knight

Slide 62

Digital Circuits p. 125

Factoring and Multiplying Out

Multiplying Out, Short Cuts

Multiplying Out, Short Cuts


Simplify before you start You always want to look for (x + ... + y )( x + y) =(x + y) Reduction and consensus are much harder to spot. Here (A + C + D)(C + D) = [C + (A + D)(D)] = [C + AD] = (C + A)(C + D) Further (C + A)(A + B + C) = (C + A) Hence the expression could be reduced before starting to (B + D)(C + D)(A + C) However, it is sometimes easier just to use (D2) and Swap. Using (D2)

Printed; 11/02/04 Modified; February 11, 2004

Department of Electronics, Carleton University John Knight

Comment on Slide 62

Digital Circuits p. 126

Factoring and Multiplying Out

Method 2: Factoring Using Duality

Method 2: Factoring Using Duality


Recall Factoring Methods:
1. Use (D1) Includes short cuts where one looks for (D2) and Swap first. 2. Use Duality to change factoring to the easier multiplying out. 3. Use Karnaugh Maps and DeMorgans Law.

Factoring Using Duality


Steps: (1) The expression to factor is of Example: AB + BC + ACD = (B + AC)(A + C + D) = BA + BC + BD + ACA + ACC + ACD = BA + BC + BD + AC (D1) (A + B)(B + C)(A + C + D) (3) Multiply out the dual to get of again BA + BC + BD + AC (3a) The dual identity is (A + B)(B + C)(A + C + D) = BA + BC + BD + AC (4) Taking the dual back gives a valid identity with the desired of . AB + BC + ACD = (B + A)(B + C)(B + D)(A + C) (2) Take its dual to get of .

Multiply Out Details


(A + B)(B + C)(A + C + D) (D2)

Multiplying out is based on (D1). Easier than factoring based on (D2). Algebra of one is the dual of the other
Slide 63

Printed; 11/02/04 Modified; February 11, 2004

Department of Electronics, Carleton University John Knight

Digital Circuits p. 127

Factoring and Multiplying Out

Changing Factoring into Multiplying Out

Changing Factoring into Multiplying Out


Factoring a of is Coverted to Multiplying Out its Dual
We take a factoring problem which is confusing, because factoring is based on (D2). This law is not a normal algebraic law and is harder to work with. In the dual space, the dual expression is already factored. The problem is transformed into multiplying out, which is based on the first distributive law (D1). (D1) is more familiar, and hence multiplying out is usually easier than factoring. Multiplying out in the dual space does not give the answer. One take the dual of the answer. This will then be the factored form of the original expression. 70. PROBLEM Show that F = ABC D + ABCD +ABCD + ABCD takes only 8 letters or 12 gate inputs in factored form.

Printed; 11/02/04 Modified; February 11, 2004

Department of Electronics, Carleton University John Knight

Comment on Slide 63

Digital Circuits p. 128

Factoring and Multiplying Out

Factoring Using Duality

Factoring Using Duality


Example:
A BD + AB D + ABC + AC
Take dual

(-25% if you say these are equal)

(A + B + D)(A + B + D)(A + B + C)(A + C) Rearrange to use (D2) = (A + B + D)(A + B + C)(A + B + D)(A + C) Use (D2) = [A + (B + D)(B + C)] [A + (B + D)C] equal Use Swap = A (B + D)C) + A(B + D)(B + C) Use Swap = A (B + D)C) + A(B C + BD) Use (D1) = ABC + A DC + AB C + ABD = A BC + A DC + AB C + ABD OK
Take dual

equal

ABC Check on map ABD


A

(A + B + C)(A + D + C)(B + C)(A + B + D)

AB C

A DC

Printed; 11/02/04 Modified; February 11, 2004

Department of Electronics, Carleton University John Knight

Slide 64

Digital Circuits p. 129

Factoring and Multiplying Out

Factoring In the Dual Space

Factoring In the Dual Space


Example
A BC + ACD + ABC + BCD Take the dual To Factor

(A + B + C)(A + C + D)(A + B + C)(B + C + D) = (C + B + A)(C + B + A)(C + A + D)(C + B + D)

Note the excess of C and C rearrange for (D2) Use (D2)

= [C + (B + A)(B + A)] [(C + (A + D)(B + D)] Use Swap = C(A + D)(B + D) + C(B + A)(B + A) Use Swap = C(AB + D) + C(BA + BA) = CAB + CD + C BA + CBA OK Take the dual (C + A + B)(C + D)(C + B + A)(C + B + A) 71. PROBLEM Factor EF D + ECD + E C + EFD Use (D1) Check on map for more simplifications
ABC
A

CD
D

ABC
C

ABC

Printed; 11/02/04 Modified; February 11, 2004

Department of Electronics, Carleton University John Knight

Comment on Slide 64

Digital Circuits p. 130

Factoring and Multiplying Out

Method 3: Factoring Using Karnaugh

Method 3: Factoring Using Karnaugh Maps


D
Steps: (1) Given F = ( of expression) F = ABC + AD + ABC + BCD (2) Plot it on a map. (3) Make a map for F, It has 1 where F had 0 (4) Circle the F map (5) Write out the equation for F F = C D + ABC + AB D + AB C (6) Invert F using DeMorgans law to get F as of F = (C + D)(A + B + C)(A + B + D)(A + B + C)

A
D

1 1 1 1 1 1
C

1 1
B

Map of F

1 1 1 1

1 1 1 1
C B

Map of F

1 1 1 1

1 1 1 1
C B

Map of F

Printed; 11/02/04 Modified; February 11, 2004

Department of Electronics, Carleton University John Knight

Slide 65

Digital Circuits p. 131

Factoring and Multiplying Out

Method 3: Factoring Using Karnaugh

Method 3: Factoring Using Karnaugh Maps


This method is probably the easiest, and least error prone, for up to 4 variables. Above 4, it gets hard. It is very easy to incorporate dont cares with this method.

72. PROBLEM Factor EF D + ECD + E C + EFD Using a Karnaugh map and compare your answer with that from Problem 71. 73. PROBLEM Factor ACD + BD + ABC + CD + ABD Use a Karnaugh map and obtain the minimum of expression. 74. PROBLEM Show that Prob 62. has a slightly simpler solution if you find the of expression.

Solution:
to Prob 74. Maps from Prob 62.
YZ WX 00 01 11 10
00 01 11

YZ WX 00 01 11 10

YZ WX 00 01 11 10
00 01

YZ WX 00 01 11 10
00 01

Z
YZ WX 00
00 01 01 11 10

00 01 11

1 1

1 1

1 1 1

1 1

d
1 1

11

10

W 10 1 Y

1 1 1

X W

11 10

1 1
Y

1 1 1 1

1 1 1 1 1 1 d
Y

W 10 1

d
1 1
Y

11

W 10 1

1 1 1 1

1 1 1
Y X

YZ WX 00 01 11 10
00 01

1 1 1 1

11 10

1 1 1 1
Y

1 1

E=YZ+Q+P M=WXY Z E=(Y+Z)Q P

F=W Z+Q Q=M+XYZ P=WY

G=XZ+M

E=

F=

G=

of solution had 20 letters, 27 gate inputs, and 11 gates.

F=(W+Z)Q 20 letters, 23 gate inputs, 10 gates

G=(X+Z)M

Printed; 11/02/04 Modified; February 11, 2004

Department of Electronics, Carleton University John Knight

Comment on Slide 65

Digital Circuits p. 132

Factoring and Multiplying Out

Method 3: Factoring Using Karnaugh

Product of Sum Karnaugh Maps


Simplify the of expression
F = (A + B + C)(A + C + D)(B + C + D)(B + D)(A + C + D) (1) Find Inverse with DeMorgan. F = ABC + ACD + BCD + B D + ACD (2) Make a map for F (3) Simplify the F map (4) Write out the equation for F F = BC + AB C + ABD + B D (5) Invert F using DeMorgans law to get simplified F F = (B + C)(A + B + C)(A + B + D)(B + D)

1 A 1 1 1 1

1 1 1
C

1
B

Map of F

1 A 1 1 1 1

1 1 1
C

1
B

Map of F

The of map for F Can be used as a of map for F

Printed; 11/02/04 Modified; February 11, 2004

Department of Electronics, Carleton University John Knight

Slide 66

Digital Circuits p. 133

Factoring and Multiplying Out

Method 3: Factoring Using Karnaugh

Product of Sum Maps


Constructing an AND of ORs map
a bc 0
00 01 11 10 1

True of map
a bc 0 c
00 01 11 b 10 1

0 0 1 1

1 1 1 1

a bc 0
00 01 11 b 10

1 1 1 1

1 1 0 0

0 1 1 0

0 1 1 0

a bc 0 c
00 01 11 b 10

0 0 0 1 1 0 0 0

F=a+b F=a+b F=c F = (a + b)(a + b)c Product map The 0s are the important thing in of maps. When one ANDs the three maps, the product map will have a 0 where any of the sum terms have a 0. The other squares have 1s.
a bc 0
00 01 11 10 1

If one multiplies out F = (a + b)(a + b)c, one gets F= abc + abc. Which has exactly the same map except now one thinks about the 1s instead of the 0s. b

0 0

0
c a bc 0
00 01 11 b 10 1

1 1 0

0 0

Thus the map of F is not quite the of map for F. of map of F However it can be used as that map. Further using DeMorgans theorem on the map of F, is far easier than twisting ones mind around the of maps such as the one above.

1 1 1 0 0 1 1 1

of map of F

75. PROBLEM Multiply out to get three terms of 2 of three letters, and one of two letters. Use a Karnaugh map. (B + C)(A + B + C)(A + C + D)(A + B + C)(A + C + D)

Printed; 11/02/04 Modified; February 11, 2004

Department of Electronics, Carleton University John Knight

Comment on Slide 66

Digital Circuits p. 134

Method 3: Factoring Using Karnaugh

Printed; 11/02/04 Modified; February 11, 2004

Department of Electronics, Carleton University John Knight

Slide 67

Digital Circuits p. 135

Method 3: Factoring Using Karnaugh

Solution problem 75
F = (B + C)(A + B + C)(A + C + D)(A + B + C)(A + C + D) F = BC + ABC + AC + ABC + A CD

1 1
F

1 1 1

1 1 1 1 1 1
C B

1 1
F

1
B

A 1

1
C
F = B D + AB C + A B C

76. PROBLEM (ACTUALLY SOLN TO 75) Multiply out to get four terms of three letters each. Use a Karnaugh map. (B + C)(A + B + C)(A + C + D)(A + B + C)(A + C + D)

Printed; 11/02/04 Modified; February 11, 2004

Department of Electronics, Carleton University John Knight

Comment on Slide 63

Digital Circuits p. 136

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