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PD60017-O
IR2125(S)
CURRENT LIMITING SINGLE CHANNEL DRIVER
Features Product Summary
• Floating channel designed for bootstrap operation
Fully operational to +500V VOFFSET 500V max.
Tolerant to negative transient voltage
dV/dt immune IO+/- 1A / 2A
• Gate drive supply range from 12 to 18V
• Undervoltage lockout VOUT 12 - 18V
• Current detection and limiting loop to limit driven
power transistor current VCSth 230 mV
• Error lead indicates fault conditions and programs
shutdown time ton/off (typ.) 150 & 150 ns
• Output in phase with input
• 2.5V, 5V and 15V input logic compatible Packages
Description
The IR2125(S) is a high voltage, high speed power
MOSFET and IGBT driver with over-current limiting
protection circuitry. Proprietary HVIC and latch im-
mune CMOS technologies enable ruggedized mono-
lithic construction. Logic inputs are compatible with
standard CMOS or LSTTL outputs, down to 2.5V 16-Lead SOIC
logic. The output driver features a high pulse current 8-Lead PDIP
(Wide Body)
buffer stage designed for minimum driver cross-
conduction. The protection circuitry detects over-current in the driven power transistor and limits the gate drive volt-
age. Cycle by cycle shutdown is programmed by an external capacitor which directly controls the time interval
between detection of the over-current limiting conditions and latched shutdown. The floating channel can be used to
drive an N-channel power MOSFET or IGBT in the high or low side configuration which operates up to 500 volts.
Typical Connection
up to 500V
V CC VCC VB
IN IN HO
ERR CS
COM VS TO
LOAD
(Refer to Lead Assignments for correct pin configuration). This/These diagram(s) show electrical
connections only. Please refer to our Application Notes and DesignTips for proper circuit board layout.
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IR2125(S)
Absolute Maximum Ratings
Absolute Maximum Ratings indicate sustained limits beyond which damage to the device may occur. All voltage param-
eters are absolute voltages referenced to COM. The Thermal Resistance and Power Dissipation ratings are measured
under board mounted and still air conditions.
Symbol Definition Min. Max. Units
VB High Side Floating Supply Voltage -0.3 525
VS High Side Floating Offset Voltage VB - 25 VB + 0.3
VHO High Side Floating Output Voltage VS - 0.3 VB + 0.3
VCC Logic Supply Voltage -0.3 25 V
VIN Logic Input Voltage -0.3 VCC + 0.3
VERR Error Signal Voltage -0.3 VCC + 0.3
VCS Current Sense Voltage VS - 0.3 VB + 0.3
dVs/dt Allowable Offset Supply Voltage Transient — 50 V/ns
PD Package Power Dissipation @ TA ≤ +25°C (8 lead PDIP) — 1.0
W
(16 lead SOIC) — 1.25
RthJA Thermal Resistance, Junction to Ambient (8 lead PDIP) — 125
°C/W
(16lLead SOIC) — 100
TJ Junction Temperature — 150
TS Storage Temperature -55 150 °C
TL Lead Temperature (Soldering, 10 seconds) — 300
Note 1: Logic operational for VS of -5 to +500V. Logic state held for VS of -5V to -VBS. (Please refer to the Design Tip
DT97-3 for more details).
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IR2125(S)
Dynamic Electrical Characteristics
VBIAS (VCC, VBS) = 15V, CL = 3300 pF and TA = 25°C unless otherwise specified. The dynamic electrical characteristics
are measured using the test circuit shown in Figures 3 through 6.
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IR2125(S)
Functional Block Diagram
VCC VB
UV
UV DETECT PRE
DETECT HV R Q
DRIVER
LEVEL
PULSE R BUFFER HO
UP SHIFT
SHIFTERS FILTER S
IN
LATCHED PULSE VB VS
1.8V SHUTDOWN GEN
0.23V
ERROR PULSE -
TIMING GEN + CS
AMPLIFER
ERR Q R PULSE DOWN
S FILTER HV SHIFTERS
LEVEL 500 ns
1.8V SHIFT BLANK
COM COMPARATOR
Lead Definitions
Symbol Description
VCC Logic and gate drive supply
IN Logic input for gate driver output (HO), in phase with HO
ERR Serves multiple functions; status reporting, linear mode timing and cycle by cycle logic
shutdown
COM Logic ground
VB High side floating supply
HO High side gate drive output
VS High side floating supply return
CS Current sense input to current sense comparator
Lead Assignments
1 Vcc VB 16
1 V CC VB 8 2 15
3 IN HO 14
2 IN HO 7
4 ERR CS 13
3 ERR CS 6 5 COM VS 12
6 11
4 COM VS 5
7 10
8 9
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IR2125(S)
HV=10 to 600V
ERR
t sd
HO
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IR2125(S)
500 500
400 400
Turn-On Delay Time (ns)
Max.
Typ.
100 100
0 0
-50 -25 0 25 50 75 100 125 10 12 14 16 18 20
Temperature (°C) VBIAS Supply Voltage (V)
Figure 7A. Turn-On Time vs. Temperature Figure 7B. Turn-On Time vs. Voltage
500 500
400 400
Turn-Off Delay Time (ns)
300 300
Max.
200 200
Typ.
Max.
Typ.
100 100
0 0
-50 -25 0 25 50 75 100 125 10 12 14 16 18 20
Temperature (°C) VBIAS Supply Voltage (V)
Figure 8A. Turn-Off Time vs. Temperature Figure 8B. Turn-Off Time vs. Voltage
5.00 5.00
ERR to Output Shutdown Delay Time (µs)
4.00 4.00
3.00 3.00
Max.
0.00 0.00
-50 -25 0 25 50 75 100 125 10 12 14 16 18 20
Temperature (°C) VBIAS Supply Voltage (V)
Figure 9A. ERR to Output Shutdown vs. Temperature Figure 9B. ERR to Output Shutdown vs. Voltage
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IR2125(S)
100 100
80 80
Max.
60 Max. 60
Typ.
40 Typ. 40
20 20
0 0
-50 -25 0 25 50 75 100 125 10 12 14 16 18 20
Temperature (°C) VBIAS Supply Voltage (V)
Figure 10A. Turn-On Rise Time vs. Temperature Figure 10B. Turn-On Rise Time vs. Voltage
100 100
80 80
Turn-Off Fall Time (ns)
60 60
Max.
40 40
Max. Typ.
Typ.
20 20
0 0
-50 -25 0 25 50 75 100 125 10 12 14 16 18 20
Temperature (°C) VBIAS Supply Voltage (V)
Figure 11A. Turn-Off Fall Time vs. Temperature Figure 11B. Turn-Off Fall Time vs. Voltage
2.00 2.00
CS to Output Shutdown Delay Time (µs)
CS to Output Shutdown Delay Time (µs)
1.60 1.60
Max.
Typ.
0.80 0.80
Typ.
0.40 0.40
0.00 0.00
-50 -25 0 25 50 75 100 125 10 12 14 16 18 20
Temperature (°C) VBIAS Supply Voltage (V)
Figure 12A. CS to Output Shutdown vs. Temperature Figure 12B. CS to Output Shutdown vs. Voltage
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IR2125(S)
20.0 20.0
CS to ERR Pull-Up Delay Time (µs)
Max.
12.0 12.0 M ax.
Typ.
Typ.
8.0 8.0
4.0 4.0
0.0 0.0
-50 -25 0 25 50 75 100 125 10 12 14 16 18 20
Temperature (°C) VBIAS Supply Voltage (V)
Figure 13A. CS to ERR Pull-Up vs. Temperature Figure 13B. CS to ERR Pull-Up vs. Voltage
5.00 5.00
4.00 4.00
Logic "1" Input Threshold (V)
3.00 3.00
Min. Min.
2.00 2.00
1.00 1.00
0.00 0.00
-50 -25 0 25 50 75 100 125 10 12 14 16 18 20
Temperature (°C) VCC Logic Supply Voltage (V)
Figure 14A. Logic “1” Input Threshold vs. Figure 14B. Logic “1” Input Threshold vs. Voltage
Temperature
5.00 5.00
4.00 4.00
Logic "0" Input Threshold (V)
Logic "0" Input Threshold (V)
3.00 3.00
2.00 2.00
0.00 0.00
-50 -25 0 25 50 75 100 125 10 12 14 16 18 20
Temperature (°C) VCC Logic Supply Voltage (V)
Figure 15A. Logic “0” Input Threshold vs. Figure 15B. Logic “0” Input Threshold vs. Voltage
Temperature
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IR2125(S)
500 500
CS Input Positive Going Threshold (mV)
Max. Max.
300 300
Typ. Typ.
200 200
Min. Min.
100 100
0 0
-50 -25 0 25 50 75 100 125 10 12 14 16 18 20
Temperature (°C) VBS Floating Supply Voltage (V)
Figure 16A. CS Input Threshold (+) vs. Figure 16B. CS Input Threshold (+) vs. Voltage
Temperature
500 500
CS Input Negative Going Threshold (mV)
400 400
300 300
Max. Max.
Typ. Typ.
200 200
Min. Min.
100 100
0 0
-50 -25 0 25 50 75 100 125 10 12 14 16 18 20
Temperature (°C) VBS Floating Supply Voltage (V)
Figure 17A. CS Input Threshold (-) vs. Temperature Figure 17B. CS Input Threshold (-) vs. Voltage
1.00 1.00
0.80 0.80
High Level Output Voltage (V)
0.60 0.60
0.40 0.40
0.20 0.20
Max. Max.
0.00 0.00
-50 -25 0 25 50 75 100 125 10 12 14 16 18 20
Temperature (°C) VBS Floating Supply Voltage (V)
Figure 18A. High Level Output vs. Temperature Figure 18B. High Level Output vs. Voltage
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IR2125(S)
1.00 1.00
0.80 0.80
Low Level Output Voltage (V)
0.40 0.40
0.20 0.20
Max. Max.
0.00 0.00
-50 -25 0 25 50 75 100 125 10 12 14 16 18 20
Temperature (°C) VBS Floating Supply Voltage (V)
Figure 19A. Low Level Output vs. Temperature Figure 19B. Low Level Output vs. Voltage
500 500
400 400
Offset Supply Leakage Current (µA)
300 300
200 200
100 100
Max.
Max.
0 0
-50 -25 0 25 50 75 100 125 0 100 200 300 400 500
Temperature (°C) VB Boost Voltage (V)
Figure 20A. Offset Supply Current vs. Temperature Figure 20B. Offset Supply Current vs. Voltage
2.00 2.00
1.60 1.60
VBS Supply Current (mA)
VBS Supply Current (mA)
1.20 1.20
Max.
0.80 0.80 Max.
0.00 0.00
-50 -25 0 25 50 75 100 125 10 12 14 16 18 20
Temperature (°C) VBS Floating Supply Voltage (V)
Figure 21A. V BS Supply Current vs. Temperature Figure 21B. V BS Supply Current vs. Voltage
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IR2125(S)
2.00 2.00
1.60 1.60
VCC Supply Current (mA)
0.80 0.80
Typ. Typ.
0.40 0.40
0.00 0.00
-50 -25 0 25 50 75 100 125 10 12 14 16 18 20
Temperature (°C) VCC Logic Supply Voltage (V)
Figure 22A. V CC Supply Current vs. Temperature Figure 22B. V CC Supply Current vs. Voltage
25 25
20 20
Logic "1" Input Bias Current (µA)
15 15
Max.
10 10
Max.
Typ.
5 5
Typ.
0 0
-50 -25 0 25 50 75 100 125 10 12 14 16 18 20
Temperature (°C) VCC Logic Supply Voltage (V)
Figure 23A. Logic “1” Input Current vs. Figure 23B. Logic “1” Input Current vs. Voltage
Temperature
5.00 5.00
4.00 4.00
Logic "0" Input Bias Current (µA)
3.00 3.00
2.00 2.00
Max. Max.
1.00 1.00
0.00 0.00
-50 -25 0 25 50 75 100 125 10 12 14 16 18 20
Temperature (°C) VCC Logic Supply Voltage (V)
Figure 24A. Logic “0” Input Current vs. Figure 24B. Logic “0” Input Current vs. Voltage
Temperature
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IR2125(S)
25.0 25.0
20.0 20.0
"High" CS Bias Current (µA)
Max.
10.0 10.0
Max.
Typ.
Typ.
5.0 5.0
0.0 0.0
-50 -25 0 25 50 75 100 125 10 12 14 16 18 20
Temperature (°C) VBS Floating Supply Voltage (V)
Figure 25A. “High” CS Bias Current vs. Figure 25B. “High” CS Bias Current vs. Voltage
Temperature
5.00 5.00
4.00 4.00
"Low" CS Bias Current (µA)
3.00 3.00
2.00 2.00
Max. Max.
1.00 1.00
0.00 0.00
-50 -25 0 25 50 75 100 125 10 12 14 16 18 20
Temperature (°C) VBS Floating Supply Voltage (V)
Figure 26A. “Low” CS Bias Current vs. Temperature Figure 26B. “Low” CS Bias Current vs. Voltage
11.0 11.0
Max.
10.0 10.0
VBS Undervoltage Lockout - (V)
VBS Undervoltage Lockout + (V)
Typ.
Max.
9.0 9.0
Min.
Typ.
8.0 8.0
Min.
7.0 7.0
6.0 6.0
-50 -25 0 25 50 75 100 125 -50 -25 0 25 50 75 100 125
Temperature (°C) Temperature (°C)
Figure 27. V BS Undervoltage (+) vs. Temperature Figure 28. VBS Undervoltage (-) vs. Temperature
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IR2125(S)
11.0 11.0
10.0 10.0
VCC Undervoltage Lockout + (V)
Typ.
9.0 9.0
Max.
Min.
Typ.
8.0 8.0
Min.
7.0 7.0
6.0 6.0
-50 -25 0 25 50 75 100 125 -50 -25 0 25 50 75 100 125
Temperature (°C) Temperature (°C)
Figure 29. V CC Undervoltage (+) vs. Temperature Figure 30. VCC Undervoltage (-) vs. Temperature
250 250
200 200
ERR Timing Charge Current (µA)
150 150
Max. Max.
Typ.
Typ.
100 100
Min.
Min.
50 50
0 0
-50 -25 0 25 50 75 100 125 10 12 14 16 18 20
Temperature (°C) VCC Logic Supply Voltage (V)
Figure 31A. ERR Timing Charge Current vs. Figure 31B. ERR Timing Charge Current vs.
Temperature Voltage
25.0 25.0
20.0 20.0
ERR Pull-Up Current (mA)
ERR Pull-Up Current (mA)
Typ.
15.0 15.0
Typ.
Min. 10.0
10.0
Min.
5.0 5.0
0.0 0.0
-50 -25 0 25 50 75 100 125 10 12 14 16 18 20
Temperature (°C) VCC Logic Supply Voltage (V)
Figure 32A. ERR Pull-Up Current vs. Temperature Figure 32B. ERR Pull-Up Current vs. Voltage
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IR2125(S)
50 50
40 40
ERR Pull-Down Current (mA)
30 30
Typ.
Min.
20 20
Max.
10 10
0 0
-50 -25 0 25 50 75 100 125 10 12 14 16 18 20
Temperature (°C) VCC Logic Supply Voltage (V)
Figure 33A. ERR Pull-Down Current vs.Temperature Figure 33B. ERR Pull-Down Current vs. Voltage
2.50 2.50
1.50 1.50
Min.
Typ.
1.00 1.00
Min.
0.50 0.50
0.00 0.00
-50 -25 0 25 50 75 100 125 10 12 14 16 18 20
Temperature (°C) VBS Floating Supply Voltage (V)
Figure 34A. Output Source Current vs. Figure 34B. Output Source Current vs. Voltage
Temperature
5.00 5.00
3.00 3.00
Min.
Typ.
2.00 2.00
Min.
1.00 1.00
0.00 0.00
-50 -25 0 25 50 75 100 125 10 12 14 16 18 20
Temperature (°C) VBS Floating Supply Voltage (V)
Figure 35A. Output Sink Current vs.Temperature Figure 35B. Output Sink Current vs. Voltage
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IR2125(S)
300 300
250 250
Max .
Turn-On Delay Time (ns)
150 150
100 100
Typ.
50 50
0 0
0 2 4 6 8 10 12 14 16 18 20 0 2 4 6 8 10 12 14 16 18 20
Input Voltage (V) Input Voltage (V)
Figure 36A. Turn-On Time vs. Input Voltage Figure 36B. Turn-Off Time vs. Input Voltage
0.00
-3.00
VS Offset Supply Voltage (V)
Typ.
-6.00
-9.00
-12.00
-15.00
10 12 14 16 18 20
VBS Floating Supply Voltage (V)
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IR2125(S)
Case outlines
01-6014
8-Lead PDIP 01-3003 01 (MS-001AB)
01 6015
16-Lead SOIC (wide body) 01-3014 03 (MS-013AA)
WORLD HEADQUARTERS: 233 Kansas Street, El Segundo, California 90245 Tel: (310) 252-7105
Data and specifications subject to change without notice. 5/23/2002
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