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5

Alba Discrete ATI M92-LP gDDR2 Schematics


uFCPGA Mobile Penryn
Intel Cantiga-PM + ICH9M
C

2009-03-23
REV : SA
B

DY : Nopop Component
GM : Pop when Cantiga is GM
PM : Pop when Cantiga is PM
G/P : BOM control if Cantiga is PM

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size
Document Number
Custom
Date:
5

Monday, March 23, 2009

Cover Page

Rev

SB

Alba Discrete
Sheet
1

of

60

ALBA Discrete Block Diagram


D

PCB LAYER
L1:
L2:
L3:
L4:
L5:
L6:
L7:
L8:

Top
GND
Signal
Signal
VCC
Signal
GND
Bottom

CRT

42

Clock Generator
SLG8SP513VTR

Intel Mobile CPU


Penryn

Socket P

LCD

41

8,9

91.4BK01.001
48.4BK13.0SA
09207
SA

34,35

INPUTS

OUTPUTS

+PWR_SRC

+VCC_CORE

SYSTEM DC/DC

36

TPS51117
INPUTS

OUTPUTS

+PWR_SRC

+1.05V_VCCP

RGB CRT

INPUTS

DDRII
800

DDRII 800 Channel A

DDR Memory I/F

53,54,55,56

OUTPUTS
+15V_ALW
+3.3V_RTC_LDO
+5V_ALW
+3.3V_ALW

+PWR_SRC

Slot 0

LDO

16

DDR II 800 Channel B

DDRII
800

External Graphics

TPS2231RGP

Slot 1

37

L6935TR

Power SW

AGTL+ CPU I/F

PCIe x 16

33

TPS51125

FSB
800/1066MHz

Intel
Cantiga-GM

LVDS(Dual Channel)

:
:
:
:

ISL6266A

SYSTEM DC/DC

VRAM(gDDR2)
32Mbx16x4 (512MB)457,58

ATI M92-LP
C

Project code
Part Number
PCB P/N
Revision

CPU DC/DC

50

INPUTS

OUTPUTS

+1.8V_SUS

+1.5V_RUN

17

10,11,12,13,14,15

New Card

PCIE x 1 & USB 2.0 x 1

(On Express Card board)

DMIx4

CONTROL-LINK

PCIE x 1

10/100 LOM

(7 in 1)SD/MMC
MS/MS Pro/xD

USB2.0

Realtek
RTS5159

ICH9-M

802.11a/b/g/n

High Definition Audio

ACPI 1.1
AZALIA

Azalia
CODEC

USB 2.0 x 1

Bluetooth

45

USB 2.0 x 1

Right Side:
USB x 1

OUTPUTS

+PWR_SRC

+VCC_GFX_CORE

INPUTS

OUTPUTS

+DC_IN
+PBATT

+PWR_SRC

38

TPS51100
51

INPUTS

OUTPUTS

+1.8V_SUS

22

32

LDO

LPC Bus

18,19,20,21

+V_DDR_MCH_REF
+0.9V_DDR_VTT

KBC

SATA

HP OUT
(On Express Card board)

INPUTS

PCI/PCI BRIDGE

SATA

IDT
92HD81

39

MAX8731A
47

OP AMP

MIC IN

+1.8V_SUS

TPS51117

LPC I/F

44

+PWR_SRC

43

CAMERA
(Option)

USB 2.0 x 1

USB 2.0

SATA ports (4)

Internal Mic

OUTPUTS

CHARGER

PCI Express ports (6)

Digital Mic Array


47
(Option)

INPUTS

SYSTEM DC/DC

Mini-Card

PCIE x 1

38

42

USB 2.0/1.1 ports (12)


50

(On Express Card board)

PCIE

SYSTEM DC/DC
TPS51117

Left Side:
USB x 2 46

USB 2.0 x 2

Intel

CardReader

RJ45
CONN

25

RTL8103EL

50

LDO

WINBOND

SPI

WPCE773L

26

37

L6935TR

INPUTS

OUTPUTS

+1.8V_SUS

+1.1V_RUN

<Core Design>

2CH SPEAKER
HDD

44

44

ODD
44

Flash ROM
2MB

47

Touch
PAD

45

Int.
KB

Thermal
& Fan
45

EMC2102

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

28,44
Title
Size
Document Number
Custom
Date:

Block Diagram

Monday, March 23, 2009

Rev

Alba Discrete
Sheet
1

SB
of

60

+PWR_SRC

Adapter

TPS51117
ISL6266A

32

TPS51117
36

+1.8V_SUS

39

Charger
MAX8731A

Battery

TPS51117
34,35

SI4835BDY

38

+PBATT

+VCC_CORE

+1.05V_VCCP

+VCC_GFX_CORE

32

TPS51100

TPS51125

L6935TR

38

L6935TR

37

+1.1V_RUN

+5V_ALW2

3D3V_AUX_S5

+15V_ALW

+3.3V_RTC_LDO

37

33

+5V_ALW

+V_DDR_MCH_REF

+3.3V_ALW

+1.5V_RUN

+0.9V_DDR_VTT

TPS2231RGP
TPS2062AD

AO4468

46

+5V_USB1

TPS2062AD
30

+5V_RUN

AO3403
51

+5V_USB2

TPS2231RGP
25

+3.3V_LAN

50

+3.3V_CARDAUX

RTL8103EL

30

+1.5V_CARD

+3.3V_RUN

TPS2034DR
25

50

AO4468

TPS2231RGP

41

50

SI2301
30

+DVDD12

+LCDVDD

+3.3V_CARD

+3.3V_DELAY

Power Shape
Regulator

LDO

Switch

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

Power Block Diagram

Size
Document Number
Custom

Date: Monday, March 23, 2009


5

Rev

SB

Alba Discrete
Sheet
1

of

59

ICH9M SMBus Block Diagram

KBC SMBus Block Diagram


+5V_RUN

SRN10KJ-5-GP
1

+3.3V_ALW

+3.3V_RUN

PSDAT1

TPDATA

PSCLK1

TPCLK

ICH9M
SMBCLK

SMB_CLK

SMBDATA

SMB_DATA

TPDATA

TPCLK

TPCLK

45

SRN2K2J-1-GP

DIMM 1
ICH_SMBCLK

ICH_SMBDATA

SCL
SDA

SRN4K7J-8-GP

16

SMBus Address:A0

20

TPDATA

+3.3V_RTC_LDO

+3.3V_RUN
SRN2K2J-1-GP

SCL1

BAT_SCL

SDA1

BAT_SDA

2N7002SPT

DIMM 2
ICH_SMBCLK

ICH_SMBDATA

SDA

Battery Conn.

SRN100J-3-GP
PBAT_SMBCLK1

CLK_SMB

PBAT_SMBDAT1

DAT_SMB

KBC

SCL

17

SMBus Address:A4
2

SMB_CLK
SMB_DATA

SMB_CLK
SMB_DATA

50

ICH_SMBCLK

ICH_SMBDATA

MAX8731

WPC773L

SCL

Clock
Generator

SMBus address:12

09
+3.3V_RTC_LDO

SMBus address:D2

SMB_CLK
SMB_DATA

+3.3V_RUN

Minicard
WLAN

SRN4K7J-8-GP

SMB_CLK

SMB_DATA

32

+3.3V_RUN

SCLK
SDATA

SMBus address:16

31

SDA

Express
Card

TouchPad Conn.

GPIO73/SCL2

KBC_SCL1

GPIO74/SDA2

KBC_SDA1

43

SRN4K7J-8-GP

Thermal

THERM_SCL

SCL

THERM_SDA

SDA

SMBus address:7A
28

2N7002DW-1-GP

26
+3.3V_RUN

SRN2K2J-1-GP

DDC1CLK

LDDC_CLK

DDC1DATA

LDDC_DATA

LCD Conn.
41

+3.3V_DELAY

VGA

+5V_CRT_RUN

SRN2K2J-1-GP

DDC2CLK

M92CRT_DDCCLK
M92CRT_DDCDATA

DDC2DATA
4

+3.3V_DELAY

SRN2K2J-1-GP

DDC_CLK_CON
DDC_DATA_CON

CRT CONN
42

2N7002DW-1-GP
<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

54

SMBUS Block Diagram

Size
C

Document Number

Date:

Monday, March 23, 2009

Rev

SB

Alba Discrete
Sheet
E

of

59

Thermal Block Diagram

Audio Block Diagram

0R3-0-U-GP
SPKR_PORT_D_L+

AUD_SPK_L1

AUD_SPK_L1_R

SPKR_PORT_D_L-

AUD_SPK_L2

AUD_SPK_L2_R

SPKR_PORT_D_R-

AUD_SPK_R2

AUD_SPK_R2_R

SPKR_PORT_D_R+

AUD_SPK_R1

SPEAKER

AUD_SPK_R1_R
0R3-0-U-V-GP

DP1

H_THERMDA

DN1

H_THERMDC

CPU

Thermal
EMC2102
VGA_THERMDA

HP
OUT
50

HP0_PORT_A_L

AUD_EXT_MIC_L

HP0_PORT_A_R

AUD_EXT_MIC_R

VREFOUT_A_OR_F

AUD_VREFOUT_B

VGA_THERMDC

MIC
IN

DPLUS

GPU

SC470P50V3JN-2GP
DN2

AUD_HP1_JACK_R

Codec
92HD81

THRMDC

DP2

AUD_HP1_JACK_L

HP1_PORT_B_R
THRMDA
SC470P50V3JN-2GP
2

HP1_PORT_B_L

44

DMINUS

50
54

33R2J-2-GP
DMIC_CLK/GPIO1

AUD_DMIC_CLK

AUD_DMIC_CLK_G_R

DMIC0/GPIO2
AUD_DMIC_IN0
33R2J-2-GP

AUD_DMIC_IN0_R

Digital
MIC
Array

47

DP3

CPU_THERMDA

DN3

CPU_THERMDC

MMBT3904-3-GP
SC1U10V3KX-3GP

SC470P50V3JN-2GP
AUD_INT_MIC_L

INT_MIC_L_R

PORT_C_L

HW T8 sensor

Internal
MIC

AUD_INT_MIC_R
PORT_C_R

28

VREFOUT_C

22

AUD_VREFOUT_C
4K7R2J-2-GP

44

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

Thermal/Audio Block Diagram

Size
Document Number
Custom
Date:
A

Monday, March 23, 2009

Rev

SB

Alba Discrete
Sheet
E

of

59

ICH9M Functional Strap Definitions


Usage/When Sampled

HDA_SDOUT

XOR Chain Entrance/


Allows entrance to XOR Chain testing when TP3
PCIE Port Config1 bit1, pulled low. When TP3 not pulled low at rising edge
Rising Edge of PWROK.
of PWROK, sets bit1 of RPC.PC (Cofig Registers:
offset 224h). This signal has weak internal
pull-down.

HDA_SYNC

PCIE config1 bit0,


Rising Edge of PWROK.

This signal has a weak internal pull-down.


Sets bit0 of PRC.PC (Config Registers: Offset
224h).

GNT2#/
GPIO53

PCIE config2 bit2,


Rising Edge of PWROK.

This signal has a weak internal pull-up.


Sets bit2 of PRC.PC2 (Config Registers: Offset
224h).

GPIO20

Reserved.

This signal should not be pulled high.

GNT1#/
GPIO51

ESI Strap (Server Only) ESI compatible mode is for server platforms only.
Rising Edge of PWROK.
This signal should not be pulled low for desktop
and mobile.

GNT3#/
GPIO55

Top-Block Swap
override. Rising Edge
of PWROK.

Sampled low: Top-Block Swap mode (inverts A16 for


all cycles targeting FWH BIOS space).
Note: Software will not be able to clear the
Top-Swap bit until the system is rebooted
without GNT3# being pulled down.

GNT0#:
SPI_CS1#/
GPIO58

Boot BIOS Destination


Selection 0:1.
Rising Edge of PWROK.

Controllable via Boot BIOS Destination bit


(Config Registers: Offset 3410h:bit 11:10).
GNT0# is MSB, 01-SPI, 10-PCI, 11-LPC

SPI_MOSI

GPIO49

SATALED#

SPKR

TP3

GPIO33/
HDA_DOCK
_EN#

ICH9 EDS 642879


PULL-UP 20K

CFG[2:0]

CL_DATA[1:0]

PULL-UP 20K

FSB Frequency Select 000 = FSB1067


011 = FSB667
010 = FSB800
others = Reserved

CL_RST0#

PULL-UP 20K

DPRSLPVR/GPIO16

PULL-DOWN 20K

ENERGY_DETECT

PULL-UP 20K

CFG[4:3]
Reserved
CFG8
CFG[15:14]
CFG[18:17]

HDA_BIT_CLK

PULL-DOWN 20K

CFG5

DMI x2 Select

HDA_DOCK_EN#/GPIO33

PULL-UP 20K

0 = DMI x2
1 = DMI x4 (Default)

CFG6

iTPM Host Interface

HDA_RST#

PULL-DOWN 20K

0 = The iTPM Host Interface is enabled (Note 2)


1 = The iTPM Host Interface is disabled (default)

HDA_SDIN[3:0]

PULL-DOWN 20K

CFG7

HDA_SDOUT

PULL-DOWN 20K

Intel Management
engine crypto strap

0 = Transport Layer Security (TLS) cipher


suite with no confidentiality
1 = TLS cipher suite with confidentiality(Default)
0 = Reserved Lanes, 15->0, 14->1 ect..
1 = Normal operation (Default): Lane Numbered in
Order

PULL-DOWN 20K

CFG9

PCIE Graphics Lane

The pull-up or pull-down


active when configured
for native GLAN_DOCK#
functionality and determined
by LAN controller.

CFG10

PCIE Loopback enable 0 = Enable (Note 3)


1 = Disable (Default)

LDA[3:0]#/FHW[3:0]#

PULL-UP 20K

Integrated TPM Enable, Sample low: the Integrated TPM will be disable.
Rising Edge of CLPWROK. Sample high: the MCH TPM enable strap is sampled
low and the TPM Disable bit is clear, the
Integrated TPM will be enable.

LAN_RXD[2:0]

PULL-UP 20K

LDRQ[0]

PULL-UP 20K

LDRQ[1]/GPIO23

PULL-UP 20K

DMI Termination
Voltage. Rising Edge
of CLPWROK.

PME#

PULL-UP 20K

PWRBTN#

PULL-UP 20K

SATALED#

PULL-UP 15K

SPI_CS1#/GPIO58/CLGPIO6

PULL-UP 20K

PCI Express Lane


Reversal. Rising Edge
of PWROK.

Signal has weak internal pull-up. Sets bit 27


of MPC.LR (Device 28: Function 0:Offset D8).

SPI_MOSI

PULL-DOWN 20K

No Reboot.
Rising Edge of PWROK.

If sampled high, the system is strapped to the


"No Reboot" mode (ICH9 will disable the TCO Timer
system reboot feature). The status is readable
via the NO REBOOT bit.

SPI_MISO

PULL-UP 20K

SPKR

PULL-DOWN 20K

TACH_[3:0]

PULL-UP 20K

XOR Chain Entrance.


Rising Edge of PWROK.
Flash Descriptor
Security Override
Strap. Rising Edge of
PWROK.

This signal should not be pull low unless using


XOR Chain testing.
Sampled low: the Flash Descriptor Security will be
overridden. If high, the security measures will be
in effect. This should only be enabled in
manufacturing environments using an external
pull-up resister.

TP[3]

PULL-UP 20K

USB[11:0][P,N]

PULL-DOWN 15K

LANE5

New Card

GLAN_DOCK#

PULL-UP 20K

LAN

Configuration

HDA_SYNC

PULL-DOWN 20K

LANE3

Montevina Platform Design guide 22339 Rev.0.5

CL_CLK[1:0]

GPIO49

MiniCard WLAN

Rev.1.5

Strap Description

PULL-UP 20K

LANE2

Pin Name

GPIO20

The signal is required to be low for desktop


applications and required to be high for mobile
applications.

Cantiga chipset and ICH9M I/O controller


Hub strapping configuration

Resistor Type/Value

SIGNAL

GNT[3:0]#/GPIO[55,53,51]

PCIE Routing

Rev.1.5

Signal

ICH9 EDS 642879


Comment

ICH9 Integrated pull-up


and pull-down Resistors

CFG[13:12] XOR/ALL

00
10
01
11

CFG16

FSB Dynamic ODT

0 = Dynamic ODT Disabled


1 = Dynamic ODT Enabled (Default)

CFG19

DMI Lane Reversal

0 = Normal operation (Default): Lane Numbered in


Order
1 = Reverse Lanes
DMI x4 mode [MCH->ICH]: (3->0, 2->1, 1->2 and 0->3)
DMI x2 mode [MCH->ICH]: (3->0, 2->1)

CFG20

Digital Display Port 0 = Only Digital Display Port or PCIE is


operational (Default)
(SDVO/DP/iHDMI)
display Port and PCIe are operating
Concurrent with PCIe 1 = Digital
simulataneously via the PEG port

SDVO
SDVO Present
_CTRLDATA
L_DDC_DATA Local Flat Panel
(LFP) Present

=
=
=
=

Reserve
XOR mode Enabled
ALLZ mode Enable (Note 3)
Disabled (Default)

0 = No SDVO Card Present (Default)


1 = SDVO Card Present
0 = LFP Disabled (Default)
1 = LFP Card Present; PCIE disabled

NOTE:
1. All strap signals are sampled with respect to the leading edge of the (G)MCH
Power OK (PWROK) signal.
2. iTPM can be disabled by a 'Soft-Strap' option in the Flash-decriptor section of
the Firmware. This 'Soft-Strap' is activated only after enabling iTPM via CFG6.
Only one of the CFG10/CFG12/CFG13 straps can be enabled at any time.

USB Table
USB
Pair
0
1
2
3
4
5
6
7
8
9
10
11

Device
USB1
USB2
USB3
RESERVED
MINI CARD
RESERVED
BLUETOOTH
NEW CARD
RESERVED
RESERVED
Card Reader
CAMERA

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size
Document Number
Custom

Table of Content

Date: Monday, March 23, 2009

Rev

SB

Alba Discrete
Sheet

of

59

R705 1

19
27
43
52
33
56

RN701

1
2

4
3

SRN0J-6-GP

CLK_CPU_BCLK 8
CLK_CPU_BCLK# 8

CPUT1_F
CPUC1_F

58
57

CLK_MCH_BCLK1
CLK_MCH_BCLK1#

RN702

1
2

4
3

SRN0J-6-GP

CLK_MCH_BCLK 10
CLK_MCH_BCLK# 10

CPUT2_ITP/SRCT8
CPUC2_ITP/SRCC8

54
53

CLK_CPU_ITP1
CLK_CPU_ITP1#

RN703

1
2

4
3

SRN0J-6-GP

CLK_CPU_ITP 43
CLK_CPU_ITP# 43

SRCT7/CR#_F
SRCC7/CR#_E

51
50

CLK_PCIE_LAN1
CLK_PCIE_LAN1#

RN704

1
2

4
3

SRN0J-6-GP

CLK_PCIE_LAN 25
CLK_PCIE_LAN# 25

RN712

1
2

4
3

SRN0J-6-GP

CLK_PCIE_VGA 53
CLK_PCIE_VGA# 53

2
1

3
4

SRN0J-6-GP

CLK_PCIE_NEW 50
CLK_PCIE_NEW# 50

CLK_PCIE_MINI1 43
CLK_PCIE_MINI1# 43

FSB
FSC

64
5

FSLB/TEST_MODE
REF0/FSLC/TEST_SEL

55

NC#55
GND48
GNDPCI
GNDREF
18
15
1

Main source: 71.08513.003 (SLG8SP513VTR)


Second source: 71.00875.C03 (RTM875N-606-VD-GRT)

SRCT6
SRCC6

47

CLK_PCIE_VGA1
CLK_PCIE_VGA1#

SRCT10
SRCC10

41
42

CLK_PCIE_NEW1
CLK_PCIE_NEW1#

RN705

SRCT11 SRCT11/CR#_H
SRCC11 SRCC11/CR#_G

40
39
RN706

NEWCARD_CLKREQ#
MINI1_CLKREQ# 43

50

SRCT9
SRCC9

37
38

CLK_PCIE_MINI1_1
CLK_PCIE_MINI1_1#

2
1

3
4

SRN0J-6-GP

SRCT4
SRCC4

34
35

CLK_MCH_3GPLL1
CLK_MCH_3GPLL1#

RN707

2
1

3
4

SRN0J-6-GP

CLK_MCH_3GPLL 11
CLK_MCH_3GPLL# 11

SRCT3/CR#_C
SRCC3/CR#_D

31
32

CLK_PCIE_ICH1
CLK_PCIE_ICH1#

RN708

2
1

3
4

SRN0J-6-GP

CLK_PCIE_ICH 19
CLK_PCIE_ICH# 19

SRCT2/SATAT
SRCC2/SATAC

28
29

CLK_PCIE_SATA1
CLK_PCIE_SATA1#

RN709

2
1

3
4

SRN0J-6-GP

CLK_PCIE_SATA 18
CLK_PCIE_SATA# 18

27MHZ_NONSS/SRCT1/SE1
27MHZ_SS/SRCC1/SE2

24
25

MCH_SSCDREFCLK1 RN711
MCH_SSCDREFCLK1#

2
1

GM

3
4

SRN0J-6-GP

MCH_SSCDREFCLK 11
MCH_SSCDREFCLK# 11

SRCT0/DOTT_96
SRCC0/DOTC_96

20
21

CLK_MCH_DREFCLK1 RN710
CLK_MCH_DREFCLK1#

2
1

GM

3
4

SRN0J-6-GP

CLK_MCH_DREFCLK 11
CLK_MCH_DREFCLK# 11

GND

27_SEL
ITP_EN

PCI0/CR#_A
PCI1/CR#_B
PCI2/TME
PCI3
PCI4/27_SELECT
PCI_F5/ITP_EN

DY
2

VDD96_IO
VDDPLL3_IO
VDDSRC_IO
VDDSRC_IO
VDDSRC_IO
VDDCPU_IO

CK_PW RGD/PD#

8
10
11
12
13
14

C723
SC4D7P50V2CN-1GP

CLKSATAREQ#
CLKREQ#_1
PCI2_TME

CLK_CPU_BCLK1
CLK_CPU_BCLK1#

GM 20090310

65

2 33R2J-2-GP

DY

2 475R2F-L1-GP
2 33R2J-2-GP

SCLK
SDATA

61
60

GM 20090310
48

GND
GNDSRC
GNDSRC
GNDSRC
GNDCPU
GND

20 CLK_14M_ICH

R711 1

2 33R2J-2-GP
2 33R2J-2-GP

R709 1
R710 1

C722
SC4D7P50V2CN-1GP

26 PCLK_KBC
19 CLK_PCI_ICH

C721
SC4D7P50V2CN-1GP

PCI_STOP#
CPU_STOP#

63

R708 1
R707 1

45
44

7
6

20 CLKSATAREQ#
11 CLKREQ#_B
43 PCLK_FWH

USB_48MHZ/FSLA

DY 2SC4D7P50V2CN-1GP

20 CK_PWRGD

DY

17

16,17,20,43 ICH_SMBCLK
16,17,20,43 ICH_SMBDATA

DY

4
16
9
46
62
23
VDDREF
VDD48
VDDPCI
VDDSRC
VDDCPU
VDDPLL3

FSA

DY

CPUT0
CPUC0

X1
X2

22
30
36
49
59
26

R706 2
22R2J-2-GP

ALBA X00

3
2

20 H_STP_PCI#
20 H_STP_CPU#

C713
SCD1U16V2KX-3GP

DY
2

1
2

C720
SCD1U16V2KX-3GP

1
2

C712
SCD1U16V2KX-3GP

C719
SCD1U16V2KX-3GP

1
2

C718
SCD1U16V2KX-3GP

C717
SCD1U16V2KX-3GP

0R3-0-U-GP

C716
SC10U6D3V5MX-3GP

C714

1
2

C715
SC1U10V3KX-3GP

R704

DY
U701
ICS9LPRS355BKLFT-GP-U

2 22R2J-2-GP
1

20 CLK_48M_ICH

3D3V_S0_CK505

CLK_XTAL_OUT

C711
SC12P50V2JN-3GP

50 CLK_48M_CARD

+3.3V_RUN

X-14D31818M-50GP

C724
SCD1U16V2KX-3GP

C708
SC12P50V2JN-3GP

DY
2

1
2

C707
SCD1U16V2KX-3GP

1
2

C706
SCD1U16V2KX-3GP

C705
SCD1U16V2KX-3GP

1
2

C704
SCD1U16V2KX-3GP

C703
SCD1U16V2KX-3GP

DY

X701

0R3-0-U-GP

C702
SC10U6D3V5MX-3GP

CLK_XTAL_IN

ALBA X00

1
2

C701
SC1U10V3KX-3GP

NEWCARD_CLKREQ#
CLK_PCIE_NEW
CLK_PCIE_NEW#

3D3V_S0_CK505_IO

+3.3V_RUN

3D3V_S0_CK505_IO
R703

+3.3V_RUN

2 10KR2J-3-GP
2 10KR2J-3-GP

3D3V_S0_CK505

R702 1
R701 1

EC701
SC22P50V2JN-4GP

NEWCARD_CLKREQ#
MINI1_CLKREQ#

SSID = CLOCK

C710
SC4D7P50V2CN-1GP

C709
SC4D7P50V2CN-1GP

GM 20090311
MCH_SSCDREFCLK1

R712 1

PM

2 0R2J-2-GP

CLK_VGA_27M_NSS 54

3D3V_S0_CK505
B

PCI2_TME
2
1

R716
10KR2J-3-GP

GM

R717
10KR2J-3-GP

Overclocking of CPU and SRC allowed

Overclocking of CPU and SRC not allowed

1
EC702
SC47P50V2JN-3GP

DY

EC703
SC47P50V2JN-3GP

27_SEL

PIN 20

PIN 21

DOT96T

DOT96C

SRCT0

SRCC0

UMA

DY

Output

PCI2_TME

R715
10KR2J-3-GP

MCH_SSCDREFCLK1#

SRC8
CPU_ITP

DY

R714
10KR2J-3-GP

0
1

ITP_EN

Output

MCH_SSCDREFCLK1

ITP_EN

R713
10KR2J-3-GP

DY

27_SEL

PM

3D3V_S0_CK505

3D3V_S0_CK505

R724
10KR2J-3-GP

SEL2 SEL1 SEL0


FSC FSB FSA

1
0
0
0
0

0
0
1
1
0

CPU
100M
133M
166M
200M
266M

1
1
1
0
0

FSB
X
533M
667M
800M
1067M

8 CPU_BSEL2

R718 1

2 10KR2J-3-GP

FSC

8 CPU_BSEL1

R719 1

2 0R2J-2-GP

FSB

8 CPU_BSEL0

R720 1

2 2K2R2J-2-GP

FSA

R721 1

2 1KR2J-1-GP

MCH_CLKSEL0 11

R722 1

2 1KR2J-1-GP

MCH_CLKSEL1 11

R723 1

2 1KR2J-1-GP

MCH_CLKSEL2 11

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

Clock Generator SLG8SP513VTR

Size
Document Number
Custom
Date:

Discrete

Monday, March 23, 2009

Rev

Alba Discrete
Sheet
1

SB
of

59

SSID = CPU

TP807
TP808
TP802
TP804
TP803
TP805
TP813
TP810
TP806
TP809
TP801

RSVD_CPU_1
RSVD_CPU_2
RSVD_CPU_3
RSVD_CPU_4
RSVD_CPU_5
RSVD_CPU_6
RSVD_CPU_7
RSVD_CPU_8
RSVD_CPU_9
RSVD_CPU_10

M4
N5
T2
V3
B2
C3
D2
D22
D3
F6

RSVD_CPU_11

B1

LOCK#

H4

RESET#
RS0#
RS1#
RS2#
TRDY#

C1
F3
F4
G3
G2

HIT#
HITM#

G6
E4

BPM0#
BPM1#
BPM2#
BPM3#
PRDY#
PREQ#
TCK
TDI
TDO
TMS
TRST#
DBR#

AD4
AD3
AD1
AC4
AC2
AC1
AC5
AA6
AB3
AB5
AB6
C20

PROCHOT#
THRMDA
THRMDC

STPCLK#
LINT0
LINT1
SMI#

THERMTRIP#

RSVD#M4
RSVD#N5
RSVD#T2
RSVD#V3
RSVD#B2
RSVD#C3 TEST7
RSVD#D2
RSVD#D22
RSVD#D3
RSVD#F6

BCLK0
BCLK1

ITP_BPM#0
ITP_BPM#1
ITP_BPM#2
ITP_BPM#3
ITP_BPM#4
ITP_BPM#5
ITP_TCK
ITP_TDI
ITP_TDO
ITP_TMS
ITP_TRST#
ITP_DBRESET#

DY

2 0R2J-2-GP
2 56R2J-4-GP

H_THERMDA
H_THERMDC

H_DSTBP#[3..0]
H_D#[63..0]

10

H_DSTBP#[3..0]

10

H_D#[63..0]

10

CPU1B 2 OF 4
H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15

CPU_PROCHOT#

34

+1.05V_VCCP

H_THRMTRIP#

DY

10

H_DSTBN#[3..0]

10

10 H_DSTBN#0
10 H_DSTBP#0
10 H_DINV#0

H_THERMDA 28
H_THERMDC 28

2 56R2J-4-GP

H_DINV#[3..0]

H_DSTBN#[3..0]

ITP_BPM#0 43
ITP_BPM#1 43
ITP_BPM#2 43
ITP_BPM#3 43
ITP_BPM#4 43
ITP_BPM#5 43
ITP_TCK 43
ITP_TDI 43
ITP_TDO 43
ITP_TMS 43
ITP_TRST# 43
ITP_DBRESET# 20,43

C7

A22
A21

+1.05V_VCCP

H_LOCK# 10
H_CPURST# 10,43
H_RS#[2..0] 10

H_TRDY#

R806 1

D21
A24
B25

H_DINV#[3..0]

2 56R2J-4-GP
H_INIT# 18

H_HIT# 10
H_HITM# 10

R810 1

HCLK

R804 1

H_CPURST#
H_RS#0
H_RS#1
H_RS#2

R805 1

THERMAL

A20M#
FERR#
IGNNE#

H_BREQ#0 10

D20 CPU_IERR#
B3

H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31

11,18,26,30,54

H_THRMTRIP# should connect to


ICH9 and MCH without T-ing.

+1.05V_VCCP
CLK_CPU_BCLK 7
CLK_CPU_BCLK# 7

+1.05V_VCCP

R814
1KR2F-3-GP

KEY_NC

BGA479-SKT6-GPU7

62.10040.221

CPU_GTLREF0
C802
SC1KP50V2KX-1GP

R807 1
R809 1
R808 1
R801 1

R813
2KR2F-3-GP

10 H_DSTBN#1
10 H_DSTBP#1
10 H_DINV#1

X01 20090112

DY
DY
DY
DY

7 CPU_BSEL0
7 CPU_BSEL1
7 CPU_BSEL2

Layout notes
Z= 55 Ohm 0.5" MAX for CPU_GTLREF0

2 1KR2J-1-GP
2 1KR2J-1-GP
2 1KR2J-1-GP

TEST1
TEST2
CPU_TEST3

2 1KR2J-1-GP

CPU_TEST5

E22
F24
E26
G22
F23
G25
E25
E23
K24
G24
J24
J23
H22
F26
K22
H23
J26
H26
H25

D0#
D1#
D2#
D3#
D4#
D5#
D6#
D7#
D8#
D9#
D10#
D11#
D12#
D13#
D14#
D15#
DSTBN0#
DSTBP0#
DINV0#

N22
K25
P26
R23
L23
M24
L22
M23
P25
P23
P22
T24
R24
L25
T25
N25
L26
M26
N24

D16#
D17#
D18#
D19#
D20#
D21#
D22#
D23#
D24#
D25#
D26#
D27#
D28#
D29#
D30#
D31#
DSTBN1#
DSTBP1#
DINV1#

AD26
C23
D25
C24
AF26
AF1
A26

GTLREF
TEST1
TEST2
TEST3
TEST4
TEST5
TEST6

B22
B23
C21

DATA GRP1

D5
C6
B4
A3

18 H_STPCLK#
18 H_INTR
18 H_NMI
18 H_SMI#

F1

DATA GRP2

A6
A5
C4

H_DEFER# 10
H_DRDY# 10
H_DBSY# 10

DATA GRP0

18 H_A20M#
18 H_FERR#
18 H_IGNNE#

A17#
A18#
A19#
A20#
A21#
A22#
A23#
A24#
A25#
A26#
A27#
A28#
A29#
A30#
A31#
A32#
A33#
A34#
A35#
ADSTB1#

ICH

10 H_ADSTB#1

Y2
U5
R3
W6
U4
Y5
U1
R4
T5
T3
W2
W5
Y4
U2
V4
W3
AA4
AB2
AA3
V1

ADDR GROUP 1

H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_A#32
H_A#33
H_A#34
H_A#35

H5
F21
E1

REQ0#
REQ1#
REQ2#
REQ3#
REQ4#

BR0#
IERR#
INIT#

H_ADS# 10
H_BNR# 10
H_BPRI# 10

K3
H2
K2
J3
L1

CONTROL

H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4

DEFER#
DRDY#
DBSY#

H1
E2
G5

10 H_ADSTB#0
10 H_REQ#[4..0]

ADS#
BNR#
BPRI#

XDP/ITP SIGNALS

H_A#[35..3]

TP814

RESERVED

10 H_A#[35..3]

A3#
A4#
A5#
A6#
A7#
A8#
A9#
A10#
A11#
A12#
A13#
A14#
A15#
A16#
ADSTB0#

ADDR GROUP 0

J4
L5
L4
K5
M3
N2
J1
N3
P5
P2
L2
P4
P1
R1
M1

DATA GRP3

CPU1A 1 OF 4
H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16

MISC

BSEL0
BSEL1
BSEL2

D32#
D33#
D34#
D35#
D36#
D37#
D38#
D39#
D40#
D41#
D42#
D43#
D44#
D45#
D46#
D47#
DSTBN2#
DSTBP2#
DINV2#

Y22
AB24
V24
V26
V23
T22
U25
U23
Y25
W 22
Y23
W 24
W 25
AA23
AA24
AB25
Y26
AA26
U22

H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47

D48#
D49#
D50#
D51#
D52#
D53#
D54#
D55#
D56#
D57#
D58#
D59#
D60#
D61#
D62#
D63#
DSTBN3#
DSTBP3#
DINV3#

AE24
AD24
AA21
AB22
AB21
AC26
AD20
AE22
AF23
AC25
AE21
AD21
AC22
AD23
AF22
AC23
AE25
AF24
AC20

H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63

COMP0
COMP1
COMP2
COMP3

R26
U26
AA1
Y1

COMP0
COMP1
COMP2
COMP3

DPRSTP#
DPSLP#
DPW R#
PW RGOOD
SLP#
PSI#

E5
B5
D24
D6
D7
AE6

H_DSTBN#2 10
H_DSTBP#2 10
H_DINV#2 10

H_DSTBN#3 10
H_DSTBP#3 10
H_DINV#3 10
R812
R811
R803
R802

1
1
1
1

2
2
2
2

27D4R2F-L1-GP
54D9R2F-L1-GP
27D4R2F-L1-GP
54D9R2F-L1-GP

H_DPRSTP# 11,18,34
H_DPSLP# 18
H_DPWR# 10
H_PWRGOOD 18,30
H_CPUSLP# 10
PSI# 34

BGA479-SKT6-GPU7

62.10040.221

Layout Note:
Comp0, 2 connect with Zo=27.4 ohm, make
trace length shorter than 0.5".
Comp1, 3 connect with Zo=55 ohm, make
trace length shorter than 0.5".

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size
Document Number
Custom
Date: Monday, March 23, 2009

CPU-FSB(1/2)

Rev

SB

Alba Discrete
Sheet

of

59

SSID = CPU
CPU1D

A4
A8
A11
A14
A16
A19
A23
AF2
B6
B8
B11
B13
B16
B19
B21
B24
C5
C8
C11
C14
C16
C19
C2
C22
C25
D1
D4
D8
D11
D13
D16
D19
D23
D26
E3
E6
E8
E11
E14
E16
E19
E21
E24
F5
F8
F11
F13
F16
F19
F2
F22
F25
G4
G1
G23
G26
H3
H6
H21
H24
J2
J5
J22
J25
K1
K4
K23
K26
L3
L6
L21
L24
M2
M5
M22
M25
N1
N4
N23
N26
P3

1
2

1
2

DY

C935
SC22U6D3V5MX-2GP

C934
SC22U6D3V5MX-2GP

C901
SC22U6D3V5MX-2GP

C903
SC22U6D3V5MX-2GP

DY
2

C902
SC22U6D3V5MX-2GP

DY
2

DY
2

1
2

1
2

DY

C938
SC22U6D3V5MX-2GP

+VCC_CORE

DY

C908
SC22U6D3V5MX-2GP

+VCC_CORE

C919
SC22U6D3V5MX-2GP

DY
2

DY

C922
SC22U6D3V5MX-2GP

C915
SC22U6D3V5MX-2GP

+VCC_CORE

C907
SC22U6D3V5MX-2GP

X01 20090106
CPU1C3 OF 4

1
2

1
2

C933
SC22U6D3V5MX-2GP

1
2

DY

C932
SC22U6D3V5MX-2GP

C910
SC22U6D3V5MX-2GP

C936
SC22U6D3V5MX-2GP

DY
2

C927
SC22U6D3V5MX-2GP

C921
SC22U6D3V5MX-2GP

DY
2

C916
SC22U6D3V5MX-2GP

1
2

C931
SC22U6D3V5MX-2GP

C912
SC22U6D3V5MX-2GP

C914
SC22U6D3V5MX-2GP

1
2

1
2

C937
SC22U6D3V5MX-2GP

C930
SC22U6D3V5MX-2GP

C929
SC22U6D3V5MX-2GP

DY
2

C928
SC22U6D3V5MX-2GP

C917
SC22U6D3V5MX-2GP

C918
SC22U6D3V5MX-2GP

C920
SC22U6D3V5MX-2GP

1
2

C913
SC22U6D3V5MX-2GP

1
2

C909
SC22U6D3V5MX-2GP

+1.5V_VCCA

C926
SC22U6D3V5MX-2GP

C905
SCD1U16V2KX-3GP

C904
SC1U6D3V2KX-GP

C906
SCD1U10V2KX-4GP

C925
SCD1U16V2KX-3GP

layout note: "+1.5V_VCCA"


as short as possible

+1.5V_RUN
R903

C939
SCD01U16V2KX-3GP

CPU_VID0
CPU_VID1
CPU_VID2
CPU_VID3
CPU_VID4
CPU_VID5
CPU_VID6

0R3-0-U-GP

34

CPU_VID[6..0]

C940
SC10U6D3V5MX-3GP

Layout Note:
Place as close as possible
to the CPU VCCA pin.

PG901
R902 1
2
1
2
100R2F-L1-GP-U
GAP-CLOSE-PWR-3-GP

+VCC_CORE
VCC_SENSE 34
VSS_SENSE 34

VCC_SENSE and VSS_SENSE lines


should be of equal length.

PG902

BGA479-SKT6-GPU7

62.10040.221

VSSSENSE

AE7

AF7

DY

C924
SCD1U16V2KX-3GP

VCCSENSE

AD6
AF5
AE5
AF4
AE3
AF3
AE2

DY

VID0
VID1
VID2
VID3
VID4
VID5
VID6

DY

+1.05V_VCCP
C923
SCD1U16V2KX-3GP

B26
C26

DY

X01 20090106

VCCA
VCCA

DY

+VCC_CORE

VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP

G21
V6
J6
K6
M6
J21
K21
M21
N21
N6
R21
R6
T21
T6
V21
W 21

AB20
AB7
AC7
AC9
AC12
AC13
AC15
AC17
AC18
AD7
AD9
AD10
AD12
AD14
AD15
AD17
AD18
AE9
AE10
AE12
AE13
AE15
AE17
AE18
AE20
AF9
AF10
AF12
AF14
AF15
AF17
AF18
AF20

C911
SC22U6D3V5MX-2GP

+VCC_CORE

VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC

VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC

TC901
ST220U2D5VBM-LGP

A7
A9
A10
A12
A13
A15
A17
A18
A20
B7
B9
B10
B12
B14
B15
B17
B18
B20
C9
C10
C12
C13
C15
C17
C18
D9
D10
D12
D14
D15
D17
D18
E7
E9
E10
E12
E13
E15
E17
E18
E20
F7
F9
F10
F12
F14
F15
F17
F18
F20
AA7
AA9
AA10
AA12
AA13
AA15
AA17
AA18
AA20
AB9
AC10
AB10
AB12
AB14
AB15
AB17
AB18

R901 1
100R2F-L1-GP-U

4 OF 4

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

P6
P21
P24
R2
R5
R22
R25
T1
T4
T23
T26
U3
U6
U21
U24
V2
V5
V22
V25
W1
W4
W 23
W 26
Y3
Y6
Y21
Y24
AA2
AA5
AA8
AA11
AA14
AA16
AA19
AA22
AA25
AB1
AB4
AB8
AB11
AB13
AB16
AB19
AB23
AB26
AC3
AC6
AC8
AC11
AC14
AC16
AC19
AC21
AC24
AD2
AD5
AD8
AD11
AD13
AD16
AD19
AD22
AD25
AE1
AE4
AE8
AE11
AE14
AE16
AE19
AE23
AE26
A2
AF6
AF8
AF11
AF13
AF16
AF19
AF21
A25
AF25

NCTF
PIN
CPU_GND1

TP902
B

CPU_GND2
CPU_GND3

TP901
TP903

CPU_GND4

TP904

BGA479-SKT6-GPU7

GAP-CLOSE-PWR-3-GP

62.10040.221

X01 20090106
A

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

CPU-Power(2/2)

Size
Document Number
Custom
Date:
5

Monday, March 23, 2009

Rev

SB

Alba Discrete
Sheet
1

of

59

SSID = MCH

+1.05V_VCCP

H_SWING routing Trace width and


Spacing use 10 / 20 mil

R1003
221R2F-2-GP

H_SWING Resistors and


Capacitors close MCH
500 mil ( MAX )

R1002
100R2F-L1-GP-U

H_SWING
C1001
SCD1U10V2KX-4GP

H_RCOMP routing Trace width and


Spacing use 10 / 20 mil

1
R1001

2 H_RCOMP
24D9R2F-L-GP

Place R1001 near to the chip ( < 0.5")

H_SWING
H_RCOMP

C5
E3

H_D#_0
H_D#_1
H_D#_2
H_D#_3
H_D#_4
H_D#_5
H_D#_6
H_D#_7
H_D#_8
H_D#_9
H_D#_10
H_D#_11
H_D#_12
H_D#_13
H_D#_14
H_D#_15
H_D#_16
H_D#_17
H_D#_18
H_D#_19
H_D#_20
H_D#_21
H_D#_22
H_D#_23
H_D#_24
H_D#_25
H_D#_26
H_D#_27
H_D#_28
H_D#_29
H_D#_30
H_D#_31
H_D#_32
H_D#_33
H_D#_34
H_D#_35
H_D#_36
H_D#_37
H_D#_38
H_D#_39
H_D#_40
H_D#_41
H_D#_42
H_D#_43
H_D#_44
H_D#_45
H_D#_46
H_D#_47
H_D#_48
H_D#_49
H_D#_50
H_D#_51
H_D#_52
H_D#_53
H_D#_54
H_D#_55
H_D#_56
H_D#_57
H_D#_58
H_D#_59
H_D#_60
H_D#_61
H_D#_62
H_D#_63

H_SW ING
H_RCOMP

+1.05V_VCCP

F2
G8
F8
E6
G2
H6
H2
F6
D4
H3
M9
M11
J1
J2
N12
J6
P2
L2
R2
N9
L6
M5
J3
N2
R1
N5
N6
P13
N8
L7
N10
M3
Y3
AD14
Y6
Y10
Y12
Y14
Y7
W2
AA8
Y9
AA13
AA9
AA11
AD11
AD10
AD13
AE12
AE9
AA2
AD8
AA3
AD3
AD7
AE14
AF3
AC1
AE3
AC3
AE11
AE8
AG2
AD6

HOST

H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63

H_D#[63..0]

8 H_D#[63..0]

R1004
1KR2F-3-GP

C12
E11

8,43 H_CPURST#
8 H_CPUSLP#

A11
B11

H_AVREF
H_DVREF

A14
C15
F16
H13
C18
M16
J13
P16
R16
N17
M13
E17
P17
F17
G20
B19
J16
E20
H16
J20
L17
A17
B17
L16
C21
J17
H20
B18
K17
B20
F21
K21
L20

H_ADS#
H_ADSTB#_0
H_ADSTB#_1
H_BNR#
H_BPRI#
H_BREQ#
H_DEFER#
H_DBSY#
HPLL_CLK
HPLL_CLK#
H_DPW R#
H_DRDY#
H_HIT#
H_HITM#
H_LOCK#
H_TRDY#

H12
B16
G17
A9
F11
G12
E9
B10
AH7
AH6
J11
F9
H9
E12
H11
C9

H_DINV#_0
H_DINV#_1
H_DINV#_2
H_DINV#_3

J8
L3
Y13
Y1

H_DINV#0
H_DINV#1
H_DINV#2
H_DINV#3

H_DSTBN#_0
H_DSTBN#_1
H_DSTBN#_2
H_DSTBN#_3

L10
M7
AA5
AE6

H_DSTBN#0
H_DSTBN#1
H_DSTBN#2
H_DSTBN#3

H_DSTBP#_0
H_DSTBP#_1
H_DSTBP#_2
H_DSTBP#_3

L9
M8
AA6
AE5

H_DSTBP#0
H_DSTBP#1
H_DSTBP#2
H_DSTBP#3

H_REQ#_0
H_REQ#_1
H_REQ#_2
H_REQ#_3
H_REQ#_4

B15
K13
F13
B13
B14

H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4

H_RS#_0
H_RS#_1
H_RS#_2

B6
F12
C8

H_RS#0
H_RS#1
H_RS#2

C
H_ADS# 8
H_ADSTB#0 8
H_ADSTB#1 8
H_BNR# 8
H_BPRI# 8
H_BREQ#0 8
H_DEFER# 8
H_DBSY# 8
CLK_MCH_BCLK 7
CLK_MCH_BCLK# 7
H_DPWR# 8
H_DRDY# 8
H_HIT# 8
H_HITM# 8
H_LOCK# 8
H_TRDY# 8

H_DINV#[3..0]

H_DSTBN#[3..0]

H_DINV#[3..0]

H_DSTBN#[3..0]

H_DSTBP#[3..0]

B
H_DSTBP#[3..0]

H_REQ#[4..0]

H_REQ#[4..0]

H_RS#[2..0]

H_RS#[2..0]

CANTIGA-GM-GP-U-NF

DY

H_CPURST#
H_CPUSLP#

H_A#[35..3]

H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_A#32
H_A#33
H_A#34
H_A#35

H_A#_3
H_A#_4
H_A#_5
H_A#_6
H_A#_7
H_A#_8
H_A#_9
H_A#_10
H_A#_11
H_A#_12
H_A#_13
H_A#_14
H_A#_15
H_A#_16
H_A#_17
H_A#_18
H_A#_19
H_A#_20
H_A#_21
H_A#_22
H_A#_23
H_A#_24
H_A#_25
H_A#_26
H_A#_27
H_A#_28
H_A#_29
H_A#_30
H_A#_31
H_A#_32
H_A#_33
H_A#_34
H_A#_35

C1002
SCD1U16V2KX-3GP

R1005
2KR2F-3-GP

H_AVREF

H_A#[35..3]

1 OF 10

U1001A

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

Cantiga-HOST(1/6)

Size
Document Number
Custom

Date: Monday, March 23, 2009

Rev

SB

Alba Discrete
Sheet

10

of

59

16
16
17
17

SM_RCOMP
SM_RCOMP#

BG22
BH21

M_RCOMPP
M_RCOMPN

SM_RCOMP_VOH
SM_RCOMP_VOL

BF28
BH28

SM_RCOMP_VOH
SM_RCOMP_VOL

SM_VREF
SM_PW ROK
SM_REXT
SM_DRAMRST#

AV42
AR36
BF17
BC36

CANTIGA_SM_VREF

DPLL_REF_CLK
DPLL_REF_CLK#
DPLL_REF_SSCLK
DPLL_REF_SSCLK#

B38
A38
E41
F41

CLK_MCH_DREFCLK
CLK_MCH_DREFCLK#
MCH_SSCDREFCLK
MCH_SSCDREFCLK#

PEG_CLK
PEG_CLK#

F43
E43

CLK_MCH_3GPLL
CLK_MCH_3GPLL#

DMI_RXN_0
DMI_RXN_1
DMI_RXN_2
DMI_RXN_3

AE41
AE37
AE47
AH39

DMI_ITXN0_MRXN0
DMI_ITXN1_MRXN1
DMI_ITXN2_MRXN2
DMI_ITXN3_MRXN3

DMI_ITXN0_MRXN0
DMI_ITXN1_MRXN1
DMI_ITXN2_MRXN2
DMI_ITXN3_MRXN3

19
19
19
19

DMI_RXP_0
DMI_RXP_1
DMI_RXP_2
DMI_RXP_3

AE40
AE38
AE48
AH40

DMI_ITXP0_MRXP0
DMI_ITXP1_MRXP1
DMI_ITXP2_MRXP2
DMI_ITXP3_MRXP3

DMI_ITXP0_MRXP0
DMI_ITXP1_MRXP1
DMI_ITXP2_MRXP2
DMI_ITXP3_MRXP3

19
19
19
19

DMI_TXN_0
DMI_TXN_1
DMI_TXN_2
DMI_TXN_3

AE35
AE43
AE46
AH42

DMI_IRXN0_MTXN0
DMI_IRXN1_MTXN1
DMI_IRXN2_MTXN2
DMI_IRXN3_MTXN3

DMI_TXP_0
DMI_TXP_1
DMI_TXP_2
DMI_TXP_3

AD35
AE44
AF46
AH43

DMI_IRXP0_MTXP0
DMI_IRXP1_MTXP1
DMI_IRXP2_MTXP2
DMI_IRXP3_MTXP3

GFX_VID_0
GFX_VID_1
GFX_VID_2
GFX_VID_3
GFX_VID_4

B33
B32
G33
F33
E33

GFX_VR_EN

C34

2 4K02R2F-GP

7 MCH_CLKSEL0
7 MCH_CLKSEL1
7 MCH_CLKSEL2

CFG20

RN1101

4
3

1
2

PM_EXTTS#0
PM_EXTTS#1

SRN10KJ-5-GP
R1128 1
R1108 1
R1107 1
R1103 1
R1127 1
R1124 1
R1102 1
R1106 1
R1104 1

DY
DY
DY
DY
DY
DY
DY
DY
DY

2 2K21R2F-GP

CFG5

2 2K21R2F-GP CFG6
2 2K21R2F-GP CFG7

TP1101
TP1102

2 2K21R2F-GP CFG8

TP1104

2 4K02R2F-GP CFG9
2 2K21R2F-GP CFG10

CFG_0
CFG_1
CFG_2
CFG_3
CFG_4
CFG_5
CFG_6
CFG_7
CFG_8
CFG_9
CFG_10
CFG_11
CFG_12
CFG_13
CFG_14
CFG_15
CFG_16
CFG_17
CFG_18
CFG_19
CFG_20

CFG

CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
CFG16
CFG17
CFG18
CFG19
CFG20

TP1103
TP1105

T25
R25
P25
P20
P24
C25
N24
M24
E21
C23
C24
N21
P21
T21
R20
M20
L21
H21
P29
R28
T28

DMI

FSB setting

2 4K02R2F-GP CFG19

2 2K21R2F-GP CFG12
2 2K21R2F-GP CFG13
2 2K21R2F-GP CFG16

PWROK_R
RSTIN#

R1118
20,26,28 PM_PWROK

0R2J-2-GP

1
R1101
100R2J-2-GP

C1101
SC100P50V2JN-3GP

DY

BG48
BF48
BD48
BC48
BH47
BG47
BE47
BH46
BF46
BG45
BH44
BH43
BH6
BH5
BG4
BH3
BF3
BH2
BG2
BE2
BG1
BF1
BD1
BC1
F1
A47

PM_SYNC#
PM_DPRSTP#
PM_EXT_TS#_0
PM_EXT_TS#_1
PW ROK
RSTIN#
THERMTRIP#
DPRSLPVR

NC#BG48
NC#BF48
NC#BD48
NC#BC48
NC#BH47
NC#BG47
NC#BE47
NC#BH46
NC#BF46
NC#BG45
NC#BH44
NC#BH43
NC#BH6
NC#BH5
NC#BG4
NC#BH3
NC#BF3
NC#BH2
NC#BG2
NC#BE2
NC#BG1
NC#BF1
NC#BD1
NC#BC1
NC#F1
NC#A47
CANTIGA-GM-GP-U-NF

2
1

1
2

C1103
SCD01U16V2KX-3GP

AH37
AH36
AN36
AJ35
AH34

DDPC_CTRLCLK
DDPC_CTRLDATA
SDVO_CTRLCLK
SDVO_CTRLDATA
CLKREQ#
ICH_SYNC#

N28
M28
G36
E36
K36
H36

1
1

+1.8V_SUS

+V_DDR_MCH_REF

1
1

2
R1123
499R2F-2-GP

DY

CLK_MCH_DREFCLK 7
CLK_MCH_DREFCLK# 7
MCH_SSCDREFCLK 7
MCH_SSCDREFCLK# 7
CLK_MCH_3GPLL 7
CLK_MCH_3GPLL# 7

DMI_IRXN0_MTXN0
DMI_IRXN1_MTXN1
DMI_IRXN2_MTXN2
DMI_IRXN3_MTXN3

19
19
19
19

DMI_IRXP0_MTXP0
DMI_IRXP1_MTXP1
DMI_IRXP2_MTXP2
DMI_IRXP3_MTXP3

19
19
19
19

R1139
0R3-0-U-GP

R1129
DY10KR2F-2-GP

DY

GM 20090310

TSATN#

B12

HDA_BCLK
HDA_RST#
HDA_SDI
HDA_SDO
HDA_SYNC

B28
B30
B29
C29
A28

SM_REXT

RN1102
CLK_MCH_DREFCLK
CLK_MCH_DREFCLK#

2
1

PM

3
4

SRN0J-6-GP
RN1103
MCH_SSCDREFCLK
MCH_SSCDREFCLK#

2
1

PM

3
4

SRN0J-6-GP

GM 20090310

+3.3V_RUN

R1121
56R2J-4-GP

DY

R1122
10KR2J-3-GP

TSATN#_KBC
+1.05V_VCCP

MCH_CLVREF

TSATN#

R1114
1KR2F-3-GP

CL_CLK0 20
CL_DATA0 20
M_PWROK 20
CL_RST#0 20

TP1106
CLKREQ#_B 7
MCH_ICH_SYNC#

TSATN#

R1111
1KR2F-3-GP

C1102
SC2D2U10V3KX-1GP

+1.05V_VCCP

CL_CLK
CL_DATA
CL_PW ROK
CL_RST#
CL_VREF

1
2

2
1

SM_RCOMP_VOL

R1119
DY10KR2F-2-GP

MCH_CLVREF ~= 0.35V

NC

8,18,26,30,54 H_THRMTRIP#
20,34 DPRSLPVR

PLT_RST#

19,25,26,43,50

R29
B7
N33
P32
AT40
AT11
T20
R32

PM

20 PM_SYNC#
8,18,34 H_DPRSTP#
16 PM_EXTTS#0
17 PM_EXTTS#1

GRAPHICS VID

R1112 1

2 2K21R2F-GP CFG18

ME

R1110 1

2 2K21R2F-GP CFG11

MISC

R1115 1

DY
DY
DY
DY

2
M_ODT0
M_ODT1
M_ODT2
M_ODT3

HDA

R1105 1

BD17
AY17
BF15
AY13

R1125
80D6R2F-L-GP

+3.3V_RUN

SA_ODT_0
SA_ODT_1
SB_ODT_0
SB_ODT_1

CLK

16
16
17
17

DDPC_CTRLDATA

M_CS0#
M_CS1#
M_CS2#
M_CS3#

TSATN#_KBC 26

L_DDC_DATA

BA17
AY16
AV16
AR13

R1109
3K01R2F-3-GP

DY

Q1101
MMBT3904WT1G-GP

SDVO_CTRLDATA

DMI lanes
* Reverse
PCIE and SDVO are
Only PCIE or SDVO
simultaneously
* operatiing
is operational
via the PEG port
enable
SDVO interface disable
* SDVOLFPinterface
LFP disable
card present
*
SDVO/iHDMI/DP
SDVO/iHDMI/DP
interface disabled *
interface enabled
Normal operation

SA_CS#_0
SA_CS#_1
SB_CS#_0
SB_CS#_1

C1105
SCD01U16V2KX-3GP

C1104
SC2D2U10V3KX-1GP

CFG 19
DMI Lane Reserved
CFG 20
SDVO concurrent
with PCIE

FSB Dynamic ODT enable

RESERVED#BG23
RESERVED#BF23
RESERVED#BH18
RESERVED#BF18

16
16
17
17

FSB dynamic ODT disable

CFG 16

BG23
BF23
BH18
BF18

RESERVED#AY21

M_CKE0
M_CKE1
M_CKE2
M_CKE3

SM_RCOMP_VOH

XOR mode enable

SA_CKE_0
SA_CKE_1
SB_CKE_0
SB_CKE_1

BC28
AY28
AY36
BB36

R1126
80D6R2F-L-GP

ALLZ mode enable

CFG 13

16
16
17
17

C1143
SCD1U10V2KX-4GP

CFG 12

AY21

M_CLK_DDR#0
M_CLK_DDR#1
M_CLK_DDR#2
M_CLK_DDR#3

PCIE loopback enable

RESERVED#B31
RESERVED#B2
RESERVED#M1

AR24
AR21
AU24
AV20

CFG 10

B31
B2
M1

SA_CK#_0
SA_CK#_1
SB_CK#_0
SB_CK#_1

R1113
1KR2F-3-GP

+1.8V_SUS

C1144
SCD1U10V2KX-4GP

PCIE GFX lane reversed

16
16
17
17

CFG 9

RSVD

CFG 7

TLS cipher suite with


no confidentiality

M_CLK_DDR0
M_CLK_DDR1
M_CLK_DDR2
M_CLK_DDR3

AP24
AT21
AV24
AU20

ITPM enable

CFG 6

*
ITPM disable
*
TLS cipher suite with
*
confidentiality
PCIE GFX lane
numbered in oder *
PCIE loopback disable
*
ALLZ mode disable
*
XOR mode disable
*
*

+1.8V_SUS

High
DMI X 4

+3.3V_RUN

R1116
499R2F-2-GP
R1117
CLKREQ#_B

Low
DMI X 2

CFG 5

SA_CK_0
SA_CK_1
SB_CK_0
SB_CK_1

CFG Strap

RESERVED#M36
RESERVED#N36
RESERVED#R33
RESERVED#T33
RESERVED#AH9
RESERVED#AH10
RESERVED#AH12
RESERVED#AH13
RESERVED#K12
RESERVED#AL34
RESERVED#AK34
RESERVED#AN35
RESERVED#AM35
RESERVED#T24

C1106
SCD1U10V2KX-4GP

* is current setting

M36
N36
R33
T33
AH9
AH10
AH12
AH13
K12
AL34
AK34
AN35
AM35
T24

DDR CLK/ CONTROL/COMPENSATION

SSID = MCH

2 OF 10

U1001B

10KR2J-3-GP

20

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

Cantiga-DMI/CFG(2/6)

Size
Document Number
Custom

Date: Monday, March 23, 2009

Rev

SB

Alba Discrete
Sheet

11

of

59

SSID = MCH

CANTIGA-GM-GP-U-NF

M_A_BS#0 16
M_A_BS#1 16
M_A_BS#2 16

SA_RAS#
SA_CAS#
SA_W E#

BB20
BD20
AY20

M_A_RAS# 16
M_A_CAS# 16
M_A_WE# 16

SA_DM_0
SA_DM_1
SA_DM_2
SA_DM_3
SA_DM_4
SA_DM_5
SA_DM_6
SA_DM_7

AM37
AT41
AY41
AU39
BB12
AY6
AT7
AJ5

M_A_DM0
M_A_DM1
M_A_DM2
M_A_DM3
M_A_DM4
M_A_DM5
M_A_DM6
M_A_DM7

SA_DQS_0
SA_DQS_1
SA_DQS_2
SA_DQS_3
SA_DQS_4
SA_DQS_5
SA_DQS_6
SA_DQS_7
SA_DQS#_0
SA_DQS#_1
SA_DQS#_2
SA_DQS#_3
SA_DQS#_4
SA_DQS#_5
SA_DQS#_6
SA_DQS#_7

AJ44
AT44
BA43
BC37
AW 12
BC8
AU8
AM7
AJ43
AT43
BA44
BD37
AY12
BD8
AU9
AM8

M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7
M_A_DQS#0
M_A_DQS#1
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7

SA_MA_0
SA_MA_1
SA_MA_2
SA_MA_3
SA_MA_4
SA_MA_5
SA_MA_6
SA_MA_7
SA_MA_8
SA_MA_9
SA_MA_10
SA_MA_11
SA_MA_12
SA_MA_13
SA_MA_14

BA21
BC24
BG24
BH24
BG25
BA24
BD24
BG27
BF25
AW 24
BC21
BG26
BH26
BH17
AY25

M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14

M_A_DQS[7..0]

M_A_DQS#[7..0]

M_A_A[14..0]

M_A_DM[7..0]

16

M_A_DQS[7..0]

16

M_A_DQS#[7..0]

M_A_A[14..0]

16

16

M_B_DQ[63..0]

5 OF 10

U1001E
M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63

AK47
AH46
AP47
AP46
AJ46
AJ48
AM48
AP48
AU47
AU46
BA48
AY48
AT47
AR47
BA47
BC47
BC46
BC44
BG43
BF43
BE45
BC41
BF40
BF41
BG38
BF38
BH35
BG35
BH40
BG39
BG34
BH34
BH14
BG12
BH11
BG8
BH12
BF11
BF8
BG7
BC5
BC6
AY3
AY1
BF6
BF5
BA1
BD3
AV2
AU3
AR3
AN2
AY2
AV1
AP3
AR1
AL1
AL2
AJ1
AH1
AM2
AM3
AH3
AJ3

SB_DQ_0
SB_DQ_1
SB_DQ_2
SB_DQ_3
SB_DQ_4
SB_DQ_5
SB_DQ_6
SB_DQ_7
SB_DQ_8
SB_DQ_9
SB_DQ_10
SB_DQ_11
SB_DQ_12
SB_DQ_13
SB_DQ_14
SB_DQ_15
SB_DQ_16
SB_DQ_17
SB_DQ_18
SB_DQ_19
SB_DQ_20
SB_DQ_21
SB_DQ_22
SB_DQ_23
SB_DQ_24
SB_DQ_25
SB_DQ_26
SB_DQ_27
SB_DQ_28
SB_DQ_29
SB_DQ_30
SB_DQ_31
SB_DQ_32
SB_DQ_33
SB_DQ_34
SB_DQ_35
SB_DQ_36
SB_DQ_37
SB_DQ_38
SB_DQ_39
SB_DQ_40
SB_DQ_41
SB_DQ_42
SB_DQ_43
SB_DQ_44
SB_DQ_45
SB_DQ_46
SB_DQ_47
SB_DQ_48
SB_DQ_49
SB_DQ_50
SB_DQ_51
SB_DQ_52
SB_DQ_53
SB_DQ_54
SB_DQ_55
SB_DQ_56
SB_DQ_57
SB_DQ_58
SB_DQ_59
SB_DQ_60
SB_DQ_61
SB_DQ_62
SB_DQ_63

SB_BS_0
SB_BS_1
SB_BS_2

BC16
BB17
BB33

M_B_BS#0 17
M_B_BS#1 17
M_B_BS#2 17

SB_RAS#
SB_CAS#
SB_W E#

AU17
BG16
BF14

M_B_RAS# 17
M_B_CAS# 17
M_B_WE# 17

SB_DM_0
SB_DM_1
SB_DM_2
SB_DM_3
SB_DM_4
SB_DM_5
SB_DM_6
SB_DM_7

AM47
AY47
BD40
BF35
BG11
BA3
AP1
AK2

M_B_DM0
M_B_DM1
M_B_DM2
M_B_DM3
M_B_DM4
M_B_DM5
M_B_DM6
M_B_DM7

SB_DQS_0
SB_DQS_1
SB_DQS_2
SB_DQS_3
SB_DQS_4
SB_DQS_5
SB_DQS_6
SB_DQS_7
SB_DQS#_0
SB_DQS#_1
SB_DQS#_2
SB_DQS#_3
SB_DQS#_4
SB_DQS#_5
SB_DQS#_6
SB_DQS#_7

AL47
AV48
BG41
BG37
BH9
BB2
AU1
AN6
AL46
AV47
BH41
BH37
BG9
BC2
AT2
AN5

M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7
M_B_DQS#0
M_B_DQS#1
M_B_DQS#2
M_B_DQS#3
M_B_DQS#4
M_B_DQS#5
M_B_DQS#6
M_B_DQS#7

SB_MA_0
SB_MA_1
SB_MA_2
SB_MA_3
SB_MA_4
SB_MA_5
SB_MA_6
SB_MA_7
SB_MA_8
SB_MA_9
SB_MA_10
SB_MA_11
SB_MA_12
SB_MA_13
SB_MA_14

AV17
BA25
BC25
AU25
AW 25
BB28
AU28
AW 28
AT33
BD33
BB16
AW 33
AY33
BH15
AU33

M_B_DM[7..0]

BD21
BG18
AT25

MEMORY

17 M_B_DQ[63..0]

SA_BS_0
SA_BS_1
SA_BS_2

M_A_DM[7..0]

SA_DQ_0
SA_DQ_1
SA_DQ_2
SA_DQ_3
SA_DQ_4
SA_DQ_5
SA_DQ_6
SA_DQ_7
SA_DQ_8
SA_DQ_9
SA_DQ_10
SA_DQ_11
SA_DQ_12
SA_DQ_13
SA_DQ_14
SA_DQ_15
SA_DQ_16
SA_DQ_17
SA_DQ_18
SA_DQ_19
SA_DQ_20
SA_DQ_21
SA_DQ_22
SA_DQ_23
SA_DQ_24
SA_DQ_25
SA_DQ_26
SA_DQ_27
SA_DQ_28
SA_DQ_29
SA_DQ_30
SA_DQ_31
SA_DQ_32
SA_DQ_33
SA_DQ_34
SA_DQ_35
SA_DQ_36
SA_DQ_37
SA_DQ_38
SA_DQ_39
SA_DQ_40
SA_DQ_41
SA_DQ_42
SA_DQ_43
SA_DQ_44
SA_DQ_45
SA_DQ_46
SA_DQ_47
SA_DQ_48
SA_DQ_49
SA_DQ_50
SA_DQ_51
SA_DQ_52
SA_DQ_53
SA_DQ_54
SA_DQ_55
SA_DQ_56
SA_DQ_57
SA_DQ_58
SA_DQ_59
SA_DQ_60
SA_DQ_61
SA_DQ_62
SA_DQ_63

MEMORY

AJ38
AJ41
AN38
AM38
AJ36
AJ40
AM44
AM42
AN43
AN44
AU40
AT38
AN41
AN39
AU44
AU42
AV39
AY44
BA40
BD43
AV41
AY43
BB41
BC40
AY37
BD38
AV37
AT36
AY38
BB38
AV36
AW 36
BD13
AU11
BC11
BA12
AU13
AV13
BD12
BC12
BB9
BA9
AU10
AV9
BA11
BD9
AY8
BA6
AV5
AV7
AT9
AN8
AU5
AU6
AT5
AN10
AM11
AM5
AJ9
AJ8
AN12
AM13
AJ11
AJ12

SYSTEM

4 OF 10

U1001D
M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63

DDR

M_A_DQ[63..0]

SYSTEM

16 M_A_DQ[63..0]

DDR

M_B_DM[7..0]

M_B_DQS[7..0]

17

M_B_DQS[7..0]

M_B_DQS#[7..0]

17

M_B_DQS#[7..0]

17

M_B_A[14..0]

M_B_A[14..0]

M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14

17

CANTIGA-GM-GP-U-NF

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

Cantiga-DDR(3/6)

Size
Document Number
Custom

Date: Monday, March 23, 2009

Rev

SB

Alba Discrete
Sheet

12

of

59

NC#E1
NC#D2
NC#C3
NC#B4
NC#A5
NC#A6
NC#A43
NC#A44
NC#B45
NC#C46
NC#D47
NC#B47
NC#A46
NC#F48
NC#E48
NC#C48
NC#B48

2
M33
K33
J33

PEG_COMPI
PEG_COMPO

A41
H38
G37
J37
B42
G38
F37
K37

F25
H25
K25
H24

C31
E32

AF32
AB32
V32
AJ30
AM29
AF29
AB29
U26
U23
AL20
V20
AC19
AL17
AJ17
AA17
U17

E28
G28
J28
G29
CRT_DDC_CLK
CRT_DDC_DATA

TP1303
TP1302
TP1304
TP1301

NCTF
PIN

R1304
0R2J-2-GP

GMCH_GND1
GMCH_GND2
GMCH_GND3
GMCH_GND4

CRT_TVO_IREF

H32
J32
J29
E29
L29

L_VDD_EN
LVDS_IBG
LVDS_VBG
LVDS_VREFH
LVDS_VREFL
LVDSA_CLK#
LVDSA_CLK
LVDSB_CLK#
LVDSB_CLK
LVDSA_DATA#_0
LVDSA_DATA#_1
LVDSA_DATA#_2
LVDSA_DATA#_3
LVDSA_DATA_0
LVDSA_DATA_1
LVDSA_DATA_2
LVDSA_DATA_3
LVDSB_DATA#_0
LVDSB_DATA#_1
LVDSB_DATA#_2
LVDSB_DATA#_3
LVDSB_DATA_0
LVDSB_DATA_1
LVDSB_DATA_2
LVDSB_DATA_3

TVA_DAC
TVB_DAC
TVC_DAC
TV_RTN

TV_DCONSEL_0
TV_DCONSEL_1

CRT_BLUE
CRT_GREEN
CRT_RED
CRT_IRTN
CRT_DDC_CLK
CRT_DDC_DATA
CRT_HSYNC
CRT_TVO_IREF
CRT_VSYNC

T37
T36

PEG_CMP

H44
J46
L44
L40
N41
P48
N44
T43
U43
Y43
Y48
Y36
AA43
AD37
AC47
AD39

PCIE_MRX_GTX_N0
PCIE_MRX_GTX_N1
PCIE_MRX_GTX_N2
PCIE_MRX_GTX_N3
PCIE_MRX_GTX_N4
PCIE_MRX_GTX_N5
PCIE_MRX_GTX_N6
PCIE_MRX_GTX_N7
PCIE_MRX_GTX_N8
PCIE_MRX_GTX_N9
PCIE_MRX_GTX_N10
PCIE_MRX_GTX_N11
PCIE_MRX_GTX_N12
PCIE_MRX_GTX_N13
PCIE_MRX_GTX_N14
PCIE_MRX_GTX_N15

H43
J44
L43
L41
N40
P47
N43
T42
U42
Y42
W47
Y37
AA42
AD36
AC48
AD40

PCIE_MRX_GTX_P0
PCIE_MRX_GTX_P1
PCIE_MRX_GTX_P2
PCIE_MRX_GTX_P3
PCIE_MRX_GTX_P4
PCIE_MRX_GTX_P5
PCIE_MRX_GTX_P6
PCIE_MRX_GTX_P7
PCIE_MRX_GTX_P8
PCIE_MRX_GTX_P9
PCIE_MRX_GTX_P10
PCIE_MRX_GTX_P11
PCIE_MRX_GTX_P12
PCIE_MRX_GTX_P13
PCIE_MRX_GTX_P14
PCIE_MRX_GTX_P15

J41
M46
M47
M40
M42
R48
N38
T40
U37
U40
Y40
AA46
AA37
AA40
AD43
AC46

PCIE_MTX_GRX_C_N0
PCIE_MTX_GRX_C_N1
PCIE_MTX_GRX_C_N2
PCIE_MTX_GRX_C_N3
PCIE_MTX_GRX_C_N4
PCIE_MTX_GRX_C_N5
PCIE_MTX_GRX_C_N6
PCIE_MTX_GRX_C_N7
PCIE_MTX_GRX_C_N8
PCIE_MTX_GRX_C_N9
PCIE_MTX_GRX_C_N10
PCIE_MTX_GRX_C_N11
PCIE_MTX_GRX_C_N12
PCIE_MTX_GRX_C_N13
PCIE_MTX_GRX_C_N14
PCIE_MTX_GRX_C_N15

C1302
C1305
C1307
C1301
C1310
C1313
C1314
C1315
C1317
C1330
C1311
C1312
C1316
C1327
C1329
C1332

1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1

2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2

SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP

PCIE_MTX_GRX_N0
PCIE_MTX_GRX_N1
PCIE_MTX_GRX_N2
PCIE_MTX_GRX_N3
PCIE_MTX_GRX_N4
PCIE_MTX_GRX_N5
PCIE_MTX_GRX_N6
PCIE_MTX_GRX_N7
PCIE_MTX_GRX_N8
PCIE_MTX_GRX_N9
PCIE_MTX_GRX_N10
PCIE_MTX_GRX_N11
PCIE_MTX_GRX_N12
PCIE_MTX_GRX_N13
PCIE_MTX_GRX_N14
PCIE_MTX_GRX_N15

J42
L46
M48
M39
M43
R47
N37
T39
U36
U39
Y39
Y46
AA36
AA39
AD42
AD46

PCIE_MTX_GRX_C_P0
PCIE_MTX_GRX_C_P1
PCIE_MTX_GRX_C_P2
PCIE_MTX_GRX_C_P3
PCIE_MTX_GRX_C_P4
PCIE_MTX_GRX_C_P5
PCIE_MTX_GRX_C_P6
PCIE_MTX_GRX_C_P7
PCIE_MTX_GRX_C_P8
PCIE_MTX_GRX_C_P9
PCIE_MTX_GRX_C_P10
PCIE_MTX_GRX_C_P11
PCIE_MTX_GRX_C_P12
PCIE_MTX_GRX_C_P13
PCIE_MTX_GRX_C_P14
PCIE_MTX_GRX_C_P15

C1303
C1306
C1309
C1304
C1308
C1328
C1324
C1323
C1325
C1326
C1331
C1318
C1319
C1320
C1321
C1322

1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1

2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2

SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP

PCIE_MTX_GRX_P0
PCIE_MTX_GRX_P1
PCIE_MTX_GRX_P2
PCIE_MTX_GRX_P3
PCIE_MTX_GRX_P4
PCIE_MTX_GRX_P5
PCIE_MTX_GRX_P6
PCIE_MTX_GRX_P7
PCIE_MTX_GRX_P8
PCIE_MTX_GRX_P9
PCIE_MTX_GRX_P10
PCIE_MTX_GRX_P11
PCIE_MTX_GRX_P12
PCIE_MTX_GRX_P13
PCIE_MTX_GRX_P14
PCIE_MTX_GRX_P15

PCIE_MRX_GTX_N[0..15]

L_CTRL_DATA
L_DDC_CLK
L_DDC_DATA

PEG_RX#_0
PEG_RX#_1
PEG_RX#_2
PEG_RX#_3
PEG_RX#_4
PEG_RX#_5
PEG_RX#_6
PEG_RX#_7
PEG_RX#_8
PEG_RX#_9
PEG_RX#_10
PEG_RX#_11
PEG_RX#_12
PEG_RX#_13
PEG_RX#_14
PEG_RX#_15

GRAPHICS

H48
D45
F40
B40

U24
U28
U25
U29

E1
D2
C3
B4
A5
A6
A43
A44
B45
C46
D47
B47
A46
F48
E48
C48
B48

L_BKLT_CTRL
L_BKLT_EN
L_CTRL_CLK

PCI-EXPRESS

H47
E46
G40
A40

BC3
AV3
AL3
R3
P3
F3
BA2
AW2
AU2
AR2
AP2
AJ2
AH2
AF2
AE2
AD2
AC2
Y2
M2
K2
AM1
AA1
P1
H1

BH48
BH1
A48
C1
A3

R1301
49D9R2F-GP
1

L_CTRL_DATA
L_DDC_CLK
L_DDC_DATA

VSS_SCB
VSS_SCB
VSS_SCB
VSS_SCB
VSS_SCB

L32
G32
M32

M29
C44
B43
E37
E38
C41
C40
B37
A37

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF

L_CTRL_CLK

SRN0J-7-GP

R1303
0R2J-2-GP

VSS
VSS
VSS
VSS

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

PM

8
7
6
5

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

RN1301
1
2
3
4

VSS

3 OF 10

U1001C

GM 20090316

R1302
0R2J-2-GP

Y11
N11
G11
C11
BG10
AV10
AT10
AJ10
AE10
AA10
M10
BF9
BC9
AN9
AM9
AD9
G9
B9
BH8
BB8
AV8
AT8

VSS

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

Place R1301
close to
MCH within
500 mils.

+VCC_PEG

AH8
Y8
L8
E8
B8
AY7
AU7
AN7
AJ7
AE7
AA7
N7
J7
BG6
BD6
AV6
AT6
AM6
M6
C6
BA5
AH5
AD5
Y5
L5
J5
H5
F5
BE4

VGA

AN13
AJ13
AE13
N13
L13
G13
E13
BF12
AV12
AT12
AM12
AA12
J12
A12
BD11
BB11
AY11
AN11
AH11

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VSS NCTF

BA16
AU16
AN16
N16
K16
G16
E16
BG15
AC15
W15
A15
BG14
AA14
C14
BG13
BC13
BA13

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

TV

BG21
L12
AW21
AU21
AP21
AN21
AH21
AF21
AB21
R21
M21
J21
G21
BC20
BA20
AW20
AT20
AJ20
AG20
Y20
N20
K20
F20
C20
A20
BG19
A18
BG17
BC17
AW17
AT17
R17
M17
H17
C17

10 OF 10

U1001J
AM36
AE36
P36
L36
J36
F36
B36
AH35
AA35
Y35
U35
T35
BF34
AM34
AJ34
AF34
AE34
W34
B34
A34
BG33
BC33
BA33
AV33
AR33
AL33
AH33
AB33
P33
L33
H33
N32
K32
F32
C32
A31
AN29
T29
N29
K29
H29
F29
A29
BG28
BD28
BA28
AV28
AT28
AR28
AJ28
AG28
AE28
AB28
Y28
P28
K28
H28
F28
C28
BF26
AH26
AF26
AB26
AA26
C26
B26
BH25
BD25
BB25
AV25
AR25
AJ25
AC25
Y25
N25
L25
J25
G25
E25
BF24
AD12
AY24
AT24
AJ24
AH24
AF24
AB24
R24
L24
K24
J24
G24
F24
E24
BH23
AG23
Y23
B23
A23
AJ6

LVDS

VSS

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VSS SCB

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

9 OF 10

U1001I
AU48
AR48
AL48
BB47
AW47
AN47
AJ47
AF47
AD47
AB47
Y47
T47
N47
L47
G47
BD46
BA46
AY46
AV46
AR46
AM46
V46
R46
P46
H46
F46
BF44
AH44
AD44
AA44
Y44
U44
T44
M44
F44
BC43
AV43
AU43
AM43
J43
C43
BG42
AY42
AT42
AN42
AJ42
AE42
N42
L42
BD41
AU41
AM41
AH41
AD41
AA41
Y41
U41
T41
M41
G41
B41
BG40
BB40
AV40
AN40
H40
E40
AT39
AM39
AJ39
AE39
N39
L39
B39
BH38
BC38
BA38
AU38
AH38
AD38
AA38
Y38
U38
T38
J38
F38
C38
BF37
BB37
AW37
AT37
AN37
AJ37
H37
C37
BG36
BD36
AK15
AU36

NC

SSID = MCH

PEG_RX_0
PEG_RX_1
PEG_RX_2
PEG_RX_3
PEG_RX_4
PEG_RX_5
PEG_RX_6
PEG_RX_7
PEG_RX_8
PEG_RX_9
PEG_RX_10
PEG_RX_11
PEG_RX_12
PEG_RX_13
PEG_RX_14
PEG_RX_15
PEG_TX#_0
PEG_TX#_1
PEG_TX#_2
PEG_TX#_3
PEG_TX#_4
PEG_TX#_5
PEG_TX#_6
PEG_TX#_7
PEG_TX#_8
PEG_TX#_9
PEG_TX#_10
PEG_TX#_11
PEG_TX#_12
PEG_TX#_13
PEG_TX#_14
PEG_TX#_15
PEG_TX_0
PEG_TX_1
PEG_TX_2
PEG_TX_3
PEG_TX_4
PEG_TX_5
PEG_TX_6
PEG_TX_7
PEG_TX_8
PEG_TX_9
PEG_TX_10
PEG_TX_11
PEG_TX_12
PEG_TX_13
PEG_TX_14
PEG_TX_15

PCIE_MRX_GTX_P[0..15]

PCIE_MRX_GTX_N[0..15]

53

PCIE_MRX_GTX_P[0..15]

53

PCIE_MTX_GRX_N[0..15]

PCIE_MTX_GRX_N[0..15]

53

PCIE_MTX_GRX_P[0..15]

PCIE_MTX_GRX_P[0..15]

53

CANTIGA-GM-GP-U-NF

for Discrete

GM 20090316

CANTIGA-GM-GP-U-NF
CANTIGA-GM-GP-U-NF

A
<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

Cantiga-GND/LVDS/VGA(4/6)

Size
C

Document Number

Date:

Monday, March 23, 2009

Rev

SB

Alba Discrete
Sheet

13

of

59

SSID = MCH
6 OF 10

U1001F

VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC

T32

Supply

Signal Group

+1.05V_VCCP

VCC

3060mA

+1.05V_VCCP

VTT

852mA

+1.05V_VCCP

VCC_PEG

1782mA

+1.05V_VCCP

VCC_DMI

456mA

+1.05V_VCCP

VCCA_SM

720mA

+1.05V_VCCP

VCCA_SM_CK

26mA

+1.05V_VCCP

VCCA_HPLL

24mA

+1.05V_VCCP

VCCA_MPLL

139.2mA

+1.05V_VCCP

VCCD_HPLL

157.2mA

+1.05V_VCCP

VCCA_PEG_PLL

50mA

+1.05V_VCCP

VCCD_PEG_PLL

50mA

+1.05V_VCCP

VCC_AXF

321.35mA

+1.5V_RUN

VCCD_TVDAC

35mA

+1.8V_SUS

VCC_SM

3000mA

+1.8V_SUS

VCC_SM_CK

124mA

+1.5V_RUN

VCCA_PEG_BG

414uA

+3.3V_RUN

VCC_HV

105.3mA

POWER

AE33
AC33
AA33
Y33
W 33
V33
U33
AH28
AF28
AC28
AA28
AJ26
AG26
AE26
AC26
AH25
AG25
AF25
AG24
AJ23
AH23
AF23

VCC CORE

C1403
SCD1U16V2KX-3GP

1
2

C1405
SCD1U10V2KX-4GP

VCC

+1.05V_VCCP

Imax

VCC NCTF

1
2

1
2
1
2

GM

C1418
SCD1U16V2KX-3GP

1
2

C1419
SC1U10V3KX-3GP

1
2

C1417
SC22U6D3V5MX-2GP

1
2

G/P

C1410
SC1U10V3KX-3GP

C1408
SC1U10V3KX-3GP

1
2

C1407
SCD22U10V2KX-1GP

1
2

1
2

C1401
SCD22U10V2KX-1GP

CANTIGA-GM-GP-U-NF

AV44 SM_LF1_GMCH
BA37 SM_LF2_GMCH
AM40 SM_LF3_GMCH
AV21 SM_LF4_GMCH
AY5 SM_LF5_GMCH
AM10 SM_LF6_GMCH
BB13 SM_LF7_GMCH

C1409
SCD47U6D3V2KX-GP

VCC_AXG_SENSE
VSS_AXG_SENSE

C1415
SCD1U16V2KX-3GP

POWER
VCC SM

AJ14
AH14

VCC_SM_LF
VCC_SM_LF
VCC_SM_LF
VCC_SM_LF
VCC_SM_LF
VCC_SM_LF
VCC_SM_LF

C1404
SCD1U10V2KX-4GP

VCC_AXG_SENSE
VSS_AXG_SENSE

G/P

+1.05V_VCCP

VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC

VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF

AM32
AL32
AK32
AJ32
AH32
AG32
AE32
AC32
AA32
Y32
W 32
U32
AM30
AL30
AK30
AH30
AG30
AF30
AE30
AC30
AB30
AA30
Y30
W 30
V30
U30
AL29
AK29
AJ29
AH29
AG29
AE29
AC29
AA29
Y29
W 29
V29
AL28
AK28
AL26
AK26
AK25
AK24
AK23

CANTIGA-GM-GP-U-NF

A
TP1402
TP1401

G/P

R1408
0R3-0-U-GP
1
2

GM 20090311

GM 20090311

G/P

C1406
SCD1U10V2KX-4GP

G/P G/P

+1.05V_VCCP_AXG

C1416
SCD1U10V2KX-4GP

G/P

GM

VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG

W 28
V28
W 26
V26
W 25
V25
W 24
V24
W 23
V23
AM21
AL21
AK21
W 21
V21
U21
AM20
AK20
W 20
U20
AM19
AL19
AK19
AJ19
AH19
AG19
AF19
AE19
AB19
AA19
Y19
W 19
V19
U19
AM17
AK17
AH17
AG17
AF17
AE17
AC17
AB17
Y17
W 17
V17
AM16
AL16
AK16
AJ16
AH16
AG16
AF16
AE16
AC16
AB16
AA16
Y16
W 16
V16
U16

8700mA

R1402
0R3-0-U-GP
1
2

C1421
SC4D7U6D3V5KX-3GP
2
1

GM

C1420
SCD1U16V2KX-3GP

R1401
0R3-0-U-GP
1
2

Y26
AE25
AB25
AA25
AE24
AC24
AA24
Y24
AE23
AC23
AB23
AA23
AJ21
AG21
AE21
AC21
AA21
Y21
AH20
AF20
AE20
AC20
AB20
AA20
T17
T16
AM15
AL15
AE15
AJ15
AH15
AG15
AF15
AB15
AA15
Y15
V15
U15
AN14
AM14
U14
T14

VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF

VCC SM LF

+1.05V_VCCP

VCC_SM/NC
VCC_SM/NC
VCC_SM/NC
VCC_SM/NC
VCC_SM/NC
VCC_SM/NC
VCC_SM/NC

VCC GFX NCTF

+1.05V_VCCP_AXG

BA36
BB24
BD16
BB21
AW 16
AW 13
AT13

VCC GFX

1
2

On the edge

VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM

3000mA

SC22U6D3V5MX-2GP
C1411

SC22U6D3V5MX-2GP
C1414

Close to (G)MCH

AP33
AN33
BH32
BG32
BF32
BD32
BC32
BB32
BA32
AY32
AW 32
AV32
AU32
AT32
AR32
AP32
AN32
BH31
BG31
BF31
BG30
BH29
BG29
BF29
BD29
BC29
BB29
BA29
AY29
AW 29
AV29
AU29
AT29
AR29
AP29

AG34
AC34
AB34
AA34
Y34
V34
U34
AM33
AK33
AJ33
AG33
AF33

3060mA

SC1U6D3V2KX-GP
C1412
2
1

C1402
SCD1U16V2KX-3GP

7 OF 10

U1001G

+1.8V_SUS

C1413
SC4D7U6D3V5KX-3GP

+1.05V_VCCP

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

Cantiga-Power(5/6)

Size
Document Number
Custom
Date:

Monday, March 23, 2009

Rev

SB

Alba Discrete
Sheet

14

of

59

SSID = MCH
+1.05V_VCCP

AE1

VCCA_MPLL 139.2mA

J48

VCCA_LVDS 13.2mA

J47

VSSA_LVDS

60.31mA

1
1
2

C1527
SC1U10V3KX-3GP

2
2 1
1

VCC_PEG
VCC_PEG
VCC_PEG
VCC_PEG
VCC_PEG

V48
U48
V47
U47
U46

+VCC_PEG

+1.05V_VCCP

C35
B35
A35

AH48
AF48
AH47
AG47

VTTLF
VTTLF
VTTLF

A8
L1
AB2

C1528
SCD1U10V2KX-4GP

0R3-0-U-GP

1
2

1
2

1
2

C1533
SC10U6D3V5MX-3GP

R1507

0R3-0-U-GP
+VCC_PEG

X01 20081215

R1505
1D05V_VCC_DMI

VTTLF1
VTTLF2
VTTLF3

0R3-0-U-GP

VCC_DMI
VCC_DMI
VCC_DMI
VCC_DMI

C1518
SC10U6D3V5MX-3GP

R1506

1782mA

HV

VCC_HV
VCC_HV
VCC_HV

105.3mA

C1510
SC10U6D3V5MX-3GP

+3.3V_RUN

VCCD_LVDS
VCCD_LVDS

C1508
SCD1U10V2KX-4GP

1
M38
L37

VTTLF

C1529
SCD1U10V2KX-4GP

2
VCCD_PEG_PLL 50mA

R1503
1R3F-GP

K47

CANTIGA-GM-GP-U-NF
1
2

1
2

C1524
SCD47U6D3V2KX-GP

AA47

VCCD_HPLL 157.2mA

PEG

VCCD_QDAC 2mA

0R5J-5-GP

BF21
BH20
BG20
BF20

1D05V_RUN_PEGPLL

VCCD_TVDAC 35mA

L28

LVDS

0R3-0-U-GP

M25

AF1

VCC_SM_CK
VCC_SM_CK
VCC_SM_CK
VCC_SM_CK

C1534
SC4D7U6D3V3KX-GP

1D05V_RUN_HPLL

C1526
SC10U6D3V5MX-3GP

B22
B21
A21

C1525
SCD47U6D3V2KX-GP

1D5VRUN_QDAC
R1508

TV

VCC_HDA 50mA

1
+1.05V_VCCP

C1520
SCD1U10V2KX-4GP

1
2

C1516
SCD1U10V2KX-4GP

1D5VRUN_QDAC
C1514
SCD01U16V2KX-3GP

A32

VCC_AXF
VCC_AXF
VCC_AXF

118.8mA VCC_TX_LVDS

D TV/CRT

R1514
0R2J-2-GP

L1501

VCCA_TV_DAC
VCCA_TV_DAC

+1.5V_RUN

1
2
BLM18PG181SN1D-GP

B24
A24

HDA

VCCD_TVDAC

DY

0R2J-2-GP

79mA

321.35mA

AXF

R1513

SM CK

+1.5V_RUN

124mA

VCCA_SM_CK
VCCA_SM_CK
VCCA_SM_CK
VCCA_SM_CK
VCCA_SM_CK
VCCA_SM_CK_NCTF
VCCA_SM_CK_NCTF
VCCA_SM_CK_NCTF
VCCA_SM_CK_NCTF
VCCA_SM_CK_NCTF
VCCA_SM_CK_NCTF
VCCA_SM_CK_NCTF
VCCA_SM_CK_NCTF

456mA

0R3-0-U-GP

DY

+1.8V_SUS

DMI

GM 20090316

R1502

A CK

C1515
SCD1U10V2KX-4GP

AP28
AN28
AP25
AN25
AN24
AM28
AM26
AM25
AL25
AM24
AL24
AM23
AL23

1
10R2J-2-GP

1D8V_VCC_SM_CK

1D05V_SM_CK

C1513
SC2D2U10V3KX-1GP

DY
2

C1511
SC22U6D3V5MX-2GP

1
2

0R3-0-U-GP

C1531
SCD1U10V2KX-4GP

1
2

C1535
SC10U6D3V5MX-3GP

852mA

VTT
PLL

POWER

37.5mA

220ohm 100MHz

1D05V_RUN_PEGPLL

+1.05V_VCCP

C1532
SC10U6D3V5MX-3GP

VCCA_SM
VCCA_SM
VCCA_SM
VCCA_SM
VCCA_SM
VCCA_SM
VCCA_SM
VCCA_SM
VCCA_SM

R1509

VCCA_PEG_PLL 50mA

R1504
L1504
1
2
BLM18BB221SN1D-GP

SDMK0340L-7-F-GP

A PEG

AR20
AP20
AN20
AR17
AP17
AN17
AT16
AR16
AP16

+3.3V_RUN
R1510

D1501

1D05V_VCC_AXF

A SM

1
2

C1506
SC1U10V3KX-3GP

1
2

C1507
SC4D7U6D3V3KX-GP

+1.05V_VCCP

DY

DY

C1503
SC22U6D3V5MX-2GP

AA48

+1.05V_VCCP

1
2

C1501
SCD47U6D3V2KX-GP

1
C1530
SCD1U10V2KX-4GP
1D05V_RUN_PEGPLL
1D05V_SM

0R3-0-U-GP

VCCA_PEG_BG

414uA

X00 ALBA
+1.05V_VCCP
R1501
1

AD48

A LVDS

VCCA_PEG_BG

0R2J-2-GP

C1504
SC22U6D3V5MX-2GP

1
2
1
2

+1.05V_VCCP

C1539
SCD1U10V2KX-4GP

1
1

720mA

C1519
SCD1U10V2KX-4GP

DY

For Discrete

TC1501
ST220U2D5VBM-LGP

M_VCCA_MPLL

DY
2

VCCA_HPLL 24mA

EC1501
SC1U10V3KX-3GP

AD1

M_VCCA_HPLL

R1512

M_VCCA_MPLL

120ohm 100MHz

+1.5V_RUN

L1502
1
2
BLM18PG121SN1D-GP

C1522
SC10U6D3V5MX-3GP

C1521
SCD1U10V2KX-4GP

1
2

120ohm 100MHz

C1523
SC4D7U6D3V3KX-GP

M_VCCA_HPLL

G/P

L1503
1
2
BLM18PG121SN1D-GP

C1538
SCD1U10V2KX-4GP
2
1

G/P

VCCA_DPLLB

64.8mA

R1515

C1509
SC1U10V3KX-3GP

VCCA_DPLLA

L48

+1.05V_VCCP_VCCA_DPLL

GM

F47

0R3-0-U-GP

TC1502
ST100U6D3VBM-5GP

GM 20090311
+1.05V_VCCP

C1505
SC1U10V3KX-3GP

VCCA_DAC_BG
VSSA_DAC_BG

U13
T13
U12
T12
U11
T11
U10
T10
U9
T9
U8
T8
U7
T7
U6
T6
U5
T5
V3
U3
V2
U2
T2
V1
U1

A25
B25

+1.05V_VCCP

VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT

C1502
SC1U10V3KX-3GP

VCCA_CRT_DAC
VCCA_CRT_DAC

CRT

B27
A26

C1512
SCD1U16V2KX-3GP

8 OF 10

U1001H

C1517
SCD1U10V2KX-4GP

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

Cantiga-Power/Filter(6/6)

Size
Document Number
Custom

Date: Monday, March 23, 2009

Rev

SB

Alba Discrete
Sheet

15

of

59

DM1

12 M_A_BS#0
12 M_A_BS#1

TC1601
ST220U2D5VBM-LGP

DY
2

C1612
SCD1U10V2KX-4GP

C1609
SC1U6D3V2KX-GP

C1613
SCD1U10V2KX-4GP

C1607
SCD1U16V2KX-3GP

DY
2

1
2

DY

C1616
SC1U10V3KX-3GP

C1621
SC2D2U10V3KX-1GP

1
2

1
2

C1619
SC1U10V3KX-3GP

DY

Layout Note:
Place one cap close to every 2 pullup
resistors terminated to +0.9V_DDR_VTT.

1
2

C1628
SCD1U16V2KX-3GP

1
2

C1629
SCD1U16V2KX-3GP

1
2

C1615
SCD1U16V2KX-3GP

C1618
SCD1U16V2KX-3GP

C1617
SCD1U16V2KX-3GP

DY
2

C1614
SCD1U16V2KX-3GP

DY
2

C1606
SCD1U16V2KX-3GP

DY
2

DY

C1630
SCD1U16V2KX-3GP

C1605
SCD1U16V2KX-3GP

1
2

DY

C1608
SCD1U16V2KX-3GP

C1611
SCD1U16V2KX-3GP

C1627
SCD1U16V2KX-3GP

DY
2

C1610
SCD1U16V2KX-3GP

+0.9V_DDR_VTT

M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63

5
7
17
19
4
6
14
16
23
25
35
37
20
22
36
38
43
45
55
57
44
46
56
58
61
63
73
75
62
64
74
76
123
125
135
137
124
126
134
136
141
143
151
153
140
142
152
154
157
159
173
175
158
160
174
176
179
181
189
191
180
182
192
194

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63

SDA
SCL

195
197

ICH_SMBDATA
ICH_SMBCLK

VDDSPD

199

SA0
SA1

198
200

NC#50
NC#69
NC#83
NC#120
NC#163/TEST

50
69
83
120
163

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

81
82
87
88
95
96
103
104
111
112
117
118

VREF
VSS

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

3
8
9
12
15
18
21
24
27
28
33
34
39
40
41
42
47
48
53
54
59
60
65
66
71
72
77
78
121
122
127
128
132
133
138
139
144
145
149
150
155
156
161
162
165
168
171
172
177
178
183
184
187
190
193
196

M_A_DQS#0
M_A_DQS#1
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7

11
29
49
68
129
146
167
186

/DQS0
/DQS1
/DQS2
/DQS3
/DQS4
/DQS5
/DQS6
/DQS7

M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7

13
31
51
70
131
148
169
188

DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7

M_ODT0
M_ODT1

114
119

ODT0
ODT1

1
2

GND

GND

201

ICH_SMBDATA 7,17,20,43
ICH_SMBCLK 7,17,20,43

ALBA X00
PM_EXTTS#0 11

+1.8V_SUS

+3.3V_RUN

+0.9V_DDR_VTT
RN1605

RN1601
M_A_A5
M_A_A8
M_A_A9
M_A_A12

1
2
3
4

8
7
6
5

1
2

M_CKE0
M_A_BS#2

4
3

SRN56J-4-GP

SRN56J-5-GP

1
R1663
RN1602
M_ODT0
M_CS0#
M_A_BS#1
M_A_RAS#

1
2
3
4

M_A_A13
56R2J-4-GP

RN1606

8
7
6
5

1
2
3
4

M_A_A3
M_A_A1
M_A_A10
M_A_BS#0

8
7
6
5

SRN56J-5-GP

SRN56J-5-GP

RN1603
M_ODT1
M_CS1#
M_A_CAS#
M_A_WE#

1
2
3
4

RN1607

8
7
6
5
SRN56J-5-GP

8
7
6
5

M_A_A7
M_A_A11
M_A_A14
M_CKE1

1
2
3
4

SRN56J-5-GP

RN1604
M_A_A0
M_A_A2
M_A_A4
M_A_A6

1
2
3
4

8
7
6
5
SRN56J-5-GP

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

DDRII-SODIMM SLOT1

Size
Document Number
Custom
Date:

DY

Layout Note:
Place these resistors close to DM1,
all trace length Max=1.5".

62.10017.881
4

DDR2-200P-10-U1

M_A_DM0
M_A_DM1
M_A_DM2
M_A_DM3
M_A_DM4
M_A_DM5
M_A_DM6
M_A_DM7

C1624
DUMMY-C2

10
26
52
67
130
147
170
185

DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7

BA0
BA1

C1623
DUMMY-C2

M_CLK_DDR1 11
M_CLK_DDR#1 11

CK1
/CK1

M_CLK_DDR1
M_CLK_DDR#1

M_CLK_DDR0 11
M_CLK_DDR#0 11

164
166

C1604
DUMMY-C2

M_CLK_DDR0
M_CLK_DDR#0

107
106

202

30
32

M_A_BS#0
M_A_BS#1

C1625
SC2D2U10V3KX-1GP

CK0
/CK0

C1603
DUMMY-C2

M_A_BS#2

DY
2

C1626
SCD1U16V2KX-3GP

+V_DDR_MCH_REF

11 M_ODT0
11 M_ODT1

M_CKE0 11
M_CKE1 11

Height 6.5mm

C1620
SC1U10V3KX-3GP

C1622
SC2D2U10V3KX-1GP

Layout Note:
Place near DM1

+1.8V_SUS

79
80

12 M_A_BS#2
12 M_A_A[14..0]

M_CS0# 11
M_CS1# 11

CKE0
CKE1

put near connector


M_CLK_DDR0
M_CLK_DDR#0
M_CLK_DDR1
M_CLK_DDR#1

12 M_A_DQS[7..0]

/CS0
/CS1

110
115

M_A_RAS# 12
M_A_WE# 12
M_A_CAS# 12

12 M_A_DM[7..0]

108
109
113

C1601
SC2D2U10V3KX-1GP

/RAS
/W E
/CAS

12 M_A_DQ[63..0]

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15
A16/BA2

12 M_A_DQS#[7..0]

102
101
100
99
98
97
94
92
93
91
105
90
89
116
86
84
85

C1602
SCD1U16V2KX-3GP

M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14

SSID = MEMORY

Monday, March 23, 2009

Rev

SB

Alba Discrete
Sheet
1

16

of

59

DM2

12 M_B_BS#2
12 M_B_A[14..0]
12 M_B_BS#0
12 M_B_BS#1

TC1701
ST220U2D5VBM-LGP

C1715
SC1U6D3V2KX-GP

1
2

C1709
SC1U6D3V2KX-GP

C1717
SCD1U16V2KX-3GP

1
2

C1714
SCD1U10V2KX-4GP

1
2

C1710
SC1U10V3KX-3GP

1
2

C1711
SC1U10V3KX-3GP

1
2

DY

C1708
SCD1U16V2KX-3GP

C1721
SCD1U16V2KX-3GP

1
2

C1705
SCD1U16V2KX-3GP

C1713
SCD1U16V2KX-3GP

DY
2

C1724
SCD1U16V2KX-3GP

1
2

C1706
SCD1U16V2KX-3GP

1
2

C1722
SCD1U16V2KX-3GP

1
2

C1723
SCD1U16V2KX-3GP

1
2

C1725
SCD1U16V2KX-3GP

1
2

C1727
SCD1U16V2KX-3GP

DY
2

1
2

C1728
SCD1U16V2KX-3GP

1
2

DY

Layout Note:
Place one cap close to every 2 pullup
resistors terminated to +0.9V_DDR_VTT.

C1726
SCD1U16V2KX-3GP

C1729
SCD1U16V2KX-3GP

DY

C1730
SCD1U16V2KX-3GP

1
2
C1720
SC2D2U10V3KX-1GP

NP1
NP2

M_B_DM0
M_B_DM1
M_B_DM2
M_B_DM3
M_B_DM4
M_B_DM5
M_B_DM6
M_B_DM7

SDA
SCL
VDDSPD
SA0
SA1
NC#50
NC#69
NC#83
NC#120
NC#163/TEST

195
197

ICH_SMBDATA
ICH_SMBCLK

+3.3V_RUN
PM_EXTTS#1 11

DY

+1.8V_SUS

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
ODT0
ODT1
VREF
VSS
NP1
NP2

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
GND
GND

81
82
87
88
95
96
103
104
111
112
117
118

Layout Note:
Place these resistors close to DM2,
all trace length Max=1.5".
+0.9V_DDR_VTT

3
8
9
12
15
18
21
24
27
28
33
34
39
40
41
42
47
48
53
54
59
60
65
66
71
72
77
78
121
122
127
128
132
133
138
139
144
145
149
150
155
156
161
162
165
168
171
172
177
178
183
184
187
190
193
196

RN1701
M_B_A8
M_B_A5
M_B_A1
M_B_A3

1
2
3
4

M_ODT3
M_CS3#
M_B_A0

1
2
3
4

M_B_A10
M_B_BS#0
M_B_W E#
M_B_CAS#

1
2
3
4

8
7
6
5

M_CKE3
M_B_A14
M_B_A11
M_B_A6

SRN56J-5-GP
RN1705

8
7
6
5

1
2
3
4

SRN56J-5-GP

8
7
6
5

M_B_A7
M_B_A4
M_B_A2
M_B_BS#1

SRN56J-5-GP

RN1703

RN1706

8
7
6
5

1
2
3
4

SRN56J-5-GP

8
7
6
5

M_B_RAS#
M_ODT2
M_CS2#
M_B_A13

SRN56J-5-GP
RN1707

1
2
3
4

8
7
6
5

M_B_A12
M_B_BS#2
M_B_A9
M_CKE2

SRN56J-5-GP

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

201
202

Title

DDRII-SODIMM SLOT2

Date:
3

1
2
3
4

RN1702

Size
Document Number
Custom

RN1704

8
7
6
5
SRN56J-5-GP

DDR2-200P-33-GP

+3.3V_RUN

ALBA X00

50
69
83
120
163

ICH_SMBDATA 7,16,20,43
ICH_SMBCLK 7,16,20,43

199
198
200

C1719
DUMMY-C2

114
119

10
26
52
67
130
147
170
185

DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7

M_ODT2
M_ODT3

M_CLK_DDR3 11
M_CLK_DDR#3 11

13
31
51
70
131
148
169
188

M_CLK_DDR3
M_CLK_DDR#3

C1718
DUMMY-C2

M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7

DQS0#
DQS1#
DQS2#
DQS3#
DQS4#
DQS5#
DQS6#
DQS7#

164
166

11
29
49
68
129
146
167
186

M_CLK_DDR2 11
M_CLK_DDR#2 11

CK1
CK1#

M_CKE2 11
M_CKE3 11

M_B_DQS#0
M_B_DQS#1
M_B_DQS#2
M_B_DQS#3
M_B_DQS#4
M_B_DQS#5
M_B_DQS#6
M_B_DQS#7

M_CLK_DDR2
M_CLK_DDR#2

C1704
DUMMY-C2

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63

CK0
CK0#

30
32

5
7
17
19
4
6
14
16
23
25
35
37
20
22
36
38
43
45
55
57
44
46
56
58
61
63
73
75
62
64
74
76
123
125
135
137
124
126
134
136
141
143
151
153
140
142
152
154
157
159
173
175
158
160
174
176
179
181
189
191
180
182
192
194

79
80

M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63

CKE0
CKE1

M_CS2# 11
M_CS3# 11

C1703
DUMMY-C2

BA0
BA1

110
115

M_CLK_DDR2
M_CLK_DDR#2
M_CLK_DDR3
M_CLK_DDR#3

107
106

11 M_ODT2
11 M_ODT3

+V_DDR_MCH_REF

M_B_BS#0
M_B_BS#1

Height 11mm

DY

1
2

DY

+0.9V_DDR_VTT

C1707
SC2D2U10V3KX-1GP

1
2

C1716
SC1U10V3KX-3GP

+1.8V_SUS

C1712
SC1U10V3KX-3GP

Layout Note:
Place near DM2

M_B_BS#2

CS0#
CS1#

M_B_RAS# 12
M_B_W E# 12
M_B_CAS# 12

12 M_B_DQS[7..0]

108
109
113

C1702
SC2D2U10V3KX-1GP

12 M_B_DM[7..0]

put near connector

RAS#
WE#
CAS#

12 M_B_DQ[63..0]

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15
A16/BA2

12 M_B_DQS#[7..0]

102
101
100
99
98
97
94
92
93
91
105
90
89
116
86
84
85

M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14

C1701
SCD1U16V2KX-3GP

SSID = MEMORY

Monday, March 23, 2009

Rev

SB

Alba Discrete
Sheet
1

17

of

59

SSID = ICH
R1816
R1812 1

2 10MR2J-L-GP

ICH_RTCX1

LPC_LFRAME#

0R2J-2-GP

ICH_RTCX2

LPC_LAD3

0R2J-2-GP

LPC_LAD2

0R2J-2-GP

LPC_LAD1

0R2J-2-GP

LPC_LAD0

0R2J-2-GP

X1801

X02 20090219

C1806
SC12P50V3JN-GP

C1807
SC12P50V3JN-GP

LPC_LAD[0..3]

1 OF 6
+RTC_CELL

ICH_RTCRST#
SRTCRST#
SM_INTRUDER#

A25
F20
C22

RTCRST#
SRTCRST#
INTRUDER#

ICH_INTVRMEN
LAN100_SLP

B22
A22

INTVRMEN
LAN100_SLP

E25

GLAN_CLK

C13

LAN_RSTSYNC

+RTC_CELL
R1815

2
1
2

20KR2F-L-GP

C1808
SC1U10V3KX-3GP

R1821

Place within 500 mil of SB.


R1811 1

22 ICH_AZ_CODEC_BITCLK
22 ICH_AZ_CODEC_SYNC
22 ICH_AZ_CODEC_RST#

22 ICH_SDOUT_CODEC

R1822

R1823

ODD

DY

2GPIO56

10KR2J-3-GP GLAN_COMP

LAN_RXD0
LAN_RXD1
LAN_RXD2

D13
D12
E13

LAN_TXD0
LAN_TXD1
LAN_TXD2

B10

GLAN_DOCK#/GPIO56

B28
B27

GLAN_COMPI
GLAN_COMPO

33R2J-2-GP

ACZ_BIT_CLK
ACZ_SYNC_R

AF6
AH4

HDA_BIT_CLK
HDA_SYNC

33R2J-2-GP

ACZ_RST#_R

AE7

HDA_RST#

R1824

33R2J-2-GP

R1825

33R2J-2-GP

X01 20081208

HDD

2 24D9R2F-L-GP

F14
G13
D14

44 SATA_IRXN0_HTXN0_C
44 SATA_IRXP0_HTXP0_C
44 SATA_ITXN0_HRXN0
44 SATA_ITXP0_HRXP0
44 SATA_IRXN1_OTXN1_C
44 SATA_IRXP1_OTXP1_C
44 SATA_ITXN1_ORXN1
44 SATA_ITXP1_ORXP1

22 ICH_SDIN_CODEC

AF4
AG4
AH3
AE5

HDA_SDIN0
HDA_SDIN1
HDA_SDIN2
HDA_SDIN3

AG5

HDA_SDOUT

AG7
AE8

HDA_DOCK_EN#/GPIO33
HDA_DOCK_RST#/GPIO34

AG8

SATALED#

SATA_ITXN0_HRXN0_C
SATA_ITXP0_HRXP0_C

AJ16
AH16
AF17
AG17

SATA0RXN
SATA0RXP
SATA0TXN
SATA0TXP

SATA_ITXN1_ORXN1_C
SATA_ITXP1_ORXP1_C

AH13
AJ13
AG14
AF14

Removed
X01 20081208
ACZ_SDATAOUT_R

SATA_LED#

TP1801

C1802 1
C1803 1

2 SCD01U50V2KX-1GP
2 SCD01U50V2KX-1GP

C1804 1
C1805 1

2 SCD01U50V2KX-1GP
2 SCD01U50V2KX-1GP

SATA1RXN
SATA1RXP
SATA1TXN
SATA1TXP

IHDA

SATA

G1801
GAP-OPEN

RTC
LPC

RTCX1
RTCX2

LAN / GLAN
CPU

C23
C24

ICH_RTCRST#

20KR2F-L-GP
C1801
SC1U10V3KX-3GP

+1.5V_RUN

LPC_LAD[0..3]

U1801A
R1814

LPC_LFRAME#_IN

LPC_LAD3_IN
LPC_LAD2_IN
LPC_LAD1_IN
LPC_LAD0_IN

43

LPC_LAD3_IN

43

LPC_LAD2_IN

43

LPC_LAD1_IN

43

LPC_LAD0_IN

43

For MINICARD debug board.

X02 20090219

X-32D768KHZ-38GPU

LPC_LFRAME#_IN

DYR18171
DYR18181
DYR18191
DYR18201
DY 1

FW H0/LAD0
FW H1/LAD1
FW H2/LAD2
FW H3/LAD3

K5
K4
L6
K2

FW H4/LFRAME#

K3

LDRQ0#
LDRQ1#/GPIO23

J3
J1

26

LPC_LAD0
LPC_LAD1
LPC_LAD2
LPC_LAD3
+3.3V_RUN

LPC_LFRAME# 26

R1810

DY

10KR2J-3-GP

A20GATE
A20M#

N7
AJ27

DPRSTP#
DPSLP#

AJ25
AE23

H_DPRSTP#

FERR#

AJ26

H_FERR#_R

CPUPW RGD

AD22

H_PWRGOOD 8,30

IGNNE#

AF25

H_IGNNE#

INIT#
INTR
RCIN#

AE22
AG25
L3

H_INIT# 8
H_INTR 8

NMI
SMI#

AF23
AF24

H_NMI 8
H_SMI# 8

STPCLK#

AH27

THRMTRIP#

AG26

H_THERMTRIP_R

PECI

AG27

Placed Within 2" from SB.

SATA4RXN
SATA4RXP
SATA4TXN
SATA4TXP

AH11
AJ11
AG12
AF12

SATA5RXN
SATA5RXP
SATA5TXN
SATA5TXP

AH9
AJ9
AE10
AF10

SATA_CLKN
SATA_CLKP

AH18
AJ18

SATARBIAS#
SATARBIAS

AJ7
AH7

KA20GATE 26
H_A20M# 8

+1.05V_VCCP
R1801

H_DPRSTP# 8,11,34
H_DPSLP# 8

1
R1804

56R2J-4-GP

2
56R2J-4-GP

H_FERR# 8
+3.3V_RUN

R1807

DY

10KR2J-3-GP
KBRCIN#

2
56R2J-4-GP

H_STPCLK# 8

1
R1803

26

+1.05V_VCCP
R1802

2 H_THERMTRIP_1
1
54D9R2F-L1-GP
R1805

2
0R2J-2-GP

H_THRMTRIP#

8,11,26,30,54

CLK_PCIE_SATA# 7
CLK_PCIE_SATA 7
SATARBIAS

1
R1806

2
24D9R2F-L-GP

Place within 500 mils from SB.

ICH9M-GP-NF
ICH_AZ_CODEC_BITCLK

Removed
X01 20081208

DY

EC1802
SC4D7P50V2CN-1GP

Lay Out Close U1801

+RTC_CELL
R1813

ICH_INTVRMEN

High=Enable

Low=Disable

LAN100_SLP

LAN100_SLP

High=Enable

Wistron Corporation

Low=Disable

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.

330KR2F-L-GP
Title

R1808

<Core Design>

integrated VccLan1_05VccCL1_05

R1809

integrated VccSus1_05,VccSus1_5,VccCL1_5

INTVRMEN

330KR2F-L-GP

SM_INTRUDER#

ICH9-LAN/HDA/SATA/LPC(1/4)

Size
Document Number
Custom

1MR2J-1-GP

Date:
5

Monday, March 23, 2009

Rev

SB

Alba Discrete
Sheet
1

18

of

59

U1801B

D11
C8
D9
E12
E9
C9
E10
B7
C7
C5
G11
F8
F11
E7
A3
D2
F10
D5
D10
B3
F7
C3
F3
F4
C1
G7
H7
D1
G5
H6
G1
H3

5 OF 6
+3.3V_RUN

U1801E

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

A1
A2
A28
A29
AH1
AH29
AJ1
AJ2
AJ28
AJ29
B1
B29

U1902

5
11,25,26,43,50

PLT_RST#

PLT_RST#

GND

VCC

DY

PCI_PLTRST#

74LVC1G08GW-1-GP
R1907 1

R1913

53 PLTRST_ICH_DELAY#

2 0R2J-2-GP

DY

2 0R2J-2-GP

X01 20081208

PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#

J5
E1
J6
C4

AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

PCI

REQ0#
GNT0#
REQ1#/GPIO50
GNT1#/GPIO51
REQ2#/GPIO52
GNT2#/GPIO53
REQ3#/GPIO54
GNT3#/GPIO55

F1
G4
B6
A7
F13
F12
E6
F6

PCI_REQ0#
PCI_GNT0#
PCI_REQ1#
PCI_GNT1#
PCI_REQ2#
PCI_GNT2#
PCI_REQ3#
PCI_GNT3#

PCI_PIRQF#
PCI_TRDY#
PCI_REQ3#
PCI_PIRQD#

TP1907

8
7
6
5

TP1916

1
2
3
4
SRN8K2J-4-GP
RN1901

PCI_PIRQB#
PCI_PIRQG#
PCI_REQ0#
PCI_PIRQH#

C/BE0#
C/BE1#
C/BE2#
C/BE3#

D8
B4
D6
A5

IRDY#
PAR
PCIRST#
DEVSEL#
PERR#
PLOCK#
SERR#
STOP#
TRDY#
FRAME#

D3
E3
R1
C6
E4
C2
J4
A4
F5
D7

PCI_IRDY#

PLTRST#
PCICLK
PME#

C14
D4
R2

PCI_PLTRST#

8
7
6
5

1
2
3
4

SRN8K2J-4-GP

PCIRST1#
PCI_DEVSEL#
PCI_PERR#
PCI_PLOCK#
PCI_SERR#
PCI_STOP#
PCI_TRDY#
PCI_FRAME#

RN1902

TP1903

PCI_STOP#
PCI_PLOCK#
PCI_IRDY#
PCI_PERR#

8
7
6
5

PCI_DEVSEL#
PCI_REQ1#
PCI_FRAME#
PCI_REQ2#

8
7
6
5

1
2
3
4
SRN8K2J-4-GP
RN1906

CLK_PCI_ICH
TP1904

ICH_PME#

1
2
3
4
SRN8K2J-4-GP

Interrupt I/F
PIRQA#
PIRQB#
PIRQC#
PIRQD#

PIRQE#/GPIO2
PIRQF#/GPIO3
PIRQG#/GPIO4
PIRQH#/GPIO5

RN1904

H4
K6
F2
G2

PCI_PIRQE#
PCI_PIRQF#
PCI_PIRQG#
PCI_PIRQH#

PCI_SERR#
PCI_PIRQE#
PCI_PIRQA#
PCI_PIRQC#

8
7
6
5

1
2
3
4
SRN8K2J-4-GP
C

RP1901
USB_OC#7
USB_OC#11
USB_OC#5
USB_OC#4
+3.3V_ALW

PCI_GNT0#
1
R1910
SPI_CS#1
1
R1911
PCI_GNT3#
1
R1909

RN1903

1
2
3
4
5

10
9
8
7
6

+3.3V_ALW

USB_OC#0
USB_OC#1
USB_OC#6
USB_OC#2

8
7
6
5

+3.3V_ALW

USB_OC#9
USB_OC#8
USB_OC#10
USB_OC#3

1
2
3
4
SRN8K2J-4-GP

DY
DY

DY

1KR2J-1-GP
1KR2J-1-GP
1KR2J-1-GP

BOOT BIOS Strap

SRN10KJ-L3-GP

PCI_GNT#0

SPI_CS#1

BOOT BIOS Location

4 OF 6
U1801D

New
Card

PERN2
PERP2
PETN2
PETP2

PCIE_IRXN2_MTXN2
PCIE_IRXP2_MTXP2
PCIE_ITXN2_MRXN2
PCIE_ITXP2_MRXP2

C1903 2
C1902 2

1 SCD1U16V2KX-3GP
1 SCD1U16V2KX-3GP

PCIE_ITXN2_MRXN2_C
PCIE_ITXP2_MRXP2_C

L29
L28
M27
M26

25
25
25
25

PCIE_IRXN3_RTXN3
PCIE_IRXP3_RTXP3
PCIE_ITXN3_LRXN3
PCIE_ITXP3_LRXP3

C1904 2
C1905 2

1 SCD1U16V2KX-3GP
1 SCD1U16V2KX-3GP

PCIE_ITXN3_LRXN3_C
PCIE_ITXP3_LRXP3_C

J29
J28
K27
K26

PERN3
PERP3
PETN3
PETP3

G29
G28
H27
H26

PERN4
PERP4
PETN4
PETP4

E29
E28
F27
F26

PERN5
PERP5
PETN5
PETP5

50
50
50
50

PCIE_IRXN5_NTXN5
PCIE_IRXP5_NTXP5
PCIE_ITXN5_NRXN5
PCIE_ITXP5_NRXP5

C1907 2
C1906 2

1 SCD1U16V2KX-3GP
1 SCD1U16V2KX-3GP

PCIE_ITXN5_NRXN5_C
PCIE_ITXP5_NRXP5_C

C29
C28
D27
D26
TP1917
TP1918

SPI_CS#1

D25
E23

TP1920
TP1919

ICH_GND1
ICH_GND2
ICH_GND3
ICH_GND4

USB_OC#0
USB_OC#1
USB_OC#2
USB_OC#3
USB_OC#4
USB_OC#5
USB_OC#6
USB_OC#7
USB_OC#8
USB_OC#9
USB_OC#10
USB_OC#11

46 USB_OC#0
46 USB_OC#1
51 USB_OC#2

TP1905
TP1906

NCTF PIN
TP1901
TP1902

D23
D24
F23

1
R1912
22D6R2F-L1-GP

N4
N5
N6
P6
M1
N2
M4
M3
N3
N1
P5
P3

USB_RBIAS_PN AG2
AG1

DMI0RXN
DMI0RXP
DMI0TXN
DMI0TXP

V27
V26
U29
U28

DMI_IRXN0_MTXN0
DMI_IRXP0_MTXP0
DMI_ITXN0_MRXN0
DMI_ITXP0_MRXP0

11
11
11
11

DMI1RXN
DMI1RXP
DMI1TXN
DMI1TXP

Y27
Y26
W 29
W 28

DMI_IRXN1_MTXN1
DMI_IRXP1_MTXP1
DMI_ITXN1_MRXN1
DMI_ITXP1_MRXP1

11
11
11
11

DMI2RXN
DMI2RXP
DMI2TXN
DMI2TXP

AB27
AB26
AA29
AA28

DMI_IRXN2_MTXN2
DMI_IRXP2_MTXP2
DMI_ITXN2_MRXN2
DMI_ITXP2_MRXP2

11
11
11
11

DMI3RXN
DMI3RXP
DMI3TXN
DMI3TXP

AD27
AD26
AC29
AC28

DMI_IRXN3_MTXN3
DMI_IRXP3_MTXP3
DMI_ITXN3_MRXN3
DMI_ITXP3_MRXP3

11
11
11
11

DMI_CLKN
DMI_CLKP

DMI_ZCOMP
DMI_IRCOMP

PERN6/GLAN_RXN
PERP6/GLAN_RXP
PETN6/GLAN_TXN
PETP6/GLAN_TXP

USBP0N
USBP0P
USBP1N
USBP1P
SPI_CLK
USBP2N
SPI_CS0#
USBP2P
SPI_CS1#/GPIO58/CLGPIO6 USBP3N
USBP3P
SPI_MOSI
USBP4N
SPI_MISO
USBP4P
USBP5N
OC0#/GPIO59
USBP5P
OC1#/GPIO40
USBP6N
OC2#/GPIO41
USBP6P
OC3#/GPIO42
USBP7N
OC4#/GPIO43
USBP7P
OC5#/GPIO29
USBP8N
OC6#/GPIO30
USBP8P
OC7#/GPIO31
USBP9N
OC8#/GPIO44
USBP9P
OC9#/GPIO45
USBP10N
OC10#/GPIO46
USBP10P
OC11#/GPIO47
USBP11N
USBP11P
USBRBIAS
USBRBIAS#

USB

T26
T25
AF29
AF28
AC5
AC4
AD3
AD2
AC1
AC2
AA5
AA4
AB2
AB3
AA1
AA2
W5
W4
Y3
Y2
W1
W2
V2
V3
U5
U4
U1
U2

DMI_IRCOMP_R

USB_PN5
USB_PP5

USB_PN8
USB_PP8
USB_PN9
USB_PP9
USB_PN10
USB_PP10

USB_PN0 46
USB_PP0 46
USB_PN1 46
USB_PP1 46
USB_PN2 51
USB_PP2 51
TP1908
TP1909
USB_PN4 43
USB_PP4 43
TP1912
TP1913
USB_PN6 45
USB_PP6 45
USB_PN7 50
USB_PP7 50
TP1910
TP1911
TP1914
TP1915
USB_PN10 50
USB_PP10 50
USB_PN11 47
USB_PP11 47

PCI

LPC(Default)

low = A16 swap override enable


high = default

+1.5V_RUN

USB
Pair
0

USB1

USB2

R1908
24D9R2F-L-GP

USB1
USB2
USB3
MINI CARD
BlUETOOTH
New Card

Device

USB3

RESERVED

MINI CARD

RESERVED

BLUETOOTH

NEW CARD

RESERVED

RESERVED

10

Card Reader

11

CAMERA
A

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Card Reader
CAMERA
Title

ICH9-PCI/PCIE/DMI/USB/GND(2/4)Rev

Size
Document Number
Custom

ICH9M-GP-NF

PCI_GNT#3

Date:
4

SPI

A16 swap override strap

CLK_PCIE_ICH# 7
CLK_PCIE_ICH 7

USB_PN2
USB_PP2
USB_PN3
USB_PP3

LAN

PERN1
PERP1
PETN1
PETP1

Mini
Card

N29
N28
P27
P26
43
43
43
43

ICH9M-GP-NF

RN1905

ICH9M-GP-NF

PCI-Express

H5
J23
J26
J27
AC22
K28
K29
L13
L15
L2
L26
L27
L5
L7
M12
M13
M14
M15
M16
M17
M23
M28
M29
N11
N12
N13
N14
N15
N16
N17
N18
N26
N27
P12
P13
P14
P15
P16
P17
P2
P23
P28
P29
P4
P7
R11
R12
R13
R14
R15
R16
R17
R18
R28
T12
T13
T14
T15
T16
T17
T23
B26
U12
U13
U14
U15
U16
U17
AD23
U26
U27
U3
V1
V13
V15
V23
V28
V29
V4
V5
W 26
W 27
W3
Y1
Y28
Y29
Y4
Y5
AG28
AH6
AF2
B25

Direct Media Interface

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

SPI

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

+3.3V_RUN

2 OF 6

SSID = ICH
AA26
AA27
AA3
AA6
AB1
AA23
AB28
AB29
AB4
AB5
AC17
AC26
AC27
AC3
AD1
AD10
AD12
AD13
AD14
AD17
AD18
AD21
AD28
AD29
AD4
AD5
AD6
AD7
AD9
AE12
AE13
AE14
AE16
AE17
AE2
AE20
AE24
AE3
AE4
AE6
AE9
AF13
AF16
AF18
AF22
AH26
AF26
AF27
AF5
AF7
AF9
AG13
AG16
AG18
AG20
AG23
AG3
AG6
AG9
AH12
AH14
AH17
AH19
AH2
AH22
AH25
AH28
AH5
AH8
AJ12
AJ14
AJ17
AJ8
B11
B14
B17
B2
B20
B23
B5
B8
C26
C27
E11
E14
E18
E2
E21
E24
E5
E8
F16
F28
F29
G12
G14
G18
G21
G24
G26
G27
G8
H2
H23
H28
H29

Monday, March 23, 2009

SB

Alba Discrete
Sheet
1

19

of

59

SSID = ICH

+3.3V_RUN
3 OF 6

1
2

ME_EC_DATA1
ME_EC_CLK1

TP2011
8,43 ITP_DBRESET#

SUS_STAT#
ITP_DBRESET#

R4
G19

SUS_STAT#/LPCPD#
SYS_RESET#

M6

11 PM_SYNC#
RN2002

4
3

SRN10KJ-5-GP

SMB_ALERT#

TP2009

A17

H_STP_PCI#
H_STP_CPU#

7 H_STP_PCI#
7 H_STP_CPU#

A14
E19
L4

26 PM_CLKRUN#
R2024 1

2 10KR2J-3-GP

PCIE_WAKE#

1
2
3
4

PM_BATLOW#_R
SMB_ALERT#

RN2004

8
7
6
5

DY

2 0R2J-2-GP

2 10KR2J-3-GP

26 ECSWI#
26 ECSMI#
TP2005
TP2018
TP2019
TP2003
TP2010
TP2001
TP2008
TP2013
7 CLKSATAREQ#

ECSMI#

+3.3V_RUN

DY

H_STP_CPU#
H_STP_PCI#

1
2

TP2017
TP2002

D21

VRMPW RGD

ICH_TP7

A20

SST

iTPM_EN

SRN10KJ-5-GP
R2005 1
R2007 1
R2008 2
R2013 2
R2015 1
R2006 2

2
2
1
1
2
1

8K2R2J-3-GP
8K2R2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP

PM_CLKRUN#
INT_SERIRQ
GPIO18
ECSCI#
ECSWI#
CLKSATAREQ#

22 SB_SPKR
11 MCH_ICH_SYNC#
TP2014

W AKE#
SERIRQ
THRM#

VGATE_PWRGD

CLK_SEL0
CLK_SEL1
GPIO48

RN2006

4
3

E20
M5
AJ23

ECSCI#
PLTRST_DELAY#_SB
ECSWI#
ECSMI#
GPIO12
GPIO13
GPIO17
GPIO18
GPIO20
GPIO22
GPIO27
GPIO28

26 ECSCI#

SRN8K2J-4-GP
R2022 1

26,34 VGATE_PWRGD
R2009 1

ICH_RI#

PCIE_WAKE#
INT_SERIRQ

25,50 PCIE_WAKE#
26 INT_SERIRQ
28 THERM_SCI#

ICH_TP3

P1

ICH_SUSCLK

C16
E16
G17

SB_SLP_S3#
PM_SLP_S5#

PM_SLP_S4# 26,38,50
TP2012

S4_STATE#/GPIO26

C10

GPIO26

TP2006

PW ROK

G20

PM_PWROK

SMBALERT#/GPIO11

CLKRUN#

AG19
AH21
AG21
A21
C12
C21
AE18
K1
AF8
AJ22
A9
D19
L1
AE19
AG22
AF21
AH24
A8

TACH1/GPIO1
TACH2/GPIO6
TACH3/GPIO7
GPIO8
LAN_PHY_PW R_CTRL/GPIO12
ENERGY_DETECT/GPIO13
TACH0/GPIO17
GPIO18
GPIO20
SCLOCK/GPIO22
GPIO27
GPIO28
SATACLKREQ#/GPIO35
SLOAD/GPIO38
SDATAOUT0/GPIO39
SDATAOUT1/GPIO48
GPIO49
GPIO57/CLGPIO5

M7
AJ24
B21
AH20
AJ20
AJ21

SPKR
MCH_SYNC#
TP3
PW M0
PW M1
PW M2

SUSCLK
SLP_S3#
SLP_S4#
SLP_S5#

PMSYNC#/GPIO0

STP_PCI#
STP_CPU#

SRN10KJ-6-GP

7
7

DPRSLPVR/GPIO16

M2

BATLOW #

B13

ICH_SUSCLK

28
PM_PWROK
DPRSLPVR
LAN_RST#1
RSMRST#_KBC

R2018 1
R2004 1
R2011 1
R2020 1

DY

2
2
2
2

10KR2J-3-GP
100KR2J-1-GP
0R2J-2-GP
10KR2J-3-GP

DPRSLPVR 11,34
PM_BATLOW#_R

PW RBTN#

R3

LAN_RST#

D20

RSMRST#

D22

RSMRST#_KBC 26

CK_PW RGD

R5

CK_PWRGD 7

CLPW ROK

PM_PWRBTN# 26
LAN_RST#1
R2017

R6

M_PWROK

SLP_M#

B16

PM_SLP_M#

CL_CLK0
CL_CLK1

F24
B19

CL_DATA0
CL_DATA1

F22
C19

CL_VREF0
CL_VREF1

C25
A19

CL_RST0#
CL_RST1#

F21
D18

GPIO24/MEM_LED
GPIO10/SUS_PW R_ACK
GPIO14/AC_PRESENT
GPIO9/W OL_EN

A16
C18
C11
C20

M_PWROK

PM_PWROK 11,26,28

0R2J-2-GP

M_PWROK 11
TP2007

+3.3V_RUN

CL_CLK0 11
CL_DATA0 11

R2023
3K24R2F-GP

CL_VREF0_ICH

CL_RST#0 11
GPIO24
GPIO10
GPIO14

LINKALERT#

1
2
3
4

2 10KR2J-3-GP

CLK_14M_ICH
CLK_48M_ICH

TP2004
TP2015
TP2016

R2012 1

H1
AF3

8
7
6
5

R2021
453R2F-1-GP

CLK14
CLK48

SATA0GP
SATA2GP
SATA3GP
SATA1GP

RI#

SATA0GP
SATA1GP
SATA2GP
SATA3GP

F19

AH23
AF19
AE21
AD20

ICH_RI#

SRN2K2J-1-GP

SATA0GP/GPIO21
SATA1GP/GPIO19
SATA4GP/GPIO36
SATA5GP/GPIO37

C2001
SCD1U10V2KX-4GP

SMBCLK
SMBDATA
LINKALERT#/GPIO60/CLGPIO4
SMLINK0
SMLINK1

SATA
GPIO

SMB_DATA
SMB_CLK

1
2

G16
A13
E17
C17
B18

Clocks

RN2003

4
3

LINKALERT#
ME_EC_CLK1
ME_EC_DATA1

SYS GPIO
Power MGT

50 SMB_CLK
50 SMB_DATA

MISC
GPIO
Controller Link

+3.3V_ALW

RN2001

SMB

U1801C

ICH9M-GP-NF

iTPM Select(Not Strap Pin)

R2001
10KR2J-3-GP

2
1

0 = Disable

R2003
10KR2J-3-GP

DY DY
2

1 = Enable

R2030

R2016
10KR2J-3-GP

PLTRST_DELAY#_SB

Disable
Seligo
Realtek
ICS

DY

PLTRST_DELAY#

PLTRST_DELAY#

26,53

0R2J-2-GP

CLK Gen select

CLK_SEL0
CLK_SEL1

R2019
100KR2J-1-GP

R2014
10KR2J-3-GP

iTPM_EN

iTPM_EN

DY DY

iTPM Select(Not Strap Pin)

+3.3V_RUN

CLK_SEL0

CLL_SEL1

X
1
1
0

X
1
0
1

+3.3V_ALW

U2001
SB_SLP_S3#

VCC

DY

PM_SLP_S3#

PM_SLP_S3# 26,28,30,36,37,38,39,50

GND
74LVC1G08GW-1-GP

+3.3V_RUN

R2010 2

1 0R2J-2-GP

RN2005

4
3

1
2
SRN2K2J-1-GP

7,16,17,43 ICH_SMBDATA

SMB_CLK

Wistron Corporation

SMB_DATA

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.
ICH_SMBCLK

7,16,17,43

Title

ICH9-GPIO/PM/CL(3/4)

2N7002SPT

Size
Document Number
Custom
Date:

<Core Design>

U2002

Monday, March 23, 2009

Rev

SB

Alba Discrete
Sheet
1

20

of

59

+RTC_CELL

VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3

A18
D16
D17
E22

VCCSUS3_3

AF1

AC9

VCC1_5_A

T1
T2
T3
T4
T5
T6
U6
U7
V6
V7
W6
W7
Y6
Y7
T7

1
2

C2145
SC1U10V2KX-1GP

C2140
SCD1U10V2KX-4GP

C2117
SC10U6D3V5MX-3GP

DY

1
2

1
2

C2108
SC4D7U6D3V3KX-GP

1
2

C2152
SCD1U10V2KX-4GP

+3.3V_ALW
R2111
SB_VCCSUS3_3

0R3-0-U-GP

DY
2

DY

C2121
SCD1U10V2KX-4GP

C2127
SCD1U10V2KX-4GP

+3.3V_ALW
R2118

ICH9_SUS3_3

VCCSUS1_5[3]

VCCSUS1_05[3]

VCCLAN3_3 78mA
VCCLAN3_3

C2138
SCD022U16V2KX-3GP

VCCLAN1_05
VCCLAN1_05

A12
B12

A10
A11

VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A

C2139
SCD1U16V2KX-3GP

VCCUSBPLL 11mA

AJ5
AA7
AB6
AB7
AC6
AC7

0R3-0-U-GP

VCCGLAN1_5
VCCGLAN1_5
VCCGLAN1_5
VCCGLAN1_5

A26

VCCGLAN3_3 1mA

+3.3V_RUN
R2120
SB_VCCCL3_3

DY

0R3-0-U-GP

VCCGLANPLL 23mA

C2151
SCD1U10V2KX-4GP

A27
D28
D29
E26
E27

<Core Design>

ICH9M-GP-NF
4

C2130
SCD1U10V2KX-4GP

1
2
1

+1.5V_RUN

0R3-0-U-GP

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

ICH9-POWER(4/4)

Size
Document Number
Custom
Date:

+3.3V_ALW

0R2J-2-GP

C2129
SCD1U10V2KX-4GP

C2115
SC4D7U6D3V3KX-GP

C2114
SC10U6D3V5MX-3GP

C2136
SCD1U10V2KX-4GP

1
2

TP2101
TP2102
R2101
1

DY

0R3-0-U-GP

R2107

1
1

+3.3V_RUN

C2125
SCD1U10V2KX-4GP

A24
B24

SB_V_CPU_IO

VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A

VCCCL3_3
VCCCL3_3

+1.05V_VCCP
R2114

AC11
AD11
AE11
AF11
AG10
AG11
AH10
AJ10

G23

0R3-0-U-GP

C2153
SCD1U10V2KX-4GP

VCCSUS1_5[2]

C2147
C2107
SCD1U10V2KX-4GP SCD1U10V2KX-4GP

VCCSUS1_5[1]

F18

G22

1
1

AD8

VCCSUS1_5

VCCCL1_5

C2116
SCD01U16V2KX-3GP

VCCSUS1_5

C2146
C2131
SCD1U10V2KX-4GP SCD1U10V2KX-4GP

VCCSUS1_05[1]
VCCSUS1_05[2]

VCCCL1_05

2
1
2

AC8
F17

VCC1_5_A
VCC1_5_A
VCC1_5_A

C2144
SC1U6D3V2KX-GP

1
2

C2142
SC1U6D3V2KX-GP

C2143
SCD1U10V2KX-4GP

VCCSUS1_05
VCCSUS1_05

VCC1_5_A
VCC1_5_A

C2128
SCD1U10V2KX-4GP
2
1

1634mA
CORE

VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A

AC12
AC13
AC14

+3.3V_RUN

AC16
AD15
AD16
AE15
AF15
AG15
AH15
AJ15

G10
G9

+1.05V_VCCP

C2148
SCD1U10V2KX-4GP

C2119
SCD1U10V2KX-4GP

1
2

DY

VCCSATAPLL47mA 11mA VCCSUSHDA

AJ3

80mA

C2118
SC4D7U6D3V3KX-GP

+3.3V_RUN
C2105
SCD1U10V2KX-4GP

AJ4

GLAN POWER

VCC_GLAN_PLL

B9
F9
G3
G6
J2
J7
K7

VCC1_5_A

1
COIL-1UH-31-GP

+1.5V_RUN

VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3

SB_VCCLAN3_3

AD19
AF20
AG24
AC20

VCC1_5_A
VCC1_5_A

+1.5V_RUN

C2150
SC1U10V3KX-3GP

DY

VCC3_3
VCC3_3
VCC3_3
VCC3_3

C2154
SCD1U10V2KX-4GP

VCC3_3

AC10

C2141
SCD1U10V2KX-4GP

1
2

1
2

VCCLAN1D05

AJ6

AC21

0R3-0-U-GP

+3.3V_RUN

11mA VCCHDA

USB CORE

DY

C2133
SCD1U10V2KX-4GP

0R3-0-U-GP

C2134
SCD1U10V2KX-4GP

1D5V_USB_S0

2
C2106
SCD1U10V2KX-4GP

VCC3_3

SB_V_CPU_IO

C2104
SC1U6D3V2KX-GP

R2105

VCC3_3

AG29

C2113
SC2D2U10V3KX-1GP

1
1
2

1
2
C2126
SC10U6D3V5MX-3GP

1
2

+1.5V_RUN

AB23
AC23

AC18
AC19

R2116

R2117
VCCDMI

V_CPU_IO

VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3

0R3-0-U-GP

L2102

2mA V_CPU_IO

1342mA

VCC_GLAN_PLL
C2122
SC2D2U10V3KX-1GP

0R3-0-U-GP

DY

1D5V_DMIPLL_ICH_S0
1D5V_DMIPLL_ICH_S0

AJ19

ATX

R2121

C2132
SC1U6D3V2KX-GP

+1.5V_RUN

+1.5V_RUN

1
2
1
2

C2120
SCD1U10V2KX-4GP

1
2

DY

VCCDMI

ARX

0R3-0-U-GP

SB_VCCLAN3_3

C2124
SCD1U10V2KX-4GP

C2101
SC10U6D3V5MX-3GP

L2101
1
2
L-10UH-11-GP

R2110

C2103
SC1U10V3KX-3GP

+3.3V_RUN

+VCCSATAPLL

+1.5V_RUN

C2111
SC10U6D3V5MX-3GP

1
2

C2112
SC10U6D3V5MX-3GP

TC2101
ST220U2D5VBM-LGP

DY
2

DY
2

DY

C2149
SCD1U10V2KX-4GP

0R5J-5-GP
C

C2137
SCD1U10V2KX-4GP

50mA VCCDMI

W 23
Y23

VCCA3GP

R2109

R29

DY

+1.5V_PCIE_ICH

23mA VCCDMIPLL

308mA

+1.5V_RUN

646mA

C2110
SCD1U16V2KX-3GP

C2123
SC1U6D3V2KX-GP

VCCP_CORE

V5REF_S5

VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B

PCI

R2108
10R2J-2-GP

V5REF_SUS 2mA

VCCPSUS

D2101
SDMK0340L-7-F-GP

+5V_ALW

R2112
10R2J-2-GP

D2102
SDMK0340L-7-F-GP
V5REF_S0

+3.3V_ALW

+5V_RUN

AE1
AA24
AA25
AB24
AB25
AC24
AC25
AD24
AD25
AE25
AE26
AE27
AE28
AE29
F25
G25
H24
H25
J24
J25
K24
K25
L23
L24
L25
M24
M25
N23
N24
N25
P24
P25
R24
R25
R26
R27
T24
T27
T28
T29
U24
U25
V24
V25
U23
W 24
W 25
K23
Y24
Y25

V5REF 2mA

212mA

V5REF_S5

A6

A15
B15
C15
D15
E15
F15
L11
L12
L14
L16
L17
L18
M11
M18
P11
P18
T11
T18
U11
U18
V11
V12
V14
V16
V17
V18

VCCPUSB

V5REF_S0

R2115
SB_VCC1_05

VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05

VCCRTC

73mA

C2156
SCD1U10V2KX-4GP

1
2

C2155
SCD1U10V2KX-4GP

A23

*Within a given well, 5VREF needs to


be up before the corresponding 3.3V rail
+3.3V_RUN

+1.05V_VCCP

U1801F

SSID = ICH

6 OF 6

C2102
SCD1U10V2KX-4GP

Monday, March 23, 2009

Rev

SB

Alba Discrete
Sheet
1

21

of

59

SSID = AUDIO
+AVDD
+5V_RUN
+3.3V_RUN

R2201 1

18 ICH_SDIN_CODEC

1
R2208
10KR2J-3-GP

HDA_SDI

HDA_SDO

10

HDA_SYNC

11

HP0_PORT_A_L
HP0_PORT_A_R
VREFOUT_A_OR_F

28
29
23

AUD_EXT_MIC_L
AUD_EXT_MIC_R
AUD_VREFOUT_B

HP1_PORT_B_L
HP1_PORT_B_R

31
32

AUD_HP1_JACK_L_C
AUD_HP1_JACK_R_C

PORT_C_L
PORT_C_R
VREFOUT_C

19
20
24

SPKR_PORT_D_L+
SPKR_PORT_D_L-

40
41

AUD_SPK_L+
AUD_SPK_L-

SPKR_PORT_D_RSPKR_PORT_D_R+

43
44

AUD_SPK_RAUD_SPK_R+

PORT_E_L
PORT_E_R

15
16

PORT_F_L
PORT_F_R

17
18

PC_BEEP

12

MONO_OUT

25

48

SPDIF_OUT_0

47

EAPD

35

CAP-

36

CAP+

DVSS

33
30
26

AVSS
AVSS
AVSS

CAP2

22

VREFFILT

21

AUD_VREFFLT

42

PVSS

V-

34

AUD_V_B

49

GND

VREG

37

AUD_VREG

X02 20090226

C2217
SC1U10V3KX-3GP

1
2

C2214 1

2 60D4R2F-GP
2 60D4R2F-GP

1
1

R2202 1

AUD_HP1_JACK_L
AUD_HP1_JACK_R

X02 20090226

SC1U10V3KX-3GP

50

AUD_HP1_JACK_L
AUD_HP1_JACK_R
INT_MIC_L_R

44

C2209
2
1 SCD1U10V2KX-4GP

AUD_SPK_R- 44
AUD_SPK_R+ 44

1 SCD1U10V2KX-4GP

2
C2212
R2205
DUMMY-C2

SB_SPKR_R

R2203
120KR2F-L-GP
1
2

KBC_BEEP_R 1
2
R2206
499KR2F-1-GP

AUD_HP1_JACK_R

DY

AUD_AGND

AUD_AGND

P8503BMG-GP
Q2204

S
G

AUD_AGND

+15V_ALW

P8503BMG-GP
Q2202
R2219
100KR2J-1-GP

AUD_AGND

Close to codec

EC2201
SC22P50V2JN-4GP

AUD_DMIC_CLK

Q2201
P8503BMG-GP

47 AUD_DMIC_CLK_G

AUD_AGND

R2207
2 33R2J-2-GP

92HD81B1X5NLGXYAX8-GP

DY

0R2J-2-GP
R2210

C2220
SC1U6D3V2KX-GP

74LVC1G125DC-GP

1
2
3

OE#
A
GND

DY

C2202
SC10U6D3V5MX-3GP

VCC

C2201
SC10U6D3V5MX-3GP

From EC

AUD_HP1_JACK_L

Q2203
P8503BMG-GP

AUD_CAP2

AUD_DMIC_CLK_Y

SB_SPKR 20
KBC_BEEP 26

AUD_PC_BEEP
Trace width>15 mils

U2202

From SB

X02 20090226

AUD_PC_BEEP

C2205
SC4D7U6D3V3KX-GP

+3.3V_RUN

50
50

X02 20090309

2 4K7R2J-2-GP

AUD_SPK_L+ 44
AUD_SPK_L- 44

PUMP_CAPP

0R5J-5-GP

AUD_VREFOUT_B
R2218
R2220

PUMP_CAPN
C2204
SC2D2U25V5KX-1GP

L2203
1

AUD_EXT_MIC_L 50
AUD_EXT_MIC_R 50

AMP_MUTE#

0R5J-5-GP

AUD_AGND

AUD_INT_MIC_R_L
AUD_VREFOUT_C

AUD_SENSE_A
AUD_SENSE_B

13
14

DMIC1/GPIO0/SPDIF_OUT_1

26 AMP_MUTE#

SENSE_A
SENSE_B

46
AMP_MUTE#

39
45

DMIC_CLK/GPIO1
DMIC0/GPIO2

PVDD
PVDD

AUD_AGND

2
4

HDA_RST#

27
38

L2202
1
C2203
SC10U6D3V5MX-3GP

ICH_SDIN_CODEC_C0

AVDD
AVDD

+5V_RUN
+PVDD

C2218
SC1U10V3KX-3GP

HDA_BITCLK

2
C

C2215
SCD1U10V2KX-4GP

1
DVDD_IO

AUD_DMIC_CLK
AUD_DMIC_IN0

47 AUD_DMIC_IN0

DVDD

ICH_AZ_CODEC_RST#

18 ICH_AZ_CODEC_RST#

+3.3V_RUN

DVDD_CORE

ICH_AZ_CODEC_BITCLK

ICH_AZ_CODEC_SYNC

18 ICH_AZ_CODEC_SYNC

ICH_SDOUT_CODEC

18 ICH_SDOUT_CODEC

1
2 33R2J-2-GP

U2201

0R5J-5-GP

DY

18 ICH_AZ_CODEC_BITCLK

C2210
SC4D7P50V2CN-1GP

C2213
SC10U6D3V5MX-3GP

1
2

ICH_AZ_CODEC_BITCLK

AUD_DVDDCORE

C2211
SCD1U10V2KX-4GP

C2208
SC1U6D3V2KX-GP

2
1

C2207
SCD1U10V2KX-4GP

Close to codec
D

L2201
1

Close to codec

C2219
SCD1U10V2KX-4GP

+3.3V_RUN

HP_CODEC_MUTE

Azalia I/F EMI

R2212

ICH_SDOUT_CODEC

AMP_MUTE#

R2209
20KR2F-L-GP
1
2

0R3-0-U-GP
AUD_HP1_JD#

50

R2214

0R3-0-U-GP

2
C2206
SCD1U10V2KX-4GP

R2217
39K2R2F-L-GP
1

R2211
20KR2F-L-GP

AUD_AGND
A

<Core Design>
EXT_MIC_JD# 50

C2221
SC1000P50V3JN-GP-U

R2216
2K49R2F-GP

AUD_SENSE_B

1
2

DY

R2213

+AVDD

R2215
2K49R2F-GP

AUD_SENSE_A

0R3-0-U-GP

+AVDD

ICH_AZ_CODEC_SDOUT1

R2204
47R2J-2-GP

DY

Q2205
2N7002-7F-GP

Wistron Corporation

AUD_AGND
AUD_AGND

Close to Pin13

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.

Close to Pin14
Title

AUDIO CODEC 92HD81

Size
Document Number
Custom
Date:
5

Monday, March 23, 2009

Rev

SB

Alba Discrete
Sheet
1

22

of

59

(Blank)

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size
Document Number
Custom
Date:
5

Monday, March 23, 2009

(Reserve)

Rev

SB

Alba Discrete
Sheet
1

23

of

59

(Blank)

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size
Document Number
Custom
Date:
5

Monday, March 23, 2009

(Reserve)

Rev

SB

Alba Discrete
Sheet
1

24

of

59

SSID = LOM
1

+DVDD12

+DVDD12

C2522

LAN_TX/RX#
RSET
2
2K49R2F-GP

+3.3V_LAN
MDI0+
MDI0-

42 MDI1+
42 MDI1-

MDI1+
MDI1-

Use single trace


feedback to PIN.4.

+DVDD12

48
47
46
45
44
43
42
41
40
39
38
37

AVDD33
MDIP0
MDIN0
NC#4
MDIP1
MDIN1
GND
NC#8
NC#9
DVDD12
NC#11
NC#12

DVDD12
LED1/EESK
LED2/EEDI/AUX
LED3/EEDO
EECS
GND
DVDD12
VDD33
ISOLATE#
PERST#
LANWAKE#
CLKREQ#

R2508
0R2J-2-GP
1
2
1
2

+DVDD12
LED1/EESK
LED2/EEDI
LED3/EEDO
EECS

36
35
34
33
32
31
30
29
28
27
26
25

2 SCD1U10V2KX-4GP

C2509 1

2 SCD1U10V2KX-4GP

+3.3V_LAN
LAN_LINK100#
LAN_LINK10#

LAN_LINK100# 42
LAN_LINK10# 42

R2509
0R2J-2-GP

+DVDD12
+3.3V_LAN
LAN_ISOLATE#

1
R2505
1
R2504

1KR2J-1-GP

C2507

2 SCD1U10V2KX-4GP

C2515

2 SCD1U10V2KX-4GP

C2514

2 SCD1U10V2KX-4GP

+3.3V_RUN
C

15KR2J-1-GP

PLT_RST# 11,19,26,43,50
PCIE_WAKE# 20,50
LAN_CLKREQ#

RTL8103EL-GR-GP

13
14
15
16
17
18
19
20
21
22
23
24

1
2
3
4
5
6
7
8
9
10
11
12

C2506 1

1
C2523

LANX1
LANX2

DY2SCD1U10V2KX-4GP

R2501
2

DY

+DVDD12

10MR2J-L-GP
X2501
LANX2 1
1

X01 20081208
C2501
SC18P50V2JN-1-GP
PCIE_IRXN3_RTXN3_LAN
PCIE_IRXP3_RTXP3_LAN

C2512
C2513

C2518 1
C2520 1

2
SC1U6D3V2KX-GP
2
SC1U6D3V2KX-GP

2 SCD1U10V2KX-4GP
2 SCD1U10V2KX-4GP

LANX1

XTAL-25MHZ-102-GP

X01 20081218
1

42 MDI0+
42 MDI0-

VCTRL12A
GND
RSET
VCTRL12D
NC#44
NC#43
CKXTAL2
CKXTAL1
NC#40
NC#39
LED0
VDD33

Lay out close to Pin48.

2 SCD1U10V2KX-4GP

Place close to
PIN 10, 13, 30, 36

DVDD12
GND
HSIP
HSIN
REFCLK_P
REFCLK_M
VDDTX
HSOP
HSON
GNDTX
NC#23
NC#24

U2501

C2511
SCD1U10V2KX-4GP

CTRL12A

2 SCD1U10V2KX-4GP

C2504 1

C2502
SC15P50V2JN-2-GP

1
R2507

C2503 1

LAN_TX/RX# 42

+3.3V_LAN

LANX2
LANX1

+DVDD12
SCD1U10V2KX-4GP

PCIE_IRXN3_RTXN3 19
PCIE_IRXP3_RTXP3 19

Lay out close to Pin19.

1
R2506

2
1KR2J-1-GP

X01 20081126

U2502
EECS
LED1/EESK
LED2/EEDI
LED3/EEDO

1
2
3
4

CS
SK
DI
DO

DY

VCC
DC
ORG
GND

8
7
6
5

+3.3V_LAN

DY

C2521
SCD1U10V2KX-4GP

PCIE_ITXN3_LRXN3 19
PCIE_ITXP3_LRXP3 19

CLK_PCIE_LAN# 7
CLK_PCIE_LAN 7

+3.3V_LAN
AT93C46DN-SH-B-GP
1
R2502

DY

2
0R3-0-U-GP

+3.3V_ALW
Q2501

Max current: 333mA

26 PM_LAN_ENABLE

C2516
SC10U6D3V5MX-3GP

C2510
SC4D7U6D3V5KX-3GP

C2517
SC4D7U6D3V5KX-3GP

C2505
SCD1U10V2KX-4GP

DY

C2508
SCD1U10V2KX-4GP

1
Q2502
2N7002-7F-GP
G

AO3403-GP

2.2A
Rds= 260m ohm
C2524
SCD1U10V2KX-4GP

R2503
10KR2J-3-GP

C2519
SCD1U10V2KX-4GP

+3.3V_LAN

2
R2510
3K6R2F-GP

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

LAN Realtek-RTL8103EL

Size
Document Number
Custom

Date: Monday, March 23, 2009


5

Rev

SB

Alba Discrete
Sheet

25
1

of

59

47 CAMERA_DET#

20,28,30,36,37,38,39,50
51
32
51
20,34

47 EC_SPI_WP#_R
30,36,37,38,39 RUNPWROK
47 PWRLED

PM_SLP_S3#
KBC_PWRBTN#
AC_IN#
LID_CLOSE#
VGATE_PWRGD

R2636
1

X02 20090226

1
R2635
R2614 1
TP2603

41 BLON_OUT
34 CPUCORE_ON

R2615

BIOS_ID

2 0R2J-2-GP

TP2604

30 3.3V_DELAY_EN_KBC
31 AD_OFF
20 RSMRST#_KBC
20,38,50 PM_SLP_S4#
20,53 PLTRST_DELAY#
33 3V_5V_POK
11,20,28 PM_PWROK
31 PSID_DISABLE#

LID_CLOSE#

1
1

RUNPWROK_G31

HP_MUTE
3.3V_DELAY_EN_KBC
AD_OFF
RSMRST#_KBC
PM_SLP_S4#
2 PLTRST_DELAY#_EC
0R2J-2-GP
PM_PWROK_R
2
0R2J-2-GP
HDD_5V_EN
BLON_OUT
CPUCORE_ON_R
2
0R2J-2-GP
ECSMI#_KBC

39 GFX_CORE_EN
37 1.1V_RUN_EN
46,51 USB_PWR_EN#

101
105
106
107

64
95
93
94
119
6
109
120
65
66
16
17
20
21
22
23
24
25
26
27
28
73
74
75
110

GPI94
GPI95
GPI96
GPI97

80

102

GPIO41

VDD

D/A

GPIO01/TB2
GPIO03
GPIO06
GPIO07
GPIO23
GPIO24
GPIO30
GPIO31
GPIO32/D_PW M
GPIO33/H_PW M
GPIO40/F_PW M
GPIO42/TCK
GPIO43/TMS
GPIO44/TDI
GPIO45/E_PW M
GPIO46/TRST#
GPIO47
GPIO50/TDO
GPIO51
GPIO52/RDY#
GPIO53
GPIO70
GPIO71
GPIO72
GPO82/TRIS#

124
7
2
3
126
127
128
1
125
8
122
121
29
9
123

ADAPT_TRIP_SEL
PLT_RST1#_1

ADAPT_TRIP_SEL

68
67
69
70

GPIO66/G_PW M

81

GPIO77
GPIO76/SHBM
GPIO75
GPIO81

SPI

LPC_LAD[0..3]

18

DY

R2616
2K2R2J-2-GP

INT_SERIRQ 20
PM_CLKRUN# 20
KBRCIN# 18
KA20GATE 18

ECSCI#_KBC

PANEL_BKEN 54

ECSWI#_KBC

8,11,18,30,54

1
10KR2J-3-GP

1D8V_VRAM_ON

R2605

114
14
15

C KBC_THERMTRIP#

VCORF

44

SER/IR

KBC_SCL1
KBC_SDA1

4
3

BAT_SDA
BAT_SCL

4
3

ECSWI#_KBC

X02 20090309

20 ECSCI#

BAS16-1-GP
2

ECSCI#_KBC

D2602
BAS16-1-GP

PM_LAN_ENABLE 25
TSATN#_KBC 11
S5_ENABLE 30

LCD_CBL_DET#
1
R2627
KB_DET#
1
R2625
CAMERA_DET#
1
R2623
KBC_THERMTRIP# 1
R2624

1
10KR2J-3-GP
R2603

10KR2J-3-GP
R2602

R2608
10KR2J-3-GP

SA
SB
SC
-1

0
0
0
0

0
0
1
1

S5_ENABLE
R2626

KCOL0
R2622

DY

CPUCORE_ON

R2611

R2628
0R2J-2-GP

DY

32KX1/32KCLKIN

100KR2J-1-GP

DY

2
2

10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP

KBC_XO
AMP_MUTE#

79
30

32KX2
GPIO55/CLKOUT

63
117
31
32
118
62

GPIO14/TB1
GPIO20/TA2
GPIO56/TA1
GPIO15/A_PW M
GPIO21/B_PW M
GPIO13/C_PW M

13
12
11
10
71
72

GPIO12/PSDAT3
GPIO25/PSCLK3
GPIO27/PSDAT2
GPIO26/PSCLK2
GPIO35/PSDAT1
GPIO37/PSCLK1

LCD_TST_EN

53
52
51
50
49
48
47
43
42
41
40
39
38
37
36
35
34
33

KCOL0
KCOL1
KCOL2
KCOL3
KCOL4
KCOL5
KCOL6
KCOL7
KCOL8
KCOL9
KCOL10
KCOL11
KCOL12
KCOL13
KCOL14
KCOL15
KCOL16
KCOL17

KBSIN0
KBSIN1
KBSIN2
KBSIN3
KBSIN4
KBSIN5
KBSIN6
KBSIN7

54
55
56
57
58
59
60
61

KROW0
KROW1
KROW2
KROW3
KROW4
KROW5
KROW6
KROW7

VCC_POR#

85

ECRST#

KBC

C2601
SC470P50V2KX-3GP

47
47
47
47

EC_SPI_DI
EC_SPI_DO
EC_SPI_CS#
EC_SPI_CLK

EC_SPI_DI
EC_SPI_DO
EC_SPI_CS#
EC_SPI_CLK

R2619 1

2 0R2J-2-GP

86
87
90
EC_SPI_CLK_C 92

F_SDI
F_SDO
F_CS0#
F_SCK

TP2601

KROW[0..7]

PS/2

FIU

KBC_XI

45

45

WPCE773LA0DG-GP
ECRST#

C2608
1

SC15P50V3JN-GP

R2621
X3_1 1

33KR3-GP

X02 20090224

KBC_XO

R2617
0R2J-2-GP

Wistron Corporation

1
ECRST#_C

10KR2J-3-GP
R2618
2
2

1
1

2
4

28,30 PURE_HW_SHUTDOWN#

DY C2610
SC4D7P50V2CN-1GP

<Core Design>

+3.3V_RTC_LDO

Q2602
CH3906PT-GP

X2601
X-32D768KHZ-38GPU

R2620
20MR3-GP

2
1

R2607
4K7R2J-2-GP

100KR2J-1-GP

SC15P50V3JN-GP

PCLK_KBC_RC

E51_TxD

KBSOUT0/JENK#
KBSOUT1/TCK
KBSOUT2/TMS
KBSOUT3/TDI
KBSOUT4/JEN0#
KBSOUT5/TDO
KBSOUT6/RDY#
KBSOUT7
KBSOUT8
KBSOUT9
KBSOUT10
KBSOUT11
KBSOUT12/GPIO64
KBSOUT13/GPIO63
KBSOUT14/GPIO62
KBSOUT15/GPIO61/XOR_OUT
GPIO60/KBSOUT16
GPIO57/KBSOUT17

X01 20081215

X02 20090224

C2607
2
1

100KR2J-1-GP

2 OF 2

DY

PLT_RST# 11,19,25,43,50

0R2J-2-GP

1
2

KBC CLK
PCLK_KBC
EMI

77

KB_DET#
LCD_CBL_DET#
THERMTRIP_VGA_GATE_K
0R2J-2-GP
LCD_TST_R
1
45 TPDATA
45 TPCLK

45 KB_DET#
R2639
41 LCD_CBL_DET#
2
1 0R2J-2-GP
R2638 2
41 LCD_TST

54 THERMTRIP_VGA_GATE

KBC_XI

22 KBC_BEEP
47 BATLOW_LED
41 BRIGHTNESS

X01 20081215
X01 20081216

0R2J-2-GP

100KR2J-1-GP

1
2

AGND
103
2

31 PS_ID_EC
20 PM_PWRBTN#

R2612

PLT_RST1#_1

ALBA X00

22 AMP_MUTE#

41 LCD_TST_EN

C
100KR2J-1-GP

KCOL[0..16]
C2605
SC1U10V3KX-3GP

R2629
0R2J-2-GP

RUNPWROK

100KR2J-1-GP

ECSMI#_KBC

U2601B

WPCE773LA0DG-GP

VER0

0
1
0
1

DY

KBC_VCORF

PCB_VER0
PCB_VER1
PCB_VER2

MB VERSION
ID VER2 VER1

116
89
78
45
18
5

GND
GND
GND
GND
GND
GND
2

DY
2

1
2

10KR2J-3-GP
R2604

10KR2J-3-GP
R2601

R2609
B10KR2J-3-GP
DY DY

MB VERSION
ID

DY

THERMTRIP_VGA_GATE 1
R2637

20 ECSMI#

R2632

+3.3V_RUN

SRN4K7J-8-GP
RN2601
1
2

KBC_PWRBTN#
1
R2633

KBC_GPIO76

X02 20090226

1
2

SRN4K7J-8-GP

BAS16-1-GP
2

E51_TxD 43
E51_RxD 43

TSATN#_KBC

10KR2J-3-GP

RN2602

ALBA X00

GPIO16
GPIO34
GPIO36

D2603

WIFI_RF_EN 43
PWR_BTN_LED# 47

E51_TxD
E51_RxD

DY

+3.3V_RTC_LDO

SCD1U16V2KX-3GP

20 ECSWI#

BLUETOOTH_EN 45

KBC_GPIO76

Q2601
CH3904PT-GP

1D8V_VRAM_ON 30

PWR_BTN_LED#

111
113
112

+3.3V_RUN

C2604
2
1

H_THRMTRIP#

BAT_SDA 31,32
BAT_SCL 31,32

GPO83/SOUT_CR/BADDR1
GPIO87/SIN_CR
GPO84/BADDR0

E51_RxD

KBC_SDA1
KBC_SCL1

84
83
82
91

THERM_SCL 28

0R2J-2-GP

+1.05V_VCCP

PCLK_KBC 7
LPC_LFRAME# 18

LPC_LAD0
LPC_LAD1
LPC_LAD2
LPC_LAD3

R2631 1

X02 20090226

32

D2601

GPIO

KBC_SDA1

2N7002SPT

2
R2613

GPIO74/SDA2
GPIO73/SCL2
GPIO22/SDA1
GPIO17/SCL1

SMB

SP

PCB_VER0
PCB_VER1
PCB_VER2

Pull High : Discrete


internal Pull Low for UMA

R2634
2K2R2J-2-GP

LPC

ALBA X00

54 THERMTRIP_VGA#

DISCRETE_ID
KBC_THERMTRIP#

+3.3V_RTC_LDO

R2610

10KR2J-3-GP
2

A/D

GPI90/AD0
GPI91/AD1
GPI92/AD2
GPI93/AD3
GPIO05
GPIO04

KBC_SCL1

For GDDR2 VRAM

BAT_IN# 31

ALBA X00

GPIO10/LPCPD#
LRESET#
LCLK
LFRAME#
LAD0
LAD1
LAD2
LAD3
SERIRQ
GPIO11/CLKRUN#
KBRST#
GA20
ECSCI#/GPIO54
GPIO65/SMI#
GPIO67/PW UREQ#

2
0R2J-2-GP

EC2601
SCD1U16V2KX-3GP

32 ADAPT_OC
+3.3V_RTC_LDO

97
98
99
100
108
96

VREF

DY

THERMTRIP_VGA#

1 OF 2

32 AD_IA_KBC

CAPA_INT#

SSID = KBC

U2602

104
1

AVCC

115
88
76
46
19

U2601A

ALBA X00

TP2602

DY

1
R2630

R2640
2K2R2J-2-GP
C2603
SC10U6D3V5MX-3GP

28 THERM_SDA

VCC
VCC
VCC
VCC
VCC

C2602
SCD1U10V2KX-4GP

C2615
SCD1U10V2KX-4GP

C2614
SC10U6D3V5MX-3GP

C2613
SCD1U10V2KX-4GP

1
2

C2612
SCD1U10V2KX-4GP

1
2

C2609
SCD1U10V2KX-4GP

C2611
SCD1U10V2KX-4GP

1
2

C2616
SCD1U10V2KX-4GP

C2617
SC10U6D3V5MX-3GP

DY

+3.3V_RUN

VBAT

2 BLM18AG601SN-3GP

2
DISCRETE_ID

L2601 1

+3.3V_RUN

Put 0.1uf close to VCC-GND pin pair.

+3.3V_RTC_LDO

C2606
SC1U10V3KX-3GP

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.
Title

KBC Winbond WPC773L

Size
Document Number
Custom

Date: Monday, March 23, 2009

Rev

SB

Alba Discrete
Sheet

26

of

60

(Blank)

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size
Document Number
Custom
Date:
5

Monday, March 23, 2009

(Reserve)

Rev

SB

Alba Discrete
Sheet
1

27

of

59

+5V_RUN

R2802
R2801
10KR2J-3-GP

C2812
SCD1U16V2KX-3GP

DY

DY

R2817
10KR2J-3-GP

0R2J-2-GP

1
2

C2810
SC4D7U6D3V5KX-3GP

+5V_RUN

+3.3V_RUN

SSID = Thermal

D2801
EMC2102_FAN_TACH

EMC2102_FAN_TACH_1

EMC2102_FAN_TACH_1

44
D

B0530WS-7-F-GP
EMC2102_FAN_DRIVE

EMC2102_FAN_DRIVE

+3.3V_RTC_LDO

RN2801
R2815

X01 20081215

44

DY

3
4

2
1

49D9R2F-GP

+3.3V_RUN

SRN4K7J-8-GP
THERM_SCL 26
THERM_SDA 26

+3.3V_RUN

23

24

25

26

27

22
SMDATA

+3.3V_RUN

SMCLK

VDD_5Vb

FANb

FANa

C2803
SCD1U16V2KX-3GP

TACH

GND

U2801

VDD_5Va

29

EMC2102_VDD_3D3

49D9R2F-GP

28

R2814

20

ALERT#

19

ALERT#

CLK_IN

18

CLK_32K

CLK_SEL

17

EMC2102_CLK_SEL

DN3

RESET#

16

EM2102_RESET#

DP3

NC#15

15

Layout notice :
Both VGA_THERMDA and THERMDC routing
10 mil trace width and 10 mil spacing.

DY 1

+3.3V_RUN

R2804

C2801 must be near Q2801

DY

2
1
1

1
1
0R2J-2-GP

Q2803
2N7002-7F-GP

C2807
SCD1U16V2KX-3GP

PURE_HW_SHUTDOWN#

GND = Fan is OFF


OPEN = Fan is at 60% full-scale
+3.3V = Fan is at 75% full-scale

26,30

TRIP_SET Pin Voltage


V_DEGREE=(((Degree-75)/21)
T8 shutdown is set 88 deg-C.

V_DEGREE

EMC2102_FAN_TACH_1
EMC2102_FAN_DRIVE

R2806
10KR2F-2-GP

R2805

C2805 must be
near EMC2102

C2806
SCD1U16V2KX-3GP

R2807
2K37R2F-GP

TP2802
TP2801

+3.3V_RUN
R2816
10KR2J-3-GP

C2805
SC470P50V3JN-2GP

3.HW T8 sensor
Layout notice :
Both DN3 and DP3 routing 10 mil
trace width and 10 mil spacing.

+3.3V_RUN

DY C2801
SC470P50V3JN-2GP

ALBA X00

1
R2818
10KR2J-3-GP

EMC2102_FAN_mode
1
0R2J-2-GP

GND = Internal Oscillator Selected


+3.3V = External 32.768kHz Clock Selected

+3.3V_RTC_LDO

+3.3V_RUN

Q2801
MMBT3904-3-GP

R2811
1
0R2J-2-GP

10KR2J-3-GP

ALBA X00

THERM_SCI# 20

ALBA X00

RN2802 SRN10KJ-5-GP
4
1
3
2

EMC2102_SHDN

1 0R2J-2-GP

EMC2102-DZK-GP

R2803

DY

GPU Sensor

NC#8

GND = Channel 1
OPEN = Channel 3
+3.3V = Disabled

54 VGA_THERMDA

C2802
SC470P50V3JN-2GP

54 VGA_THERMDC

R2810 2

POWER_OK#

T8_THERMDA

14

DP2

THERMTRIP#

T8_THERMDC

13

VGA_THERMDA

EMC2102

SYS_SHDN#

DN2

12

DP1

TRIP_SET

VGA_THERMDC

FAN_MODE

H_THERMDA

21

GND

11

H_THERMDA, H_THERMDC routing together,


Trace width / Spacing = 10 / 10 mil

R2812
8K2R2J-3-GP

NC#21

10

DN1

SHDN_SEL

VDD_3V

1
H_THERMDC

1
2

C2804
SC470P50V3JN-2GP

ALBA X00

32K suspend clock output

Lay out close to SKT2(CPU socket)

+3.3V_ALW

R2813
10R2J-2-GP

EM2102_RESET#
8 H_THERMDA

DY

H_THERMDA

C2809
SC4D7P50V2CN-1GP

Q2802
2N7002-7F-GP

U2802
CLK_32K

DY
A

8 H_THERMDC
RUN_POWER_ON

C2833
SC2200P50V2KX-2GP

R2833
10KR2J-3-GP

20,26,30,36,37,38,39,50

PM_SLP_S3#

DY

C2808

VCC

DY

5
4

DY 1

SCD1U16V2KX-3GP

PM_PWROK 11,20,26

GND
74LVC1G08GW-1-GP

CLK_32K_R

20 ICH_SUSCLK

H_THERMDC

<Core Design>

30

Wistron Corporation

H_THERMDA, H_THERMDC routing together,


Trace width / Spacing = 10 / 10 mil

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.
Title

Thermal/Fan Controllor EMC2102

Size
Document Number
Custom
Date:
5

Monday, March 23, 2009

Rev

SB

Alba Discrete
Sheet
1

28

of

59

(Blank)

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size
Document Number
Custom
Date:
5

Monday, March 23, 2009

(Reserve)

Rev

SB

Alba Discrete
Sheet
1

29

of

59

SSID = Reset.Suspend
Max current: 115mA
Q3005
SI2301BDS-T1-GP

DY

Q3001
CHT2222APT-GP

DY
2

3.3V_DELAY_EN#

26,28

1
R3003

2
1KR2J-1-GP

S5_ENABLE 26
26,36,37,38,39

R3012 1

RUNPWROK

3.3V_DELAY_EN

DY

R3001
200KR2J-L1-GP

0R2J-2-GP

3.3V_DELAY_EN_KBC

26 3.3V_DELAY_EN_KBC

DY

75KR2F-GP

DY
2

R3015
100R2F-L1-GP-U

R3013

PURE_HW_SHUTDOWN#

33 3V_5V_EN

3
Q3003
2N7002SPT

D3001
BAS16-1-GP

DY

B
1

C3001
SCD1U10V2KX-4GP

H_PWRGD_R

DY

1KR2J-1-GP

8,18 H_PWRGOOD

R3002

C3007
SC1U6D3V2KX-GP

C3005
SC22U6D3V5MX-2GP

100KR2J-1-GP

+3.3V_DELAY

1.8A
Rds= 0.15 ohm

8,11,18,26,54

R3011
H_THRMTRIP#

X02 20090304
G

+3.3V_ALW
D

C3006
SCD1U16V2KX-3GP

3.3V_DELAY_1

X01 20090112

Optional RC network to fine tune PWR SEQ.

+3.3V_RTC_LDO

R3009
100KR2J-1-GP
PM_RUN_EN# 2

RUN_POWER_ON

2 10KR2J-3-GP

RUN_ON_5V

1
2
3
4

D
D
D
D

8
7
6
5

11.6A
Rds=14m ohm

C3002
SC6800P25V2KX-1GP

U3001
S
S
S
G
AO4468-GP

+15V_ALW

+5V_ALW

+5V_RUN

R3005

Q3002
2N7002SPT

Max current: 6243.3mA

X01 20081215

R3010
10KR2J-3-GP

Max current: 4865.6mA


+3.3V_RUN

20,26,28,36,37,38,39,50

RUN_POWER_ON

PM_SLP_S3#

28

R3004

2 10KR2J-3-GP RUN_ON_3D3V

C3003
SCD01U50V2KX-1GP

R3016
10R3F-GP

D
D
D
D

8
7
6
5

11.6A
Rds=14m ohm

+15V_ALW

+3.3V_RTC_LDO

U3002
S
S
S
G
AO4468-GP

+1.8V_RUN

+3.3V_ALW

1
2
3
4

Max current: 5386mA

C3033
SC10U6D3V5KX-1GP

+1.8V_SUS

Q3006
2N7002-7F-GP

+1.8V_RUN

R3008
10KR2J-3-GP

1D8V_VRAM_ON#

R3014
100KR2J-1-GP

2N7002SPT
Q3004

X01 20090112

C3004
SCD01U50V2KX-1GP
26 1D8V_VRAM_ON

RUN_ON_1D8V

1
2
3
4

U3003
S
S
S
G

D
D
D
D

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

FDS8880-NL-GP

10.7A
Rds=12m ohm

Title

Power Plane Enable

Size
Document Number
Custom

1D8V_VRAM_ON

Date:
5

<Core Design>

8
7
6
5

Monday, March 23, 2009

Rev

SB

Alba Discrete
Sheet
1

30

of

59

SSID = PWR.Support

ALBA X00

1
PSID_DISABLE#_R

DY

PSID_DISABLE#

+3.3V_ALW

+3.3V_ALW

PR3106
100KR2J-1-GP

PD3102
BAV99-4-GP
PR3108

2
D

E
1

CH3904PT-GP
PQ3103

DY

PR3105
10KR2J-3-GP

PR3107
15KR2J-1-GP

+5V_ALW

26

PR3103

PS_ID

PD3101
BAV99-4-GP

PQ3102
FDV301N-NL-GP

PR3102
2K2R2J-2-GP

0R2J-2-GP

PS_ID_EC 26

33R2J-2-GP

DCin CONN
PR3104

This cap should be used


only as last resort for
EMI suppression.

26 AD_OFF

3 OUT

R1

DY

DY

2 GND

R2

1
2

PQ3104
PQ3101

1
IN

FDS6675BZ-GP

Id=-9.6A
Qg=-25nC
Rdson=18~30mohm

PC3106
SC10U25V6KX-1GP

PD3103

DY B240A-13-GP

8
7
6
5

PC3108
SCD01U50V2KX-1GP

22.10088.F11

PR3111
240KR3-GP

PC3103
SCD1U50V3KX-GP

DY

D
D
D
D

AFTP3109

PS_ID_R2

2
PD3107
1SMB22AT3G-GP-U

DC-JACK133-GP-U
C

2 0R3-0-U-GP

PC3104
SC1U25V5KX-1GP

PR31011

PS_ID_R
AFTP3102

2
6

R1

NP2
5
NP1

PU3101
S
S
S
G

+DC_IN_SS

1
2
3
4

+DC_IN

8
3
4
1

R2

PC3107
SCD01U50V2KX-1GP

AFTP3101

PC3105
SCD01U50V2KX-1GP

1
DCIN1

DY

33R2J-2-GP

PDTA124EU-1-GP

PR3110
47KR3J-L-GP

DDTC124EUA-7F-GP

X02 20090302
X02 20090219

AFTP3103
AFTP3104
AFTP3106
AFTP3105

Batt Connecter

PBAT_PRES1#
PBAT_SMBDAT1
PBAT_SMBCLK1
+PBATT

BAT
B

1
PBAT_ALARM#

20.81143.009

AFTP3108

PR3112 1

PC3102
SCD1U50V3KX-GP

PR3109
1

+3.3V_RTC_LDO

470KR2J-2-GP

2 100R2J-2-GP
PRN3101

1
10

SYN-CON9-10-GP

4
3

BAT_IN# 26
BAT_SDA 26,32
BAT_SCL 26,32

1
2 SRN100J-3-GP

PBAT_PRES1#
PBAT_SMBDAT1
PBAT_SMBCLK1

AFTP3107

11
9
8
7
6
5
4
3
2

GND2
GND1
BAT_ALERT
SYS_PRES#
BATT_PRS#
DAT_SMB
CLK_SMB
BATT2+
BATT1+

1
1
1
1

PC3101
SC2200P50V2KX-2GP

PG3108
1

+PBATT
BATT_SENSE 32

GAP-CLOSE-PWR-3-GP

BAT_SCL

BAT_SDA

BAT_IN#

Wistron Corporation

PD3105
BAV99-4-GP

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.

PD3106
BAV99-4-GP

PD3104
BAV99-4-GP

<Core Design>

Title

DC IN/BATT CONN/USB CONN

Size
Document Number
Custom

+3.3V_RTC_LDO

Date:
5

Monday, March 23, 2009

Rev

SB

Alba Discrete
Sheet
1

31

of

59

100KR2J-1-GP

X02 20090302

TABLE1

28K

301

36.5K

1
2

EC3204
SCD1U50V3KX-GP

EC3203
SCD1U50V3KX-GP

1
2

EC3202
SCD1U50V3KX-GP

PR3203
100KR2J-1-GP

CHG_AGND

instead of 10m ohm


CHG_AGND

1
2

DY

5
6
7
8

DYPR3208
33K2R3F-GP

ADAPT_OC 26

1
2
PG3208
GAP-CLOSE-PWR

1
2

DY
2

DY

2IN+
2IN2OUT
VCC

PC3204
SC100P50V2JN-3GP
2
1

DY

ADAPT_OC
PQ3201
2N7002-7F-GP

+5V_ALW

PR3206

1
2
PG3209
GAP-CLOSE-PWR

10KR2J-3-GP

CHG_AGND

Wistron Corporation

CHG_AGND

CHG_AGND
ADAPT_TRIP_SEL

ADAPT_TRIP_SEL

DY ADAPT_TRIP_SEL=1

Adapter is 90w

ADAPT_TRIP_SEL=0

Adapter is 65w

26

CHG_AGND

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.
Title

CHARGER MAX8731

Size
Document Number
Custom
Date:

CHG_AGND

<Core Design>

PU3201
LM393DR-GP

DY

PR3207
348R3F-GP

DY

DY

MAX8731_REF2

CHG_AGND

24.9K at PR6326 allows the 65W adaptor setting


to switch down to 45W. (now is 33.2K for 90W)

PR3205
17K8R3F-1-GP

DY

MAX8731_IINP1

DY
DY

DY

PR3221
1
2
0R2J-2-GP
1
2
PR3202
51K1R3F-GP

PC3203
SC100P50V2JN-3GP

N/A

PR3210
15K4R2F-GP

MAX8731_REF

PR3204
100KR2J-1-GP

33.2K

ADAPT_TRIP_SET is floating for the higher


adaptor, grounded for the lower adaptor

must be 5m ohm
Note 3: PR6302
for the 230W adaptor

ADAPT_OC1
2
1MR2F-GP
+5V_ALW

AD_IA

88.7K

19.1K

DY

27.4K

432

9.75

1
PR3201

100

11.28
115
32.4K
6.49K
is populated if ADAPT_TRIP_SET is
1: PR6326
used to program for the next lower adaptor

ACAV_IN

X01 20081215

GND
1IN+
1IN1OUT

20.5K
24.9K

7.43

PR3209
10KR2F-2-GP

+3.3V_RTC_LDO

4
3
2
1

32.4K

6.43

150

MAX8731_LDO

1
1

PC3228
SCD01U50V2KX-1GP

BATT_SENSE 31

PC3205
DYPC3206
SC100P50V2JN-3GP DYSCD01U50V2KX-1GP

30.9K

51.1K

BATT_SENSE

100R2F-L1-GP-U

GND
29

1
2

PC3227
SCD1U16V2KX-3GP

PR3226
1

N/A

105
348

130

Note 2:

BAT_SENSE

MAX8731AETI-GP

13.0K
17.8K

4.43

Note

15

57.6K

3.17

200

FBSA

TRIP CURRENT (A) PR3202 PR3205 PR3207 PR3208

90

230

16

CHG_AGND

FBSB

MAX8731_REF1

PC3202
SC100P50V2JN-3GP

65

CCV
CCI
CCS
REF
DAC
GND

1
2
PG3205
GAP-CLOSE-PWR

PC3201
SCD01U50V2KX-1GP
2
1

ADAPTOR (W)

PC3226
SC1U10V3KX-3GP

1
2

2 10KR2F-2-GP MAX8731_CCV
6
MAX8731_CCI
5
MAX8731_CCS
4
MAX8731_REF
3
MAX8731_DAC 7
12
PC3225
SCD01U50V2KX-1GP

PC3224
SCD01U50V2KX-1GP

PC3223
SCD01U50V2KX-1GP

1MAX8731_CCV1
2

PC3229
SCD1U16V2KX-3GP

1
2

1
2

PR3225
10KR2F-2-GP

PR3227

GAP-CLOSE-PWR-3-GP

INP

PG3204
1

PG3203
GAP-CLOSE-PWR-3-GP

AD_IA

1
0R2J-2-GP

4
3
2
1

MAX8731_CSIN

PR3283
26 AD_IA_KBC

DY
A

17

DY

PD3202
1SMA18AT3G-GP

CSIN

CHG_AGND

PU3205
SI4800BDY-T1

PC3222
SC10U25V6KX-1GP

MAX8731_CSIP

CSIP

18

BATSEL

G
S
S
S

14

19

IND-5D6UH-39-GP D01R2512F-4-GP

PC3221
SC10U25V6KX-1GP

PGND

Layout Trace 300mil

20

+PBATT

PR3224
1

DLO

SDA

PC3220
SC10U25V6KX-1GP

CHG_PWR
PL32011

2 SCD1U25V3KX-GP
MAX8731_LX1

BAT_SDA_1

PC3213
SCD1U25V3KX-GP

LX

23

SCL

D
D
D
D

26,31 BAT_SDA

10

SC1U10V3KX-3GP

BAT_SCL_1

1
2
PG3206
GAP-CLOSE-PWR
1
2
PG3207
GAP-CLOSE-PWR

BAS516-1-GP
PC3218
PR3223
1R3F-GP
MAX8731_LX 1
2
1
2
PC3219
SC220P50V2KX-3GP
MAX8731_DLO

MAX8731_DHI

ACOK

24

PC3216
1
2

PC3217
SC10U25V6KX-1GP

DHI

PD3201

PR3222
0R3-0-U-GP
MAX8731_BST 1
2MAX8731_BST1
MAX8731_LDO

5
6
7
8

25
21

PU3204
SI4800BDY-T1

CHG_AGND

D
D
D
D

BST
LDO

MAX8731_VCC

CHG_AGND
26,31 BAT_SCL

27
26

DY

13

CSSN
VCC

CHG_AGND

PC3211
SC1U10V3KX-3GP

PC3230
SC10U25V6KX-1GP

PC3215
SCD1U25V3KX-GP
ACAV_IN

1
28

VDD

PR3219
33R2J-2-GP

CSSP

G
S
S
S

ACIN

CHG_AGND

4
3
2
1

2
11

+3.3V_RTC_LDO

1
2

PC3214
SCD01U50V2KX-1GP

PR3220
49K9R2F-L-GP

DCIN

PC3209
SCD1U50V3KX-GP

2
1

MAX8731_ACIN

22

PU3203
MAX8731_DCIN

ASNS

PC3210
SC1U25V5KX-1GP

CHG_AGNDCHG_AGND

PR3217

MAX8731_CSSN

MAX8731_CSSP

PC3208
SCD1U50V3KX-GP

+DC_IN_SS

X02 20090302

8
7
6
5

PR3216
470KR2J-2-GP

5
6
7
8

PQ3202
2N7002-7F-GP

ACAV_IN

D
D
D
D

+PBATT

FDS6675BZ-GP

49K9R2F-L-GP

PU3202
S
S
S
G

PR3215
DCIN_GATE2

PG3202
GAP-CLOSE-PWR-3-GP

2
D

DC_IN_D

PQ3204
2N7002-7F-GP

PR3218
365KR3F-GP

PG3201
GAP-CLOSE-PWR-3-GP

PR3213
10KR2J-3-GP

DCIN_GATE1

1
2
3
4

+DC_IN_SS

ACAV_IN

0R2J-2-GP

D01R2512F-4-GP

FDS6675BZ-GP

2N7002-7F-GP

Layout Trace 300mil

+PWR_SRC
PR3212

1
+SDC_IN

1
2
3
4

PC3233
SC10U25V6KX-1GP
2
1

S
S
S
G

PR3214

Id=-9.6A
Qg=-25nC
Rdson=18~30mohm

Layout Trace 300mil

PU3206
D
D
D
D

8
7
6
5

+DC_IN_SS

PQ3203
G

26 AC_IN#

PC3207
SC1U10V3KX-3GP

Adaptor In Soft-Start Circuit

Layout Trace 250mil

PC3231
SC10U25V6KX-1GP
2
1

PR3211
100KR2J-1-GP

PC3212
SC10U25V6KX-1GP

Id=-9.6A
Qg=-25nC
Rdson=18~30mohm

PC3232
SC10U25V6KX-1GP
2
1

+3.3V_RTC_LDO

EC3201
SCD1U50V3KX-GP

+PBATT

SSID = Charger

Monday, March 23, 2009

Rev

SB

Alba Discrete
Sheet
1

32

of

59

3D3V_AUX_S5
+PWR_SRC_5V/3V

51125_VCLK

PG3302
2

PR3321
100KR2J-1-GP

PC3326
SC1U25V5KX-1GP

51125_ENTIP2

+5V_ALW2

PG3323
GAP-CLOSE-PWR-3-GP
PQ3303
S

DY

1
PC3325
SCD1U25V3KX-GP

PC3328
SCD1U25V3KX-GP

PD3303
BZT52C15S-GP

DY
2

PC3322
SC18P50V2JN-1-GP

R3312
86K6R2F-GP

X01 20090105

1
2
3

1
2

GAP-CLOSE-PWR

2N7002-7F-GP

PD3308
BAT54-7-F-GP

DY

PD3306
BAT54S-7F-GP

+15V_ALW

GAP-CLOSE-PWR

PD3305
BAT54S-7F-GP

R3311
147KR2F-GP

PQ3305
30 3V_5V_EN

PC3321 DY
SC18P50V2JN-1-GP

GAP-CLOSE-PWR
PG3313
1
2

GAP-CLOSE-PWR
PG3315
2
1

2N7002-7F-GP

51125_ENTIP1

GAP-CLOSE-PWR
PG3312
2
1

2N7002-7F-GP

PQ3304

GAP-CLOSE-PWR
PG3306
1
2

PC3324
SCD1U25V3KX-GP

51125_ENTRIP

GAP-CLOSE-PWR
PG3309
1
2

GAP-CLOSE-PWR
PG3305
2
1

PC3327
SCD1U25V3KX-GP

GAP-CLOSE-PWR
PG3304
1
2

GAP-CLOSE-PWR
PG3308
2
1

+PWR_SRC

GAP-CLOSE-PWR
PG3303
2
1

+3.3V_ALW
+3D3V_PWR
PG3301
2
1

X01 20090105

X02 20090310

X01 20081215

+PWR_SRC
+PWR_SRC_5V/3V
+PWR_SRC_5V/3V

1
2

5
6
7
8

51125_DRVL1

4
3
2
1

19

+5V_PWR

PL3302

3
51125_TONSEL

VREF

GND

TONSEL

GND

SKIPSEL

VCLK

15

PC3319
SC560P50V-GP

DY

PR3317
1
0R2J-2-GP

DY

PR3318
1
0R2J-2-GP

1
2

PTC3302

GAP-CLOSE-PWR
PG3311
1
2
GAP-CLOSE-PWR
PG3314
1
2
GAP-CLOSE-PWR
PG3316
1
2

DY

CH1

CH2

200kHz

265kHz

VREF

245kHz

305kHz

VREG3

300kHz

375kHz

VREG5

365kHz

460kHz

2
1

1 2
PC3316
SC18P50V2JN-1-GP

+3.3V_RTC_LDO

GAP-CLOSE-PWR
PG3318
1
2
GAP-CLOSE-PWR
PG3319
1
2

51125_FB1_R

DY
2

17
1

PR3310
33KR2F-GP

1
PC3301
SC1KP50V2KX-1GP

GAP-CLOSE-PWR
PG3317
1
2

PR3309
0R2J-2-GP

51125_VCLK

3D3V_AUX_S5_5_51125 8

PC3317
SC10U10V5KX-2GP

18

PR3313
100KR2J-1-GP

PR3314
21K5R2F-GP

GAP-CLOSE-PWR

Close to VFB Pin (pin2)

3V_5V_POK 26

X01 20090105
PC3318

3D3V_AUX_S5

+3.3V_RTC_LDO

I/P cap: 10U 25V K1206 X5R/ 78.10622.52L


Inductor: 2.2UH FDVE0630-2R2M=P3 TOKO 21mohm Isat =8.7Arms 68.2R21B.10A
O/P cap: 220U 6.3V PSLV0J227M(25) 25mOhm 2.236Arms NEC_TOKIN/77.C2271.00L
H/S: FDSS8884 SO-8/ 23mohm/30mOhm@4.5Vgs/ 84.08884.037
L/S: FDS6690AS SO-8/ 12mohm/15mOhm@4.5Vgs/ 84.06690.E37

PR3301

0R2J-2-GP

SKIPSEL

VREG3 or VREG5

VREF(2V)

Operating
Mode

OOA Auto Skip

Auto Skip

GND
PWM only

Eiger

EN0

Open
enable both
LDOs, VCLK on
and ready to
turn on
switcher
channels

820k to GND
enable both LDOs,
VCLK off and
ready to turn on
switcher channels

GND

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

disable all
circuit
Title

DCDC 5V/3D3V (TPS51125)


Size
Custom
Date:

DY

X01 20090105

25

X01 20090113

Operating
Mode

PG3321

PR3319
2D2R5F-2-GP

51125_ENTIP1

PU3305

3V_5V_POK

+5V_ALW2

SC10U10V5KX-2GP

PR3316
1
0R2J-2-GP

I/P cap: 10U 25V K1206 X5R/ 78.10622.52L


Inductor: 3.3UH FDV0630-3R3M=P3 TOKO 31mohm Isat =6.9Arms 68.3R31A.10E
O/P cap: 220U 6.3V PSLV0J227M(25) 25mOhm 2.236Arms NEC_TOKIN/77.C2271.00LTONSEL
H/S: FDSS8884 SO-8/ 23mohm/30mOhm@4.5Vgs/ 84.08884.037
GND
L/S: FDS6690AS SO-8/ 12mohm/15mOhm@4.5Vgs/ 84.06690.E37
A

GAP-CLOSE-PWR-3-GP

PR3315
1
0R2J-2-GP

2
1

PR3312

1
DY0R2J-2-GP

3D3V_AUX_S5

PG3322

51125_VREF

23

74.51125.073

Close to VFB Pin (pin5)

51125_FB1

VREG5

TPS51125RGER-GP

3D3V_AUX_S5

3D3V_AUX_S5

ENTRIP1

VREG3

14
51125_SKIPSEL

51125_FB2_R
PC3315

51125_VREF

PGOOD

ENTRIP2

51125_VO1

PC3313
SCD1U10V2KX-4GP

EN0

24

VFB1

GAP-CLOSE-PWR
PG3310
1
2

VO1

VFB2

13

51125_ENTIP2 6

VO2

+5V_ALW
PG3307
2

4
3
2
1

+5V_PWR

1
2
IND-2D2UH-111-GP
5
6
7
8

SCD22U10V2KX-1GP
2
1

16
VIN

51125_FB2

2 51125_EN
DY820KR2F-GP

51125_VREF

DYSC18P50V2JN-1-GP

1
2

1
2

8
7
6
5
D
D
D
D
S
S
S
G
S
S
S
G

PR3308
0R2J-2-GP

PR3311
10KR2F-2-GP

51125_LL1

8
7
6
5
D
D
D
D

1
2

1
PR3306

1
2
3
4

1
2

51125_VO2

X01 20081215

1
2

1
2

1
2

1 2

DY

DRVL1

20

1
2
0R3-0-U-GP PR3303

Design Current = 7.72A


Peak Current = 10.25A
11.23A<OCP< 13.33A

ST220U6D3VDM-15GP

PR3307
6K65R2F-GP

DRVL2

51125_DRVH1

DY

GAP-CLOSE-PWR-3-GP

PU3304
FDS6690AS-GP

PC3314

LL1

51125_VBST1

21

SCD01U50V2KX-1GP

DY S

12

LL2

22

FDS6690AS-GP
S
S
S
G

PC3320
SC330P50V3KX-GP

51125_DRVL2

DRVH1

SC10U25V6KX-1GP

PG3320

11

VBST1

DRVH2

SC10U25V6KX-1GP

DY

51125_LL2

VBST2

D
D
D
D

ST220U6D3VDM-15GP

SCD1U10V2KX-4GP

PR3320
2D2R5F-2-GP

9
10

S
S
S
G

PTC3301

51125_VBST2
1
2
0R3-0-U-GP PR3304
51125_DRVH2

SCD1U25V3KX-GP

1
2
IND-3D3UH-90-GP

SCD1U25V3KX-GP
PC3307
1
2

PC3308 PC3309 PC3310

PU3303
FDS8884-GP

D
D
D
D

DY

PU3302

PC3311
2
1

PL3301

GAP-CLOSE-PWR-3-GP

PC3312

PU3301
FDS8884-GP

1
2
3
4

1
2

SCD01U50V2KX-1GP

DY

S
+3D3V_PWR

SC10U25V6KX-1GP

Design Current = 3.98A


PeakCurrent = 5.68A
6.2<OCP<7.38A

DY

SC10U25V6KX-1GP

SCD01U50V2KX-1GP

PC3304

PC3305 PC3306
PC3303

Document Number

Rev

SB

Alba Discrete
Monday, March 23, 2009

Sheet
1

33

of

59

SSID = CPU.Regulator

11,20 DPRSLPVR

CPUCORE_ON
PR3404 1

8,11,18 H_DPRSTP#

CPU_VID1

CPU_VID2

CPU_VID0
0R2J-2-GP

0R2J-2-GP

0R2J-2-GP

0R2J-2-GP

0R2J-2-GP

0R2J-2-GP

0R2J-2-GP

0R2J-2-GP

0R2J-2-GP

499R2F-2-GP

PC3418
SC330P50V2KX-3GP

PR3439

PC3422
SCD01U50V2KX-1GP

37
VID0

38
VID1

39
VID2

VID3

40

41
VID4

VID5

42

6266A_LGATE2 35

PR3426
6266A_BOOT2 1

6266A_BOOT2_R

6266A_UGATE2 35
6266A_PHASE2

6266A_PHASE2 35

SCD22U25V3KX-GP

ISEN1

1R3F-GP

6266A_UGATE2
PC3408
1
2

24

ISEN2
23

6266A_ISEN1 35
PC3412
SCD22U10V2KX-1GP
6266A_VO

6266A_VO 35

6266A_ISEN2

GND

VDD
22
6266A_VDD

21

VSUM

VIN
20
6266A_VIN

19

18

6266A_ LGATE1 35

6266A_PHASE2

6266A_VSUM

PC3421
SC1U10V3KX-3GP

1 2

PR3434
11KR2F-L-GP

6266A_VO

PR3435
2K61R2F-1-GP

PR3437
NTC-10K-26-GP

10R3F-GP

2
+5V_RUN
PR3436
1

PC3415
SCD047U10V2KX-2GP
2
1

1
10R3F-GP

35 6266A_VSUM
6266A_ISEN2 35

2
PR3433

1 SCD01U50V2KX-1GP
2

PC3413
SCD22U10V2KX-1GP

Place close to 1st

Choke

GAP-CLOSE-PWR-3-GP
PG3401

0R2J-2-GP

6266A_LGATE2

<Core Design>

9 VSS_SENSE

SC2D2U10V3KX-1GP

6266A_ISEN1

PC3419

PR3438
0R2J-2-GP

1
SCD22U10V2KX-1GP

PC3416
SC330P50V2KX-3GP

SC180P50V2JN-1GP

2
1KR2J-1-GP

DY

PC3414
2
1

1KR2F-3-GP

6266A_ LGATE1
PC3404
1
2

+5V_RUN

+PWR_SRC

2
PC3420

PR3440
1
2
0R2J-2-GP

43

25

9 VCC_SENSE

44

NC#25

SC2200P50V2KX-2GP

1
PR3403

VR_ON

FB2

VO

12

DFB

6266A_FB2

PR3428
1KR2F-3-GP

6266A_SOFT

VID6

45

BOOT2

DROOP

FB

SC270P50V2KX-1GP
PC3411
1
2

DPRSLPVR

27

VDIFF
2

46

28

UGATE2

26

PR3430

PHASE2

COMP

1 1KR2F-3-GP
6266A_VO
6266A_VSUM

VW

74.06266.073

100R2F-L1-GP-U

29

ISL6266AHRZ-GP

OCSET

11

PR3429

30

PGND2

SOFT

PR3432

97K6R2F-GP

PC3410
1

LGATE2

PU3401

6266A_FB

8K25R2F-1-GP

SC100P50V2JN-3GP
PR3427
1
2

31

PC3409
1
2

32

16266A_DROOP 16
3K48R2F-GP
6266A_DFB
17

PR3425
1

6266A_PHASE1

6266A_COMP 10

X01 20090105

PHASE1

34

6266A_PHASE1 35

6266A_UGATE1 35

PC3417
SCD22U10V2KX-1GP

PC3406
1
26266A_SOFT 7
SCD015U50V3KX-GP
6266A_OCSET 8
1
2
PR3418
13K7R2F-GP
6266A_VW
2 SC1KP50V2KX-1GP
9

6266A_UGATE1

PVCC

NTC

PR3431

PC3407 1

DY

6266A_VO

Place close to
1st phase choke

6266A_NTC

35

33

PC3403
SCD22U25V3KX-GP
6266A_PHASE1
1

UGATE1

PGND1

2
1R3F-GP

6266A_BOOT1_R

36

LGATE1

VR_TT#

6266A_BOOT1 1

BOOT1

RBIAS

RTN

DY

PMON

15

PR3423 1

SCD1U16V2KX-3GP
PR3424
2 4K02R2F-GP
1 DY
2
NTC-470K-8-GP
PC34051
2 SCD01U50V2KX-1GP

PR3420

PSI#

13

8 CPU_PROCHOT#

6266A_RTN

PC3402
1

6266A_PSI#
2
0R2J-2-GP
2 6266A_PMON 3
4K99R2F-L-GP
2 6266A_RBIAS 4
147KR2F-GP
5

1
PR3417
1
PR3421
1
PR3422

PSI#

VSEN

14

DY

6266A_VSEN

PR3419
68R2F-GP

PGOOD

6266A_VDIFF

1
C

20,26 VGATE_PWRGD

DPRSTP#

3V3

GND

PR3416
1K91R2F-1-GP

+1.05V_VCCP

CLK_EN#

49

+3.3V_RUN

2
6266A_CLK_EN#

PC3401
SCD1U10V2KX-4GP

1
PR3406
6266A_DPRSTP#
1
PR3411
6266A_DPRSLPVR
1
PR3407
6266A_VRON
1
RP3401
6266A_D6
1
PR3412
6266A_D5
1
PR3413
6266A_D4
1
PR3414
6266A_D3
1
PR3408
6266A_D2
1
PR3409
6266A_D1
1
PR3410
6266A_D0
1
PR3415

6266A_3V3

47

48

PR3405
10R3F-GP

0R2J-2-GP

CPU_VID3

+3.3V_RUN

CPU_VID4

CPU_VID6

PTP3401

CPU_VID5

CPU_VID[6..0]

CLK_EN#

26

2 10KR2J-3-GP

2 10KR2J-3-GP

DY

PR34021

+3.3V_RUN

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

6266AGND
Title

CPU VCORE POWER(1/2)

Size
Document Number
Custom
Date:
5

Monday, March 23, 2009

Rev

SB

Alba Discrete
Sheet
1

34

of

59

+PWR_SRC

DY

GAP-CLOSE-PWR
PG3508
1
2

6266A_PHASE1

1
PC3505
2

SCD1U25V3KX-GP

1
2

CPU noise
D

Thermal Design Current = 34A(IMVP6+


PeakCurrent = 47A
56.4<OCP<66A

Rev:1.35 )

2 10KR2F-2-GP

6266A_VO

2 1R2F-GP

6266A_ISEN2 PR3503 1

34 6266A_ISEN2

1
2

1
2

1
2

1
2

PG3510
GAP-CLOSE-PWR-3-GP

2 10KR2F-2-GP

PC3512
SCD1U25V3KX-GP

PC3511
SCD1U25V3KX-GP
2
1

PC3513
SC10U25V6KX-1GP
2
1

PC3510
SC10U25V6KX-1GP
2
1

1
5
6
7
8

4
3
2
1

5
6
7
8
4
3
2
1

PU3506

SI7686DP-T1-GP
S
D
D
S
D
S
D
G

GAP-CLOSE-PWR
PG3504
1
2

S
S
S
G

GAP-CLOSE-PWR
PG3514
1
2

D
D
D
D

PU3505
SI7686DP-T1-GP

GAP-CLOSE-PWR
PG3501
1
2

PC3509
SC10U25V6KX-1GP
2
1

+PWR_SRC_CPU2

GAP-CLOSE-PWR
PG3502
1
2

PC3508
SC10U25V6KX-1GP
2
1

PG3503
2

PR3502 1

1
2
1
2

2 3K65R2F-1-GP

6266A_ISEN1 PR3501 1

PG3509
GAP-CLOSE-PWR-3-GP

8
7
6
5
4
3
2
1

4
3
2
1

6266A_VSUM PR3563 1

34 6266A_ISEN1

PTC3505
SE330U2VDM-L-GP

34 6266A_VSUM

PTC3504

DY

SE330U2VDM-L-GP

DY

PTC3503
SE330U2VDM-L-GP

SI7636DP
S
S
S
G
PC3514

6266A_ LGATE1

34 6266A_VO
+PWR_SRC_CPU2

DY

SC330P50V3KX-GP

D
D
D
D

S
S
S
G

34 6266A_ LGATE1

PR3513
PU3503

2D2R5F-2-GP

8
7
6
5

1
2
L-D36UH-1-GP

D
D
D
D

SI7636DP

+VCC_CORE
34 6266A_UGATE2

GAP-CLOSE-PWR

6266A_UGATE2

I/P cap: 10U 25V K1206 X5R/ 78.10622.52L


Inductor: 0.36UH ETQP4LR36WFC PANASONIC 1.1mohm
O/P cap: 330U 2V EEFSX0D331ER 9mOhm 3.0Arms Panasonic/79.33719.L01
H/S: SI7686DP/ POWERPAK-8/ 14mOhm/ 4.5Vgs/ 84.07686.037
L/S: SI7636ADP/ POWERPAK-8/ 4.8mOhm/ 4.5Vgs/ 84.07636.037

PTC3507
SE330U2VDM-L-GP

1
2
1
2

PG3513
GAP-CLOSE-PWR-3-GP

34 6266A_LGATE2

DY
6266A_LGATE2

PG3512
GAP-CLOSE-PWR-3-GP

1
2
1

4
3
2
1

PC3515

SC330P50V3KX-GP

4
3
2
1

SI7636DP
S
S
S
G

DY

2D2R5F-2-GP

D
D
D
D

S
S
S
G

SI7636DP

D
D
D
D

PU3507

8
7
6
5

8
7
6
5

1
2
L-D36UH-1-GP
PU3508
PR3514

6266A_PHASE2

PTC3506
SE330U2VDM-L-GP

PL3502
34 6266A_PHASE2

TC3501
SE100U25VM-10GP

6266A_UGATE1

PU3504

DY

PL3501
34 6266A_PHASE1

TC3502
SE100U25VM-10GP

+VCC_CORE
34 6266A_UGATE1

GAP-CLOSE-PWR

+PWR_SRC

PC3504
SC10U25V6KX-1GP

PC3503
SC10U25V6KX-1GP

1
2

SC10U25V6KX-1GP

1
PC3501

5
6
7
8
4
3
2
1

5
6
7
8

GAP-CLOSE-PWR
PG3506
1
2

S
S
S
G

GAP-CLOSE-PWR
PG3505
1
2

D
D
D
D

SI7686DP-T1-GP

PU3501

PU3502

SI7686DP-T1-GP
S
D
D
S
D
S
D
G

GAP-CLOSE-PWR
PG3511
1
2

4
3
2
1

PC3502
SC10U25V6KX-1GP

+PWR_SRC_CPU1
PC3507
1
2

+PWR_SRC_CPU1
+PWR_SRC

SSID = CPU.Regulator

6266A_VSUM

PR3504 1

2 3K65R2F-1-GP

6266A_ISEN2

PR3505 1

2 10KR2F-2-GP

6266A_VO

PR3506 1

2 1R2F-GP

Wistron Corporation

6266A_ISEN1

PR3507 1

2 10KR2F-2-GP

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.

<Core Design>

Title

CPU VCORE POWER(2/2)

Size
Document Number
Custom
Date:
5

Monday, March 23, 2009

Rev

SB

Alba Discrete
Sheet
1

35

of

59

SSID = PWR.Plane.Regulator_1p05v
+1.05V_RUNP

+1.05V_VCCP

PG3601
1

GAP-CLOSE-PWR
PG3602
2
1
D

GAP-CLOSE-PWR
PG3603
2
1
GAP-CLOSE-PWR
PG3604
2
1
GAP-CLOSE-PWR
PG3605
2
1
GAP-CLOSE-PWR
PG3606
2
1
+PWR_SRC

GAP-CLOSE-PWR
PG3608
2
1

+PWR_SRC_1.05V
PG3607
1
2

GAP-CLOSE-PWR
PG3610
2
1

GAP-CLOSE-PWR
PG3609
1
2

1
2

1
2

1
2

PD3603

DY
2

+5V_RUN

PM_SLP_S3#

PC3610
SC330P50V3KX-GP

+1.05V_VOUT

1
2

PTC3602

Vout=0.75V*(R1+R2)/R2

1
PR3610
12KR2F-L-GP

DY

PC3612
SC18P50V2JN-1-GP

GM 20090311

TI: Non_ASM
RT :ASM

PTC3601

DY
2

1
2

PG3616

BAW56-2-GP
RT: Non_ASM
TI: ASM

PR3607
2D2R5F-2-GP

PR3602
17K4R2F-GP

+1.05V_LL

DY

100KR2J-1-GP

DY

+3.3V_RUN

PU3604
FDS8672S-GP

PC3608
SCD1U10V2KX-4GP

1
PU3603
FDS8672S-GP

26,30,37,38,39

4
3
2
1

TPS51117RGYR-GP

RUNPWROK
PR3606
1

1
2
IND-2D2UH-124-GP

5
6
7
8

+1.05V_VOUT

5
6
7
8

3
6
7
8
15

4
3
2
1

EN_PSV
TON
TRIP

1
2

PC3609
SCD01U50V2KX-1GP

+PWR_SRC_1.05V

2
1
PR3609
7K68R2F-GP

VOUT
PGOOD
GND
PGND
GND

VFB
VBST

+1.05V_RUNP

PL3601

+1.05V_LL

ST330U2D5VDM-13GP

DY

LL

12

+1.05V_DRVH
+1.05V_DRVL

S
S
S
G

DY

1M1R2J-GP

13
9

ST330U2D5VDM-13GP

PR3601

+1.05V_EN
1
+1.05V_TON
2
+1.05V_TRIP 11

DRVH
DRVL

D
D
D
D

2 100KR2J-1-GP
2 200KR2J-L1-GP

+1.05V_VFB
5
+1.05V_VBST 14

SCD1U25V3KX-GP

V5FILT
V5DRV

S
S
S
G

RT: Non_ASM
TI: ASM

A
SDMK0340L-7-F-GP

4
10

Design Current = 9.46A


Peak Current = 11.82A
13A<OCP<15.37A

GAP-CLOSE-PWR-3-GP

PU3602
+1.05V_V5FILT

D
D
D
D

PM_SLP_S3#

K
PD3602
PR3605
1
1
PR3608

PC3607
1

+1.05V_LL1

4
3
2
1

PR3604
2
1
0R3-0-U-GP

A
PD3601
B0530WS-7-F-GP

GAP-CLOSE-PWR

S
S
S
G

PC3606
SC1U10V3KX-3GP

+5V_ALW

20,26,28,30,37,38,39,50

PC3605
SC2200P50V2KX-2GP

PU3601
FDS8880-NL-GP

DY

GAP-CLOSE-PWR
PG3614
1
2

GAP-CLOSE-PWR

PC3604
SCD1U50V3KX-GP

5
6
7
8

PR3603
300R3-GP

PC3603
SC1U10V3KX-3GP

D
D
D
D

GAP-CLOSE-PWR
PG3615
1
2

PC3602
SC10U25V6KX-1GP

GAP-CLOSE-PWR
PG3613
1
2

PC3601
SC10U25V6KX-1GP

+5V_ALW

GAP-CLOSE-PWR
PG3612
1
2

+PWR_SRC_1.05V

GAP-CLOSE-PWR
PG3611
1
2

+1.05V_VFB

TI: Non_ASM
RT :ASM

PR3611
30KR2F-GP

I/P cap: 10U 25V K1206 X5R/ 78.10622.52L


Inductor: 2.2UH FDVE1040-2R2M=P3 TOKO DCR:6.8mohm Isat =14.5Arms 68.2R21B.10M
O/P cap: 330U 2.5V PSLV0E337M(15) 15mOhm 2.886Arms NEC_TOKIN/ 77.C3371.10L
H/S: FDS8880 SO-8/ 9.6mOhm/12mOhm @4.5Vgs/ 84.08880.037
L/S: FDS8672S SO-8/ 5.3mOhm/7.0mohm@4.5Vgs/ 84.08672.A37
Switching freq-->350KHz

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

DC to DC 1.05V

Size
Document Number
Custom
Date:
5

Monday, March 23, 2009

Rev

SB

Alba Discrete
Sheet
1

36

of

59

26,30,36,38,39

SSID = PWR.Plane.Regulator_1p5v/1p1v

RUNPWROK

+1.8V_SUS

RUNPWROK

+1.8V_LDOIN_1D5
PG3705
2
1

GAP-CLOSE-PWR
PG3706
2
1
GAP-CLOSE-PWR
PG3704
2
1

PGOOD
NC#4
NC#3
GND
NC#1
PR3712
0R3-0-U-GP

DY

1.5V

PR3704

DY

PC3712

+5V_ALW

1
PC3704

PC3706

PC3711

SC22U6D3V5MX-2GP

1.13K

PR3706

SC22U6D3V5MX-2GP

1K

DY

+1D5V_RUN_P

SC100P50V2JN-3GP

ASM

10K

21
20
19
18
17
16

SS
ADJ
VOUT
VOUT
VOUT

10KR2F-2-GP

RTXX35

20K

ASM

DY

L6935TR-GP GND
VBIAS
EN
VIN
VIN
VIN

20KR2F-L-GP

L6935

PR3706 PR3704

SC10U10V5KX-2GP

PR3711

SCD1U10V2KX-4GP

PR3712

PC3708

PC3702DY
SCD1U10V2KX-4GP

Vendor

6
7
8
9
10

N.C.

0R2J-2-GP
PR3702
1
2

PM_SLP_S3#

VBIAS

20,26,28,30,36,38,39,50

NC#11
NC#12
NC#13
NC#14
NC#15

N.C.

SS

Design current = 2.85A


peak current = 3.65A

11
12
13
14
15

N.C.

PR3711
0R3-0-U-GP
1
2

VBIAS

GAP-CLOSE-PWR

PIN20

RTXX35

PIN11

L6935

PIN6

Vendor

VOUT = 0.5 *(1+Rtop/Rbot)


PU3702

5
4
3
2
1

+1.5V_RUN
PG3710
1

GAP-CLOSE-PWR
PG3712
2
1
PTC20
ST220U2D5VBM-2GP GAP-CLOSE-PWR
PG3711
2
1
GAP-CLOSE-PWR

X01 20090112

+3.3V_ALW

R3703
10KR2F-2-GP

Q3702
2N7002SPT
+1.1V_RUN
+1.8V_SUS

PG3703
2
1

10R3F-GP

GAP-CLOSE-PWR
PG3702
2
1

RUNPWROK

GAP-CLOSE-PWR
PG3701
2
1

5
4
3
2
1
PR3708
0R3-0-U-GP

1.1V

DY

+1.1V_RUN
PG3709
1

GAP-CLOSE-PWR
PG3708
2
1

DY

1
2

PC3709
SC22U6D3V5MX-2GP

PR3703

1
+5V_ALW

PC3703

SC22U6D3V5MX-2GP

1.02K 2.67K

PC3710

PR3705

DY

ASM

10K

+1D1V_RUN_P

RTXX35

20K

21
20
19
18
17
16

SC100P50V2JN-3GP

ASM

SS
ADJ
VOUT
VOUT
VOUT

10KR2F-2-GP

DY

PC3705
SC10U10V5KX-2GP

L6935

PC3701DY

PR3705 PR3703

L6935TR-GP GND
VBIAS
EN
VIN
VIN
VIN

12KR2F-L-GP

PR3709

PC3707
SCD1U10V2KX-4GP

PR3708

SCD1U10V2KX-4GP

Vendor

6
7
8
9
10

DY

N.C.

PGOOD
NC#4
NC#3
GND
NC#1

0R2J-2-GP
PR3701
1
2

Design current = 2.9A


peak current = 2.9A

VBIAS

PM_SLP_S3#

PR3709
0R3-0-U-GP
1
2

N.C.

SS

GAP-CLOSE-PWR

N.C.

0R2J-2-GP
PR3707
1
2

VBIAS

26 1.1V_RUN_EN

PIN20

RTXX35

PIN11

L6935

PIN6

Vendor

VOUT = 0.5 *(1+Rtop/Rbot)


PU3701

NC#11
NC#12
NC#13
NC#14
NC#15

1.1V_RUN_EN

11
12
13
14
15

1
B

+1.8V_LDOIN_1D1

R3702

PTC19
ST220U2D5VBM-2GP GAP-CLOSE-PWR
PG3707
2
1
GAP-CLOSE-PWR

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

DC to DC L6935_1.5V / L6935_1.1VRev

Size
Document Number
Custom
Date:
5

Monday, March 23, 2009

SB

Alba Discrete
Sheet
1

37

of

59

+PW R_SRC

SSID = PWR.Plane.Regulator_gfx

+PW R_SRC_1.8V
PG3803
1
2

+1.8V_SUS

GAP-CLOSE-PW R
PG3805
1
2

X01 20090130
+1.8V_SUS_P

GAP-CLOSE-PW R
PG3807
1
2

+1.8V_LL

3
6
7
8
15

+1.8V_VOUT

DY
2

+1.8V_LL

GAP-CLOSE-PW R
PG3817
1
2

PC3817
SC330P50V3KX-GP

1
2
1

GAP-CLOSE-PW R
PG3813
1
2

PTC3802
SE330U2VDM-L-GP

PG3821
GAP-CLOSE-PWR-3-GP

2
PR3812
2D2R5F-2-GP

DY

PU3803

4
3
2
1

4
3
2
1

DY

PR3802
17K4R3F-GP

8
7
6
5

8
7
6
5
PU3804

GAP-CLOSE-PW R
PG3810
1
2

RUNPW ROK 26,30,36,37,39

PTC3801
SE330U2VDM-L-GP

1
2
1
2

PC3810
SC4D7U25V5KX-GP

PC3809
SCD1U50V3KX-GP

2
1

2
1

12

TPS51117RGYR-GP

PR3809
5K11R2F-L1-GP
2
1

LL
VOUT
PGOOD
GND
PGND
GND

GAP-CLOSE-PW R
PG3808
1
2

+1.8V_SUS_P

S
S
S
G

EN_PSV
TON
TRIP

PL3801
IND-D88UH-3-GP

S
S
S
G

1M1R2J-GP

1
2
11

+1.8_DRVH
+1.8V_DRVL

D
D
D
D

PC3804
SC4700P50V2KX-1GP

VFB
VBST

13
9

SI7636DP

DY

5
14

+1.8V_EN
+1.8V_TON
+1.8_TRIP

2 280KR2F-GP

PR3801

+1.8V_FB
+1.8V_BST

DRVH
DRVL

D
D
D
D

PR3807 1

2 0R2J-2-GP
2 0R2J-2-GP

V5FILT
V5DRV

SI7636DP

RT: Non_ASM
TI: ASM

DY

4
10

GAP-CLOSE-PW R
PG3804
1
2

GAP-CLOSE-PW R
PG3812
1
2

GAP-CLOSE-PW R
PG3815
1
2

X01 20090130

DY
X01 20090105

RT: Non_ASM
TI: ASM

GAP-CLOSE-PW R
PG3824
1
2

+1.8V_VOUT

TI: Non_ASM
RT :ASM

TI: Non_ASM
RT :ASM

GAP-CLOSE-PW R
PG3820
1
2

PR3813
42K2R2F-L-GP

GAP-CLOSE-PW R
PG3819
1
2

+1.8V_FB

D3802

PM_SLP_S4#_1
R3802

0R2J-2-GP

C3802
SCD047U10V2KX-2GP

20,26,50 PM_SLP_S4#
B

GAP-CLOSE-PW R
PG3822
1
2

I/P cap: 10U 25V K1206 X5R/ 78.10622.52L


Inductor: 1UH FDUE1040D-1R0M=P3 TOKO 2.35mohm
O/P cap: 330U 2.5V PSLV0E337M(15) 15mOhm 2.886Arms Panasonic/79.33719.L01
H/S: SI7686DP/ POWERPAK-8/ 14mOhm/ 4.5Vgs/ 84.07686.037
L/S: SI7636ADP/ POWERPAK-8/ 4.8mOhm/ 4.5Vgs/ 84.07636.037
Switching freq-->300KHz

PR3814
30KR2F-GP

GAP-CLOSE-PW R
PG3823
1
2

DY

SDMK0340L-7-F-GP

GAP-CLOSE-PW R
PG3814
1
2

X01 20090130

+PWR_SRC_1.8V

PR3803 1
PR3806 1

+1.8V_V5FILT

GAP-CLOSE-PW R
PG3806
1
2

2
A

PU3801

K
PM_SLP_S3#

PM_SLP_S4#_1

X01 20090130

+1.8V_SUS
PG3801
2

GAP-CLOSE-PW R
PG3802
1
2

Design Current = 15.799A


Peak Current = 22.57A
24.8A<OCP<29.34A

S
S
S
G

PD3801
B0530W S-7-F-GP

20,26,28,30,36,37,39,50

SCD1U25V3KX-GP

PC3816
SC4D7U6D3V5KX-3GP

+1.8V_LL1

2
1
0R3-0-U-GP

PC3808
SC10U25V6KX-1GP

2
1
+5V_ALW

PC3806
1

SI7686DP-T1-GP

PR3805

PC3807
SC10U25V6KX-1GP

PU3802

PC3802
SC1U10V3KX-3GP

GAP-CLOSE-PW R

5
6
7
8

PR3804
300R3-GP

4
3
2
1

GAP-CLOSE-PW R
PG3811
1
2

D
D
D
D

PC3801
SC1U10V3KX-3GP

+PW R_SRC_1.8V

PC3818
SC4D7U6D3V5KX-3GP

GAP-CLOSE-PW R
PG3809
1
2

+5V_ALW

PC3820
SC10U25V6KX-1GP

GAP-CLOSE-PW R

X01 20090112

PC3803
SCD1U10V2KX-4GP

PC3805
SC10U10V5KX-2GP

PC3813
SC1U10V2KX-1GP

+1.8V_SUS

+5V_ALW

DY

+0D9V_DDR_P
PU3805

GAP-CLOSE-PW R
PG3818
1
2

1
2
3
4
5

11

TPS51100DGQR-GP

<Core Design>

GAP-CLOSE-PW R

PC3811
SC10U10V5KX-2GP

VIN
VDDQSNS
S5
VLDOIN
GND
VTT
S3
PGND
VTTREF VTTSNS

+0.9V_DDR_VTT
PG3816
2

Wistron Corporation

SB:70131

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.

PC3812
SC10U10V5KX-2GP

PC3814
SCD1U10V2KX-4GP

10
9
8
7
6

+V_DDR_MCH_REF

1 MCH_REF_ON
0R0402-PAD
1 0.9V_RUN_ON
0R0402-PAD

PM_SLP_S3#

2
PR3825
2
PR3826

GND

PM_SLP_S4#_1
A

Title

DC to DC 1.8V/0.9V

Size
A3

Document Number

Date:

Monday, March 23, 2009

Rev

SB

Alba Discrete
Sheet
1

38

of

59

SSID = PWR.Plane.Regulator_gfx
+PW R_SRC

+PW R_SRC_GFX_CORE_
PG3901
1
2

GAP-CLOSE-PW R
PG3902
1
2

+PW R_SRC_GFX_CORE_

PR3905

PC3904
SC2200P50V2KX-2GP

TPS51117RGYR-GP

DY

1 2

PU3903
FDS8672S-GP

PR3902
17K4R3F-GP

DY

PR3909
2D2R5F-2-GP

PC3909
SC330P50V3KX-GP

2
1
PTC3902
ST330U2D5VDM-13GP

1
RUNPW ROK 26,30,36,37,38

GAP-CLOSE-PW R
PG3908
2
1

DY

GAP-CLOSE-PW R
PG3909
2
1
GAP-CLOSE-PW R
PG3910
1
2

+GFX_CORE_LL

DY

GAP-CLOSE-PW R
PG3911
1
2

+GFX_CORE_VOUT

GAP-CLOSE-PW R
PG3912
1
2

PC3907
SC4700P50V2KX-1GP

EN_PSV
TON
TRIP

1
2
IND-2D2UH-124-GP
2
1
PTC3901
ST330U2D5VDM-13GP

DY

1M1R2J-GP

+GFX_CORE_VOUT

PC3908
SCD1U10V2KX-4GP

+GFX_CORE_LL

3
6
7
8
15

RT: Non_ASM
TI: ASM

PR3911
10KR2F-2-GP

TI: Non_ASM
RT :ASM

GAP-CLOSE-PW R
PG3913
1
2

+GFX_CORE_FB

PR3914
110KR2F-GP

PD3902

B0530W S-7-F-GP

R3921
10KR2F-2-GP

54 PW RCNTL_1

I/P cap: 10U 25V K1206 X5R/ 78.10622.52L


Inductor: 2.2UH FDVE1040-2R2M=P3 TOKO DCR:6.8mohm Isat =14.5Arms 68.2R21B.10M
O/P cap: 330U 2.5V PSLV0E337M(15) 15mOhm 2.886Arms NEC_TOKIN/ 77.C3371.10L
H/S: FDS8880 SO-8/ 9.6mOhm/12mOhm @4.5Vgs/ 84.08880.037
L/S: FDS8672S SO-8/ 5.3mOhm/7.0mohm@4.5Vgs/ 84.08672.A37
Switching freq-->350KHz

10KR2F-2-GP

X01 20090130
A

Q3302

PW RCNTL_1_R

PD3903

B0530W S-7-F-GP

2
PR3915
12KR2F-L-GP

DY

2N7002-7F-GP

R3923
100KR2J-1-GP

0.9V

R3928

<Core Design>

X01 20081229

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

GAP-CLOSE-PW R

R3922
10KR2F-2-GP

0.95V

GAP-CLOSE-PW R
PG3918
1
2

DY

SCD047U16V2KX-1-GP
PC3916
2
1

1V

R3920
100KR2J-1-GP

SCD047U16V2KX-1-GP
PC3915
2
1

1.1V

L
L

+3.3V_DELAY

+VCC_GFX_CORE

GAP-CLOSE-PW R
PG3917
1
2

Q3301
R3927
2
1 PW RCNTL_0_R
10KR2F-2-GP

54 PW RCNTL_0

PWRCNTL_1

PR3910
12KR2F-L-GP
2N7002-7F-GP

GAP-CLOSE-PW R
PG3916
1
2

PWRCNTL_1#

PWRCNTL_0

GAP-CLOSE-PW R
PG3915
1
2

PR3913
56KR2F-GP

+3.3V_DELAY

X01 20090130

PR3912
49K9R2F-L-GP
PWRCNTL_0#

GAP-CLOSE-PW R
PG3914
1
2

TI: Non_ASM
RT :ASM

X01 20081229

+VCC_GFX_CORE

PG3906
2
1
PG3907
GAP-CLOSE-PWR-3-GP
2
1

DY

12

S
S
S
G

+PWR_SRC_GFX_CORE_

PR3901

LL
VOUT
PGOOD
GND
PGND
GND

PL3901

D
D
D
D

RT: Non_ASM
TI: ASM

2 200KR2J-L1-GP

+GFX_CORE_EN
1
+GFX_CORE_TON 2
+GFX_CORE_TRIP 11

2
1
PR3908
9K31R2F-GP

PR3907 1

+GFX_CORE_DRVH
+GFX_CORE_DRVL

VFB
VBST

DY

+GFX_CORE_FB
5
+GFX_CORE_BST 14

13
9

2 100KR2J-1-GP

DRVH
DRVL

4
3
2
1

2 0R2J-2-GP

PR3906 1

PR3903 1

+VCC_GFX_COREP

V5FILT
V5DRV

5
6
7
8

+GFX_CORE_V5FILT 4
10

PM_SLP_S3#

PU3902

K
20,26,28,30,36,37,38,50

Design Current = 11.76A


Peak Current = 11.76A
OCP min = 12.93~15.29A

4
3
2
1

SCD1U25V3KX-GP

PD3901
B0530W S-7-F-GP

26 GFX_CORE_EN

S
S
S
G

2
1
0R3-0-U-GP

Vout=0.75V*(R1+R2)/R2

2
1
PTC3903
ST330U2D5VDM-13GP

+5V_ALW

PC3906
+GFX_CORE_LL1 1

DY

2
5
6
7
8

PU3901
FDS8880-NL-GP

PC3905
SC1U10V3KX-3GP

GAP-CLOSE-PW R

GAP-CLOSE-PW R
PG3905
1
2

PR3904
300R3-GP

D
D
D
D

PC3901
SC1U10V3KX-3GP

PC3903
SCD1U50V3KX-GP
2
1

GAP-CLOSE-PW R
PG3904
1
2

GAP-CLOSE-PW R
PG3903
1
2

SC10U25V6KX-1GP
PC3902

+5V_ALW
PC3912
SC10U25V6KX-1GP

VGA_CORE

Size
A3

Document Number

Date:

Monday, March 23, 2009

Rev

SB

Alba Discrete
Sheet
1

39

of

59

(Blank)

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size
Document Number
Custom
Date:
5

Monday, March 23, 2009

(Reserve)

Rev

SB

Alba Discrete
Sheet
1

40

of

59

SSID = VIDEO

SSID = Inverter
X01 20081218

LVDS CONNECTOR
+LCDVDD

VGA_TXAOUT0- 53
VGA_TXAOUT0+ 53

VGA_TXAOUT1VGA_TXAOUT1+

VGA_TXAOUT1- 53
VGA_TXAOUT1+ 53

VGA_TXAOUT2VGA_TXAOUT2+

VGA_TXAOUT2- 53
VGA_TXAOUT2+ 53

VGA_TXACLKVGA_TXACLK+

VGA_TXACLK- 53
VGA_TXACLK+ 53

BLON_OUT_R

26

SSID = VIDEO

R4108
100KR2J-1-GP

X02 20090219

+3.3V_RUN

LCD POWER

LCD_BRIGHTNESS
LCD_TST

DY

1
2
3

DY

+15V_ALW

2
R4104
1
C4106

1
330KR2J-L1-GP
2 FPVCC_CTL1
SCD1U50V3KX-GP

Q4101
D
D
G

+LCDVDD

D 6
D 5
S 4

SI3456BDV-T1-GP

R4109
120R3J-2-GP

1
R4107

DY

2
100KR2J-1-GP

C4103
SC10U6D3V5KX-1GP

VGA_TXBCLK- 53
VGA_TXBCLK+ 53

VGA_TXAOUT0VGA_TXAOUT0+

BRIGHTNESS

C4105
SCD1U10V2KX-4GP

VGA_TXBCLKVGA_TXBCLK+

1
33R2J-2-GP

VGA_TXBOUT2- 53
VGA_TXBOUT2+ 53

VGA_TXBOUT2VGA_TXBOUT2+

R4103

VGA_TXBOUT1- 53
VGA_TXBOUT1+ 53

1
2

1
VGA_TXBOUT1VGA_TXBOUT1+

LBKLT_CTL 53

20.F1093.040

100R2J-2-GP
2
BLON_OUT 26
LCD_TST 26
LDDC_CLK 54
R4101
LDDC_DATA 54
1
2
VGA_TXBOUT0- 53
VGA_TXBOUT0+ 53 100R2J-2-GP

IPEX-CONN40-2R-GP

DY

49

R4106
BLON_OUT_R
LCD_TST
LDDC_CLK
LDDC_DATA
LCD_DET_G
VGA_TXBOUT0VGA_TXBOUT0+

C4102
SCD1U50V3KX-GP

B0530WS-7-F-GP

47

26

1
FUSE-3A32V-7-GP

D4101

EC4101
SC33P50V2JN-3GP

46

+3.3V_DELAY

45

C4101
SC1KP50V2KX-1GP

DYR4102
10KR2J-3-GP

R4105 33R2J-2-GP
+3.3V_DELAY_EEPROM 1
2
LCD_BRIGHTNESS
LCD_CBL_DET#

+3.3V_RUN

44

Removed

EC4119
SC33P50V2JN-3GP

43

2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
51

+PWR_SRC
F4101

42

50
1

41

GFX_PWR_SRC

48

C4133
SCD1U10V2KX-4GP

GFX_PWR_SRC

LCD1

INVERTER POWER

Q4102

For EMI request

LCDVDD_1

2N7002SPT

+3.3V_ALW
53 LCDVDD_EN

3
26 LCD_TST_EN

1
R4110

2
D4102
BAT54C-7-F-GP

ENVDD_D

2
IN

R1

R2
Q4103
DDTC144EUA-7F-GP

3 OUT

2
47KR2J-2-GP
FPVCC_CTL3

1 GND

X01 20081218

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

LCD/Inverter Connector

Size
Document Number
Custom
Date:

Monday, March 23, 2009

Rev

SB

Alba Discrete
Sheet

41

of

59

SSID = LOM

1.Tx+/Tx- are pairs. Rx+/Rx- are pairs.


2.No vias, No 90 degree bends.
3.pairs must be equal lengths.
4.6mil trace width,12mil separation.
5.36mil between pairs and any other trace.
6.Must not cross ground moat,except
RJ-45 moat.

10/100M Lan Transformer


XF4201

12

RJ45-3

RJ45-6

11
10
9
8

25 MDI0-

XFR_RXC

4
5

XFR_CMT
RJ45-1

RJ45-2

6
XFORM-285-GP

8
7
6
5

RN4202
SRN75J-1-GP

AFTP4206
AFTP4207
AFTP4209
AFTP4208
AFTP4202
AFTP4203
AFTP4204
AFTP4201
AFTP4217
AFTP4218
AFTP4216

LAN_TERMINAL

1
1
1
1
1
1
1
1
1
1
1

C4221
SC1KP50V2KX-1GP
2
1
R4206
2
1
C4220
SC1KP50V2KX-1GP

RJ45-1
RJ45-6
RJ45-3

B2
B1
8
7
6
5
4
3
2
1

LAN_LINK100#
LAN_LED_POWER_2
LAN_LINK10#

A3
A2
A1

LAN_LED_POWER
RJ45-7

25 LAN_LINK100#

1 470R2J-2-GP

RJ45-138-GP-U1

C4205
1

22.10277.091

SC1500P2KV8KX-3GP
+3.3V_LAN
LAN_LINK10#
LAN_LINK100#
RJ45-1
RJ45-2
RJ45-3
RJ45-4
RJ45-6
RJ45-7
LAN_LED_POWER
LAN_TX/RX#

AFTP4220

+5V_CRT_RUN

2
1

+5V_CRT_RUN
RN4201
SRN2K2J-1-GP

3
4
CRT_G

1
2
BLM18BA220SN1D-GP

CRT_R
CRT_G
CRT_B

1
2
3

JVGA_HS
JVGA_VS

13
14

C4208
SC22P50V2JN-4GP

NP1
NP2

VCC_CRT

12
15

1
1
C4215
SC22P50V2JN-4GP

L4204
54 M_GREEN

DDC_DATA_CON
DDC_CLK_CON

CRT_R

1
2
BLM18BA220SN1D-GP

54 M_RED

CRT1

54 DDC_DATA_CON
54 DDC_CLK_CON

L4203

DDCDATA_ID1
DDCCLK_ID3

11
4

GND
GND
GND
GND
GND
GND
GND

5
6
7
8
10
16
17

CRT_R
CRT_G
CRT_B
JVGA_HS
JVGA_VS

DY

+5V_CRT_RUN

10

14

2
CRT_R

AFTP4221

D4204

7
D4202

U4201C
TSAHCT125PW-GP

C4216
SCD01U16V2KX-3GP

B0530WS-7-F-GP

Hsync & Vsync level shift

+5V_RUN

DY
BAV99-4-GP

C4217
SCD1U16V2KX-3GP

+5V_RUN

D4201

+5V_RUN

20.20735.015

DY
2

+5V_CRT_RUN
DDC_DATA_CON
DDC_CLK_CON
CRT_R
CRT_G
CRT_B
JVGA_HS
JVGA_VS

SC33P50V2JN-3GP
C4206

+5V_CRT_RUN

1
1
1
1
1
1
1
1

SC33P50V2JN-3GP
C4207

VIDEO-15-84-GP-U1
AFTP4211
AFTP4212
AFTP4210
AFTP4215
AFTP4214
AFTP4213
AFTP4222
AFTP4223

C4214
SC8P250V2CC-GP

1
2

C4213
SC8P250V2CC-GP

1
2

C4212
SC8P250V2CC-GP

C4211
SC8P250V2CC-GP

1
2

C4210
SC8P250V2CC-GP

C4209
SC8P250V2CC-GP

R4203
150R2F-1-GP

R4202
150R2F-1-GP

R4205
150R2F-1-GP

1
2

CRT_B

1
2
BLM18BA220SN1D-GP

NP1
NP2

NC#11
NC#4

L4205
54 M_BLUE

X02 20090224

*Pi-filter & 150 Ohm pull-down


resistors should be as close
as to CRT CONN.
* RGB signal will hit 75 Ohm
first, then pi-filter, finally
CRT CONN.

9
25 LAN_LINK10#

Layout Note:

SSID = VIDEO

10
1 470R2J-2-GP

RJ45-2
RJ45-4

+3.3V_LAN

25 MDI1-

RJ45
+3.3V_LAN

RJ45-4
RJ45-7

C4201
SCD01U16V2KX-3GP

C4202
SCD01U16V2KX-3GP

LAN_TX/RX#

R4201 2

1
2
3
4

25 MDI1+

25 LAN_TX/RX#

C4219
SC1KP50V2KX-1GP

RJ45 Connector

2
2

25 MDI0+

DY
1

HSYNC_5

+5V_RUN

RN4203

4
3

VSYNC_5

1
2

JVGA_HS
JVGA_VS

13

14

D4203

TSAHCT125PW-GP

Wistron Corporation

2
12

CRT_B

SRN33J-5-GP-U

TSAHCT125PW-GP

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.

11

DY
U4201D
TSAHCT125PW-GP

BAV99-4-GP

Title
Size
Custom
Date:

<Core Design>

BAV99-4-GP

14
54,56 VGA_VSYNC

U4201B

U4201A

54,56 VGA_HSYNC

14

CRT_G

LAN/CRT Connector

Document Number

Rev

SB

Alba Discrete
Monday, March 23, 2009

Sheet
1

42

of

59

SSID = Wireless

Mini Card Connector(802.11a/b/g/n)


D

+1.5V_RUN

+3.3V_RUN

WLAN
53
NP1
2

R4329 1
R4323 1
R4322 1

DY
DY

2 0R2J-2-GP
2 0R2J-2-GP

2 0R2J-2-GP
2 0R2J-2-GP

7 CLK_PCIE_MINI1#
7 CLK_PCIE_MINI1

E51_RXD_R
E51_TXD_R
19 PCIE_IRXN2_MTXN2
19 PCIE_IRXP2_MTXP2
19 PCIE_ITXN2_MRXN2
19 PCIE_ITXP2_MRXP2
+3.3V_RUN

WLAN_ACT

R4321
EC4301
SC220P50V2KX-3GP

+5V_ALW

DY

+5V_MINI_DEBUG

0R3-0-U-GP

4
6
8
10
12
14
16

17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51

18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
NP2

LPC_LFRAME#_IN
LPC_LAD3_IN
LPC_LAD2_IN
LPC_LAD1_IN
LPC_LAD0_IN

LPC_LFRAME#_IN
LPC_LAD3_IN 18
LPC_LAD2_IN 18
LPC_LAD1_IN 18
LPC_LAD0_IN 18

18

WIFI_RF_EN 26
PLT_RST# 11,19,25,26,50
+3.3V_RUN

PLT_RST#

ICH_SMBCLK
ICH_SMBDATA

USB_P4-

R4330
0R3-0-U-GP
2

USB_PN4

USB_PN4

19

ICH_SMBCLK 7,16,17,20
ICH_SMBDATA 7,16,17,20

USB_P4USB_P4+

1
2

1
2

C4303
SC10U6D3V5MX-3GP

1
2

DY

7 PCLK_FWH

DY
DY

DY

R4328 1

26 E51_RXD
26 E51_TXD

+1.5V_RUN

C4302
SCD1U16V2KX-3GP

1
2

DY

C4301
SC10U6D3V5MX-3GP

+3.3V_RUN

PLT_RST#

11,19,25,26,50

3
5
7
9
11
13
15

1
C4305
SCD1U16V2KX-3GP

C4306
SCD1U16V2KX-3GP

DY
2

C4304
SCD1U16V2KX-3GP

45 WLAN_ACT
45 BT_ACT
7 MINI1_CLKREQ#

+3.3V_RUN

DY
DLW21SN900SQ2LUGP
L4301

USB_P4+

54
SKT-MINI52P-6-GP-U

+5V_ALW

USB_PP4

USB_PP4 19

R4331
0R3-0-U-GP

62.10043.261

SSID = User.Interface

ITP Connector
B

8 ITP_TMS
8 ITP_TRST#
8 ITP_TCK
8 ITP_TDO
7 CLK_CPU_ITP#
7 CLK_CPU_ITP
8,10 H_CPURST#
8 ITP_BPM#5
8 ITP_BPM#4
8 ITP_BPM#3
8 ITP_BPM#2
A

8 ITP_BPM#1
8 ITP_BPM#0

1
2

R4315
150R2F-1-GP

1
2

R4319
39R2F-GP

1
2

R4311
56R2F-1-GP

H_CPURST# use pull-up Resistor close


ITP connector 500 mil ( max ),
others place near CPU side.
ITP1
29

ITP_TDI

ITP_TMS
ITP_TRST#
ITP_TCK
ITP_TDO
CLK_CPU_ITP#
CLK_CPU_ITP

R4301

R4320 1

ITP_BPM#5

DY

DY

2 22D6R2F-L1-GP

ITP_TDO_1

ITP_CPURST#

2 124R2F-U-GP

ITP_BPM#4
ITP_BPM#3
ITP_BPM#2
ITP_BPM#1
ITP_BPM#0
ITP_DBRESET#
1

8,20 ITP_DBRESET#

DY

8 ITP_TDI

R4306
51R2F-2-GP

DY

R4312
51R2F-2-GP

+1.05V_VCCP

R4317
649R2F-GP

R4326
R4308
27R2F-GP

+3.3V_ALW

+1.05V_VCCP

2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28

+1.05V_VCCP use Decoupling Capacitor close


ITP connector 100 mil ( max )

CPU

ITP Connector
TCK(PIN 5)

TCK(PIN AC5)
FBO(PIN 11)

DY

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

30
Title

MLX-CON28-3-GP

150R2F-1-GP

20.K0116.028

MINICARD(WLAN)/ITP CONN

Size
Document Number
Custom
Date:
5

Rev

SB

Alba Discrete

Monday, March 23, 2009

Sheet
1

43

of

59

SSID = SATA

SSID = SATA

ODD Connector

SATA HDD Connector

+5V_RUN

C4406
SCD1U10V2KX-4GP
ODD1

NP1
NP2

NP1
NP2

GND
GND
GND
GND
GND
GND
GND

S1
S4
S7
P5
P6
8
9

C4411
SC10U6D3V5MX-3GP

AFTP4412

C4405
SC10U6D3V5MX-3GP

62.10065.351

1
1
1
1
1

DY DY

C4410
SCD1U16V2KX-3GP

+5V_RUN

SKT-SATA7P+6P-22-GP-U1

AFTP4407
AFTP4410
AFTP4413
AFTP4414
AFTP4415

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
NP2
17

+3.3V_RUN

A+
AB+
B-

18 SATA_IRXN0_HTXN0_C
18 SATA_IRXP0_HTXP0_C

AFTP4411

S2
S3
S6
S5

SATA_IRXP1_OTXP1
SATA_IRXN1_OTXN1

ODD_MD

SATA_IRXN0_HTXN0
SATA_IRXP0_HTXP0

1 SCD01U50V2KX-1GP
1 SCD01U50V2KX-1GP

P1
P4

C4402
C4403

AFTP4403
AFTP4402
AFTP4405
AFTP4406
AFTP4404
AFTP4408

SATA_ITXP1_ORXP1
SATA_ITXN1_ORXN1
SATA_IRXN1_OTXN1
SATA_IRXP1_OTXP1
+5V_RUN

1
1
1
1
1
1

2
2

DP
MD

2
2

C4408
C4409

+5V
+5V

1
1

C4404
SCD1U16V2KX-3GP

18 SATA_ITXP1_ORXP1
18 SATA_ITXN1_ORXN1
18 SATA_IRXP1_OTXP1_C
18 SATA_IRXN1_OTXN1_C

P2
P3

SCD01U50V2KX-1GP
SCD01U50V2KX-1GP

SATA_RX- and SATA_RX+ Trace


Length match within 20 mil

S2
S3
S4
S5
S6
S7

18 SATA_ITXP0_HRXP0
18 SATA_ITXN0_HRXN0

C4407
SC10U6D3V5MX-3GP

HDD1

16
NP1
S1

SATA_ITXP0_HRXP0
SATA_ITXN0_HRXN0
SATA_IRXN0_HTXN0
SATA_IRXP0_HTXP0
+3.3V_RUN
+5V_RUN

AFTP4401

SKT-SATA7P+15P-27-GP

22.10300.551

X01 20090108

SSID = AUDIO
AUD_SPK_L-_C
AUD_SPK_L+_C
AUD_SPK_R-_C
AUD_SPK_R+_C

2
3
4

INT_MIC_L_R

EC4405
SC1KP50V2KX-1GP

MIC1
MICROPHONE-38-GP-U1

20.F0711.004

MLX-CON4-16-GP-U

22 INT_MIC_L_R

AUD_SPK_L+_C
AUD_SPK_R-_C
AUD_SPK_R+_C

2 0R3-0-U-GP
2 0R3-0-U-GP
2 0R3-0-U-GP

EC4404
MLVG0402220NV05-GP

R4401 1
R4403 1
R4404 1

AUD_SPK_L+
AUD_SPK_RAUD_SPK_R+
EC4403
MLVG0402220NV05-GP

AUD_SPK_L-_C

2 0R3-0-U-GP

EC4402
MLVG0402220NV05-GP

R4402 1

EC4401
MLVG0402220NV05-GP

22 AUD_SPK_L+
22 AUD_SPK_R22 AUD_SPK_R+

AUD_SPK_L-

SPK1
22 AUD_SPK_L-

Internal MIC

Speaker Connector

1
1
1
1

AFTP4416
AFTP4419
AFTP4418
AFTP4417

SSID = AUDIO

AFTP4424

X01 20081215

X02 20090219

SSID = Thermal

Fan Connector
AFTP4409

EMC2102_FAN_TACH_1

AFTP4421

EMC2102_FAN_DRIVE
FAN1

5
1
28 EMC2102_FAN_TACH_1

EMC2102_FAN_TACH_1

28 EMC2102_FAN_DRIVE

EMC2102_FAN_DRIVE
AFTP4423

*Layout* 15 mil

D4401
SDMK0340L-7-F-GP

<Core Design>

Wistron Corporation

6
1

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.

FOX-CON4-15-GP

20.D0241.104

C4401
SC22U6D3V5MX-2GP

2
3
4

Title

HDD/ODD/FAN/SPEAKER/MICRev

X02 20090219

Size
Document Number
Custom

Date: Monday, March 23, 2009

SB

Alba Discrete
Sheet

44

of

59

SSID = Touch.Pad

RN4501
SRN10KJ-5-GP

AFTP4531

KB1

2
1

Internal KeyBoard Connector

+5V_RUN

+5V_RUN

31

KROW7
KROW6
KROW4
KROW2
KROW5
KROW1
KROW3
KROW0
KCOL5
KCOL4
KCOL7
KCOL6
KCOL8
KCOL3
KCOL1
KCOL2
KCOL0
KCOL12
KCOL16
KCOL15
KCOL13
KCOL14
KCOL9
KCOL11
KCOL10

1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1

AFTP4502
AFTP4501
AFTP4505
AFTP4504
AFTP4503
AFTP4506
AFTP4508
AFTP4507
AFTP4511
AFTP4510
AFTP4509
AFTP4512
AFTP4514
AFTP4513
AFTP4517
AFTP4516
AFTP4515
AFTP4518
AFTP4520
AFTP4519
AFTP4523
AFTP4522
AFTP4521
AFTP4524
AFTP4526

3
4

TPAD1
5
1

2
3
4
6

26 TPCLK
26 TPDATA
AFTP4535
AFTP4534
AFTP4536

1
1
1

+5V_RUN
TPCLK
TPDATA

C4505
SC33P50V2JN-3GP

TouchPad Connector

1
1

2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30

KB_DET# 26

C4502
SC33P50V2JN-3GP

2
2

C4503
SCD1U16V2KX-3GP

SSID = KBC

AFTP4533

1
FOX-CON4-12-GP-U

20.K0179.004
KROW[0..7]

26

KCOL[0..16]

26

X01 20090109

SSID = User.Interface

AFTP4532

32
HRS-CON30-1-GP-U

20.K0259.030

Bluetooth Module conn.


BT1

AFTP4539
AFTP4540
AFTP4541

1
1
1

WLAN_ACT
BDC_ON
BLUETOOTH_EN
BT_LED
BLUETOOTH_GPIO3
BLUETOOTH_GPIO5

3
5
7
9
11
13

15
NP1
2

+3.3V_RUN

BT_ACT

4
6
8
10
12
14
NP2
16

USB_PP6
USB_PN6

HRS-CONN14D-GP

AFTP4542

AFTP4538

BLUETOOTH_DET#

SC2D2U10V3KX-1GP
C4501

AFTP4537

20.F0987.014

AFTP4528
AFTP4527
AFTP4544
AFTP4543
AFTP4546
AFTP4545

1
1
1
1
1
1

WLAN_ACT
BLUETOOTH_EN
BT_ACT
+3.3V_RUN
USB_PP6
USB_PN6

R4502
10KR2J-3-GP

DY
2

R4501
100KR2J-1-GP

1
2

DY

EC4502
SC220P50V2KX-3GP
2
1

USB_PP6
USB_PN6
BT_ACT
BLUETOOTH_EN
WLAN_ACT

19 USB_PP6
19 USB_PN6
43 BT_ACT
26 BLUETOOTH_EN
43 WLAN_ACT

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

KeyBoard/TouchPad/BT

Size
Document Number
Custom
Date:
5

Monday, March 23, 2009

Rev

SB

Alba Discrete
Sheet
1

45

of

59

Remove Modem
X01 20081208

USB Power

+5V_ALW
U4601

+5V_USB1

TC4601
ST100U6D3VBM-7GP

C4601
SC1U10V3KX-3GP

DY
USB_OC#0 19
USB_OC#1 19

C4602
SCD1U10V2KX-4GP

at least 80 mil

8
7
6
5

OC1#
OUT1
OUT2
OC2#

TPS2062AD-GP

DY
2

GND
IN
EN1#
EN2#

26,51 USB_PWR_EN#

1
2
3
4

R4603
100KR2J-1-GP

C4608
SCD1U10V2KX-4GP

at least 80 mil

R4602

0R3-0-U-GP

USB_P0-

+5V_USB1
D4601
1

19 USB_PN0

USB_PN0

+5V_USB1

+5V_USB1

TR4601
L-63UH-GP

DY

USB1

USB2

19 USB_PP0

6
1
USB_P0+

USB_PP0

USB_P0+

USB_P0-

USB_P0USB_P0+
AFTP4603

USB_P1USB_P1+

2
3
4
5

PRTR5V0U2X-GP

R4601

6
1

AFTP4604

SKT-1394-4P-27-GP-U

0R3-0-U-GP

2
3
4
5
SKT-1394-4P-27-GP-U

22.10218.T51

22.10218.T51

R4604

AFTP4609
AFTP4602
AFTP4601

D4602

1
1
1

+5V_USB1
USB_P0USB_P0+

AFTP4610
AFTP4612
AFTP4611

+5V_USB1
USB_P1USB_P1+

<Core Design>

USB_P1+

Wistron Corporation

PRTR5V0U2X-GP

USB_PP1

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.

USB_P1+
R4606

X01 20081222

Title

0R3-0-U-GP

Size
Document Number
Custom
Date:

1
1
1

X01 20081208
USB_P1-

USB_P1-

TR4602
L-63UH-GP

DY

19 USB_PP1

+5V_USB1

0R3-0-U-GP

USB_PN1

19 USB_PN1

Monday, March 23, 2009

MDC CONN

Rev

SB

Alba Discrete
Sheet
1

46

of

59

Camera Connector

SSID = Flash.ROM

SSID = User.Interface
R4705

0R3-0-U-GP
USB_PP11 19

SPI FLASH ROM (16M bits)

CON3

10
1

AFTP4705

22

AUD_DMIC_IN0

2 R4701
0R3-0-U-GP

R4702
2 33R2J-2-GP

+3.3V_CAMERA
AUD_DMIC_IN0_R
1
AUD_DMIC_CLK_G_R

L2
DLW21SN900SQ2LUGP

DY
AUD_DMIC_CLK_G 22
CAMERA_DET# 26

USB_PN11 19
C4701
SC4D7P50V2CN-1GP

DY

MLX-CON8-6-GP-U

C4706
SCD1U16V2KX-3GP

2
1

DY

C4705
SCD1U16V2KX-3GP

C4704
SC10U6D3V5MX-3GP

RN4701
SRN100KJ-6-GP

R4711
100KR2J-1-GP

+3.3V_RTC_LDO

3
4

+3.3V_RTC_LDO

CAMERA_USB1+
CAMERA_USB1-

2
3
4
5
6
7
8

R4704

20.F0693.008

0R3-0-U-GP

EC_SPI_HOLD#

EC_SPI_HOLD#
R4709 1
33R2J-2-GP

EC_SPI_CLK 26
EC_SPI_DO 26

EC4701
MLVG0402220NV05-GP

EC4702
MLVG0402220NV05-GP

1
2

EC4709
SC4D7P50V2CN-1GP

W25X16AVSSIG-GP

EC4711
SC4D7P50V2CN-1GP

AUD_DMIC_CLK_G_R

8
7
6
5

CS#
VCC
DO
HOLD#
W P#
CLK
GND
DIO

CAMERA_DET#
AUD_DMIC_CLK_G_R
AUD_DMIC_IN0_R
+3.3V_CAMERA
CAMERA_USB1CAMERA_USB1+

EC4710
SC4D7P50V2CN-1GP

1
2
3
4

EC_SPI_WP#

1
1
1
1
1
1

2 0R2J-2-GP
2 0R2J-2-GP

R4710 1
R4712 1

AFTP4703
AFTP4704
AFTP4707
AFTP4706
AFTP4709
AFTP4708

EC_SPI_CS#

26 EC_SPI_CS#
26 EC_SPI_DI
26 EC_SPI_WP#_R

AUD_DMIC_IN0_R

+3.3V_RTC_LDO

U4701

X01 20081215

Digital Mic Power


+3.3V_RUN

+3.3V_CAMERA
R4703

2
1

0R3-0-U-GP

SSID = User.Interface

EC4703
SCD1U16V2KX-3GP

DY

C4702
SC4D7U6D3V3KX-GP

Power Button LED


+5V_ALW
Q4703
R2

R1

PWR_BTN_LED#

26 PWR_BTN_LED#

POWER_SW_LED_R

DDTA144VCA-7-F-GP

2
1
R4788
330R2J-3-GP

SSID = RBATT

POWER_SW_LED_B 51

RTC Connector

EC4704

+3.3V_RTC_LDO

MLVG0402220NV05-GP
+RTC_CELL

D4702

Power/Battery LED

RTC1
R4706

X01 20081215

1
R4713

R1

DY
2

R2
PDTC124EU-1-GP

1
1

26 PWRLED

LED_PWR#

PWR_LED_B#

PWR_LED_B# 50

Q4702

EC4708
SC220P50V2KX-3GP

R1

DY
2

R2
PDTC124EU-1-GP

1
1

26 BATLOW_LED

1
2
NP1
NP2

1KR2J-1-GP
AFTP4702

PW R
GND
NP1
NP2

BAT-CON2-1-GP-U

Width=20mils

AFTP4701
A

BAT54CW-1-GP

C4707
SC1U10V3KX-3GP

BAT_LED_B# 50

R4714
LED_BAT#

RTC_PWR

330R2J-3-GP

Q4701

+RTC_VCC

62.70001.011

+RTC_VCC

BAT_LED_B#
A

<Core Design>

270R2J-L

Wistron Corporation

EC4707
SC220P50V2KX-3GP

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.
Title

SPI Flash/LED/Camera/RTC

Size
Document Number
Custom
Date:
5

Monday, March 23, 2009

Rev

SB

Alba Discrete
Sheet
1

47

of

59

(Blank)

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size
Document Number
Custom
Date:
5

Monday, March 23, 2009

(Reserve)

Rev

SB

Alba Discrete
Sheet
1

48

of

59

(Blank)

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size
Document Number
Custom
Date:
5

Monday, March 23, 2009

(Reserve)

Rev

SB

Alba Discrete
Sheet
1

49

of

59

SSID = ExpressCard

New Card Connector


Lay out close to Chip

7 CLK_48M_CARD

+3.3V_RUN

19 USB_PN10
19 USB_PP10

2
52
NP1

1
51

CLK_PCIE_NEW
CLK_PCIE_NEW#

7
7

PLT_RST_CARDREADER#

For 2nd Source 74.05538.073


R5002

AFTP5001

DY

PLT_RST# 11,19,25,26,43

+1.5V_RUN
+1.5V_CARD
+3.3V_CARD
+3.3V_RUN

2K2R2J-2-GP

16
14
13
5
4

NC#16
NC#14
NC#13
NC#5
NC#4

C5011
SC1U10V2KX-1GP

DY

15
17
11
12
3
2

X01 20081229
B

1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1

C5010
SCD1U16V2KX-3GP

C5008
SCD1U16V2KX-3GP

1
2

C5002
SC10U6D3V5MX-3GP

1
2

C5004
SCD1U16V2KX-3GP

C5003
SC10U6D3V5MX-3GP

1
2

U5001

SMB_DATA 20
SMB_CLK 20

20.F1400.050

C5001
SC4D7U6D3V5KX-3GP

1
2

NEWCARD_OC#

USB_PP7 19
USB_PN7 19

FOX-CONN50A-2-GP

AFTP5029
AFTP5032
AFTP5031
AFTP5030
AFTP5020
AFTP5025
AFTP5023
AFTP5024
AFTP5026
AFTP5004
AFTP5006
AFTP5007
AFTP5009
AFTP5005
AFTP5008
AFTP5011
AFTP5010
AFTP5017
AFTP5013
AFTP5014
AFTP5012
AFTP5019
AFTP5015
AFTP5022
AFTP5021
AFTP5016
AFTP5018
AFTP5003
AFTP5027
AFTP5028

+3.3V_CARDAUX

TP5001
PM_SLP_S3# 20,26,28,30,36,37,38,39

21
19
18
1

NEWCARD_CLKREQ#

7 NEWCARD_CLKREQ#

+1.5V_CARD

PCIE_IRXP5_NTXP5 19
PCIE_IRXN5_NTXN5 19

THERMAL_PAD
OC#
RCLKEN
STBY#

PERST#
+3.3V_CARDAUX
20,25 PCIE_WAKE#
+1.5V_CARD

+3.3V_CARD

PCIE_ITXP5_NRXP5 19
PCIE_ITXN5_NRXN5 19

GND

CPPE#
CPUSB#

DY

+3.3V_CARD

SHDN#
PERST#
CPUSB#
CPPE#
SYSRST#

20
8
9
10
6

PERST#
CPUSB#
CPPE#
NRST

AUXOUT
AUXIN
1.5VOUT
1.5VIN
3.3VOUT
3.3VIN

AFTP5002

BAT_LED_B# 47
PWR_LED_B# 47

+3.3V_RUN

+1.5V_RUN
C5005
SCD1U16V2KX-3GP

+3.3V_ALW
AUD_VREFOUT_B 22
AUD_EXT_MIC_L 22
AUD_EXT_MIC_R 22

C5009
SCD1U16V2KX-3GP

22 EXT_MIC_JD#
22 AUD_HP1_JD#

53
49
47
45
43
41
39
37
35
33
31
29
27
25
23
21
19
17
15
13
11
9
7
5
3

22 AUD_HP1_JACK_L
22 AUD_HP1_JACK_R

C5007
SCD1U16V2KX-3GP

+5V_ALW

CON2

NP2
54
50
48
46
44
42
40
38
36
34
32
30
28
26
24
22
20
18
16
14
12
10
8
6
4

PWR_LED_B#
BAT_LED_B#
+5V_ALW
PLT_RST_CARDREADER#
PCIE_ITXP5_NRXP5
PCIE_ITXN5_NRXN5
PCIE_IRXP5_NTXP5
PCIE_IRXN5_NTXN5
AUD_VREFOUT_B
AUD_HP1_JACK_L
AUD_HP1_JACK_R
+3.3V_RUN
CPUSB#
USB_PP7
USB_PN7
AUD_EXT_MIC_L
AUD_EXT_MIC_R
EXT_MIC_JD#
AUD_HP1_JD#
CLK_48M_CARD
NEWCARD_CLKREQ#
+3.3V_CARD
PERST#
+3.3V_CARDAUX
PCIE_WAKE#
+1.5V_CARD
SMB_DATA
SMB_CLK
USB_PN10
USB_PP10

+3.3V_CARDAUX
+3.3V_ALW
+1.5V_CARD

PM_SLP_S4# 20,26,38

RN5001

4
3

DY

1
2

+3.3V_ALW

SRN100KJ-6-GP
R5001 2
C5006 2

1 0R2J-2-GP

DY1

PLT_RST# 11,19,25,26,43

SC22P50V2JN-4GP

TPS2231RGP-GP-U
B

+3.3V_RUN
+3.3V_CARD
+1.5V_RUN

+1.5V_CARD Max. 650mA, Average 500mA.


+3.3V_CARD Max. 1300mA, Average 1000mA
+3.3V_CARDAUX Max. 275mA

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

Express Card Board CONN

Size
Document Number
Custom
Date:
5

Monday, March 23, 2009

Rev

SB

Alba Discrete
Sheet
1

50

of

59

SSID = USB
+5V_USB2
CON4
R5102

1
USB_PN2

L-63UH-GP
TR5102

DY
1

AFTP5101

JST-CON6-17-GP

21.D0220.106

TC5101
ST100U6D3VBM-7GP

1
2

C5101
SC1U10V3KX-3GP

2
USB_OC#2 19

DY

TPS2062AD-GP

2
3
4
5
6

USB_P2USB_P2+

+5V_USB2

at least 80 mil

8
7
6
5

OC1#
OUT1
OUT2
OC2#

C5102
SCD1U10V2KX-4GP

26,46 USB_PWR_EN#

GND
IN
EN1#
EN2#

C5105
SCD1U10V2KX-4GP

1
2
3
4

DY
2

U5101

at least 80 mil

R5105
100KR2J-1-GP

+5V_ALW

USB_P2-

0R3-0-U-GP

USB Power

19 USB_PN2

USB_PP2

19 USB_PP2

USB_P2+
R5104

X01 20081208

0R3-0-U-GP
AFTP5104
AFTP5105
AFTP5108

+5V_USB2

USB_PN2

D5101
1

1
1
1

+5V_USB2
USB_P2USB_P2+

USB_PP2

PRTR5V0U2X-GP

X01 20081222

SSID = User.Interface

AFTP5111
AFTP5109

1
1

+3.3V_ALW
LID_CLOSE#_1

+3.3V_ALW

Power Button Board CONN

Hall Sensor Connector


B

+3.3V_ALW

C5103
SCD1U16V2KX-3GP

CON1
R5106
33R2J-2-GP

2
3
4
6

EC5101

R5108
100KR2J-1-GP

5
1

KBC_PWRBTN#_IN

47 POWER_SW_LED_B

26 LID_CLOSE#

1
R5107

LID_CLOSE#_1
2
10R2J-2-GP
AFTP5110

FOX-CON4-12-GP-U

NP1
10

C5104
SCD047U10V2KX-2GP

MLVG0402220NV05-GP
AFTP5103

LID_CLOSE#

26 KBC_PWRBTN#

CON5

X01 20090130

2
3
4
5

FOX-CONN10C-GP

20.K0179.004

9
8
7
6
NP2

20.F1474.010

X01 20090109
AFTP5102

KBC_PWRBTN#_IN

AFTP5112

POWER_SW_LED_B

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

Power Button/Hall Sensor/USB Board


Rev

Size
Document Number
Custom
Date:
5

Monday, March 23, 2009

SB

Alba Discrete
Sheet
1

51

of

59

SSID = Mechanical

HOLE
H18

HOLE

H17
HOLE

HOLE

HOLE
HOLE

1
1

H5

HOLE

H20

H16

HOLE

C5213
SCD1U25V2ZY-1GP
2
1

X01 20081215

Roger Request

Thermal

Bluetooth

MINI CARD

H8
STF237R115H123-GP

H6
STF237R117H83-1-GP

H7
STF256R89H178-GP

Removed
X01 20081208

C5212
SCD1U25V2ZY-1GP
2
1

DY

C5211
SCD1U25V2ZY-1GP
2
1

DY

C5210
SCD1U25V2ZY-1GP
2
1

C5209
SCD1U25V2ZY-1GP
2
1

+PWR_SRC

H14

H19

HOLE

H11

HOLE

X02 20090305

Removed
X01 20081208

1
H3

DY

H4

HOLE

H2
HOLE

H13
HOLE

DY

1
+1.8V_SUS_P

EMI Request

DY

+1.8V_SUS_P

EC5211
SCD1U25V2ZY-1GP
2
1

DY

+1.8V_SUS
EC5212
SCD1U25V2ZY-1GP
2
1

EC5210
SCD1U25V2ZY-1GP
2
1

EC5209
SCD1U25V2ZY-1GP
2
1

DY

EC5208
SCD1U25V2ZY-1GP
2
1

EC5207
SCD1U25V2ZY-1GP
2
1

DY

EC5206
SCD1U25V2ZY-1GP
2
1

DY

EC5205
SCD1U25V2ZY-1GP
2
1

EC5204
SCD1U25V2ZY-1GP
2
1

EC5203
SCD1U25V2ZY-1GP
2
1

EC5202
SCD1U25V2ZY-1GP
2
1

EC5201
SCD1U25V2ZY-1GP
2
1

+1.8V_SUS

EC5213
SCD1U25V2ZY-1GP
2
1

+PWR_SRC

H1
HOLE

H10
HOLE

H9
HOLE

H12

SPR5201
SPR5206

1
1
SPRING-62-GP

34.4CK01.001

DY

34.4B417.001

34.4A902.001

SPRING-63-GP
SPR5202

SPR5207

DY
SPRING-63-GP

DY
SPRING-63-GP
SPR5208

SPR5203

DY

X01 20090105

DY
SPRING-24-GP

SPRING-63-GP
SPR5209

1
SPR5204

DY
SPRING-71-GP

DY
SPRING-57-GP

<Core Design>
SPR5205

Wistron Corporation

DY

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.

SPRING-57-GP

X02 20090304
Title

Miscellaneous Components

Size
Document Number
Custom
Date:
5

Monday, March 23, 2009

Rev

SB

Alba Discrete
Sheet
1

52

of

59

1 OF 7
PCIE_MTX_GRX_P[0..15]
PCIE_MTX_GRX_N[0..15]
C5302 1

2 SCD1U16V2KX-3GP
1
C5304

PCIE_MRX_GTX_P0
PCIE_MRX_GTX_N0
2
SCD1U16V2KX-3GP

PCIE_MTX_GRX_P1
PCIE_MTX_GRX_N1

AE29
AD28

PCIE_RX1P
PCIE_RX1N

PCIE_TX1P
PCIE_TX1N

AG29 PCIE_MRX_GTX_R_P1
AF28 PCIE_MRX_GTX_R_N1

C5301 1

2 SCD1U16V2KX-3GP
1
C5305

PCIE_MRX_GTX_P1
PCIE_MRX_GTX_N1
2
SCD1U16V2KX-3GP

PCIE_MTX_GRX_P2
PCIE_MTX_GRX_N2

AD30
AC31

PCIE_RX2P
PCIE_RX2N

PCIE_TX2P
PCIE_TX2N

AF27 PCIE_MRX_GTX_R_P2
AF26 PCIE_MRX_GTX_R_N2

C5303 1

2 SCD1U16V2KX-3GP
1
C5306

PCIE_MRX_GTX_P2
PCIE_MRX_GTX_N2
2
SCD1U16V2KX-3GP

PCIE_MTX_GRX_P3
PCIE_MTX_GRX_N3

AC29
AB28

PCIE_RX3P
PCIE_RX3N

PCIE_TX3P
PCIE_TX3N

AD27 PCIE_MRX_GTX_R_P3
AD26 PCIE_MRX_GTX_R_N3

C5314 1

2 SCD1U16V2KX-3GP
1
C5316

PCIE_MRX_GTX_P3
PCIE_MRX_GTX_N3
2
SCD1U16V2KX-3GP

PCIE_MTX_GRX_P4
PCIE_MTX_GRX_N4

AB30
AA31

PCIE_RX4P
PCIE_RX4N

PCIE_TX4P
PCIE_TX4N

AC25 PCIE_MRX_GTX_R_P4
AB25 PCIE_MRX_GTX_R_N4

C5317 1

2 SCD1U16V2KX-3GP
1
C5318

PCIE_MRX_GTX_P4
PCIE_MRX_GTX_N4
2
SCD1U16V2KX-3GP

PCIE_MTX_GRX_P5
PCIE_MTX_GRX_N5

AA29
Y28

PCIE_RX5P
PCIE_RX5N

PCIE_TX5P
PCIE_TX5N

Y23
Y24

PCIE_MRX_GTX_R_P5
PCIE_MRX_GTX_R_N5

C5321 1

2 SCD1U16V2KX-3GP
1
C5322

PCIE_MRX_GTX_P5
PCIE_MRX_GTX_N5
2
SCD1U16V2KX-3GP

PCIE_MTX_GRX_P6
PCIE_MTX_GRX_N6

Y30
W 31

PCIE_RX6P
PCIE_RX6N

PCIE_TX6P
PCIE_TX6N

AB27
AB26

PCIE_MRX_GTX_R_P6
PCIE_MRX_GTX_R_N6

C5325 1

2 SCD1U16V2KX-3GP
1
C5326

PCIE_MRX_GTX_P6
PCIE_MRX_GTX_N6
2
SCD1U16V2KX-3GP

PCIE_MTX_GRX_P7
PCIE_MTX_GRX_N7

W 29
V28

PCIE_RX7P
PCIE_RX7N

PCIE_TX7P
PCIE_TX7N

Y27
Y26

PCIE_MRX_GTX_R_P7
PCIE_MRX_GTX_R_N7

C5329 1

2 SCD1U16V2KX-3GP
1
C5330

PCIE_MRX_GTX_P7
PCIE_MRX_GTX_N7
2
SCD1U16V2KX-3GP

PCIE_MTX_GRX_P8
PCIE_MTX_GRX_N8

V30
U31

PCIE_RX8P
PCIE_RX8N

PCIE_TX8P
PCIE_TX8N

W 24
W 23

PCIE_MRX_GTX_R_P8
PCIE_MRX_GTX_R_N8

C5331 1

2 SCD1U16V2KX-3GP
1
C5332

PCIE_MRX_GTX_P8
PCIE_MRX_GTX_N8
2
SCD1U16V2KX-3GP

PCIE_MTX_GRX_P9
PCIE_MTX_GRX_N9

U29
T28

PCIE_RX9P
PCIE_RX9N

PCIE_TX9P
PCIE_TX9N

V27
U26

PCIE_MRX_GTX_R_P9
PCIE_MRX_GTX_R_N9

C5307 1

2 SCD1U16V2KX-3GP
1
C5308

PCIE_MRX_GTX_P9
PCIE_MRX_GTX_N9
2
SCD1U16V2KX-3GP

PCIE_MTX_GRX_P10
PCIE_MTX_GRX_N10

T30
R31

PCIE_RX10P
PCIE_RX10N

PCIE_TX10P
PCIE_TX10N

U24
U23

PCIE_MRX_GTX_R_P10
PCIE_MRX_GTX_R_N10

C5309 1

2 SCD1U16V2KX-3GP
1
C5310

PCIE_MRX_GTX_P10
PCIE_MRX_GTX_N10
2
SCD1U16V2KX-3GP

PCIE_MTX_GRX_P11
PCIE_MTX_GRX_N11

R29
P28

PCIE_RX11P
PCIE_RX11N

PCIE_TX11P
PCIE_TX11N

T26
T27

PCIE_MRX_GTX_R_P11
PCIE_MRX_GTX_R_N11

C5311 1

2 SCD1U16V2KX-3GP
1
C5312

PCIE_MRX_GTX_P11
PCIE_MRX_GTX_N11
2
SCD1U16V2KX-3GP

PCIE_MTX_GRX_P12
PCIE_MTX_GRX_N12

P30
N31

PCIE_RX12P
PCIE_RX12N

PCIE_TX12P
PCIE_TX12N

T24
T23

PCIE_MRX_GTX_R_P12
PCIE_MRX_GTX_R_N12

C5313 1

2 SCD1U16V2KX-3GP
1
C5315

PCIE_MRX_GTX_P12
PCIE_MRX_GTX_N12
2
SCD1U16V2KX-3GP

P27
P26

PCIE_MRX_GTX_R_P13
PCIE_MRX_GTX_R_N13

C5319 1

2 SCD1U16V2KX-3GP
1
C5320

PCIE_MRX_GTX_P13
PCIE_MRX_GTX_N13
2
SCD1U16V2KX-3GP

PCIE_MTX_GRX_P13
PCIE_MTX_GRX_N13

N29
M28

PCIE_RX13P
PCIE_RX13N

PCIE_TX13P
PCIE_TX13N

PCIE_MTX_GRX_P14
PCIE_MTX_GRX_N14

M30
L31

PCIE_RX14P
PCIE_RX14N

PCIE_TX14P
PCIE_TX14N

P24
P23

PCIE_MRX_GTX_R_P14
PCIE_MRX_GTX_R_N14

C5323 1

2 SCD1U16V2KX-3GP
1
C5324

PCIE_MRX_GTX_P14
PCIE_MRX_GTX_N14
2
SCD1U16V2KX-3GP

PCIE_MTX_GRX_P15
PCIE_MTX_GRX_N15

L29
K30

PCIE_RX15P
PCIE_RX15N

PCIE_TX15P
PCIE_TX15N

M27
N26

PCIE_MRX_GTX_R_P15
PCIE_MRX_GTX_R_N15

C5327 1

2 SCD1U16V2KX-3GP
1
C5328

PCIE_MRX_GTX_P15
PCIE_MRX_GTX_N15
2
SCD1U16V2KX-3GP

PCIE_MRX_GTX_P[0..15]
PCIE_MRX_GTX_N[0..15]

PCIE_MTX_GRX_N[0..15]

13

PCIE_MRX_GTX_P[0..15]

13

PCIE_MRX_GTX_N[0..15]

13

6 OF 7

U5301F

LVDS CONTROL

VARY_BL
DIGON

AB11
AB12

TXCLK_UP_DPF3P
TXCLK_UN_DPF3N

AH20
AJ19

VGA_TXBCLK+
VGA_TXBCLK-

VGA_TXBCLK+ 41 R5304
VGA_TXBCLK- 41

TXOUT_U0P_DPF2P
TXOUT_U0N_DPF2N

AL21
AK20

VGA_TXBOUT0+
VGA_TXBOUT0-

VGA_TXBOUT0+ 41
VGA_TXBOUT0- 41

TXOUT_U1P_DPF1P
TXOUT_U1N_DPF1N

AH22
AJ21

VGA_TXBOUT1+
VGA_TXBOUT1-

VGA_TXBOUT1+ 41
VGA_TXBOUT1- 41

TXOUT_U2P_DPF0P
TXOUT_U2N_DPF0N

AL23
AK22

VGA_TXBOUT2+
VGA_TXBOUT2-

VGA_TXBOUT2+ 41
VGA_TXBOUT2- 41

TXOUT_U3P
TXOUT_U3N

AK24
AJ23

TXCLK_LP_DPE3P
TXCLK_LN_DPE3N

AL15
AK14

VGA_TXACLK+
VGA_TXACLK-

VGA_TXACLK+ 41
VGA_TXACLK- 41

TXOUT_L0P_DPE2P
TXOUT_L0N_DPE2N

AH16
AJ15

VGA_TXAOUT0+
VGA_TXAOUT0-

VGA_TXAOUT0+ 41
VGA_TXAOUT0- 41

TXOUT_L1P_DPE1P
TXOUT_L1N_DPE1N

AL17
AK16

VGA_TXAOUT1+
VGA_TXAOUT1-

VGA_TXAOUT1+ 41
VGA_TXAOUT1- 41

TXOUT_L2P_DPE0P
TXOUT_L2N_DPE0N

AH18
AJ17

VGA_TXAOUT2+
VGA_TXAOUT2-

VGA_TXAOUT2+ 41
VGA_TXAOUT2- 41

TXOUT_L3P
TXOUT_L3N

AL19
AK18

LBKLT_CTL 41
LCDVDD_EN 41

R5301
10KR2J-3-GP

AH30 PCIE_MRX_GTX_R_P0
AG31 PCIE_MRX_GTX_R_N0

PCIE_TX0P
PCIE_TX0N

PCIE_RX0P
PCIE_RX0N

PCI EXPRESS INTERFACE

AF30
AE31

13

PCIE_MTX_GRX_P0
PCIE_MTX_GRX_N0

PCIE_MTX_GRX_P[0..15]

10KR2J-3-GP
2

U5301A

SSID = VIDEO

LVTMDP

CLOCK

7 CLK_PCIE_VGA
7 CLK_PCIE_VGA#

CLK_PCIE_VGA
CLK_PCIE_VGA#

AK30
AK32

PCIE_REFCLKP
PCIE_REFCLKN

L9
N9
N10

NC#L9
NC#N9
NC_PW RGOOD

CALIBRATION

20,26 PLTRST_DELAY#

PLTRST_DELAY#

AL27

PCIE_CALRP

Y22

PCIE_CALRP

R5302 1

2 1K27R2F-L-GP

PCIE_CALRN

AA22

PCIE_CALRN

R5303 1

2 2KR2F-3-GP

+1.1V_RUN

PERSTB
M92-S2-GP

19 PLTRST_ICH_DELAY#

R5305

DY

M92-S2-GP

0R2J-2-GP

X01 20081208

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

VGA-PCIE/LVDS(1/4)

Size
Document Number
Custom
Date:
5

Rev

SB

ALBA Discrete

Monday, March 23, 2009

Sheet
1

53

of

59

AJ7
AH6
AK8
AL7

+DAC1_AVDD

R5410
1KR2J-1-GP
2
1

+1.8V_RUN

R5408
499R2F-2-GP
VREFG VOLTAGE DIVIDER IS
(VREFG = VDDR4,5(1.8V) / 3 = .6V)

AB13
W8
W9
W7
AD10

AC14

TP5412
TP5403

40mA

VDD2DI
VSS2DI

65mA

A2VDD

HPD1

AC16

1mA

A2VDDQ

VREFG

H2SYNC
V2SYNC

A2VSSQ
R2SET

+DPLL_PVDD

DDC/AUX
PLL/CLOCK

X5401
GPU_XTALIN

GM

DPLL_PVDD
DPLL_PVSS

120mA

DPLL_VDDC

300mA

1
2 GPU_XTALOUT_1
R5429 GM
0R2J-2-GP
GM GM C5428
SC12P50V3JN-GP

C5429
SC12P50V3JN-GP

GM

GPU_XTALOUT

L5402

TP5405

FAN_PWM
+TSVDD

C5404
1

2
SCD1U16V2KX-3GP

BLM15BD121SN1D-GP

SC1U10V3KX-3GP
C5416
2
1

+1.8V_RUN

XTALIN
XTALOUT

DDC2CLK
DDC2DATA
AUX2P
AUX2N
NC#AB22
NC#AC22

T4
T2

28 VGA_THERMDA
28 VGA_THERMDC

Main 82.30034.651
Second 82.30034.641

AM28
AK28

DDC1CLK
DDC1DATA
AUX1P
AUX1N

2
4

XTAL-25MHZ-130-GP

PM

AF14
AE14
AD14

R5425
150R2F-1-GP

PM

+DPLL_VDDC
R5428
1MR2J-1-GP

124R2F-U-GP

+DAC1_VDD1DI

C5420
SC1U6D3V2KX-GP

1
2

1
2

+1.8V_RUN

AL11
AJ11
AK10
AL9

DY

R5414

DY
2

DY
AM12
AK12

C5425
SC1U6D3V2KX-GP

40mA

+3.3V_DELAY

65mA

DY

AL13
AJ13

DAC2_HSYNC
DAC2_VSYNC

56
56

AD19
AC19

+DAC2_VDD2DI

AE20

+DAC2_A2VDD

AE17

DY

DY

DY

+DAC2_A2VDDQ

VGA_R2SET

1
R5406

2
715R2F-GP

R5
AD17
AC17

DPLUS
DMINUS

2 0R2J-2-GP
2 0R2J-2-GP

20mA

DDC6CLK
DDC6DATA
NC_DDCAUX7P
NC_DDCAUX7N

0R2J-2-GP

R5401
2K2R2J-2-GP

L5406 1
2
BLM15BD121SN1D-GP

LDDC_CLK 41
LDDC_DATA 41

AD2
AD4
AC11
AC13

M92CRT_DDCCLK
M92CRT_DDCDATA

R5413
1
1

DY
DY

R5407

AD13
AD11

2
2

0R2J-2-GP
DDC_CLK_CON
DDC_DATA_CON
0R2J-2-GP

AB22
AC22

+3.3V_DELAY

RN5401

AE16
AD16

3
4

2
1

+3.3V_DELAY

AC1
AC3

SRN2K2J-1-GP
<Core Design>

AD20
AC20

U5401
M92CRT_DDCDATA

M92-S2-GP

DDC_CLK_CON

1
2N7002SPT

R5415

THERMAL
DDCAUX5P
DDCAUX5N

TS_FDO
TSVDD
TSVSS

R5416 1
R5418 1

AE6
AE5

+1.8V_RUN

1mA
+3.3V_DELAY

AE19
AG13

0R2J-2-GP

+DAC2_A2VDD

AH12
AM10
AJ9

42 DDC_CLK_CON

C5417
SC4D7U6D3V5KX-3GP

+DAC2_VDD2DI

DAC2

C5405
SCD1U16V2KX-3GP

R5426

Crystal

+DAC1_AVDD

AE23
AD23

GM 20090318

7 CLK_VGA_27M_NSS

AG24
AE22

+DAC2_A2VDDQ

VGA_VREFG
R5409
249R2F-GP

GENERICA
GENERICB
GENERICC
GENERICD
GENERICE_HPD4

2
499R2F-2-GP

1
1

C
Y
COMP

1
R5421

C5412
SC4D7U6D3V5KX-3GP

JTAG_TRSTB
JTAG_TDI
JTAG_TCK
JTAG_TMS
JTAG_TDO
TESTEN

42,56
42,56

(Placed between this pin and AVSSQ)

VGA_RSET

C5410
SC1U6D3V2KX-GP

TP5411
TP5413

L6
L5
L3
L1
K4
AF24

AD22

X01 20081215

TP5408
TP5407
TP5409
JTAG_TESTEN TP5410

R5411
1KR2J-1-GP
2
1

D
Q5401
2N7002-7F-GP

JTAG_TRSTB
1
1
1
1

B2
B2B

M_BLUE 42
VGA_HSYNC
VGA_VSYNC

26 THERMTRIP_VGA_GATE

G2
G2B

2 150R2F-1-GP

AH26
AJ27

26 THERMTRIP_VGA#

2 150R2F-1-GP

H_THRMTRIP#

R2
R2B

R5424

42

C5414
SC1U6D3V2KX-GP

8,11,18,26,30

VDD1DI
VSS1DI

R5423

M_GREEN

C5426
SCD1U16V2KX-3GP

R5405 1
2
10KR2J-3-GP
56 GPIO_VGA_22
VGA_CLK_REQ#

45mA

M_BLUE

M_RED 42

2 150R2F-1-GP

C5411
SCD1U16V2KX-3GP

THERMTRIP_VGA

39 PWRCNTL_1

AVDD
AVSSQ

AH24
AG25

R5422

TP5401

TP5402

1CLK_VGA_27M_SS
1 VGA_THERM#

TP5414

RSET

70mA

M_GREEN

39 PWRCNTL_0

HSYNC
VSYNC

M_RED

AL25
AJ25

DY

GM 20090310

R5427
10KR2J-3-GP

B
BB

DAC1

AM26
AK26

56 GPIO_VGA_11
56 GPIO_VGA_12
56 GPIO_VGA_13

1
Q5402
2N7002SPT

2 R5417
0R2J-2-GP

G
GB

1
PANEL_BKEN
26 PANEL_BKEN
56 GPIO_VGA_08
56 GPIO_VGA_09

GPIO_0
GPIO_1
GPIO_2
GPIO_3_SMBDATA
GPIO_4_SMBCLK
GPIO_5_AC_BATT
GPIO_6
GPIO_7_BLON
GPIO_8_ROMSO
GPIO_9_ROMSI
GPIO_10_ROMSCK
GPIO_11
GPIO_12
GPIO_13
GPIO_14_HPD2
GPIO_15_PWRCNTL_0
GPIO_16_SSIN
GPIO_17_THERMAL_INT
GPIO_18_HPD3
GPIO_19_CTF
GPIO_20_PWRCNTL_1
GPIO_21_BB_EN
GPIO_22_ROMCSB
GPIO_23_CLKREQB
GPIO_29_DRM_0
GPIO_30_DRM_1 GND

56 GPIO_VGA_05

TP5406

U6
U10
T10
U8
U7
T9
T8
T7
P10
P4
P2
N6
N5
N3
Y9
N1
M4
R6
W10
M2
P8
P7
N8
N7
T11
R11

56 GPIO_VGA_00
56 GPIO_VGA_01
56 GPIO_VGA_02

C5415
SCD1U16V2KX-3GP

VGA_CLK_REQ#

10KR2J-3-GP

R
RB

GENERAL PURPOSE I/O


1 R5412

+3.3V_DELAY

C5427
SCD01U16V2KX-3GP

0R2J-2-GP

L5404 1
2
BLM15BD121SN1D-GP

SCL
SDA

R1
R3

C5413
SCD01U16V2KX-3GP

2
2

+1.8V_RUN

C5421
SCD1U16V2KX-3GP

DY
DY

2K2R2J-2-GP
R5402
1
2

I2C
0R2J-2-GP
R5419 1
R5420 1

41 LDDC_CLK
41 LDDC_DATA

L5401 1
2
BLM15BD121SN1D-GP

+DAC1_VDD1DI

DYR5403
4K7R2F-GP

DY

+1.8V_RUN

TX5P_DPB0P
TX5M_DPB0N

AK6
AM5

TX4P_DPB1P
TX4M_DPB1N

AK5
AM3

C5402
SC1U6D3V2KX-GP

DPB

TX3P_DPB2P
TX3M_DPB2N

AK3
AK1

2
R5404
4K7R2F-GP

DVPDATA20
DVPDATA21
DVPDATA22
DVPDATA23

TXCBP_DPB3P
TXCBM_DPB3N

AH3
AH1

56
56
56
56

+3.3V_DELAY

TX2P_DPA0P
TX2M_DPA0N

SCD01U16V2KX-3GP
C5409
2
1

SCD1U16V2KX-3GP
C5408
2
1

SC1U10V3KX-3GP
C5424
2
1

BLM15BD121SN1D-GP

SC10U6D3V5KX-1GP
C5407
2
1

DVPCNTL_MVP_0
DVPCNTL_MVP_1
DVPCNTL_0
DVPCNTL_1
DVPCNTL_2
DVPCLK
DVPDATA_0
DVPDATA_1
DVPDATA_2
DVPDATA_3
DVPDATA_4
DVPDATA_5
DVPDATA_6
DVPDATA_7
DVPDATA_8
DVPDATA_9
DVPDATA_10
DVPDATA_11
DVPDATA_12
DVPDATA_13
DVPDATA_14
DVPDATA_15
DVPDATA_16
DVPDATA_17
DVPDATA_18
DVPDATA_19
DVPDATA_20
DVPDATA_21
DVPDATA_22
DVPDATA_23

AG3
AG5

AA1
Y4
AC7
Y2
U5
U1
Y7
V2
Y8
V4
AB7
W1
AB8
W3
AB9
W5
AC6
W6
AD7
AA3
AC8
AA5
AE8
AA6
AE9
AB4
AD9
AB2
AC10
AC5

+DPLL_VDDC

L5403

+1.1V_RUN

TX1P_DPA1P
TX1M_DPA1N

SCD01U16V2KX-3GP
C5419
2
1

SCD1U16V2KX-3GP
C5418
2
1

SC10U6D3V5KX-1GP
C5406
2
1

SC10U6D3V5KX-1GP
C5401
2
1

BLM15BD121SN1D-GP

TX0P_DPA2P
TX0M_DPA2N

DPA

MUTI GFX
2

L5405

+1.8V_RUN

AF2
AF4

C5403
SCD1U16V2KX-3GP

TXCAP_DPA3P
TXCAM_DPA3N
+DPLL_PVDD

C5423
SCD01U16V2KX-3GP

SSID = VIDEO

2 OF 7

U5301B

C5422
SCD01U16V2KX-3GP

DDC_DATA_CON

M92CRT_DDCCLK

5V @ CRT side

DDC_DATA_CON

Wistron Corporation

42

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.
Title

VGA-TV/CRT/DP PORT

Size
C

Document Number

Date:

Monday, March 23, 2009

Rev

SB

ALBA Discrete
Sheet
1

54

of

59

SPV10

Staff

No staff

C5384

No staff

No staff

20mA
DP PLL POWER

DPA_PVDD
DPA_PVSS

AG8
AG7

+DPA_PVDD

20mA
+DPF_PVDD

AG19
AF20

NC_DPF_PVDD
NC_DPF_PVSS

DPB_PVDD
DPB_PVSS

AG10
AG11

+DPB_PVDD

M92-S2-GP

C5506
SC22U6D3V5MX-2GP

C5543
SC1U6D3V2KX-GP

1
2

C5542
SC1U6D3V2KX-GP

C5541
SC1U6D3V2KX-GP

C5538
SC1U6D3V2KX-GP

C5539
SCD1U16V2KX-3GP

1
2

1
2

C5546
SC10U6D3V5KX-1GP

C5550
SC1U6D3V2KX-GP

C5549
SC1U10V2KX-1GP

C5545
SC1U10V2KX-1GP

1
2

1
2

C5544
SC1U10V2KX-1GP

C5547
SC1U6D3V2KX-GP

1
2

1
2

C5548
SC1U6D3V2KX-GP

1
2

C5560
SC1U6D3V2KX-GP

1
2

C5559
SC1U6D3V2KX-GP

C5557
SC1U6D3V2KX-GP

C5556
SC1U6D3V2KX-GP

C5558
SC1U6D3V2KX-GP
2
1

C5564
SC1U6D3V2KX-GP
2
1

1
2

C5565
SC1U6D3V2KX-GP

1
2

C5562
SC1U6D3V2KX-GP

C5561
SC1U6D3V2KX-GP

1
2

C5563
SC1U6D3V2KX-GP

C5577
SCD1U10V2KX-4GP
2
1

C5576
SCD1U10V2KX-4GP
2
1

C5553
SC1U6D3V2KX-GP
2
1

1
2

C5554
SC1U6D3V2KX-GP

C5568
SC10U6D3V5KX-1GP

C5571
SC1U6D3V2KX-GP

1
2

C5570
SC1U6D3V2KX-GP

C5567
SC1U10V2KX-1GP

1
2

C5566
SC1U10V2KX-1GP

C5569
SC1U6D3V2KX-GP

C5572
SC10U6D3V5KX-1GP

+1.8V_RUN

R5508
1

DY

SCD01U16V2KX-3GP
C5537
2
1

0R2J-2-GP

SCD1U16V2KX-3GP
C5535

+1.1V_RUN

R5507
1

+SPV10

L5507

1
2
BLM15BD121SN1D-GP
SC1U6D3V2KX-GP
C5536
2
1

C5587
SC4D7U6D3V5KX-3GP
C5590
SC4D7U6D3V5KX-3GP

+VCC_GFX_CORE

300mA

0R2J-2-GP

+1.1V_RUN

R5509

C5593
SC4D7U6D3V5KX-3GP

2
0R2J-2-GP

+1.8V_RUN

R5510
1

DY

DY

+1.8V_RUN

SC1U6D3V2KX-GP
C5534
2
1

C5584
SC4D7U6D3V5KX-3GP

C5583
SC1U6D3V2KX-GP

2
1

C5586
SC1U6D3V2KX-GP

2
1

C5589
SC1U6D3V2KX-GP

2
1

C5592
SC1U6D3V2KX-GP

DY

C5585
SCD1U16V2KX-3GP

2
1

C5588
SCD1U16V2KX-3GP

2
1

C5591
SCD1U16V2KX-3GP

2
1
2

C5594
SCD1U16V2KX-3GP

DY

DY

DY

0R2J-2-GP

DY

C5502
SC4D7U6D3V5KX-3GP

DPE_PVDD
DPE_PVSS

DY

DY

150R2F-1-GP

20mA
AG18
AF19

DY

DY

DY

AE10 1 R5504

150R2F-1-GP
+DPE_PVDD

DY
AF10
AG9
AH8
AM6
AM8

DY

C5578
SC1U6D3V2KX-GP

DPAB_CALR

200mA

DPEF_CALR

+DPB_VDD10

200mA
170mA

DPB_VSSR
DPB_VSSR
DPB_VSSR
DPB_VSSR
DPB_VSSR

AF8
AF9

1 AF17

DPF_VSSR
DPF_VSSR
DPF_VSSR
DPF_VSSR
DPF_VSSR

DPB_VDD10
DPB_VDD10

+DPB_VDD18

1
2

200mA

200mA
170mA

1
2

SCD1U16V2KX-3GP
C55014

SCD1U16V2KX-3GP
C5597

2
1

SCD1U16V2KX-3GP
C55004

2
1

SCD1U16V2KX-3GP
C55011

2 R5505
1

1
2

SC4D7U6D3V5KX-3GP
C55013

SC1U6D3V2KX-GP
C55012
2
1
SC1U6D3V2KX-GP
C55002
2
1

SC4D7U6D3V5KX-3GP
C5595

2
1
2

SC1U6D3V2KX-GP
C5596
2
1

AF23
AG23
AM20
AM22
AM24

DPF_VDD10
DPF_VDD10

AE13
AF13

300mA

AF22
AG22

NC_DPB_VDD18
NC_DPB_VDD18

C5551
SCD1U10V2KX-4GP

1
2
1

144mA

R5506
1

DY

C5581
SC4D7U6D3V5KX-3GP

Q5107

1
2
BLM15BD121SN1D-GP

+DPF_VDD10

DPF_VDD18
DPF_VDD18

C5552
SC1U6D3V2KX-GP

+VCC_GFX_CORE

BBP#1
BBP#2

DY

No staff

AF16
AG17

C5580
SC1U6D3V2KX-GP

No staff

+DPF_VDD18

DY

R5403

L5509

DY
AE1
AE3
AG1
AG6
AH5

C5579
SCD1U16V2KX-3GP

No staff

+DPA_VDD10

Staff

DPA_VSSR
DPA_VSSR
DPA_VSSR
DPA_VSSR
DPA_VSSR

AF6
AF7

DY

R5402

+1.8V_RUN

DPE_VSSR
DPE_VSSR
DPE_VSSR
DPE_VSSR
DPE_VSSR

DPA_VDD10
DPA_VDD10

+DPA_VDD18

C5582
SCD1U16V2KX-3GP

No staff

DPE_VDD10
DPE_VDD10

DY
AE11
AF11

Staff

Staff

AG14
AH14
AM14
AM16
AM18

NC_DPA_VDD18
NC_DPA_VDD18

No staff

Q5106

AG20
AG21

DP A/B POWER

DPE_VDD18
DPE_VDD18

R5401

300mA

AG15
AG16

DY

A12

SCD1U16V2KX-3GP
C55001

A11

+DPE_VDD10

Part

L5505

1
2
BLM15BD121SN1D-GP

DP E/F POWER
+DPE_VDD18

35mA

BACK BIAS

7 of 7

U5301G

M92 Version

SCD1U16V2KX-3GP
C55007

+1.8V_RUN
A

SC1U6D3V2KX-GP
C55008
2
1

1A

SC1U6D3V2KX-GP
C5598
2
1

L5501
2
1
BLM18PG300SN-GP

SC1U6D3V2KX-GP
C55005
2
1

+1.1V_RUN

SC4D7U6D3V5KX-3GP
C55003

300mA

1
2
BLM15BD121SN1D-GP

1A

L5508

SC4D7U6D3V5KX-3GP
C55010

L5502
2
1
BLM18PG300SN-GP

+1.1V_RUN

300mA

SC4D7U6D3V5KX-3GP
C5599

+DPE_VDD18_R
1
2
BLM15BD121SN1D-GP

2
0R3-0-U-GP

L5510
1
R5501

SC4D7U6D3V5KX-3GP
C55006

+1.8V_RUN

SPVSS

M92-S2-GP

DY

NC_SPV18

+VCC_GFX_CORE
M11
M12

M13
M15
M16
M17
M18
M20
M21
N20

J7

NC_MPV18

VDDCI
VDDCI
VDDCI
VDDCI
VDDCI
VDDCI
VDDCI
VDDCI

SCD01U16V2KX-3GP
C5508
2
1

SCD1U16V2KX-3GP
C5507
2
1

SC1U6D3V2KX-GP
C5533
2
1

H8

+SPV10

68mA

C5573
SC22U6D3V5MX-2GP

L8
H7

PCIE_PVDD

AM30

DY

+VCC_GFX_CORE

ISOLATED
CORE I/O

VSSRHA
PLL

+PCIE_PVDD

DY

VDDRHA

L16

+VCC_GFX_CORE

C5575
SC10U6D3V5KX-1GP

L17

AA15
N15
N17
R13
R16
R18
R21
T12
T15
T17
T20
U13
U16
U18
U21
V15
V17
V20
V21
Y13
Y16
Y18
Y21

C5532
SC1U6D3V2KX-GP

300mA

C5531
SC1U6D3V2KX-GP

+VDDRHA

VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC

DY

+1.1V_RUN

L23
L24
L25
L26
M22
N22
N23
N24
R22
T22
U22
V22

136mA
60mA

MEM CLK

L5506
1
2
BLM15BD121SN1D-GP

+PCIE_PVDD

SC10U6D3V5KX-1GP
C5501
2
1

VDDR4
VDDR4
VDDR4
VDDR4

+1.8V_RUN

C5530
SCD1U16V2KX-3GP

C5528
SCD1U16V2KX-3GP

C5527
SC1U6D3V2KX-GP

CORE

AB23
AC23
AD24
AE24
AE25
AE26
AF25
AG26

AA11
AA12
Y11
Y12

VDDR5
VDDR5
VDDR5
VDDR5

170mA

C5526
SCD1U16V2KX-3GP

1
2

C5525
SCD1U16V2KX-3GP

C5524
SC1U6D3V2KX-GP

1
2

1
2

U11
U12
V11
V12

VDDR3
VDDR3
VDDR3
VDDR3

170mA

AA17
AA18
AB17
AB18

L5503

PCIE_VDDC
PCIE_VDDC
PCIE_VDDC
PCIE_VDDC
PCIE_VDDC
PCIE_VDDC
PCIE_VDDC
PCIE_VDDC
PCIE_VDDC
PCIE_VDDC
PCIE_VDDC
PCIE_VDDC

I/O

1
2
BLM15BD121SN1D-GP

300mA

VDD_CT
VDD_CT
VDD_CT
VDD_CT

PCIE_VDDR
PCIE_VDDR
PCIE_VDDR
PCIE_VDDR
PCIE_VDDR
PCIE_VDDR
PCIE_VDDR
PCIE_VDDR

C5555
SC1U6D3V2KX-GP

1
2
2

C5510
SCD1U16V2KX-3GP

1
2

C5509
SCD1U16V2KX-3GP

C5521
SC1U6D3V2KX-GP

1
2

C5520
SC1U6D3V2KX-GP

C5522
SC10U6D3V5KX-1GP

1
2

LEVEL
TRANSLATION
AA20
AA21
AB20
AB21

+3.3V_DELAY

+1.8V_RUN

2A

+VDD_CT

300mA

M92-S2-GP

2.2A

L5504
1
2
BLM15BD121SN1D-GP

A32
AM1
AM32

VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1

C5574
SC22U6D3V5MX-2GP

H13
H16
H19
J10
J23
J24
J9
K10
K23
K24
K9
L11
L12
L13
L20
L21
L22

C5540
SC1U6D3V2KX-GP

PCIE

500mA

1
2

MEM I/O

+1.8V_RUN

VSS_MECH
VSS_MECH
VSS_MECH

4 OF 7

U5301D

C55023
SCD1U16V2KX-3GP

C5517
SCD1U10V2KX-4GP

+1.8V_RUN

C5519
SCD1U16V2KX-3GP

1
2

C5516
SC1U6D3V2KX-GP
1

C55022
SCD1U16V2KX-3GP

2
1
2

C5518
SCD1U16V2KX-3GP

C5515
SCD1U16V2KX-3GP
1
2

C55021
SCD1U16V2KX-3GP

C55020
SCD1U16V2KX-3GP
1

C5505
SCD1U16V2KX-3GP

1
2

C5514
SCD1U10V2KX-4GP
1
2

1
2

C5504
SCD1U16V2KX-3GP

C5513
SCD1U10V2KX-4GP
1

C55019
SCD1U16V2KX-3GP

C5503
SCD1U16V2KX-3GP

C5512
SC1U6D3V2KX-GP
1

C55018
SCD1U16V2KX-3GP

C55017
SCD1U16V2KX-3GP

1
2

C5511
SC1U6D3V2KX-GP

SC10U6D3V5KX-1GP
C55016
2
1

SC22U6D3V5MX-2GP
C55026
2
1

SC10U10V5KX-2GP
C55024
2
1

DY

C5523
SC1U6D3V2KX-GP

GND

DY

+1.8V_RUN

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

+1.8V_RUN

POWER

M6
N11
N12
N13
N16
N18
N21
P6
P9
R12
R15
R17
R20
T13
T16
T18
T21
T6
U15
U17
U20
U3
U9
V13
V16
V18
V6
Y10
Y15
Y17
Y20
Y6

A3
A30
AA13
AA16
AB10
AB15
AB6
AC9
AD6
AD8
AE7
AG12
AH10
AH28
B10
B12
B14
B16
B18
B20
B22
B24
B26
B6
B8
C1
C32
E28
F10
F12
F14
F16
F18
F2
F20
F22
F24
F26
F6
F8
G10
G27
G31
G8
H14
H17
H2
H20
H6
J27
J31
K11
K2
K22
K6

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS
PCIE_VSS

SC10U6D3V5KX-1GP
C55025
2
1

+1.8V_RUN
AA27
AB24
AB32
AC24
AC26
AC27
AD25
AD32
AE27
AF32
AG27
AH32
K28
K32
L27
M32
N25
N27
P25
P32
R27
T25
T32
U25
U27
V32
W25
W26
W27
Y25
Y32

5 OF 7

U5301E

C5529
SCD1U16V2KX-3GP

SSID = VIDEO

2
0R2J-2-GP
<Core Design>
+1.8V_RUN

R5511
1

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.

0R2J-2-GP

Title

VGA-POWER/GND(3/4)

Size
A2

Document Number

Date:

Monday, March 23, 2009

Sheet
1

Rev

SB

ALBA Discrete
55

of

59

SSID = VIDEO

MVREFD
MVREFS

DY
DY
DY

K26
J26

2 243R2F-2-GP
2 243R2F-2-GP

J25
K7

2 243R2F-2-GP
2 243R2F-2-GP

J8
K25

K8
L7
R5623

ATI RESERVED CONFIGURATION STRAPS

ODTA0
ODTA1
CLKA0
CLKA0B
CLKA1
CLKA1B
RASA0B
RASA1B
CASA0B
CASA1B
CSA0B_0
CSA0B_1

CKEA0
CKEA1

NC_MEM_CALRN0
NC_MEM_CALRN1

WEA0B
WEA1B

L18
K16

ODTA0
ODTA1

H26
H25

CLKA0
CLKA0#

54 GPIO_VGA_11
54 GPIO_VGA_12
54 GPIO_VGA_13

57
57
57
57
58
58
58
58

54 GPIO_VGA_22
CLKA0

QSA#0
QSA#1
QSA#2
QSA#3
QSA#4
QSA#5
QSA#6
QSA#7

54 DAC2_VSYNC
54 DAC2_HSYNC

57
57
57
57
58
58
58
58

R5625
56R2J-4-GP

RASA0#
RASA1#

G19
G16

CASA0#
CASA1#

H22
J22

CSA0_0#
CSA0_1#_R

CSA0_0# 57

G13
K13

CSA1_0#
CSA1_1#_R

CSA1_0# 58

MEM_CALRP1
NC_MEM_CALRP0

DY

2 10KR2J-3-GP

DY

2 10KR2J-3-GP

DY

2 10KR2J-3-GP

1
1

R5606

R5607

DY

2 10KR2J-3-GP

R5608

DY

2 10KR2J-3-GP

R5609

DY

2 10KR2J-3-GP

R5612

DY

2 10KR2J-3-GP

R5613

DY

2 10KR2J-3-GP

2 10KR2J-3-GP

x000
x001
x010
x
x
x
x
x

Part Number GPIO[13,12,11]


D

ST
Microelectronics

Chingis
(formerly PMC)

M25P05A
M25P10A
M25P20
M25P40
M25P80

0100
0101
0101
0101
0101

Pm25LV512A
Pm25LV010A

0100
0101

PIN

DESCRIPTION

GPIO0

Tansmitter Power Savings Enable


V 0= 50% Tx output swing
1= Full Tx output swing

GPIO1

Transmitter De-emphasis Enable


V 0= Tx de-emphasis disabled
1= Tx de-emphasis enabled

(Internal PD)
TX_DEEMPH_EN
(Internal PD)

42,54 VGA_HSYNC

R5610

2 10KR2J-3-GP

R5611

2 10KR2J-3-GP

BIF_GEN2_EN_A

GPIO2

BIF_CLK_PM_EN

GPIO8

V 0 = Advertises the PCI-E device


as 2.5GT/s
1 = Advertises the PCI-E device
as 5GT/s

CLKA1 58
CLKA1# 58
RASA0# 57
RASA1# 58

V 0= Disable CLKREQ#power management capability


1= Enable CLKREQ# power management capability

CLKA1

CASA0# 57
CASA1# 58

CLKA1#

ROMIDCFG[3:0]
R5626
56R2J-4-GP

CKEA0 57
CKEA1 58

(Internal PD)

GPIO[13,12,11]

R5627
56R2J-4-GP

WEA0# 57
WEA1# 58

if BIOS_ROM_EN=1,then Config[3:0]
defines the ROM type
if BIOS_ROM_EN=0,then Config[3:0]
defines the primary memory apeture size
Enable external BIOS ROM device

BIOS_ROM_EN

GPIO_22_ROMCSB V 0= Disable external BIOS ROM device


1= Enable external BIOS ROM device

(Internal PD)

C5606
SC470P50V2KX-3GP

AUD[1:0]

VGA_HSYNC

AUD[1]
AUD[0]

DRAM_RST

VGA_VSYNC

(Internal PD)

Close to VRAM U5801 side

CLKTESTA
CLKTESTB

128MB
256MB
64MB
32MB
512MB
1GB
2GB
4GB

STRAPS

AB16
G14
G20

RSVD#1
RSVD#2
RSVD#3

If BIOS_ROM_EN (GPIO22) = 1

If BIOS_ROM_EN (GPIO22) = 0

Size of the primary


GPIO[13,12,11] Manufacturer
memory apertures

C5603
SC470P50V2KX-3GP

Close to VRAM U5701 side

TP5603

WEA0#
WEA1#

R5604 1

GPIO3 , H2SYNC , V2SYNC


PULLUP PADS ARE NOT REQUIRED FOR THESE STRAPS BUT IF THESE GPIOS ARE USED,
THEY MUST NOT CONFLICT DURING RESET

TX_PWRS_ENB

42,54 VGA_VSYNC
CLKA0 57
CLKA0# 57

CLKA1
CLKA1#

CKEA0
CKEA1

2 10KR2J-3-GP

R5618
56R2J-4-GP

ODTA0 57
ODTA1 58

G22
G17

G25
H10

2 10KR2J-3-GP

DY

ALLOW FOR PULLUP PADS FOR THESE STRAPS AND IF THESE GPIOS ARE USED,
THEY MUST NOT CONFLICT DURING RESE

CLKA0#

G9
H9

K20
J17

DY

R5601 1

QSA0
QSA1
QSA2
QSA3
QSA4
QSA5
QSA6
QSA7

R5602 1

R5605

54 GPIO_VGA_09

57
57
57
57
58
58
58
58

QSA#0
QSA#1
QSA#2
QSA#3
QSA#4
QSA#5
QSA#6
QSA#7

DQMA#0
DQMA#1
DQMA#2
DQMA#3
DQMA#4
DQMA#5
DQMA#6
DQMA#7

57,58
57,58
57,58

2 10KR2J-3-GP

R5603

54 GPIO_VGA_08
BA2
BA0
BA1

DY

H27
A27
C23
C19
C15
E9
C5
H4

54 GPIO_VGA_05

QSA0
QSA1
QSA2
QSA3
QSA4
QSA5
QSA6
QSA7

54 GPIO_VGA_01
54 GPIO_VGA_02

R5617 1

H28
C27
A23
E19
E15
D10
D6
G5

54 GPIO_VGA_00

TP5602

CSA1B_0
CSA1B_1

MVREFDA
MVREFSA

DQMA#0
DQMA#1
DQMA#2
DQMA#3
DQMA#4
DQMA#5
DQMA#6
DQMA#7

57,58

WDQSA_0
WDQSA_1
WDQSA_2
WDQSA_3
WDQSA_4
WDQSA_5
WDQSA_6
WDQSA_7

E32
E30
A21
C21
E13
D12
E3
F4

MAA[0..12]

1
2

L10

4K7R2J-2-GP
2

1
2

C5601
SCD1U16V2KX-3GP

R5622
100R2F-L1-GP-U

R5649 1
R5643 1

C5604
SCD01U16V2KX-3GP

R5628 1
R5632 1

+1.8V_RUN

C5602
SCD1U16V2KX-3GP

R5621
100R2F-L1-GP-U

+1.8V_RUN

R5620
100R2F-L1-GP-U

C5605
SCD01U16V2KX-3GP

RDQSA_0
RDQSA_1
RDQSA_2
RDQSA_3
RDQSA_4
RDQSA_5
RDQSA_6
RDQSA_7

MAA0
MAA1
MAA2
MAA3
MAA4
MAA5
MAA6
MAA7
MAA8
MAA9
MAA10
MAA11
MAA12
BA2
BA0
BA1

R5619
100R2F-L1-GP-U

+1.8V_RUN

DQMA_0
DQMA_1
DQMA_2
DQMA_3
DQMA_4
DQMA_5
DQMA_6
DQMA_7

K17
J20
H23
G23
G24
H24
J19
K19
J14
K14
J11
J13
H11
G11
J16
L15

100R

MAA_0
MAA_1
MAA_2
MAA_3
MAA_4
MAA_5
MAA_6
MAA_7
MAA_8
MAA_9
MAA_10
MAA_11
MAA_12
MAA_13/BA2
MAA_14/BA0
MAA_15/BA1

100R

DQA_0
DQA_1
DQA_2
DQA_3
DQA_4
DQA_5
DQA_6
DQA_7
DQA_8
DQA_9
DQA_10
DQA_11
DQA_12
DQA_13
DQA_14
DQA_15
DQA_16
DQA_17
DQA_18
DQA_19
DQA_20
DQA_21
DQA_22
DQA_23
DQA_24
DQA_25
DQA_26
DQA_27
DQA_28
DQA_29
DQA_30
DQA_31
DQA_32
DQA_33
DQA_34
DQA_35
DQA_36
DQA_37
DQA_38
DQA_39
DQA_40
DQA_41
DQA_42
DQA_43
DQA_44
DQA_45
DQA_46
DQA_47
DQA_48
DQA_49
DQA_50
DQA_51
DQA_52
DQA_53
DQA_54
DQA_55
DQA_56
DQA_57
DQA_58
DQA_59
DQA_60
DQA_61
DQA_62
DQA_63

40.2R

R5624

MVREF TO GND

+3.3V_DELAY

100R

4K7R2J-2-GP
2

MVREF TO 1.8V

DDR3

K27
J29
H30
H32
G29
F28
F32
F30
C30
F27
A28
C28
E27
G26
D26
F25
A25
C25
E25
D24
E23
F23
D22
F21
E21
D20
F19
A19
D18
F17
A17
C17
E17
D16
F15
A15
D14
F13
A13
C13
E11
A11
C11
F11
A9
C9
F9
D8
E7
A7
C7
F7
A5
E5
C3
E1
G7
G6
G1
G3
J6
J1
J3
J5

MEMORY INTERFACE

MDA0
MDA1
MDA2
MDA3
MDA4
MDA5
MDA6
MDA7
MDA8
MDA9
MDA10
MDA11
MDA12
MDA13
MDA14
MDA15
MDA16
MDA17
MDA18
MDA19
MDA20
MDA21
MDA22
MDA23
MDA24
MDA25
MDA26
MDA27
MDA28
MDA29
MDA30
MDA31
MDA32
MDA33
MDA34
MDA35
MDA36
MDA37
MDA38
MDA39
MDA40
MDA41
MDA42
MDA43
MDA44
MDA45
MDA46
MDA47
MDA48
MDA49
MDA50
MDA51
MDA52
MDA53
MDA54
MDA55
MDA56
MDA57
MDA58
MDA59
MDA60
MDA61
MDA62
MDA63

( 0.5 * VDDR1 ) ( for SSTL-1.8/SSTL-2/DDR2 )


( 0.7 * VDDR1 ) ( for GDDR3/GDDR4 )

DDR2

57,58 MDA[0..63]

DIVIDER RESISTORS

3 OF 7

U5301C

V 00:No audio function


01:Audio for DisplayPort and HDMI
( if adapter is detected)
10:Audio for DisplayPort only
11:Audio for both DisplayPort and HDMI

M92-S2-GP

STRAPS
MEM_TYPE
+1.8V_RUN

54 DVPDATA20
54 DVPDATA21
54 DVPDATA22

54 DVPDATA23

R5648

VRAM2

10KR2J-3-GP

R5614

10KR2J-3-GP

R5615

DY

10KR2J-3-GP

R5616

DY

10KR2J-3-GP

PIN
DVPDATA(23:20)

(Internal PD)

DESCRIPTION
MEMORY TYPE,MAKE AND SIZE INFO
0000 - gDDR2 ------0001 - gDDR2 64Mx16
HYNIX
V 0010 - gDDR2 64Mx16 SAMSUNG
0011 - gDDR2 32Mx16
HYNIX
0100 - gDDR2 32Mx16
SAMSUNG

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

VGA-MEMORY/STRAPS(4/4)

Size
A2

Document Number

Date:

Monday, March 23, 2009

Rev

SB

ALBA Discrete
Sheet
1

56

of

60

SSID = VIDEO

W E#

RASA0#

K7

RAS#

CASA0#

L7

CAS#

DQMA#3
DQMA#1

F3
B3

56 ODTA0

ODTA0

LDM
UDM

VDDL
VSSDL

K9

ODT

QSA3
QSA#3

F7
E8

LDQS
LDQS#

1
R5703
4K99R2F-L-GP

QSA1
QSA#1

B7
A8

UDQS
UDQS#

J2

VREF

A2
E2
L1
R3
R7
R8

NC#A2
NC#E2
BA2
NC#R3
NC#R7
NC#R8

56 QSA1
56 QSA#1

1
2
2

C5751
SCD1U16V2KX-3GP

VREFA1

R5704
4K99R2F-L-GP

56,58 BA2

J1
J7

BA2

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

A7
B2
B8
D2
D8
E7
F2
F8
H2
H8

VSS
VSS
VSS
VSS
VSS

A3
E3
J3
N1
P9

CKE

CSA0_0#

L8

CS#

WEA0#

K3

W E#

RASA0#

K7

RAS#

CASA0#

L7

CAS#

DQMA#2
DQMA#0

F3
B3

LDM
UDM

56 WEA0#
56 RASA0#
56 CASA0#

+1.8V_RUN

VDDLA1

56 DQMA#2
56 DQMA#0

L5701
2
1
BLM15BD121SN1D-GP

+1.8V_RUN

56 QSA2
56 QSA#2

ODTA0

K9

ODT

QSA2
QSA#2

F7
E8

LDQS
LDQS#

QSA0
QSA#0

B7
A8

UDQS
UDQS#

J2

VREF

A2
E2
L1
R3
R7
R8

NC#A2
NC#E2
BA2
NC#R3
NC#R7
NC#R8

56 ODTA0

R5705
4K99R2F-L-GP

56 QSA0
56 QSA#0

VREFA2

R5706
4K99R2F-L-GP

56 DQMA#3
56 DQMA#1

K2

A1
E1
J9
M9
R1

56 CSA0_0#

56 CASA0#

VDD
VDD
VDD
VDD
VDD

CKEA0

56 CKEA0

56 RASA0#

CK#
CK

K4N1G164QE-HC20-GP

56,58 BA2

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

A9
C1
C3
C7
C9
E9
G1
G3
G7
G9

VDD
VDD
VDD
VDD
VDD

A1
E1
J9
M9
R1

MDA[0..63]

+1.8V_RUN
C

VDDLA2

VDDL
VSSDL

J1
J7

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

A7
B2
B8
D2
D8
E7
F2
F8
H2
H8

BA2

VSS
VSS
VSS
VSS
VSS

A3
E3
J3
N1
P9

56,58

+1.8V_RUN

CS#

K3

56,58

C5702
SCD1U16V2KX-3GP

L8

WEA0#

K8
J8

56 CLKA0#
56 CLKA0

B9
B1
D9
D1
D3
D7
C2
C8
F9
F1
H9
H1
H3
H7
G2
G8

CSA0_0#

56 WEA0#

CLKA0#
CLKA0

+1.8V_RUN

56 CSA0_0#

A12
A11
A10/AP
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0

DQ15
DQ14
DQ13
DQ12
DQ11
DQ10
DQ9
DQ8
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0

CKE

BA0
BA1

R2
P7
M2
P3
P8
P2
N7
N3
N8
N2
M7
M3
M8

MDA3
MDA0
MDA2
MDA7
MDA1
MDA4
MDA6
MDA5
MDA16
MDA21
MDA18
MDA23
MDA20
MDA19
MDA22
MDA17

C5703
SC1U6D3V2KX-GP

K2

A9
C1
C3
C7
C9
E9
G1
G3
G7
G9

L2
L3

MAA12
MAA11
MAA10
MAA9
MAA8
MAA7
MAA6
MAA5
MAA4
MAA3
MAA2
MAA1
MAA0

56,58

CKEA0

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

MDA[0..63]

C5704
SCD1U16V2KX-3GP

CK#
CK

56 CKEA0

56 QSA3
56 QSA#3

MDA[0..63]
U5702
BA0
BA1

K8
J8

B9
B1
D9
D1
D3
D7
C2
C8
F9
F1
H9
H1
H3
H7
G2
G8

CLKA0#
CLKA0

56 CLKA0#
56 CLKA0

DQ15
DQ14
DQ13
DQ12
DQ11
DQ10
DQ9
DQ8
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0

A12
A11
A10/AP
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0

BA0
BA1

C5753
SCD1U16V2KX-3GP

R2
P7
M2
P3
P8
P2
N7
N3
N8
N2
M7
M3
M8

L2
L3

MAA12
MAA11
MAA10
MAA9
MAA8
MAA7
MAA6
MAA5
MAA4
MAA3
MAA2
MAA1
MAA0

+1.8V_RUN

56,58
56,58 BA0
56,58 BA1
56,58 MAA[0..12]

MDA12
MDA14
MDA11
MDA15
MDA9
MDA10
MDA13
MDA8
MDA31
MDA24
MDA29
MDA25
MDA27
MDA30
MDA26
MDA28

C5701
SC1U6D3V2KX-GP

BA0
BA1

MDA[0..63]
U5701

56,58 BA0
56,58 BA1
56,58 MAA[0..12]

L5702
2
1
BLM15BD121SN1D-GP

K4N1G164QE-HC20-GP

+1.8V_RUN

C5717
SC10U6D3V5KX-1GP

C5754
SC10U6D3V5KX-1GP
2
1

1
2

32X16 SAMSUNG 72.45116.G0U


32X16 HYNIX
72.55162.B0U

C5716
SC10U6D3V5KX-1GP
2
1

64X16 SAMSUNG 72.41164.G0U


64X16 HYNIX
72.51G63.A0U

C5752
SC10U6D3V5KX-1GP
2
1

C5714
SC1U6D3V2KX-GP

C5713
SC1U6D3V2KX-GP
2
1

C5712
SC1U6D3V2KX-GP
2
1

C5711
SC1U6D3V2KX-GP
2
1

C5710
SC1U6D3V2KX-GP
2
1

C5709
SC1U6D3V2KX-GP
2
1

C5708
SC1U6D3V2KX-GP
2
1

C5707
SC1U6D3V2KX-GP
2
1

C5706
SC1U6D3V2KX-GP
2
1

1
2

C5705
SC1U6D3V2KX-GP
2
1

+1.8V_RUN

+1.8V_RUN
A

C5722
SCD1U16V2KX-3GP

C5721
SCD1U16V2KX-3GP
2
1

C5720
SCD1U16V2KX-3GP
2
1

1
2

C5715
SCD1U16V2KX-3GP
2
1

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

VRAM(1/2)
Size
Document Number
Custom
Date:

Monday, March 23, 2009

Rev

SB

ALBA Discrete
Sheet
1

57

of

60

SSID = VIDEO
MDA[0..63]
MDA[0..63]

ODTA1

K9

ODT

F7
E8

LDQS
LDQS#

LDM
UDM

QSA5
QSA#5

B7
A8

UDQS
UDQS#

J2

VREF

56 QSA5
56 QSA#5

1
2
2

C5803
SCD1U16V2KX-3GP

VREFA3

R5804
4K99R2F-L-GP

56,57 BA2

J1
J7

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

A7
B2
B8
D2
D8
E7
F2
F8
H2
H8

BA2

A2
E2
L1
R3
R7
R8

NC#A2
NC#E2
BA2
NC#R3
NC#R7
NC#R8

VSS
VSS
VSS
VSS
VSS

A3
E3
J3
N1
P9

L8

CS#

WEA1#

K3

W E#

RASA1#

K7

RAS#

CASA1#

L7

CAS#

DQMA#4
DQMA#7

F3
B3

LDM
UDM

56 WEA1#
56 RASA1#
56 CASA1#

+1.8V_RUN

56 DQMA#4
56 DQMA#7

L5801
VDDLA3

2
1
BLM15BD121SN1D-GP
+1.8V_RUN

56 QSA4
56 QSA#4

ODTA1

K9

ODT

QSA4
QSA#4

F7
E8

LDQS
LDQS#

QSA7
QSA#7

B7
A8

UDQS
UDQS#

J2

VREF

A2
E2
L1
R3
R7
R8

NC#A2
NC#E2
BA2
NC#R3
NC#R7
NC#R8

56 ODTA1

R5805
4K99R2F-L-GP

56 QSA7
56 QSA#7

VREFA4

R5806
4K99R2F-L-GP

QSA6
QSA#6

1
R5803
4K99R2F-L-GP

VDDL
VSSDL

56 CSA1_0#

VDD
VDD
VDD
VDD
VDD

A1
E1
J9
M9
R1

K4N1G164QE-HC20-GP

56,57 BA2

VDDL
VSSDL

J1
J7

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

A7
B2
B8
D2
D8
E7
F2
F8
H2
H8

VSS
VSS
VSS
VSS
VSS

A3
E3
J3
N1
P9

+1.8V_RUN
C

VDDLA4

BA2

F3
B3

CSA1_0#

56,57

+1.8V_RUN

DQMA#6
DQMA#5

CKE

A9
C1
C3
C7
C9
E9
G1
G3
G7
G9

MDA[0..63]

C5805
SCD1U16V2KX-3GP

CAS#

VDD
VDD
VDD
VDD
VDD

K2

56 ODTA1

L7

RAS#

A1
E1
J9
M9
R1

CKEA1

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

K7

W E#

CK#
CK

56 CKEA1

56 DQMA#6
56 DQMA#5

56 QSA6
56 QSA#6

RASA1#
CASA1#

56 CASA1#

+1.8V_RUN

K3

K8
J8

56 CLKA1#
56 CLKA1

56 RASA1#

WEA1#

CLKA1#
CLKA1

B9
B1
D9
D1
D3
D7
C2
C8
F9
F1
H9
H1
H3
H7
G2
G8

+1.8V_RUN

56 WEA1#

A12
A11
A10/AP
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0

DQ15
DQ14
DQ13
DQ12
DQ11
DQ10
DQ9
DQ8
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0

C5804
SC1U6D3V2KX-GP

CS#

BA0
BA1

R2
P7
M2
P3
P8
P2
N7
N3
N8
N2
M7
M3
M8

MDA61
MDA60
MDA62
MDA56
MDA63
MDA58
MDA57
MDA59
MDA33
MDA38
MDA32
MDA37
MDA36
MDA35
MDA39
MDA34

L8

L2
L3

MAA12
MAA11
MAA10
MAA9
MAA8
MAA7
MAA6
MAA5
MAA4
MAA3
MAA2
MAA1
MAA0

56,57

CSA1_0#

A9
C1
C3
C7
C9
E9
G1
G3
G7
G9

MDA[0..63]

C5806
SCD1U16V2KX-3GP

CKE

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

MDA41
MDA45
MDA43
MDA46
MDA47
MDA40
MDA44
MDA42
MDA49
MDA54
MDA51
MDA53
MDA52
MDA50
MDA55
MDA48

BA0
BA1

K2

B9
B1
D9
D1
D3
D7
C2
C8
F9
F1
H9
H1
H3
H7
G2
G8

CK#
CK

DQ15
DQ14
DQ13
DQ12
DQ11
DQ10
DQ9
DQ8
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0

C5801
SCD1U16V2KX-3GP

K8
J8

CKEA1

56 CKEA1

A12
A11
A10/AP
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0

CLKA1#
CLKA1

56 CLKA1#
56 CLKA1

56 CSA1_0#

R2
P7
M2
P3
P8
P2
N7
N3
N8
N2
M7
M3
M8

BA0
BA1

MAA12
MAA11
MAA10
MAA9
MAA8
MAA7
MAA6
MAA5
MAA4
MAA3
MAA2
MAA1
MAA0

L2
L3

BA0
BA1

56,57

U5802

56,57 BA0
56,57 BA1
56,57 MAA[0..12]

C5802
SC1U6D3V2KX-GP

56,57 BA0
56,57 BA1
56,57 MAA[0..12]

56,57

U5801

L5802
2
1
BLM15BD121SN1D-GP

K4N1G164QE-HC20-GP

+1.8V_RUN

C5855
SC10U6D3V5KX-1GP

C5850
SC10U6D3V5KX-1GP
2
1

C5853
SC10U6D3V5KX-1GP
2
1

C5849
SC10U6D3V5KX-1GP
2
1

C5816
SC1U6D3V2KX-GP

C5815
SC1U6D3V2KX-GP
2
1

C5814
SC1U6D3V2KX-GP
2
1

C5813
SC1U6D3V2KX-GP
2
1

C5812
SC1U6D3V2KX-GP
2
1

C5811
SC1U6D3V2KX-GP
2
1

C5810
SC1U6D3V2KX-GP
2
1

C5809
SC1U6D3V2KX-GP
2
1

C5808
SC1U6D3V2KX-GP
2
1

1
2

C5807
SC1U6D3V2KX-GP
2
1

+1.8V_RUN

+1.8V_RUN
A

C5820
SCD1U16V2KX-3GP

C5819
SCD1U16V2KX-3GP
2
1

C5818
SCD1U16V2KX-3GP
2
1

1
2

C5817
SCD1U16V2KX-3GP
2
1

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

VRAM
Size
Document Number
Custom
Date:

Monday, March 23, 2009

Rev

SB

ALBA Discrete
Sheet
1

58

of

60

Item

Page#

Date

18,46
52,42

2008/12/08

19,53

2008/12/08

25

Request By
DELL

Issue description

Solution Description

Rev.

Remove Modem function.

Remove MDC schematics,holding,stand off.

X01

Wistron

Reserve PLT_RST# for GPU PCIE reset.

Add R1913(DY),R5305(DY).

X01

2008/11/26

Realtek

Power down sequence issue, request by vendor.

Change R2506 to 1K ohm.

X01

25

2008/12/18

KDS

Follow crystal vendor test report.

Change C2501 to 18pF. C2502 to 15pF.

X01

26

2008/12/08

Wistron

MB version ID change.

Pop R2609,depop R2608.

X01

38

2008/12/08

Wistron

AMD power regulator issue.

Change 1.8V,0.9V power regulator.

X01

42

2008/12/08

Wistron

Follow ME connector list for touch pad connector.

Change TPAD1.

X01

46,51

2008/12/08

Wistron

Follow ME connector list for USB connector.

Change USB1, USB2 and CON4.

X01

30,33

2008/12/15

Wistron

MOSFET can not fully trun on issue.

Add +15V_ALW power circuits. And modify


3.3V_RUN, 5V_RUN enable circuits.

X01

Change EMC2102 first channel to CPU internal


diode. Change channel to GPU inernal diode.

X01

10

8,28

2008/12/15

Wistron

Thermal sensor order changed because DTS still


have accuracy problem.

11

15

2008/12/15

Wistron

Cantiga power rating issue.

Add R1507.

X01

12

26,54

2008/12/15

Wistron

AMD CTF glitch issue.

Reserve KBC GPIO27, Add R2639.

X01

13

40

2008/12/15

Wistron

Add panel self test for factory.

Add D4002,Pop R2638.

X01

14

32

2008/12/15

Wistron

Prevent leakage from KBC.

Change PR3203 pull high from +3.3V_ALW to


+3.3V_RTC_LDO.

X01

15

44,52
51,47

2008/12/15

Wistron

Modify based on EMI test result.

POP EC5203 C5212 EC5202 C5211 C5213 EC5206


EC5201 EC5208 and POP EC4701 EC4702 EC4401
EC4402 EC4403 EC4404 EC5101 with 22P-Varistor

X01

16

41

2008/12/18

Wistron

LCD power sequence issue.

Change +LCD_VDD power produce solution.

X01

17

41

2008/12/19

Wistron

CMO LCD white screen issue.

Add R4108(DY).

X01

18

46,51

2008/12/19

Wistron

Add ESD diode for USB Port.

Add D4601,D4602,D5101.

X01

19

39

2008/12/29

Wistron

GFX CORE glitch issue.

Add PD3902,PD3903,PR3910,PR3915. Change


PC3915,PC3916 to 0.047uF.

X01

20

50

2008/12/29

Wistron

Follow ME connector list for Express card board.

Change CON2 to 20.F1400.050.

X01

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

Size
A3

Document Number

Date:

Monday, March 23, 2009

Change List

Rev

SB

Alba Discrete
Sheet
1

59

of

60

Request By

Item

Page#

Date

21

2009/01/06

Wistron

Power team request for CPU core measurement.

Add PG901,PG902. Pop C901 and depot C902.

X01

22

26

2009/01/08

Wistron

Keyboard detect issue.

Pop R2625.

X01

23

44,51

2009/01/08

Wistron

Change new connector.

Change HDD1 and CON5.

X01

2009/01/12

Wistron

For better GTL reference voltage.

Pop C802.

X01

Add discharge circuit for GPU powers.

Add R3016,Q3006,R3015,Q3003,Q3702,R3702
R3703,D3802,R3802,C3802.

X01

For pop noise on YC version codec.

Add Q2201,Q2202,R2219. Add GPIO33 for HP_MUTE.

X01

24

Issue description

Solution Description

Rev.

25

30,36
37,38

2009/01/12

Wistron

26

22,26

2009/01/13

IDT

27

33

2009/01/13

Wistron

For +15V_ALW issue. Prevent higher than 20V.

Add PD3303,PC3301.

X01

28

51

2009/01/30

Wistron

ESD protection concern.

Change R5106 to 33ohm.

X01

29

39

2009/01/30

Wistron

For GFX_CORE overshoot and undershoot issue.

Pop R3921,R3922. Depop R3920,R3923.

X01

30

18,26

2009/02/19

Wistron

Prevent 32768Hz crystal no oscillation from flux.

Change C1807,C1806,C2607,C2608 to 0603 size.

X02

31

22

2009/02/26

IDT

For codec pop noise issue.

Change C2204 to 2.2uf. Add Q2201,Q2202,Q2203,


Q2204,Q2205. Move R2218,R2220 to main board.

X02

32

26

2009/02/26

Wistron

Change Board ID and add VRAM type select pin.

Change board ID to 010,Add GPIO5 for VRAM type. X02

33

30

2009/03/02

Wistron

+3.3V_ALW drop issue.

Add C3005.

X02

34

31,42,
44,45

2009/02/19

Wistron

Connector change request by ME.

Change RJ45,DCIN,FAN,SPEAKER connectors.

X02

35

41

2009/02/19

Wistron

LCD white screen issue.

Pop R4108.

X02

36

31,32

2009/03/02

Wistron

Power team request.

Change PD3107 to 1SMB22AT3G. Change PC3208,


PC3209 to X7R.

X02

37

52

2009/03/05

Wistron

Reserve capacitors and springs for EMI.

Add location for SPR5206~SPR5209 and


EC5210~EC5213.

X02

38

26

2009/03/09

Wistron

No need to support keyboard detect function.

Depop R2625.

X02

39

22

2009/03/09

Wistron

For PC_BEEP sound volume issue.

Modify R2203 to 120Kohm.

X02

40

33

2009/03/10

Wistron

+15V_ALW issue.

Depop PD3303.

X02

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

Size
A3

Document Number

Date:

Monday, March 23, 2009

Change List

Rev

SB

Alba Discrete
Sheet
E

60

of

60

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