Tai Lieu

BO GIAO DUC & AO TAO
TRNG AI HOC KY THUAT CONG NGHE

THANH PHO HO CH MINH

BAI GIANG

KY THUAT SO

Ths. NGUYEN TRONG HAI

LU HANH NOI BO
05/2006
MUC LUC

TONG QUAN.................................................................................................... Trang 1
CHNG 1. HE THONG SO EM........................................................................... 4
1.1. C so chuyen oi c so ..................................................................................4
1.2. Cac bo ma hoa so he mi thong dung ..........................................................14
CHNG 2. AI SO BOOLEAN VA CAC CONG LOGIC.................................. 24
2.1. Khai niem ve logic hai trang thai ...................................................................24
2.2. Bang s that ....................................................................................................24
2.3. Cac phep toan c ban .....................................................................................25
2.4. Mo ta cac mach logic theo phng phap ai so .............................................25
2.5. Thc hien cac mach logic t bieu thc Boolean.............................................25
2.6. Cong NOR va NAND .....................................................................................26
2.7. Phep toan XOR va phep toan tng ng ....................................................27
2.8. Cac nh ly c ban cua ai so Boolean...........................................................27
2.9. Logic dng va am.........................................................................................31
2.10. Cac ham c ban va phng phap bieu dien..................................................23
2.11. Toi thieu ham logic bang ba K....................................................................38
CHNG 3. MACH LOGIC TO HP..................................................................... 45
3.1. Gii thieu........................................................................................................45
3.2. Thiet ke mach logic to hp.............................................................................45
3.3. Ky thuat cc tieu Quine-Mc Cluskey .............................................................47
3.4. Thiet ke mach khong s dung bang s that....................................................49
3.5. Mach giai ma ..................................................................................................53
3.6. Mach ma hoa ..................................................................................................59
3.7. Bo chon kenh..................................................................................................62
3.8. Bo phan kenh..................................................................................................65
3.9. Mach so hoc....................................................................................................67
3.10. Mach chuyen ma .........................................................................................69

CHNG 4. HE TUAN T ....................................................................................... 74
4.1. Tong quan.......................................................................................................74
4.2. Cac phan t hai trang thai ben........................................................................75
4.3. FlipFlop...........................................................................................................76
4.4. FlipFlop dung xung clock................................................................................79
4.5. Cac ng dung cua FlipFlop.............................................................................83
4.6. May trang thai ..............................................................................................104
4.7. Lu o may trang thai ..................................................................................105
4.8. Bo nh ban dan.............................................................................................116
4.9. ROM thiet ke he thong so dung ROM......................................................118
4.10. PLD to hp..................................................................................................127
4.11. PLD tuan t .................................................................................................132
4.12. Cac PLD tuan t khac.................................................................................135
CHNG 5. CAC HO VI MACH SO ..................................................................... 146
5.1. Tong quan.....................................................................................................146
5.2. Cac ac trng cua vi mach so .......................................................................146
5.3. Ho RTL.........................................................................................................148
5.4. Ho DTL.........................................................................................................148
5.5. Ho TTL.........................................................................................................148
5.6. Cac ac iem cua ho TTL chuan..................................................................149
5.7. Ho TTL cai tien ............................................................................................150
5.8. Ho TTL vi ngo ra cc thu h ......................................................................150
5.9. Ho TTL ba trang thai ....................................................................................151
5.10. Mach logic MOS.........................................................................................151
5.11. Ho CMOS ...................................................................................................151
5.12. Mot so vi mach thong dung ........................................................................152
CHNG 6. GIAO TIEP TNG T - SO ........................................................... 153
6.1. Bien oi ADC...............................................................................................153
6.2. Bien oi DAC...............................................................................................160
PHU LUC A. TRA CU CAC IC THONG DUNG..............................................167
PHU LUC B. CONG CU CAD TRONG THIET KE SO .....................................251
Bi Ging K Thut S Tng quan
Trang 1
TONG QUAN
Cac he thong so thng s dung rong rai trong tnh toan va x ly data nh trong
cac he thong ieu khien, trong thong tin, va trong o lng v cac he thong so co
kha nang chnh xac cao hn cac he thong tng t.
Trong mot he thong so, cac tn hieu vat ly co the xem nh cac gia tr ri rac, trong
khi he thong tng t cac ai lng nay thay oi lien tuc.
V d, ien ap ngo ra cua mot he thong so co the c bien oi sao cho ngo ra ch
co 2 gia tr 0 va 1, trong khi ien ap ngo ra t he thong tng t co gia tr thay oi
trong khoang t V
min
en V
max
Do cac he thong so lam viec vi cac ai lng ri rac, trong nhieu trng hp co
the c thiet ke vi ket qua ngo vao va ngo ra mot cach chnh xac.
V d, neu nhan 2 so gom 5 ch so s dung bo nhan digital th ket qua la mot so co
10 ch so chnh xac ca 10. Noi cach khac, ngo ra cua bo nhan analog co the co mot
khoang sai so (%) tuy thuoc vao o chnh xac cua cac thanh phan thiet lap nen bo
nhan.
Thiet ke cua cac he thong so co the chia ra 3 phan:

Thit k h thng (system design) bao gom viec chia nho mot he thong ln
thanh cac he thong con va ch ro cac ac tnh cua moi he thong con. V d, thiet
ke he thong cua mot may tnh so bao gom viec ch ra so va dang cua cac n v
nh, n v toan hoc, cac thiet b vao ra cung nh viec ket noi va ieu khien
cua cac he thong con nay v.v...
Thit k logic (logic design) bao gom viec xac nh lam the nao e ket noi cac
khoi logic c ban e hnh thanh ham ac biet.
Thit k mch bao gom viec ch ra cac ket noi ben trong cua cac thanh phan
nh ien tr, diode, transistor e hnh thanh mot cong, flipflop hoac cac khoi
logic khac. Hau het cac thiet ke mach hien tai c thc hien di dang mach
tch hp dung cong cu thiet ke vi s tr giup cua may tnh e tao cac ket noi
trong gia cac thanh phan tren mot chip silicon.
Nhieu he thong con co dang chuyen mach nh sau:

Switching
Network
X
1
X
2
X
m
Z
1
Z
2
Z
n
Inputs
Outputs

Thit k
h thng
Thit k
Logic
Thit k
Mch
Trang 2
Mot mang chuyen mach co mot hay nhieu ngo vao va mot hay nhieu ngo ra, 2 loai
switching network thong thng la:
Mach t hp, trong o cac tn hieu ngo ra ch le thuoc vao trang thai ngo
vao hien tai (khong le thuoc vao gia tr ngo vao trc o).
Mach tun t, cac ngo ra se tuy thuoc ca gia tr trc o va gia tr hien tai
cua ngo vao. Noi cach khac, e xac nh ngo ra cua mach tuan t, mot
chuoi cac ngo vao phai c xac nh. Mach tuan t c goi la mach co
nh v no phai nh mot so trang thai trc o cua ngo vao, trong khi mach
to hp th khong co nh. Tong quat, mach tuan t la ket hp cua mot mach
to hp vi cac phan t nh.
Cac khoi c ban s dung trong cac mach to hp la cac cng logic. Khi thiet ke
logic, phai xac nh lam the nao ket noi cac cong nay e bien oi cac tn hieu ngo
vao thanh cac tn hieu ngo ra mong muon.
Moi quan he gia cac tn hieu ngo vao va ngo ra phai c mo ta toan hoc, trong
thiet ke so goi la ai s Boolean.
Cc buc thit k mt mach t hp
Thiet lap mot bang mo ta moi quan he gia ngo ra va to hp ngo vao
Thiet lap bieu thc logic toan hoc mo ta cac ngo ra nh mot ham cua cac
ngo vao.
Rut gon bieu thc logic mo ta ngo ra dung mot so phng phap thong dung
nh ba Karnaugh, Quine-McCluskey v.v...
Thc hien mach
Cac phan t nh c ban trong thiet ke mach tuan t la cac FlipFlop. Cac flipflop co
the c ket noi vi cac cong e hnh thanh mot mach tuan t.
Cc buc thit k mt mach tun t
Thiet lap mot bang mo ta moi quan he gia ngo ra hien tai va ngo ra ke
tiep.
Thiet lap bieu thc logic toan hoc mo ta cac ngo vao cua flipflop nh mot
ham cua cac ngo ra.
Rut gon bieu thc logic mo ta ngo vao dung mot so phng phap thong
dung nh ba Karnaugh, Quine-McCluskey v.v...
Thc hien mach
Phan tch mot cach tong quat ve cac mach tuan t thng dung cac gin thi
gian, my trang thi v graph.
Phn t chuyn mach dung trong cac he thong so thng la cac phan t 2 trang
thai, ngo ra ch co 2 gia tr ri rac khac nhau. V d relay, diode, transistor... Hai
trang thai cua relay la ong va m tuy thuoc vao nguon cung cap cho cuon day.
Trang 3
Hai trang thai cua diode la trang thai dan va khong dan. Hai trang thai cua
transistor la bao hoa va tat, v vay thng dung cac so nh phan trong cac he thong
so.
Bat c cac thiet ke logic so nao cung co the c thc hien nh PLD
(Programmable Logic Design). PLD la ten goi tong quat cua mot IC so ma co the
lap trnh c e thc hien cac ham logic khac nhau va la mot chip cha cac cau
truc mach co qui luat cho phep ngi thiet ke tao cac ng dung cu the
Qu trnh thit k PLD nh sau

Mot so cong cu phan mem ho tr trong thiet ke so: MAX+PLUS II, ABEL,
SYNARYO...
Mot so ngon ng mo ta phan cng: ABEL, VHDL, AHDL,...

tng
Trnh son
tho mch
Trnh son
tho v<n bn
Trnh bin dch
v m phng
Kit np IC
Bi Ging K Thut S Chng 1
GV: Nguyn Trng Hi Trang 4
CHNG 1. H THNG S AM

1.1. C S - CHUYN AI C S
1.1.1. Khi nim
Bat c mot so nguyen dng R (R>1) eu co the c chon lam c so cho mot
he thong so.
Neu he thong co c so R th cac so t 0 en (R-1) c s dung.
V du: neu R=8 th cac ch so can thiet la 0,1,2,3,4,5,6,7.
Cac he thong c so thong dung trong ky thuat so:
Thap phan (c so 10).
Nh phan (c so 2).
Bat phan (c so 8).
Thap luc phan (c so 16).
Mt h thng voi co s R uoc biu din duoi dang
(a
3
a
2
a
1
a
0
a
-1
a
-2
a
-3
)
R

Khai trien theo ham mu cua R.
N =(a
3
a
2
a
1
a
0
a
-1
a
-2
a
-3
)
R

= a
3
.R
3
+ a
2
.R
2
+ a
1
.R
1
+ a
0
.R
0
+ a
-1
.R
-1
+ a
-2
.R
-2
+ a
-3
.R
-3

Vi cac c so ln hn 10 th can phai them cac ky hieu e bieu hien cac so ln
hn 10. V du he thap luc phan (hex) co c so 16 th A bieu th 10, B bieu th
11,, F bieu th 15.

Ai gia cc c s
Phn nguyn v phn thp phn uoc i mt cch ring bit
Phn nguyn uoc i bng cch su dung php chia lp cho co s moi v su
dung chui cc s du pht sinh tao ra s moi. Php tnh s hoc uoc thuc
hin trn cc s hang cua co s cu
Phn thp phn uoc i bng cch nhn lp lai cho co s moi, su dung cc
s nguyn uoc tao ra biu thi phn s uoc chuyn i, php tnh s
hoc uoc thuc hin trn cc co s cu

Phn
nguyn
Phn thp
phn
Bi Ging K Thut S Chuong 1
GV: Nguyn Trong Hi Trang 5
V d: Bin i phn nguyn trong h co s 10 sang h co s R
N = (a
n
a
n-1
a
2
a
1
a
0
)
R
= a
n
.R
n
+ a
n-1
.R
n-1
+ + a
2
.R
2
+ a
1
.R
1
+ a
0

Neu chia N cho R, nhan c so d la a
0

R
N
= a
n
.R
n-1
+ a
n-1
.R
n-2
+ + a
2
.R
1
+ a
1
+
R
a
0
= Q
1
+ so d a
0

Chia Q
1
cho R

R
Q
1
= a
n
.R
n-2
+ a
n-1
.R
n-3
+ + a
3
.R
1
+ a
2
+
R
a
1
= Q
2
+ so d a
1
Qua trnh tren c thc hien tiep tuc cho en khi tm c tat ca cac he so a
n

V d: Bin i phn thp phn ca h co s 10 sang h co s R
F = (a
-1
a
-2
a
-3
a
-m
)
R

= a
-1
.R
-1
+ a
-2
.R
-2
+ a
-3
.R
-3
+ + a
-m
.R
-m

Nhan F vi R
FR = a
-1
+ a
-2
.R
-1
+ a
-3
.R
-2
+ + a
-m
.R
-m+1
= a
-1
+ F
1

Vi a
-1
la phan nguyen, F
1
la phan le cua phep nhan
Tiep tuc nhan R vi F
1

F
1
.R = a
-2
+ a
-3
.R
-1
+ a
-4
.R
-2
+ + a
-m
.R
-m+2
= a
-2
+ F
2

Tiep tuc qua trnh cho en khi xac nh het cac he so a
-m

Bin oi gia 2 co so khng phai l co so 10 c th thuc hin d dng bng cch
au tin bin oi sang co so 10 roi bin oi tip tu co so 10 sang co so moi.
1.1.2. H thp phn (h c s 10)
He thap phan c ket hp bi 10 ch so: 0, 1, 2, 3, 4, 5, 6, 7, 8, 9
Mot ch so trong he thap phan c bieu dien theo cac so mu cua 10.

So mang trong so ln nhat goi la MSD (most significant digit)
So mang trong so nho nhat goi la LSD (least significant digit)
V d: So 5346,72 bieu dien nh sau:
5346,72 = 5.10
3
+ 3.10
2
+ 4.10 + 6 + 7.10
-1
+ 2.10
-2

5 3 4 6 7 2
10
3
,
10
2
10
1
10
0
10
-2
10
-1
MSD iem thap
phan

LSD
Trong so

em trong he thap phan:
0 10 100
1 11 101
2 12 102
3 13 103
4 14 104
5 105
6 106
7 107
8 108
9 99 109
Tong quat vi N ch so co the em c 10
N
so khac nhau, bao gom ca so 0. So
thap phan ln nhat la 10
N
1.
1.1.3. H nh phn (h c s 2)
He nh phan dung hai ch so 0, 1.
Mot so trong he nh phan c bieu dien theo so mu cua 2.

Mot ch so nh phan goi la bit.
Chuoi 4 bit nh phan goi la nibble.
Chuoi 8 bit goi la byte.
Chuoi 16 bit goi la word.
Chuoi 32 bit goi la double word.
Ch so nh phan ben phai nhat cua chuoi bit goi la bit co y ngha nho nhat (least
significant bit LSB)
Ch so nh phan ben trai nhat cua chuoi bit goi la bit co y ngha ln nhat (most
significant bit MSB).
Thng dung ch B cuoi chuoi bit e xac nh o la so nh phan.
V d: So 1011,101B bieu dien gia tr so:
1011,101B = 1.2
3
+ 0.2
2
+ 1.2
1
+1.2
0
+ 1.2
-1
+ 0.2
-2
+ 1.2
-3

1 0
1
1 0
1
2
3
1
2
2
2
1
2
0
2
-3
2
-1
MSB iem nh
phan

LSB
Trong so
2
-2
em trong he nh phan
Xet bo em 4 bit, bat au vi tat ca cac bit = 0

2
3
= 8 2
2
= 4 2
1
= 2 2
0
= 1
0
0
0
0
0
0
0
0
0
0
1
1
0
1
0
1
0
0
0
0
1
1
1
1
0
0
1
1
0
1
0
1
1
1
1
1
0
0
0
0
0
0
1
1
0
1
0
1
1
1
1
1
1
1
1
1
0
0
1
1
0
1
0
1
Cung nh trong he thap phan, neu dung N bit se em c 2
N
lan.
Chuyen so nh phan thanh so thap phan:
Phng php: Cong trong so cac bit 1
V d: 1011,11B = 1.2
3
+ 0.2
2
+ 1.2
1
+ 1 + 1.2
-1
+ 1.2
-2
= 11,75
Chuyen so thap phan thanh so nh phan:
Phng php:
Phan nguyen: Chia 2, nh lai so d
Phan thap phan: Nhan 2, nh lai phan nguyen
V d: Chuyen (25)
10
ra so nh phan

12
2
25
= + so d 1
6
2
12
= + so d 0
3
2
6
= + so d 0
1
2
3
= + so d 1
0
2
1
= + so d 1

25 = 1 1 0 0 1
MSB LSB
Trong so
V d: Chuyen (0,625)
10
thanh so nh phan
0,625 2 = 1,25
0,25 2 = 0,5
0,5 2 = 1,0
0,625 = 0,101B

1.1.4. Cc php ton s hc trn s nh phn
Cac phep toan so hoc tren so nh phan chu yeu van giong cac phep toan tren so
thap phan, ngoai tr phep cong va phep nhan th n gian hn.
Bang phep cong cho so nh phan
0 + 0 = 0
0 + 1 = 1
1 + 0 = 1
1 + 1 = 0 nh 1 cho so hang ke tiep
V d: cong 13
10
vi 11
10
di dang nh phan
1111 cac so nh
13
10
= 1101
11
10
= 1011
11000 =24
10

Bang phep tr cho so nh phan
0 - 0 = 0
0 - 1 = 1 mn 1 t so hang ke tiep
1 - 0 = 1
1 - 1 = 0
Mn1 t 1 cot tng ng vi viec tr 1 tai cot o
V d:
(a) 1 (b) 1111
11101 10000

- 10011

- 11
1010
(mn 1 t cot th 3)
1101
(mn)
Bang phep nhan cho so nh phan
0 x 0 = 0
0 x 1 = 0
1 x 0 = 0
1 x 1 = 1
V d: Nhan 13
10
vi 11
10
dang nh phan
1101
1011
1101
1101
0000
1101

10001111 =143
10
oi vi may tnh, phep nhan c thc hien bang phng phap cong va dch
trai:
- Thanh phan au tien cua tong se chnh la so b nhan neu nh LSB cua so
nhan la 1. Ngc lai, LSB cua so nhan bang 0 th thanh phan nay bang 0.
- Moi thanh phan th i ke tiep se c tnh tng t vi ieu kien la phai dch
trai so b nhan i bit.
- Ket qua can tm chnh la tong cac thanh phan noi tren.
Phep chia cho so nh phan
Phep chia cac so nh phan cung tng t nh oi vi cac so thap phan.
V d: 30/6
11110 110
110 101
011
000
110
110
0
Tng t nh oi vi phep nhan, ta co the dung phep tr va phep dch phai cho
en khi khong the thc hien phep tr c na.
1.1.5. S c du - khng du
He thong so c chia lam 2 loai: khong dau va co dau.
Trong he thong co dau: e bieu th so nh phan co dau thng s dung bit MSB
e ch dau: bit 0 ch so dng, bit 1 ch so am, cac bit con lai e ch o ln
Nh vay, neu ta dung 8 bit e bieu dien th se thu c 256 to hp ng vi cac
gia tr 0..255 (so khong dau) hay 127.. 0 +0 +127 (so co dau).
Tuy nhien, khong n gian la c thay oi bit MSB bang 1 e bieu dien gia tr
am, v du nh 01000001 (+65) thanh 11000001 (-65), cac phep tnh so hoc se
khong con ung.
Gia tr am c mo ta di dang so bu 2.
So bu 2 (2s component)
So bu 2 cua mot so nh phan xac nh bang cach lay ao cac bit roi cong them 1.
V d: Trong he thong co dau 8bit
So +65 bieu dien la: 0100 0001
So bu 2 cua +65 la: 1011 1110 + 1 = 1011 1111. ( 65)
Nhng neu oi ngc 1011 1111 sang thap phan se khong nhan c -65. e
xac nh gia tr tuyet oi cua mot so nh phan am, thc hien lai cac bc tren
-65 10111111
ao bit 01000000
cong 1 1
+65 01000001
Th lai bang cach lay tong cua +65 va 65, ket qua phai bang 0
+65
-65
01000001
+10111111
00 (1)00000000
Trong phep cong vi so bu 2, ta bo qua bit nh cuoi cung bi v co mot bit gan
cho bit dau nen ket qua van ung
Khi bieu dien theo so bu 2, neu s dung 8 bit ta se co cac gia tr so thay oi t
-128 ..127.
Phep tr thong qua so bu 2
Ngoai cach tr nh tren, ta cung co the thc hien phep tr thong qua so bu 2 cua
so tr: A-B=A+(-B)
VD: 0110 1101 0110 1101
- 0011 0001 + 1100 1111
1 0011 1100
So bu 1 Nh

1100 1110 + 1 = 1100 1111 (So bu 2)

Ket qua 0011 1100, Bit MSB = 0 cho biet ket qua la so dng.
Xet khoang thay oi sau
+3 00000011
+2 00000010
+1 00000001
0 00000000
-1 11111111
-2 11111110
-3 11111101
Thay rang cac bit 0 so nh phan am bieu th gia tr thap phan cua no: tnh gia
tr cua cac bit 0 theo v tr giong nh vi bit 1, cong cac gia tr lai va cong 1.
1.1.6. H bt phn (h c s 8)
He bat phan c ket hp bi 8 ch so: 0, 1, 2, 3, 4, 5, 6, 7.
V tr cua moi ch so co trong so nh sau:

8
4
8
3
8
2
8
1
8
0
8
-1
8
-2
8
-3
8
-4
8
-5

em trong he bat phan
0 10 70
1 11 71
2 12 72
3
4
5
6 66 277
7 67 300
Vi N ch so bat phan, ta co the em t 0 en 8
N
-1, 8
N
lan em khac nhau.
Chuyen so bat phan sang so thap phan:
V d: (24.6)
8
= 2.8
1
+ 4.8
0
+ 6.8
-1
=(20.75)
10

Chuyen so thap phan sang bat phan:
V d: oi (266)
10
sang he bat phan
33
8
266
= + so d 2
4
8
33
= + so d 1
0
8
4
= + so d 4
266
10
=

V d: Chuyen 0,3125 thanh so bat phan
0,3125 8 = 2.5
0,5 8 = 4.0
( 0,3125 = 0,24
8
)

iem bat phan
412
8
Chuyen so bat phan sang so nh phan:
Phng php: Bien oi moi ch so bat phan sang 3 bit nh phan tng ng
So Octal 0 1 2 3 4 5 6 7
So nh phan
tng ng
000 001 010 011 100 101 110 111
V d: Bien oi (472)
8
sang so nh phan nh sau:
4 7 2

100 111 010
Vay (472)
8
chuyen sang nh phan la 100111010B.
Chuyen so nh phan sang so bat phan.
Phng php: nhom tng 3 bit bat au tai LSB, sau o chuyen moi nhom
nay sang so bat phan tng ng (theo bang chuyen oi tren).
V d: chuyen 100111010B sang so bat phan
1 0 0 1 1 1 0 1 0

(4 7 2)
8

Trng hp cac so nh phan khong u thanh 1 nhom 3 bits, ta them 1 hoac 2
so 0 ve ben trai cua MSB.
V d: chuyen 11010110 sang so bat phan
0 1 1 0 1 0 1 1 0

(3 2 6)
8

Li ch cua he bat phan
Viec de dang chuyen t he bat phan sang nh phan va ngc lai lam cho he
bat phan rat co li trong viec rut ngan cac so nh phan ln. Trong may tnh,
cac so nh phan nay khong phai luon luon bieu hien mot con so ma thng
bieu th di dang ma mang thong tin, v du:
d lieu bang so thc
cac so tng ng vi cac v tr (a ch) trong bo nh
ma lenh
ma bieu th so hoc va cac ac iem khac
mot nom cac bit bieu hien trang thai cua cac thiet b trong va ngoai
may tnh
Khi giai quyet mot lng ln cac so nh phan vi nhieu bit, thng dung cac
so di dang bat phan hn la nh phan e tang o tien li, mac du cac mach
so va cac he thong so lam viec hoan toan tren so nh phan.
V d: Chuyen so 117
10
sang he bat phan roi chuyen sang he nh phan
Giai 22
8
177
= + so d 1
2
8
22
= + so d 6
0
8
2
= + so d 2
Vay (177)
10
=(261)
8
= (10110001)
2

Phng phap chuyen so thap phan thanh so nh phan nay thng nhanh hn
viec chuyen thang t thap phan sang nh phan, ac biet oi vi cac so ln.
Cung nh vay oi vi viec chuyen ngc lai t nh phan sang thap phan
bang cach chuyen sang so bat phan
1.1.7. H thp lc phn (h c s 16)
Trong he thong nay, ta dung cac so 0..9 va cac k t A..F e bieu dien cho mot
gia tr so (tng ng vi 10 en 15 trong he 10). Thong thng, ta dung ch H
cuoi e xac nh o la so thap luc phan.

He thap luc phan He thap phan He nh phan
0
1
2
3
4
5
6
7
8
9
A
B
C
D
E
F
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
em trong he thap luc phan (hex)
Khi em trong he thap luc phan moi ch so tang t 0 en F sau o ve 0 va
ch so co trong so ln hn ke tiep se tang len 1.

0 10 20

9 19 FF
A 1A 100
B
C
D
E 1E 6FF
F 1F 700

Chuyen so hex sang thap phan
V d: 356
16
= 3.16
2
+ 5.16
1
+ 6.16
0
= 854
10

Chuyen so hex sang nh phan
Phng php: moi ch so hex c bien oi thanh so nh phan 4 bit tng
ng.
V d: 9F2
16
= 9 F 2

1001 1111 0010
Chuyen oi so nh phan sang so hex
Phng php: cac bit nh phan c nhom vao nhom 4 bit t LSB, moi
nhom 4 bit c bien oi sang so hex tng ng. Neu so bit khong u 4, th
cong them bit 0 vao MSB.
V d: 1110100110
2
= 0 0 1 1 1 0 1 0 0 1 1 0 = 3A6
16

3 A 6
V d: Chuyen (378)
10
sang so hex roi chuyen sang so nh phan, nhan xet
V d: Chuyen B2F
16
sang bat phan

1.2. CC B M HA S H MI THNG DNG
Khi cac so, mau t hoac cac t words c bieu th di dang mot nhom cac ky
hieu khac, ta noi rang chung c ma hoa va nhom ky t o c goi la mot
ma.
Mot trong nhng ma thong dung nhat la ma Morse, chung bao gom cac cham va
gach e bieu hien cac mau t hay cac ch cai.
Bat c so thap phan nao cung co the c mo ta bang so nh phan tng ng,
mot nhom cac so nh phan 0 va 1 co the c xem la mot ma cho so thap phan.
Khi mot so thap phan c mo ta bang so nh phan tng ng vi no, ngi ta
goi la ma nh phan trc tiep (straight binary code)
Tat ca cac he thong so dung mot so dang cac so nh phan cho viec thc thi ben
trong, nhng cac t ben ngoai th thng la thap phan, ngha la co mot s bien
oi thng xuyen t thap phan sang nh phan, s bien oi t thap phan sang nh
phan co the chiem mot khoang thi gian lau va phc tap oi vi mot so ln. V
ly do o, viec ma hoa cac so thap phan bang cach ket hp mot vai chc nang
cua ca he thong thap phan va nh phan c s dung trong cac tnh huong.
1.2.1. M BCD (Binary-Coded-Decimal Code)
Neu moi ch so cua so thap phan c mo ta bang so nh phan tng ng vi
no, ket qua ta c 1 ma goi la ma BCD, v ch so thap phan ln nhat la 9, can
4 bit e ma hoa.
Cac so 8,4,2,1 c goi la trong so cua ma va c goi la ma BCD 8-4-2-1.
oi khi trong so 8-4-2-1 to ra khong thuan tien trong tnh toan, mot so trong so
khac cung c s dung nh 2-4-2-1, 5-4-2-1, 7-4-2-1

M BCD
Trng s Trng s Trng s Trng s

Thp
phn
8 4 2 1 7 4 2 1 2 4 2 1 5 1 2 1
0
1
2
3
4
5
6
7
8
9
0
0
0
0
0
0
0
0
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
0
0
1
1
0
0
0
1
0
1
0
1
0
1
0
1
0
0
0
0
0
0
0
1
1
1
0
0
0
0
1
1
1
0
0
0
0
0
1
1
0
0
1
0
0
1
0
1
0
1
0
1
0
0
1
0
0
0
0
0
0
1
1
1
1
1
0
0
0
0
1
0
1
1
1
1
0
0
1
1
0
1
0
0
1
1
0
1
0
1
0
0
0
1
0
1
0
0
0
0
0
1
1
1
1
1
0
0
0
0
1
0
0
0
0
1
0
0
1
1
0
0
0
1
1
1
0
1
0
1
0
0
1
0
1
1
Lu y rang cac loai ma 5-1-2-1 va 2-4-2-1 la khong duy nhat trong khi ma 8-4-
2-1 va 7-4-2-1 lai duy nhat
V d: So thap phan 874 chuyen sang tng ng nh phan nh sau:
8 7 3 (thap phan)

1000 0111 0011 (BCD 8-4-2-1)
1011 1010 0011 (BCD 5-1-2-1)
hoac 1011 1101 0110 (BCD 5-1-2-1)
Mot lan na, moi ch so thap phan c bien oi trc tiep sang so nh phan
tng ng, lu y rang 4 bit luon c dung cho moi ch so thap phan
Trong bai giang nay lay ma BCD 8-4-2-1 lam v du. Ma BCD bieu th moi ch
so cua so thap phan bang so nh phan 4 bit, s dung cac so nh phan 4 bit t
0000 en 1001, khong s dung cac so 1010, 1011, 1100, 1101, 1110 va 1111.
V d: Bien oi 0110100000111001 (BCD 8-4-2-1) sang gia tr thap phan
Gii
Chia so BCD thanh cac nhom 4 bit va bien oi sang thap phan
0110 1000 0011 1001 = 6839
So sanh BCD va nh phan. Mot ieu quan trong la ma BCD khong giong nh
ma nh phan trc tiep. Ma nh phan trc tiep bien oi so thap phan sang nh
phan trong khi ma BCD bien oi moi ch so trong so thap phan sang nh phan.
Xet v du bien oi 137 sang ma nh phan trc tiep va sang BCD 8-4-2-1 nh sau:
137
10
= 10001001
2
(nh phan)
137
10
= 0001 0011 0111 (BCD 8-4-2-1)
Ma BCD can 12 bit trong khi ma nh phan trc tiep ch can 8 bit e bieu th so
137. Ma BCD can nhieu bit hn la bi v BCD khong dung het cac kha nang cua
cac nhom 4 bit va v vay co phan nao o khong hieu qua.
u iem chnh cua BCD la de dang chuyen sang thap phan. Ch phai nh cac
nhom ma 4bit cho cac so thap phan t 0 en 9. S de dang chuyen oi nay ac
biet quan trong theo quan iem ve phan cng v trong mot he thong so, no la
cac mach logic e tao nen s chuyen oi sang va t thap phan
1.2.2. Cc php ton s hc vi m BCD
Cng BCD
Cong hai so BCD co iem khac so vi cong hai so nh phan. Khi tong cua moi
so hang BCD 9 th tong o la ket qua cuoi cung
V d,
01010011 (53)
00100101 (25)
01111000 (78)
Khi tong hai so nh phan 9 th tong phai c cong them 6 va nh 1 len hang
BCD co ngha cao hn
V d,

0001 0111 (17)
0010 0101 (25)
0011 1100 Ket qua 9
0110 (6)
0100 0010 (42)
Tr BCD
Giong quy luat tr so nh phan nhieu bit, neu so b tr nho hn so tr th phai
mn 1 hang co ngha ln hn (giong tr thap phan)

Biu din s BCD m
Giong he nh phan, e bieu dien so am trong he nh phan thng dung so bu 2,
e bieu dien so BCD am thng dung so bu 10.
So bu 10 bang so bu 9 cong 1
Bit tan cung ben trai la bit dau: 1 cho so am va 0 cho so dng
V d,

1.2.3. M qu 3 (excess-3code)
Ma qua 3 c hnh thanh bang cach cong them 3 n v vao ma BCD 8421.
V d: bien oi 48 sang ma qua 3
4 8
+ 3 + 3 Cong 3 cho moi ch so
7 11

0111 1011 Chuyen sang ma nh phan 4 bit
Bang liet ke ma BCD va ma qua 3 tng ng vi cac ch so thap phan.
Thap phan BCD Ma qua 3
0
1
2
3
4
5
6
7
8
9
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100

0101 0101 (55) 0100 1111 Mn 1
0001 1000 (18) 0001 1000
0011 0111 (37)
+ 342 0 342 So dng
1 657 So bu 9 cua 342
+ 1
- 342 1 658 So bu 10 cua 342
1.2.4. M Gray
Ma Gray nam trong nhom ma thay oi cc tieu minimun-change codes, o ch
1 bit trong nhom ma thay oi khi i t bc nay qua bc khac.
Ma Gray la ma khong co trong so, ngha la moi v tr cua bit trong nhom ma
khong c gan trong so nao. V vay, ma Gray khong phu hp vi cac bieu thc
so hoc nhng phu hp vi cac thiet b ng dung vao/ra & mot so dang bien oi
analog - digital
Bang chuyen oi ma Gray t so thap phan (0 en 15) vi ma nh phan trc tiep
Thap phan Nh phan Ma Gray Thap phan Nh phan Ma Gray
0
1
2
3
4
5
6
7
0000
0001
0010
0011
0100
0101
0110
0111
0000
0001
0011
0010
0110
0111
0101
0100
8
9
10
11
12
13
14
15
1000
1001
1010
1011
1100
1101
1110
1111
1100
1101
1111
1110
1010
1011
1001
1000
1.2.5. M Johnson
Ma nay s dung nam ch so nh phan e bieu dien cac ch so he mi.
Phng php: Khi chuyen sang so tiep theo ma se thay ch so 0 bang ch so
1, bat au t phai sang trai, cho en khi at 11111 th se bat au thay the dan
ch so 1 bang ch so 0 va cung theo chieu t phai sang trai
M Johnson H 10
J
4
J
3
J
2
J
1
J
0

0
1
2
3
4
5
6
7
8
9
0
0
0
0
0
1
1
1
1
1
0
0
0
0
1
1
1
1
1
0
0
0
0
1
1
1
1
1
0
0
0
0
1
1
1
1
1
0
0
0
0
1
1
1
1
1
0
0
0
0
Ngoai ra con dung cac loai ma co ch so ln hn nh 8 hoac 10 ch so, nhc
iem cua cac loai ma nay la o dai t ma ln nen chiem nhieu thi gian trong
kenh thong tin nhng u iem la co the phat hien sai va trong nhieu trng hp
con co the sa sai, v vay thng goi la ma chong nhieu (noi dung nay nam
trong ly thuyet thong tin)
1.2.6. Cc m Alphanumeric (m theo ch ci v con s)
Ngoai cac d lieu so, mot may tnh phai co kha nang x ly cac cong tin khong
so. Noi cach khac, mot may tnh phai nhan ra cac ma bieu th cac ky t cua ch
cai, cac dau cham, va cac ky t ac biet khac. Cac ma nay c goi la ma
alphanumeric. Mot ma alphanumeric hoan tat bao gom 26 ch cai thng, 26
ch cai hoa, 10 ch so, 7 cham cau, va t 20 en 40 ky t khac, nh +, /, #, %,
*,v.v. Co the noi rang ma alphanumeric bieu th tat ca cac ky t khac nhau va
cac ham tuy thuoc vao chuan ban phm cua may tnh hay may anh ch
Ma ASCII. Ma alphanumeric dung rong rai hien nay la ma ASCII (American
Standard Code for Information Interchange), s dung hau het trong cac may vi
tnh, trong cac the he may tnh ln (mainframe). Ma ASCII la mot ma 7 bit va v
vay no co 2
7
= 128 nhom ma. ieu nay th u e bieu th tat ca cac ky t ban
phm chuan cung nh cac ham ieu khien nh (RETURN) va (LINEFEED)
Ky t ASCII Octal Hex Ky t ASCII Octal Hex
A
B
C
D
E
F
G
H
I
J
K
L
100 0001
100 0010
100 0011
100 0100
100 0101
100 0110
100 0111
100 1000
100 1001
100 1010
100 1011
100 1100
101
102
103
104
105
106
107
110
111
112
113
114
41
42
43
44
45
46
47
48
49
4A
4B
4C
Y
Z
0
1
2
3
4
5
6
7
8
9
101 1001
101 1010
011 0000
011 0001
011 0010
011 0011
011 0100
011 0101
011 0110
011 0111
011 1000
011 1001
131
132
060
061
062
063
064
065
066
067
070
071
59
5A
30
31
32
33
34
35
36
37
38
39
M
N
O
P
Q
R
S
T
U
V
W
X
100 1101
100 1110
100 1111
101 0000
101 0001
101 0010
101 0011
101 0100
101 0101
101 0110
101 0111
101 1000
115
116
117
120
121
122
123
124
125
126
127
130
4D
4E
4F
50
51
52
53
54
55
56
57
58
Blank
.
(
+
$
*
)
-
/

=
RETURN
LINEFEED
010 0000
010 1110
010 1000
010 1011
010 0100
010 1010
010 1001
010 1101
0101111
010 1100
011 1101
000 1101
0001010
040
056
050
053
044
052
051
055
057
054
075
015
012
20
2E
28
2B
24
2A
29
2D
2F
2C
3D
0D
0A
V d: Thong iep c ma hoa trong ASCII nh sau
1001000 1000101 1001100 1010000
Gii Ket qua theo HEX la 48 45 4C 50
Theo bang ASCII, bien oi HEX sang ky t la H E L P
Ma ASCII thng dung trong cac bo truyen cac thong tin alphanumeric gia
mot may tnh va cac thiet b vao ra nh thiet b video hay printer. May tnh cung
s dung no e lu tr cac thong tin nh cac dang lenh.
e co the bieu dien them nhieu ky t khac (ky hieu khong phai la ch La Ting
nh , , , ) ma ASCII c them 1bit na e co ma ASCII 8bit dien ta c
256 ky t, ay la ma ASCII m rong (Extended ASCII)

Bi tp chng 1
1.1. i cc s nhj phn sau sang s thp phn:
a. 10110
b. 10001101
c. 100100001001
d. 1111010111
e. 10111111
1.2. i cc gi trj thp phn sau sang nhj phn:
a. 37
b. 14
c. 189
d. 205
e. 2313
f. 511
1.3. Gi trj thp phn ln nht ca s nhj phn 8 bit l bao nhiu,16 bit l bao
nhiu
1.4. i cc s bt phn sang s thp phn tuong ng:
a. 743
b. 36
c. 3777
d. 257
e. 1204
1.5. i cc s thp phn sau sang s bt phn:
a. 59
b. 372
c. 919
d. 65,535
e. 255
1.6. i cc s bt phn 1.4 thnh s nhj phn.
1.7. i cc s nhj phn 1.1 thnh s bt phn.
1.8. Hy lit k cc s bt phn lin tuc t 1658 n 2008.
1.9.Khi cc s thp phn ln, i sang nhj phn, truc tin ta i sang bt
phn, sau i s bt phn thnh s nhj phn. Hy dng cch ny i s
231310 thnh s nhj phn v so snh vi cch i dng bi 1.2.
1.10. i cc gi trj hex sau thnh s thp phn:
a. 92
b. 1A6
c. 37FD
e. 2C0
f. 7FF
1.11. i cc gi trj thp phn sau sang Hex:
a. 75
b. 314
c. 2048
d. 25,619
e. 4095
1.12. i cc gi trj nhj phn bi 1.1sang thp luc phn.
1.13. i cc gi trj Hex bi 1.10 sang nhj phn.
1.14.Trong my vi tnh, ja chi cc vj tr nh uoc biu din dang thp luc
phn. ja chi ny l nhng s lin tuc m n nhn dang mi mach nh
a. Mt my tnh cu th c th cha 1 s 8 bit trong mi vj tr nh. Nu cc
ja chi nh nm trong khong t 000016 n FFFF16, c bao nhiu vj
tr nh?
b. Mt b vi x l c 4096 vj tr nh th khong ja chi Hex m b vi x l
ny dng l g ?.
1.15. Hy lit k nhng s hex trnh tu t 280 n 2A0.
1.16. Hy m ha cc s thp phn sau thnh s BCD:
a. 47
b. 962
c. 187
d. 42,689.627
e. 1204
1.17. Cn bao nhiu bit th hin cc s thp phn trong khong t 0 n 999
dng m nhj phn chun, m BCD?
1.18. i nhng s BCD sau thnh s thp phn:
a. 10010110101010010
b. 000110000100
c. 0111011101110101
d. 010010010010
1.19. Hy th hin pht biu sau "X = 25/Y" bng m ASCII, c km theo mt bit
chn l.
1.20. Hy thm bit chn l vo m ASCII bi 1.19 v ua kt qu v s Hex.
1.21. Cc nhm m dui y uoc truyn i, hy thm bit chn l cho mi nhm:
a. 10110110
b. 00101000
c. 11110111
1.22. Hy i s thp phn sau thnh m BCD, sau i sang s BCD m:
a. 74
b. 38
c. 165
d. 9201
1.23. Trong h thng s, s thp phn t 000 n 999 uoc th hin dang m
BCD. Mt bit chn l l cng uoc ch km cui mi nhm m. Hy kim tra
cc nhm m bn dui v gi s rng mi mt m uoc truyn t vj tr ny n vj
tr khc. Mt vi nhm c cha li. Gi s khng qu 2 li trong mi nhm. Hy
xc jnh nhm m no c 1 li on v nhm m no c 1 li kp:
a. 100101011000
b. 0100011101100
c. 011110000011
d. 1000011000101
1.24. Thuc hin cc su chuyn i dui y. Trong s , c th th 1 cch tt
nht trong nhiu cch kho st.
a. (1417)
10
= (...)
2

b. (-255)
10
= ()
2

c. (1110101000100111)2 =()
10

e. (2497)
10
= (..)
8

g. (235)
8
= ()
10

i. (7A9)
16
= (.)
10

k. (1600,123)
10
= ()
16

m. (865)
10
=( .)
BCD

n. (100101000111)
BCD
= (.)
10

1.25. Th hin gi trj thp phn 37 theo nhng cch sau:
a. Bin i thng nhj phn
b. BCD
c. ASCII
d. Bt phn
e. Hex
CHNG 2.
AI S BOOLEAN V CC CNG LOGIC

2.1. KHI NIM V LOGIC HAI TRNG THI
Phep toan c ban trong thiet ke logic cac he thong so la ai so Boolean. ai so
Boolean co nhieu ng dung khac nhau bao gom ly thuyet tap hp va logic toan,
v tat ca cac phan t chuyen mach ve c ban eu la cac phan t hai trang thai
(nh diode, transistor), cho nen se tap trung khao sat trng hp ai so Boolean
vi s thay oi gia s ch 1 trong 2 gia tr. ai so Boolean s dung 2 gia tr
nay xem nh ai so ve chuyen mach.
Phan nay s dung cac bien Boolean nh X hoac Y e bieu dien ngo vao hoac
ngo ra cua mach chuyen mach, moi bien co the lay 1 trong hai gia tr. Ky hieu
0 va 1 c dung e ai dien cho hai gia tr khac nhau nay. V vay, neu X
la bien chuyen mach hay bien Boolean th hoac X=0, hoac X=1
Mac du ky hieu 0 va 1 giong nh so nh phan, nhng khong phai nh vay.
ay ch la 2 ky t ai dien cho 2 gia tr cua bien chuyen mach va c xem la
mc logic, mot so v du ve cac hien tng ma mc logic ai dien nh sau

LOGIC 0 LOGIC 1
Sai
Tat
Mc ien ap thap
Khong
M mach
ung
M
Mc ien ap cao
Co
ong mach
V ch co hai gia tr, nen ai so Boolean tng oi de dang hn so vi ai so
thong thng. ai so Boolean, khong co phan so, thap phan, can bac hai, can
bac ba, logarit, so ao, v.v. ai so Boolean ch co 3 phep toan c ban: cong (OR),
nhan (AND) va lay bu (NOT).
2.2. BNG S THT
Bang s that (Truth Table) mo ta cac ap ng ngo ra cua mach logic ng vi
cac to hp khac nhau tai ngo vao.
V d

Mang
chuyen
mach
A
B
X
Mang
chuyen
mach
A
B
X

Mang
chuyen
mach
A
B
X
C
C
D
Cac bang s that tieu bieu ng vi cac mang chuyen mach tren nh sau:

moi bang s that, cac to hp mc logic 0 va 1 oi vi ngo vao (A, B, C, D)
c the hien ben trai, mc logic ngo ra X c the hien ben phai
Lu y, neu co 2 ngo vao th co 4 kha nang xay ra, tng t 8 kha nang cho 3 ngo
vao va 16 kha nang cho 4 ngo vao. Se co 2
N
kha nang xay ra oi vi N ngo vao.
Tat ca cac to hp ngo vao c the hien theo chuoi em nh phan.
2.3. CC PHP TON C BN
2.3.1. Php ton OR v cng OR
Goi A va B la 2 bien logic oc lap. Khi A va B ket hp qua phep toan OR, ket
qua x c mo ta nh sau:
X = A + B
Trong bieu thc nay, dau + khong co ngha la phep cong thuan tuy. No la
phep toan OR, ket qua cua phep toan OR c cho trong bang s that sau:

Ket luan
Phep toan OR se co ket qua bang 1 neu mot hay nhieu bien ngo vao
bang 1
Cong OR ch co mot ngo ra va co the co nhieu hn hai ngo vao

Ngo vao Ngo ra

A B X
0
0
1
1
0
1
0
1
?
?
?
?
A B C X
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
?
?
?
?
?
?
?
?
A B C D X
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
?
?
?
?
?
?
?
?
?
?
?
?
?
?
?
?

Cong OR
A
B
Y=A+B
A B X=A+B
0
0
1
1
0
1
0
1
0
1
1
1
Trang 23
Ky hieu va bang s that cho cong OR 3 ngo vao

V d
Xac nh dang song ngo ra cong OR khi ngo vao A, B thay oi theo gian o sau:

2.3.2. Php ton AND v cng AND
Neu hai bien logic A va B c ket hp qua phep AND, ket qua la:
X= A.B
Bang s that cua phep nhan 2 bien A va B nh sau:

Ket luan
Phep toan AND se co ket qua bang 0 neu mot hay nhieu bien ngo vao
bang 0
Cong AND ch co mot ngo ra va co the co nhieu hn hai ngo vao
V du AND 3 ngo vao co bang s that nh sau

A
B
C
X=A+B+C
Cong AND
B
A
X = AB

Cong AND
B
A
X = ABC
C
A B C X = ABC
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
0
0
0
0
0
0
1
A B C X = A + B + C
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
1
1
1
1
1
1
A B X=A.B
0
0
1
1
0
1
0
1
0
0
0
1
1
0
B
A
Out
B
A
Trang 24
V d
Xac nh dang song ngo ra cua cong AND ng vi cac ngo vao nh sau
`

Trong v du nay thay rang, ngo ra x se bang vi ngo vao A khi B mc logic 1.
V vay ta co the xem ngo vao B nh ngo vao ieu khien, no cho phep dang
song ngo vao A xuat hien ngo ra hay khong. Trong trng hp nay cong
AND c dung nh mot mach cho phep, va ay la ng dung rat quan trong cua
cong AND va se c khao sat sau.
2.3.3. Php ton NOT v cng NOT
Neu bien A c a qua phep toan NOT, ket qua x se la:
X= A
Ta co 0 1 = va 1 0 = , bang s that cho phep toan NOT nh sau:

A
X=A
0
1
1
0
Cong NOT ch co mot ngo vao va mot ngo ra
2.4. M T CC MCH LOGIC THEO PHNG PHP AI S
Bat c mot mach logic nao cung co the c mo ta bang cach s dung cac phep
toan Boolean a e cap tren (cong OR, AND va NOT la nhng khoi c ban
trong mot he thong so).
V d, xet mach sau

Mach co 3 ngo vao A, B va C va mot ngo ra x. S dung cac bieu thc Boolean
cho moi cong ta xac nh c bieu thc ngo ra x = AB + C.
V d

B
A
B
A
X = AB
A.B
B
A
C
X = A.B + C
A+B
B
A
C
X = (A+B).C
Cong NOT
X=A
A
Trang 25
V d xac nh ham ngo ra cua mach sau

2.5. THC HIN CC MCH LOGIC T BIU THC BOOLEAN
V d thc hien bieu thc sau: y = AC+BC+ABC

V d ve s o mach thc hien bieu thc sau: x=AB+BC
V d ve s o mach thc hien bieu thc
( )
x = ABC A+D s dung cac cong co so
ngo vao nho hn 3
2.6. CNG NOR V CNG NAND
Cong NAND va cong NOR c dung rat rong rai trong cac mach so. Thc s
cac cong nay eu c ket hp t cac phep toan c ban AND, OR va NOT.
2.6.1. Cng NOR
Cong NOR hoat ong giong nh hai cong OR va NOT mac noi tiep nh hnh ve
va bieu thc ngo ra la x=A+B, bang s that nh sau:
OR NOR
A B A+B A+B
0
0
1
1
0
1
0
1
0
1
1
1
1
0
0
0
Ngo ra cong NOR la ao vi ngo ra cong OR
AC
C
B
BC
ABC
y=AC+BC+ABC
A
B
C
C
B
A
Ky hieu ao
X=A+B
X=A+B
B
A
A
B
B
A
B
D
C
A
(a)
(b)
Trang 26
V d, xac nh dang song ngo ra cua cong NOR ng vi ngo vao nh sau

2.6.2. Cng NAND
Cong NAND tng ng vi AND cong vi NOT, ngo ra cua NAND se la
x=AB , bang s that cho nh sau:
AND NAND
A B AB AB
0
0
1
1
0
1
0
1
0
0
0
1
1
1
1
0
Ngo ra cong NAND la ao vi ngo ra cong AND
V d, xac nh dang song ngo ra cua cong NAND ng vi ngo vao nh sau

V du, thc hien mach logic co bieu thc nh sau: ) ( D C AB x + = ch dung
cong NOR va NAND
V d xac nh mc logic ngo ra cua v du tren vi A=B=C=1 va D=0
2.7. PHP TON XOR (Exclusive-OR) v php ton tng ng
2.7.1. Php ton XOR v cng XOR
Phep toan XOR (ky hieu ) co bang s that nh sau:
X Y X Y
0
0
1
1
0
1
0
1
0
1
1
0
T bang s that thay rang X Y =1 khi X Y va X Y =0 khi X= Y
Bieu thc toan cua phep toan XOR: X Y = XY+YX
Ky hieu ao
X=A+B
X=A+B
B
A
A
B
B
A
1
A
B
0
B
X
A
A
B
X
Y
X Y
Cng XOR
Trang 27
2.7.2. Php ton tuong uong v cng XNOR
Phep toan tng ng (ky hieu ) co bang s that nh sau:
X Y X Y
0
0
1
1
0
1
0
1
1
0
0
1
T bang s that thay rang X Y = 0 khi X Y va X Y = 1 khi X= Y
Bieu thc toan: X Y = Y X = Y X XY . +
2.8. CC [NH L CO BN CA AI S BOOLEAN
(1) X . 0 = 0
(2) X . 1 = X
(3) X . X = X
(4) X . X = 0
(5) X + 0 = X
(6) X + 1 =1
(7) X + X = X
(8) X + X = 1
2.8.1. Php giao hon, kt hp v phn phi
(9) X + Y = Y + X
(10) X . Y = Y . X
(11) X + (Y + Z) = (X + Y) + Z = X + Y + Z
(12) X(YZ) = (XY)Z = XYZ
(13) X(Y + Z) = XY + XZ
(14) (W + X)(Y + Z) = WY + XY + WZ + XZ
(15) X + XY = X (v X(1+Y) = X)
(16) X + XY = X + Y (v X + XY = (X + Y)(X + X))
(17) (X + Y)(X + Y) = X
2.8.2. [nh l DeMorgan
(18) Y X Y X . = +
(19) Y X Y X + = ) . (
2.8.3. [nh l Consensus
(20) YZ Z X XY + + = Z X XY+
(21) ) )( ( ) )( )( ( Z X Y X Z Y Z X Y X + + = + + +
2.8.4. Cc [nh l cho php tan XOR
(22) X 0 = X
X
Y
X Y
Cng XNOR
Trang 28
(23) X 1 =
X

(24) X X = 0
(25) X
X
= 1
(26) X Y = Y X (Giao hoan)
(27) (X Y) Z = X (Y Z) = X Y Z (Ket hp)
(28) X(Y Z) = XY XZ (Phan phoi)
(29)
Y X XY Y X Y X Y X . ) ( + = = =

V d, rut gon bieu thc D B A D B A y . + =
Gii. ) ( D D B A y + = , s dung nh ly (8): 1 = + D D
B A B A y = = 1 .
V d, Rut gon bieu thc BCD A ACD x + =
V d Rut gon bieu thc ) D B ).( C A ( z + + =
V d Thc hien mach logic vi bieu thc ngo ra C B A z + + = ch dung cong
NAND va cong ao
V d Rut gon bieu thc a.b+ac+bc+bc+ab
V d Rut gon bieu thc (a+b+c)(a+b+d)(b+c+d)
2.8.5. Cc php bin i trn cng NAND v NOR
Tat ca cac bieu thc Boolean eu co the c thc hien thong qua cac cong OR,
AND va NOT. Tuy nhien, e thc hien cac bieu thc logic ma ch dung 1 loai
cong NAND (hay cong NOR), ta se bien oi cong NAND (hay cong NOR) e
thc hien cac phep toan AND, OR, NOT nh sau
Thc hin cc php ton bng cng NAND

A A . A x = =
B A B . A x + = =
A
A
B
x=AB
A
B
Trang 29
Thc hin cc php ton bng cng NOR

V d. Thiet ke mach thc hien bieu thc x=AB+CD, sao cho dung t IC nhat.
Gia s co cac IC sau

2.8.6. Biu din qua li gia cc cng
tren a khao sat 5 loai cong logic (AND, OR, NOT, NAND, NOR) va cac ky
hieu chuan e bieu dien chung tren mot mach logic. Mac du vay mot so mach
cung s dung them mot so cach bieu dien khac nh sau:

A A A x = + =
B . A B A x = + =
A
A
B
x=A+B
A
B
1 2 3 4 5 6 7
8 9 10 11 12 13 14
7400
1 2 3 4 5 6 7
8 9 10 11 12 13 14
7408
GND
Vcc
1 2 3 4 5 6 7
8 9 10 11 12 13 14
7432
GND
Vcc
Trang 30

Khi nhim v mc logic tch cc.

V d,

cong NAND (a) co the dien giai: Ngo ra tch cc mc thap ch khi A va B
mc cao
cong NAND (b): Ngo ra tch cc mc cao khi A hoac B mc thap
V du, dien giai y ngha ngo ra Z theo cac ngo vao ABCD sau
`

AB B A = +
AND
OR
A
B
B A B . A + =
AB
AB B A = +
NAND
NOR
A
B
B A B . A + =
B A +
A
A A
NOT
B
A AB
B
A
A+B
B
A
B
A
A
B
A
B
A
(a)
(b)
AB
AB B A = +
B
A
B
A
(a)
C
D
B
Z
A
A A A A
A tch cc
mc 1
A tch cc
mc 0
A tch cc
cnh ln
A tch cc
cnh xung
Trang 31

Lu y: khi hoan chuyen cac cong, mot nguyen ly chung la: Ket noi ngo ra
ao cua cong nay vao ngo vao ao cua cong kia (hnh b), va ngo ra khong
ao cua cong nay nao ngo ra khong ao cua cong kia (hnh c)
2.9. LOGIC DNG V LOGIC M
ng vi ieu kien hoat ong bnh thng, ien ap cung cap cho cac ngo vao cua
cong logic c han che e co c mot trong hai gia tr 0 va 1. Khi mc ien
ap ngo vao ung cung cap cho mot cong logic th ien ap ngo ra se nhan mot
trong hai gia tr.
Logic dng: Mc ien ap cao trong hai mc ien ap bieu th mc logic 1 va
mc ien ap thap trong hai mc ien ap bieu th mc logic 0
Logic am: Mc ien ap thap trong hai mc ien ap bieu th mc logic 1 va mc
ien ap cao trong hai mc ien ap bieu th mc logic 0
V du cho cong logic va quan he gia ngo vao va ngo ra nh sau:

E
1
E
2
E
3
E
0
0
0
0
0
+V
+V
+V
+V
0
0
+V
+V
0
0
+V
+V
0
+V
0
+V
0
+V
0
+V
0
0
0
0
0
0
0
+V

Cong
Logic
E
1
E
2
E
3
E
0
(b)
(c)
C
A
B
A
Z
B
D
C
D
Z
Trang 32
Bang trang thai logic dng c mo ta nh sau
E
1
E
2
E
3
E
0
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
0
0
0
0
0
0
1
Thay rang E
0
= 1 neu E
1
, E
2
va E
3
= 1, ngha la: E
0
= E
1
E
2
E
3

T o thay rang, cong tren tng ng vi cong AND cho mach logic dng
Neu chuyen bang trang thai sang logic am, c nh sau
E
1
E
2
E
3
E
0
1
1
1
1
0
0
0
0
1
1
0
0
1
1
0
0
1
0
1
0
1
0
1
0
1
1
1
1
1
1
1
0
E
0
= 1 neu E
1
hoac E
2
hoac E
3
= 1, ngha la: E
0
= E
1
+E
2
+E
3

T o thay rang, cong tren tng ng vi cong OR cho mach logic am
Neu co mot ham oi vi mach logic dng, de dang xac nh ham cho mach o
nhng ng vi logic am bang cach ap dung nh ly logic am
Anh l logic m
Neu mot mach to hp co ham F quan he gia ngo ra va ngo vao theo logic
dng, th mach to hp o se co ham oi ngau vi ham F khi ngo vao va ngo ra
c nh ngha theo logic am bang cach bien oi AND thanh OR va ngc lai
V d. Xet mach to hp sau:

Gia s ham G c nh ngha theo logic dng la
G= C B A C AB . +
A

B

C

G

Trang 33
th ham G nh ngha theo logic am se la
G = ( C B A C AB . + )
D
= ) )( ( C B A C B A + + + +
V d. ng dung nh ly logic am, tm oi ngau cua ham XOR
2.10. CC HM C BN CA AI S BOOLEAN V CC PHNG PHP
BIU DIN
2.10.1. Hm logic c bn
Mot ham y=f(x
1
, x
2
, , x
n
) vi cac bien x
1
, x
2
, , x
n
ch nhan hai gia tr 0 hoac 1
va ham y cung ch nhan hai gia tr 0 hoac 1 c goi la ham logic
(1) Hm logic mt bin: y=f(x)
V bien x se nhan mot trong hai gia tr: 0 hoac 1, nen ham y co 4 kha nang hay
thng goi la 4 ham y
0
, y
1
, y
2
, y
3
, va bang chan ly nh sau:
Bang chan ly
Ten ham
x 0 1
Thuat toan logic Ghi chu
Ham khong y
0
0 0 y
0
= 0 Ham luon bang 0
Ham ao y
1
1 0
y
1 = x

Ham lap y
2
0 1 y
2
= x
Ham n v y
3
1 1 y
3
= 1
y
3
= x x +
Ham luon bang 1
(2) Ham logic hai bien y=f(x
1
, x
2
)
Vi hai bien logic x
1
, x
2
, moi bien nhan hai gia tr la 0, 1, nh vay co 16 to hp
logic tao thanh 16 ham. Bang tom tat 16 ham t y
0
y
15
Bang chan tr
x
1
1 1 0 0
Ten ham
x
2
1 0 1 0
Thuat toan logic Ghi
Chu
Ham khong y
0
0 0 0 0 Y
0
= 0
Ham Piec y
1
0 0 0 1
Y
1
=
2 1
x . x =
2 1
x x +

Ham cam x
1
y
2
0 0 1 0
Y
2
=
2 1
x x

Ham ao x
1
y
3
0 0 1 1
Y
3
=
1
x

Ham cam x
2
y
4
0 1 0 0
Y
4
=
1 2
x x

Ham ao x
2
y
5
0 1 0 1
Y
5
=
2
x

Ham XOR y
6
0 1 1 0
Y
6
=
2 1
x x +
2 1
x . x

Ham Cheffer y
7
0 1 1 1
Y
7
=
2 1
x x + =
2 1
x x

Ham AND y
8
1 0 0 0 Y
8
= x
1
x
2

Ham XNOR y
9
1 0 0 1
Y
9
= x
1
x
2
+
2 1
x . x

Ham lap theo x
2
y
10
1 0 1 0 y
10
= x
2

Ham keo theo x
2
y
11
1 0 1 1
Y
11
=
1
x +x
2

Trang 34
Ham lap theo x
1
y
12
1 1 0 0 y
12
= x
1

Ham keo theo x
1
y
13
1 1 0 1
y
13
= x
1
+
2
x

Ham OR y
14
1 1 1 0 y
14
= x
1
+ x
2

Ham n v y
15
1 1 1 1 y
15
=1
(3) Hm logic n bin y=f(x1, x2,, xn)
Vi ham logic n bien, moi bien nhan mot trong hai gia tr 0 hoac 1 nen ta co 2
n

to hp bien, moi to hp bien lai nhan hai gia tr 0 hoac 1, do vay so ham logic
tat ca la
n
2
2 . Vi 1 bien co 4 kha nang tao ham, vi 2 bien co 16 kha nang tao
ham, vi 3 bien co 256 kha nang tao ham, nh vay khi so bien tang th so ham
co kha nang tao thanh rat ln. Tuy nhien tat ca kha nang nay eu c bieu
hien qua cac kha nang tong logic, tch logic va nghch ao logic cua cac bien.
Trong tat ca cac ham c tao thanh, ac biet chu y en ham tong chuan va
ham tch chuan.
Ham tong chuan la ham cha tong cac tch ma moi tch co u tat ca cac bien
cua ham.
Ham tch chuan la ham cha tch cac tong ma moi tong eu co u tat ca cac
bien cua ham
2.10.2. Cc phng php biu din hm logic
(1) Phng php biu din thnh bng
ay cac gia tr cua ham phu thuoc vao cac bien c trnh bay trong mot bang
goi la bang s that.
V d. mot ham 2 bien vi gia tr ham a cho c bieu dien thanh bang nh
sau:
Gi tr thp phn
ca t hp bin

X
2

X
1

Y
0
1
2
3
0
0
1
1
0
1
0
1
1
X
0
1
Ghi chu: dau X la gia tr ham khong xac nh (co the 0 hay 1)
u iem cua cach bieu dien ham bang bang la de nhn, t nham lan.
Nhc iem cua phng phap nay la cong kenh, ac biet khi so bien ln
(2) Phng php hnh hc
ay mien xac nh cua ham c bieu dien trong khong gian n chieu. Moi to
hp bien c bieu dien thanh 1 iem trong khong gian o, ng vi moi iem
se ghi 1 gia tr cua ham. Hai iem nam tren cung mot truc ch khac nhau bi s
thay oi gia tr cua mot bien.

Trang 35
Sau ay minh hoa cach bieu dien ham logic 1 bien, 2, 3 bien di dang hnh hoc

(3) Phng php biu thc i s
Mot ham logic n bien bat ky bao gi cung co the bieu dien thanh ham tong
chuan ay u va tch chuan ay u
Cch vit hm di dng tng chun y
Ch quan tam en to hp bien ma ham co gia tr bang 1. So lan ham
bang 1 se chnh la so tch (minterm) cua cac to hp bien
Trong moi tch, cac bien co gia tr bang 1 c gi nguyen, con cac bien
co gia tr bang 0 th c lay gia tr ao
Ham tong chuan ay u se la tong cac tch o
V d,
Th t to hp bien
A B C F Minterm
0
1
2
3
4
5
6
7
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
0
1
1
0
0
0
1

ABC
ABC

ABC
Vay F =
ABC
(2,3,7) =ABC + ABC + ABC
Cch vit hm di dng tch chun y
Ch quan tam en to hp bien ma ham co gia tr bang 0. So lan ham
bang 0 se chnh la so tong (maxterm) cua cac to hp bien
Trong moi tong cac bien co gia tr 0 c gi nguyen, con cac bien co
gia tr 1 c lay ao.
Ham tch chuan ay u se la tch cac tong o
0 1 x
(a)
00
x
2
01
10 11
x
1
(b)
000
x
2
100
010 110
x
1
101
001
011
111
(c)
x
3
Trang 36
V d,
Th t to hp bien
A B f Maxterm
0
1
2
3
0
0
1
1
0
1
0
1
0
1
0
0
A+B

A+B
A+B
Vay f=
AB
(0,2,3) = (A+B) ( A+B)( A+B)

(4) Phng php biu din bng ba Karnaugh
e bieu dien ham logic n bien, can thanh lap mot bang co 2
n
o, moi o
tng ng vi mot to hp bien. anh so th t cua cac o trong bang
tng ng vi gia tr cua to hp bien
Cac o canh nhau hoac oi xng nhau ch cho phep khac nhau ve gia tr
cua mot bien
Trong cac o ghi gia tr cua ham tng ng vi gia tr cua to hp bien o
M t hm f hai bin bng ba Karnaugh

0 1
0

1

Moi mot o vuong bieu dien mot minterm cua ham f neu no co gia tr 1, va bieu
dien mot maxterm neu co gia tr 0. oc gia tr minterm, maxterm nay giong nh
oi vi bang s that
V d, Ham f c bieu dien bang bang s that va bang ba Karnaugh nh sau

T ba Karnaugh ta cung co the viet lai ham f = B A B . A +

A
B
A=0, B=0
A=0, B=1
A=1, B=0
A=1, B=1
f
A B f
0
0
1
1
0
1
0
1
1
1
0
0

0 1
0
1 0
1
1 0
A
B

0 1
0
1 0
1
1 0
A
B
A.B
AB
f
f
Trang 37
M t hm f ba bin bng ba Karnaugh

Lu : cac o canh nhau hoac oi xng nhau ch cho phep khac nhau ve gia tr
cua mot bien
M t hm f 4 bin bng ba Karnaugh
V d, Mo ta ham f(a,b,c,d) = d b a acd + +

Mot ba 5 bien co the c xay dng tren khong gian 3 chieu bang cach at mot
ba 4 bien tren mot ba th hai. So hang lp di c anh so t 0 en 15, so
hang lp tren c anh so t 16 en 31. V vay so hang nhom di cha A
va so hang nhom tren cha A

A B C f
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
0
1
1
1
0
1
0
A B C f
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
0
1
1
1
0
1
0

0 1
00
0 1
01
0 0
11
1 0
10
1 1

A
BC
ABC=110
th f=1
f

00 01 11 10
00 1 1 1 1
01 1 1 1 1
11 0 1 1 1
10 0 1 0 0
ab
cd
f

00 01 11 10
00

01

11

10

BC
DE
A
1/0
0
1
3
2
4
5
7
6
8
9
11
10
12
13
14
15
16
17
19
18
20
23
22
28
29 21
31
30
24
25
27
26
1
1 1
1
1
1
1
1
1
1
1 1
1
1
1
1
A.BCDE
A.B.CDE
f
Trang 38
Ngoai ra ta co the mo ta ham 5 bien nh sau:


2.11. TI THIU HA HM LOGIC BNG BA KARNAUGH
Cc bc thc hin
Bc 1. Bieu dien ham a cho thanh bang Karnaugh
Bc 2. Xac nh nhom cac tch cc tieu hoac cac tong cc tieu (nhom 2
k
o ke can
hoac oi xng vi ieu kien trong moi nhom phai co t nhat 1 o cha c nhom bi
cac nhom khac)
Bc 3. Trong moi nhom, cac bien co gia tr giong nhau th gi lai, cac bien co gia
tr khac nhau th n gian, sau o viet ham ket qua theo tong hoac theo tch

A=0 A=1

00 01 11 11 10 11 01 00
00
0 2 6 4 5 7 3 1
01
8 10 14 12 13 15 11 9
11
24 26 30 28 29 21 27 25
10
16 18 22 20 21 23 19 17
BC
DE
f

000 001 011 010 110 111 101 100
000
0 1 3 2 6 7 5 4
001
8 9 11 10 14 15 13 12
011
24 25 27 26 30 21 29 28
010
16 17 19 18 22 33 21 20
110
48 49 51 50 54 55 53 52
111
56 57 59 58 62 63 61 60
101
40 41 43 42 46 47 45 44
100
32 33 35 34 38 39 37 36
ABC
DEF
f
Trang 39
V d, tch cc tiu 2 k cn

V d, rut gon ba K sau



C
C
A.B 0 0
A.B 1 0
AB
1 0

AB 0 0
(a)

C
C
A.B 0 0
A.B 1 X
AB
0 0

AB 0 0
(b)
x
x=ABC+ABC=BC
x
x=ABC+ABC=AB
C
C
A.B 1 X
A.B 0 X
AB
0 0

AB 1 0
(c)
x
C.D CD
CD
CD
A.B 0 0 1 1
A.B 0 0 0 0
AB
0 X 0 0
AB 1 0 0 X

(d)
x
C
C

A.B 0 1
A.B 0 X
AB
X 1
x = C
AB 0 1
(a)
x
C.D CD
CD
CD
A.B 0 0 X 0
A.B 0 0 0 0
AB
1 1 X 1
AB 0 0 0 0

x=AB
(b)
x
C.D CD
CD
CD
A.B 1 0 0 0
A.B 0 1 1 0
AB
0 X 1 0
AB X 0 0 0

(c)
C.D CD
CD
CD
A.B 0 0 X 1
A.B 0 0 0 0
AB
X 0 0 1
AB 1 0 X 1

(d)
x
x
C.D CD
CD
CD
A.B 1 0 0 1
A.B 0 1 0 0
AB
0 0 0 0
AB 1 X X X

(e)
x
Trang 40


C.D CD
CD
CD
A.B 1 1 1 1
A.B X 0 0 X
AB
0 0 0 0
AB 1 1 1 1

(c)
C.D CD
CD
CD
A.B 1 0 0 1
A.B 1 0 0 1
AB
1 0 0 1
AB 1 0 0 1

(d)
C.D CD
CD
CD
A.B 0 0 X 0
A.B 1 1 1 1
AB
1 1 X 1
AB 0 0 X 0

x=B
(a)
C.D CD
CD
CD
B A.
1 1 0 0
B A.
X X 0 X
AB 1 1 0 0
B A
1 1 0 0
x=C
(b)
x
x
x
x
Trang 41
Bi tp chng 2
2.1. V dang sng ng ra cho mach hnh sau

2.2. Gi s ng vo A (bi 2.1) = 0, v dang sng ng ra.
2.3. Gi s ng vo A (bi 2.1) = 1, v dang sng ng ra.
2.4. C bao nhiu t hop ng vo ca cng OR 5 ng vo lm cho ng ra
mc cao?
2.5. Thay i cng OR bi 2.1 thnh cng AND
a. V sng ng ra
b. V sng ng ra nu ng vo A ni mass
c. V sng ng ra nu ng vo A ni +5V
2.6. Thm cng o ng ra ca cng OR (bi 2.1). V dang sng tai ng ra
ca cng o.
2.7. Vit biu thc Boolean cho ng ra X. Xc jnh gia trj ca X ng vi cc
iu kin ng vo c th v lit k cc gi trj vo bng su tht.

2.8. Lm lai vi cc yu cu tuong tu bi 2.7

(A)
(C)
(B)
(B)
(A)
(C)
X
A
B
C
X
D
X
A
B
C
Trang 42
2.9. Xc jnh bng su tht y cho mach bi 2.8 bng cch tm mc
logic hin in tai ng ra ng vi mi su kt hop ca ng vo.
2.10. Thay cng OR thnh cng AND, cng AND thnh cng OR bi 2.8,
vit biu thc ng ra.
2.11. ng vi mi biu thc bn dui, xy dung mach logic tuong ng,
dng cng AND, OR, cng o
a. ) ( D C AB x + =
b. D C B E D C B A z + + + = ) (
c. Q P N M y + + = ) (
d. Q P W x + =
e. ) ( N P MN z + =
2.12. V dang sng ng ra

2.13. Lm lai bi 2.12 vi cng NAND
2.14. Vit biu thc ng ra cho mach sau v xc jnh bng su tht

2.15. Thay i mach in uoc xy dung trong bi 2.15 chi dng cng NAND
2.16. Hon tt cc biu thc sau
a. A + 1 =
b. A . A =
c. B . B =
d. C + C =
e. X . 0 =
f. D . 1 =
g. D + 0 =
h. C + C =
i. G + GF =
j. y + wy =
(A)
(C)
(B)
(A)
(B)
(C)
X
A
B
C
X
Trang 43
2.17. on gin biu thc sau
a. x ABC AC = +
b. ( )
( )
y Q R Q R = + +
c. w ABC ABC A = + +
d.
( )
q RST R S T = + +
e. x ABC ABC ABC ABC ABC = + + + +
f.
( ) ( )
z B C B C A B C = + + + +
g. x=(M+N)(M+P)(N+P)
h. z=ABC+ABC+BCD
i.
( )
y C D ACD ABC ABCD ACD = + + + + +
2.18. Hy chng minh jnh l DeMorgan bng tt c cc cch c th.
2.19. on gin biu thc bn dui dng jnh l DeMorgan:
a. ABC
b. A+BC
c. ABCD
d. A(B+C)D
e. (M+N)(M+N)
f. ABCD
2.20. Trnh by cch tao cng NAND 2 ng vo t cng NOT 2 ng vo.
2.21. Trnh by cch tao cng NOR 2 ng vo t cng NAND 2 ng vo.
2.22. Hon tt bng su tht cho mach sau

2.23. Chi ra cch thuc hin x = A BC bng 1 cng NOR 2 ng vo v 1 cng
NAND 2 ng vo.
2.24. Thuc hin biu thc Y = ABCD s dung cc cng NAND 2 ng vo.

A
B
C
D
E
X
Trang 44
2.25 Rt gn ba Karnaugh sau

2.26 Rt gn hm bi 2.17 dng ba Karnaugh

D . C D C
CD
D C
B A.
0 0 1 0
B A.
1 1 1 1
AB 1 1 0 0
B A
0 0 0 0

(b)

D . C D C
CD
D C
B A.
X 1 0 0
B A.
0 1 X 1
AB 1 X 1 0
B A
0 0 1 0

(c)

D . C D C
CD
D C
B A.
0 0 0 1
B A.
X 1 1 0
AB 0 1 X 0
B A
0 0 1 0

(a)
GV: Nguyn Trng Hi Trang
45
CHUONG 3. MACH LOGIC TO HQP

3.1. GII THIEU
Chng 2 a khao sat cac phep toan cua tat ca cac cong logic va viec s dung ai
so Boolean e mo ta va phan tch cac mach ket hp t cac cong logic. Cac mach
nay c goi la mach logic to hp, v mc logic ngo ra ch phu thuoc vao to hp
logic ngo vao hien tai.
Mot mach to hp th khong co ac tnh nh
Cac phng phap toi thieu hoa thng c s dung trong thiet ke so la:
S dung cac nh ly cua ai so Boolean
Cac ky thuat dung ba (Karnaugh, Quine Mc. Cluskey)
M hnh mach t hp vi n u vo v m u ra

3.2. THIT K MACH LOGIC TO HQP
3.2.1. Cc buc thit k mach logic t hp
ng vi moi to hp ngo vao, at cac mc logic ngo ra theo yeu cau thiet ke, tat
ca cac kha nang ngo ra cua mot mach logic co the c bieu dien thong qua
bang s that.
T bang s that suy ra bieu thc Boolean cho mach can thiet ke
Rut gon bieu thc Boolean
Chuyen bieu thc Boolean thanh mach to hp
V d,
Thiet ke mot mach logic 3 ngo vao, A, B, C vi yeu cau: ngo ra se mc cao khi co t
nhat 2 ngo vao mc cao
Gii.
Buc 1. Thiet lap mot bang s that, co tat ca 8 kha nang oi vi ngo vao. Da vao
yeu cau bai toan, ngo ra se mc 1 khi co 2 hay 3 ngo vao mc 1, cac trng hp
con lai ngo ra mc 0.

MCH T
HP
X
1
X
2
X
n
Y
1
Y
2
Y
m
46
A B C X Minterm
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
0
0
1
0
1
1
1

BC A.

C B A
C AB
ABC
Bc 2. Viet bieu thc ngo ra di dang minterm (cho moi trng hp X=1)
X = A.BC + ABC + ABC+ ABC
Bc 3. Co the viet lai
X=ABC+ABC+ABC+ABC+ABC+ABC
Nhom cac so hang lai vi nhau
X=BC(A+A)+AC(B+B)+AB(C+C)=BC+AC+AB
Bc 4. Bieu thc ngo ra c thc hien nh sau:

Hnh (a) Hnh (b)
Ngi ta cung co the bien oi bieu thc tren thanh x=C(B + A) + AB, va mach logic
c thc hien nh hnh (b)
Mach (b) co phan n gian hn v ch s dung cac cong 2 ngo vao thay v phai s
dung cong OR 3 ngo vao nh mach (a). Tren thc te ngi thiet ke van chon mach
(a) bi v nhieu ly do, mot trong nhng ly do la tn hieu ngo vao A, B mach (b)
phai qua 3 cong logic trc khi c a ra ngo ra. ieu nay co the anh hng rat
ln trong mot he thong so toc o cao.
V d, Thiet ke mot mach logic 4 ngo vao, A, B, C, D (trong o A ng vi MSB, va
D ng vi LSB) vi yeu cau ngo ra se mc cao khi gia tr thap phan cua cac ngo
vao ABCD > 6
10

74LS08
B
C
A X
74LS08
1
74LS08
B
A
X
C
47
3.2.2. Mt s im quan trng khi thc hin thit k cui cng
Trong cac v du ve thiet ke tren, cac mach c thc hien thong qua cac cong AND
va OR, trong o mot hay nhieu cong AND lai mot cong OR do viec bieu dien ham
di dang minterm. Khi bieu dien ham di dang minterm ta co the de dang
chuyen oi cac cong logic thanh mot cong NAND duy nhat (lu y xem lai phan
chuyen oi a khao sat chng 2), bi v cong NAND la cong logic co ap ng
nhanh nhat trong ho logic TTL, ay la mot ac tnh quan trong can phai lu y.
V d, bien oi mach cua 2 v du tren dung cong NAND

3.3. KY THUAT CUC TIEU QUINE-Mc CLUSKEY
Cac he thong so hien ai c thiet ke bang cach s dung cac thiet b logic phc
tap, do o oi hoi mot ky thuat toi hieu hoa ham logic vi s ho tr cua may tnh
thay v lam bang tay vi cac yeu cau:
Co kha nang x ly mot so ln cac bien
Khong phu thuoc vao kha nang cua ngi dung trong viec nhan biet cac phan t
nguyen to
am bao bieu thc c cc tieu hoa
Phu hp cho giai phap bang may tnh
Phuong php:
Buc 1. Chuyn hm v dang minterm
Buc 2. Sp xp cc s hang minterm cua hm theo tung nhm c chung s bit 1
Buc 3. p dung inh l A+A =1 cho 2 minterm chi sai khc nhau 1 bit 1. Lp lai
cho n khi nhm xong cc minterm
Buc 4. Quan st bang cc nguyn t co ban uoc rt gon, xc inh ct chi chua mt
minterm
Buc 5. Vit hm duoi dang tng chun rt gon cua cc minterm
V d. Rut gon ham Boolean sau dung phng phap Quin McCluskey
ABCD
Y= (0,1,2,3,5,7,8,9,11,14)

74LS08
B
C
A X
B
C
A X
48
Bc 2.
Cac bien Nhom
(so bit 1)
Minterm
A B C D
1 1
2
8
0
0
1
0
0
0
0
1
0
1
0
0
2 3
5
9
0
0
1
0
1
0
1
0
0
1
1
1
3 7
11
14
0
1
1
1
0
1
1
1
1
1
1
0
Bc 3. Nhom cac minterm ch sai khac 1 bit
Cac bien Nhom

Minterm
A B C D
1 0,1
0,2
0,8
0
0
-
0
0
0
0
-
0
-
0
0
2 1,3
1,5
1,9
2,3
8,9
0
0
-
0
1
0
-
0
0
0
-
0
0
1
0
1
1
1
-
-
3 3,7
3,11
5,7
9,11
0
-
0
1
-
0
1
0
1
1
-
-
1
1
1
1
4 14 1 1 1 0
Lap lai bc 3, tiep tuc nhom cac minterm ch sai khac 1 bit

Cac bien Nhom

Minterm
A B C D
Nguyen to
c ban
1 0,1,2,3
0,1,8,9
0
-
0
0
-
0
-
-
AB
BC
2 1,3,5,7
1,3,9,11
0
-
-
0
-
-
1
1
AD
BD
3 14 1 1 1 0
ABCD

Bc 4. Quan sat cac nguyen to va tm cac cot ch cha mot gach cheo (ky hieu
)
49

Cac minterm Cac
nguyen to
Cac so thap
phan
0 1 2 3 5 7 8 9 11 14
ABCD
14

AB
0,1,2,3 X X

X
BC
0,1,8,9 X X

X
AD
1,3,5,7 X X

BD
1,3,9,11 X X X

Thay rang, tat ca cac nguyen to eu co , ay la cac minterm a cc tieu hoa, vay
ham cuoi cung la
Y=ABCD+AB+BC+AD+BD
V d. Rut gon ham Boolean sau dung phng phap Quin McCluskey
ABCD
Y= (2,4,5,6,10,12,13,14)

3.4. THIT K MCH KHNG S DNG BNG S THT
Mot so bai toan thiet ke oi khi co the giai quyet trc tiep ma khong qua cac bc
thiet ke tren, oi vi nhng bai toan nay oi hoi phai hieu ro nhng phep toan
logic, cac cong logic va cac tnh chat cua cong logic. Xet mot vai v du sau ay
3.4.1. Mch so snh s nh phn 2 bit
Bi ton

Thiet ke mach sao cho ngo ra se mc cao khi
x
1
x
0
= y
1
y
0

Giai.
Co the giai bai toan bang cach lap bang s that
roi rut gon ham
Tuy nhien, neu ta xet en ac iem cua phep
toan tng ng hay cong XNOR (ngo ra se
mc cao neu 2 ngo vao bang nhau) ta se thay
van e can giai quyet se n gian hn nhieu.

x
1
x
0
y
1
y
0
z
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
1
0
0
0
0
1
0
0
0
0
1
0
0
0
0
1
Mch
so
snh
x
1
x
0
y
1
y
0
z

50
Cot loi cua bai toan la so sanh x
0
vi y
0
va x
1
vi y
1
, ta se co mach nh sau:

3.4.2. Mch to v kim tra chn l
Khi truyen d lieu t may phat sang may thu, co nhieu cach e kiem tra loi trong
khi truyen, mot trong nhng cach n gian nhat la them 1 bit vao d lieu c
truyen i, bit o goi la bit chan le (parity bit).
Parity bit co hai gia tr 0 hay 1 tuy thuoc vao so bit 1 co trong nhom ma. co hai
phng phap tao bit parity.
Phng php parity chn
Gia tr cua bit parity c chon sao cho tong cac ch so 1 trong nhom ma la so
chan.
Neu so bit 1 trong nhom ma la le th bit parity them vao la 1
Neu so bit 1 trong nhom ma la chan th bit parity them vao la 0
V du ma ASCII cua ch C la 1000011, nhom ma nay co 3 bit 1 v vay se at them
parity bit la 1 e sao cho nhom ma tao ra co so bit 1 la chan (4 bit 1)
1 1 0 0 0 0 1 1

ma ASCII cua ch A la 1000001, bit parity them vao se la bit 0 (01000001)
Mach tao Parity chan da tren phng phap so sanh so bit 1

Ngo ra cong XOR mc cao khi so bit 1 ngo vao la le
Ta co the thiet ke mach dung bang s that va ket qua cung giong nh tren
74LS08
X1
X0
Y1
Y0
Z
Bit parity them vao
D3
D2
D1
D0
Parity (P)
To Receiver
GV: Nguyn Trong Hi Trang
51
Phng php Parity l
Gia tr cua bit parity c chon sao cho tong cac ch so 1 trong nhom ma la so le.
Neu so bit 1 trong nhom ma la le th bit parity them vao la 0
Neu so bit 1 trong nhom ma la chan th bit parity them vao la 1
V du ma ASCII cua ch C la 1000011, nhom ma nay co 3 bit 1 v vay se at them
parity bit la 0 e sao cho nhom ma tao ra co so bit 1 la le
0 1 0 0 0 0 1 1

ma ASCII cua ch A la 1000001, bit parity them vao se la bit 1 (11000001)
Mch kim tra chn l
Mach kiem tra chan tng t nh mach phat parity chan, cung da tren nguyen ly
cua cong XOR, ngo ra se mc cao neu cac ngo vao co so bit 1 la chan. Ngha la
khi ngo ra mc 1: khong co loi, khi ngo ra mc 0: co loi trong khi truyen. Mach
nh hnh sau

Mach ch kiem tra cac bit goc co b loi hay khong ch khong biet c bit nao loi
trong trng hp phat hien c loi
3.4.3. Mch cho php/cm
Moi cong logic c ban co the c s dung e ieu khien cho phep hoac khong cho
phep cac tn hieu i qua cong o.
ay ta s dung mot ngo vao lam chan ieu khien cho phep hoac cam, ngo con lai
cap tn hieu

Bit parity them vao
P
D3
D2
D1
D0
Error (E)
1=error
0=no error
Control
Trang thai cam (ong cong)
Cng
logic
Control
Trang thai cho phep (m cong)
Cng
logic
Khng
thay i
trang thi
52
V d,
Thiet ke mach logic cho phep tn hieu i qua ch khi hai ngo ieu khien B va C eu
mc cao, cac trng hp con lai ngo ra mc thap
Gii.

V d
Thiet ke mach logic cho phep tn hieu i qua ch khi 2 ngo vao ieu khien co mc
logic khac nhau.
V d,
Thiet ke mach logic vi tn hieu ngo vao tai A, ieu khien tai B, ngo ra X va Y nh
sau:
Khi B=1 ngo ra X = A, Y = 0
Khi B=0 ngo ra X = 0, Y= A

74LS11
A
B
C
X
3.5. MCH GII M (Decoder)
La mach logic giai ma N-bit nh phan ngo vao thanh M ng ngo ra, ch duy nhat
mot ng ngo ra mc tch cc ng vi mot to hp N-bit ngo vao. Goi bo giai
ma la bo phat hien ma

Mot so mach giai ma khong s dung het tat ca cac kha nang cua ngo vao, v vay
ng vi to hp ngo vao khong s dung th khi thiet ke khong co ngo ra nao tch cc
A
N-1
A
2
A
1
A
0
O
M-1
O
2
O
1
O
0
Decoder
N
input
M
output
3.5.1. Mch gii m 3 sang 8
Mach co 3 ngo vao va 8 ngo ra, con c goi la mach giai ma nh phan sang octal
(binary to octal decoder), vi ngo ra tch cc mc 1, co bang s that nh sau
Bng s tht
C B A Q
0
Q
1
Q
2
Q
3
Q
4
Q
5
Q
6
Q
7
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
1
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
1
Q
0
= A . B . C
C
(MSB)
B
A
(LSB)
Q
0
= C.B.A
Q
1
= A . B . C
Q
1
= C.B.A
Q
2
= A B . C
Q
3
= BA . C

Q
2
= C.BA
Q
4
= A . B C
Q
3
= C.BA
Q
5
= A . B C

Q
6
= A . CB
Q
4
= CB.A
Q
7
= CBA
Q
5
= CB.A
Trng hp ngo ra
tch cc mc 0 lam
tng t
Q
6
= CB.A
Q
7
= CBA
Trang
53
3.5.2. Ng vo cho php
a so cac bo giai ma eu co mot hoac nhieu ngo vao cho phep e ieu khien hoat
ong cua bo giai ma.
V d, xet bo giai ma tren, ket noi moi cong AND ngo ra vi chan ieu khien cho
phep chung ENABLE. Khi ENABLE=1, cho phep cong AND hoat ong bnh thng
che o giai ma, khi ENABLE mc thap ngo ra cua cac cong AND c at
mc 0, ngha la mach cho phep giai ma ng vi ngo ENABLE=1 va khong cho
phep ng vi ENABLE=0
3.5.3. Gii m 3 sang 8 dng IC74LS138
G
2A
G
2B
G
1
Output
0
1
x
x
0
x
1
x
1
x
x
0
Ngo ra tch cc theo ma cua A
2
A
1
A
0
Khong giai ma, ngo ra mc cao
Y7
Y6
Y5
Y4
Y3
Y2
Y1
Y0
G2B
G2A
G1
C
B
A
74LS138
74LS11
2
Y
1
Y
0
Y
2A
G
3
Y
4
Y
5
Y Y
6

7
Y
A
1
A
0
(LSB) (MSB) A
2

2B
G
G
1

V d
Xac nh ngo ra nao cua 74LS138 tch cc ng vi cac ngo vao nh sau:
G
2A
= 0; G
2B
= G
1
=1 ; A
2
= A
1
= 1 ; A
0
= 0
G
2A
= G
2B
= 0 ; G
1
=1 ; A
2
= 0 ; A
1
= A
0
= 1
Trang
54
3.5.4. Ghp cc b gii m lin tng
Co the ghep cac bo giai ma lien tang e co the giai ma c t ma ln hn.
V d, ket hp 2 bo giai ma 3 sang 8 e tao thanh 1 bo giai ma 4 sang 16

EN=0 cho phep mach giai hoat ong
oi vi cac bo giai ma ln hn, co the them vao 1 bo giai ma nh sau

74LS138
A
B
C
G1
G2A
G2B
Y0
Y1
Y2
Y3
Y4
Y5
Y6
Y7
A3
A0
HI
74LS138
A
B
C
G1
G2A
G2B
Y0
Y1
Y2
Y3
Y4
Y5
Y6
Y7
A2
A1
EN
74LS138
A
B
C
G1
G2A
G2B
Y0
Y1
Y2
Y3
Y4
Y5
Y6
Y7
A3
EN
A0
HI
74LS138
A2
A1
Y0
Y1
Y2
Y3
Y4
Y5
Y6
Y7
G1
G2A
G2B
A
B
C
DEC0
DEC1
DEC2
DEC3
DEC4
DEC5
DEC6
DEC7
DEC0
DEC1
DEC2
DEC3
DEC4
DEC5
DEC6
DEC7
DEC8
DEC9
DEC10
DEC11
DEC12
DEC13
DEC14
DEC15
DEC8
DEC9
DEC10
DEC11
DEC12
DEC13
DEC14
DEC15
EN3
74LS138
A
B
C
G1
G2A
G2B
Y0
Y1
Y2
Y3
Y4
Y5
Y6
Y7
A
B
C
G1
G2A
G2B
Y0
Y1
Y2
Y3
Y4
Y5
Y6
Y7
EN2
A0
A4
74LS139A
G
A
B
Y0
Y1
Y2
Y3
EN1
A3
A
B
C
G1
G2A
G2B
Y0
Y0
Y1
Y2
Y3
Y4
Y5
Y6
Y7
G1
G2A
G2B
A
B
C
Y1
Y2
Y3
Y4
Y5
Y6
Y7
A2
A1
DEC0
DEC1
DEC2
DEC3
DEC4
DEC5
DEC6
DEC7
DEC8
DEC9
DEC10
DEC11
DEC12
DEC13
DEC14
DEC15
DEC16
DEC17
DEC18
DEC19
DEC20
DEC21
DEC22
DEC23
DEC24
DEC25
DEC26
DEC27
DEC28
DEC29
DEC30
DEC31
V d
S dung 4 IC 74LS138 va mot cong ao, thiet ke mach giai ma 5 sang 32
Trang
55
3.5.5. S dng b gii m to cc minterm
Cac ngo ra cua bo giai ma ( che o cho phep) tng ng vi cac minterm cua cac
ngo vao.
V d cac minterm cua cac ngo ra 74LS138 nh sau A . B . C Y0 = , A B . C Y
1
= , v.v.
Neu mot ham logic co cac minterm nh ngo ra cua bo giai ma th ta co the s dung
bo giai ma o e xay dng ham tren
V d
Xet ham F = Z Y X YZ X Z Y X Z Y X
Z Y X
+ + + =
, ,
. . ) 5 , 3 , 2 , 0 (
Co the thiet lap ham nh sau:

74LS20
F
Z
X
HI
Y
Y0
Y1
Y2
Y3
Y4
Y5
Y6
Y7
G1
G2A
G2B
A
B
C
S138 74L

Qua trnh thiet ke co the chon cach thiet ke nay hoac cach thiet ke khac tuy thuoc
vao toc o, gia thanh ... Giai phap s dung bo giai ma rat thuan tien v co the de
dang thay oi cac minterm. Ngoai ra co the thiet ke nhieu ham logic ngo ra, v du
s dung bo giai ma va cong NAND thc hien cac ham sau
F = , G =
Z Y X , ,
) 5 , 4 , 2 (
Z Y X , ,
) 3 , 1 , 0 ( , H =
Z Y X , ,
) 7 , 6 , 3 (

HI
74LS138
Y0
Y1
Y2
Y3
Y4
Y5
Y6
Y7
A
G2B
B
C
G1
G2A
74LS10
X
Y
Z
F

G

H

3.5.6. Gii m 7 on
Bo giai ma 7 oan co 4 ngo vao theo ma BCD va 7 ngo ra ng
vi ma 7 oan
Bo hien th 7 oan co the la LED 7 oan hoac bang tinh the long
(LCD liquid crystal display) c s dung trong cac may tnh
tay hien th gia tr thap phan. LED 7 oan co 2 loai: loai anode
chung va loai cathode chung

d
g
f
e
c
b
a
Trang
56

LED 7 oan Cathode chung LED 7 oan Anode chung
+Vcc
g
f
e
d
c
b
a
g
f
e
d
c
b
a
74LS49

A
B
C
D
BI OA
OB
OC
OD
OE
OF
OG

V d
74LS49 co ngo ra tch cc mc cao,
LED tng ng la cathode chung nh
hnh ben
Bng s tht ca 74LS49 (tra phn
ph lc)
V d:
74LS47 vi ngo ra tch cc mc thap, s dung LED tng ng la cathode chung nh
sau
74LS47
C
D
RB I
LT
A
B
C
D
E
F
G
BI/RBO
B
A
HI

Tnh toan cac gia tr ien tr bang cong thc sau
R =
LED
LED CC
I
V V

V
LED
khoang 2,7V, I
LED
khoang 10mA, vay R = 230
LED tinh th lng LCD
g
f
e
d
c
b
a
LCD hoat ong vi mc ien ap thap (khoang 3 en
15V
RMS
) tan so hoat ong thap (25 en 60hz) va dong
cung cap rat be va cung c the hien 7 oan giong nh
LED 7 oan
Blackblane

Trang
57
ien ap ac can e lam tng oan sang la ien ap gia oan o vi blackblane.
Gia segment va blackblane hnh thanh mot ien dung. Tan so thap nhat cua ien
ap ac la 25hz
LCD s dung dong t hn LED va thng c s dung cac thiet b dung pin nh
may tnh va no can them nguon nang lng ngoai la anh sang e co the thay c.
e lai mot LCD, theo nguyen tac 1 segment se sang khi co mot ien ap ac at gia
segment va blackblane, va segment se tat khi khong co ap ac nay. e co mot ien
ap ac ngi ta tao ra mot song vuong nh sau

Segmen
Blackblane
4070
Control
40hz signal

Phng phap e lai mot LCD 7 oan nh sau
40hz
4511
A
B
C
D
LT
BI
LE
A
B
C
D
E
F
G
Blackblane
LCD
4070

3.5.7. Gii m BCD sang 10 dng IC74LS42
Cach thiet ke mach giai ma BCD sang thap phan th tng t
nh cach thiet ke mach 3 sang 8 (xem nh mot bai tap ve
nha).
IC giai ma BCD sang thap phan: 74LS42 bang s that tra phan
phu luc

Y0
Y1
Y2
Y3
Y4
Y5
Y6
Y7
Y8
Y9
D
C
B
A
74LS42
Trang
58
3.6. MACH MA HOA (ENCODER)
Ngc vi qua trnh giai ma la qua trnh ma hoa va c thc hien bi mach logic
ma hoa. Ch mot ngo vao cua bo ma hoa c tch cc, va t ma N-bit ngo ra tuy
thuoc vao ngo vao nao c tch cc

A
N-1
A
2
A
1
A
0
O
M-1
O
2
O
1
O
0
Encoder
M
output
N
input
3.6.1. Ma hoa 8 sang 3 (octal sang nh phan)
Bang s that va mach logic cho mach ma hoa octal binary vi ngo vao tch cc
mc thap
A
0
A
1
A
2
A
3
A
4
A
5
A
6
A
7
Q
2
Q
1
Q
0
x
x
x
x
x
x
x
x
1
0
1
1
1
1
1
1
1
1
0
1
1
1
1
1
1
1
1
0
1
1
1
1
1
1
1
1
0
1
1
1
1
1
1
1
1
0
1
1
1
1
1
1
1
1
0
1
1
1
1
1
1
1
1
0
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1

8
input
A3
A4
Q2
A0
A6
A2
Q1
Q0
A5
A7
A1
MSB
LSB

Lu y rang A0 khong ket noi trong mach v ngo ra bo ma hoa mac nh bang 000
khi khong co ngo vao nao tch cc mc thap
V d
Xac nh cac ngo ra cua bo giai ma tren khi A
3
=A
5
=0
3.6.2. Ma hoa u tien
T v du tren thay rang khi co 2 ngo vao tch cc cung luc oi vi mot bo ma hoa
n gian se dan en ket qua khong mong muon.
Trang
59
e tranh tnh trang tren, thng s dung bo ma hoa u tien. Khi co 2 hay nhieu ngo
vao cung tch cc th ngo ra se tng ng vi ngo vao co o u tien cao nhat.
V d
Khi A
3
=A
5
=0 th ngo ra e tng ng vi A
5
ngha la 101.
Xet mot he thong vi 2
n
ngo vao, moi ngo vao bieu th cho mot yeu cau cua mot
thiet b nh sau:

Request
encoder
REQ 1
REQ 2
REQ 3
REQ N
Request
for service
Requestors
number

ay la mot cau truc thngc s dung trong mot he thong con input/output cua
bo vi x ly, ay cac ngo vao la cac yeu cau ngat.
e giai bai toan u tien oi vi cac ngo vao ngha la khi co nhieu yeu cau cung mot
luc, ta viet bieu thc logic cho ngo ra cua bo ma hoa u tien.
V d
Vi mach ma hoa u tien 8-3 nh sau
I0 I1 I2 I3 I4 I5 I6 I7 A2 A1 A0
1
x
x
x
x
x
x
x
0
1
x
x
x
x
x
x
0
0
1
x
x
x
x
x
0
0
0
1
x
x
x
x
0
0
0
0
1
x
x
x
0
0
0
0
0
1
x
x
0
0
0
0
0
0
1
x
0
0
0
0
0
0
0
1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
nh ngha 8 bien trung gian H0 en H7 nh sau:
H7 = I7
H6 = 7 I 6 I
H5 = 7 I . 6 I 5 I

H0 = 7 I . 6 I . 5 I . 4 I . 3 I . 2 I . 1 I . 0 I
T bieu thc trung gian, viet lai bieu thc ngo ra nh sau:
A2 = H4 + H5 + H6 + H7
A1 = H2 + H3 + H6 + H7
A0 = H1 + H3 + H5 + H7

Trang
60
74148 la bo ma hoa u tien octal to binary IN0
IN1
IN2
IN3
IN4
IN5
IN6
IN 7
EI
A0
A1
A2
GS
E0
I7 co o u tien cao nhat.
74LS148 co hai ngo ra GS va E0.
Ngo GS (Group Select) tch cc mc 0 khi mach hoat
ong che o ma hoa va co 1 trong so cac ngo vao
ang tch cc. E0 (enable output) tch cc mc 0 khi EI
tch cc mc 0 va khong co ngo vao nao tch cc.
74LS148
V d
S dung 74LS148 thiet ke mach ma hoa u tien 32 ngo vao, 5bit ngo ra: RA4 en
RA0
74147 la bo ma hoa u tien 10 ng sang BCD
IN1
IN2
IN3
IN4
IN5
IN6
IN7
IN8
IN9
D
C
A
B
74LS147
Khi khong co ngo vao nao c tac ong, ngo ra se la
1111, v ngo ra la ngo ra ao nen ao cua 1111 la 0000,
gia tr BCD la 0 nen IC 74LS147 khong co ngo vao IN
0
,
khi ngo vao IN
9
mc thap, th ngo ra tng ng la
0110, ao lai 1001 tng ng vi ma BCD la 9.
V cac ngo ra la ao cho nen e co c ma BCD ung
ngo ra ngi ta them cac cong ao cho moi ngo ra
Ma hoa ban phm

S7
S2
HI
74LS147
B
A
C
D
IN1
IN2
IN3
IN4
IN5
IN6
IN7
IN8
IN9
S4
74LS04
S8
S9
S1
S5
S0
S3
S6
BCD

Cac phm co the la ban phm t 0 en 9 trong may tnh. Khi mot phm c nhan, ngo
ra se la ma BCD cua phm nhan o. Khi co 2 phm c nhan cung luc th phm ngo ra
se la ma BCD cua phm u tien cao nhat
Trang
61

62
8.7. 80 6h0h kEhh (M0LTIFLEXE8)
Mot bo chon kenh tng tng vi bo chuyen mach so, no ket noi data t n nguon
khac nhau. Ngo ra se chon mot trong cac nguon data ngo vao tuy thuoc vao cac ngo
la chon

Vi 2
n
ngo vao th can n bit select
8.7.1. Marh rhon kanh Z ngo vao ro ban

0 1
Z=I .S+I .S

8.7.Z. Marh rhon kanh 4 ngo vao

S1 S0 Output
0
0
1
1
0
1
0
1
Z=I
0

Z=I
1

Z=I
2

Z=I
3

S
I
0
I
1
Z
74LS08
74LS04
1
74LS32
1
Z
I
1
S0
I
0
74LS11
I
2
SELECT
74LS04
I
3
S1
EN
Enable
SEL
s
Select
s
s
s
n data
sources
D
0

D
1

D
n-1
s
Y
Data
output
Multiplexer
Selector
Enable
D
0
D
n-1
D
1
Data
output
s
s
s
s
Select Output
0
1
Z=I
0

Z=I
1


63
8.7.8. Marh rhon kanh B ngo vao 74L8161

G C B A Y
1
0
0
0
0
0
0
0
0
x
0
0
0
0
1
1
1
1
x
0
0
1
1
0
0
1
1
x
0
1
0
1
0
1
0
1
0
D0
D1
D2
D3
D4
D5
D6
D7
W=Y
V d
Dung 2 IC 74ls151 va 1 cong ao, mot cong OR thiet ke mach chon kenh 16 ngo
vao, 1 ngo ra va 4 ngo select S0, S1, S2, S3
8.7.4. Marh rhon kanh Z nhom ngo vao 74L8167
74LS157 cha 2 nhom ngo vao nh hnh sau
G
A /B
1Y 2Y 3Y 4Y
1
0
0
X
0
1
0
1A
1B
0
2A
2B
0
3A
3B
0
4A
4B
8.7.6. 6ar ung dung rua marh rhon kanh
Cac bo chon kenh co nhieu ng dung khac nhau trong cac he thong so.
Cac ng dung bao gom: chon data, hoat ong tuan t, chuyen oi song song sang
noi tiep, tao dang song, tao cac ham logic... phan nay se e cap en mot so ng
dung, mot so con lai se c xet en cac chng sau
Mch to hm logic
V d. Thc hien bang s that sau s dung multiplexer
C B A Z
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
1
0
0
0
0
1
Z=A.B.C+ABC+ABC
74LS157
1A
1B
2A
2B
3A
3B
4A
4B
A/B
G
1Y
2Y
3Y
4Y
74LS151
G
A
B
C
W
Y
D0
D1
D4
D3
D5
D6
D7
D2
74LS151
D0 D1 D2 D3 D4 D5 D6 D7 A B C G
W Y=Z
HI
Cc bin
ng vo
Z=A.B.C+ABC+ABC

64
Mux co the c dung e thc hien cac ham logic trc tiep t bang s that ma
khong can n gian hoa ham logic. Khi s dung Mux vao muc ch nay, cac ngo
select c s dung nh cac bien logic va moi ngo vao data c noi vi mc 1 hay
0 sao cho thoa man bang s that.
Anh hng data
MUX co the nh hng data t nhieu nguon data thanh 1 nguon ch.
V d, s dung 74LS157 e chon va hien th noi dung cua hai bo em BCD.

Moi bo em bao gom 2 so em BCD. Khi select=1, ngo ra cua bo em 1 se hien th
len LED 7 oan, khi select=0, ngo ra cua bo em 2 se hien th len LED 7 oan.
Bang cach nay, noi dung cua cac bo em se c hien th thong qua ngo select.
Mach nh hng nay thng c ng dung trong cac ong ho ien t so, o co
cac bo em va cac thanh ghi nh giay, phut, gi, thang, va bao thc, v.v Mot mach
MUX nh tren se cho phep cac data khac nhau c hien th len tren man hnh co
so LED hien th la gii han
Clock 2
Clock 1
BCD
counter
BCD
counter
BCD
counter
BCD
counter
Counter 2 Counter 1
select
display
74LS157
1A 1B
2A 2B
3A 3B
4A 4B A/B G
1Y 2Y 3Y 4Y
74LS157
1A 1B
2A 2B
3A 3B
4A 4B A/B G
1Y 2Y 3Y 4Y
74LS47
LT RBI RB0 A B C D
A B C D E F G
74LS47
LT RBI RB0 A B C D
A B C D E F G

65
Muc ch cua ky thuat Multiplex la e chia se thi gian hien th gia hai hay nhieu
bo em, va ieu quan trong hn na la tiet kiem c nang lng, bi v mot lng
ln cac bo giai ma va LED hien th se tieu ton mot dong ln
Tuy nhien ky thuat nay cung co nhc iem la noi dung cua cac bo em ch hien th
1 lan tai mot thi iem, tuy nhien trong nhieu ng dung, ieu nay co the bo qua
Mch chuyn i song song sang ni tip (parallel to serial converter)
Nhieu he thong so x ly cac data nh phan dang song song (x ly cac bit ong
thi) v toc o x ly nhanh hn. Khi data c truyen tren mot khang cach xa, giai
phap truyen song song se can en mot lng day noi ln. V ly do nay, cac data nh
phan hoac cac thong tin dang song song c chuyen thanh dang noi tiep trc
khi c truyen tren mot khoang cach xa. Mot phng phap e bien oi song song
sang noi tiep la s dung bo Multiplexer nh sau:

Mot bo em 3 bit c s dung e cung cap cac bit ma chon CBA t 000 en 111,
bang cach nay ngo ra cua Mux se chon tng kenh X
i
theo moi xung clock, v du,
xung clock au tien CBA = 000 ngo ra se la X0, xung clock th hai CBA = 001 ngo
ra se la X1, c nh the ngo ra Z se la cac ngo vao nh dang noi tiep
X
7
X
6
X
5
X
4
X
3
X
2
X
1
X
0
vi X
0
la LSB c truyen trc va X
7
la MSB c truyen
cuoi cung
8.B. M6h Fhh kEhh (EM0LTIFLEXE8)

X4
X1
X6
X2
X0
X3
Z
X7
74LS151
D0
D1
D2
D3
D4
D5
D6
D7
A
B
C
G
W
Y
X5
Mach
m
3 bit
EN
Enable
SEL
s
Select
s
s
s
O
0

O
1

O
n-1
s
Data
Intput
DeMux
Selector
O
0
O
1
`O
n-1
Data
intput
s
s
s
s

66
Mach phan kenh ngc lai vi mach chon kenh. DeMUX co mot ngo vao va nhieu
ngo ra. Ngo vao ieu khien chon (select) se xac nh ngo ra ma ngo vao se c
truyen en
8.B.1. Marh phan kanh 1 sang B
Select Output
S
2
S
1
S
0
Y
7
Y
6
Y
5
Y
4
Y
3
Y
2
Y
1
Y
0
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
0
0
0
0
0
0
In
0
0
0
0
0
0
In
0
0
0
0
0
0
In
0
0
0
0
0
0
In
0
0
0
0
0
0
In
0
0
0
0
0
0
In
0
0
0
0
0
0
In
0
0
0
0
0
0
In
0
0
0
0
0
0
0
T bang s that viet c cac bieu thc ngo ra nh sau
) S S S .( In Y
0 1 2 7
= , ) S S S .( In Y
0 1 2 6
= , ) S S S .( In Y
0 1 2 5
= ,

8.B.Z. Marh phan kanh 1 sang B va marh rhon xung rIork dung 74L818B
Phan trc a khao sat 74LS138 lam nhiem vu giai ma, en ay se tiep tuc ng
dung 74LS138 lam bo phan kenh data va mach chon xung clock

S0
HI
74LS138
A
B
C
G1
G2A
G2B
Y0
Y1
Y2
Y3
Y4
Y5
Y6
Y7
S2
S1
DATA
Y1
S1
Y0
S0
S2
In
Y7
S0
HI
74LS138
A
B
C
G1
G2A
G2B
Y0
Y1
Y2
Y3
Y4
Y5
Y6
Y7
Shift Register
Counter
S2
S1

67
8.B.8. Marh rhon xung rIork
Co rat nhieu ng dung da vao nguyen ly DeMUX. Sau ay s dung 74LS138 lam
bo chon clock
8.9. M6h 80 h06
8.10.1. Marh rong ban phan

S=AB+AB
C
OUT
= AB
8.10.Z. Marh rong Ioan phan

V d, Thiet ke mach cong toan phan t mach cong ban phan
V d, Thiet ke mach cong hai so nh phan 4 bit (a
3
a
2
a
1
a
0
+ b
3
b
2
b
1
b
0
=S
4
S
3
S
2
S
1
S
0
)
t mach cong ban phan va toan phan
IC cng ton phn

A
B
S
C
OUT
A B S C
OUT
0 0 0 0
0 1 1 0
1 0 1 0
1 1 0 1
B
S
Cout
A
C
IN
A B S C
OUT
0 0 0 0 0
0 0 1 1 0
0 1 0 1 0
0 1 1 0 1
1 0 0 1 0
1 0 1 0 1
1 1 0 0 1
1 1 1 1 1
A
B
S
C
OUT
C
IN
B S
Cout
Cin
A
74LS83
Cng ton phn 4 bit
A4
A3
A2
A1
B4
B3
B2
B1
Cin
Cout
S4
S3
S2
S1
74LS183
Cng ton phn 1 bit
Cin
B
A
Cout
S

68
8.10.8. Marh rong nhn Iruor so nho
mach cong nhieu bit, phep cong hang cao hn can so nh lan cong hang ke trc.
Thi gian tr hoan nay la ln oi vi cac phep tnh nhanh. e khac phuc phai them
mach logic e tao trc tiep so nh goi la mach cong nhn trc so nh (toc o cong
oc lap vi so bit)
Goi
i i i
P=A B
i i i
G=AB
phng trnh cong toan phan

i i-1
S =P C
i

i i i i-1
C =G+PC

e hieu ro y ngha cua cong nhn trc so nh, viet phng trnh C
0
, C
1
, C
2
, C
3
va
nhan xet cac bien logic cha trong cac phng trnh o (xem nh mot bai tap)
8.10.4. Marh rong 86
oi vi mach cong BCD, neu au ra tong khong phai la so BCD th ket qua phai
c cong them 6

B S
Ci
C
i-1
A
P
i
G
i
A0 A3A2A1
C4
B0 B3B2B1
S0 S3S2S1
Cin
A0 A3A2A1
C4
B0 B3B2B1
S0 S3S2S1
Cin
BCD
A
BCD
B
BCD
th nht
BCD
th hai

69
8.10. M6h 6h0YEh M
Mach chuyen oi ma thay oi d lieu nh phan t dang nay sang dang khac
V d,
BCD - LED 7 oan
BCD nh phan
Nh phan BCD
Nh phan Gray
Gray nh phan
8.10.6. Marh rhuyan doI 86 sang nh} phan
Bc 1. Xac nh so bit nh phan cho mach chuyen oi.
V d, e chuyen oi 2 ch so BCD can 7bit nh phan, v gia tr ln nhat 99 cua
BCD oi sang nh phan la 1100011
Bc 2. Tnh tong cua cac so nh phan tng ng vi bit 1 (theo trong so cua ma
BCD)
V d, (52)
10
co ma BCD la 01010010, tong nh phan la
80 40 20 10 8 4 2 1 Trong so BCD
0 1 0 1 0 0 1 0 BCD
0000010 (ma nh phan cho 2)
Bc 3. Xay dng mach s dung mach cong nh phan
V d, Bang cong cho so BCD co 2 ch so
Ma nh phan tng ng
Bit BCD Trong so
b
6
b
5
b
4
b
3
b
2
b
1
b
0
A
0
1 0 0 0 0 0 0 1
B
0
2 0 0 0 0 0 1 0
C
0
4 0 0 0 0 1 0 0
D
0
8 0 0 0 1 0 0 0
A
1
10 0 0 0 1 0 1 0
B
1
20 0 0 1 0 1 0 0
C
1
40 0 1 0 1 0 0 0
D
1
80 1 0 1 0 0 0 0
Vay b
0
= A
0
;

b
1
= B
0
+ A
1
; b
2
= C
0
+ B
1
; b
3
= D
0
+ A
1
+ C
1
;
b
4
= B
1
+ D
1
;

b
5
= C
1
; b
6
= D
1
;


70

IC 74184. Chuyen ma BCD sang nh phan

V d, Tra bang hoat ong cua 74184, a ra s o noi day chuyen ma BCD sang
ma bu 9 cua no
V d, T 2 IC 74184, thiet ke mach oi mot so BCD 2 ch bo sang 7bit nh phan
8.10.6. Marh rhuyan doI nh} phan sang 86

A0 A3A2A1
C4
B0 B3B2B1
S0 S3S2S1
Cin
B0 B3B2B1
A0 A3 A2 A1
C4
B0 B3 B2B1
S0 S3 S2S1
Cin
B0 B3 B2 B1
D
1
C
1
B
1
A
1
D
0
C
0
B
0
A
0
b
6
b
5
b
4
b
3
b
2
b
1
b
0

A
B
C
D
E
G
Y
1
Y
2
Y
3
Y
4
Y
5
Y
6
Y
7
Y
8
A
0
B
0
C
0
D
0
A
1
B
1
b
1
b
2
b
3
b
4
b
5
b
0 Cc
u
vo
BCD
t
00
n
39

Cc
u
ra nhj
phn
74184

A
B
C
D
E
G
Y
1
Y
2
Y
3
Y
4
Y
5
Y
6
Y
7
Y
8
A
B
C
D
Cc
u
vo
BCD
1
T
A
T
B
T
C
T
D
Cc
u
b 10
ca
BCD
74184

A
B
C
D
E
G
Y
1
Y
2
Y
3
Y
4
Y
5
Y
6
A
0
B
0
C
0
D
0
A
1
B
1
b
1
b
2
b
3
b
4
b
5
b
0
Cc
u
vo
nhj
phn
6 bit

Cc
u
ra
BCD

74185

C
1

71
Bi tp chng 3

3.1. on gin mach sau dng ai s Boolean

3.2. Thit k mach in logic tuong ng vi bng su tht sau
A B C Y
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
1
0
1
1
1
0
0
1
3.3. Thit k mach in logic c 3 ng vo A, B v C.Ng ra mc HIGH chi khi
c 2 ng vo l mc LOW.
3.4. Mt s nhj phn 4 bit uoc k hiu l A
3
A
2
A
1
A
0
, vi A
0
l bit LSB, thit k
mach logic m ng ra mc HIGH khi cc s nhj phn ln hon 0010 v nh
hon 1000.
3.5. Thuc thi mach in bi 3.3 dng tt c l cng NAND
3.6. Thuc thi mach in bi 3.4 dng tt c l cng NAND
3.7. Mt b m BCD vi ng ra 4 bit m BCD hin thj s xung uoc ua vo b
m. Th du, sau 4 xung, ng ra ca b m l DCBA = 01002 = 410. B m
Reset v 0000 tai xung th 10 v bt u m tr lai. Ni cch khc, ng ra
DCBA khng bao gi biu din gi trj ln hon 10012 = 910. Hy thit k mach
logic vi ng ra mc HIGH khi m s 2, 3, 9.

3.8. Hnh sau biu din 4 cng tc trong mach iu khin my copy. Thng
thung cc cng tc ny m (open). Khi c giy i qua cng tc th ng
(close). Cng tc 1 v 4 khng th ng (close) tai cng 1 thi im. Hy thit
X
M
O
N

BCD
Counter

Logic
circuit

X
D
C
B
A

72
k 1 mach logic vi ng ra mc HIGH khi 2 cng tc hay nhiu hon cng
ng.

3.9. Hnh sau th hin mach nhn hai s nhj phn 2 bit x
1
x
0
v y
1
y
0
, ng ra l s
nhj phn z3z2z1z0 tuong uong vi tch ai s ca 2 s ng vo. Hy thit k
mach logic cho mach nhn.

3.10. Mt m BCD uoc truyn ti thit bj nhn xa, cc bit l A
3
A
2
A
1
A
0
, vi A3
l bit MSB. Mach nhn gm 1 mach pht hin li BCD kim tra m nhn.
Thit k mach kim tra tao mc HIGH nu c bt ky iu kin li no xy ra.
3.11. Thit k mach logic vi iu kin: tn hiu ng vo A n ng ra Y chi khi
ng vo iu khin B mc LOW v ng vo iu khin C mc HIGH, cc
trung hop cn lai ng ra mc LOW.
3.12. Thit k mach logic iu khin su i qua ca 1 tn hiu A theo cc yu cu
sau:
1. Ng ra X = A khi ng vo iu khin B v C ging nhau.
2. X duy tr mc HIGH khi B v C khc nhau.
3.13. Thit k mach logic c yu cu cho hnh sau.

3.14. Trong my tnh, b vi x l (microprocessor unit = MPU) lun uoc kt ni
vi 1 trong cc phn sau: (1) b nh truy cp ngu nhin (RAM = random-
access memory), luu tr cc chuong trnh v d liu m n c th uoc thay
i 1 cch nhanh chng; (2) b nh chi oc (read-only memory), luu tr cc
chuong trnh v d liu m khng khi no thay i; (3) thit bj vo ra bn

Multiplier
circuit
X
1
X
0
Y
1
Y
0
Z
3
Z
2
Z
1
Z
0 LSB
MSB

Logic
circuit
SW1
X
+5V
+5V
+5V
+5V
SW2
SW3
SW4

Multiplexer
A
0
A
1
Z

S

S Z
0
1
A
0
A
1


73
ngoi (I/O) chng han nhu keyboard, my in. Khi thuc thi 1 chuong trnh,
MPU s tao ra mt m ja chi m n chon loai thit bj (RAM,ROM or I/O)
mun thuc thi. Hnh sau chi ra 1 cch kt ni tiu biu MPU xut ra 1 m
ja chi 8 bit A15-A8. Thuc ra MPU xut ra 1 m ja chi 16 bit, nhung cc bit
thp A7-A0 khng dng cho qu trnh chon thit bj. M ja chi uoc cp ti 1
mach logic tao ra cc tn hiu chon thit bj RAM, ROM, v I/O.

Phn tch mach v xc jnh nhng iu sau:
(a) Khong ja chi A15-A8 m n tch cuc RAM
(b) Khong ja chi A15-A8 m n tch cuc I/O
(c) Khong ja chi A15-A8 m n tch cuc ROM
Hy biu din cc ja chi nhj phn v hex.
3.15. Cho ham Boolean sau: Y = ) 9 , 8 , 7 , 4 ( ) 15 , 14 , 13 , 12 , 11 , 6 , 5 , 3 ( d
DCBA
+

a). Rut gon ham Y, bieu dien ham Y dung cong logic
b). T ham Y rut gon, bien oi lai mach logic dung toan cong NOR
c). Thc hien ham Y dung MUX 8 sang 1 (74LS151)
3.16. Cho ham Boolean sau: Y = ) 6 , 3 ( ) 4 , 1 , 0 ( d
ABC
+

a). Rut gon ham Y, bieu dien ham Y dung cong logic
b). T ham Y rut gon, bien oi lai mach logic dung toan cong NAND
c). Thc hien ham Y dung giai ma 3 sang 8 (74LS138)

I/O
A13
A9
A11
MPU
A8
A15
RAM
A14
ROM
A10
A12
6h00h 4. hE T0h T0

4.1. T0h 0h
Mach logic tuan t la mach co cac ngo ra tuy thuoc khong ch vao trang thai
hien tai cua cac ngo vao ma con tuy thuoc vao mot chuoi cac ngo vao trc o.
Viec mo ta mot mach tuan t bang cach lap bang quan he ngo ra la mot ham
cua chuoi cac ngo vao t cac trang thai trc o en trang thai hien tai thng
th khong thuan tien hay khong the thc hien c.
Trang thai cua mot mach tuan t la mot s tap hp cac bien trang thai ma gia tr
cua no tai bat c mot thi iem nao eu cha ng tat ca cac thong tin ve cac
trang thai trc o e giai thch cac tac ong sau o cua mach
Cac bien trang thai khong can phai co y ngha vat ly trc tiep, va thng co
nhieu cach chon chung e mo ta mot mach tuan t a cho.
Trong cac mach logic so, cac bien trang thai co gia tr nh phan tng ng vi
tn hieu logic nao o trong mach. Mot mach vi n bien trang thai nh phan se co
2
n
trang thai xay ra, va 2
n
luon la gia tr gii han, v vay mach tuan t cung
thng goi la may trang thai gii han (finite-state machines)
Thi iem e cac trang thai cua hau het cac mach tuan t thay oi c quyet
nh bi xung clock. Hnh sau minh hoa cac s o thi gian va cac thuat ng cho
cac xung clock thong dung. Theo quy c, mot xung clock tch cc mc cao neu
cac thay oi trang thai trong mach xuat hien tai canh len cua xung clock hay tai
mc cao cua xung clock, va tch cc mc thap cho trng hp con lai. Chu ky
bon phan la phan tram thi gian xung clock tch cc tren mot chu ky. Thong
thng trong mot he thong so ngi ta s dung dao ong thanh anh e tao cac
xung clock. Tan so xung clock khoang 32768 khz (cho ong ho) en 400 Mhz
(cho supercomputer). Cac he thong thong thng s dung cac phan t CMOS va
TTL co tan so xung clock vao khang t 1 en 25Mhz.

Hai loai mach tuan t thng ap dung chnh trong cac thiet ke thc te:
T
per
t
L t
H
CLK
Chu ky bon phan=t
H
/T
per
T
per
t
L t
H
CLK
Chu ky bon phan=t
L
/T
per
Mach tuan t co hoi tiep: s dung cac cong thong thng va cac vong hoi tiep
e tao kha nang nh trong mach logic, bang cach o tao ra cac khoi mach tuan
t nh flip-flop va mach chot e thiet ke cac mach mc cao hn
May trang thai vi xung clock c ong bo: s dung cac phan t nh, ac biet
la D flipflop, e tao ra nhng mach ma ngo ra se thay oi ong thi vi xung
Clock
Cac dang mach tuan t khac nh dang a xung, a phase thng ng dung trong
cac he thong co tnh nang cao va VLSI

4.Z. 66 Fhh T0 hI Th ThI 8Eh
4.Z.1. Marh ao
Mot transistor co the lam chc nang mach ao nh s o hnh sau

Khi V
I
mc ien ap cao th BJT chay bao hoa va dong I
C
qua R
C
tao sut ap
nen V
0
0.2V (V
CESAT
) ng vi mc ien ap thap
Khi V
I
mc ien ap thap th BJT phan cc ngc ngo vao nen ngng dan,
dong I
C
=0 nen khong giam ap qua R
C
nen V
0
V
CC
ng vi mc ien ap cao
4.Z.Z. Marh haI Trang ThaI 8an
Mot mach tuan t n gian nhat bao gom hai cong ao vi vong hoi tiep. No
khong co ngo vao va co 2 ngo ra nh sau:

Vout1
Vout2
Vin1
Vin2
Q
Q
Rc1
Rc2
-VBB
R2
Vcc
Rb2
-VBB
Rb1
R1
Vcc

4K
-12V
2.2K

+12V
2.2K

Mach c ve lai nh sau

Gia thiet co mach oi xng (T1 va T2 cung ten, cac ien tr phan cc cho 2
transistor cung tr so) nhng do 2 transistor khong the can bang mot cach tuyet
oi nen se co mot transistor chay manh hn va mot transistor chay yeu hn
Gia thiet T1 chay manh hn T2 nen I
C1
ln hn nen V
RC1
ln lam ien ap V
C1

giam. V
C1
qua ien tr R
2
phan cc cho T2 giam lam T2 chay cang yeu hn lam
I
C2
nho hn dan en V
C2
tang, ien ap V
C2
tang qua R
1
lam tang phan cc cho
T1 dan en T1 chay manh hn na, cuoi cung T1 se tien en trang thai bao hoa,
T2 tien en trang thai ngng dan. Neu khong co mot tac ong nao khac th
mach ien se mai trang thai nay. ay la mot trang thai cua mach Flip Flop
Ngc lai, neu gia thiet T2 chay manh hn T1 ly luan tng t cuoi cung T2 se
tien en trang thai bao hoa, T1 tien en trang thai ngng dan. Neu khong co
mot tac ong nao khac th mach ien se mai trang thai nay. ay la trang thai
th hai cua mach Flip Flop
Mach FF se mot trong hai trang thai tren nen c goi la mach lng on

4.8. FLIFFL0F
Phan t nh quan trong nhat la FlipFlop, no c tao t cac cong Logic. Cac
cong logic th t no khong co tnh nang nh, nhng ta co the ket noi chung vi
nhau e tao nen kha nang nh
S o khoi cho mot FF nh sau:

Thay rang FF co 2 ngo ra va 1 hay nhieu ngo vao. Cac ngo vao thng c s
dung e chuyen oi gia cac kha nang ngo ra, ta se thay rang khi mot ngo vao
nhan xung lam thay oi trang thai ngo ra va trang thai ngo ra nay se van gi

FlipFlop
Q
Q
Ng ra nh
Ng ra o
Cc
ng
vo
RC1
R2
T1
RC2
T2
RB1
+VCC
R1
-VBB
RB2
nguyen khong thay oi khi ngo vao nay khong con xung na, v vay ta goi FF co
ac tnh nh
FlipFlop con co cac ten goi khac la chot (latch) va mach hai trang thai ben
(bistable multivibrator)
4.8.1. 8FF dung 6ong h0

Bang s that
SET RESET Output
0 0 Khong thay oi
1 0 Q = 1
0 1 Q = 0
1 1 Khong s dung
Khi SET = RESET= 0. ay la trang thai nh va khong lam thay oi cac trang
thai ngo ra. V ay la mach hai trang thai ben nen se co hai trng hp ban au
xay ra, trng hp Q =0, Q=1 va trng hp Q =1, Q=0.
Trng hp Q=0, Q=1
Q=0 dan en ngo ra cong NOR1 =1, Q=1 nay a ve ngo vao cong NOR2, ngo
ra cong NOR2=0, nh vay mach van gi nguyen trang thai Q=0, Q=1
Trng hp Q=1, Q=0
Q=1 dan en ngo ra cong NOR1 =0, Q=0 nay a ve ngo vao cong NOR2, ngo
ra cong NOR2=1, nh vay mach van gi nguyen trang thai Q=1, Q=0
Nh vay vi hai trng hp, ngo ra se phu thuoc vao trang thai trc cua mach
khi SET = RESET =0
Thiet lap cac thay oi cho FF
Khi SET = 1, RESET = 0.
Ngo ra Q luon = 0, Q luon bang 1 va
van gi nguyen trang thai Q=1 khi
SET c at tr lai 0 (LATCH)
SET
RESET
Q
Q
SET
RESET
Q
Q

FF
S
R
Q
Q
Khi SET = 0, RESET = 1. Ngo ra Q luon = 0 va van gi nguyen trang thai
Q=0 khi CLEAR c at tr lai 0 (LATCH)
Khi SET = CLEAR = 1: ieu kien nay lam cho ngo ra Q = Q = 0, ro rang
ay la ieu kien khong mong muon hn na neu cac ngo vao tr lai mc 0
ong thi, ket qua ngo ra se khong the oan c c. Trang thai nay
khong c dung va goi la trang thai cam.
IC 4044 - 4 NOR RS-FF

4.8.Z. 8 FIIpFIop dung rong hh
RS FF dung cong NAND (tng t, ch lu y s hoan chuyen ngo ra Q va Q
va cac ieu kien ngo vao)

SET RESET
Output
1 1 Khong thay oi
0 1 Q = 1
1 0 Q = 0
0 0 Cam

Bien oi cach bieu th khac cua cong NAND

Ta c mach nh sau

RESET
SET
Q
Q
Q
Q
SET
RESET

FF
S
R
Q
Q
S R E Q
X X 0 HiZ
0 0 1 Khong thay oi
0 1 1 0
1 0 1 1
1 1 1 Cam
V d. Cap dang song sau vao ngo SR cua mach chot dung NAND, ve dang
song ngo ra Q, gia s ban au Q=0

V du tren ch ra rang ngo ra mach chot nh trang thai ngo vao tch cc trc
o va se khong thay oi trang thai cho en khi ngo vao con lai tch cc. No
c ng dung vao cac cong tac chong doi (debounce switch).
So sanh trng hp s dung cong tac bnh thng va trng hp s dung cong
tac chong doi nh sau

IC 74279 4 RS-FF

4.4. FLIFFL0F 0h X0h 6k
Cac he thong so co the hoat ong ong bo hay khong ong bo.
Mot he thong khong ong bo, ngo ra cua mach logic co the thay oi trang thai
bat c luc nao khi mot hay nhieu ngo vao thay oi
Mot he thong ong bo, s thay oi ngo ra c ong thi vi tn hieu goi la
xung clock
Hau het cac he thong so eu da vao nguyen ly ong bo v mach ong bo de
thiet ke

FF
CK
Q
Q
input
CK tch cc canh len

FF
CK
Q
Q
input
CK tch cc canh xuong
Q
SET
RESET
Vcc
1
Vout
0

S
R
Q
Vcc
Vcc
R
R
Vout
Q
4.4.1. 6Iork 8 FIIpFIop

S R CK Q
0
1
0
1
0
0
1
1

Q
0
(khong oi)
1
0
Cam
S o ben trong cua clock SR- FlipFlop

Mach phat hien sn xung len hay xuong se tao mot xung hep ngo ra (CK*).
Xung nay se xuat hien tai canh len hay canh xuong cua CK va tac ong m
cong cho 2 cong NAND, mach phat hien sn xung nh sau

4.4.Z. 6ar bIan Iha rua 8 FF
e s dung c ca to hp R=S=1, thng s dung cac bien the cua RS-FF. Bao
gom: R-FF, S-FF, E-FF.
FF ng vi to hp cam S=R=1 th Q=0 va Q=1, s o cua R-FF nh sau

S
R
Q
Q
CLK
1
CK
RESET
SET
Pht
hin
cnh
Q
Q
CK
CK
CK
CK*
CK
CK*
CK
CK
CK*
CK
CK
CK*
1
CK
RESET
SET
Pht
hin
cnh
Q
Q
8FF ng vi to hp cam S=R=1 th Q=1 va Q=0, s o cua S-FF nh sau

EFF ng vi to hp cam S=R=1 th Q va Q gi nguyen trang thai (giong to hp
R=S=0), s o cua E-FF nh sau

4.4.8. 6Iork 1k FIIpFIop

S o ben trong cua clock JK FF

J
K
CK
Pht
hin
cnh
Q
Q
1
CK
RESET
SET
Pht
hin
cnh
Q
Q
1
CK
RESET
SET
Pht
hin
cnh
Q
Q

J
K
Q
Q
CK
J K CK Q
0
1
0
1
0
0
1
1

Q
0
(khong oi)
1
0
0
Q
4.4.4. FIIpFIop

V d, tao D-FF t RS-FF
4.4.6. 8Ian Iha rua FF
Trong thc t con s dung mot bien the cua D-FF la DV-FF, ky hieu va bang s
that nh sau

Vay V giong nh chan ieu khien: khi V=1, FF hoat ong giong D-FF, khi V=0
FF se khong oi trang thai
4.4.6. T FIIpFIop

4.4.7. 6ar ngo vao khong dong bo
Vi cac FF tren, cac ngo vao S-R, J-K, D xem nh cac ngo ieu khien, va
c goi la cac ngo vao ong bo (synchronous input) v tac ong cua chung oi
vi ngo ra th ong bo vi CK
Ngoai ra hau het cac FF cung co 1 hay nhieu ngo vao khong ong bo
(asynchronous input) hoat ong oc lap vi ngo vao ong bo va xung clock. Cac
ngo vao khong ong bo nay c s dung e at ngo ra cua FF len 1 (PRESET)
hay xoa ngo ra cua FF ve 0 (CLR) bat chap cac ieu kien cua ngo vao

D Q
Q
CK
1
Q
Q
D
CK
Pht
hin
cnh

D
V
Q
Q
CK
V D CK Q
0
0
1
1
0
1
0
1

Q
0
(khong oi)
Q
0
(khong oi)
0
1
D CK Q
0
1

0
1
CK
Q
Q
T
CK T Q
Khong co CK

x
0
1
Q
0
Q
0
0
Q

4.6. 66 0h 0h 60 FLIFFL0F
4.6.1. ong bo hoa dung FF
Hau het cac he thong so eu da tren nguyen ly ong bo trong hoat ong cua
chung (trang thai tn hieu thay oi ong bo vi xung clock). Trong mot so trng
hp se co mot so tn hieu khong c ong bo v xung clock, noi cach khac la
bat ong bo. Cac tn hieu nay thng xuat hien trng hp nhan mot phm tai
mot thi iem ngau nhien so vi xung clock, s ngau nhien nay co the a en
mot ket qua khong mong muon. e khac phuc ieu nay ta se xet v du sau:
V d,

4.6.Z. Marh phaI hIan moI rhuoI ngo vao Iuan Iu
Trong mot so ng dung, can nhan biet chuoi xung nao en trc trong hai chuoi
xung, gia s ngo ra se mc cao neu ngo vao A mc cao trc ngo vao B

Ta chon B lam xung CK kch canh len cho mach FF
A
Clock
X
Kha chng
di
Xung khong mong muon
Clock
A
X
PR CLR Ngo ra
1
0
1
0
1
1
0
0
hoat ong theo CK
Q=1
Q=0
khong s dung
7474
D
CK
Q
Q
PR
CLR
D-FF
7476
J
CK
Q
Q
PR
CLR
K
JK-FF
A
Q
D
CLK
Q
Q
PR
CLR
X
Clock
X
Kha chng
di
Clock
Xung ong bo
A
X
B
X
B
A
B
X
A J
CLK
K
Q
Q
PR
CLR
4.6.8. Thanh ghI d}rh
Cac dang cua thanh ghi dch gom
Vao song song/ ra song song
Vao noi tiep/ra noi tiep
Vao song song/ra noi tiep
Vao noi tiep/ ra song song
a. Vao song song/ ra song song (74174, 74374)
74174. S o ben trong cua 74174 (6bit ghi dch,
ngo vao t D
0
en D
5
ngo ra t Q
0
en Q
5
)

74374. thanh ghi dch 8 bit vao song song/ 8 bit ra song song

OC CLK D Output
0
1
1
0
0
0
0 0
X
Q
O
1 X
X
HiZ

b. Vao noi tiep/ ra noi tiep
e cat n d lieu vao thanh ghi ta can n xung CK, thi gian ghi cham. Tng t,
e xuat d lieu can n-1 xung, thi gian xuat cham. Li iem: t sai

D4 D5
D
CLK
Q
Q
PR
CL
Q4
D
CLK
Q
Q
PR
CL
D1
Q5
D0
CK
Q0 Q1
MR
D
CLK
Q
Q
PR
CL
D
CLK
Q
Q
PR
CL
74LS174
1D
2D
3D
4D
5D
CLK CLR
1Q
2Q
4Q
5Q
3Q
6D 6Q
74LS374
D0
D1
D2
D3
D4
D5
D6
D7
OC
CLK
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
Os D
CLK
Q
Q
PR
CL
D
CLK
Q
Q
PR
CL
Ds
CK
D
CLK
Q
Q
PR
CL
D
CLK
Q
Q
PR
CL
4731. CMOS thanh ghi dch 256bit (4 bo ghi dch 64bit noi tiep)

c. Vao song song/ ra noi tiep
74LS166 la loai IC nap d lieu vao song song (8bit),
xuat d lieu ra noi tiep (D lieu c nap vao t chan
A,,H va xuat ra tuan t chan SER OUT. Ngoai ra
74166 con co 1 ngo vao data noi tiep SER
CKI la chan cho phep xung CK, CKI=[0]: cho phep
xung CK, CKI=[1] : cam xung CK.
SH/LD=[0]: nap d lieu, SH/LD=[1]: dch d lieu.
Sau khi dch 1 bit ra khoi hang d lieu (ve hng bit
H), bit A se trong va bit SR (Serial in) se dch vao
thanh chot cua bit A.
d. Vao noi tiep / ra song song 74164
74164. thanh ghi dch 8bit, A va B la ngo vao data cho D-FF

V d. Gia s rang ban au trang thai thanh ghi 74164 la 00000000, xac nh
chuoi trang thai ke tiep cua mach sau

D
S
CP
64bit

Q

D
S
CP
64bit
Q
D
S
CP
64bit
Q
D
S
CP
64bit

Q

74LS166
SER
A
B
C
D
E
F
G
H
CLK
INH
SH/LD
CLR
QH
74LS164
A
B
CLK
QA
QB
QC
QD
QE
QF
QG
QH
CLR
A
B
D
CLK
Q
Q
PR
CL
1
CK
74LS164
A B CLK
A B C D E F G H
CLR
1
4.6.4. 0ng dung Trong mIrrorompuIar

Hnh tren la mot n v vi x ly (MPU) vi cac ngo ra dung e truyen data nh
phan en thanh ghi X (4 D-FF). Hau het cac MPU co t nhat 16 ng a ch,
nhng thng se khong s dung het. ng dung MPU e truyen so nh phan t
thanh ghi trong MPU en thanh ghi ngoai X. e thc hien ieu nay, MPU thc
hien cac bc sau:
at so nh phan ra ngo ra D
3
D
2
D
1
D
0

at ma a ch ung t A
15
en A
8
e chon thanh ghi X
Khi data va a ch ngo ra a on nh, MPU se tao xung clock cap cho thanh
ghi X e hoan tat qua trnh truyen song song t MPU en thanh ghi X
Cac FF trong thanh ghi X co the s dung cho nhieu nuc ch khac nhau. V du,
sau khi MPU thc hien cac phep tnh va hien th ket qua, moi FF se c noi
vi 1 LED va data ket qua nay co the thay c. V du khac, moi FF thanh phan
co the ieu khien tat/m cac thiet b khac nh motor hay role da tren c s ma
nh phan truyen t MPU ra
4.6.6. 8o 6hIa Tan 8o
S MOD: la so trang thai ngo ra cua mot mach em
V d: mot mach em co chuoi trang thai ngo ra sau la mach em MOD 4

V d: xet mach sau

000 010 101 111
MOD 4
J
CLK
K
Q
Q
PR
CL
2
J
CLK
K
Q
Q
PR
CL
A LSB
J
CLK
K
Q
Q
PR
CL
1
B C MSB
1
1
1
1
1
1
1
1
1
1
1
A
15
A
14
A
13
A
12
A
11
A
10
A
9
A
8
CP

D
CLK
Q
D
CLK
Q
D
CLK
Q
D
CLK
Q
D
3
D
2
D
1
D
0
MPU

X
3
X
2
X
1
X
0

Q
A
se thay oi trang thai bang Q trc o tai cang xuong cua xung CK

=> T
QA
=2T
CK
=>
CK QA
f
2
1
f =
Q
B
se thay oi trang thai bang Q trc o tai cang xuong cua Q
A
=> T
QB
=2T
QA
=>
QA QB
f
2
1
f =

Q
C
se thay oi trang thai bang Q trc o tai cang xuong cua Q
B
=> T
QC
=2T
QB
=>
QB QC
f
2
1
f =

Nh vay moi FF chia tan so ngo vao CK cua no 2 lan.
Tong quat vi n FF th
CK
n
Qout
f
2
1
f =
ng dung bo chia tan lam bo em nh phan. Da vao gian o xung tren, a ra
c bang s that sau. Gia s ban au CBA =000

C B A CK
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
Ban au
Sau xung CK1
Sau xung CK2
Sau xung CK3
Sau xung CK4
Sau xung CK5
Sau xung CK6
Sau xung CK7
0
0
0
0
0
1
Sau xung CK8
Sau xung CK9
Bo em tren co 2
3
trang thai khac nhau t 000 en 111, no c goi la bo
em MOD 8
Vi n FF co 2
n
trang thai khac nhau, so MOD toi a la MOD 2
n

000
001
010
011
100
110
111
101
8
B
5 9 11 7 4 6 10 3 2
Clock
1
C
A
0 1 2 3 4 5 6 7 0 1 2
4.6.6. M6h EM
a. em khong ong bo vi MOD 2n
Mo hnh em len

Mo hnh em xuong

ieu kien
+
0
Q = Q

V d, bo em len nh phan 4 bit dung JK-FF vi CK kch canh xuong nh sau

Q
Q
Q
0
LSB
CK
Q
Q
CK
Q
Q
Q
n
MSB
CK
Q
1
Q
Q
Q
0
LSB
CK
Q
Q
CK
Q
Q
Q
n
MSB
CK
Q
1
Q
Q
Q
0
LSB
CK
Q
Q
CK
Q
Q
Q
n
MSB
CK
Q
1
Q
Q
Q
0
LSB
CK
Q
Q
CK
Q
Q
Q
n
MSB
CK
Q
1
J
K
Q
Q
CK
PR
CL
1
1
T Q
Q
CK
PR
CL
1
D Q
Q
CK
PR
CL
B
J
CK
K
Q
Q
PR
CL
A
1
1
J
CK
K
Q
Q
PR
CL
C
J
CK
K
Q
Q
PR
CL
D
J
CK
K
Q
Q
PR
CL
1
1
1
1
1
1
1
1
1
1
1
1
1
1
Xung clock c a vao ngo CK cua FF -A, v vay FF-A se thay oi trang
thai sau moi xung clock (lu y la tat ca cac ngo vao J=K=1)
Ngo ra cua FF-A c a vao ngo vao CLK cua FF-B, v vay FF-B thay oi
trang thai khi ngo ra Q
A
thay oi t 1 xuong 0. Tng t cho FF-C va FF-D
Bang sau mo ta cac ngo ra cua cac FF sau moi xung CK, sau xung clock th
16 cac ngo ra se tr ve 0000 va lap lai trang thai ban au
D C B A Xung CK
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
0 0 0 0 16 (lap lai)
Dang mach em ma ngo ra FF c s dung nh CK cho tang sau c goi la
mach em khong ong bo, v tat ca cac FF khong thay oi trang thai ong bo vi
xung clock, ch co FF-A thay oi tng ng vi xung clock

V d, thit k bo em len nh phan 4 bit dung FF nh sau

QC
QD
QB
QA
CK
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 0
D
CLK
Q
Q
PR
CL
T
CLK
Q
Q
PR
CL
(a)
(b)
V d, thit k bo em xuong nh phan 4 bit dung FF nh sau

V d, xay dng mach tao xung 1Hz t ien li 50Hz nh sau:

ien ap li ac co tan so 50hz qua bo bien oi sin sang song vuong, sau o cho
qua bo chia 50 (MOD 50 counter) c xung 1hz
Van e at ra la can bao nhieu FF cho bo chia 50. Vi 6 FF ta c mach chia
2
6
=64. Nh vay s dung giai phap em MOD 2
n
la khong thch hp.
b. em khong ong bo vi MOD < 2n
Cc bc thit k
Bc 1. Thc hien chon dang mach
Bc 2. Xac nh so FF can toi thieu
Goi n la so FF can
Chon n sao cho 2
n-1
< MOD < 2
n

Bc 3. Ap dung tnh chat cua cac ngo vao bat ong bo (Pr, Cl) e xac nh
trang thai xoa theo trnh t sau:
Lap bang trang thai cho cac ngo ra va cac ngo vao bat ong bo
Viet ham cho cac ngo Pr va Cl
Rut gon ham Pr va Cl (dung ba K, ai so Boolean)
Ve mach hoan chnh
V d, Thiet ke mach em len nh phan MOD6 dung JK-FF nh sau

Xac nh so FF toi thieu: 2
2
< 6 < 2
3
so FF can la 3

Schmitt
Trigger
MOD 50
counter
50Hz
50Hz
1Hz
D
CLK
Q
Q
PR
CL
T
CLK
Q
Q
PR
CL
(a) (b)
J
CLK
Q
Q
PR
CL
(c)
K
J
CLK
Q
Q
PR
CL
K
Bang trang thai em
Q
C
Q
B
Q
A
Cl Pr
0
0
0
0
1
1
0
0
1
1
0
0
0
1
0
1
0
1
1
1
1
1
1
1
1
1
1
1
1
1
0 0 0 0 1
Vay
Cl =
C B
Q Q + =
C B
Q Q , Pr = 1
Dang mach em len MOD 6

Sinh vin v dng sng ABC kim chng
V d, Thiet ke mach em xuong MOD 12 dung FF sau

c. Tre trong mach em khong ong bo
Mach em khong ong bo la dang n gian nhat cua cac bo em nh phan v
cac thanh phan e tao ra mach em la t nhat. Tuy nhien cung co mot so van e
lien quan en mach. FF sau se thay oi trang thai ng vi s thay oi trang thai
ngo ra cua FF trc. Do moi FF co thi gian tre truyen at (t
pd
), ngha la FF th
2 se khong ap ng trong khoang thi gian t
pd
khi FF au tien nhan c xung
clock, tng t FF th 3 se khong ap ng trong khoang thi gian 2t
pd
khi FF au
tien nhan c xung clock, cuoi cung FF th N se khong ap ng trong khoang
thi gian Nt
pd
khi FF au tien nhan c xung clock

0 1
00 1 1
01 1 1
11 0 X
10 1 1

Q
A

Q
C
Q
B
Cl
B
J
CLK
K
Q
Q
PR
CL
1
1
A
J
CLK
K
Q
Q
PR
CL
C
J
CLK
K
Q
Q
PR
CL
1
1
1
1
1 1 1
D
CLK
Q
Q
PR
CL
T
CLK
Q
Q
PR
CL
(a) (b)
J
CLK
Q
Q
PR
CL
(c)
K

Xet trng hp sau

Neu chu ky xung clock T= 2t
pd
. Nh a thay tren hnh ve, trang thai em se t
000, 001 roi xuong 000, 010, 011, 010, 000, 101,
Thay rang cac trang thai em khong con tuan thu em len, va khong bao gi co
trang thai 100
e khac phuc, chu ky xung clock phai ln hn thi gian tre ln nhat cua mach
em ngha la
T
clock
Nt
pd

hoac f
max
=
pd
1
Nt
(tan so cc ai cho phep)
Vi mach em khong ong bo 4 bit
cho thi gian tre cua JK-FF (t
pd
= 24ns) => f
max
=
1
=10.4Mhz
4.24ns

Khi so FF tang th tan so cc ai cua mach giam xuong
d. Cac vi mach em khong ong bo
7493, 74293
74LS93 co 2 bo em ben trong: mot bo em 2 vi ngo
vao xung CKA, mot bo em 8 vi ngo vao xung CKB
Sinh vien tra bang s that cua 7493 va liet ke chuoi
em khi noi Q
A
ve CKB va chuoi em khi noi Q
D
ve
CKA
t
pd
2t
pd
3t
pd
QA
QB
QC
CK
1
0
0 0
1
0
0
0
0
1
0
1
0 0
0
0
0
0
0 1 0 1
1 0
t
pd t
pd
t
pd
T
74LS93
CKA
CKB
R01
R02
QA
QB
QC
QD
74LS90
74LS90 co 2 bo em ben trong: mot bo em 2 vi ngo
vao CKA, mot bo em 5 vi ngo vao CKB
Sinh vien tra bang s that cua 7493 va liet ke chuoi em
khi noi Q
A
ve CKB va chuoi em khi noi Q
D
ve CKA
CD4024, CD4040
4024 la bo em nh phan 7bit (MOD128), 4040 la bo em nh phan 12bit
(MOD4096)
e. em ong bo va mang tuan t
e khac phu nhc iem thi gian tre cua xung CK, mang ong bo, tat ca cac
FF eu s dung chung xung CK. V vay, cac ngo ra se thay oi ong thi theo
xung CK
Phng php thit k
Bc 1, thiet lap bang mo ta moi quan he gia ngo ra hien tai (Q) va ngo ra ke
tiep (Q
+
)
Bc 2, Thiet lap cac trang thai ngo vao cho FF e thoa man cac thay oi ngo
ra t bang tren
Bc 3, Rut gon cac phng trnh ngo vao cho FF
Bc 4, Thc hien mach
bc 2, e thiet lap trang thai ngo vao theo ngo ra, cac bang s that trc cua
FF phai thay oi.
V d, bang s that cho SR-FF

V d, Tng t, bang s that cho JK-FF, D-FF, T-FF

74LS90
R91
R92
R01
R02
CKA
CKB
QA
QB
QC
QD

Q Q
+
S R
0
0
0
1
1
1
0
0
1
0
0
1
0
0
1
0
0
1
0
1
0
1
0
0

Q Q
+
S R
0
0
1
1
0
1
0
1
0
1
0
x
x
0
1
0
S R Q Q
+
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
0
0
1
1
-
-
Q Q
+
J K
0
0
1
1
0
1
0
1
0
1
x
x
x
x
1
0
Q Q
+
T
0
0
1
1
0
1
0
1
0
1
1
0
Q Q
+
D
0
0
1
1
0
1
0
1
0
1
0
1
V d, Thiet ke mach em co chuoi em sau dung T-FF
Bc 1,2,

Bc 3,

T
C
= CB+CB T
B
= CA+CB T
A
= C+B
Mach cuoi cung va gian o trang thai cho mach nh sau

Mac du bang trang thai cho mach hnh tren khong ch ra het cac trng hp, cac
trang thai ke cua trang thai 001, 101, 110 cung c ch ro trong qua trnh thiet
ke mach.
000
100
111 010
011

0 1
00 1 0
01 x x
11 0 1
10 0 x

C
BA

T
C

0 1
00 0 1
01 x x
11 1 0
10 0 x
C
BA
T
B

0 1
00 0 1
01 x x
11 1 1
10 1 x
C
BA

T
A
C C A
CK
T
B

CK
A
T
C

C
T
A
Q
B
B
Q Q
CK CK
C
B
C B
C B
1
T
A
1
0 0 1
0
0
1
B
0
1
0 1
T
B
0
Tc
A
CK
1
0
0
0
0
C
Ngo ra hien tai Ngo ra ke tiep Ngo vao
C B A C
+
B
+
A
+
T
C
T
B
T
A
0
0
0
0
1
1
1
0
0
1
1
0
0
1
0
1
0
1
0
1
0
1
-
0
0
1
-
-
0
-
1
0
1
-
-
0
-
1
0
1
-
-
1
-
0
0
0
-
-
0
-
0
1
1
-
-
0
-
1
1
1
-
-
V d, neu cac FF c at gia tr ban au C=0, B=0, A=1 va co xung Clock, t
phng trnh T-FF suy ra T
A
= T
B
=1 va trang thai se chuyen thanh 111, va khi
nhan xung ck ke tiep, mach se hoat ong nh bo em a thiet ke

trang thai ban au khi cap nguon cho mach, trang thai au tien cua FF la
khong oan c. V ly do nay, tat ca cac trang thai dont care trong bo em
phai c kiem tra e chac chan rang no se a en chuoi em chnh neu
khong co mot tac ong reset nao cho mach
V d, thiet ke lai v du tren dung SR-FF
Ket qua: R
C
= A, S
C
= B
R
B
= CA , S
B
= C
R
A
= A, S
A
= CA+BA
V d, thiet ke lai v du tren dung D-FF
oi vi D-FF, Q
+
=D, v vay ba ngo vao D tng ng vi ba trang thai ke. V
vay, bieu thc cho D co the oc trc tiep t ba Q
+
.
Ket qua: D
C
= C
+
= B
D
B
= B
+
= C+BA
D
A
= A
+
= CA+BA
V d, thiet ke lai v du tren dung JK-FF
Ket qua: J
C
= B , K
C
= A
J
B
= C, K
B
= CA
J
A
= C+B, K
A
= 1
Phng php nhanh xc nh biu thc ng vo cho JK-FF

T v du tren thay rang J
A
va K
A
khong cha bien A, tng t J
B
va K
B
oc lap
vi B, J
C
va K
C
oc lap vi C. Tong quat, ham cc tieu cho J va K cua FF Q
000
100
111 010
011
100
Q Q
+
J K
0
0
1
1
0
1
0
1
0
1
x
x
x
x
1
0
khong phu thuoc vao Q, ieu nay la bi v Q=1 trong ba J la dont care, v vay
bat c 1 pha Q=0 cua ba J co the c ket hp vi 1 dont care lam triet tieu
bien Q, ba K th cung tng t v tat ca Q=0 trong ba K eu la dont care.
T bang trang thai ke cho JK, khi Q=0 th J=Q
+
, v J oc lap vi Q, nen co the
oc J trc tiep t Q=0 tren ba Q
+
, tng t khi Q=1 th K =Q
+
nen co the oc
trc tiep K t Q=1 tren ba Q
+
Xet v du tren

Ket qua: J
C
= B , K
C
= A
J
B
= C, K
B
= CA
J
A
= C+B, K
A
= 1
Phng phap tren co 2 thuan li:
(1) Viec tach thanh 2 ba J, K la khong can thiet.
(2) So bien trong ham giam i 1 do J
Q
va K
Q
oc lap vi Q).
V d, thiet ke mach chuyen ma 8-4-2-1 BCD sang ma qua 3 dung JK-FF
Bang trang thai chuyen oi cho nh sau
BCD 8-4-2-1 Qua 3
A B C D A
+
B
+
C
+
D
+
0
0
0
0
0
0
0
0
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
0
0
1
1
0
0
0
1
0
1
0
1
0
1
0
1
0
0
0
0
0
1
1
1
1
1
0
1
1
1
1
0
0
0
0
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
0

0 1
00
1 1
01
x x
11
0 0
10
0 x
C
BA

C
+

0 1
00
0 1
01
x x
11
0 1
10
1 x
C
BA
B
+

0 1
00
0 1
01
x x
11
0 0
10
1 x
C
BA

A
+
J
C
C
K
J
B
B
K
J
A
J
A
A
K
Ket qua: J
A
= BC+BD K
A
=0
J
B
= C+D K
B
=C+D
J
C
= D K
C
=D
J
D
= 1 K
D
=1
V d, Thiet ke mach em len/ xuong ong bo MOD8 dung JK-FF
Mach em len MOD8

Mach em xuong MOD8

Mach em len/xuong MOD8
Ket hp 2 mach tren e tao thanh mach em len/ xuong nh sau:

clock
1
J
CLK
K
Q
Q
PR
CL
1 J
CLK
K
Q
Q
PR
CL
74LS76
J
CLK
K
Q
Q
PR
CL
1 1 1
1 1 1
1
clock
J
CLK
K
Q
Q
PR
CL
1 J
CLK
K
Q
Q
PR
CL
74LS76
J
CLK
K
Q
Q
PR
CL
1
1
1
1
1
1
1
Count-down
J
CLK
K
Q
Q
PR
CL
Count-up
1 J
CLK
K
Q
Q
PR
CL
74LS76
J
CLK
K
Q
Q
PR
CL
clock
1
1
1
1
1
1
V d, Thiet ke mach em co kha nang at trang thai (presetable counter)
Nhieu mach em ong bo c thiet ke co kha nang at trang thai bat au cho
bo em. Kha nang nay co the ong bo hoac khong ong bo vi xung CK.
Minh hoa mach em len 3 bit co kha nang at trang thai khong ong bo

Nhieu IC s dung at trang thai ong bo vi xung clock.
f. Mot so IC em ong bo thong dung
74163, bo em len 4bit, Pr va CLR ong bo, co kha nang at trc trang thai
74192, bo em len/xuong ong bo MOD10, Pr va CLR bat ong bo
74193, bo em len/xuong ong bo 4bit, Pr va CLR bat ong bo

1
P0
J
CLK
K
Q
Q
PR
CL
1
P1
LOAD
J
CLK
K
Q
Q
PR
CL
74LS76
J
CLK
K
Q
Q
PR
CL
clock
P2
74LS163
CLR
A
B
C
D
CLK
ENT
ENP
LOAD
QA
QB
QC
QD
RCO
74LS192
UP
DOWN
CLR
LOAD
A
B
C
D
QA
QB
QC
QD
BO
CO
74LS193
A
B
C
D
UP
DN
LOAD
CLR
QA
QB
QC
QD
CO
BO
g. Mach em vong
c xet tren c s cua mach em ong bo, bo em vong co cau truc cua thanh
ghi dch nhng co them hoi tiep. Thong thng s dung D-FF hay JK-FF

Trang thai ban au at cho mach la A=0, B=0, C=1

Mach co chu trnh em MOD3 bang vi so FF co trong mach. Cac trang thai cua
FF c chuyen dan t C -> A -> B.
Bo em vong Johnson

B
D
CLK
Q
Q
PR
CL
C
D
CLK
Q
Q
PR
CL
D
CLK
Q
Q
PR
CL
CK
A
B
C
A
CK
CK
B
1
D
CLK
Q
Q
PR
CL
C
D
CLK
Q
Q
PR
CL
1
D
CLK
Q
Q
PR
CL
A
1
1 1 1
C B
J
CLK
Q
Q
PR
CL
J
CLK
Q
Q
PR
CL
J
CLK
Q
Q
PR
CL
CK
A
K
K K

Bang trang thai
CK A B C
0
1
2
3
4
5
6
0
1
1
1
0
0
0
0
0
1
1
1
0
0
0
0
0
1
1
1
0
Mach s dung 3-FF nen so MOD = 6
Tong quat, vi mach s dung n-FF th so MOD la 2n
Vi mach em vong Johnson la 4017 MOD10

4.6.7. 0ng dung bo dam.
a. am Ian so

B
C
A
ck
Display
Unknow freq.
Counter
Counter
Clear
SAMPLE
pulses
t
0
t
1 t
2
T.gian ly mu

SAMPLE pulses
Clear
Unknow freq
Z
CD4017
O0
O1
O2
O3
O4
O5
O6
O7
O8
O9
CLK
CKI
RESET
COUT
Mach em tan so la mach o va hien th tan so cua tn hieu.
Ngo vao cong AND bao gom cac xung vi tan so chua biet f
x
va 1 xung lay mau
ieu khien thi gian cho phep xung qua cong AND vao bo em.
Mach em se em so xung xuat hien trong thi gian lay mau. Ga tr hien th
cua bo em la tan so cua tn hieu can o (neu thi gian lay mau t
2
t
1
=1s th
n v cua tan so la Hz)
S chnh xac cua phung phap nay tuy thuoc vao khoang thi gian lay mau.
Phng phap thng s dung e nhan c 1 xung lay mau chnh xac la s dung
bo dao ong thach anh e tao ra tan so chnh xac (v du 100khz) sau o ngi ta
chia xuong theo cac thang o nh sau

Cuoi cung bo em tan so hoan tat nh sau

Dao ng
thach anh
Bin i
sin-
vung
B
m10
Chia 10
B
m10
Chia 10
B
m10
Chia 10
B
m10
Chia 10
B
m10
Chia 10
100kh 100kh
10khz 1khz 100hz 10hz 1hz
SAMPLE pulse
1
1
J
CLK
K
Q
Q
PR
CL

Q
T
R
T C
T
T
p
=100ns
CLEAR
1
Decoder/
Unknow
freq
SAMPLE
pulse
Display
1
J
CLK
K
Q
Q
PR
CL
Counter

b. ong ho so
Mot trong nhng ng dung thong dung nhat cua bo em la ong ho so, hien th
thi gian trong ngay nh gi, phut, giay.
e tao mot ong ho so chnh xac yeu cau tan so xung clock cap cho ong ho
phai chnh xac. oi vi nhng ong ho so s dung pin, thng s dung thach
anh e tao tan so c ban. oi vi ong ho so s dung ien li ac, dung tan so
cua ien li e tao tan so c ban. Trong cac trng hp tren tan so cua thach
anh hay ien li c chia xuong thanh tan so 1hz cap cho ong ho

Pulse
shaper
50hz
Chia
50
50hz 1hz
BCD
counter
MOD6
counter
Decoder
display
Decoder
display
0-9
Unit
0-5
ten
Second
section
BCD
counter
MOD6
counter
Decoder
display
Decoder
display
0-9
Unit
0-5
ten
Minute
section
BCD
counter
MOD2
1-FF
Decoder
display
Decoder
display
0-9
Unit
0-1
ten
Hours
section
counter
clear
counter
is
counter
stop
display
show freq
count
clear
counter
is
Q
SAMPLE
pulse
output
Input pulse
T
oi vi mach em gi
co mot so tnh huong
sau:
Khi so hang chuc gia
tr 0, th bo em hang
n v la bo em BCD
Khi so hang chuc gia
tr 1, th bo em hang
n v ch em MOD3
(hien th gia tr gi t
10 en 12 roi tr lai 1
(cho nen mach nay phai
co kha nang at trc
so em)
Mach cho bo em gi
nh hnh ben

4.6.B. 8o nho Iruy rap ngau nhIan

Bang chc nang

Ngo vao
A
i R/W D
i
Che o
0 X X Nh, D
0
= 0
1 0 0 Nh 0 vao o nh, D
0
= 0
1 0 1 Nh 0 vao o nh, D
0
= 0
1 1 X oc o nh, D
0
= bit nh

Display
J
CLK
K
Q
Q
PR
CL
74LS192
CK-UP CK-D CLR
PL
A B C D
A B C D BO CO
Decoder
0
1
Unit of
hours
1
0
Display
1 0
Tens of
hours
D
CLK
Q
Q
PR
CL
D
i
D
O
Xut data
Nhp data
R/W

A
i
Aa ch nh
4.6. MY TRNG THI
He tuan t con co ten goi khac la may trang thai (State Machine), ten nay
thng s dung khi dung mot he tuan t e ieu khien 1 he thong so thc hien
mot thu tuc hoac mot thuat toan tng bc mot. Co the nh ngha cac may
trang thai bang cac gian o trang thai, hoac mot kieu lu o ac biet c goi la
lu o may trang thai hay lu o SM (State Machine) dung e mo ta ac tnh
lam viec cua mot may trang thai
Trong thiet ke so, thng s dung t may trang thai e ch cac mach ong bo
nh mch m o cac gia tr ra thay oi t mot trang thai nh phan nay sang
mot trang thai nh phan khac khi mach c cung cap xung clock.
SM co hai loai: Moore va Mealy.
4.6.1. My trng thi kiu MOORE
S o khoi may trang thai kieu Moore va mot mach counter nh phan 2bit la mot
v du cho may trang thai kieu Moore

Cac FF

Giai ma
ngo ra
Cac t/hieu
ngoai
Clock
Giai ma
t.thai ke
Lu tr t.thai
hien tai
+
k
Q
+
2
Q
+
1
Q Q1
Mang to
hp
X
1
X
2
X
m
Q
1
Q
2
Q
k
D1
CK
Q2
D2
CK
Qk
Dk
CK
Clock
He to
hp
(cho
cac
ngo
ra)
Z
2
Z
1
Z
n
4.6.2. My trng thi kiu MEALY
S o khoi may trang thai Mealy

4.7. LU A MY TRNG THI
Cac lu o SM con c goi la lu o ASM (Algorithmic State Machine). Lu
o SM cho nhieu thuan li trong viec de hieu hn hoat ong cua mot he thong
so bang cach quan sat thay v la gian o trang thai tng ng. Co the chuyen
mot lu o SM cho trc thanh nhieu dang tng ng, va moi dang dan trc
tiep en mot cai at phan cng.
Ba thanh phan chnh cua mot lu o SM

Logic
trang thai
ke
Bo nh
trang thai

Ngo CK

Logic ra
G
Clock
Trang thai
hien hanh
Kch
thch
Cac gia tr
ra (Output)
Gia tr
vao
Q1
Z
2
HE
TO
HP
X
1
X
2
X
m
Q
1
Q
2
Q
k
Z
1
Z
n
CK
Q2
D2
CK
Qk
Dk
CK
Clock
+
1
Q
+
2
Q
+
k
Q
D1
M trang
thi
tn trang
thi
(a) Hop trang thai
iu kin
nhnh
ng
1
nhnh
sai
0
(b) Hop quyet nh
danh
sch xut
theo iu
kin
(c) Hop xuat theo k
Trang thai cua mot he thong c bieu dien bang hop trang thai (state box),
hop trang thai co the cha mot danh sach gia tr ra. Ma trang thai co the at
ben canh hop phan tren. Ten trang thai c at trong hnh tron ben trai
hop trang thai.
Hop quyet nh (decision box) c bieu dien bang mot ky hieu hnh thoi
vi cac nhanh ung va sai. ieu kien at trong hop la mot bieu thc
Boolean c xac nh e lay nhanh nao.
Hop xuat theo ieu kien (conditional output box) cha danh sach va cac gia
tr ra theo ieu kien phu thuoc vao ca trang thai cua he thong va cac gia tr
vao
Mot lu o SM c xay dng t cac khoi SM (SM block) moi khoi SM cha
chnh xac mot hop trang thai cung vi cac hop quyet nh va cac hop xuat theo
ieu kien lien he vi trang thai o.
Mot khoi SM co chnh xac mot ng vao va mot hoac nhieu ng ra va mo ta
hoat ong cua may trong thi gian ma may ang trong trang thai.
Khi mot he thong so i vao trang thai lien he vi mot khoi SM cho trc, cac
gia tr ra danh sach xuat trong hop trang thai se tr thanh ung. Cac ieu kien
trong cac hop quyet nh se c nh tr e xac nh xem ng nao i theo
qua khoi SM. Khi tren ng i co gap mot hop xuat theo ieu kien th cac gia
tr ra tng ng se tr thanh ung. Mot ng dan qua khoi SM t ngo vao en
ngo ra c goi la ng dan noi ghep (link path)
V d, mot khoi SM

khi vao trang thai S
1
, cac gia tr ra Z
1
va Z
2
= 1. Neu gia tr vao X
1
va X
2
eu
bang 0 th Z
3
va Z
4
bang 1 va cuoi thi gian trang thai, may i vao trang thai
Z
1,
Z
2

S
1
X
1
X
3 Z
3
, Z
4
0 1
0 1
Z
5
X
3
0 1
1
2
3 n
n ng ra
nhanh a nhanh b
ke qua ng ra 1, ngc lai neu X
1
=1 va X
3
= 0, gia tr ra Z
5
= 1 va i vao
trang thai ke qua ng ra 3
Tong quat th mot khoi SM co the c ve bang nhieu dang khac nhau. Hai khoi
SM sau la tng ng.

V d, Ve mot khoi SM tng ng vi khoi SM sau.

`

Phai tuan theo mot so quy tac nhat nh khi xay dng mot khoi SM:
Th nhat, vi moi ket hp cac bien vao hp le phai co chnh xac mot ng ra
c nh ngha. ieu nay la can thiet v moi to hp vao c cho phep phai
dan en 1 trang thai ke duy nhat.
Th hai, khong cho phep co ng hoi tiep noi trong mot khoi SM.

A
Z
1
1
C
B
0
0
1
0
1
Z
1

S
1
X
3
Z
2
0 1
0 1
S
2 S
3
Z
1

S
1
X
2
Z
2
0 1
S
2 S
3
X
1
0
1
Z
2
X
1
1
0
X
1
V d, 1 cach ve sai va 1 cach ve ung oi vi 1 khoi SM co ng hoi tiep

Mot khoi SM co the co nhieu ng song song ma dan en cung mot ng ra,
va hn mot ng trong cac ng nay co the tch cc ong thi. Ngoai ra cung
co the bieu dien bang mot khoi SM noi tiep tng ng. Trong khoi noi tiep
nay co the co mot ng dan noi ghep tch cc duy nhat gia ngo vao va ra. Vi
bat c to hp nao cua cac gia tr vao, cac gia tr ra se giong nh trong dang song
song tng ng.
V d,

(a) Sai (b) ung
Z
1
X
2 X
1
Z
2
1

0
Z
3
0

1

Z
4
1

0

X
3
(a) dang song song

Z
1
X
1
Z
2
X
2
Z
3
X
3
Z
3
(b) dang noi tiep

Co the chuyen mot gian o trang thai cua may tuan t sang lu o SM tng
ng mot cach de dang.
V d, Gian o trang thai

Va lu o SM tng ng

Gian o nh th cho lu o SM

S
0
Z
a
S
1
Z
b
S
2
Z
c
1/0
0/0
1/0
0/Z
1
0/0

1/Z
2
Z
a
X

Z
b
X

Z
c
X

Z
1 Z
2
00
01
11
0 1
0 1
0 1
link 1
link 2
S
0
S
1
S
1
link 3

clock
trang thai
X
S
0
S
1
S
2 S
2
S
0
S
0
Z
a
Z
b
Z
c
Z
1
Z
2
gian o trang thai, co ca 2 gia tr ra Moore va Mealy, lu o SM tng ng
co 3 khoi, mot khoi ng vi mot trang thai. Cac gia tr ra Moore (Z
a
, Z
b
, Z
c
)
c at trong cac hop trang thai, t o chung khong phu thuoc vao gia tr vao.
Cac gia tr ra Mealy (Z
1
, Z
2
) xuat hien trong cac hop xuat theo ieu kien, chung
phu thuoc vao ca trang thai va gia tr vao. Trong v du nay, moi khoi SM ch co
mot hop quyet nh, do o ch phai kiem tra 1 bien vao. oi vi ca hai gian o
trang thai va lu o SM, Z
c
luon bang 1 trong trang thai S
2
. Neu X=0 trong trang
thai S
2
, Z=1 va trang thai ke la S
0
. Neu X=1, Z
2
=1 va trang thai ke la S
2

gian o nh th cho lu o SM, vi chuoi vao X=1,1,1,0,0,0. Tat ca cac thay
oi trang thai xay ra ngay sau canh len cua xung nhp. V cac gia tr Moore phu
thuoc vao trang thai va ch co the thay oi tc thi sau 1 thay oi trang thai hoac
mot thay oi gia tr vao. Noi chung, tat ca cac gia tr ra se co gia tr ung cua
chung canh tch cc cua xung nhp
V d, Lap lu o SM cho bo chia nh phan song song cho cac so nh phan
dng, so b chia (dividend) 6 bit cho so chia (divisor) 3 bit e co c thng 3
bit.
Minh hoa qua trnh chia

Phep chia co the thc hien bang phep toan tr va dch. e xay dng bo chia se
s dung thanh ghi so b chia 7 bit va thanh ghi so chia 3 bit nh sau

Trong qua trnh chia thay v dch so chia sang phai trc moi lan tr, ay se
dch so b chia sang trai. Chu y la can them 1 bit au ben trai thanh ghi so b
x
7
x
6
x
5
x
4
x
3
x
2
x
1
Thanh ghi s b chia
B tr v so
snh
y
3
y
2 y
1
S chia

Aiu
khin
Sh
Su
C (so snh)
clock

V

Ch bo trn trn
start
100010 110
110 101
101
000
1010
110
100
chia e cho khong mat 1 bit khi dch trai so b chia. Thay v dung 1 thanh ghi e
cha thng so, co the a thng so tng bit mot vao au ben phai cua thanh
ghi so b chia khi dch trai so b chia
Neu ban au x
7
x
6
x
5
x
4
y
3
y
2
y
1
(ngha la neu 4 bit trai cua thanh ghi so b chia
vt qua hoac bang so chia) thng so se ln hn 8 va tran tren xay ra. Chu y la
neu
8
y y y
8 x x x x
y y y
0000 x x x x
y y y
x x x x x x x
1 2 3
4 5 6 7
1 2 3
4 5 6 7
1 2 3
1 2 3 4 5 6 7
=
bao tran v thng so ch co 3 bit (toi a bang 7)
Tn hieu dch (Sh = shift) se dch so b chia sang trai mot v tr. Tn hieu tr (Su
= Subtract) se tr so chia cho 4 bit tan cung ben trai cua thanh ghi so b chia va
at bit thng so (bit tan cung ben phai thanh ghi so b chia) len 1. Neu so chia
ln hn 4 bit tan cung ben trai cua so b chia, ngo ra cua bo so sanh la C=0,
ngc lai C=1. Mach ieu khien tao ra chuoi cac tn hieu dch va tr mong
muon. Bat c luc nao C=1, tn hieu tr c tao ra va bit thng so c at len
Gian o trang thai cua mach ieu khien

Ban au so bit chia 6 bit va so chia 3 bit c a vao cac thanh ghi thch hp.
Mach van trang thai dng Stop (S
0
) cho en khi co tn hieu Start. Neu gia tr
ban au cua C=1, thng so se can 4 bit tr len. V khong gian ch cung cap cho
thng so 3 bit, ieu kien nay lam tran tren do o bo chia dng va bo ch tran se
at len 1 bang ngo ra tran tren.
Bnh thng gia tr ban au cua C=0, v vay dch se xay ra au tien va mach se
i vao trang thai S
1
. Roi neu C=1 th xay ra tr. Sau khi hoan tat tr C se luon
luon bang 0 v vay xung nhp ke se tao ra dch. Qua trnh nay tiep tuc cho en
khi xay ra 3 lan dch va ieu khien o trong trang thai S
3
. Roi phep tr cuoi cung
xay ra neu can, va ieu khien quay ve trang thai dng. Vi vd nay se gia s la
khi tn hieu bat au (start) xay ra no se la 1 trong thi gian 1 clock va roi gi la
0 cho en khi he ieu khien quay ve trang thai S
0
. Do o Start se luon la 0 trong
cac trang thai S
1
, S
2
, S
3

S
0
Stop
S
1
S
2
S
3
C.Start/V
Start/0
C/0
C.Start/Sh
C/Su
C/Sh
C/Su
C/Sh
C/Su

T o suy ra lu o SM nh sau

S
0
la trang thai bat au, neu Start=1, tn hieu so sanh C c kiem tra, neu C=1,
thng so ln hn 3 bit, v vay bao tran V=1 c tao ra va khong co s thay oi
xay ra. Neu C=0, Sh=1, xung nhp ke so b chia c dch sang trai va trang
thai chuyen sang S
1
. C c kiem tra trong trang thai S
1
. Neu C=1 co the co
phep tr, Su=1 va khong co s thay oi trang thai. Neu C=0, Sh=1 va so b chia
c dch khi trang thai chuyen sang S
2
. Hoat ong S
2
th giong S
1
. Trong
trang thai S
3
trang thai ke luon la S
0
, va C=1 lam cho phep tr xay ra

V d, Lap lu o Sm cho ieu khien bo nhan song song cho cac so nh phan
dng.
Nhan nh phan ch can phep toan dch va cong. Thay v ban au tao ra tat ca cac
tch bo phan roi cong lai, th moi tch bo phan (partial product) c cong moi
khi c tao ra va do o khong can cong mot lan hn 2 so nh phan
Nhan 2 so 4 bit can 1 thanh ghi so b nhan (multiplicant register) 4bit, mot thanh
ghi so nhan 4 bit va thanh ghi 8bit cho so hang tch. Thanh ghi tch so lam viec
nh thanh ghi tch luy la tch luy tong cac tch bo phan. Thay v dch so b nhan
sang trai trc khi cong, ay se dch thanh ghi tch sang phai
S
0
Start
C
V
0

1

1

0
Sh
S
1
C
Su
0

1

Sh
S
2
C
Su
0
1
Sh
S
3
C
Su
0

1
00
01
10
11
So b nhan
So nhan

1101
1011
Cac tch bo phan 1101
1101
10111
0000
100111
1101
Tch so 10001111
S o khoi cua bo nhan song song

V du, nhan 13 x 11 c lam lai sau ay ch v tr cac bit trong cac thanh ghi
moi thi iem xung nhp

Noi dung ban au cua t.ghi tch
luy (cong so b nhan v M=1)
000001011
1101
M(11)
(13)
Sau khi cong
Sau khi dch phai
Cong so b nhan v M=1
011011011
001101101
1101

M=1
Sau khi cong
Sau khi dch phai
100111101
010011110

M=0
Bo qua cong v M=0
Sau khi dch
cong so b nhan v M=1

001001111
1101

M=1
Sau khi cong
Sau khi dch (ap so)
100011111
010001111

ng cham cham la ng chia gia bo nhan va tch so
Mach ieu khien phai c thiet ke e cho ra chuoi cac tn hieu cong va dch
ung.
Thanh ghi tch luy
Bo cong
So b nhan
ieu
khien
Ad
N

P
C
C
Thanh ghi tch so

So nhan
P
C
Sh
M=1: cong &dch
M=0: dch

Ad: tn hieu cong
Sh: tn hieu dch
P
C
: xung clock
M: bit bo nhan
N: tn hieu start
C: so nh
Gian o trang thai cho ieu khien bo nhan, SV giai thch tng t nh mach chia

Lap lu o SM cho ieu khien bo nhan, ieu khien nay tao ra chuoi cac xung
cong va dch mong muon cua bo nhan nh phan. Bo em se em so lan dch va
xuat K=1 trc khi lan dch cuoi cung xay ra. Lu o SM cho ieu khien bo
nhan tng ng vi gian o trang thai hnh (c)

S
0
S
2
S
6
S
4
S
7
S
1
S
3
S
5
MN/Ad
- /Sh
M/Ad
- /Sh
M/Ad
- /Sh
M/Ad
- /Sh
N/0
MN/Sh
MN/Sh
MN/Sh
MN/Sh
ieu khien
Cong - dch
N
P
C
Ad
Sh
Bo em
K=1 neu n-1 lan dch
S
0
S
0
S
0
MN/Sh
MN/Ad
N/0
M/Ad
- /Sh
M/Sh
(a) ieu khien bo nhan
(b) Gian o trang thai cua
ieu khien cong dch
S
0
S
0
S
0
MN/Sh
MN/Ad
N/0
K/Sh
K/Sh
MK/Sh
(c) Gian o trang thai cuoi
cua ieu khien cong dch
MK/Sh
M/Ad

S
0
N
M
Sh Ad
Sh
K
M
Ad
Sh
M
S
1
S
2
0
1
1 0
1 0
1 0
1 0
4.8. B NH BN DN
Bo nh ban dan chia lam hai loai chnh
Bo nh bang (table memory)
Bo nh ham (function memory)

Vi
RAM = Random Access Memory
ROM = Read Only Memory
PLD = Programmable Logic Device
PLA = Programmable Logic Array
PAL = Programmable Array Logic
LCA = Logic Cell Array
M = Mask programed
P = Programmable
EP = Erasable and Programmable
EEP = Electrically Erasable and Programmable
B nh bng,
Aa ch A c nh ngha trong day 0 A 2
N
1
Vi o rong t cua a ch la N, gia tr cua N phu thuoc vao kch thc cua
bo nh. Co the cat d lieu mot a ch trong 2
N
a ch. o rong t d lieu
la m = 116 bit
Dung lng bo nh K c xac nh bi: K=mxn (bit)
Vi m la o rong t d lieu, n la so a ch
Tnh theo byte (K/8) cho cac o rong t d lieu la 8 hay 16 bit
Bo nh ban dan
Bo nh bang Bo nh ham
RAM ROM
Tnh
ong
MROM
PROM
EPROM
EPROM
PLD
PLA PAL
PPAL
EPPAL
EEPPAL
LCA EPLD PEEL
(Pro.
elec.
erasable
logic
GAL
(generic
array
logic)
V d, Bang cho ROM co N=3bit a ch, m=2 bit d lieu
a ch D lieu Gia tr
thap phan
a
2
a
1
a
0
d
1
d
0

0
1
2
3
4
5
6
7
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
d
01
d
11

d
21
d
31
d
41
d
51
d
61
d
71

d
00
d
10

d
20
d
30
d
40
d
50
d
60
d
70

D
0

D
1
D
2
D
3
D
4
D
5
D
6
D
7

B nh hm
Cha cac ham logic (Boolean) thay v la cac bang. Moi bien cua bang chan
tr co the c bieu dien bang ham logic.
Viet di dang tch chuan th ham logic cua bien d
0
v du tren la
0 2 1 0 00 2 1 10 2 1 0 70
d = a .a .a d +a .a .d +...+a a a d
= m
0
d
00
+ m
1
d
10
++m
7
d
70
(vi m
i
: minterm th i)
neu trong bang co t d
io
= 1 th viec s dung bo nh ham tien li hn bo nh
bang
Cc thit b logic lp trnh c PLD (Programmable Logic device)
PLD la ten goi tong quat cua mot IC so ma ngi ta co the lap trnh c no
e thc hien cac ham logic khac nhau.
V ham logic c bieu dien di dang tong cac tch hay tch cac tong nen
cau truc mach trong PLD thong thng la mot day AND va OR ong dang
(identical cell) ma co the lap trnh tng cong c.
Cac thiet ke dung PLD co cac u iem sau:
Tang kha nang tch hp. co the giam khoi lng ve mach thiet ke trong
khi van co the tang chc nang cho mach
Cong suat thap. CMOS va mot so t hn cac mach ket hp se lam giam
ang ke cong suat nguon cung cap
Tang o tin cay. Nguon cung cap thap va viec giam toi a cac mach lien
ket ngoai lam cho viec truyen gia cac khoi ang tin cay hn
Gia thanh thap.
De s dung.
De dang thay oi. Khi can co s thay oi trong thiet ke, khong can phai
them that cac day noi, tat ca la thay oi ben trong cua PLD va co the
thc hien cac thay oi o mot cach nhanh chong.
4.9. ROM - THIT K H THNG S DNG ROM
4.9.1. ROM
ROM la mot mach to hp co n ngo vao va m ngo ra. Cac ngo vao c goi la
a ch (address input) va thng c at la A
0
A
1
A
n-1
. Cac ngo ra c goi la
cac ngo ra d lieu (data output) va thng pc at ten la D
0
D
1
D
2
D
m-1

Hnh 1-2. Cau truc c ban cua mot ROM 2
n
x m
ROM cha bang chan tr cua mot ham logic to hp n ngo vao, m ngo ra.
V d, bang chan tr cua ham to
hp 3 ngo vao 4 ngo ra va ta co
the cha no trong 1 ROM 2
3
x 4
(8x 4). Bo qua cac tr hoan ve thi
gian, cac ngo ra d lieu cua mot
ROM moi luc la cac bit ra cua
hang trong bang chan tr c
chon bi cac ngo vao a ch

Ch
Co the dung ROM nh bat c phan t logic to hp nao
ROM la bo nh khong boc hi (nonvolatile memory) v noi dung cua no van
gi c ngay ca khi khong cap ien
Van e hoan v cac cot bit trong bang chan tr cua ham can ghi ROM
Khi dung ROM e cha mot bang chan tr cho trc, cac tn hieu input va
output oc t phai sang trai trong bang chan tr thng c gan vao cac ngo
vao a ch va ngo ra data cua ROM vi vi cac nhan theo th t tang dan
V d, Dung ROM e thc hien ham nhan nh phan khong dau cho 2 so nh
phan 4 bit. Neu dung mach ri ta dung cac IC 74284 va 74285, con dung ROM
th s dung ROM 2
8
x 8 (256 x 8) vi ket noi nh hnh 1-5

2
n
x m ROM
A
0
A
1
A
2
A
n-1
D
0
D
1
D
2
D
m-1
address
input
(n ung)
address
output
(m ung)
Input Output
A
2
A
1
A
0
D
3
D
2
D
1
D
0
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
1
1
1
0
0
0
0
1
1
1
0
1
0
0
1
0
1
0
1
1
0
1
0
0
0
1
1
1
1
0
0
0
a ch Tch so
cua 1 x 5

Noi dung ghi ROM tren nh sau (dang file van ban hex)

00:
10:
20:
30:
40:
50:
60:
70:
80:
90:
A0:
B0:
C0:
D0:
E0:
F0:
00
00
00
00
00
00
00
00
00
00
00
00
00
00
00
00
00
01
02
03
04
05
06
07
08
09
0A
0B
0C
0D
0E
0F
00
02
04
06
08
0A
0C
0E
10
12
14
16
18
1A
1C
1E
00
03
06
09
0C
0F
12
15
18
1B
1E
21
24
27
2A
2D
00
04
08
0C
10
14
18
1C
20
24
28
2C
30
34
38
3C
00
05
0A
0F
14
19
1E
23
28
2D
32
37
3C
41
46
4B

4.9.2. Cu trc ni ca ROM
C che s dung ROM e lu tr th thay oi ng vi cac cong nghe cua ROM
khac nhau. Trong phan ln cac ROM, s xuat hien hoac vang mat cua mot
diode hay transistor se phan biet gia 0 va 1
Cu trc vi gii m 1 chiu

256 x 8 ROM
A
0
A
1
A
2
A
7
D
0
D
1
D
2
D
7
Y
(S b nhn)
Tch s
A
3
A
4
A
5
A
6
X
(S nhn)
D
3
D
4
D
5
D
6
S o ROM 8x 4 vi cau truc giai ma 1 chieu (dung 1 bo giai ma TTL va cac
diode).

Moi ng ra bo giai ma c goi la ng t (word line) bi v no chon mot
hang hoac mot t cua bang cha trong ROM
Moi ng thang ng trong hnh c goi la ng bit (bit line) bi v no tng
ng vi mot bit ra cua ROM
Nhn xt: co diode tng ng mc 0, khong co diode tng ng mc 1
Cac MOS ROM thng dung transistor thay v la diode moi v tr ma bit se
c lu tr.
Cu trc vi gii m 2 chiu
Neu xay dng mot ROM 128x1 dung cau truc phan trc phai s dung mot bo
giai ma 7 sang 128, ngha la phai s dung en mot lng ln 128 cac cong
NAND 7 ngo vao, neu thiet ke cho ROM vi hang trieu bits hoac nhieu hn se
khong co bo giai ma 20 sang 1048576. Thay vao o ngi ta se s dung cau truc
khac c goi la giai ma hai chieu (two-dimentional decoding)

D1

A0
A
B
C
G1
G2A
G2B
Y0
Y1
Y2
Y3
Y4
Y5
Y6
Y7
A2
D3
HI
D0
HI
D2
0
A1
V d, ROM 128 x 1

3 bit a ch cao A
6
A
5
A
4
se chon hang, moi hang cha 16 bit bat au tai a ch
A
6
A
5
A
4
0000. Khi at a ch cho ROM, 16bit hang c chon a vao bo MUX va
4 bit a ch thap se chon bit data mong muon.
Ngoai viec giam tnh phc tap viec giai ma, giai ma 2 chieu co mot thuan li khac
la ROM co mot kch thc vat ly gan vuong, ieu nay quan trong cho viec che tao
va ong goi IC
Vi ROM co nhieu ngo ra d lieu, cac day lu tr tng ng vi moi ngo ra d lieu
co the c lam hep hn e at c bo tr chip gan vi hnh vuong hn.
V d, Mot bo tr cua ROM 32K x 8

A
12

A
11

A
10

9 to 512
decoder
A
6

A
7

A
8

A
9

A
13

A
14

512 x 64
array

512 x 64
array

512 x 64
array

512 x 64
array

512 x 64
array

512 x 64
array

512 x 64
array

512 x 64
array

64 to 1
MUX
64 to 1
MUX

64 to 1
MUX

64 to 1
MUX

64 to 1
MUX

64 to 1
MUX

64 to 1
MUX

64 to 1
MUX

A
0

A
1

A
2

A
3

A
4

A
5

A2
A4
A
B
C
G1
G2A
G2B
Y0
Y1
Y2
Y3
Y4
Y5
Y6
Y7
A6
A0
D0
HI
D0
G2
S0 S1 S2 S3
0 1 2 3 4 5 6 7 8 9 101112131415
A1
HI
0
A3
A5
0
4.9.3. Cc kiu ROM thng mi
Bang cac kieu ROM thng mai
Kieu Cong nghe Chu ky oc Chu ky ghi Chu thch
Mask ROM
Mask ROM

PROM

EPROM
EEPROM
NMOS, CMOS
Bipolar

Bipolar

NMOS, CMOS
NMOS
25 500ns
<100ns

<100ns

25-500ns
50-500ns
4 tuan
4 tuan

5 phut

5 phut
10ms/bytes
Ghi 1 lan, cong suat thap
Ghi 1 lan, cong suat cao, mat
o thap
Ghi 1 lan cong suat cao,
khong co mat na
Dung lai c, cong suat thap
Gii han 10000 lan ghi/v tr
Cac ROM thong dung nhat la cac EPROM: 2764, 27128, 27256, va 27512
8K x 8 16K x 8 32K x 8

Chu y: chan V
CC
phai noi vi +5V
chan V
IH
phai noi vi tn hieu logic HIGH hp le
chan V
PP
dung e a vao ien ap lap trnh
4.9.4. Cc ng vo iu khin v nh th ROM
Cac ngo ra cua ROM thng phai c noi vao mot BUS 3 trang thai, o cac
thiet b khac co the lai BUS cac thi iem khac nhau. Do o, phan ln cac
chip ROM thng mai co ngo ra d lieu 3 trang thai va mot ngo vao Output
Enable (OE: cho phep xuat) e cho phep cac ngo ra
Nhieu ng dung ROM ac biet la ng dung lu tr chng trnh se co nhieu
ROM c noi chung vao 1 BUS, moi lan ch co 1 ROM lai BUS. Phan ln cac
ROM co ngo vao chip select (CS: chon chip) e lam n gian viec thiet ke cac
he thong. Ngoai OE con can phai co CS e cho phep ngo ra 3 trang thai
Tuy nhien trong nhieu ROM, CS cung lam viec nh ngo vao cat nguon cap ien
(power down input), CS mc khong tch cc th khong cap nguon cho cac
decoder noi, cac driver va cac MUX cua ROM. che o ch nay (standby
mode) 1 ROM tieu thu t hn 10% cong suat so vi che o hoat ong (active
mode).
2764
10
9
8
7
6
5
4
3
25
24
21
23
2
20
22
27
1
11
12
13
15
16
17
18
19
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
CE
OE
PGM
VPP
O0
O1
O2
O3
O4
O5
O6
O7
27128
10
9
8
7
6
5
4
3
25
24
21
23
2
26
20
22
27
1
11
12
13
15
16
17
18
19
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
CE
OE
PGM
VPP
O0
O1
O2
O3
O4
O5
O6
O7
27256
10
9
8
7
6
5
4
3
25
24
21
23
2
26
27
20
22
1
11
12
13
15
16
17
18
19
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
CE
OE
VPP
O0
O1
O2
O3
O4
O5
O6
O7
Hnh sau ch cac ngo vao CS va OE c s dung nh the nao ben trong mot
ROM tieu bieu

4.9.5. Thit k h tun t dng ROM
Co the thiet ke de dang mot he tuan t dung ROM ket hp vi cac FF.
Mo hnh tong quat cua he tuan t dung ROM va cac D-FF co xung nhp

Phan to hp cua he tuan t co the dung ROM e thc hien cac ham ra (Z
1
, Z
2
, ,
Z
n
) va cac ham trang thai ke (Q
1
+
, Q
2
+
, , Q
k
+
).
Trang thai cua he c cha trong mot thanh ghi (tao bang cac D-FF) va a
hoi tiep ve ngo vao cua ROM.

row
decoder

Power on

Storage Array

Power on
Power on

colum MUX
A
0
A
1
A
m-1
A
m
A
m+1
A
n-1
CS

OE

Q1
Z
2
ROM
X
1
X
2
X
m
Q
1
Q
2
Q
k
Z
1
Z
n
CK
Q2
D2
CK
Qk
Dk
CK
Clock
+
1
Q
+
2
Q
+
k
Q
D1
Nh vay he tuan t vi m input, n output va k bien trang thai co the c cai
at bang k D-FF va ROM vi (m+k) ngo vao (ngha la 2
m+k
t word) va (n+k)
output
Thng dung D FF hn JK FF v s dung cac FF vi 2 ngo vao se can phai tang
so ngo ra ROM.
V d, Thiet ke mach chuyen oi ma BCD sang ma qua 3, ngo vao va ra la noi
tiep vi LSB i trc
input (BCD) X Output (excess 3) Y
t
3

t
2
t
1
t
0
t
3
t
2
t
1
t
0
0
0
0
0
0
0
0
0
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
0
0
1
1
0
0
0
1
0
1
0
1
0
1
0
1
0
0
0
0
0
1
1
1
1
1
0
1
1
1
1
0
0
0
0
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
0
Bang tren liet ke cac input va output mong muon tai cac thi iem t
0
, t
1
, t
2
va t
3
Trc het thanh lap bang trang thai, sau o rut gon bang bang cach so cac hang
giong nhau th gom lai. Khi so cac hang co cha dau gach ngang (ay la trng
hp dont care th dau gach ngang se khp vi bat c trang thai nao hoac bat
c gia tr ra nao. Bang cach so khp cac hang theo cach nay, ta co H I J K
L va M N P, sau khi kh I, J, K, L N va P thay rang E F G va bang c
thu gon thanh 7 hang sau
Thi gian Chui vo
nhn uoc
Trang
thi hin
tai
Trang thi
k
X = 0 X=1
Gi trj ra hin
tai (Z)
X=0 X=1
t
0
reset A B C 1 0
t
1
0
1
B
C
D
E
F
G
1
0
0
1
t
2
00
01
10
11
D
E
F
G
H
I
J
K
L
M
N
P
0
1
1
1
1
0
0
0
t
3
000
001
010
011
100
101
110
111
H
I
J
K
L
M
N
P
A
A
A
A
A
A
A
A
A
A
-
-
-
-
-
-
0
0
0
0
0
1
1
1
1
1
-
-
-
-
-
-
Bang trang thai c rut gon cua bo chuyen oi ma
Thi gian Trng
thi hin
ti
Trng thi
k
X = 0 X=1
Gi tr ra hin
ti (Z)
X=0 X=1
t
0
A B C 1 0
t
1
B
C
D
E
F
G
1
0
0
1
t
2
D
E
H
H
H
M
0
1
1
0
t
3
H
M
A
A
A
-
0
1
1
-
Co the dung mot cach khac e suy ra bang tren bang cach bat au bang gian o
trang thai.
Gian o trang thai co dang hnh cay. Moi ng bat au trang thai reset bieu
dien mot trong 10 chuoi vao co the co

Bang gan trang thai va bang chuyen trang thai
Thi
gian
Trang thai
hien tai
Q
1
Q
2
Q
3
Q
1
+
Q
2
+
Q
3
+

X=0 X=1
Z
0 1
t
0
A 000 010 011 1 0
t
1
B
C
010
011
101
100
100
100
1
0
0
1
t
2
D
E
101
100
111
111
111
110
0
1
1
0
t
3
H
M
111
110
000
000
000
---
0
1
1
---

A
B C
D F E G
H L J N I M K
P
0/1
t
0
t
1
0/1
1/0
0/0 1/1 0/1 1/0
0/1 1/0
0/1 1/0
1/1 0/0
1/0
Reset
t
2
t
3
0/0 1/1
0/0 0/0 0/1 0/0 1/1 0/1 0/0 0/1
Cai at bo chuyen oi ma nay dung ROM va cac D-FF. V co 7 trang thai nen
can 3 DFF. Nh vay can ROM co 4 input (2
4
word) va 4 output . Dung gan nh
phan trc tiep, xay dng bang chuyen trang thai cho trang thai ke cua cac D-FF
nh la ham cua trang thai hien tai va input.
V ang s dung cac D FF, D
1
= Q
1
+
, D
2
=Q
2
+
, D
3
=Q
3
+
. bang chan tr cho ROM
xay dng c de dang t bang chuyen trang thai. Nh vay cac output cua ROM
(Z, D
1
, D
2
, D
3
) la cac ham cua cac input cua ROM (X, Q
1
, Q
2
, Q
3
)

(a) Bang trang thai (b) bang chuyen trang thai
T. thai
h.tai
T. thai ke
X=0 X=1
G.tr ra h.tai Z
X=0 X=1
Q
1
Q
2
Q
3
Q
1
+
Q
2
+
Q
3
+

X=0 X=1
Z
X=0 X=1
A B C 1 0 A 000 001 010 1 0
B
C
D
E
E
E
1
0
0
1
B
C
001
010
011
100
100
100
1
0
0
1
D
E
H
H
H
M
0
1
1
0
D
E
011
100
101
101
101
110
0
1
1
0
H
M
A
A
A
---
0
1
1
---
H
M
101
110
000
000
000
---
0
1
1
---

Bang chan tr cho ROM

X Q
1
Q
2
Q
3
Z D
1
(Q
1
+
) D
2
(Q
2
+
) D
3
(Q
3
+
)
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
1
1
0
0
1
0
1
x
0
0
1
1
0
1
x
x
0
0
1
1
1
0
0
x
0
1
1
1
1
0
x
x
0
1
0
0
0
0
0
x
1
0
0
0
1
0
x
x
1
1
0
1
1
0
0
x
0
0
0
1
0
0
x
x

Cai at mang tuan t dung ROM

4.10. PLD t hp (Combinational PLD)
5.3.1. Dy logic lp trnh c (PLA)
PLA thc hien cung chc nang c ban nh ROM. Mot PLA vi n input va m
output co the cai at m ham cua n bien. To chc noi cua PLA th khac vi to
chc not cua ROM
Cau truc PLA (PLA nxm vi p so hang tch)

V d, To chc noi cua PLA 4x3 vi 6 so hang tch

+
3
Q
+
2
Q
+
1
Q
Q1
ROM
16 words
x 4 bit
X
1
Q
1
Q
2
Q
3
Z

D1
CK
Q2
D2
CK
Q3
Dk
CK
Clock

Dy
AND

Dy
OR
n
input
p ung word
(s hang tch)
m ung ra
Dy AND
Dy OR
Cc
ung
Word
Output
F1
c d
b'c
bc
abd
a
a'bd
ab'c'
F3
c
b
F2
Vi ky hieu

Bang PLA cho PLA tren
a b c d F
1
F
2
F
3
0
1
1
-
-
-
1
1
0
0
-
1
-
-
0
1
1
1
1
1
-
-
-
-
1
1
1
1
0
0
1
0
0
0
1
0
0
1
1
0
0
1
Moi hang trong bang bieu dien mot so hang tch tong quat.
C hai loi PLA:
PLA lap trnh mat na (Mask programmable): c lap trnh luc che tao
(tng t PROM)
PLA lap trnh trng (field programmable) co cac noi ket cau ch (fusible
link) co the lam t e lu tr cac mau trong cac day AND va OR.
Ch . Khi so bien vao nho, th tong quat la ROM kinh te hn dung PLA. Tuy
nhien khi so bien vao ln, PLA thng cho giai phap kinh te hn ROM
5.3.2. Logic dy lp trnh c PAL (Programmable Array Logic)
PAL la trng hp ac biet cua PLA, trong o cac day AND lap trnh c va
day OR la co nh. Cau truc c ban cua PAL th giong nh PLA
Mot oan PAL
a'
a'bd
d
b
a'
a'bd
b d
F3
a'bd
c
a'bd
c
ab'c'
ab'c'
bc
bc
F3
V ch co day AND la lap trnh c, do o PAL kinh te hn PLA. Cac nha thiet
ke logic thng s dung cac PAL e thay the cac cong logic khi phai cai at
nhieu ham
Phan ln cac nha san xuat PAL ch ra thiet ke noi cua PAL ky hieu cua no
V d
PAL 16 L 8 B 4
`so input tieu tan cong suat 1/4w
Cau truc ra toc o
So output
Vi cau truc ra
H = High ngo ra tac ong mc cao
L = Low ngo ra tac ong mc thap
C = Complement ngo ra co ca hai ng tac ong mc cao va thap
Toc o:
khoang trang toc o chuan
A= toc o cao
B=toc o rat cao
D=toc o cc cao
Tieu tan cong suat
blank = full
-2 =
-4 =
V d, ky hieu logic truyen thong cho PAL 16L8

chan 10, 20 cho nguon va at
Xem them s o logic cua PAL 14L4 va PAL 1246 cac trang 240, 241 trong
Fundamentals of logic design cua Roth

PAL16L8
1
2
3
4
5
6
7
8
9
11
19
18
17
16
15
14
13
12
I1
I2
I3
I4
I5
I6
I7
I8
I9
I10
O1
O2
O3
O4
O5
O6
O7
O8
Khi thit k vi PAL phai n gian hoa cac phng trnh logic va co a
chung khp vao mot (hoac nhieu) cac PAL. Khong giong nh cac PLA (tong
quat hn) cac so hang AND khong the chia se cho 2 hay nhieu cong OR, vi
mot kieu PAL cho trc, so so hang AND a vao moi cong OR la co nh va b
gii han. Neu so so hang AND trong ham c n gian la qua ln th ta co the
chon PAL co nhieu ngo vao va t output hn
V d, dung PAL thiet ke mach oi mot so nh phan 4 bit sang so HEX va xuat
ma ASCII 7 bit cho so hex
Input m ASCII cho s m hex
W X Y Z
s
hex A
6
A
5
A
4
A
3
A
2
A
1
A
0
0
0
.
.
1
1
.
.
1
0
0

0
0

1
0
0

0
1

1
0
1

1
0

1
0
1

9
A

F
0
0

0
1

1
1
1

1
0

0
1
1

1
0

0
0
0

1
0

0
0
0

0
0

1
0
0

0
0

1
0
1

1
1

0

Ch :
V A
5
= A
4
va A
6
=
4
A nen ch can dung PAL tao ra 5 ham cua 4 bien
e viet c bang PAL phai rut gon cac ham ra va ket qua nh sau

4 4
3 3
A =W+X.Y A =WX+WY
A =WX.Y A =W+X+Y

2 2
1
A =WX+XZ+XY A =X+WY.Z
A =WX.Y.Z+YZ+WY

0
A =WZ+X.YZ+WXZ+WYZ
Sau o tm cac PAL thch hp e cai at cac ham tren. Chon c PAL12H6, co
mot output khong dung. Co the viet lai chng trnh cho A
2
nh sau

PAL
W
X
Y
Z
A
0
A
1
A
2
A
3
A
4
A
5
A
6
B

2
A =WX+(XZ+XY)=WX+B vi B=XZ+XY
roi co the s dung ngo ra them e tao ra B va noi B vao mot trong cac ngo vao
PAL nh hnh tren. Vi cach nay ta the tao ra 5 ham vi mot PAL
Xem them cac v du trong chng 8 cua Digital desgn principle and practices
cua John F. Wakerly
5.3.3. Thit k h tun t dng PLA
Co the cai at cac he tuan t dung PLA va cac FF theo cach tng t nh dung
ROM va cac FF. Tuy nhien trong trng hp cac PLA, s gan trang thai la quan
trong v viec s dung cac phep gan tot co the giam c so cac so hang tch can
co va t o giam c kch thc cua PLA
V d, cai at bang trang thai cua VD thiet ke dung ROM nhng bay gi dung 1
PLA 3 DFF.
T. thai h.tai T. thai ke
X=0 X=1
G.tr ra h.tai Z
X=0 X=1
A B C 1 0
B
C
D
E
E
E
1
0
0
1
D
E
H
H
H
M
0
1
1
0
H
M
A
A
A
---
0
1
1
---
Cau hnh mach th giong nh dung ROM ngoai tr thay the ROM bang mot PLA
vi kch thng thch hp.
S dung phep gan nh phan trc tiep dan en bang chan tr sau
X Q
1
Q
2
Q
3
Z D
1
(Q
1
+
) D
2
(Q
2
+
) D
3
(Q
3
+
)
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
1
1
0
0
1
0
1
x
0
0
1
1
0
1
x
x
0
0
1
1
1
0
0
x
0
1
1
1
1
0
x
x
0
1
0
0
0
0
0
x
1
0
0
0
1
0
x
x
1
1
0
1
1
0
0
x
0
0
0
1
0
0
x
x

Co the cha bang nay trong mot PLA 4 input, 13 so hang tch va 4 output nhng
thay rang no se khong thuan li hn viec dung ROM a lam phan trc.
Neu s dung phep gan trang thai, phng trnh ra va phng trnh vao cac D-FF

2 1 2 1 1
Q Q Q Q D + =
2 2
Q D =
3 2 1 2 1 2 1 3 2 3
Q Q . Q . X Q . Q X Q Q X Q . Q D + + + =
3 3
XQ Q X Z + =
Bang PLA tng ng vi cac phng trnh nay nh sau.
X Q
1
Q
2
Q
3
Z D
1
(Q
1
+
) D
2
(Q
2
+
) D
3
(Q
3
+
)
-
-
-
-
0
1
0
0
1
1
0
-
-
1
0
0
-
-
0
1
0
0
0
0
1
-
-
-
-
-
1
-
-
0
0
1
0
0
0
0
0
0
0
1
1
1
1
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
1
1
1
1
0
0
e cai at bang nay can 1 PLA co 4 input, 9 so hang tch va 4 output.
5.3.4. Thit k h tun t dng PAL
Dung cac PAL to hp, cach thiet ke tng t nh vi PLA nhng phai chu y rut
gon ham ra
4.11. PLD tun t (sequential PLD = PLA(PAL)+cc FF)
Phan ln cac thiet ke so can cac FF, cac PLD co cha cac FF nh vay thng
c goi la PLD co thanh ghi (registered PLD) hay PLD tuan t.
Mot oan cua PAL tuan t.

D-FF c lai t mot cong OR. Ngo ra FF c a hoi tiep ve day AND lap
trnh c qua mot bo em. Nh vay cac ngo vao cong AND co the c noi
vao A, A,,Q hay Q. Cac phng trnh trang thai ke
A A B B Q Q
A
B
D Q
Q
EN
Q
clock
B m
ra o 3
t.thi
Q B A Q B A D Q + = =
+

Ngo ra FF c noi vao bo em ao 3 trang thai, cho phep khi EN=1
ac tnh cua mot so PAL tuan t thong dung. Moi PAL cha 1 thanh ghi co t 4
en 10 D-FF. 6 PAL au trong bang tng t vi 16R4 (co 1 day cong AND vi
16 input va 4 D-FF)
Kieu So ngo vao
(trc tiep+hoi tiep + cac IO)
So ngo ra
(FF + IO)
So cac cong AND
tren cong OR
16R4
16R6
16R8
20R4
20R6
20R8
20X4
20X8
20X10
8+4+4
8+6+2
8+8+0
12+4+4
12+6+2
12+8+0
10+4+6
10+8+2
10+10+0
4+4
6+2
8+0
4+4
6+2
8+0
4+6
8+2
10+0
8
8
8
8
8
8
3/2*
3/2*
-/2
Ghi chu: * 3 vi cac ngo ra to hp, 2 cho cac ngo vao D FF
3 PAL cuoi trong bang ch cac XOR PAL. XOR PAL co mot cong XOR lai
moi ngo vao D FF nh sau

Trong PAL nay, moi cong XOR c lai bang hai cong OR, va moi cong OR
c lai bang 2 cong AND, cac ngo ra FF co the c hoi tiep ve cac cong AND
nh trong cac PAL co thanh ghi khac.
Dang tong quat cua phng trnh trang thai ke cho moi FF trong XOR PAL la
) P P ( ) P P ( D Q
4 3 2 1
+ + = =
+

Vi P
1
P
2
P
3
P
4
la cac so hang tch
e minh hoa viec s dung cac XOR PAL, thiet ke mot bo em nh phan 4 bit
(em len, em xuong) vi 3 ngo vao ieu khien U(up), D(down) va L (load).
Khi U=1 bo em tang them 1, khi D = 1 bo em giam 1, va khi L =1, bo em
nap d lieu song song t cac ngo vao d lieu cua no (D
I
)
Bang cac trang thai ke cua bo em cho U=1 va cho D=1, gia s rang U=D=1
khong xay ra

D Q
Q
EN
Q
clock

U=1 D=1
Q
3
Q
2
Q
1
Q
0
Q
3
+
Q
2
+
Q
1
+
Q
0
+
Q
3
+
Q
2
+
Q
1
+
Q
0
+
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
Trc het, suy ra cac phng trnh trang thai ke cho bo em len.
Trong moi hang Q
0
khac Q
0
+
v vay FF Q
0
phai thay oi trang thai moi xung
nhp khi U=1 v le o
Q
0
+
= Q
0
U
Nhan thay Q
1
thay oi (Q
1
Q
1
+
) ch neu Q
0
=1. v the
Q
1
+
= Q
1
UQ
0

Q
2
thay oi trong cac hang 3, 7, 11 va 15 ch khi Q
1
= Q
0
= 1 v the
Q
2
+
= Q
2
UQ
1
Q
0

Q
3
thay oi trang thai ch trong nhng hang ma Q
2
=Q
1
=Q
0
=1, v the
Q
3
+
= Q
3
UQ
2
Q
1
Q
0

Tng t, bang cach quan sat bang, co the suy ra cac phng trnh cho bo em
xuong khi D=1
Q
0
+
= Q
0
D
Q
1
+
= Q
1
D
0
Q
Q
2
+
= Q
2
D
1 0
Q . Q
Q
3
+
= Q
3
D
2 1 0
Q . Q . Q
Tong quat e s dung XOR PAL, phai bieu dien trang thai ke cua Q
i
dang
Q
i
+
= Q
i
F
i

Cac F
i
c tm bang phng phap quan sat hoac rut gon bang bang Karnaugh
Tiep tuc thiet ke bo em len xuong vi ngo vao ieu khien U, D, L.
Trc het xet trng hp khi U=D=0. Khi L=1, bo em c nap song song t
cac ngo vao d lieu cua no (D
I
), va khi L=0 trang thai bo em gi khong oi.
Da vao tnh chat ham Boolean
f(x
1
, x
2
,, x
n
) = x
1
f(1, x
2
, ,x
n
) +
1
x f(0,x
2
,,x
n
)
Nh vay phng trnh trang thai ke cho moi FF la
Q
i
+
= LD
i
+LD
I

Ket hp cac phng trnh khi xet ca U, D, L. Gia s L=1 anh hng len ca U=1
hay D=1 va U=D=1 khong bao gi xay ra.
Neu bat au bang phng trnh
Q
0
+
= Q
0
U
thay Q
0
+
bang LD
0
+LQ
0
va thay U bang U+D, c
Q
0
+
= (LD
0
+LQ
0
) (U+D).
Phng trnh nay cho ket qua ung khi L=0 va U hoac D la 1. e am bao L=1
anh hng u tien hn em len em xuong, ta phai nhan U va D cho L, cac
phng trnh sau con lai cung lam tng t, ta co
Q
0
+
= (LD
0
+LQ
0
) (UL+DL)
Q
1
+
= (LD
1
+LQ
1
) (ULQ
0
+ DLQ
0
)
Q
2
+
= (LD
2
+LQ
2
) (ULQ
0
Q
1
+ DLQ
0
Q
1
)
Q
3
+
= (LD
3
+LQ
3
) (ULQ
0
Q
1
Q
2
+ DLQ
0
Q
1
Q
2
)
Khi L=D=0, cac phng trnh nay rut gon trng hp ch em len, va khi L=U=0
cac phng trnh nay rut gon ve trng hp em xuong
Cac dang phng trnh tong hp tren thch hp e cai at bang XOR PAL

4.12. Cc PLD tun t khc
Khi cong nghe IC a c cai tien, nhieu loai PLD khac ra i, cac PLD mi
da tren nhng m rong cua khai niem PAL hoac da tren cac day cong
22V10 la 1 PLD rat linh hoat ma co the dung no e cai at cac mang to hp va
tuan t. 22V10 co 12 chan danh rieng cho ngo vao va 10 chan co the lap trnh
hoac lam ngo vao hoac ngo ra. Cha 10 D-FF, 10 cong OR, so cong AND a
vao moi cong OR t 8 en 16. Moi cong OR lai mot logic macrocell, moi
macrocell cha 1 D-FF, cac FF co cung clock, mot ngo vao reset bat ong bo
chung (AR= Asynchronuos Reset) va mot ngo vao at trc ong bo chung (SP=
synchronuos Preset)

S o khoi cua 22V10

Chi tiet cua mot macrocell xuat cua 22V10.

S
1
S
0
S
V
CC
V
CC
F
0
F
1
Cac ket noi en cac chan ra co the ieu khien c bang cach lap trnh
macrocell nay. Cac ngo va ieu khien MUX xuat S
1
S
0
chon mot trong cac ngo
vao d lieu.
V d,
S
1
S
0
=10 chon ngo vao d lieu 2. Khi cau ch F
1
h (S
1
=1), FF b bo qua va ngo
ra t cong OR. Ngo ra cong OR cung c hoi tiep ve e co the dung nh mot
ngo vao cua day cong AND
Neu F
1
con nguyen (S
1
=0), th ngo ra FF c noi vao chan ngo ra va no cung
c hoi tiep ve e co the dung no lam ngo vao cong AND. Khi cau ch F
o
h
(S
0
=1), ngo ra khong b ao e no tac ong mc cao.
Khi F
0
con nguyen (S
0
=0), ngo ra b ao nen no tac ong mc thap. Chan ngo ra
c lai bang bo em ao 3 trang thai. Khi ngo ra bo em trang thai tong tr
cao, cong OR va FF khong noi vi chan ngo ra (xuat) va chan nay co the dung
lam ngo vao
V d, Dung 22V10 thiet ke bo ieu khien en giao thong cho giao lo cua
ng A va ng B. Moi ng co cac cam bien e phat hien s xuat hien xe
co en gan hoac dng giao lo.
Sa = 1 ngha la xe ang tien en ng A
Sb = 1 ngha la xe ang tien en ng B
A la ng chnh va se co en xanh cho en khi co mot xe chay en B, roi en
thay oi va B co en xanh. Va het 50giay cac en se thay oi ve nh cu tr khi
co mot xe tren ng B va khong co xe A, trng hp nay chu ky B c m
rong them 10s. Khi A xanh no gi xanh toi thieu 60 giay va roi cac en thay oi
ch khi xe tien en B. Cac noi ket ben ngoai cua bo ieu khien

Gian o trang thai cho bo ieu khien. Cho muc ch nh th, mang tuan t c
lai bang 1 clock co chu ky 10giay. Nh vay s thay oi trang thai co the xay ra
hau nh 10giay. e n gian hoa gian o. Ta dung ky hieu sau: GaRb trong
mot trang thai co ngha la Ga=Rb=1 va tat ca cac bien ra khac la 0, SaSb
cung mot cung ngha la Sa=0 va Sb=1 se gay ra chuyen trang thai theo cung o.
Mot cung khong co nhan ham y rang chuyen trang thai se xay ra khi co clock
xay ra, oc lap vi cac bien vao. Nh vay en A xanh se sang trong 6 chu ky
clock va oi trang thai sang vang neu co 1 xe ang i ng B

PAL 22V10
Clock
Sa Sb
Ga Ya Ra Gb Yb Rb

Bang trang thai cua bo ieu khien.
SaSb Bien ra
00 01 10 11 Ga Ya Ra Gb Yb Rb
S0
S1
S2
S3
S4
S5
S1
S2
S3
S4
S5
S5
S1
S2
S3
S4
S5
S6
S1
S2
S3
S4
S5
S5
S1
S2
S3
S4
S5
S6
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
S6
S7
S8
S9
S10
S11
S12
S7
S8
S9
S10
S11
S12
S0
S7
S8
S9
S10
S11
S11
S0
S7
S8
S9
S10
S11
S12
S0
S7
S8
S9
S10
S11
S12
S0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
1
1
1
1
1
1
0
1
1
1
1
1
0
0
0
0
0
0
0
1
1
0
0
0
0
0
0
Cai at bang tren dung 4 D-FF vi cac ngo vao D
1
, D
2
, D
3
, D
4
va cac ngo ra Q
1
,
Q
2
, Q
3
, Q
4
. Bang phep gan trang thai nh phan trc tiep, suy ra cac phng trnh
D
1
=Q
1
Q
2
+Q
2
Q
3
Q
4

D
2
=Q
1

Q
2
Q
3
Q
4
+ SaQ
1
Q
3
Q
4
+ SbQ
1
Q
3
Q
4
+ Q
1
Q
2
Q
4
+ Q
1
Q
2
Q
3

D
3
= Q
3
Q
4
+ SbQ
3

Q
4
+ SaQ
3

Q
4
+ Q
2
Q
3

Q
4
+ SaSbQ
1
Q
4

D
4
= SaSbQ
1
Q
3
+ Q
2

Q
4
+ Q
1

Q
4
+ SaSbQ
2
Q
3

Q
4

13 trang thai co 4 bit ma hoa trang thai Q
3
Q
2
Q
1
Q
0

Ga = Q
1
Q
3
+ Q
1
Q
2
Ya = Q
2
Q
3
Q
4
Ra= Q
1
+ Q
2
Q
3
Q
4

S0
GaRb
S1
GaRb
S2
GaRb
S3
GaRb
S4
GaRb
S5
GaRb
Sb
S6
YaRb
Sb
S7
RaGb
S8
RaGb
S9
RaGb
S10
RaGb
S11
RaGb
S6
YaRb
(Sa+Sb)
SaSb
10s
10s
10s
10s
10s
Gb = Q
1
Q
2
+ Q
2
Q
3
Q
4
Yb = Q
1
Q
2
Rb=Q
1
Q
2
+Q
1
Q
4
+Q
1
'Q
3

V tat ca phng trnh nay co t hn 8 so hang AND, 22V10 la phu hp. Neu 1
so phng trnh co qua nhieu so hang khong khp cho 22V10 th se can th cac
phep gan trang thai khac
Neu cai at bo ieu khien dung JK FF va cac cong, 4FF va 34 cong se can
cho gan trang thai nh phan trc tiep.
Q
3
Q
2
Q
1
Q
0
= trang thai
6 bien vao SaSb Q
3
Q
2
Q
1
Q
0

Theo tnh chat ham Boolean:
f(x
1
, x
2
, x
3
, , x
n
) =
2 1
x . x f(0,0, x
3
, ,x
n
) +
1
x x
2
f(0,1,x
3
,,x
n
) +
x
1
2
x f(1,0,x
3
,,x
n
)+ x
1
x
2
f(1,1,x
3
,,x
n
)
=> Ga = SaSbF
00
+ SaSbF
01
+ SaSbF
10
+ SaSbF
11

Cac FF va cac cong nay can khoang 11 IC loai SSI, so vi giai phap 22V10 th
tiet kiem nang lng va tin cay hn
4.13. Dy cng lp trnh c (PGA)
Cac PLD co kha nang dung e cai at mot he tuan t nhng khong phai la mot
he thong so ay u. Cac PGA (programmable gate Array) linh ong hn va co
the c s dung e cai at mot he thong so nho tren mot chip IC.
Mot PGA tieu bieu la mot IC cha mot day cac logic cell ong dang vi cac lien
ket noi lap trnh c. Ngi s dung co the lap tnh cac ham c cai at bang
moi logic cell va cac ket noi gia cac cell

Configurable logic block khoi IO
Vung lien ket noi
V du, Hnh tren la mot phan cua cau truc Xilinx XC2064 LCA (logic cell array)
gom mot day noi 64 khoi logic co the at cau hnh c CLB (configurable logic
block), xung quanh la mot vong 58 khoi giaoo tiep nhap xuat. Cac lien ket gia
cac khoi nay co the lap trnh c bang cach cha d lieu trong cac o nh RAM
noi. Moi CLB cha mot logic to hp va 1 D-FF va co the lap trnh c e thc
hien nhieu ham logic
Cau truc cua mot CLB

Cac khoi hnh thang trong s o bieu dien cac bo don kenh (MUX) co the lap
trnh c e chon mot trong cac ngo vao. V du: ngo vao thap nhat khoi logic
to hp co the en t D hay Q va ngo ra Q co the en t F, G hay Q. Khoi logic
to hp cha cac te bao nh RAM va co the c lap trnh e cai at mot ham 4

Khi
logic t
hp
*
*
*
*
D
CK
R
S
*
*
Q
Y(Q)
A
preset
B
C
D clear
K
J
G
F
clock

Hm 4
bin bt
k
Q
A
B
C
D
F
G
La chn mt hm 4 bin

Hm 3
bin bt
k
Q
A
B
C
D
F

Hm 3
bin bt
k
Q
A
B
C
D
G
La chn hai hm 3 bin
bien bat ky hoac 2 ham 3 bien bat ky (hnh 1-29. V du co the at F=G=f
1
(A, B,
C, Q) hay F=f
2
(A, B,) va G =f
3
(B, C, Q). Cac ng t net ch cac ket noi can
e at cau hnh logic cell la mot JK-FF vi cac ngo vao preset va clear.
Logic to hp co cac ngo vao J,K va Q va cai at trang thai ke cho FF, F=Q
+
=
JQ + KQ. Ngoai ra cai at G=Q e cung cap mot ngo ra bu cho FF. Cac tn
hieu Preset va Clear c dan trc tiep ti S (asynchronuos set) va R
(asynchronuos reset) cua D-FF

Bi tp chng 4

4.1. Gi s ban u Q = 0, ua X, Y n ng vo SET, RESET ca 1 RS-FF dng
NAND, xc jnh dang sng Q v Q

4.2. Gi s ban u Q= 0, o dang sng ng vo X, Y bi 4.1, s dung RS-FF
dng cng NOR, xc jnh dang sng Q v Q .
4.3. Dang sng bi 4.1 uoc kt ni vi mach hnh sau. Gi s rng ban u
Q=0, xc jnh dang sng Q.

4.4. Mt clocked FF cu th c t
S
= 20ns v t
H
= 5ns. Mt bao lu cc ng vo
iu khin n jnh truc khi xy ra su chuyn i xung CK. .
4.5. Mt Toggle FF l 1 FF c 1 ng vo on v hoat ng sao cho trang thi ng
ra thay i mi khi c xung ua n ng vo. clocked SR-FF c th uoc ni
hoat ng trong ch ny (hnh) . Dang sng ua n ng vo CLK l
sng vung 1KH. Xc jnh dang sng ng ra Q, gi s ban u Q = 0

4.6.a. Hy trnh by lm th no J-K FF c th hoat ng nhu 1 toggle FF.
ua sng vung 10kHz n ng vo v xc jnh dang sng ng ra.
b.Ni ng ra Q ca FF phn a n ng vo J-K FF th 2 (J
2
=K
2
=1). Xc jnh
tn s dang sng tai ng ra Q ca FF th 2.
4.7. Xung CK uoc ua n 2 FF khc nhau: (a) J-K FF kch bng canh ln; (b) J-
K FF kch bng canh xung. Hy v dang sng ng ra Q cho mi FF trn, gi
s ban u Q = 0.

X
Y
Z
Z
X
Y
S
R
Q
Q
S
R
Q
Q
CLK
1 KHz

4.8. Mt D-FF uoc dng lm mach tao tr sao cho thng tin xut hin ng
ra tr mt thi gian sau khi n xut hin tai ng vo D.
a/ Xc jnh dang sng Q hnh sau v so snh vi dang sng ng vo.

b/ Lm th no c th delay thi gian 2 clock?
4.9. Mt D-FF uoc ni nhu hnh sau. Gi s ban u Q = 0 , xc jnh dang sng
Q.

4.10. Xc jnh dang sng Q cho FF hnh sau. Gi s ban u Q = 0

4.11. Ban u ng vo A, B, C trong mach in u mc LOW. Gi s ng ra Y
mc HIGH chi khi A, B, C mc HIGH trong 1 trnh tu nht jnh.
a/ Xc jnh trnh tu lm Y mc HIGH
b/ Gii thch tai sao xung START l cn thit.
c/ bin i mach ny dng D-FF.
1 2 3 4 5 6 7 8 9 10 11
Clock
J input
K input
Data
Input
1
0
1
0
Ck
D
CK
Q
Data
Input
Q
D
CK
Q
Q
1KHz
Pr
J
CK
K
CLR
Q
Q
1
1
CLR
1
0
1
0
CK
Pr
1
0

4.12. Hy v mach logic truyn song song d liu ng b t 1 thanh ghi 3 bit
sang thanh ghi khc dng FF J- K.
4.13. lm lai bi 4.12 khi truyn song song bt ng b.
4.14. Thit k mach m ln MOD 6 dng T-FF c xung tc ng canh ln, Pr va`
CLR tch cuc mc cao
4.15. Thit k mach m ln MOD 10 dng D-FF c xung tc ng canh ln, Pr
va` CLR tch cuc mc cao
4.16. Thuc hin mach m MOD 60 t bi 4.14 v 4.15
4.17. Hy v luu chuyn i trang thi ca mach m xung MOD 6 dng xung
CK tc ng canh ln v so snh vi so m xung dng xung CK tc ng
canh xung. Chng khc nhau nhu th no?
4.18. a/ xy dung 1 mach m nhj phn m t 0 n 1023 th phi s dung
bao nhiu FF?
b/ xc jnh tn s tai ng ra ca FF cui cng ca mach m ny khi tn s
xung clock ng vo l 2 Mhz.
c/ S MOD ca mach m l bao nhiu?.
d/ Nu ban u mach m m l 0 th sau 2060 xung s m uoc l bao
nhiu?.
4.19. Mt mach m c tn hiu clock l 256 KHz , tn s ng ra FF cui cng l
2KHz
a/ Hy xc jnh s MOD.
b/ Hy xc jnh pham vi m.
4.20. 1 mach tch sng quang uoc s dung tao 1 xung mi khi c 1 khch
hng i vo. Cc xung ny uoc ua n b m 8 bit. B m ny dng m
s luong khch hng i vo trong ca hng. Sau khi ca hng ng ca, ngui
ch ca hng kim tra mach m v thy rng n chi mt s m l 000010012 =
910. Anh ta bit rng iu ny khng ng v c nhiu hon 9 ngui trong ca
hng ca ng ta. Gi s mach m dang lm vic ng. L do no cho su tri
nguoc ny?.
4.21. Hy v luu chuyn i trang thi ca mach m MOD 16.
4.22. Hy xc jnh dang sng tai Q1, Q2, Q3 .

J
CLK
K
X
Clear
C
Start
J
CLK
K
Y
Clear
A
B
1
tp=5ms
tp=10ms
OS
T
Q3
Q3
OS
T
Q1
Q1
tp=20ms
OS
T
Q2
Q2
0
tp=10ms
4.23. Xt mach sau
`

Ban u tt c cc FF trong trang thi 1. Hoat ng ca mach bt u vi
xung Start tc th uoc ua n cc ng vo PRE ca FF X v Y. Hy xc
jnh dang sng tai A,B,C,X,Y,Z v W trong 20 chu ky xung ng h.
4.24. Mach in sau c th s dung pht 2 tn hiu clock khng trng khp tai
cng 1 tn s. Cc tn hiu clock ny uoc s dung trong vi h thng vi
x l i hi 4 su chuyn i clock khc nhau ng b cc hoat ng
ca chng. V dang sng tai CP1 v CP2 khi tn s clock ng vo l 1Mhz.

4.25. Mot mach ong bo co vong em sau:

a). Thiet ke bo em tren dung JK FF co xung tac ong canh xuong.
b). Gia s trang thai hien tai cua mach la 001 tm trang thai ke cua mach cau a.
D
CLK
X
PRE
X
Start pule
1 J
CLK
K
C
C
J
CLK
K
B
B
Z
X
W
1Hz
1 1
1
1
C
D
CLK
Y
Y
PRE
0
B
Y
J
CLK
K
A
A
CP2
CP1
+5V
Clock
J
CLK
K
Q
Q
000 111 010 101 011
CHUONG 5
CC HQ VI MACH S

5.1. TONG QUAN
Xt v co ban c 2 loai thit bi bn dn l lung cuc v on cuc. Dua trn cc thit bi
ny, cc mach tch hop uoc hnh thnh.
Cc h mach logic lung cc
Cc yu t chnh cua IC lung cuc l in tro, diode v BJT, hai hoat ng trong IC
lung cuc l: tt v bo ha, cc ho logic lung cuc:
Mach logic RTL
Mach logic DCTL
Mach logic HTL
Mach logic TTL
Mach logic Schottky TTL
Mach logic ECL
Cc h mach logic on cc
Cc thit bi MOS l cc thit bi on cuc v chi c cc MOSFET uoc vn hnh trong
cc mach logic MOS, cc mach logic MOS l
PMOS
NMOS
CMOS
5.2. CC AC TRUNG CA CC VI MACH S
Phn lai cc IC s
Loai IC Cc cng cn ban S cc linh kin
T hop quy m nho SSI Nho hon 12 Ln n 99
T hop quy m trung bnh MSI 12-99 100-999
T hop quy m lon LSI 100-999 1000-9999
T hop quy m rt lon VLSI Lon hon 1000 Lon hon 10000
Cc c trung
Tc hoat ng, l thuc vo thoi gian tr truyn at

t
pHL
t
pLH
Tn hao cng sut, xc inh boi tch s ngun cung cp Vcc v dng Icc (gi tri
trung bnh cua dng Icc muc 0 v muc 1), on vi mW
Chi s gi tri, xc inh boi tch s tc v cng sut
Chi s gi tri (pJ)= thoi gian tr han truyn at (ns)x cng sut (mW)
Chi s gi tri cng nho cng tt
H s tai, l s cng c th uoc vn hnh boi mt cng, h s tai cng cao
cng thun loi
Cc tham s dng v p
o Din p u vo o muc cao V
IH
(in p ti thiu m cng c th nhn bit
muc 1)
o Din p u vo o muc thp V
IL
(in p ti a m cng c th nhn bit
muc 0)
o Din p u ra o muc cao V
OH
(in p ti thiu tai u ra tuong ung muc 1)
o Din p u ra o muc thp V
OL
(in p ti a tai u ra tuong ung muc 0)
o Cuong dng in u vo muc cao I
IH
(dng ti thiu uoc cung cp
tuong ung voi muc 1)
o Cuong dng in u vo muc thp I
IL
(dng ti a uoc cung cp tuong
ung voi muc 0)
o Cuong dng in u ra muc cao I
OH
(dng cuc ai m ng ra cung cp
o Cuong dng in u ra muc thp I
OH
(dng cuc tiu m ng ra cung cp
Nhiu

Min nhit hoat ng, tu 0-70
0
C cho cc ung dung tiu dng v cng
nghip, tu 55
0
C 125
0
C cho cc muc ch qun su
Yu cu v ngun
Tnh a dang, kha nng tch hop, gi thnh, ch tao, d phi hop voi vi mach
cng ngh khc

V
OH
V
IH
V
IL
V
OH
0
Ain p

L nhiu trng thi 1

L nhiu trng thi 0

5.3. H RTL (RESISTOR-TRANSISTOR LOGIC)
Bao gm cc in tro v transistor, y l ho logic uoc tch hop som nht
V d, mt cng NOR RTL

Cc mach RTL c c tnh chung l cn dng I
B
cho cc BJT nn cn uoc goi l
mach thu dng (current sinking), v vy khi kt ni voi cc mach khc cn phai luu
thoa mn iu kin ny, nu khng mach s khng lm vic
L nhiu o trang thi 0 l 0.5-0.2=0.3V
L nhiu o trang thi 1 phu thuc vo tai
5.4. H DTL (DIODE-TRANSISTOR LOGIC)
Bao gm diode o ng vo v transistor o ng ra
V d, cng NAND DTL

Ng ra Y ko ln ngun Vcc uoc goi l ng ra ko ln thu ng (Passive pull up)
5.5. H TTL (TRANSISTOR-TRANSISTOR LOGIC)
Loai DTL som uoc thay th boi mach TTL tuc Transistor o ng vo v Transistor o
ng ra

Q1
Rb1
B
Vcc
Q2
Rc
A
Rb2
Y
R1
D2
Rc
Vcc
Q
Rb DB
B
D1
DA
A
Y
AND NOT
V d, cng NAND TTL

Lu : khi cc ng vo A,B ho (tha ni ng vo) th khng c dng chay ra o A, B
nn ng vo ho ging nhu ni ln cao (logic 1)
Du ra TTL hoat ng nhu b thu nhn dng o trang thi thp (Q4) v cung cp dng
o trang thi cao (Q3)
Ng ra Y ko ln Transistor nn uoc goi l ng ra ko ln tch cuc (Active pull up)
hay cn goi l ng ra ct cham (Totel pole). Voi Q3 s khng c dng no truyn qua
Rc khi ng ra o muc thp nn s giam bot dng tiu hao trong mach. Trong khi kiu
ko ln thu ng s lm cho Q4 dn mt dng kh lon khi ng ra o muc thp
Uu im thu hai cua cu hnh Totem pole l khi Y o trang thi cao, Q3 c tro khng
u ra thp nn rt thun tin nu tai c tnh dung C
Nhuoc im cua cu hnh totem pole th hin trong giai oan chuyn tip tu thp ln
cao. V Q4 tt chm nn khi Q4 chua tt m Q3 dn, thoi gian ny (vi ns) ca 2
transostor u dn in nn ht mt dng tuong i lon.
5.6. CC AC AIM CA H TTL CHUN
Loat IC TTL chun u tin goi l seri 54/74, ty theo hng ch tao s c thm cc
tin t. VD, Texas Instruments c tin t SN, National Semiconductor dng DM,
Signetic l S
V d, cng NOR s c cc m s khc nhau DM7402, SN7402
Khoang nhit v in th ngun
Seri 74 vn hnh trong khoang in th 4.75 n 5.25 v nhit 0
0
C n 70
0
C
Seri 54 chp nhn in th ngun trong khoang 4.5 n 5.5 v nhit -55
0
C n
125
0
C
Muc in th cua seri 74
Ti a Chun Ti thiu
V
OL
0.2 0.4
V
OH
2.4 3.4
V
IL
0.8
V
IH
2.0
Vcc
R1
Q2
Q4
B
A
Y
R3
Q1
DA
R2 Rc
Q3
R1
Q2
B
A
Q1
Cng sut tiu hao bnh qun mt cng khoang 10mW
Thoi gian tr tiu biu t
pLH
=11ns v t
pHL
=7ns, trung bnh 9ns
Du ra TTL chun c th kch thch 10 u vo TTL chun
5.7. H TTL CI TIN

74 74S 74LS 74AS 74ALS 74F
Dinh muc hiu sut
Tr do truyn (ns) 9 3 9.5 1.7 4 3
Cng sut (Mw) 10 20 2 8 1.2 6
Chi s gi tri (pJ) 90 60 19 13.6 4.8 18
H s tai 10 20 20 40 20 33
Cc thng s in th
V
OH
(min) 2.4 2.7 2.7 2.5 2.5 2.5
V
OL
(min) 0.4 0.5 0.5 0.5 0.4 0.5
V
IH
(min) 2.0 2.0 2.0 2.0 2.0 2.0
V
IL
(min) 0.8 0.8 0.8 0.8 0.8 0.8
Cc inh muc dng ng ra
I
OH
(mA) -0.4 -1 -0.4 -2 -0.4 -1
I
OL
(mA) 16 20 8 20 8 20
Cc inh muc dng ng vo
I
IH
(A) 40 50 20 20 20 20
I
IL
(mA) -1.6 -2 -0.4 -0.5 -0.1 -0.6
V d, Xc inh gioi han nhiu DC cho mt IC 74LS so snh voi IC 74
V d, Mt u ra 74ALS kch thch 3 u vo 74S v mt u vo 74 uoc khng
5.8. TTL VI NG RA CC THU H (OPEN COLLECTOR OUTPUT)
So in hnh cua NAND cuc thu ho

Lu : Mach c cuc thu ho c th uoc su dung nhu mach Logic thng thuong
bng cch mc thm R thch hop voi tnh trang cua tai.
Y
B

R3

R1

R2

VCC
A
X
A
B
5.9. H TTL BA TRNG THI (TRISTATE)
Ngoi 2 trang thi co ban 1 v 0, cc mach logic cn c thm trang thi tng tro cao
Hi-Z
V du xt cng NOT 3 trang thi sau

5.10. MCH LOGIC MOS
Chuyn mach MOSFET co ban

Mach s dng MOSFET uoc phn thnh 3 nhm: P-MOS, N-MOS v CMOS
c im ca logic MOS
o So voi ho lung cuc th N-MOS v P-MOS c tc hoat ng chm hon, tiu
hao nng luong t hon, gioi han nhiu hep hon, khoang in th ngun nui lon
hon, h s tai lon hon v i hoi t ch trn chip hon
o Muc logic dnh cho mach MOS l V(0) 0V
V(1) V
DD

5.11. H CMOS
Cng ngh CMOS tung ra cc san phm c c im hiu sut ngy cng tt hon,
cung cp khng chi tt ca chuc nng logic c o TTL, m cn nhiu chuc nng c bit
khng c o TTL
CMOS
Thng s 4000B 74HC 74HCT 74AC 74ACT 74AHC 74AHCT
V
IH
(min) 3.5 3.5 2.0 3.5 2.0 3.85 2.0
V
IL
(max) 1.5 1.0 0.8 1.5 0.8 1.65 0.8
V
OH
(min) 4.95 4.9 4.9 4.9 4.9 4.4 3.15
V
OL
(max) 0.05 0.1 0.1 0.1 0.1 0.44 0.1
V
NH
1.45 1.4 2.9 1.4 2.9 0.55 1.15
V
NL
1.45 0.9 0.7 1.4 0.7 1.21 0.7
Lu : khng bao gio uoc php tha ni cc u vo CMOS khng dng n, tt ca
u vo CMOS phai uoc ni hoc voi muc in th c inh (0 hoc V
DD
) hoc voi
u vo khc (L do u vo CMOS tha ni rt nhay voi tap m nhiu v tinh in
vn c th d dng phn cuc MOSFET o trang thi dn in)

X A
Cho php (E)

X= A
A
E=1

X
A
E=0
+5V
G
D
S
D
S
G
V
GS
=0
D
S
G
V
GS
=5V
5.12. MT S CNG
Tt c cc cng u thuc loi tch hp SSI

Cng K hiu Loi ng ra
NOT 7404 Active Pull up
NOT 7405 Open collector
NOT 7414 Schmitt trigger
NAND 2 ng vo 7400 Active Pull up
NAND 2 ng vo 7401 Open collector
NAND 2 ng vo 74132 Schmitt trigger
OR 2 ng vo 7432 Active Pull up
NOR 2 ng vo 7402 Active Pull up
AND 2 ng vo 7408 Active Pull up
AND 2 ng vo 7409 Open collector
AND 3 ng vo 7411 Active Pull up
AND 3 ng vo 7415 Open collector
XOR 7486

CHNG 6.
GIAO TIP TNG T - S

6.1. BIN AI ADC
6.2.1. Khi nim
Bo bien oi tng t sang so (ADC) ong vai tro quan trong trong he thong x l
thong tin khi ma cac luong tn hieu a vao he vi x l la tn hieu dang tng t .
Cac bo chuyen oi thc hien hai chc nang c ban la lng t hoa va ma hoa.
Lng t hoa la gan nhng gia tr cua mot tn hieu tng t vao vung cac gia tr
ri rac sinh ra trong qua trnh ma hoa. oi vi ADC ta cung dung cac loai ma so
nh nh phan, BCD, bu mot, bu hai.
Qua trnh lay mau (Sampling).
Bc au tien trong chuyen oi tng t so la ri rac hoa theo thi gian tn
hieu au vao ban au. Viec lay mau nh vay c bo phan lay mau va gi
Sample & Hold Circuit (S&H) thc hien.

Bc tiep theo, bo chuyen oi tng t so A/D chuyen oi cac mau nghiem
lien tuc theo gia tr va a c ri rac hoa theo thi gian o thanh tn hieu lng
t hoa theo gia tr va bieu dien di dang so nh phan.
Phai chon tan so lay mau sao cho cac tr ly mau co the ac trng cho tn hieu
ban au ma khong b ton that thong tin (f
sample
2 f
max
).
Mach lay mau va dng S&H.
Trong ky thuat chuyen oi tng t so, tn hieu tng t bien thien lien tuc
theo thi gian u(t) c lay mau nhng thi iem nhat nh, va gia tr tn hieu
nhan c se c lu gi trong mot khoang thi gian nh trc. Trong nhieu bo
chuyen oi A/D, tn hieu phai c gi khong oi trong suot thi gian chuyen
oi. e thc hien viec o, dung mach Track-and-Hold T&H.
Cau truc c ban cua mach T&H

Sau moi lan m chuyen mach, tu ien nap en gia tr ien ap au vao
vao
u (t) va
lu gi gia tr tc thi cua ien ap au vao trc thi iem m chuyen mach. Ca
hai bo khuyech ai thuat toan lam bo em buffer cho au vao cung nh au ra.
Mot kha nang khac thc hien mach T&H.

Mot transistor trng FET (Isolated Gate FET) c mac gia KTT ao pha
va KTT tch phan. Khi
samp
u = 0, transistor FET se dan va ien ap au ra
ra
u
tng ng ien ap au vao am
vao
u , gia thiet hang so thi gian tch phan cua
KTT tch phan (c xac nh bi dong ien au ra cc ai cua KTT) la u
nho. Vao thi iem t =
0
t , transistor trng khoa, nh vay viec nap tu (ien ap tu
ien) khong oi va ien ap au ra
ra
u c gi lai mc gia tr
ra
u (t) =
ra
u
(
0
t ), cho en khi transistor trng lai c ieu khien m mach. Khi FET ong,
cac diode se dan va nh o ma tranh c hien tng KTT b qua ieu khien.
Chuyen oi song song (Flash Converter, giai ieu nhieu lan). e co the tien
hanh chuyen oi cc nhanh, ngi ta s dung cac chuyen oi song song, con
c goi la Flash Converter hay bo giai ieu nhieu lan. Trong kieu chuyen oi
nay, ien ap can chuyen oi se c ong thi so sanh can bang vi ( ) 1 2
N

ien ap quy chieu

Bo chuyen oi A/D 3 bit vi cac bo so song song 8 2
ref
N
ref LSB
U U U = =

Hnh N3.4.15 .
Phan chu yeu cua chuyen oi song song la ( ) 1 2
N
bo so sanh, hoat ong chc
nang mach so sanh vi ien ap ra
B ra
U u + = tng ng tn hieu logic K=1, nhng
neu
B ra
U u = th tng ng K=0 nh sau.

.
Viec chuyen oi c tien hanh ch mot bc, cho phep toc o chuyen oi at
mc cao nhat co the, nhng gia thanh cao tng ng, v ong thi phai dung so
lng ln cac bo so sanh( ) 1 2
N
. Tn hieu cua mot trong bay bo so cua chuyen
oi song song 3 bit c gii thieu trong bang N3.4-3.
Xap x hoa luy tien lien tuc (phng phap can, chuyen oi theo bac). Phng
phap nay da tren c s nguyen ly can bang. Trong s o bo chuyen oi, hoat
ong theo nguyen ly xap x hoa luy tien, con goi la chuyen oi theo bac, ngoai
modul ieu khien qua trnh va thanh ghi con co bo so sanh va mot chuyen oi so
tng t D/A
Trong cac bc luy tien, bo so se th xem ien ap can chuyen oi ln hn hay
nho hn ien ap u(Z) do bo chuyen oi ngc D/A tao ra. Tiep theo, bit bac cao
nhat (MSB) se c at nh, c chuyen oi D/A bien oi ngc tr lai thanh
ien ap tng t u(Z) va so sanh vi ien ap au vao
vao
u . Tuy theo gia tr u(Z)
ln hay nho hn
vao
u ma ien ap quy chieu se c cong vao hay tr i t gia tr
o, va theo o ma so nh nguyen tng ng cua tn hieu so nh phan au ra se la
0 hay 1. Trong moi chu trnh tiep theo, se lam tiep ch so nh nguyen cho bac
di va qua trnh so sanh se c lap lai. oi vi mot chuyen oi N bit th can N
bc so sanh va chu trnh lap lai tuan hoan.
Chuyen oi A/D 4 bit theo nguyen ly xap x hoa luy tien.

Tn hieu cua bo chuyen oi song song 3 bit.
ien ap vao Tn hieu so sanh
1 2 3 4 5 6 7
K K K K K K K
Ma nh phan
0 1 2
Z Z Z
ien ap tng t
vao
u
LSB vao
U u
2
1
0 <
LSB vao LSB
U u U
2
3
2
1
<
LSB vao LSB
U u U
2
5
2
3
<
LSB vao LSB
U u U
2
7
2
5
<
LSB vao LSB
U u U
2
9
2
7
<
LSB vao LSB
U u U
2
11
2
9
<
LSB vao LSB
U u U
2
13
2
11
<
vao LSB
u U
2
13

0 0 0 0 0 0 0
0 0 0 0 0 0 1
0 0 0 0 0 1 1
0 0 0 0 1 1 1
0 0 0 1 1 1 1
0 0 1 1 1 1 1
0 1 1 1 1 1 1
1 1 1 1 1 1 1
0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1
0
8 /
ref
U
2 8 /
ref
U
3 8 /
ref
U
4 8 /
ref
U
5 8 /
ref
U
6 8 /
ref
U
7 8 /
ref
U

Bo ri rac hoa nhieu tang theo bac (phng phap phoi hp song song va can
bang).
Bo ri rac hoa nhieu tang giai quyet thoa hiep gia toc o chuyen oi va gia
thanh. V oi vi cac chuyen oi thuan tuy theo phng phap song song (ri rac
hoa nhieu tang) th can rat nhieu bo so sanh, v du: mot chuyen oi A/D 8 bit th
can ti 255 bo so, ngi ta phan bac bo ri rac hoa thanh tang. Viec o cho phep
giam so lng bo so sanh, nhng ong thi toc o chuyen oi cham hn.

S o khoi chuyen oi 8 bit bang hai chuyen oi song song 4 bit mac theo bac.

Chuyen oi A/D th nhat nhan viec lng t hoa tho, lng t hoa 4 bit bac cao.
Ket qua chuyen oi nay se c bo chuyen oi D/A bien oi ngc thanh ien
ap tng t va tr i t ien ap au vao. Tn hieu sai lech (vi sai) se c bo
chuyen oi A/D th hai lng t hoa (he so 16 lan tinh hn). Ket qua chuyen oi
nay cho 4 bit bac thap hn. Viec han che c so lng bo so sanh(trong v du
trc th giam c t 255 xuong 30), lam ha gia thanh chuyen oi noi chung.
Chuyen oi theo phng phap phan tang cascade. Theo phng phap phan tang,
ngi ta dung mot bo chuyen oi song song N bit (Flash Converter) e chuyen
oi 2N bit. ay can hai chu trnh chuyen oi. So vi bo chuyen oi tren th
ay tiet kiem c mot bo chuyen oi. Tn hieu tng t au vao
vao
u trong
chu trnh nhp ong bo au tien (
1
S ong,
2
S m) c bien oi bi bo chuyen
oi N bit. Ket qua, cho N bit bac cao nhat, c bo chuyen oi ngc D/A bien
oi thanh gia tr tng t tng ng, em tr i ien ap au vao
vao
u ban au.
ien ap vi sai c khuyech ai len
N
2 lan, va c a tr lai bo chuyen oi
song song N bit (
1
S m,
2
S ong). em cong ket qua cua chuyen oi 1 va 2, rot
cuoc ta co ket qua cua chuyen oi 2N bit gia lap pseudo.
Chuyen oi A/D theo phng phap phan tang cascade.

Chuyen oi theo phng phap phan tang lap lai.
Trong chuyen oi phan tang lap lai (Recursive Subranging Analog Digital
Converter RSR-A/DC), se tien hanh bien oi tng t so mot t ma (n.N) bit
bang chuyen oi song song N bit vi n bc tuan t. Ve nguyen ly hoat ong, cac
chuyen oi nay da tren nguyen ly tiem can tng bc, vi khac biet la thay v
s dung cac bo so sanh tng t lam chuyen oi 1 bit, ay s dung bo chuyen
oi song song N bit. Noi chung, cung can phai am bao o chnh xac khuech ai
oi vi toan thang o (n.N) bit. Cung nh trong phng phap phan tang n gian,
s dung mot bo chuyen oi so tng t D/A e bien oi ngc gia tr ket qua
thanh gia tr tng t tng ng e tr i t gia tr au vao
vao
u . Nh vay, can
dung mot chuyen oi D/A (n.N) bit. So vi phng phap tiem can tng bc n
thuan, co s cai thien do chuyen oi (n.N) bit ma ch can n thay v (n.N) chu trnh
xap x hoa. Giong nh trong cac phng phap phan tang a neu, cung dung bit
th N e hieu chnh sai so, ieu o can them mot chu trnh nhp phu.
Bo chuyen oi A/DC 12 bit theo PP phan tang lap lai

a)- S o nguyen ly; b)- Xac nh gia tr so bang han che luy tien (k va i - so t nhien).

Chuyen oi bac Incremental (phng phap em). Trong chuyen oi A/D da
tren c s phng phap em, ien ap so can bang u(Z) c mot bo chuyen oi
D/A tao ra. Bo chuyen oi D/A o c mot bo em thong thng mac pha au
vao ieu khien.

Chuyen oi A/D theo nguyen ly chuyen oi bac Incremental.

Ngay khi u(Z) vt qua ien ap
vao
u can chuyen oi, th viec chuyen oi b
ngng lai. T trang thai bo em co the trc tiep tnh ra c gia tr so cua ien
ap c chuyen oi. u iem cua phng phap nay la giam c chi ph cau tao
thiet b (ch can mot bo so), trong khi co nhc iem la giam toc o chuyen oi.
So chu trnh can thiet trong chuyen oi phu thuoc vao o ln cua ien ap vao
vao
u . e co c ket qua gia tr c N bit se can toi a
N
2 bc.
Chuyen oi bam sat (phng phap em). Ngc vi chuyen oi bac Incremental
neu tren, chuyen oi bam sat em ti lui. Cau tao nguyen ly cua chuyen oi
bam sat (hnh N3.4-22) ve c ban khac vi chuyen oi bac Incremental la thay v
bo em ti thuan tuy, ay s dung bo em thuan - nghch phoi hp. Nh vay,
tn hieu ra cua D/AC luon bam sat theo tn hieu vao. Trong o, s bien ong tn
hieu vao trong thi gian mot chu ky nhp ong bo khong c ln hn gia tr
LSB
U . Khi bien ong tn hieu nhanh th thi gian e at ti s can bang tiep theo
co the la rat lau, trng hp xau co the lau ti c
N
2 chu ky nhp ong bo.
6.2.2. Mt s loi IC ADC
ADC 0801/ ADC0802/ ADC0803/ ADC0804/ ADC0805 (IC CMOS 20 chan),
ay la cac bo bien oi A/D 8 bit vi 1 kenh tng t, s dung phng phap lien
tiep xap x. Cac bo bien oi nay c thiet ke e co the giao tiep vi cac BUS
nh vao viec ieu khien bus 3 trang thai. Khi giao tiep vi bo vi x ly, chung se
ong vai tro nh nhng bo nh c nh v hay noi cach khac chung la cac port
I/O. ien ap tham chieu chuan au vao co the c ieu chnh cho phep ma
hoa cac gia tr ien ap analog nho hn trai eu o phan giai cua 8 bit.
ac iem chung:
X De dang giao tiep vi bo vi x ly hoac hoat ong oc lap
X Mc logic au vao / ra tng thch vi ca 2 loai MOS va TTL
X Bo phat xung nhp cung nam tren chip
X Dai tn hieu analog loi vao 0 5V khi ien ap nguon nuoi la 5V
X Khong can hieu chnh zero
X Hoat ong toan vung 5V hay 2.5V tuy theo gia tr ien ap tham chieu
X Dong tieu thu : 1.9mA

X Thi gian bien oi: 100s
X Co tang khuech ai thuat toan chan 9 e co phoi hp tr khang
X ien tr vao chan 9: 1.1k
Ngoai ra con co cac IC: ADC 0808/ ADC0809, ay la cac bo bien oi A/D 8 bit
vi 8 kenh tng t
Sinh vien tra s o chan va s o ket noi cho mach thc te
6.2. BIN AI DAC
6.2.1. Khi nim
Chuyen oi so tng t Digital Analog Converter (DAC) la bien oi tn hieu
a c ma hoa dang so tr lai thanh gia tr ien ap tng t.
Nguyen ly chuyen oi so tng t.

Gia thiet rang gia tr so Z c x ly nh mot so nh phan N bit theo ma nh phan
va x ly song song (1 bit moi ng d lieu). Tiep theo, gia thiet rang ch xet
en cac chuyen oi D/A ma ch chuyen oi, x ly nhng so dng trong pham vi
ADC0804
+IN
-IN
AGND
VREF/2
GND
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
CLKR
VCC/VREF
CLKIN
INTR
CS
RD
WR
1 2 0
max
=
N
Z Z ,
ay: so nh phan
0 1 1
... z z z Z
N bin
= bieu th bi N ch so nh nguyen
i
z :
0
0
1
1
2
2
1
1
2 2 2 ... 2 z z z z Z
N
N
+ + + + =

.
So nh phan N bit au vao cua bo chuyen oi D/A c mot thanh ghi au vao
tiep nhan, va khi co tac ong sn xung nhp tiep theo, no c chuyen oi thanh
gia tr tng t tng ng. o ln bc lng t hoa
LSB
U do qua trnh ri rac
hoa, tng ng vi vi sai tn hieu tng t au ra gia hai gia tr so ke tiep:
N
ref LSB
U U 2 = ,
ay
ref
U - ien ap quy chieu (reference) cua bo chuyen oi D/A. o ln bc
lng t tng ng gia tr tng t cua bit bac thap nhat Least Significant Bit
LSB. ac tuyen truyen at cua bo chuyen oi D/A n cc ly tng 3 bit (
LSB
U
=
ref
U / 8) nh sau.

Trong o, K la so iem ri rac hoa tren ac tuyen truyen at, quy nh so bit N
cua bo chuyen oi:
N
K 2 = .
ien ap tng t au ra
ra
u cua chuyen oi D/A nam trong khoang:
( ) ( )
N
ref
N
n
ref
N
LSB ra
U U U u

=
= 2 1
2
1 2
1 2 0 .
Mot trong nhng ai lng ac trng quan trong cua bo chuyen oi D/A la ty so
chuyen oi va thi gian chuyen oi.
Ty so chuyen oi: bao nhieu gia tr so c chuyen oi thanh gia tr tng t
trong mot n v thi gian.
Thi gian chuyen oi, noi chung, tng ng tr nghch ao cua ty so chuyen
oi.

S o thc hien chuyen oi so tng t D/A bang Phep cong dong hay ap trong
so. .

a)- Phng an khuyech ai u / i ; b)- Phng an co khuyech ai i / u .

Bo chuyen oi tren co bo khuyech ai u / i cung cap dong ra khong oi
ref
I =
ref
U
/
ref
R . Neu song song vi ien tr
i
R mac mot chuyen mach
i
S c ieu khien
bi t ma Z,, sao cho no m khi co ch so nh nguyen 1 ( ) ( ) 1 1 = =
i i
z S , va khi co
so 0 no van gi trang thai ong ( ) ( ) 0 0 = =
i i
z S , th ien ap au ra bang:

=
=
= =
1
0
1
0
N
i
i i
ref
ref
N
i
i i ref ra
R S
R
U
R S I u ,
ay ien tr trong so nh phan
i
R la:
R R
i
i
2 = , - i = 0,1,,N 1.
Hnh b gii thieu phng an s o co bo khuyech ai i / u, hoat ong nh mot bo
cong ao. Khac vi phng an trc, trong s o nay chuyen mach
i
S se ong
( ) ( ) 1 1 = =
i
i z S khi co so nh nguyen 1. Va ien ap au ra
ra
u bang:
=
=
1
0
1
N
i i
i
ref ref ra
R
S U R u ,
ay ien tr
i
R co trong so nh phan nghch ao so vi trong bieu thc tren
i
i
R
R
2
= , i = 0,1, , N 1,
va i S = 1 khi so nh nguyen th i la 1, con ngoai ra th i S = 0.

Phng an thc hien s o Bo chuyen oi D/A 4 bit co khuyech ai i / u tren c
s chuyen mach ban dan.

S o c phan bac th nguyen sao cho khi so nh nguyen th i c at nh
mc 1 (tng ng ien ap dng trong pham vi
B
U , tc la ( )
B i
U z U = 1 ), th
transistor tng ng c m va dong collector cua no, von do o ln ien tr
i
R 2 quy nh, se chay qua ien tr tong
ref
R . Nh vay, phep cong theo bieu
thc (N3.4-8) c thc hien. ien ap ri tren ien tr
i
R 2 co gia tr bang
ref
U
v ien ap dao ong tren diode
D
U gan tng xng ien ap BE am cua transistor
(
BE D
U U ). Diode zener on ap gi cho ien ap
ref
U khong oi.
oi vi nhng chuyen oi D/A thiet ke tren c s cac mang tr khang nh tren,
thong thng phai ap ng yeu cau rat cao ve o chnh xac cua cac ien tr mac
trong mach. Bo chuyen oi so tng t N bit co lien he tng quan gia ien
ap au ra cc ai
max . ra
u va bc lng t
LSB
U la:
( )
LSB
N
ra
U u 1 2
max .
= .
Neu phai am bao sai so tuyet oi ln nhat
ra
u cua ien ap au ra
ra
u nho
hn 2
LSB
U , tc la
ra
u 2
LSB
U , th phai ap dung luat phan bo sai so oi vi
sai so he thong cho bieu thc (N3.4-6):
LSB
N
i
i i
ref
ref
N
i
i
i
i
i
ref
ref
ra
U R S
R
U
R
R
R
S
R
U
u
2
1
1
0
1
0
< =
=

=
=
.
Tr so analog tng t cua bac lng t hoa au tien co the xac nh t cac bieu
thc (N3.4-6) va (N3.4-7), la ham cua ien ap quy chieu va gia tr ien tr R va
ref
R :
R
R
U
U
ref
ref
LSB
=
rut ra: R
R
U
R S
R
U
u
ref
ref
N
i
i i
ref
ref
ra
2
1
1
0
< =

=

Trng hp xau nhat la s co moi chuyen mach
i
S eu m (
i
S = 1), cho nen
phai am bao ieu kien sau:
R R
N
i
i
2
1
1
0
<
=
.
Neu ta coi sai so tng oi cua moi ien tr ch tr nh phan la nh nhau, th:
i
i
R R 2 =
Sai so tng oi ln nhat co the chap nhan theo ieu kien
ra
u 2
LSB
U ma s
o chuyen oi dung mang ien tr tren co the ap ng:
R R
N
i
i
2
1
2
1
0
<

=
,
va
( ) 1 2 2
1
<
N
R
R
.
Phai ac biet am bao thoa man ieu kien nay oi vi ien tr
1 N
R - nh tr bit
bac cao nhat MSB. Ve mat sai so toan phan, th ien tr nay co anh hng ln
nhat, ieu o co ngha la oi vi cac chuyen oi 12 bit th ien tr
11
R t nhat
phai am bao yeu cau o chnh xac sau:
( )
% 024 , 0 00024 , 0
1 2 2
1
11
11
11
= =
R
R
.

Mang chuoi ien tr. Nhc iem neu tren, thong thng la do s dung ien tr
c che xuat hang loat, theo tr so chuan hoa vi t tr so nh mc khac nhau.
Co the khac phuc nhc iem o bang cach s dung mang chuoi ien tr R-2R.
Phan ln cac chuyen oi D/A s dung chuoi ien tr o lam nhng bo phan ap
va phan dong mac nh. S o mach tng ng ch dung cac ien tr R va 2R nh
sau
.

Hnh a la s o co nguon dong; hnh b la s o tng ng gia nut i va (i+1)
khi
i
z =1 cac mach khac m; hnh c las o nguyen ly co nguon ap.
S o tng ng hnh b bieu th tng quan gia hai nut i va (i+1), co the theo
nguyen tac phan dong, quy nh ty le dong
1 + i
I va
i
I luon bang 1/2:
2 1
1
=
+ i i
I I .
Trong o, gia nh rang mach thuoc bit nh nguyen th i la ong, trong khi tat ca
cac bit nh nguyen khac eu ang m. Mat khac, ty le 1/2 ung bang ch tr
trong so nh phan cua chuyen mach
i
S . Vi
ref
I =
1 + i
I +
i
I th ien ap
i
u bang:
R I R I u
ref i i
3
2
= = .
Do phan ap gia cac nut i va (i+1) ta co:
2
1
1
=
+
i
i
u
u
.
Xac nh ien ap au ra
ra
u bang cach ap dung nguyen ly sieu v:
=
+
=
1
0
1
2
3
2
N
i
N i
i ref ra
S R I u ,
va anh gia trong so nh phan cua ien ap thanh phan
i
u . Trong phng an s o
hnh c, thay v nguon dong N can co nguon ap quy chieu. T thanh phan ien ap
at trc, xac nh c ien ap au ra
ra
u :
=
+
=
1
0
1
2
3
2
N
i
N i
i ref ra
S U u .
6.2.2. MT S IC DAC CHUYN DNG
DAC 0808 la bo chuyen oi DAC 8bit

Cac thong so va ac tnh ky thuat SV t tra tai lieu

Bi Ging K Thut S Ph lc B
PH LC B

I. h0h h0 LF Thh 6h0 FL
Cung giong nh ROM hay PROM, mot PLD cung c lap trnh e tao ra file ot
cac cau ch hay diode.
Ngon ng s dung e lap trnh cho PLD trong chng trnh nay la ABEL
(Advanced Boolean Equation Language) la mot trong nhng ngon ng lap trnh rat
manh cho PLD, ho tr cho nhieu ngo vao, bao gom ca s o trang thai va bang s
that. Trnh bien dch cua ABEL co kha nang mo phong va tao file fuse map (cau
ch) cho PLD. Trong phu luc nay ch tom tat hng dan s dung cac phan cau truc
va cu phap ve cac phat bieu, khai bao, ch danchu yeu nhat e phuc vu cho cac
bai th nghiem sau o. e hieu sau hn ve ngon ng nay, sinh vien nen tham khao
them cac tai lieu khac hoac phan help trong ngon ng.
Ngoai ABEL con co cac ngon ng khac nh VHDL, AHDL
60 T06 60 M0T 6h00h Thh 8EL
module module name
title string
deviceID device deviceType;
pin declarations
other declarations
equations
equations
test_vectors
end module name
Module. Ten chng trnh va cac thong so hnh thc
Title. Dung e mo ta module
Declaration. Mo ta cac module cap thap hn, nh ngha cac khoi chc nang
nh devive, pin, node, constant, macro, cac tap hp,
Equations. S dung cac ham, cac lu o trang thai hay bang s that e mo ta
cac thiet ke logic
Test_vectors. Test_vectors s dung trong cac file mo phong JEDEC
End. Ket thuc mot module
Lu y: cau truc tren bao gom cac thanh phan c ban cua mot chng trnh
ABEL, tuy vao nhng ng dung cu the co the se co them cac phat bieu khac
nh may trang thai, v.v
1. 66 FhT 8IE0 (8TTEMEhT8)
1.1. Phat bieu Module
Cu phap module modname [( dummy_arg[,.])]
Muc ch: Phat bieu module xac nh iem bat au cua mot chng trnh va phai co
phat bieu END e xac nh iem ket thuc cua module
S dung Modname la mot danh hieu hp le c at lam ten goi cho module
chng trnh
Danh hieu hp le la mot chuoi dai toi a 31 ky t (ch cai, ch so, dau
gach di_), c bat au bang ch cai hay dau gach di _. Danh
hieu phan biet ch hoa hay ch thng.
Dummy_arg (co the co) : la mot thong so hnh thc (tng t nh trong
ngon ng hp dch)
V du

MODULE My_Example

END My_Example
Module co ten My_Example va phat bieu END My_Example ket thuc
module nay.Trong module nay khong s dung thong so hnh thc.
MODULE My_Example (A,B)

C=A+B
END My_Example
Trong module nay co s dung hai thong so hnh thc A va B, bieu thc
C=A+B, vi A,B c tra ve ga tr thc (t module khac) khi bien dch
1.2. Phat bieu Title
Cu phap title string
Muc ch: Phat bieu title at cho module mot ta e (header) e minh hoa ac iem
chc nang do ngi lap trnh tao ra.Chuoi ky t se xuat hien trong ca file
d lieu va file fusemap sau khi bien dch
S dung string: la chuoi ky t nam trong hai dau nhay n () va gii han 324 ky
t
S dung phat bieu tilte la tuy chon
V du module m6809a

title 6809 memory decode
Jean Designer
Data I/O Corp Redmond WA
1.3. Phat bieu equations
Cu phap equations
element [?] = condition;
when-then-else_statement;
Muc ch: Phat bieu equations nh cho bat dau cua mot hay mot nhom bieu thc
Boole bieu dien ham logic ngo ra theo ngo vao
S dung condition. Mot mo ta
element. ten danh nh cua mot tn hieu, tap cac tn hieu hay tn hieu
thc ma mo ta gia tr cua no c gan
when-then-else_statement: phat bieu when-then-else
Sau moi bieu thc phai co dau cham phay (;)
V du

Equations
A = B&C#A;
[W,Y] = 3;
!F = (B = =C);
1.4. Phat bieu Truth_table
Cu phap truth_table (inputs -> outputs)
hay truth_table (inputs : > reg_outs)
Muc ch:
Truth_table trnh bay bang s that minh hoa ngo ra nh mot ham to hp cua cac
ngo vao
Cac bang s that co the thay the hoac bo sung them cho cac bieu thc
(trong equations) hay s o trang thai (trong state_diagram)
S dung
inputs : la cac ngo vao cua ham logic
outputs : la cac ngo ra cua ham logic
reg_outs : la cac ngo ra cua cac thanh ghi (FF)
Dau -> bieu dien he to hp
Dau : > bieu dien he tuan t
V du

Truth_table ([A,B] -> C)
[0,1] -> 1;
[1,0] -> 1;
[1,1] -> 0;
[0,0] -> 0;
Ro rang truth_table tren bieu dien bieu thc C=A+B
1.5. Phat bieu state_diagram
Cu phap State_diagram state variables
State state_exp:[equations];
.
.
[trans-stmt];
Muc ch: Phat bieu state_diagram nh ngha cac bien trang thai bat au s mo ta
hoat ong cua may trang thai (tng t nh o th trang thai hay lu o
may trang thai)
S dung state_variables: la tap hp cac bien trang thai trong may trang thai
state: la t khoa e bieu dien s chuyen bien t trang thai hien tai sang
trang thai ke tiep va ngo ra hien tai
state_exp : la bieu thc hay hang so ng ngha trang thai hien tai
equations: la cac bieu thc logic ngo ra hien tai cua may trang thai
trans_stmt : la mot phat bieu dang IF THEN ELSE , GOTO, CASE
(tuy chon) e mo ta s chuyen bien t trang thai hien btai sang trang thai
ke tiep theo ieu kien tac ong cua ngo vao
V du

Gia s ta co 2 ngo vao x
1
va x
2
, ngo ra la z, may trang thai co 3 trang thai
ky hieu S
0
,S
1
,S
2
, 2 bien trang thai Q = [Q
0
,Q
1
] (2 ngo ra cua FF)
State_diagram Q
State S0: if (x1&x2 = =0) then S2
Else S1
State S1: z=1;
Go to S2;
State S2: z=0;
Go to S0;

1.6. Phat bieu goto
Cu phap Goto state_exp
Muc ch: Phat bieu goto bieu dien s chuyen bien khong ieu kien t trang tha
hien tai sang trang thai ke tiep la state_exp.
S dung State_exp: la bieu thc bieu dien trang tha ke tiep
V du Si: goto Sj; nhay en trang thai Sj

S
0
x
1
x
2
z=1
z=0
S
1
S
2
1

0
1.7. If then else
Cu phap If exps then state_exp1
[else state_exp2];
hay if exp1 then state_exp1
else if exp2 then state_exp2
[else if.]
else state_expn;
Muc ch: Phat bieu if then else : mo ta s chuyen hoa trang thai theo ieu kien
ngo vao.
Neu bieu thc ngay sau t khoa if la ung , chuyen bien hng en trang
thai ngay sau t khoa then; neu sai chuyen bien hng en trang thai
ngay sau t khoa else.
S dung exps: la bieu thc bat ky hp le nao
state_exp1, state_exp2..: la bieu thc bieu dien trang thai ke tiep.
Cac phat bieu if then else co the c noi vi nhau lien tiep nhng
ket thuc phai la dau cham phay.
V du State 1 : if (A = = B) then 2; neu A = b chuyen en trang thai 2
State 2 : if A then 3 else 4; neu A ung (0) chuyen en trang thai 3
neu A sai (=0) chuyen en trang thai 4
state 0 : if a then 1
else if b then 2
else if c then 3
else 0;
1.8. Phat bieu case
Cu phap Case [exps1 : state+exp1;]
[expsi : state_expi;]
end case;
Muc ch: Phat bieu case mo ta s chuyen bien trang thai trong trng hp co nhieu
ieu kien tac ong.
S dung Tranh khong e 2 ieu kien xay ra cung luc va tranh trng hp ket qua
trang thai ke khong oan trc c
V du STATE S0:
CASE (sel == 0): S0 ;
(sel == 1): S1 ;
ENDCASE
1.9. Phat bieu test_vectors:
Cu phap Text vectors[note] (inputs outputs)
[invalues out values]
Muc ch: Cac test_vectors dung e mo phong hoat ong cua he va kiem tra cac
chc nang hoat ong cua he khi chay chng trnh mo phong
S dung note: la mot chuoi ky t e mo ta cac text_vectors
inputs : la 1 danh nh hay tap hp cac danh nh ten cac tn hieu vao hay
hoi tiep ve ngo vao cua he.
Outputs : la 1 danh nh hay tap hp cac danh nh ten cac tn hieu ra cua
he.
Invalues : la 1 hay tap hp cac gia tr vao
Outvalues : la 1 hay tap hp cac gia tr ra la ham logic cua cac gia tr vao
va ga tr trang thai (he tuan t)
V du equations
C = A&B; C = A.B
D = A#B; D = A+B
Text_vectors ([A,B][C,D])
[0,0][0,0]
[0,1][0,1]
[1,0][0,1]
[1,1][1,1]
1.10. Phat bieu istype
Cu phap Signal [ , signal] istype attr[ , attr];
Hay signal [ , signal] pin istype attr[ , attr] ;
Muc ch: Phat bieu istype nh ngha cac thuoc tnh cua pin hay node lap trnh c
cua cac dung cu (PLD).
Cac thuoc tnh cua pin hay node co the khai bao cung mot dong
S dung signal: la mot danh hieu pin hay node
attr: la mot chuoi ky t xac nh cac thuoc tnh cua cac signal
Cac thuoc tnh hp le la:
buffer : em
com : he to hp
invert : ao
neg : tnh cc mc thap
pos : tnh cc mc cao
reg : thanh ghi (he tuan t)
reg_D,reg_T,reg_JK,reg_SR : cacFF, D, T, JK, SR
V du F0, A istype neg , reg;
istype nh ngha F0 , A la tn hieu cua thanh ghi , tac ong mc thap
outputs pin 15 istype reg , invert
tn hieu output chan 15 cua thanh ghi ngo ao (ngo ra Q)
1.11. Phat bieu end
Cu phap End
Hay end modname
Muc ch: Dung ket hp vi cac phat biei module e m au va ket thuc module
chng trnh
S dung signal: la mot danh hieu pin hay node
attr: la mot chuoi ky t xac nh cac thuoc tnh cua cac signal
Cac thuoc tnh hp le la:
buffer : em
com : he to hp
invert : ao
neg : tnh cc mc thap
pos : tnh cc mc cao
reg : thanh ghi (he tuan t)
reg_D,reg_T,reg_JK,reg_SR : cacFF, D, T, JK, SR
V du F0, A istype neg , reg;
istype nh ngha F0 , A la tn hieu cua thanh ghi , tac ong mc thap
outputs pin 15 istype reg , invert
tn hieu output chan 15 cua thanh ghi ngo ao (ngo ra Q)

Z. 66 khI 80 (E6LTI0h8)
2.1. Pin
Cu phap [!]pin_id[,[l]pin_id]pin[pin#[,pin#]] istype attr];
Muc ch: T khoa pin dung e khai bao nhng tn hieu input va output, la nhng tn
hieu in/out quy nh san tren dung cu (theo so tra cu). Khai bao cung co
the nh ngha thuoc tnh chan
Khi 1 danh sac danh nh chan va so chan co trong cung mot khai bao
chan , se co s tng ng 1-1 gia danh nh chan va so chan
S dung pin_id: la mot danh hieu dung e at ten cho 1 chan
pin #: la so th t chan tren dung cu (PLD)that
attr: la mot chuoi xac nh cac thuoc tnh cua chan
!: ky hieu NOT,tch cc mc thap
V du !clock,reset,S1 pin 12,15,3;
khai bao nay gan ten chan: clock chan 12, reset chan 15, S1 chan 3
!clock: tch cc mc 0
2.2. Node
Cu phap
[!]node_id[,[!]node_id ]node[node#[,node# ][istype attr];
Muc ch: T khoa node dung e khai bao nhng tn hieu gan cho nhng nut an
trong dung cu
S dung node_id: la mot danh hieu dung e at ten mot nut
node#: la so th t nut tren dung cu that (nut tng ng nh chan an
trong dung cu va so nut c cho trong so tay tra cu)
V du B node istypereg : xac nh nut B la 1 ngo cua FF trong dung cu
A,B node 25,26 : gan ten A la nut 25, gan ten B la nut 26. So nut nay do
nha san xuat quy nh trong so tay tra cu
2.3. Dung cu (Device)
Cu phap
Device-id device real_device;
Muc ch: Khai bao device cho mot PLD that. Trong qua trnh bien dch, cac ham
logic se c a ve dang theo cau truc cong ung nh cua dung cu that.

S dung device-id: la mot danh hieu, chnh la ten file fusemap
real-device: mo ta ma so dung cu (PLD) at gia 2 dau nhay n ()
Phai at dau ; sau khai bao
V du D1 device P16R4: khai bao nay cho biet D1 la loai PLD PAL 16R4

8. 66 khI 80 kh6 (0ThE E6LTI0h8)
3.1. Hang (constant)
Cu phap
id[,id] = expr[,expr] ;
Muc ch:
Khai bao hang nh ngha nhng hang so c dung trong 1 module
S dung id: la mot danh hieu at ten cho 1 hang
expr: xac nh ga tr hang
V du X = .X.; X mang y ngha khong xac nh
Z = .Z.; Z mang y ngha tong tr cao
C = .C. C mang y ngha tac ong canh len
A = ^b01 ; so nh phan
B = ^h16; so hex
C = 10; so thap phan

3.2. Tap hp (set)
nh ngha
Tap hp la tap hp nhng tnh hieu va hang so ma tac vu thc hien nh la
1 n v
Bat c tac vu nao ap dung cho 1 tap hp se c ap dung cho moi phan t
trong tap hp
Tap hp se lam n gian viec mo ta logic va cac test-vectors bang cach
ch can dung ten goi tap hp
S dung Mot tap hp c ai dien bi 1 danh sach cac hang so va tn hieu ngan
cach bang cac dau cham phay hay dau khoang (..), at trong dau ngoac
vuong ([ ]). Sau moi khai bao tap hp phai co dau ;
V du MULOUT = [B0,B1,B2,B3,B4,B5,B6,B7];
hay MULOUT = [B0B7];
MULOUT la khai bao la ten mot tap hp gom 8 tn hieu t B0 en B7
BCD = [D,C,B,A]
LED = [g,f,e,d,c,b,a]
Test-vectors (BCD LED)
[0,0,0,0] [1,0,0,0,0,0,0]
BCD la 1 tap hp gom cac tn hieu D,C,B,A
LED la 1 tap hp gom cac tn hieu g,f,e,d,c,b,a
3.3. Macro
Cu phap
Macro_id macro [(dummy_arg [, dummy_arg])]{block};
Muc ch: Khai bao macro nh ngha 1 macro thc hien cac chc nang, cac phep
toan,bieu thc logic trong mot khoi
Ch nh ngha macro 1 lan trong phan khai bao macro trong module va se
c dung bat c ni nao trong module
Khai bao macro tng t nh trong trnh hp ng
Macro ch co the c dung trong module ma no c khai bao
S dung macro_id: la mot danh hieu at ten cho macro
dummy_arg: la mot thong so hnh thc
block: la cac bieu thc logic
V du NAND3 macro (A,B,C) {!(A&B&C)}
NAND3 la macro thc hien chc nang ham logic C B A . . vi A,B,C la cac
thong so hnh thc
Sau o trong module khai bao macro nay ta co khai bao:
D = NAND 3 (Clock, Hello, busy);
Ket qua la: D = !(Clock&Hello&Busy) khi bien dch
3.4. Enable
Cu phap
Enable output_id = [!]expr;
Muc ch: Khai bao enable cho phep cac ngo ra 3 trang thai hoat ong theo tn hieu
ieu khien bi ga tr cua expr
S dung khai bao nay theo sau phat bieu equations
S dung output_id: la danh hieu at ten cho 1 ngo ra hoac 1 tap hp ngo ra
expr: la 1 bieu thc logic
V du OE pin11;
F0,F1,F2,F3 pin 19,18,17,16;
Count = [F0,F1,F2,F3];
Equations
Enable count = !OE
Cac ngo ra t F0 en F3 trong tap hp count la cac ngo ra 3 trang thai , se
hoat ong khi OE = 0 va se trang thai high-Z khi OE = 1
Co the s dung tiep v ng .OE thay cho khai bao enable (xem phan tiep
v ng)
4. 66 T0h T0 (0FET08)
4.1. Toan t chuan (standard)
! NOT
# OR
& AND
$ XOR
!$ XNOR
= toan t gan cho bieu thc to hp
:= toan t gan cho bieu thc thanh ghi (tuan t)
Ngoai ra t khoa @ALTERNATE bao cho trnh bien dch biet bo toan t tng ng
(alternate) thay the cho bo toan t chuan (cac ky hieu de nh hn)
Bo toan t thay the (phai co t khoa @ALTERNATE au module chng trnh)
/ NOT
* AND
+ OR
:+: XOR
:*: XNOR

4.2. Toan t so sanh
== bang
!= khong bang
< nho hn
> ln hn
<= nho hn hoac bang
>= ln hn hoac bang
Ngoai ra con cho phep viet cac bieu thc ieu kien , bieu thc nay se tra ve 1 neu
thoa ieu kien va tra ve 0 neu khong thoa ieu kien
V du Q = (P = =1); Q se bang 1 neu P =1 va Q se bang 0 neu P khac 1
6. 66 TIEF 0 h0 (FraIIx), IIap v ngu (suIIIx)
5.1. Tiep au ng
Toan t Not (! hay /) c dung nh tiep au ng e bao trnh bien dch biet tn
hieu hoat ong (tch cc) mc logic
V du: !Q0 pin 15; tng ng vi Q0 pin 15 istype neg;
5.2. Tiep v ng
Cac tiep v ng thng c dung trong che o thanh ghi e truy xuat en tng
chan noi trong thanh ghi
V du Q0.CK truy xuat en chan clock cua tn hieu ra Q0 che o thanh ghi
Tng t nh oi vi .RE,.PR,.D,.T.. lan lt truy xuat en cac chan
reset,preset,D,T cua thanh ghi
Tiep v ng .OE cho phep xuat ngo ra 3 trang thai
V du out.oe = !ena;
ena =0 ngo ra out c phep xuat
ena = 1 ngo ra out trang thai high-Z
6. hI 6h0 (6ommanIs)
Cac ghi chu minh hoa , giai thch cua chng trnh bat au bang dau nhay kep
()va ket thuc bang dau nhay kep () hoac xuong dong.
V du
Q1,Q2,Q3, pin 14,15,16 outputs
declarations
QSTATE = [Q1,Q2,Q3]; sets

8I Th hhIEM
8IEh [6h V M0 Fh0h 8EL

A. MUC CH YEU CAU BAI TH NGHIEM:
Giup sinh vien nam c ky thuat lap trnh va bien dch ngon ng ABEL trong
thiet ke PLD (cac dang hoi tiep, khong hoi tiep, thanh ghi)
SV phai oc ky trc bai c s ly thuyet va on lai kien thc ve ky thuat so
SV phai nhap san cac bai th nghiem vao a mem
B. THIET B S DUNG:
May vi tnh + chng trnh
C. NOI DUNG TH NGHIEM:
1. Th nghiem 1
Muc ch: Dung cac bieu thc trong equations e thc hien mach (mode n).
Thiet ke bo MUX 12 4 dung GAL16V8 nh hnh sau

Cac ngo vao: [a3,a2,a1,a0], [b3,b2,b1,b0], [c3,c2,c1,c0]
Ngo ra : [y0, y1, y2, y3]
ieu khien chon kenh : [S1, S0]
Chng trnh

1
2
3
4
5

6
7
8
9
10
Module mux12t4
title '12 to 4 multiplexer
Thi nghiem 1'
Cac khai bao
mux12t4 device 'P16V8S';

a0,a1,a2,a3 pin 1,2,3,4;
b0,b1,b2,b3 pin 5,6,7,8;
c0,c1,c2,c3 pin 9,11,12,13;
s1,s0 pin 18,19;
y0,y1,y2,y3 pin 14,15,16,17;
A2
A3
Y0
S1
U2
16V8
1
2
3
4
5
6
7
8
9
11
12
13
14
15
16
17
18
19
I0
I1
I2
I3
I4
I5
I6
I7
I8
I9
F0
F1
F2
F3
F4
F5
F6
F7
B1
C0
Y1
C2
Y2
A0
B3
Y3
C3
S0
A1
C1
B2
B0
11
12
13
14
15
16
17
18

19
20
21
22
23

24
25
26
27
28
29
30
31
32
33
34
35
36
37
H = [1,1,1,1];
L = [0,0,0,0];
X = [.x.,.x.,.x.,.x.];
select = [s1, s0];
y = [y3,y2,y1,y0];
a = [a3,a2,a1,a0];
b = [b3,b2,b1,b0];
c = [c3,c2,c1,c0];

equations
y = (select == 0) & a #
(select == 1) & b #
(select == 2) & c #
(select == 3) & c ;

test_vectors ([select, a, b, c] -> y)
[0 , 1, X, X] -> 1;
[0 ,10, H, L] -> 10;
[0 , 5, H, L] -> 5;
[1 , H, 3, H] -> 3;
[1 ,10, 7, H] -> 7;
[1 , L,15, L] -> 15;
[2 , L, L, 8] -> 8;
[2 , H, H, 9] -> 9;
[2 , L, L, 1] -> 1;
[3 , H, H, 0] -> 0;
[3 , L, L, 9] -> 9;
[3 , H, L, 0] -> 0;
end

Giai thch chng trnh
- Dong 1 khai bao ten module la mux12t4
- Dong 2,3 khai bao ten title va at ten
- Dong 4 la chu thch
- Dong 5 khai bao dung cu (device) ten U1 va dung vi mach 16V8S (simple
mode)
- Dong 6,7,8,9,10 la khai bao gan ten cac chan tng ng nh hnh
- Dong 11, 12, 13 la khai bao hang : L = 0, H = 1, X=tuy nh
- Dong 14,15,16,17,18 la khai bao tap hp : select = [S1,S0] la tap gom 3 bien
ieu khien chon kenh, tng t cho tap a, b, c, y. Viec khai bao tap hp nay se
rat tien khi ta can tham chieu ti cac ngo ieu khien hoac ngo ra phan sau o
- Dong 19 bat au phat bieu equations.
Gia tr gan cho toan t bang dung he thap phan. Neu dung he nh phan ta ghi :
(select = = ^b00)
- Dong 24 bat au phat bieu test_vectors e kiem tra chc nang cua he, khai bao
cac tn hieu ngo vao va ngo ra can kiem tra
Ngo vao la tap hp cac bien select, a, b, c. Ngo ra la tap hp cac bien y
- Dong 25 en 27 la cac vector kiem tra don kenh khi cho ngo vao select=0
- Dong 37 la phat bieu END ket thuc chng trnh
Bien dch chng trnh
Bc 1: Nhap file nguon trong th nghiem tren
Bc 2:
Bien dch chng trnh dung phan mem ABEL
T th muc ABEL anh lenh abe filename
Bc 3: Xem lai cac file mi hnh thanh (file.doc, file.list)
Bc 4: Them t khoa flag -t1 vao sau phat bieu module
Module mod-id flag -t1
Bc 5: Bien dch lai chng trnh va xem ket qua file.sim. Nhan xet.

2. Th nghiem 2
Muc ch: Thiet lap ieu khien cac ngo che o I/O va Hi Z (mode phc)
Thiet ke bo em 2 chieu 3 trang thai dung GAL 16V8

Cac ngo vao/ra: [a2,a1,a0], [b2,b1,b0]
ieu khien chon chieu data: [S1, S0]
Neu [S1,S0] = [0,1]: hng t B sang A
Neu [S1,S0] = [1,0]: hng t A sang B
Chng trnh

1
2
3

4
module tsbuffer
title 'bi-directional three state buffer
Thi nghiem 2'

TSB1 device 'P16V8c';

GAL16V8
S1 S0
B2 B1 B0 A2 A1 A0
A1
B0
U2
16V8
1
2
3
4
5
6
7
8
9
11
12
13
14
15
16
17
18
19
I0
I1
I2
I3
I4
I5
I6
I7
I8
I9
F0
F1
F2
F3
F4
F5
F6
F7
A0
B2
S1
B1
A2 S0

5
6
7

8
9
10
11

12
13
14

15
16

17
18
19
20
21
22
23
24
25
26
27

S1,S0 Pin 1,2;
A2,A1,A0 Pin 13,14,15;
B2,B1,B0 Pin 16,17,18;

Select = [S1,S0];
A = [A2,A1,A0];
B = [B2,B1,B0];
X,Z = .X., .Z.;

Equations
A = B;
B = A;

Enable A = (Select==1);
Enable B = (Select==2);

test_vectors
([Select, A, B]-> [ A, B])
[ 0 , 0, 0]-> [ Z, Z];
[ 0 , 7, 7]-> [ Z, Z];
[ 1 , X, 3]-> [ 3, X];
[ 1 , X, 5]-> [ 5, X];
[ 2 , 3, X]-> [ X, 3];
[ 2 , 5, X]-> [ X, 5];
[ 3 , 0, 0]-> [ Z, Z];
[ 3 , 7, 7]-> [ Z, Z];
end
Giai thch chng trnh
- Dong 4 khai bao device mode phc (modeI/O)
- Dong 11 khai bao .z. la tong tr cao
- Dong 15 cho phep A xuat khi [S1S0] = [01], luc nay hng truyen t B->A
- Dong 16 cho phep B xuat khi [S1S0] = [10], luc nay hng truyen t A->B
Bien dch chng trnh
Bc 2:


3. Th nghiem 3
Muc ch: S dung bang s that trong truth_table e thc hien mach
Thiet ke 2 bo giai ma 2 4 s dung GAL16V8 hoat ong theo bang s that sau:
Input Output
G B A Y3 Y2 Y1 Y0
1
1
1
1
0
0
0
1
1
x
0
1
0
1
x
1
1
1
0
1
1
1
0
1
1
1
0
1
1
1
0
1
1
1
1

Chng trnh
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22

23
24
25
26
27
28

Module decod2t4
Title 'giai ma 2 sang 4
Thi nghiem 3'

Decod2t4 device 'P16V8S';
G1,G2 pin 2,5;
A1,B1,A2,B2 pin 3,4,6,7;
Y01,Y11,Y21,Y31 pin 19,18,17,16;
Y02,Y12,Y22,Y32 pin 15,14,13,12;

H,L,X = 1,0,.x.;
inputs1 = [G1,B1,A1];
outputs1 = [Y31,Y21,Y11,Y01] ;
inputs2 = [G2,B2,A2];
outputs2 = [Y32,Y22,Y12,Y02];

Truth_table (inputs1->outputs1)
[1,0,0] -> [H,H,H,L];
[1,0,1] -> [H,H,L,H];
[1,1,0] -> [H,L,H,H];
[1,1,1] -> [L,H,H,H];
[0,X,X] -> [H,H,H,H];

truth_table (inputs2-> outputs2)
[1,0,0] -> [H,H,H,L];
[1,0,1] -> [H,H,L,H];
[1,1,0] -> [H,L,H,H];
[1,1,1] -> [L,H,H,H];
[0,X,X] -> [H,H,H,H];

B1
Y01
Y12
Y11
U2
16V8
1
2
3
4
5
6
7
8
9
11
12
13
14
15
16
17
18
19
I0
I1
I2
I3
I4
I5
I6
I7
I8
I9
F0
F1
F2
F3
F4
F5
F6
F7
G2
Y02
Y31
B2
Y21
Y22 G1
A1
A2
Y32
29
30
31
32
33
34

35
36
37
38
39
40
41
test_vectors (inputs1-> outputs1)
[1,0,0] -> [H,H,H,L];
[1,0,1] -> [H,H,L,H];
[1,1,0] -> [H,L,H,H];
[1,1,1] -> [L,H,H,H];
[0,1,0] -> [H,H,H,H];

test_vectors (inputs2-> outputs2)
[1,0,0] -> [H,H,H,L];
[1,0,1] -> [H,H,L,H];
[1,1,0] -> [H,L,H,H];
[1,1,1] -> [L,H,H,H];
[0,0,1] -> [H,H,H,H];
end
Giai thch chng trnh
Chng trnh tren dung phat bieu truth_table e khai bao bang s that hoat ong
cua he thay cho bieu thc. Trong trng hp nay cach viet truth_table se gon hn
cach viet theo bieu thc (equations).
Bien dch chng trnh
Bc 2:

4. Th nghiem 4
Muc ch: Thiet ke vi mode thanh ghi cho mach tuan t
Thiet ke bo em len (ong bo) 16 dung GAL16V8. Bo em co ngo Cl ong
bo, tnh cc mc 0 nh hnh sau

Q2
Q1
U2
16V8
1
2
3
4
5
6
7
8
9
11
12
13
14
15
16
17
18
19
I0
I1
I2
I3
I4
I5
I6
I7
I8
I9
F0
F1
F2
F3
F4
F5
F6
F7
Q3
Q0
CK
CL
Ta thiet lap bang trang thai hien tai va ke tiep cho cac ngo ra Q3Q2Q1Q0
Trang thai hien tai Trang thai ke
Q3 Q2 Q1 Q0 Q3
+
Q2
+
Q1
+
Q0
+
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
T o rut ra c
0 0 Q Q =
+
.Cl (vi Cl tch cc mc thap)
( )
( )Cl Q Q Q Q Q
Cl Q Q Q Q
Cl Q Q Q
. 0 . 1 . 2 3 3
. 0 . 1 2 2
. 0 1 1
=
=
=
+
+
+

Theo cau truc GAL16V8, chan 1 la chan CK ong bo cac thanh ghi ben trong
Chng trnh
1
2
3
4
5
6

7
8

9
10
11
12
13

module count4
title 'COUNTER MOD16
Bai so 1'
Counter device 'P16V8R';
CK,CL pin 1,2 ;
Q3,Q2,Q1,Q0 pin 19,18,17,16;

Count = [Q3,Q2,Q1,Q0];
C,H,L = .C.,1,0 ; "Xung CK tac dong canh len

Equations
Q0 := !Q0 & CL;
Q1 := (Q1$Q0) & CL;
Q2 := (Q2$(Q1&Q0))&CL;
Q3 := (Q3$(Q2&Q1&Q0))&CL;

14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
Test_vectors([CK,CL] -> Count)
[C,L] -> 0 ;
[C,H] -> 1 ;
[C,H] -> 2 ;
[C,H] -> 3 ;
[C,H] -> 4 ;
[C,H] -> 5 ;
[C,H] -> 6 ;
[C,H] -> 7 ;
[C,H] -> 8 ;
[C,H] -> 9 ;
[C,H] -> 10 ;
[C,H] -> 11 ;
[C,H] -> 12 ;
[C,H] -> 13 ;
[C,H] -> 14 ;
[C,H] -> 15 ;
[C,H] -> 0 ;
END

Giai thch
Trong mode thanh ghi cac bieu thc s dung toan t gan := e bieu dien ngo ra la
he tuan t (thanh ghi).
Bien dch chng trnh
Bc 2:



TOM TAT BAI GIANG

VERILOG

LU HANH NOI BO
07/2005
Tom tat bai giang TK He Thong So Phan Verilog
GV: Nguyen Trong Hai Trang 1
CHUONG I
TONG @UAN

Verilog HDL la mot trong hai ngon ng mo phong phan cng thong dung nhat,
c dung trong thiet ke IC, ngon ng kia la VHDL.
HDL cho phep mo phong cac thiet ke de dang, sa cha loi, hoac thc nghiem
bang nhng cau truc khac nhau. Cac thiet ke c mo ta trong HDL la nhng ky
thuat oc lap, de thiet ke, de thao g, va thng de oc hn dang bieu o, ac
biet la cac mach ien ln.
Verilog thng c dung e mo ta thiet ke bon dang:
Thuat toan (mot so lenh giong ngon ng C nh: if, case, for,while).
Chuyen oi thanh ghi (ket noi bang cac bieu thc Boolean).
Cac cong ket noi( cong: OR, AND, NOT).
Chuyen mach (BJT, MOSFET).
Ngon ng nay cung ch ro cach thc ket noi, ieu khien vao/ra trong mo phong.
Cau truc chng trnh dung ngon ng Verilog

// Khai bao module
Module ten chng trnh (ten bien I/O); // ten chng trnh trung ten file.v.
Input [msb:lsb] bien;
Output [msb:lsb] bien;

Reg [msb:lsb] bien reg;
Wire [msb: lsb] bien wire;

// Khai bao khoi always, hoac khoi initial.
cac lenh

Endmodule

Chuong II
CHUC NANG CAC TU VUNG
TRONG VERILOG

Nhng tap tin van ban nguon Verilog bao gom nhng bieu hien thuoc tnh t vng
sau ay:
I. Khoang trang
Khoang trang ngan nhng t va co the cha khoang cach, khoang dai, dong
miva dang ng dan. Do o, mot lenh co the a ra nhieu dong phc tap
hn ma khong co nhng ac tnh ac biet.
II. Chu giai
Nhng chu giai co the ch nh bang hai cach: ( giong trong C/C++)
Chu giai c viet sau hai dau gach xien (//). c viet tren cung mot dong.
c viet gia /* */, khi viet nhieu dong chu giai.
III. Ch so:
Lu tr so c nh ngha nh la mot con so cua cac bit, gia tr co the la: so
nh phan, bat phan, thap phan, hoac thap luc phan.
V du: 3b001, 5d30 = 5b11110,
16h5ED4 = 16d24276 = 16b0101111011010100
IV. T nh danh:
T nh danh do ngi dung quy nh cho bien so, ten ham, ten moun, ten
khoi va ten trng hp. T nh danh bat au bang mot mau t hoac ng
gach di _ ( khong bat au bang mot con so hoac $ ) va ke ca moi ch so
cua mau t, nhng con so va ng gach di, t nh danh trong Verilog th
phan biet dang ch.
V. Cu phap:
K hieu cho phep:
ABDCEabcdef1234567890_$
Khong cho phep: cac k hieu khac -, &, #, @
VI. Toan t:
Toan t la mot, hai, hoac ba k t dung e thc hien cac toan hang tren bien.
Cac toan t bao gom >, +, &, !=.
VII. T khoaVerilog:
Co nhng t ma phai co y ngha ac biet trong Verilog. V du: assign, case,
while, wire, reg, and, or, nand, va module. Chung khong c dung nh t
nh danh. T khoa Verilog cung bao gom ca ch dan chng trnh bien dch
va System Task (he thong soan thao) va cac ham.

Chuong III
CAC CONG CO BAN
TRONG VERILOG

Cac cong logic c s la mot bo phan cua ngon ng Verilog. Co hai ac tnh c
ch ro la: drive_strenght va delay.
Drive_strenght ch sc ben cua cong. o ben ngo ra la s ket noi mot chieu
en nguon, ke o tao nen s ket noi trong suot trans dan, ket thuc la tong tr
keo len hoac xuong. Drive_strenght thng khong c ch ro, trong trng
hp nay o ben mac nh la strong1 va strong0 .
Delay: neu delay khong c ch ro, th khi o cong khong co tr hoan truyen
tai; neu co hai delay c ch nh, th trc tien la mieu ta tr hoan len, th
hai la tr hoan xuong. Neu ch co mot delay c ch nh, th khi o tr hoan
len xuong la nh nhau. Delay c bo qua trong tong hp. Phng phap cua
s tr hoan ch nh nay la mot trng hp ac biet cua Parameterized
Modules. Cac tham so cho cac cong c s phai c nh ngha trc nh
delay.
I. Cac cong c ban:
Cac cong c ban co mot ngo ra, va co mot hoac nhieu ngo vao. Trong cac
cong, cu phap cu the bieu dien ben di, cac t khoa cua cac cong: and, or,
nand, nor.
1. Cu phap:
GATE (drive_strength)#(delays)
Ten t khoa cong _ten (output, input_1, input_2, , input_N);
Delay: #( len, xuong) hoac #len_va_xuong hoac #( len_va_xuong)
2. V du:
And c1 (o, a, b, c. d); // co 4 ngo vao cong And goi la c1
c2 (p, f, g); // va 2 ngo vao cong and goi la c2
Or #(4,3) ig ( o, b, c); // cong Or c goi la ig, rise time = 4, fall time = 3
Xor #(5) xor1 (a, b, c); // sau 5 n v thi gian th a = b xor c
II. Cong buf, not:
Cac cong nay thc thi em va ao theo theo th t mh san. Chung co mot
ngo vao, hai hay nhieu ngo ra. Cu phap cu the bieu dien ben di, t khoa
buf, not.
1. Cu phap:
Ten t khoa cong _ten (output_1, output_2, , output_N, input);
2. V du:
Not #(5) not_1( a,c); // sau 5 n v thi gian th a = ao c
Buf c1 (o, p, q, r, in); // bo em 5 ngo ra va 2 ngo ra
c2 (p, f, g);
Chuong IV
CAC DANG DU LIEU

I. at gia tr:
Verilog bao gom 4 gia tr c ban. Hau het cac dang d lieu Verilog cha cac
gia tr sau:
0: mc logic 0, hoac ieu kien sai.
1: mc logic 1, hoac ieu kien ung.
X: mc logic tuy nh
Z: trang thai tong tr cao.
X va Z dung co gii han trong tong hp (synthesis)
II. Wire:
Mo ta vat lieu ng day dan trong mot mach ien va c dung e ket noi
cac cong hay cac module. Gia tr cua Wire co the oc, nhng khong c gan
trong ham (function) hoac khoi (block). Wire khong lu tr gia tr cua no
nhng van phai c thc thi bi 1 lenh gan ke tiep hay bi s ket noi Wire
vi ngo ra cua 1 cong hoac 1 module. Nhng dang ac biet khac cua Wire:
Wand(wired_and): gia tr phu thuoc vao mc logic And toan bo bo ieu khien
ket noi en Wire.
Wor (wired_or): gia tr phu thuoc vao mc logic Or toan bo bo ieu khien ket
noi en Wire.
Tri(three_state): tat ca bo ieu khien ket noi en 1 tri phai trang thai tong
tr cao.
1. Cu phap:
Wire [msb:lsb] ten bien wire.
Wand [msb:lsb] ten bien wand.
Wor [msb:lsb] ten bien wor.
Tri [msb:lsb] ten bien tri.
2. V du:
Wire c;
Wand d;
Assign d= a;
Assign d= b;// gia tr d la mc logic cua phep And a va b.
Wire [9:0] A; // vect A co 10 wire.
III. Reg:
Reg (register) la mot oi tng d lieu ma no cha gia tr t mot thu tuc gan
ke tiep. Chung ch c dung trong ham va khoi thu tuc. Reg la mot loai bien
Verilog va khong nhat thiet la thanh ghi t nhien. Trong thanh ghi nhieu bit,
data c lu tr bang nhng ch so khong dau va khong co k hieu uoi m
rong, c thc hien ma ngi s dung co chu y la so bu hai.
1. Cu phap:
Reg [msb:lsb] ten bien reg.
2. V du:
Reg a; // bien thanh ghi n gian 1 bit.
Reg [7:0] A; // mot vect 8 bit; mot bank cua 8 thanh ghi.
Reg [5:0]b, c; // hai bien thanh ghi 6 bit.
IV. Input, Output, Inout:
Nhng t khoa nay bieu th ngo vao, ngo ra, va port hai chieu cua mot module
hoac task. Mot port ngo ra co the c cau hnh t cac dang: wire, reg, wand,
wor, hoac tri. Mac nh la wire.
1. Cu phap:
Input [msb:lsb] port ngo vao.
Output [msb:lsb] port ngo ra.
Inout [msb:lsb] port ngo vao,ra hai chieu.
2. V du:
Module sample (b, e, c, a);
Input a; // mot ngo vao mac nh la kieu wire.
Output b, e; // hai ngo ra mac nh la kieu wire.
Output [1:0] c; /* ngo ra hai bit, phai c khai baotrong mot lenh rieng*/
Reg [1:0] c; // ngo c c khai bao nh mot reg.
V. Integer (So nguyen):
Integer la mot bien a nang. Trong tong hp chung c dung chu yeu cho
vong lap, tham so, va hang so. Chung hoan toan la reg. Tuy nhieu chung cha
d lieu bang nhng so co dau, trong khi o khai bao dang reg cha chung
bang so khong dau. Neu chung cha nhng so ma khong nh ngha thi gian
bien dch th kch thc mac nh la 32 bit. Neu chung cha hang, s tong hp
ieu chnh cac so co kch thc nho nhat can thiet cho s bien dch.
1. Cu phap:
Integer ten bien nguyen;
ten hang nguyen;
2. V du:
Integer a; // so nguyen n gian 32bit.
Assign b= 63; // mac nh la mot bien 7 bit.
VI. Supply 0, Supply1:
Xac nh cho ng dan len mc logic 0 ( at), logic 1( nguon) theo th t
nh san.
VII. Time:
Time la mot lng 64 bit ma c s dung cung vi $time, he thong thao tac
cha lng thi gian mo phong. Time khong c ho tr tong hp va v the
ch c dung trong muc ch mo phong.
1. Cu phap:
Time bien time;
2. V du:
Time c;
c = $time; // c = thi gian mo phong dong ien.
VIII. Parameter (Tham so):
Mot Parameter xac nh 1 hang so ma c at khi ban cho v du cu the la
mot module. Cac nay cho phep ta co the sa cha.
1. Cu phap:
Parameter par_1= gai tr, par_2= gai tr, ;
Parameter [gii han] par_3 = gia tr;
2. V du:
Parameter add = 2b00, sub = 3b111;
Parameter n = 4;
Parameter [3:0] par_2 = 4b1010;

reg [n-1:0] harry;// mot thanh ghi 4 bt ma o rong c at bi tham so n
tren.
always @(x)
y = {{(add - sub) {x}}}
if (x) begin
state = par_2[1];
else
state =par_2[2];
end.
ChuongV
TOAN TU

I. Toan t so hoc:
Nhng toan t nay thc hien cac phep tnh so hoc. Dau + va - co the c
s dung mot trong hai toan t n (-z) hoac kep (x - y).
1. Toan t:
+, -, *,

/, %.
2. V du:
parameter n = 4;
Reg[3:0] a, c, f, g, count;
f= a +c;
g= c n;
count = (count +1) % 16; // co the em t 0 en 15.
II. Toan t quan he:
Toan t quan he so sanh hai toan hang va tra ve mot n bit la 0 hoac 1.
Nhng toan t nay tong hp vao dung cu so sanh. Bien Wire va Reg la nhng
bien dng. V the, (-3b001) = (3b111) va (-3b001) > ( 3b110) nhng neu la
so nguyen th -1< 6.
1. Cac toan t quan he:
<, <=, >, >=, = =, !=.
2. V du:
If (x= =y) e =1;
Else e= 0;
// so sanh hai vector a, b
reg [3:0] a, b;
if (a[3] = =b [3]) a[2:0] >b[2:0];
else b[3];
III. Toan t bit_wire:
So sanh tng bit hai toan toan hang.
1. Cac toan t:
~ (bitwire NOT), & (bitwire AND), | (bitwire OR), ^ (bitwire XOR), ~^ hoac
^~ (bitwire XNOR).
2. V du:
Module and2(a, b, c);
Input [1:0] a, b;
Output [1:0] c;
Assign c = a & b;
Endmodule
IV. Toan t logic:
Toan t logic tra ve 1 bit n 0 hoac 1. chung giong nh toan t bitwire ch la
nhng toan hang n bit. Chung co the lam viec tren bieu thc, so nguyen
hoac nhom bit, va coi nhu tat ca cac gia tr khong bang 0 la 1. Toan t logic
c dung nhieu trong lenh ieu kien (if else), khi chung lam viec tren bieu
thc.
1. Toan t:
!(NOT), && (AND), || (OR)
2. V du:
Wire [7:0] x, y, z;
Reg a;

if ((x= = y)&&(z)) a=1;
else a=! x;
V. Toan t bien oi:
Co tac dung tren tat ca cac bit cua mot vect toan hang va tra ve gia tr n
bit. Nhng toan t nay la hnh thc t oi so cua cac toan t bitwire tren.
1. Cac toan t:
~ (bien oi NOT), & (bien oi AND), ~&( bien oi NAND), | (bien oi OR), ~|
(bien oi NOR), ^ (bien oi XOR), ~^ hoac ^~ (bien oi XNOR).
2. V du:
Module chk_zero (a,z);
Input [2:0] a;
Output z;
Assign z = ~| a;
Endmodule
VI. Toan t ghep:
Dch toan t au bang ch so cua cac bit c nh ngha bi toan t thou hai.
V tr con trong se c ien vao vi nhng so 0 cho ca hai trng hp dch
trai hoac phai.
1. Toan t:
<< ( dch trai), >> (dch phai).
2. V du:
assign c = a<<2; c = a dch trai 2 bit cac cho trong c ien vi nhng so 0.
VII. Toan t dch:
Ghep hai hoac nhieu toan hang thanh mot vect ln.
1. Toan t:
{} (concatenation)
2. V du:
Wire [1:0] a, b;
Wire [2:0] x;
Wire [3:0] y, Z;
Assign x = {1b0, a}; // x[2] = 0, x[1] = a[1], x[0] = a[0].
Assign y = {a, b}; // y[3]= a[1], y[2] = a[0], y[1] = b[1], y[0] = b[0].
VIII. Toan t th ban:
Tao ra nhieu ban sao cua mot muc chon.
1. Toan t:
{n{ muc chon }} n nhom th ban trong mot muc chon.
2. V du:
Wire [1:0] a, b;
Wire [3:0] x;
Assign x = {2{1b0},a}; // x= {0, 0, a}.
IX. Toan t ieu kien:
Giong nh C/C
++
. Chung nh gia mot trong hai bieu thc c ban trong mot
ieu kien. No se tong hp thanh bo a cong (MUX).
1. Toan t :
(ieu kien)? ket qua khi ieu kien ung : ket qua khi ieu kien sai.
2. V du:
assign a = (g) ? x : y;
Assign a = ( inc = =2) ? a+1: a-1;
X. Th t toan t:
Nhng toan t trong mc giong nhau nh gia t trai sang phai
Toan t Ten
[ ] Chon bit, chon phan
( ) Phan trong ngoac n
!, ~ Mc logic va bit_wire NOT
&, |, ~&, ~|, ^, ~^ Bien oi: AND, OR, NAND, NOT, XOR, XNOR.
+, - Dau ch so am so dng.
{ } Ghep noi { 3b101,3b110} = 6b101110
{{ } } Th ban {3{3b101 } }=9b101101101
*, /, % Nhan, chia, phan tram.
+, - Cong tr nh phan.
<<, >> Dch trai, phai.
<, <=, >, >= Dau so sanh. Bien Reg va wire c lay bang nhng so
dng.
= =, != Bang va khong bang trong toan t logic.
& Bit_wire AND, and tat ca cac bit vi nhau.
^, ~^ Bit_wire XOR, Bit_wire XNOR.
| Bit_wire OR.
&&, || Toan t logic AND, OR.
?: x = ( ieu kien ) T:F
Chuong VI
TOAN HANG

I. Literals (dang k t):
La toan hang co gia tr khong oi ma c dung trong bieu thc Verilog. Co
hai dang k t la:
Chuoi: la mot mang co nhieu k t c at trong dau .
Ch so: la nhng so khong oi, nh phan, bat phan, thap phan, hoac so hex.
1. Cu phap cac ch so:
nF dddd
Trong o:
n : so nguyen mieu ta so bit.
F: mot trong bon nh dang sau: b( so nh phan), o( so bat phan), d( so thap
phan), h( so hex).
2. V du:
time is// chuoi k t.
267 // mac nh 32 bit so thap phan.
2b01 // 2 bit nh phan.
20h B36E // 20 bit so hex.
o62 // 32 bit bat phan.
II. Chon 1 phan t bit va chon 1 phan cac bit.
ay la s la chon mot bt n hoac mot nhom bit theo th t, t mot wire,
reg hoac t tham so at trong ngoac [ ]. Chon 1 phan t bit va chon 1 phan cac
bit co the c dung nh la cac toan hang trong bieu thc bang nhieu cach
thc giong nhau ma cac oi tng d lieu goc c dung.
1. Cu phap:
Ten bien [ th t bit].
Ten bien [ msb: lsb].
2. V du:
Reg [7:0] a, b;
Reg [3:0] ls;
c = a[7] & b[7];
ls = a[7:4] + b[3:0];
III. Goi ham chc nang:
Gia tr tra ve cua mot ham co the c dung trc tiep trong bieu thc ma
khong can gan trc cho bien reg hoac wire. Goi ham chc nang nh la mot
trong nhng toan hang. Chieu rong bt cua gia tr tra ve chac chan c biet
trc.
1. Cu phap:
Ten ham(danh sach bien).
2. V du:
Assign a = b & c & chk_bc(b, c);
Function chk_bc;
Input c, b;
Chk_bc = b^ c;
Endfunction
IV. Wire, reg, va tham so:
Wire, reg, va tham so co the uc dung nh la cac toan hang trong bieu thc
Verilog.
Chuong VII
MODULES

I. Khai bao modules:
Mot module la ban thiet ke chu yeu ton tai trong Verilog. Dong au tien cua
khai bao module ch ro danh sach ten va port (cac oi so). Nhng dong ke tiep
ch ro dang I/O (input, output, hoac inout) va chieu rong cua moi port. Mac
nh chieu rong port la 1 bit.
Sau o, nhng bien port phai c khai bao wire, wand, , reg. Mac nh la
wire. Nhng ngo vao ac trng la wire khi d lieu c chot bean ngoai
module. Cac ngo ra la dang reg neu nhng tn hieu cua chung c cha trong
khoi always hoac initial.
1. Cu phap:
Module ten module (danh sach port);
Input [msb:lsb] danh sach port ngo vao;
Output [msb:lsb] danh sach port ngo ra;
Inout [ msb:lsb ] danh sach port vao_ ra;
cac lenh
endmodule
2. V du:
Module add_sub(add, in1, in2, out);
Wire, reg, va tham so:
Input[7:0 ] in1, in2;
Wire in1, in2;
Output [7:0] out;
Reg out;
cac lenh khac
Endmodule

II. Ch nh lien tiep:
Cac ch nh lien tiep c dung e gan mot gia tr len tren mot wire trong
mot module. o la cac ch nh thong thng ben ngoai khoi always hoac khoi
initial. Cac ch nh lien tiep c thc hien vi mot lenh gan (assign) ro rang
hoac bang s ch nh mot gia tr en mot wire trong luc khai bao. Chu y rang,
cac lenh ch nh lien tiep th ton tai va c chay lien tuc trong suot qua
trnh mo phong. Th t cac lenh gan khong quan trong. Moi thay oi ben phai
cua bat c ngo vao se lap tc thay oi ben trai cua cac ngo ra.
1. Cu phap:
Wire bien wire = gia tr;
Assign bien wire = bieu thc;
2. V du:
Wire [ 1:0 ] a = 2b 01;
Assign b = c &d;
Assign d = x | y;
III. Module instantiations:
Nhng khai bao module la nhng khuon mau ma no c tao nen t cac oi
tng thc te ( instantiation). Cac module n c ben trong cac module khac,
va moi dan chng tao mot oi tng oc nhat t khuon mau. Ngoai tr o la
module mc tren la nhng dan chng t chnh chung.
Cac port cua module v du phai thoa nhng dnh ngha trong khuon mau. ay
la mat ly thuyet: bang ten, s dung dau cham(.) .ten port khuon mau ( ten
cua wire ket noi en port). Bang v tr, at nhng port nhng v tr giong
nhau trong danh sach port cua ca khuon mau lan instance.
1. Cu phap:
Ten instance1 (danh sach ket noi port );
Ten instance2(danh sach ket noi port);

2. V du:
// nh ngha module
module and4(a,b,c);
input [3:0]a,b;
output [3:0]c;
assign c = a&b;
endmodule
// module instantiations
wire [3:0] in1, in2;
wire [3:0] o1, o2;
// at v tr
and4 C1(in1, in2,o1);
// ten
and4 C2(.c(o2), .a(in1), .b(in2));
Chuong VIII
KHUON MAU HANH VI
(BEHAVIORALJ

Verilog co 4 mc khuon mau:
Chuyen mach. Khong c e cap en ay.
Cong.
Mc tran d lieu.
Hanh vi hoac thu tuc c e cap ben di
Cac lenh thu tuc Verilog c dung tao mot mau thiet ke mc cao hn. Chung
ch ra nhng cach thc manh cua vec lam ra nhng thiet ke phc tap. Tuy nhien,
nhng thay oi nho n phng phap ma hoa co the gay ra bien oi ln trong phan
cng. Cac lenh thu tuc ch co the c dung trong nhng thu tuc.
I. Nhng ch nh theo thu tuc:
La nhng ch nh dung trong pham vi thu tuc Verilog (khoi always va initial).
Ch bien reg va integers (va chon n bit/ nhom bit cua chung, va ket noi
thong tin) co the c at ben trai dau = trong thu tuc. Ben phai cua ch nh
la mot bieu thc ma co the dung bat c dang toan t nao.
II. Delay trong ch nh:
Trong ch nh tre t la khoang thi gian trai qua trc khi mot lenh c thc
thi va ben trai lenh gan c tao ra. Vi nhieu ch nh tre (intra-assignment
delay), ben phai c nh gia tr trc tiep nhng co mot delay cua t trc
khi ket qua c at ben trai lenh gan. Neu them mot qua trnh thay oi na
canh ben phai tn hieu trong khoang thi gian t,th khong cho ket qua ngo
ra. Delay khong c ho tr bi cac cong cu.
1. Cu phap ch nh thu tuc:
Bien = bieu thc;
Ch dnh tre:
#t bien = bieu thc;
intra_assignment delay:
bien = #t bieu thc.
2. V du:
Reg [6:0] sum; reg h, zilch;
Sum[7] = b[7]^c[7]; // thc thi tc thi;
Ziltch = #15 ckz & h; // ckz & h nh gia tr tc thi; ziltch thay oi sau 15 n
v thi gian.
#10 hat = b & c;/* 10 n v thi gian sau khi ziltch thay oi, b & c c nh
gia va hat thay oi*/
III. Ch nh khoi:
Ch nh khoi (=) thc hien lien tuc trong th t lenh a c viet. Ch nh
th hai khong c thc thi neu nh ch nh au cho hoan thanh.
1. Cu phap:
Bien = bieu thc;
Bien = #t bieu thc;
#t bien = bieu thc;
2. V du:
Initial
Begin
a = 1; b = 2; c = 3;
#5 a = b + c; // sau 5 n v thi gian thc hien a = b + c = 5.
d = a; // d = a = 5.
Always @(posedge clk)
Begin
Z = Y; Y = X; // thanh ghi dch.
y = x; z = y; // flip flop song song.
IV. Begin end:
Lenh khoi begin end c dung e nhom mot vai lenh ma mot lenh cu phap
c cho phep. Bao gom function, khoi always va khoi initial. Nhng khoi nay
co the c tuy y goi ten. Va bao gom khai bao reg, integer, tham so.
1. Cu phap:
Begin: ten khoi
Reg[msb:lsb] danh sach bien reg;
Integer [msb:lsb] danh sach integer;
Parameter [msb:lsb] danh sach tham so;
cac lenh
End
2. V du:
function trivial_one;// ten khoi la: trivial_one
input a;
begin: adder_blk
integer i;
lenh
end
V. Vong lap for:
Giong nh c/c
++
c dung e thc hien nhieu lan mot lenh hoac khoi lenh.
Neu trong vong lap ch cha mot lenh th khoi begin end co the bo qua.
1. Cu phap:
For (bien em = gia tr 1; bien em </ <=/ >/ >= gia tr 2;
bien em = bien em +/- gia tr)
begin
lenh
end
2. V du:
For (j = 0; j<=7; j = j+1)
Begin
c[j] = a[j] & b[j];
d[j] = a[j] | b[j];
end
VI. Vong lap while:
Vong lap while thc hien nhieu lan mot lenh hoac khoi lenh cho en khi bieu
thc trong lenh while nh gia la sai.
1. Cu phap:
While (bieu thc)
Begin
cac lenh
end
2. V du:
While (!overflow)
@(posedge clk);
a = a +1;
end
VII. Khoi lenh if else if else:
Thc hien mot lenh hoac mot khoi lenh phu thuoc vao ket qua cua bieu thc
theo sau menh e if.
Cu phap
If (bieu thc)
Begin
cac lenh
end
else if (bieu thc)
Begin
cac lenh
end
else
Begin
cac lenh
end
VIII. Case:
Lenh case cho phep la chon trng hp. Cac leng trong khoi default thc thi
khi khong co trng hp la chon so sanh giong nhau. Neu khong co s so
sanh, bao gom ca default, la ung, s tong hp se tao ra chot khong mong
muon.
1. Cu phap:
Case (bieu thc)
Case 1:
Begin
cac lenh
end
Case 2:
Begin
cac lenh
end
Case 3:
Begin
cac lenh
end

default:
begin
cac lenh
end
endcase
2. V du:
Case (alu_clk)
2b00: aluout = a + b;
2b01: aluout = a - b;
2b10: aluout = a & b;
default:
aluout = 1bx;
endcase
Chuong IX
KHOI ALWAYS VA
KHOI INITIAL

I. Khoi always:
La cau truc chn trong khuon mau RTL (Register Transfer Level). Giong ch
nh lien tuc, ay la trang thai ton tai ma c thc thi lien tuc trong khi mo
phong. Cai nay cung co ngha la tat ca cac khoi always trong mot module thc
thi mot cach lien tuc. Khoi always co the c dung trong chot, flip flop hay
cac ket noi logic. Neu cac lenh cua khoi always nam trong pham vi khoi
begin end th c thc thi lien tuc, neu nam trong khoi fort join, chung
c thc thi ong thi (ch trong mo phong).
Khoi always thc hien bang mc, canh len hoac canh xuong cua mot hay
nhieu tn hieu (cac tn hieu cach nhau bi t khoa OR).
Cu phap:
Always @(s kien 1 or s kien 2 or)
Begin
cac lenh
end
Always @(s kien 1 or s kien 2 or)
Begin: ten khoi
cac lenh
end
II. Khoi initial
Giong nh khoi always nhng khoi initial ch thc thi mot lan t luc bat d8au
cua qua trnh mo phong. Khoi nay th tieu bieu e bien khi chay va ch nh
dang song tn hieu trong luc mo phong.
1. Cu phap:
Initial
Begin
cac lenh
end
2. V du:
Initial
Begin
Clr = 0;
Clk = 1;
End
Initial
Begin
a = 2b00;
#50 a = 2b01;
#50 a = 2b10;
end
Chuong X
HAM

Ham c khai bao trong pham vi mot module, va co the c goi t nhng lenh
lien tuc, khoi always, hoac nhng ham khac. Trong lenh ch nh lien tuc, cung
c ch nh lien tuc khi bat k cac ham khai bao ngo vao thay oi. Trong chng
trinh chung c ch dng ti khi can goi.
Cac ham mo ta s ket noi logic, va khong tao ra chot. Do o mot lenh if ma khong
else se mo phong , mac du no co chot d lieu nhng mo phong th khong co. ay la
trng hp d cua tong hp khong co mo phong theo sau. ay la khai niem tot e
ma hoa ham, v vay chung se khong tao ra chot neu ma ham c dung trong mot
chng trnh.
I. Khai bao ham:
Khai bao ham la ch ra ten ham, chieu rong cua ham gia tr tra ve, oi so ham
d lieu vao, cac bien (reg) dung trong ham, va tham so cuc bo cua ham, so
nguyen cua ham.
1. Cu phap:
Function [msb:lsb] ten ham;
Input [msb:lsb]bien vao;
Reg [msb:lsb]bien reg;
Parameter [msb:lsb] tham so;
Integer [msb:lsb] so nguyen;
cac lenh
endfunction
2. V du
Function [7:0] my_func; // ham tra ve gia tr 8 bit
Input [7:0] i;
Reg [4:0] temp;
Integer n;
temp = i[7:4]| (i[3:0]);
my_func = {temp,i[1:0]};
endfunction
II. V du:
Mot ham ch co cha mot d lieu ra. Neu co nhieu hn mot gia tr tra ve c
yeu cau, ngo ra se phai ket noi tao thanh mot vector trc khi at gia tr cho
ham e goi ten ham. Goi ten chng trnh module co the trch ra sau o, rieng
oi vi ngo ra t cac bieu mau noi vao nhau. V du di ay minh hoa tong
quat cach dung va cu phap ham trong verilog.
1. Cu phap:
Ten ham = bieu thc.
2. V du:
Module simple_processor (instruction, outp);
Input [31:0] instruction;
Output [7:0] outp;
Reg [7:0] outp;// co the c gan trong khoi always.
Reg func;
Reg [7:0] opr1, opr2;
Function[16:0] decode add(instr)
Input [31:0] instr;
Reg add_func;
Reg [7:0] opcode, opr1, opr2;
Begin
Opcode = instr[31:24];
Opr1 = instr[7:0];
Case (opcode)
8b 10001000:
begin
add_func = 1;
opr2 = instr[15:8];
end
8b 10001001:
begin
add_func = 0;
opr2 = instr[15:8];
end
8b 10001010: begin
add_func = 1;
opr2 = 8b 00000001;
end
default: begin
add_func = 0;
opr2 = 8b00000001;
end
endcase
decode_add = {add_func, opr2, opr1};
end
endfunction
always @(intruction) begin
{func, opr2, opr1}= decode_add (intruction);
if (func= =1)
outp = opr1+ opr2;
else
outp = opr1 opr2;
end
endmodule
Chuong XI
CHUC NANG LINH KIEN

Chot d lieu (latches): c suy neu mot bien, mot trong cac bit khong c gan
trong cac nhanh cua mot lenh if. Chot d lieu cung c suy ra t lenh case neu
mot bien c gan ch trong mot vai nhanh.
Hoan thien ma co the oc c dung lenh if e tong hp chot v that kho e ch
nh ro rang. Theo ly thuyet, mot s xac lap hp l nen c suy ra t ma Verilog.
Cu phap:
If else if else va case.
I. Thanh ghi Edge_triggered, flip_flop, bo em:
Mot thanh ghi (flip_flop) c suy luan bang viec dung xung kch canh len
hoac xuong trong danh sach s kien cua lenh khoi always.
Cu phap:
Always @(posedge clk or posedge reset1 or nesedge reset2)
Begin
If (reset1) begin
Cac ch nh reset
end
else if (reset2) begin
Cac ch nh reset
End
Else begin
Cac ch nh reset
End
II. Bo a cong:
c suy ra bi viec gan mot bien ma gia tr moi bien khac nhau trong moi
nhanh cua lenh if hoac case. Co the tranh cac ch nh va moi nhanh co the
ton tai bang viec s dung ngoai nhng nhanh mac nh. Chu y rang chot se
c tao ra neu mot bien khong c gan cho cac ieu kien nhanh co the ton
tai.
e hoan thien ma co the oc c, dung lenh case e tao mau a cong ln.
III. Bo cong, tr:
Toan t cong tr trong bo cong tr ma co chieu rong phu thuoc vao chieu rog
cua toan t ln hn.
IV. Bo em 3 trang thai:
Bo em ba trang thai c suy ra neu bien c gan theo ieu kien gia tr
tong tr cao Z dung mot trong cac toan t: if, case,
V. Cac linh kien khac:
Hau het cac cong logic c suy ra t viec dung nhng toan hang tng ng
cua chung. Nh mot s la chon mot cong hoac mot thanh phan co the c
giai thch ro rang bang v du cu the va s dung cac cong c s (and, or, nor,
inv) mien la bang ngon ng Verilog.
Chuong XII
MOT SO V DU

I. Cau truc mot chng trnh dung ngon ng Verilog:

// Khai bao module
Module ten chng trnh (ten bien I/O); // ten chng trnh trung ten file.v.
Input [msb:lsb] bien;
Output [msb:lsb] bien;

Reg [msb:lsb] bien reg;
Wire [msb: lsb] bien wire;

// Khai bao khoi always, hoac khoi initial.
cac lenh

Endmodule

II. Mot so v du:
Phan men ho tr: MAX+plusII 10.0 BASELINE
1. V du 1:
a. Chng trnh tnh NOR cac bit cua bien vao

module vdcong(in,out);
input[3:0] in;
output out;

assign out= ~|in;

endmodule

b. Mo phong

2. V du 2:
a. Chng trnh cong hai bien bon bit

module adder (sum_out, carry_out, carry_in, ina, inb);
output [3:0]sum_out;
input [3:0]ina, inb;
output carry_out;
input carry_in;

wire carry_out, carry_in;
wire[3:0] sum_out, ina, inb;

assign
{ carry_out, sum_out } = ina + inb + carry_in;

Endmodule

b. Mo phong

3. V du 3:
a. Chng trnh giai ma 2 sang 4

module dec2to4 (w, en, y);
input [1:0] w;
input en;
output[3:0] y;

wire[1:0]w;
reg[3:0]y;
wire en;

always @(w or en)

begin
if(en==1'b1)
begin

case(w)
2'b00: y<=4'b1000;
2'b01: y<=4'b0100;
2'b10: y<=4'b0010;
default:y<=4'b0001;

endcase
end

else
y<= 4'b0000;
end

endmodule

b. Mo phong

4. V du 4:
a. Bo don kenh 2 sang 1

module mux12(w0, w1, s, y);
input w0, w1;
input s;
output y;

wire w0, w1, s;
reg y;

always @(w0 or w1 or s)

begin
if(s==1)
y = w0;
else
y = w1;
end

endmodule

b. Mo phong

5. V du 5:
a. Chng trnh don kenh 4 sang 1

module mux14(w0, w1, w2, w3, s, y);
input w0, w1, w2, w3;
input[1:0] s;
output y;

wire w0, w1,w2,w3;
reg y;

always @(w0 or w1 or s)

begin
case (s)
2'b00: y=w0;
2'b01: y=w1;
2'b10: y=w2;
default: y = w3;

endcase

end

endmodule

b. Mo phong

6. V du 6:
a. Chng trnh oi BCD sang bay oan

Module mp_led(bcd,led);
input [3:0] bcd;
output [7:0] led;

wire [3:0] bcd;
reg [7:0] led;

always @(bcd)

begin
case(bcd)
4'b0000: led = 8'b00000011;
4'b0001: led = 8'b10011111;
4'b0010: led = 8'b00100101;
4'b0011: led = 8'b00001101;
4'b0100: led = 8'b10011001;
4'b0101: led = 8'b01001001;
4'b0110: led = 8'b01000001;
4'b0111: led = 8'b00011111;
4'b1000: led = 8'b00000001;
4'b1001: led = 8'b00001001;
default: led = 8'b00000000;
endcase

end

endmodule

b. Mo phong

7. V du 7:
a. Chng trnh giam t 9 xuong 0, hien th ra led 7 oan

module bcd (clock, rst, s1, led, digit1);
input clock, s1, rst;
output [7:0] led;
output digit1;

reg [7:0] led;
reg [3:0] bcd;
wire digit1;
assign digit1 = 1'b1;

always @(posedge clock )
begin
if (rst == 1'b1) bcd <= 4'b1001;
else if (s1 == 1'b1) bcd <= bcd - 1'b1;
if (bcd == 4'b0) bcd <= 4'b1001;
end

always @(posedge clock)
begin
case(bcd)
4'b0000: led = 8'b11111100;
4'b0001: led = 8'b01100000;
4'b0010: led = 8'b11011010;
4'b0011: led = 8'b11110010;
4'b0100: led = 8'b01100110;
4'b0101: led = 8'b10110110;
4'b0110: led = 8'b10111110;
4'b0111: led = 8'b11100000;
4'b1000: led = 8'b11111110;
4'b1001: led = 8'b11100110;
endcase

end

endmodule
b. Mo phong

8. V du 8:
a. Chng trnh tang t 0 en 9, hien th ra led 7 oan

module bcdtang (clock, rst, s1, led, digit1);
input clock, s1, rst;
output [7:0] led;
output digit1;

reg [7:0] led;
reg [3:0] bcd;
wire digit1;
assign digit1 = 1'b1;

always @(posedge clock )
begin
if (rst == 1'b1) bcd <= 4'b0;
else if (s1 == 1'b1) bcd <= bcd + 1'b1;
if (bcd == 4'b1001) bcd <= 4'b0000;
end

always @(posedge clock)
begin
case(bcd)
4'b0000: led = 8'b11111100;
4'b0001: led = 8'b01100000;
4'b0010: led = 8'b11011010;
4'b0011: led = 8'b11110010;
4'b0100: led = 8'b01100110;
4'b0101: led = 8'b10110110;
4'b0110: led = 8'b10111110;
4'b0111: led = 8'b11100000;
4'b1000: led = 8'b11111110;
4'b1001: led = 8'b11100110;
endcase

end

endmodule

b. Mo phong


TAI LIEU THAM KHAO

1. Verilog Digital System Design
Zainalabedin Navadi
Northeastern University
University of Tehran
2. Introduction of Verilog
Peter M. Nyasulu
3. Cadence Verilog XL Reference Manual
4. Synopsys HDL Compiler for Verilog Reference Manual
5. Diglab 10K10 Mannual


TOM TAT BAI GIANG

VHDL

Very High speed integrated circuit Description Language

LU HANH NOI BO
07/2005
Bi ging Thit K H Thng S Phn VHDL
VHDL
Very High speed integrated circuit Description Language

I. CU TRC CA MT THIT K DNG NGN NG VHDL.
---------------------------------
-- Ghi ch
---------------------------------
PACKAGE
library
use
ENTITY
ARCHITECTURE
CONFIGURATIONS

(Ty chon)
(Thu vin)
(Bt buc)
(Bt buc)
(Ty chon)

1. PACKAGE (KHI).
Package l mt vng luu tru cc du liu dng chung cho cc entity.
M ta du liu bn trong mt package cho php uoc tham khao boi mt entity khc, v
vy du liu c th uoc dng chung.
Mt package bao gm 2 phn: phn m ta inh nghia giao din cho package, phn
thn n inh cc hoat ng cu th cua package.
C php khai bo khi uoc xc inh l:
PACKAGE example_arithmetic IS
-- cc khai bo khi c th cha cc khai bo sau:
- Subprogram declaration.
- Type, subtype declaration.
- Constant, deferred constant declaration.
- Signal declaration creates a global signal.
- File declaration.
- Alias declaration.
- Attribute declaration, a user-define attribute.
- Attribute specification.
- Use clause.
END example_arithmetic;
Tt ca cc i tuong khai bo trong package c th uoc truy xut boi bt ky mt thit
k no bng cch su dung mnh use v khai bo library.
library my_lib;
use my_lib.example_arithmetic.all;
Mt s thu vin chun
library ieee;
use ieee.std_logic_1164.all;
std_logic_1164: l thu vin logic chun cua IEEE (oan 1164), muc ch cung cp
cc chun co ban c th m ta cc kiu du liu kt ni trong VHDL.
std_logic_arith: l thu vin chua tp cc php ton v hm
Kiu std_logic c th c cc gi tri
U Uninitialized
X Unknown
0 Zero
1 One
Z Tristate (Must be upper case!)
W Weak unknown
L Weak Zero
H Weak One
- Don't care
Ngoi ra c th tu tao ring cc thu vin trong thit k.
2. ENTITY
Khai bo entity chi dng m t ng vo v ng ra cua mt thit k. Muc cao nht
cua bt ky mt thit k VHDL l mt khai bo entity on, khi thit k trong VHDL, tn
cua file luu tru phai trng voi tn theo sau cua tu kha entity.
V d, m ta b cng bn phn sau

X1

A1
A
SUM
CARRY
B
library ieee;
ENTITY HALF_ADDER IS
PORT( A,B : IN BIT;
SUM,CARRY : OUT BIT);
END HALF_ADDER;

Trong khai bo ENTITY, c 4 kiu tn hiu khc nhau:
IN: m ta cc ng vo entity. Kiu IN th uoc su dung cho cc ng vo clock, cc
ng vo iu khin,
OUT: m ta dng du liu i ra khoi entity, entity s khng th oc cc tn hiu ny,
kiu OUT chi uoc su dung khi tn hiu khng uoc su dung boi bt ky kiu no
trong entity.
BUFFER: Kiu tn hiu ny m ta dng du liu i ra khoi entity, nhung entity c
th oc nhung tn hiu ny (muc ch oc lai tn hiu ng ra o bn trong cua cu
trc). Tuy nhin , tn hiu s khng th iu khin tu ng ra cua entity, v vy n
khng th uoc su dung cho cc du liu ng vo.
INOUT: Kiu tn hiu ny cho php tn hiu c th c ca hai kiu: vo v ra, khi
khai bo tn hiu theo kiu INOUT th tn hiu c th uoc iu khin tu ng ra cua
entity. Kiu tn hiu ny chi nn su dung khi tht cn thit(v du nhu bus du kiu 3
trang thi), v khi su dung kiu tn hiu ny th m cua chuong trnh s tro nn kh
hiu hon i voi nguoi thit k.
Loai tn hiu cung phai uoc m ta trong khai bo PORT, loai tn hiu s m ta cc gi
tri m tn hiu c th uoc n inh, ngoi ra c th m ta mt vector nhung tn hiu
c cng loai.
Luu : trong file report, nu khng gn chn linh kin th cc bin ng vo v ra s
uoc gn ngu nhin. D gn cc chn, c th thuc hin tu phn mm h tro hoc thuc
hin nhu sau:
V d,
ENTITY my_design is
Port (a, b : in integer range 0 to 7;
c : bit_vector (3 to 5);
d : bit_vector (27 downto 25);
e : out Boolean);
attribute pinnum: string;
attribute pinnum of c: signal is "1,2,3";
attribute pinnum of d: signal is "6,5,4";
attribute pinnum of e: signal is "2";
END my_design;

3. ARCHITECTURE.
Chuc nng cua architecture l m ta mi lin h giua cc tn hiu ng vo v tn hiu
ng ra ( bao gm ca nhung tn hiu BUFFER), c th vit nhiu kin trc khc nhau
trong mt entity, nhung chi mt trong s c kha nng xut hin trong m VHDL.
architechture c 3 dang: m ta cu trc (structure); m ta dng du liu (data flow); m
ta hnh vi (behavioral)

M t architechture di dng cu trc (structure)
V d, chuong trnh b cng trn s c dang:
PORT( A,B : IN BIT;
END HALF_ADDER;
ARCHITECTURE HA_STRUCTURE OF HALF_ADDER IS
Component XOR2
Port(X,Y: in BIT; Z: out BIT);
End component
Component AND2
Port(L,M: in BIT; N: out BIT);
End component
BEGIN
X1: XOR2 port map (A,B,SUM);
A1: AND2 port map (A,B,CARRY);
END HA_STRUCTURE;
Ch , trong truong hop ny cc tn hiu trong Port Map(nh xa cng) cua i tuong
trong thnh phn ny v cc tn hiu trong khai bo phai uoc lin kt theo vi tr
M t architechture di dng dng d liu (data flow)
PORT( A,B : IN BIT;
END HALF_ADDER;
BEGIN
SUM<=A xor B;
CARRY<=A and B;
END HA_STRUCTURE;
M hnh dng du liu su dung pht biu gn tn hiu ng thoi, k hiu <= chi gi tri
uoc gn cho tn hiu. Php gn uoc thuc hin khi c 1 su kin tn hiu cua biu thuc
bn phai.

M t architechture di dng hnh vi (behavioral)
Kiu m ta hnh vi bao gm tp hop thu tu cc php gn tn hiu tun tu uoc khai bo
bn trong pht biu process.
Bin uoc khai bo trong process l bin cuc b. Tn hiu khng uoc khai bo trong
process
PORT( A,B : IN BIT;
END HALF_ADDER;
BEGIN
Process(A,B);
Begin
SUM<=A xor B;
CARRY<=A and B;
End process;
END HA_STRUCTURE;
V d, m ta mt D-FF:

CK

D Q
Q

ENTITY DFF IS
PORT( D,CK : IN BIT;
Q : OUT BIT);
END DFF;
ARCHITECTURE DFF_BEHAVIOR OF DFF IS
BEGIN
Process(CK);
Begin
If rising_edge(ck) then
Q<=D;
End if;
End process;
END DFF_BEHAVIOR ;
M t architechture di dng hn hp (mixed style)
C th trn ln 3 kiu trong mt architechture
V d, m t mch cng ton phn (FULL_ADDER) sau

:

dataflow structure
A
B

X1

Cin

behavior
SUM
CARRY
ENTITY FULL_ADDER IS
PORT( A,B,CIN : IN BIT;
SUM, COUT : OUT BIT);
END DFF;
ARCHITECTURE FA_MIXED OF FULL_ADDER IS
Component XOR2
Port(X,Y: in BIT; Z: out BIT);
End component
Signal S1: BIT --Khai bo tn hiu cc b trong architechture
BEGIN
X1: XOR2 port map (A,B,S1); --structure
Process(A,B,CIN); --behavior
Variable T1,T2,T3: BIT;
Begin
T1:=A and B;
T2:=A and CIN;
T3:=B and CIN;
COUT<=T1 or T2 or T3;
End process;
SUM<=S1 xor CIN; --dataflow
END FULL_ADDER;
4. CONFIGURATION
Configuration dng lin kt cc hop phn toi entity
configuration ban u c th uoc n inh toi rt nhiu architecture trong mt entity.

Dinh cu hnh cho php m phong cc thit k o thnh phn con, d dng kim tra
uoc thit k hon mt chuong trnh lon.
Mt cu hnh uoc dng ni tung cp nhu sau:
ENTITY component_i IS
ARCHITECHTURE
Behavioral
OF
component_i
IS
.
ARCHITECHTURE
dataflow
OF
component_i
IS
.
ARCHITECHTURE
Structural
OF
component_i
IS
.
Mt thn architecture toi khai bo entity cua n.
Mt component voi mt entity.
V d, xy dung mt entity FULL_ADDER o trn c th tch ra lm ba architecture
body: FA_BEHAVIOR, FA_STRUCTURE, v FA_MIXED. Mt architecture bt ky
c th uoc chon bng cch c ta mt configuration thch hop.
Library HS_LIB, CMOS_LIB;
ENTITY FULL_ADDER IS
Port(A,B,Cin : IN BIT; SUM, Cout: OUT BIT);
END FULL_ADDER;

ARCHITECTURE FA_STR OF FULL_ADDER IS
Component XOR2
Port(D1,D2 : IN BIT; DZ : OUT BIT);
END componen;
Component AND2
Port ( Z: OUT BIT; B0,B1: IN BIT);
END Component;

-- Ac t cu hnh:
CONFIGURATION FA_BINDING OF FULL_ADDER IS
For FA_STR
For X1,X2 : XOR2
use entity WORK.XOR2(XOR2BEH);
End for;
-- lin kt thuc th vi nhiu i tuong ca mt thnh phn.
For A3: AND2
Use entity HS_LIB.AND2HS(AND2STR);
PORT MAP (HS_B => A1, HS_Z=>Z, HS_A => A0 );
End for;
--lin kt thuc th vi cc i tuong on ca mt thnh phn.
For all : OR2
Use entity CMOS_LIB.OR2CMOS(OR2STR);
End for;
-- lin kt thuc th vi tt c cc i tuong ca thnh phn OR2.
For others: AND2
Use entity WORK.A_GATE(A_GATE_BODY);
PORT MAP(A0,A1,Z);
End for;
-- lin kt thuc th vi tt c cc i tuong khng uoc lin kt ca
thnh phn AND2.
End for;
End for;
Signal S1, S2, S3, S4, S5: BIT;
BEGIN
X1: XOR2 port map(A, B, S1);
X1: XOR2 port map(S1, Cin, SUM);
A1: AND2 port map(S2, A, B);
A2: AND2 port map(S3, B, Cin);
A3: AND2 port map(S4, A, Cin);
O1: OR2 port map(S2, S3, S5);
O2: OR2 port map(S3, B, Cin);
NAND_GATE port map(S4,S5,Cout);
END FA_STR;

C 4 c ta cu hnh trong phn khai bo cua thn kin trc (architecture body):
Dc ta thu nht chi rng i tuong c nhn X1 v X2 cua component XOR2 lin
kt voi entity boi cp entity - architecture XOR2 v XOR2BEH c sn trong thu
vin WORK.
Dc ta thu hai lin kt i tuong component AND2 c nhn A3 n entity boi cp
entity - architecture AND2HS v AND2STR c trong thu vin thit k
HS_LIB. Anh xa cua cng thnh phn (AND2 ) v cc cng thuc th(AND2HS)
uoc lin kt theo tn (name association).
Dc ta thu ba chi rng tt ca cc i tuong cua component OR2 uoc lin kt voi
entity boi cp entity - architecture c sn trong thu vin thit k CMOS_LIB.
Dc ta cui cng chi rng tt ca cc i tuong khng lin kt (unbound) cua
component AND2, i tuong A1 v A2 uoc lin kt toi entity khc l: A_GATE
c architecture A_GATE_BODY, kin trc ny c sn trong thu vin WORK.
Trong v du ny chi ra cc i tuong cua cung mt thnh phn (component) c th
uoc lin kt(bound) voi cc thuc th khc nhau.

II. CC KHAI BO TRONG VHDL.
1. Khai bo kiu h tr.
Kiu lit k, s nguyn, dy mt chiu v kiu ban ghi.
Kiu lit k.
V d,
Type STD_ULOGIC is (U, X, 0, 1, Z, W, L, H, _);
--std_ulogic l 1 kiu lit k bao gm 9 gi trj uoc khai bo l
U<X<0<1<Z<W<L<H< _.
Signal S: STD_ULOGIC;
Type STATE_TYPE is (HALT, READY, RUN, ERROR);
--HALT< READY< RUN< ERROR
Variable STATE: STATE_TYPE;
Type CODE_TYPE is (NUL, 0, 1);
Function CODE (C: in INTEGER) return CODE_TYPE;
Kiu STD_ULOGIC v STATE_TYPE l 2 kiu lit k; tuy nhin muc truu tuong
cua STATE_TYPE cao hon cua STD_ULOGIC.
Trt tu cc gi tri xut hin trong khai bo lit k inh nghia thu tu cua chng, gi tri
bn tri nho hon gi tri bn phai.
Kiu nguyn.
Kiu nguyn l 1 tp hop nhung gi tri roi vo vng s nguyn uoc chi ra.
V d,
type LENGTH is range 0 to 1000;
type BYTE_INT is range 128 to 127;
type MY_INTEGER is range -2147483647 to 2147483647;
Kiu dy nhiu chiu.
Kiu dy nhiu chiu uoc VHDL h tro inh nghia mt tp chi s.
Tuy nhin chi c dy mt chiu uoc cng cu tng hop cho php. Vy phai khai bo
hai dy mt chiu thay v mt dy hai chiu.
V d,
Type WORD is array (31 downto 0) of BIT;
Type RAM is array (1023 downto 0) of WORD;
Thay v:
Type OTHER_RAM is array (1023 downto 0, 31 downto 0) of BIT
Kiu bn ghi
Kiu ban ghi inh nghia tp cc kiu khc nhau. Mi thnh phn ban ghi uoc inh vi
bng tn cua n, v c th dich boi cng cu tng hop nhu l gi tri doi khng i
hoc uoc bin i trong vi truong hop (khi nim ban ghi khng cn tn tai nua, ia
chi thnh phn uoc tnh ton chi mt ln v tro thnh m c inh).
V d,
Architecture A of E is
Type CODE_TYPE is (NONE, DATA, STATMT) ;
Type ITEM_TYPE is record;
CODE: CODE_TYPE;
INT: INTEGER;
End record;
Signal S1, S2 : ITEM_TYPE;
Begin
Process
Variable V: ITEM_TYPE;
Begin
S1 <= V;
V:= S2;

S2.INT <= 0;
V.CODE := S1.CODE;
Tiu chun IEEE
Khi STD_LOGIC_1164 inh nghia cc gi tri kiu a lun l. Khi ny uoc h tro
boi tt ca cng cu tng hop.
V d,
Type STD_LOGIC is ( U, -- Uninitialized
X, -- Forcing Unknown
0, -- Forcing 0
1, -- Forcing 1
Z, -- High Impedance
W, -- Weak Unknown
L, -- Weak 0
H, -- Weak 1
U, -- Dont care );
'X', '1', '0' l gi tri manh v tri hon cc gi tri yu 'W', 'L', 'H' v chng lai tri hon 'Z'.
'1' v '0' c th hiu nhu l ni ngun v ni t.
Gi tri 'U'v 'W' uoc goi l gi tri gn lun l, chu yu c chuc nng m phong v
hin nhin khng c nghia phn cung. Gi tri 'U' l chu tn cng bn tri trong inh
nghia STD_ULOGIC lit k, v l gi tri mc inh cho cc bin s hoc cc tn hiu
ban u truoc khi uoc gn cc gi tri 'X' v 'W' biu din trang thi m b m phong
khng th xc inh uoc. 'W' c anh huong t hon c th bi gn n '0', '1' v 'X'.
Do cc cng cu tng hop chua th phn bit giua cc manh yu, nn cc gi tri 'L'
v 'H' khng c ngu nghia tng hop chun.
'Z' c th uoc dng trong m phong nhu l kt qua khi khng c b iu khin no
ang hoat ng. Di voi tng hop, phn cung c bit uoc m chi khi gn php gn
gi tri v huong 'Z' uoc dng, muc ch cua php gn l t u ra toi b m 3 trang
thi.
2. Cc kiu khng h tr.
Vi kiu du liu khng uoc dng cho muc ch tng hop (v du, tt ca kiu vt l inh
nghia boi nguoi thit k khng uoc h tro), kiu vt l inh nghia truoc TIME khng
uoc h tro. Ngay ca su rng buc thoi gian i voi tng hop khng uoc biu din
trong VHDL voi cc biu thuc thoi gian. Do mnh after v reject khng uoc
dich v khng c cng cu tng hop no c th am bao rng tn hiu s thay i sau
mt khoang thoi gian chnh xc.
Nu cc mnh ny uoc su dung trong m ta VHDL, cng cu tng hop s bo qua v
kt qua phn cung c th mu thun voi m ta u vo. Diu ny ni rng kiu mu
chnh xc cho tng hop khng dng bt ky biu thuc thoi gian no, bao gm lnh biu
thuc thoi gian wait for. Trong m phong qa trnh bi tam ngung trong thoi gian inh
nghia boi biu thuc for. Trong sut giai oan ny, tt ca tn hiu giu cc gi tri moi cua
chng. Trong min tng hop khng th phong on phn cung voi cc kt qua nhu vy
m khng cung cp phn cung v n qu phuc tap v qu c bit (nhu b inh thoi
gian).
3. Cc kiu con.
Cc kiu con rt huu dung cho tng hop. O mi buoc m phong, cc kiu con cung cp
kha nng manh m cho vic kim tra su dung kiu. Cc kiu con cn thua huong tt ca
ton tu inh nghia tu cc kiu co ban cua chng.
V d, chuc nng thao tc trn kiu BIT_VECTOR c th uoc dng voi bt ky kiu
con cua BIT_VECTOR di bng gi tri cn lai trong khoang thch hop.
III. CC AI TNG VHDL.
Di tuong trong VHDL l cc thng tin v hng s, bin s v tn hiu.
1. Hng s.
Cc khai bo hng s:
Constant constant_name : type_name [:=value]
V d,
Constant rise_time : time :=10 ns;
Constant bus_width : integer :=8;
V d,
Type TAB2 is array (BIT, BIT) of BIT;
Constant AND_TAB: TAB2 := ((0, 0), (0, 1));
Gi tri hng s uoc tnh ton chi mt ln. Qu trnh tng hop chp nhn hng s cua
bt ky kiu tng hop no.
Trong truong hop khai bo nhu vy khng tao ra bt ky phn cung no:
Nu hng s uoc dng trong php gn tn hiu nhu cc lnh duoi y th phn cung
uoc suy ra:
V d,
Signal Z, A, B : BIT;

Z <= AND_TAB (A,B);
Su khai bo hng s khng tao ra phn cung. Hng s chi cung cp iu kin xc
inh phn cung. Hng s l mt biu thuc v vy n tn tai trong cng mt noi nhu cc
biu thuc:
V d, Pha phai cua php gn tn hiu
Constant COD1: BIT_VECTOR := X EA;
Constant MASK: BIT_VECTOR:=01111111;
Signal V, R, A: BIT_VECTOR(7 downto 0);

begin
V <= COD1; R <= A and MASK;
V d, trong biu thuc lnh if hoc case
If S= CST1 then
Case VALUE is
When CST_N =>
V d, trong lnh ng thoi c iu kin:
Z <= CST1 when A=1 else S when B= CST2 else CST3;
2. Khai bo bin s v tn hiu.
Cc khai bo bin s
Variable variable_name : type_name [:=value];
V d,
Variable CTRL_STATUS : BIT_VECTOR (10 DOWNTO 0);
O y bin CTRL_STATUS l mt dy c 11 phn tu, mi phn tu trong dy c kiu
l BIT
V d, Thuc hin mach sau

D Q
Q
(DATA and 01)(0)
(DATA and 10)(1)

CK
Z
Clock
Entity MEMO_ONE is
Port ( DATA: in BIT_VECTOR (1 downto 0);
CLOCK :in BIT;
Z: out BIT);
Constant K1: BIT_VECTOR : = 01;
Constant K2: BIT_VECTOR := 10 ;
End MEMO_ONE;

Architecture A of MEMMO_ONE is
Begin
Process (CLOCK)
Variable A1, A2: BIT_VECTOR(DATArange);
Variable A3: BIT;
Begin
If CLOCK = 1 and CLOCKevent then
A1 := DATA and K1;
A2 := DATA and K2;
A3 := A1(0) or A2(1);
Z <= A3;
End if;
End process;
End A;
Cc bin s su dung trong v du trn khng tao ra bt ky phn cung no. Tht ra qu
trnh tuong uong c th uoc cho m khng c bt ky bin no, o tt ca cc bin
uoc thay th boi cc phuong trnh cua chng. Chng ta c th vit lai nhu sau.
Begin
If CLOCK = 1 and CLOCKevent then
Z <= (DATA and K2)(1) or (DATA and K1)(0);
End if;
Khai bo tn hiu:
C php:
Signal signal_name : type_name [:=value]
V d,
Signal clock: bit;
--khai bo tn hiu clock ca kiu bit ly gi trj 1,0
Signal data_bus : bit_vector( 0 to 7);
-- khai bo tn hiu data_bus thucc kiu bit_vector c rng 8 bit
3. Cc gi tr[ khi ng.
Trong VHDL, c 3 loai gi tri ban u:
Gi tri mc inh tu inh nghia kiu hay kiu con
Gi tri ban u khi i tuong uoc khai bo
Gi tri uoc gn khi su dung mt pht biu lc bt u qu trnh.
Truong hop thu nht v thu hai s bi bo qua boi cng cu tng hop, nn c th pht sinh
mu thun giua hoat ng m phong v kt qua tng hop. Do nghi phai khoi
ng mt cch r rng v c h thng cc bin v tn hiu voi cc lnh c bit. Diu
ny at uoc trong phn m tng hop phuc vu cho vic xu l thit lp/thit lp lai v su
khoi ng phai uoc trnh by trong phn ny.
Nu cng out hoc thng s out cua chuong trnh con c gi tri mc inh, chng hoat
ng ging nhu mt gi tri khoi ng cho tn hiu hoc bin v s bi cng cu tng hop
bo qua.
4. Cc ton t s hc.
Ton tu logic v ton tu bit l mt phn cua ton tu s hoc. VHDL inh nghia bay loai
ton tu. Chng uoc chi o bang duoi y voi su tng dn muc uu tin.
Loai Ton t Uu tin
Lun l
Quan h
Djch
Cng
Mt ngi
Nhn
Hn hop
Or and nor nand xor xnor
= /= > < >= <=
Sll Srl Sla SRA Rol Ror
+ - &
+ -
* / mod rem
** abs not
Thp nht

Cao nht
Ton t lun l
Ton tu lun l v ton tu not chp nhn cc ton hang c cc kiu BIT, BOOLEAN,
v VECTOR voi kch thuoc ging nhau. Mt quy uoc uoc chp nhn rng ri cho gi
tri boolean: TRUE tuong uong voi gi tri BIT '1' v nguoc lai.
Ton tu nand v nor khng kt hop voi nhau trong 1 c php lin tuc, chng phai uoc
ngn cch bng du () :
A and B nand C; -- tri lut
(A and B ) nand C;-- ng lut;
V d,
Signal S, X, Y: BIT_VECTOR (1 downto 0);
Signal R, A, B, C : BIT;
Signal T, D, E, F, G: BOOLEAN;
--
Begin
S <= X and Y;
R <= (A and B) and C;
T <= D xor E xor F xor G;
So kt qua cua cc hm trn nhu sau:

S(1..0)
Y(1..0)
X(1..0)
C
B
A
T
G
F
E
D
Ton t quan h.
Ton tu quan h lun tra v gi tri Boolean '0' hoc '1' v l kt qua cua su so snh hai
ton hang cng mt kiu co ban.
Trong m phong, ton tu bng v khc uoc inh nghia r rng cho cc kiu. Kt qua
l TRUE nu hai ton hang c cng gi tri.
Cc ton tu quan h uoc inh nghia cho tt ca cc kiu v huong v dy mt chiu.
Thu tu cua kiu v huong uoc inh nghia boi khai bo cua n, kiu 'LEFT' thp hon
kiu 'RIGHT'.
Di voi dy mt chiu, thu bc quan h cua chng uoc inh nghia boi bc ngu nghia.
V d,
0 < 1 -- is true
A < BC -- is true
10 < 101 -- is also true
Ton tu quan h ny khng th dng so snh cc vector bit m ha cc gi tri lit k.
Ton tu ny nu thuc hin voi khi s hoc th kt qua cua lnh cui cng "10" < "101"
s uoc thng dich khc nhau i voi s khng du hoc s c du.
Cc ton t cng.
Ton tu cng v tru uoc inh nghia cho cc ton hang s nguyn. Tt ca cc cng cu
tng hop u ci t cc ton tu ny v thuong su dung voi mt s rng buc.
Luu , i khi dng cc du ngoc on nhm mt tp hop cc cng lai. Ni cch
khc hai biu thuc khc nhau chay nhu nhau nhung tao ra phn cung khc nhau
V d,
Architecture
Signal A, B, C: BIT_VECTOR(2 downto 0);
Signal B, S, R: BIT_VECTOR (0 to 5);
Signal D: BIT;
Begin
A <= D &not D &D;
S <= S & B (0 to 2) ;
R <= C(1 downto 0) & 000 & D;
Cc ton t dch chuyn.
Cc ton tu dich chuyn h tro cho BIT_VECTOR Cc ton tu dich chuyn v quay l
sll, srl, sla, sra, rol v ror.
Cc ton t nhn.
Php chia "/", php nhn "*", ly modulo "mod", ly s du "rem" uoc xp trong
nhm nhn. Chi c ton tu nhn uoc h tro thm v du khng han ch i voi tt ca
cc kiu s nguyn. Di voi vi cng cu tng hop, nhiu chin luoc nhn uoc nghi
tao ra phn cung.
"/", mod, v rem uoc h tro c han ch i voi cc gi tri cua ton hang v phai, cc
cng cu tng hop i hoi cc gi tri ny l duong v l luy thua cua 2. Hon nua chng
thuong l cc hng s ton cuc. Kt qua phn cung cua ton tu ny dua trn cc ton tu
dich bit.
V d, xy dung mt b m modulo 4.
Entity INCREMENTER is
Port (CLK : in BIT;
RST : in BIT;
R : out NATURAL range 0 to 3) ;
End INCREMENTER;
Architecture A of INCREMENTER is
Signal MEM: NATURAL range 0 to 3;
Begin
Process
If CLK = 0 then
If RST = 1 then
MEM <= 0;
Else
MEM <= (MEM +1) MOD 4;
End if;
End if;
End process;
R <= MEM;
End A;
Cc ton t hn hp.
Abs, gi tri tuyt i uoc h tro cho tt ca cc gi tri s nguyn,
Ton tu s mu "**", uoc h tro voi han ch ton hang tri l hng s ton cuc, gi tri
cua n phai l 2.
5. Php gn bin s.
Bin khng dng chung uoc khai bo trong qu trnh hoc trong phn khai bo
chuong trnh con.
Php gn bin uoc thuc hin boi ton tu :=, thao tc ny xay ra ngay lp tuc khi tnh
ton. Do , gi tri cua bin chi thay i boi lnh gn tip theo nu gi tri moi khc voi
gi tri cu.
V d, cch gn bin khc nhau:
A:= 0 ; -- gi trj integer 0 uoc gn cho bin A
REC.FIELD := B; --B uoc gn cho bn ghi FIELD ca REC
VECTOR := X AA; -- php gn vector ton cuc
WBUS(1) := F(A); -- php gn phn t ca vector
WORD(3 to 4) := 10; -- php gn mt nhm phn t vector
REC := (A, 3, 10); -- Php gn gi trj theo vj tr ca vetor
REC := (LETTER => C, FIELD => 3, BIT2 => 11);
-- Php gn vi tn
Hon nua, o phn bn tri cua lnh gn, nhiu bin s c th gp lai.
V d
Variable V: BIT_VECTOR(1 to 3);
Variable A, B, C: BIT;

--Hai trang thi sau l tuong uong
(A, B, C) := V;
(1 => A;2 => B; 3 => C):= V;
Luu , bin khai bo trong chuong trnh con chi tn tai trong chuong trnh con ny v
bin mt o ngoi chuong trnh con. V vy, nu bin s uoc gn, kt qua bi mt sau
khi chay lnh return ngoai tru uoc tra v khi dng thng s out bn trong thu tuc hoc
lnh return bn trong hm. Tuy nhin bin ny c th tao ra mt phn nho nu thoi
im ng b xay ra truoc khi chuong trnh con kt thc.
6. Php gn tn hiu.
Muc ch cua gn tn hiu ging nhu php gn bin. Hiu qua cua php gn tn hiu chi
xay ra sau lnh ng b (lnh wait ).
Signal <= a_waveform_with_one_item_and_without_delay_expression
7. Lnh ng b.
Trong VHDL lnh duy nht ng b l lnh wait. Mt qu trnh phai chua t nht
mt lnh wait.
C hai cch dng lnh wait khc nhau l:
Doi mt su kin trn mt tn hiu ty thuc vo danh sch. Danh sch cua wait
phai bao gm tt ca tn hiu uoc oc trong qu trnh:

V d,
Process
Begin
Wait on A, B, C, D;
S <= A or B;
If E then
R <= C + D;
Else
R <= C+1;
End if;
End process;
Doi mt su kin xay ra trn tn hiu ng h (Clock). Tn hiu ny phai l duy nht,
clock uoc xc inh boi cc su kin v suon xung.
V d,
Wait until CLK = 1;
Nu kiu cua tn hiu ng h khng l BOOLEAN hoc BIT, m l kiu a gi tri, th
ph hop voi su m phong, iu kin sau phai uoc thm vo lnh wait:
CLK'LAST_VALUE = '0'. Diu ny xc inh suon ln hop l cho tng hop. Diu kin
canh xung ng h tro thnh:
V d,
Wait until CLK =1 and CLKlast_value = 0;
Nu lnh wait l r rng, lnh ng b uoc m ta boi mt lnh iu kin if
V d,
If CLK = 0 and CLKevent and CLKlast_value =1 then
Hoc su dung thuc tnh 'STABLE voi gi tri thoi gian mc inh 0ns,
('STABLE l mt hm chp nhn kiu thng s TIME c gi tri mc inh l zero).
V d,
If CLK = 0 and not CLKstable and CLKlast_value =1 then
Lnh iu kin.
C hai cch biu din lnh iu kin : lnh if v lnh case
Lnh if.
Lnh if bao gm ca r nhnh elsif v else, chi muc uu tin thuc hin cc r nhnh
khc nhau.
V d, thit k cc MUX sau


Process (S1, S2, R3, R1, R2, R3, R4)
Begin
If S1 = 1 then
RESULT <= R1;
Elsif S2 = 0 then
RESULT <= R2;
Elsif S3 = 1 then
RESULT <= R3;
Else
RESULT <= R4;
End if;
End process;
Lnh case.
Trong lnh case, mi nhnh c cng cp voi nhau (lnh if v lnh elsif, mi nhnh
uoc kim tra mt cch tun tu).
Trong lnh case, tt ca cc gi tri c th phai uoc ua vo ht v chng l duy nht,
khng c uu tin.
D nhm lai tt ca cc gia tri "don't care", mnh others c th uoc su dung. Luu
, others khng bao gio nn dng nu tt ca gi tri uoc lit k truoc
V d, Thit k mach sau

Type CODE_TYPE is (ADD, SUB, RST, INCX);
Subtype WORD is INTEGER range 0 to 3;
Signal CODE: CODE_TYPE;
Signal X, Y, R: WORD;
Process (CODE, X, Y)
Begin
Case X is
When 0 => R <= Y;
When 1 => R <= CODE_TYPEpos (CODE);
When others => R <= 0;
End case;
End process;
Ch rng nhnh others uoc dng cho gi tri 2 v 3 cua tn hiu X.
To ra b nh.
Di khi mt vi gi tri iu kin khng ng, v th cc gi tri c kt qua tu cc iu
kin ny o trang thi khng i. Trong truong hop ny, phai c phn tu nho .
V d,
If CONDITION (l1, l2,l3) then RESULT <= DATA (l1, l2, l3);
End if;
Boi v chuc nng CONDITION khng lun lun tra v hng s TRUE, nn i khi
RESULT s khng thay i v s giu nguyn gi tri.
Voi cc dng lnh trn th loai phn tu nho uoc tao ra s phu thuc vo biu din
ng b. Phn tu nho cung uoc m chi nu tn hiu u ra khng xut hin trong bt
ky r nhnh c th no cua chuong trnh.
RESULT l tn hiu uoc oc (pha bn phai cua php gn tn hiu) v uoc vit (pha
bn tri cua php gn tn hiu). V vy, phn tu nho l cn thit. Nu tn hiu ny phu
thuc vo danh sch, th chi c mach ci t uoc tao ra. Nguoc lai, nu chi phu thuc
vo cc gi tri u vo (l1, l2, l3) th mt phn tu nho mach lt uoc tao ra.
V d,
Process (I1, l2, l3) inferring a flip-flop
Begin

If CONDITION (l1, l2, l3)
Then RESULT <= DATA(l1, l2 , l3, RESULT);
End if;
End;
Process (l1, l2, l3, RESULT) inferring a latch
Begin
Then RESULT <= DATA (l1, l2, l3. RESULT);
End if;
End;
D am bao khng tao ra phn tu nho, mt php gn tn hiu u ra mc inh phai
uoc vit truoc lnh iu kin nhu sau:

RESULT <= DEFAULT_VALUE; -- default assignment
If CONDITION (l1, l2, l3) then RESULT <= DATA (l1, l2, l3, RESULT);
End if;

Php gn tn hiu u tin ny khng uoc nhm ln voi gi tri ban u uoc giai
thch.
V d, mt r nhnh else uoc tao ra r rng :
then RESULT <= DATA (l1, l2, l3, RESULT);
else RESULT <= DEFAULT_VALUE;
End if;

Lnh lp li.
Trong VHDL c hai loai lnh lp lai, vng lp for v vng lp while. Vng lp v han
loop end loop c th uoc xem xt nhu mt vng lp while voi iu kin lun
lun l TRUE.
Lnh lp vng for uoc tro gip boi cc cng cu tng hop khi cc gi tri bin l tinh
(static) ton cuc.
8. Lnh qu trnh v lnh ng b.
Cc lnh qu trnh cho kiu hnh vi manh nht v l co so cua moi lnh ng thoi.
Mt lnh qu trnh bao gm 3 phn: danh sch ty chon, khai bo cuc b v phn lnh
tun tu.
Danh sch nhy.
Mt qu trnh voi mt danh sch r rng tuong uong voi mt qu trnh voi mt lnh
ng b on, qu trnh uoc hoat ng mi khi mt bin c xay ra trn mt tn hiu
cua danh sch ny. Cc qu trnh nhu sau:
Process (A, B, C) danh sch cc bin uoc xem xt

begin

end process;
Qu trnh trn cung c th tuong uong voi:
Process

begin

wait on A, B, C;
end process;
Khai bo cc b.
Trong tt ca cc khai bo c th c bn trong phn khai bo qu trnh, khai bo bin l
cn thit, c th bao hm phn tu nho. Tht ra, bin c th su dung trong hai cch khc
nhau:
Ging nhu cc bin cuc b, khng tao ra phn cung no:
Process (A, B, C) no memorization for this and gate
Variable VAR : BIT;
Begin
VAR : = B and C;
S <= A and VAR; -- before being read
End process;
C th vit hnh vi tuong tu bng cch thay th bin voi phn bn phai cua lnh gn:
Process (A, B, C)
Begin
S <= A and B and C;
End process;
Ung dung cua bin uoc chp nhn boi cc cng cu tng hop v khng c phn cung
tuong ung. Trong truong hop tng qut th giua 2 lnh ng b, nu mt bin lun
uoc gn truoc khi uoc oc, th bin ny khng tao ra bt ky phn cung no.
Khi thit k du liu duoi dang my trang thi.
Process synchronous finite state machine with two states
Type T_STATE is (STOP, GO);
Variable STATE: T_STATE;
Begin
Wait until CLK=1;
Case STATE is --variable STATE is read
-- before being target of assignment
when STOP => STATE:= GO;
when GO => STATE:= STOP;
end case;
End process;
V du ny chi ra rng vic oc bin khng c nghia l c n trong phn bn phai cua
php gn. Biu thuc case, iu kin if hoc thng s in cua thu tuc hoc hm l cch
khc oc n. V th, giua hai lnh ng b, nu mt bin uoc oc t nht mt ln
truoc khi uoc gn th bin ny tao ra phn tu nho.
9. Php gn tn hiu.
Php gn tn hiu n gin.
Dang on gian nht cua mt php gn tn hiu ng thoi l inh nghia tn hiu ch
nhn uoc cc gi tri cua tn hiu ngun mi ln mt su kin xay ra:
S <= A; -- S uoc gn ti A bi phn cng
Z <= 1; -- Tn hiu Z l mt hng s
Cc php gn tn hiu chn la v c iu kin.
Hai php gn tn hiu ng thoi uoc inh nghia cho muc ch c iu kin cua tn
hiu; php gn chon lua v c iu kin.
V d,
S <= a when x = 1 else B when Y = 1 else C
V d, nu A, B, C, X, Y uoc inh nghia nhu l cc tn hiu, qu trnh tuong l:
Process (A, B, C, X, Y)
Begin
If X = 1 then
S <= A;
Elsif Y = 1 then
S <= B;
Else
S <= C;
End if;
End process;
Hai v du trn chung minh cc php gn tn hiu, voi cng cu ny cho php nguoi thit
k c th m ta cc thit k cua mnh r rng hon.

10. Component.
Muc ch cua lnh hop phn l su dung mt mu m ta truoc. Dy l cch chnh
xy dung su phn thu bc thit k. Truoc khi sao chp, hop phn phai uoc khai bo
cuc b trong phn khai bo kin trc, hoc ring bit trong mt khi.
Su khai bo hop phn (component) inh nghia cch ni dy cuc b, c th t tng qut
hon so su khai bo thuc th. Trong sut giai oan cu hnh, mt s tn hiu c th o v
tri nu chng o ch out hoc inout, hoc bi bo qua nu chng o ch in voi gi tri
mc inh.
Khi sao mt hop phn, cc thng s tuong thch chung phai uoc nh xa n cc gi tri
v cc cng ni voi tn hiu.
V d,
Architecture SYNTHESIZABLE of DRIVE is
Signal ORDER: ORDER_TYPE;
Signal CONTROL: BIT;
Signal DATA_IN, DATA_OUT: BIT_VECTOR(1 to N);
Component CTRL
Port (C : in BIT;
O: out BIT_VECTOR);
End component;
Component OPRT
Port (O: in BIT_VECTOR;
D1: in BIT_VECTOR;
D0: out BIT_VECTOR);
End component;
-- specification configuration
for CONTROLER : CTRL use entity WORD.CTRL(A);
for OPERATING_PART:OPRT use entity WORD OPRT(A) generic map (N);
begin
-- two component instantiation statements.
CONTROLER: CTRL port map(CONTROL, ORDER);
OPERATIVE_PART: OPRT port map (ORDER, DATA_IN,
DATA_OUT);
End SYNTHESIZABLE;
Cu hnh chi ra cp thuc th/ kin trc uoc chon cho ban sao hop phn. Voi v du sau ,
hai lnh cu hnh c bit c th uoc thay th boi mt cu hnh c lp.
Configuration C1 of DRIVER is
For SYNTHESIZABLE
For CONTROLER: CTRL use entity WORD.CTRL(A);
End for;
For OPERATIVE_PART: OPRT use entity WORK.OPRT(A);
Generic map (N);
End for;
End for;
End C1;

11. BLOCK.
Cc lnh block uoc su dung cho cu trc lnh ng thoi
V d,
Signal A, B, C, D, E, F, G: BIT;
Signal S; BIT_VECTOR(1 to 4);
BLOCK_NAME : block
Subtype TWO_BIT_TYPE is BIT_VECTOR(1 to 2);
Signal V1, V2: TWO_BIT_TYPE;
Begin
V1 <= (A or C) &B; V2 <= E &(F and G);
S <= V1 &V2;
End block BLOCK_NAME;
Duoi mt s iu kin, mt vi cng cu tng hop c th dich lnh block nhu mt cp
cua tng hop. Trong truong hop ny nhn cua lnh khi uoc dng nhu mt thng s
cho cu trc lnh.
Ung dung khc cua lnh block l inh nghia phn lnh ng thoi uoc iu khin boi
clock. Trong truong hop ny phn bao v (guarded) uoc yu cu m ta chnh xc
tn hiu clock v iu kin lin quan toi n (canh ln hoc xung).
Hon nua, php gn tn hiu ng thoi uoc bao v v hoat ng boi biu thuc bao v.
Diu ny uoc chi ra trong v du sau, o gia thit rng tn hiu clock l a gi tri.
V d,
B: block (not CLKstate and CLK = 0 and CLKlast_value =1)
Signal R: BIT;
Begin
R <= guarded DATA(1);
S <= guarded R ; -- Tn hiu S l DATA(1) uoc lm tr 1 chu ky
End block
Ung dung thu 3 cua lnh block uoc dng trong mach 3 trang thi.
Lin kt voi lnh khng ni (disconnect) v tn hiu resolved, php gn bao v c th
inh nghia hnh vi ba trang thi. Khi iu kin bao v khng thoa, tn hiu ch khng
uoc ni. Dy l hnh vi mc inh cua mnh disconnect v uoc cho php nu kiu
tn hiu ch uoc resolved.
Di voi tng hop, vn uoc giai quyt l gi tri cui cng khi tt ca tn hiu ngun
khng uoc ni. Gi tri ny phu thuc vo hai yu t: kt qua cua hm resolved tra v
(khi di cua vector u vo l null) v loai tn hiu resolved (bus hoc register).
Tm tt hnh vi cua loai tn hiu ny nhu sau:
Kt qua cui cng l gi tri uoc tra v boi hm resolved voi vector u vo null
nu kiu tn hiu ch l bus.
Kt qua cui cng l gi tri truoc nu chi c mt tn hiu ngun v kiu cua tn hiu
ngun l register.

So b m ba trang thi uoc tao ra boi lnh block:

Mt s cng cu tng hop h tro tn hiu khng ni loai bus, th kt qua cua hm
resolved tra v 'Z' m ha muc 3 trang thi.
12. Gi th tc ng thi.
Thu tuc ng thoi l thu tuc uoc goi tu trong mt block hoc mt architechture.
P (A, B, C); -- concurent procedure call;
Tuong uong voi:
Process -- process equivalent to the previous concurent procedure call
Begin -- C is assumed to be an actual parameter of module out.
P(A, B, C);
Wait on A, B;
End process;
Cho php dng lnh wait trong cc thu tuc ng thoi. Trong tng hop, iu ny khng
uoc h tro. Tht ra, lnh wait c nhiu tn hiu chi uoc cho php nu cc iu kin
ng b l nhu nhau.
Thuong su dung goi thu tuc ng thoi khi mun c su linh ng v kha nng thch
nghi. Thu tuc ng thoi d dng su dung hon l ban sao hop phn (component), v
khng i hoi su khai bo v chi r.
13. Lnh GENERATE.
Hai lnh generate uoc inh nghia l: lnh generate c iu kin v lnh generete lp.
Tu quan im tng hop, lnh ny khng uoc h tro y u. Trong giai oan ch tao,
mt tp cc lnh ng thoi tuong uong uoc pht sinh.
Lnh generate lp.
Lnh ny c th lp lai mt tp cc lnh ng thoi (v du, lp lai nhiu ln hop phn
hoc gn cc tn hiu vector). Trong v du sau, cc hng s k1, k2 c th l cc thng
s tuong thch chung v phn cung tuong ung s khng thay i.
V d,
Constant k1: NATURAL := 0;
Constant k2: NATURAL := 3;
Signal A, S: BIT_VECTOR(k1 to k2 );
Signal R: BIT_VECTOR (k1 +1 to k2 +1);
Begin
L: for J in k1 to k2 generate
S(J) <= not A(J);
R(J+1) <= A(j);
End generate;
End;
Trong v du sau, kin trc A v B l tuong uong, kt qua tng hop cui cng ging
nhau. Trong kin trc u tin A, kt qua l vector V uoc gn trong lnh tun tu loop
v trong kin trc thu hai B, cc php gn tn hiu ng thoi N uoc pht ra.
Constant N: NATURAL := 3;
Signal B: BIT_VECTOR(0 to N );
Signal R: BIT_VECTOR (1 to N);
Begin
Process (A, B)
Begin
For l in 1 to N loop
V(l) <= F(l, A(l), B (N-1 + 1));
End loop;
End process;
End A;
Architecture B of E is
Constant N: NATURAL := 3;
Signal B: BIT_VECTOR(0 to N );
Signal A,V: BIT_VECTOR (1 to N);
Begin
L: for l in 1 to N generate
V(l) <= F(l, A(l), B (N-1 + 1));
End generate;
End B;
Lnh generate c iu kin.
D hon tt mt mu su dung cc lnh generate lp, c th c ch khi kim tra cc gi
tri u tin cui cng cua chi s vng lp. Cc lnh generate iu kin c th uoc
dng giai quyt vn ny. V du sau y minh hoa tnh cht ny, o su xu l cc
ban sao hop phn c th khc nhau (khng c, c mt, hoc nhiu ban sao).
Entity E is
Generic (N: NATURAL);
Port (INPUT: in BIT;
OUTPUT: out BIT; );
End E;

Signal LOCAL: BIT_VECTOR (1 to N -1);
Component M1
Port (l: in BIT; O: out BIT);
End component;
Begin
L1: if N = 0 generate
OUTPUT <= INPUT; -- no component instantiation
End generate ;
L2: if N = 1 generate
C1: M1 port map (INPUT, OUTPUT); -- only one instantiation
End generate;
L3: if N >= 2 generate -- other cases using the intermediate -
--LOCAL signal
F: M1 port map (INPUT, LOCAL(1));
L4: for: in l to N-2 generate
C :M1 port map (LOCAL(l), LOCAL(l+1));
End generate;
End A;
S dng tng thch chung (Generic).
Thng s tuong thch chung l tng qut cua khi nim hng s, ni rng trong sut
giai oan ch tao cc gi tri cua chng phai uoc xc inh. V vy truoc buoc ny, i
voi giai oan dich, gi tri cua chng chi xc inh kiu m khng bit gi tri. Mt vi
cng cu tng hop h tro han ch mt s kiu thng s tuong thch chung (chi h tro
kiu nguyn hoc kiu lit k). Tuy nhin, khng c l do thuc su cho cc han ch nhu
vy, ngoai tru khng h tro cho cu hnh.
V d, vit mt mu chp nhn mt vector voi kch thuoc N, nhu l u vo. N l
thng s tuong thch chung cua mu ny.
Entity AND_N is
Generic (N: POSITIVE);
Port (Din : in BIT_VECTOR (1 to N);
R: out BIT);
End AND_N;
Architecture A1 of AND_N is
Signal INTER : BIT_VECTOR (1 to N);
BEGIN
INTER (1) <= Din (1);
L: for l in 1 to N-1 generate
INTER (l+1) <= (Din(l+1) and INTER (l));
End generate;
R <= INTER(N);
End A1;
Architecture A2 of AND_N is
BEGIN
Process (Din)
Variable RES: BIT;
Begin
RES := Din(1);
for l in 2 to N loop
RES:= RES and Din(l);
End loop;
R <= RES;
End process;
End A2;
V d, nhn dang mu cho trong chui bit tun tu. Cc thng s tuong thch chung
l vector phai tm, v mt s bit dng bo s li (0: mu phai tm chnh xc nhu
m ta, 1: chi sai khc 1 bit moi chp nhn,)
Entity SEARCH_PATTERN is
Generic(PATTERN: BIT_VECTOR;
ERROR_NUMBER: NATURAL);
Port ( CLK: in BIT;
DATA: in BIT;
RESET: in BIT;
FOUND: out BIT);
Begin
Assert (PATTERN length >= ERROR_NUMBER)
Report pattern length cannot be shorter than & the authorized error
number
Severity ERROR;
End SEARCH_PATTERN;

Architecture A of SEARCH_PATTERN is
Subtype REG_TYPE is BIT_VECTOR (PATTERN range);
Signal REG: REG_TYPE;
Begin
P_REG: process (DATA, CLK, RESET)
Begin
If RESET = 1 then
REG <= REG_TYPE (others => 0);
Elsif CLK =1 and CLKevent then
REG <= REG(REGleft-1 downto REGright) & DATA;
End if;
End process;
P_FOUND: process (REG)
Variable CPT: NATURAL range 0 to ERROR_NUMBER +1;
Begin
CPT := 0;
FOUND <= 0;
For l in REGrange loop
If PATTERN(l) /= REG(l) then
CPT := CPT + 1;
If CPT >= ERROR_NUMBER then
FOUND <= 1;
Exit;
End if;
End if;
End loop;
End process;
End A;
Trong cc v du trn cn ch nhung im sau:
Su dung cc lnh assert trong entity khng tao ra phn cung. Lnh ny kim tra
tnh nht qun giua cc gi tri thng s kh m ta boi cc biu thuc tinh (nhu l cc
khoang trong cc kiu hoc biu thuc kiu con).
Kin trc bao gm hai qu trnh: Qu trnh u tin suy ra phn cung tun tu voi
mt tn hiu reset bt ng b, trong khi qu trnh thu hai biu din mach t hop
thun tu.
Khai bo REG_TYPE uoc ua ra han ch tp hop cn lai (others => '0')
trong nhnh RESET bt ng b.
Cc thuc th tuong thch chung cn uoc nh xa n cc gi tri thng s tao ra
phn cung thuc su. Diu ny c th uoc lm trong ban sao hop phn hoc trong
cu hnh, o cc thng s tuong thch chung uoc nh xa n cc gi tri cua
chng.
14. Php so snh.
C hai loai so snh sau:
Kim tra 2 i tuong ging nhau. Bao gm cc hm (cung uoc goi cc ton tu)
bng ('=') v khng bng ('/='). Tt cc kiu tng hop uoc c th uoc so snh khi
su dung cc ton tu ny.
Kim tra thu bc cua hai i tuong khi su dung cc ton tu quan h, cc ton tu ny
c th uoc thuc hin trn kiu bt ky voi mt lnh quan h nhu l cc kiu s
nguyn, cc kiu lit k v kiu biu din m ASCII l qu tai i voi cc ton tu
so snh.
15. Cc ton t s hc.
Sau cc ton tu Boolean v cc php so snh, mt ho quan trong khc l ton t s
hc. Bn php ton co ban l: php cng, tru, nhn v chia.
Kiu du liu thun tin nht thuc hin cc php ton nhu vy l kiu INTEGER v
cc kiu con quan h voi n: NATURAL v POSITIVE. Cc ton tu VHDL '+', '-', '*',
v '/ 'uoc inh nghia truoc v v vy c th uoc su dung m khng cn khai bo.
Diu ny cn thit cho nguoi thit k han ch kch thuoc cc i tuong cua kiu
INTEGER n gi tri ti tuu. Nu nguoi thit k khng lm cng vic ny, cng cu
tng hop s xc inh kch thuoc inh nghia cua kiu INTEGER trong khi
(STD.STANDARD).
V d,
Signal l1, l2, SUM_l: INTEGER range 16 to 15;
Signal N1, N2, SUM_N: INTEGER range 0 to 47;
SUM_l <= l1 + l2;
SUM_N <= N1 + N2;
Trong v du ngn ny c mt vi ch thch v quy uoc m ho cc s. Tt ca qu trnh
tng hop nhm vo vic dich m ngun HDL thnh biu din nhi phn. O y, cc s
c du l1, l2 v SUM_l uoc m ho o dang b hai voi vic su dung 4 +1 bit. Mt
khc, cc s khng du N1, N2 v SUM_N uoc m ha voi 6 bit (47<2**6-1). Tuy
nhin, khng cn thit cho khoang cua i tuong cua kiu INTEGER l lu thua cua
hai.
Ton tu nhn v chia phai uoc xc inh truoc, ca hai ton hang phai l cng kiu s
nguyn hoc l kiu floating point. Kt qua cung phai cng kiu, ton tu nhn cung
uoc xc inh boi truong hop khi mt trong nhung ton hang l kiu vt l v ton
hang thu hai l kiu integer hoc real. Kt qua tra v l kiu vt l.
Di voi ton tu chia, chia mt gi tri vt l boi mt gi tri integer hoc real th uoc
cho php, v kt qua tra v l kiu vt l. Php chia cua mt gi tri kiu vt l boi mt
i tuong khc cng kiu vt l v phn cn lai cua n, mt gi tri nguyn coi nhu mt
kt qua.
Ton tu REM v MOD tc dung cho ton hang kiu integer v kt qua c cng mt
kiu. Kt qua cua REM c biu hin cua ton hang thu nht v n uoc xc inh nhu
sau:
A rem B = A - (A / B) *B
Kt qua cua ton tu MOD l biu hin ton hang thu hai, v n uoc xc inh nhu sau:
A mod B = A - B * N
Sau y l nhung v du su dung ton tu mod v rem:
7 mod 4 -- kt qua = 3;
(-7) rem 4 -- kt qua = -3;
7 mod (-4) -- kt qua = -1;
(-7) mod (-4) -- kt qua = 3;

16. Cc php dch v quay.
Cc php tnh ny thuong uoc thuc hin trn cc i tuong c biu din bit_vector.
Hai loai php tnh dich v quay c th uoc phn bit : lun l v s hoc.
Php dich s hoc c th uoc su dung cho php nhn (dich sang tri) hoc chia (dich
sang phai) nu ton hang v phai cua mt php ton l mt lu thua cua 2. Mi mt
ton tu giu mt dy BIT hoc BOOLEAN nhu mt ton hang tri v gi tri INTEGER
nhu ton hang phai, ng vai tr giai thch ton tu. Nu gi tri INTEGER l m, hnh
vi nguoc nhau s xay ra.
Ton tu SLL (xoay tri lun l) v ton tu SRL (xoay phai lun l) in vo nhung bit
huy bo voi left-operand-type'LEFT.
Ton tu SLA (xoay tri s hoc) in vo nhung bit bi huy bo voi bit cuc phai cua ton
hang tri.
Ton tu SRA (xoay phai s hoc ), in vo nhung phn tu bi huy bo voi bit cuc tri cua
ton hang tri.
V d,
-- gia su tt ca nhung ton hang tri u l BIT_VECTOR
"1001010" sll2 is "0101000"; -filled with BIT'LEFT, which is '0'
"1001010" srl3 is "0001001";

III. MT S V D THIT K CC MCH T HP V TUN T.
Aon m chng trnh to mch dn knh 2 sang 1.
LIBRARY ieee;
USE ieee.std_logic_1164.all;
ENTITY mux2to1 IS
PORT (w0, w1, s :IN STD_LOGIC;
F: :OUT STD_LOGIC);
END mux2to1;
ARCHITECTURE behavior OF mux2to1 IS
BEGIN
WITH s SELECT
F <= w0 WHEN 0,
w1 WHEN OTHERS;
END behavior;

Mch so snh 4 bit.
Mach so snh 4 bit bao gm 8 bit ng vo, chia thnh 2 nhm, mi nhm 4 bit v uoc
t tn l A v B. Kt qua cua php so snh c 3 truong hop: A bng B, A lon hon B v
A nho hon B. Trong mach so snh ny kt qua cua php so snh o ng vo s uoc
biu thi bng 3 bit ng ra cho 3 truong hop so snh giua A v B, AeqB(A equal B),
AgtB(A greater B), AltB (A lighter B). M chuong trnh cua mach so snh 4 bit c
dang nhu sau:
LIBRARY ieee;
USE ieee.std_logic_unsgned.all;
ENTITY compare IS
PORT (A, B : IN STD_LOGIC_VECTOR(3 DOWNTO 0);
AeqB, AgtB, AltB :OUT STD_LOGIC);
END compare;

ARCHITECTURE behavior OF compare IS
BEGIN
AeqB <= 1 WHEN A = B ELSE 0;
AgtB <= 1 WHEN A > B ELSE 0;
AltB <= 1 WHEN A = B ELSE 0;
END behavior;

Mch m ha u tin.
LIBRARY ieee;
ENTITY priority IS
PORT (w :IN STD_LOGIC_VECTOR(3 DOWNTO 0);
y :OUT STD_LOGIC_VECTOR(1 DOWNTO 0);
z :IN STD_LOGIC;
END priority;
ARCHITECTURE behavior OF priority IS
BEGIN
PROCESS (w)
IF w(3) = 1 THEN y <= 11;
ELSIF w(2) = 1 THEN y <= 10;
ELSIF w(1) = 1 THEN y <= 01;
ELSE y <= 00;
END IF;
END PROCESS;
Z <=0 WHEN w = 0000 ELSE 1;
w1 WHEN OTHERS;
END behavior;
Tu oan m trn ta c mach bao gm 4 ng vo, 3 ng ra, ty thuc vo cc gi tri ng
vo m cc ng ra s c gi tri tuong ung, o mach m ha uu tin ny, w(3) c muc uu
tin cao nht v w(0) c muc uu tin thp nht, gi tri ng ra z chi bng 0 khi tt ca cc
ng vo bng 0, nguoc lai n lun bng 1. Doan mach o trn su dung mnh if-then-
else, tuy nhin nguoi thit k c th linh hoat cc thit k bng nhung mnh khc,
nhung phai am bao hoat ng cua mach l ng nguyn tc.
Mch gii m t 2 ng sang 4.
Mach giai m tu 2 uong sang 4 uong, bao gm 3 ng vo, l: w1, w2, En. Hai
ng vo w1, w2 l hai ng vo s quyt inh gi tri cc ng ra, ng vo En l ng vo
cho php(c th l muc '0' hoc muc '1' ty theo nguoi thit k), khi ng vo En tch
cuc th cc ng ra moi c uoc gi tri tuong ung voi cc ng vo. Trong oan m
VHDL cho mach giai m ny, cc ng ra c k hiu tu y3 n y0. Doan m cua
chuong trnh c dang nhu sau, trong oan m ny, pht biu case uoc su dung.
LIBRARY ieee;
ENTITY dec2to4 IS
PORT (w : IN STD_LOGIC_VECTOR(1 DOWNTO 0);
En : IN STD_LOGIC;
y :OUT STD_LOGIC_VECTOR(0 TO 3);
END dec2to4;
ARCHITECTURE behavior OF dec2to4 IS
BEGIN
PROCESS (w, En)
BEGIN
IF En = 1 THEN
CASE w IS
WHEN 00 => y <= 1000;
WHEN 01 => y <= 0100;
WHEN 10 => y <= 0010;
WHEN OTHERS => y <= 0001;
END CASE;
ELSE
y <= 0000;
END IF;
END PROCESS;
END Behavior;


Mch cht d liu.
Mach cht du liu c nhim vu cht lai du liu ng vo v ua du liu toi ng ra, du
liu tai ng ra s thay i tuong ung voi du liu ng vo khi c mt xung tc ng.
Ng ra s duy tr du liu m n nhn uoc o ng vo trong sut qu trnh cho xung tc
ng, khi khng c xung tc ng, nu ng vo c thay i th gi tri ng ra vn khng
thay i gi tri m n nhn uoc o ln nhn cui cng. Doan m VHDL cho mach
cht uoc vit nhu sau:
LIBRARY IEEE;
ENTITY flipflop IS
Port ( D, clock : IN std_logic;
Q : OUT std_logic);
END flipflop;
ARCHITECTURE bahavior OF flipflop IS
BEGIN
PROCESS
BEGIN
WAIT UNTIL ClockEVENT AND Clock = 1;
Q <= D;
END PROCESS;
END bahavior;
Voi oan m VHDL trn, ng vo du liu c tn l D, xung tc ng canh , ng ra l
Q, khi c mt xung canh ln, ng ra Q s nhn gi tri tu ng vo D v duy tr gi tri
trong sut qu trnh cho mt xung k tip. Doan m trn uoc vit voi mt bit ng vo,
mt bit ng ra, nguoi thit k hon ton c th thay i s bit ng vo v s bit ng ra
cho ph hop voi thit k cua mnh. Doan m trn uoc vit y u cho mt mach cht,
voi cc cng cu tng hop v bin dich, nguoi thit k c th ung dung n vo trong
mach thuc tin sau khi nap vo IC.

Mch to thanh ghi 8 bit.
Thanh ghi trong mach s ng vai tr rt quan trong, cc thit k s hin ai hu nhu
u phai su dung thanh ghi, VHDL cho php nguoi thit k c th tao ra thanh ghi voi
s bit mong mun. Ngoi ra cn c th linh hoat chng trong cc thit k cua mnh,
thanh ghi thuc t chnh l mt mach cht du liu. Doan m sau y vit cho thanh ghi
16 bit, trong thit k c su dung thng s tuong thch chung generic.
LIBRARY IEEE;
ENTITY regn IS
GENERIC ( N : INTEGER := 16);
Port ( D, clock : IN std_logic_vector (N-1 DOWNTO 0);
Reset, clock : IN std_logic;
Q : OUT std_logic_vector (N-1 DOWNTO 0);
END regn;
ARCHITECTURE behavior OF regn IS
BEGIN
PROCESS (Reset, clock)
BEGIN
IF Reset = 0 THEN
Q <= (OTHERS => 0);
ELSIF ClockEVENT AND Clock = 1 THEN
Q <= D;
END IF;
END PROCESS;
END behavior;

Mch m ln.
Mach m ln hoat ng theo nguyn tc: khi c mt xung tc ng o ng vo, ng ra
s thay i mt bit theo chiu huong m ln, mach m ln ngoi ng vo xung clock,
nguoi thit k cn c th tao thm cc ng vo khc nhu Reset, Enable tao thm
tnh linh hoat cua mach. M VHDL cho mach m ln uoc vit nhu sau:
LIBRARY IEEE;
USE ieee.std_logic_unsigned.all;
ENTITY upcount IS
Port ( Reset, Clock, En : IN std_logic;
Q : OUT std_logic_vector (3 DOWNTO 0);
END upcount;
ARCHITECTURE behavior OF upcount IS
SIGNAL Count : STD_LOGIC_VECTOR (3 DOWNTO 0);
BEGIN
PROCESS (Clock, Reset)
BEGIN
IF Reset = 0 THEN
Count <= 0000;
ELSIF ClockEVENT AND Clock = 1 THEN
IF En = 1 THEN
Count <= Count+ 1;
ELSE
Count <= Count;
END IF;
END IF;
END PROCESS;
Q <= Count;
END behavior;

Mch m 3 trng thi.
Mach m 3 trang thi gip mach thuc t khi hoat ng c th iu chinh ng ra o trang
thi thch hop cho su vn hnh cua mach, voi 3 trang thi, nguoi thit k cc mach s s
iu chinh mach sao cho hoat ng tt hon v tit kim nng luong hon. M VHDL cho
mach m 3 trang thi uoc vit nhu sau:
LIBRARY IEEE;
ENTITY trin IS
GENERIC ( N : INTEGER := 8);
Port( X : IN std_logic_vector (N-1 DOWNTO 0);
E : IN std_logic;
F : OUT std_logic_vector (N-1 DOWNTO 0);
END trin;
ARCHITECTURE behavior OF trin IS
BEGIN
F <= (OTHERS => Z) WHEN E =0 ELSE X;
END behavior;

Xy dng my trng thi trong VHDL

library ieee;
use work.std_arith.all;
entity divby5 is
port(x, clk : in std_logic;
y : out std_logic);
end divby5;
architecture state_machine of divby5 is
type StateType is (state0, state1, state2, state3, state4);
signal p_s, n_s : StateType;
begin
fsm: process (p_s, x)
begin
case p_s is
when state0 => y <= '0';
if x = '1' then
n_s <= state1;
else
n_s <= state0;
end if;
when state1 => y <= '0'
if x = '1' then
n_s <= state3;
else
n_s <= state2
end if;
when state2 =>
if x = '1' then
n_s <= state0;
y <= '1';
else
n_s <= state4;
y <= '0';
end if;
if x = '1' then
n_s <= state2;
else
n_s <= state1;
end if;
if x = '1' then
n_s <= state4;
else
n_s <= state3;
end if;
when others => n_s <= state0;
end case
end process fsm;
state-clocked : process (clk)
begin
if rising_edge(clk) then
p_s <= n_s;
end if;
end process state_clocked;
end architecture state_machine;


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