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Basanta Aryal (068/MSI/603)

Question 1: Convert the (12.0625)10 and (673.23)10 decimal numbers to binary numbers. (Use
successive division and multiplication techniques. Show all steps.) a) (12.0625)10 to binary Successive Division by 2 We use repeated 12/2 division technique for 6/2 the integer part of a 3/2 decimal number to convert it into binary. Successive Multiplication by 2 We use repeated multiplication for fractional part of a decimal number to convert it into binary. 0.0625*2 0.125*2 0.25*2 0.5*2 = = = =

Integer Quotient = = = = 6 3 1 0 + + + +

Remainder 0 0 1/2 1/2

Coefficient ai

a0 =0 a1 =0 a2 =1 a3 =1
Coefficient a-i

(12)10=(1100)2 Integer Part 0 0 0 1 + + + + Fraction 0.125 0.25 0.5 0.0

a-1 =0 a-2 =0 a-3 =0 a-4 =1

(0.0625)10=(0.0001)2 Hence the binary value is (1100.0001)2 b) (673.23)10 to binary Successive Division by 2 673/2 336/2 We use repeated division technique for the integer part of a decimal number to convert it into binary. 168/2 84/2 42/2 21/2 10/2 5/2 2/2 Successive Multiplication by 2 We use repeated multiplication for fractional part of a 0.23*2 0.46*2 0.92*2 = = = 1 = = = = = = = = = =

Integer Quotient 336 168 84 42 21 10 5 2 1 0 + + + + + + + + + +

Remainder 1/2 0 0 0 0 1/2 0 1/2 0 1/2

Coefficient ai

a0 =1 a1 =0 a2 =0 a3 =0 a4 =0 a5 =1 a6 =0 a7 =1 a8 =0 a9 =1
Coefficient a-i

(673)10=(1010100001)2 Integer Part 0 0 1 + + + Fraction 0.46 0.92 0.84

a-1 =0 a-2 =0 a-3 =1

Basanta Aryal (068/MSI/603)

decimal number to convert it into binary.

0.84*2 0.68*2 0.36*2 0.72*2 0.44*2 0.88*2 0.76*2 0.52*2

= = = = = = = =

1 1 0 1 0 1 1 1

+ + + + + + + +

0.68 0.36 0.72 0.44 0.88 0.76 0.52 0.04

a-4 =1 a-5 =1 a-6 =0 a-7 =1 a-8 =0 a-9 =1 a-10 =1 a-11 =1

(0.23)10=(0.00111010111)2 Hence the binary value is (1010100001.00111010111)2

Question 2: Perform the subtraction with binary numbers using 2s complement and 1s complement
(a) (11010)2(1101)2 , (b) (100)2 (110000)2. Show all steps. Solution: 2s complement method Step (A): Add the minuend M to the 2s complement of the subtrahend N Step (B): Inspect the end carry result from step (A) If an end carry occurs, discard it. If an end carry does not occur, take the 2s complement of the numbers obtained in step (A) and place a negative sign in front. 1s complement method Step (A): Add the minuend M to the 1s complement of the subtrahend N Step (B): Inspect the end carry result from step (A) If an end carry occurs, add 1 to least significant bit. If an end carry does not occur, take the 1s complement of the numbers obtained in step (A) and place a negative sign in front.

(a) (11010)2(1101)2 M = 11010; N = 01101 2s complement of N = 10011 Now, M-N = 11010-01101 11010 10011 Sum: 101101 Discard end carry -1 0 0 0 0 0 Ans, M-N = (1 1 0 1)2 2

(a) (11010)2(1101)2 M = 11010; N = 01101 1s complement of N = 10010 Now, M-N = 11010-01101 11010 10010 End carry & Sum: 1 0 1 1 0 0 add 1 to LSB +1 Ans, M-N = (1 1 0 1)2

Basanta Aryal (068/MSI/603)

(b) (100)2(110000)2 M = 000100; N = 110000 2s complement of N = 010000 Now, M-N = 000100-110000 000100 010000 Sum: 010100 No end carry take 2s complement And place negative sign in front. Ans, M-N = -( 1 0 1 1 0 0)2

(b) (100)2(110000)2 M = 000100; N = 110000 1s complement of N = 010000 Now, M-N = 000100-110000 000100 001111 Sum: 010011 No end carry take 1s complement And place negative sign in front. Ans, M-N = -( 1 0 1 1 0 0)2

Question 3: Simplify the Boolean function BC + AC + AB + BCD to a minimum number of literals and
implement your simplified Boolean function with fewest number of logic gates (AND, OR, NOT) (Show logic circuit diagram). Express your Boolean function in a sum of minterms and product of maxterms (canonical forms) as well as sum of products and product of sums (standard form). Solution: Let, F be the given Boolean function such that, F = BC + AC + AB + BCD F = BC + AC + AB + BCD = AC + ABC + ABC + BC (1 + D) = AC ( 1 + B) + (A + 1)BC = AC + BC Expressing the Boolean Function F = AC + BC in sum of minterms

Logic Diagream

F = AC + BC = AC (BD + BD + BD + BD) + BC (AD + AD + AD + AD) = ABCD + ABCD + ABCD + ABCD + ABCD + ABCD + ABCD + ABCD = m8 + m9 + m12 + m13 + m6 + m7 + m14 + m15 = (6,7,8,9,12,13,14,15) = Sum of minterms F = (0,1,2,3,4,5,10,11) = Product of Maxter = M0 M1 M2 . M3 M4 M5 M10 M11 = (A+B+C+D)(A+B+C+D)(A+B+C+D)(A+B+C+D)(A+B+C+D)(A+B+C+D)(A+B+C+D) (A+B+C+D) Product of Maxterms CD CD 00 01 11 10 00 01 11 10 00| 0 0 0 0 00| 0 0 0 0 AB| 01| 0 0 1 1 AB| 01| 0 0 1 1 11| 1 1 1 1 11| 1 1 1 1 10| 1 1 0 0 10| 1 1 0 0 Hence F = (B + C).(A + C) in Hence F = AC + BC in the sum of the Product of sum form. Product form. 3

Basanta Aryal (068/MSI/603)

Question 4:

Simplify the Boolean function xyz + xyz + xyz + xyz using map method (sum of products) and Boolean function F= BCD + BCD + ABCD using the dont care d = BCD + ABCD. Solution: Let, w = xyz + xyz + xyz + xyz => m5 + m6 + m3 + m7 00 0 0 yz 01 0 1 11 1 1 10 0 1

X|

0| 1|

Hence the output w = yz + xz + xy

Again here, F = BCD + BCD + ABCD F = BCD + BCD + ABCD = (A+A) BCD+ (A+A)BCD + ABCD = ABCD + ABCD + ABCD + ABCD +ABCD = m0 + m6 + m8 + m14 + m15 , And d = BCD + ABCD = ABCD + ABCD + ABCD = m2 + m5 + m10 With the above functions we have: CD 00 00| AB| 01| 11| 10| 1 0 0 1 01 0 X 0 0 11 0 0 1 0 10 X 1 1 X Hence the overall output considering the dont cares is F = CD + BD + ABC

Basanta Aryal (068/MSI/603)

Question 5: Write down the structural coding in Verilog HDL for a 4-bit full adder?
Solution: //half adder module half_adder(sum,c_out,a,b); input a,b; output sum,c_out; xor(sum,a,b); and(c_out,a,b); endmodule //full adder using basic gates module full_adder(sum,c_out,a,b,c_in); input a,b,c_in; output sum,c_out; wire w1,w2,w3; xor(w1,a,b); xor(sum,w1,c_in); and(w2,a,b); and(w3,w1,c_in); or(c_out,w2,w3); endmodule

Fig: Half adder

Fig: Full adder

a b
Half adder

w1
Half adder

sum
W2

//full adder using two half adder c_in module full_adder(sum,c_out,a,b,c_in); input a,b,c_in; output sum,c_out; wire w1,w2,w3; half_adder ha0(.sum(w1),.c_out(w2),.a(a),.b(b)); half_adder ha1(.sum(sum),.c_out(w3),.a(w1),.b(c_in)); or(c_out,w2,w3); endmodule

c_out
W2

Fig: Full adder

//4bit full adder using full adders module four_bit_full_adder(sum,c_out,a,b,c_in); input c_in; input [3:0] a,b; output c_out; output [3:0] sum; wire [2:0] c_o; full_adder fa0(.sum(sum[0]),.c_out(c_o[0]),.a(a[0]),.b(b[0]),.c_in(c_in)); full_adder fa1(.sum(sum[1]),.c_out(c_o[1]),.a(a[1]),.b(b[1]),.c_in(c_o[0])); full_adder fa2(.sum(sum[2]),.c_out(c_o[2]),.a(a[2]),.b(b[2]),.c_in(c_o[1])); full_adder fa3(.sum(sum[3]),.c_out(c_out),.a(a[3]),.b(b[3]),.c_in(c_o[2])); endmodule

Fig: 4bit full adder

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